Semiconductor device

Abstract

One objective is to provide a technique suitable for suppressing thermal deformation occurring in a front-side electrode of a semiconductor device. A semiconductor device comprises a semiconductor layer, a front-side electrode provided on a front surface of the semiconductor layer, a front-side bonding layer selectively provided on a front surface of the front-side electrode, a conductor frame, and a front-side bonding material. The conductor frame is located on one side of a front surface of the front-side bonding layer, and the front-side bonding material connects the conductor frame and the front-side bonding layer.The elastic modulus of the element front surface bonding material is 20% or less than the elastic modulus of the front surface electrode.

Description

Technical field

[0001] The present disclosure relates to a semiconductor device. State of the art

[0002] A semiconductor device is proposed in which a conductor frame as an external electrode and a front surface electrode of a semiconductor element are connected by a soldering medium (for example, patent document 1). State of the art documents Patent document(s)

[0003] Patent document 1: Published Japanese patent application no. 2008-182074 Summary Problem to be solved by the invention

[0004] The semiconductor device described above has a problem in that thermal deformation occurs in the front surface electrode of the semiconductor element due to a difference in the linear coefficient of expansion between the solder or conductor frame and the semiconductor element, and a crack occurs in the front surface electrode due to a repetition of the thermal deformation.

[0005] The present disclosure was therefore prepared to solve the aforementioned problems, and it is an objective to provide a technique suitable for suppressing thermal deformation occurring in a front surface electrode of a semiconductor element. Means to solve the problem

[0006] A semiconductor device according to the present disclosure comprises: a semiconductor layer; a front surface electrode provided on a front surface of the semiconductor layer; an element front surface bonding layer selectively provided on a front surface of the front surface electrode; a conductor frame located on one side of a front surface of the element front surface bonding layer; and an element front surface bonding material connecting the conductor frame and the element front surface bonding layer, wherein an elastic modulus of the element front surface bonding material is 20% or less of an elastic modulus of the front surface electrode. Effects of the invention

[0007] These and other tasks, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description when it is adopted in conjunction with the accompanying drawings. Brief description of the drawings [ Fig. Figure 1] is a cross-sectional view showing an entire configuration of a semiconductor device according to embodiment 1. [ Fig. 2] is a top view showing the entire configuration of the semiconductor device according to embodiment 1. [ Fig. Figure 3] is an enlarged cross-sectional view showing a configuration of part of the semiconductor device according to embodiment 1. [ Fig. 4] is a diagram that represents a simulation result of the semiconductor device according to embodiment 1. [ Fig. 5] is a diagram that represents a physical property value used in a simulation. Description of the embodiment(s)

[0008] Embodiments are described below with reference to the attached drawings. Features described in each embodiment below are illustrative examples, so not all features are necessarily applied. The same or similar reference numerals are assigned to similar components in a plurality of embodiments in the following description, and the different components are mainly described below. A particular position and direction, such as "top," "bottom," "left," "right," "front," or "back," in the following description need not necessarily correspond to a position and direction in an actual implementation. <Ausführungsform 1>

[0009] Fig. 1 and Fig. Figures 2 are a cross-sectional view and a top view, each representing an entire configuration of a semiconductor device 100 according to the present embodiment 1, and Fig. Figure 3 is an enlarged cross-sectional view of a point part in Fig. 1.

[0010] As in Fig. As shown in Figure 1, the semiconductor device according to the present embodiment 1 comprises a semiconductor element 1, an insulating material 2, an element back surface bonding material 5, a conductor frame 6, an element front surface bonding material 7, a signal wiring 8, a control terminal 9 and a sealing resin 10.

[0011] Semiconductor element 1, for example, features a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), a reverse-conducting IGBT (RC-IGBT), a Schottky blocking diode (SBD), and a PN junction diode (PND). As shown in Fig. As shown in Figure 3, the semiconductor element 1 has a semiconductor layer 1a, a front surface electrode 1b, an element front surface bonding layer 1c and a protective layer 1d.

[0012] Semiconductor layer 1a comprises at least one semiconductor wafer and an epitaxial growth layer. In this description, at least one of A, B, C, ... and Z denotes one of all combinations of a type or of several from a group of A, B, C, ... and Z. The material of semiconductor layer 1a can be silicon or a wide-bandgap semiconductor, such as SiC, GaN, and diamond. If the material of semiconductor layer 1a is a wide-bandgap semiconductor, stable operation at high temperature and high voltage and an increase in the switching speed of the semiconductor element 1 can be achieved.

[0013] The front surface electrode 1b is located on a front surface of the semiconductor layer 1a. For example, the material of the front surface electrode 1b has Al as a major component.

[0014] The element front surface bonding layer 1c is selectively provided on a front surface of the front surface electrode 1b. For example, the material of the element front surface bonding layer 1c has Ni as a major component. An outermost front surface of the element front surface bonding layer 1c may have a layer exhibiting favorable bonding properties for bonding to the element front surface bonding material 7. If the element front surface bonding material 7 is a solder, the outermost front surface of the element front surface bonding layer 1c may have an Au layer exhibiting favorable bonding properties for bonding to a solder. For example, a Young's modulus of the element front surface bonding layer 1c is equal to or greater than 150 GPa and equal to or less than 200 GPa.

[0015] The protective layer 1d is selectively applied to the front surface of the front surface electrode 1b and surrounds the element front surface bonding layer 1c in a top view. One material of the protective layer 1d is, for example, polyimide.

[0016] The insulating material 2 in Fig. 1 is located on one side of a back surface of the semiconductor layer 1a. The insulating material 2 comprises, for example, an insulating resin or ceramic. The insulating resin of the insulating material 2, for example, has epoxy resin as a major component, and the ceramic of the insulating material 2, for example, has at least one of Al2O3, Si3N4, and AlN as a major component.

[0017] Since not only insulation properties but also heat dissipation properties are required in the insulating material 2, it is generally preferred to reduce the thickness of the insulating material 2 in order to increase its thermal conductivity. However, if the insulating material 2 is made too thin, there is a possibility of a deficiency in insulation resistance or a structurally tolerated capacitance (for example, dielectric strength) occurring during manufacturing. Therefore, the thickness of the insulating material 2 is preferably equal to or greater than 100 µm.

[0018] The insulating material 2 has a front surface and a back surface, each of which is provided with a front surface conductive material 3 and a back surface conductive material 4. The front surface conductive material 3 and the back surface conductive material 4, for example, comprise a metal of at least one of the following: aluminum, an aluminum alloy, copper, and a copper alloy. The front surface conductive material 3 and the back surface conductive material 4 are located beneath the semiconductor element 1 and serve to distribute heat from the semiconductor element 1; therefore, they preferably have a sufficient thickness to achieve adequate heat distribution in a planar surface direction.Although dependent on a flat surface design, the front surface conductor material 3 and the back surface conductor material 4 preferably have a thickness of, for example, 0.4 mm or more.

[0019] The element back-surface bonding material 5 electrically connects the back surface of the semiconductor layer 1a and the front surface conducting material 3 of the insulating material 2. For example, the element back-surface bonding material 5 connects a back surface, not shown, provided on the back surface of the semiconductor layer 1a and the front surface conducting material 3. Accordingly, a main current of the semiconductor element 1 flows, for example, through the other semiconductor element and an external electrode terminal via the element back-surface bonding material 5 and the front surface conducting material 3. The element back-surface bonding material 5 can be a lead-free solder containing tin as a major component, or it can be a sintered material containing silver or copper as a major component.The element backside surface bonding material 5 preferably has a thickness of, for example, 0.15 mm or less in order to transfer heat from the semiconductor element 1 to one side of the backside surface of the semiconductor device 100.

[0020] As in Fig. As shown in Figure 3, the conductor frame 6 is located on one side of a front surface of the element front surface bonding layer 1c. The conductor frame 6 is made of, for example, a metal consisting of at least one of Al, an Al alloy, Cu, and a Cu alloy, exhibiting high conductivity. The conductor frame 6 forms a main current path of the semiconductor device 100 and thus preferably has a large current cross-sectional area. Although dependent on a flat surface design, the conductor frame 6 preferably has a thickness of, for example, 0.1 mm or more.

[0021] The element front surface bonding material 7 connects the conductor frame 6 and the element front surface bonding layer 1c. The element front surface bonding material 7 comprises a tin alloy and a thermoplastic resin. Details of the element front surface bonding material 7 are described below.

[0022] The signal wiring 8 in Fig. 1 connects a signal electrode, such as a gate electrode of the semiconductor element 1, and the control terminal 9. A wire, made of, for example, Al, Cu, or Ag, is used for the signal wiring 8 to transmit a signal from the control terminal 9 to the signal electrode. The signal wiring 8 preferably has a diameter of 100 µm or more to ensure mechanical strength. The control terminal 9 is made of, for example, a metal consisting of at least one of Al, an Al alloy, Cu, or a Cu alloy, exhibiting high conductivity.

[0023] The sealing resin 10 seals at least the semiconductor layer 1a. In the example in Fig. 1. The sealing resin 10 seals the semiconductor element 1, the insulating material 2, the front surface conducting material 3, a portion of the back surface conducting material 4, the element back surface bonding material 5, a portion of the conductor frame 6, the element front surface bonding material 7, the signal wiring 8, and a portion of the control connector 9. Although dependent on the linear expansion coefficients of the semiconductor element 1 and the conductor frame 6, the material of the sealing resin 10 is preferably a molded resin having a linear expansion coefficient of approximately 10 to 18 ppm / K.

[0024] In the configuration described above, when the temperature around the semiconductor device 100 changes, thermal deformation, such as thermal expansion or thermal contraction, occurs in the element front-surface bonding material 7 or the conductor frame 6 due to a difference in the coefficient of linear expansion between the element front-surface bonding material 7 or the conductor frame 6 and the semiconductor element 1. This thermal deformation is transferred to the front-surface electrode 1b via the element front-surface bonding layer 1c, and thermal deformation occurs in the front-surface electrode 1b.In general, for a fatigue phenomenon caused by the action of a repetitive load, the Manson-Coffin law is applied, which establishes a correlation between failure lifetime and thermal deformation extent. As the thermal deformation extent of the front surface electrode 1b increases, the failure lifetime of the front surface electrode 1b decreases. Thus, the inventor has investigated a configuration for reducing the thermal deformation extent occurring in the front surface electrode 1b.

[0025] Fig. Figure 4 is a diagram representing the result of running a simulation of the deformation extent using a two-dimensional model with a configuration similar to Fig. 3. Fig. Figure 4 represents a relationship between a change in the ratio of the elastic modulus of the element front-surface bonding material 7 to the elastic modulus of the front-surface electrode 1b (hereinafter also referred to as the "interelasticity ratio") and the extent of thermal deformation occurring in the front-surface electrode 1b. The elastic modulus here is a Young's modulus, which can be measured by a bending test. In the simulation, a physical property value, which is in Fig. 5 is shown as a physical property value of each component element, and a Young's modulus, which has the interelasticity ratios of 5%, 10%, 15%, 20%, 30% and 50%, is used for a Young's modulus of the element front surface bonding material.

[0026] As through Fig. As shown in Figure 4, the extent of deformation of the front surface electrode 1b decreases as the interelasticity ratio decreases. The reason for this is thought to be that when the interelasticity ratio is small, i.e., when the Young's modulus of the element front surface bonding material 7 is small, the element front surface bonding material 7 absorbs a thermal stress transferred from the conductor frame 6 to the front surface electrode 1b and suppresses the deformation that occurs in the front surface electrode 1b. As shown by Fig.As shown in Figure 4, a change in the deformation extent exhibits a bending point in a range of 20 to 30% of the interelasticity ratio. Thus, if the interelasticity ratio is 20% or less, that is, if the elastic modulus of the element front surface bonding material 7 is 20% or less than the elastic modulus of the front surface electrode 1b, the thermal deformation extent occurring in the front surface electrode 1b can be reduced.

[0027] In the present embodiment 1, the material of the element front surface bonding material 7 comprises, for example, a tin alloy and a thermoplastic resin, as described above. Thus, if the ratio of the thermoplastic resin to the tin alloy in the element front surface bonding material 7 is increased, the elastic modulus of the element front surface bonding material 7 can be 20% or less of the elastic modulus of the front surface electrode 1b.

[0028] If the material of the front surface electrode 1b contains aluminum as a major component, the elastic modulus (Young's modulus) of the front surface electrode 1b is approximately 70 GPa. Therefore, the proportion of thermoplastic resin in the element front surface bonding material 7 is adjusted so that the elastic modulus (Young's modulus) of the element front surface bonding material 7 is 14 GPa or less. The element front surface bonding material 7 preferably has a thickness of 0.2 mm or more to stably reduce the extent of deformation that occurs in the front surface electrode 1b due to the thermal deformation of the conductor frame 6.

[0029] The above-described effect of reducing the deformation circumference of the front surface electrode 1b is particularly effective in a case in which the semiconductor layer 1a of the semiconductor element 1 has a wide bandgap semiconductor which can be operated stably at a high temperature.

[0030] The contents of the embodiments can be suitably modified and omitted.

[0031] The foregoing description is descriptive in all aspects and does not limit the disclosure. It is therefore understood that numerous examples of modification, which are not presented here as examples, can be devised. Explanation of reference symbols

[0032] 1a Semiconductor layer, 1b Front surface electrode, 1c Element front surface bonding layer, 1d Protective layer, 2 Insulating material, 3 Front surface conducting material, 4 Back surface conducting material, 5 Element back surface bonding material, 6 Conductor frame, 7 Element front surface bonding material, 8 Signal wiring, 9 Control connector, 10 Sealing resin, 100 Semiconductor device. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2008-182074

[0003]

Claims

[1] Semiconductor device comprising: a semiconductor layer; a front surface electrode that is provided on a front surface of the semiconductor layer; an element front surface bonding layer that is selectively provided on a front surface of the front surface electrode; a conductor frame located on one side of a front surface of the element front surface bonding layer; and an element front surface bonding material that connects the conductor frame and the element front surface bonding layer, wherein the elastic modulus of the element front surface bonding material is 20% or less than the elastic modulus of the front surface electrode. [2] Semiconductor device according to claim 1, further comprising: a protective layer that is selectively provided on the front surface of the front surface electrode and surrounds the element front surface bonding layer in a top view; an insulating material located on one side of a back surface of the semiconductor layer and having a front surface and a back surface, on each of which a front surface conducting material and a back surface conducting material are provided; a back-surface bonding material that electrically connects the back surface of the semiconductor layer and the front surface conducting material of the insulating material; and a sealing resin that seals at least the semiconductor layer. [3] Semiconductor device according to claim 1 or 2, wherein an elastic modulus of the front surface electrode is 70 GPa or more, and a modulus of elasticity of the element front surface bonding material is 14 GPa or less. [4] Semiconductor device according to any one of claims 1 to 3, wherein The element front surface bonding material comprises a tin alloy and a thermoplastic resin. [5] Semiconductor device according to any one of claims 1 to 4, wherein a material of the semiconductor layer comprises a wide bandgap semiconductor.

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