Power semiconductor module, inverter comprising a power semiconductor module

EP4623468A1Pending Publication Date: 2025-10-01SCHAEFFLER TECHNOLOGIES AG & CO KG
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Patent Information

Application Number
EP2023810323
Authority / Receiving Office
EP · EP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-11-23
Filing Date
2023-11-21
Publication Date
2025-10-01

AI Technical Summary

Technical Problem

Power semiconductor modules in half-bridge circuits, especially in electric vehicles, face uneven current distribution during short circuits due to fluctuations in threshold voltage, leading to potential damage from high short-circuit currents and parasitic leakage inductance.

Method used

The power semiconductor module design includes strategically positioning the auxiliary emitter tap along the current path closer to the HV connections, reducing asymmetrical current distribution and generating parasitic leakage inductance to counteract high load currents, thereby preventing defects during short circuit tests without requiring a complex substrate redesign.

Benefits of technology

This design achieves more robust and efficient current distribution, reducing production waste and preventing semiconductor switch damage by optimizing the placement of the auxiliary emitter tap, resulting in a more reliable power semiconductor module.

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Abstract

The invention relates to a power semiconductor module (1) having a half-bridge circuit comprising a plurality of high-side semiconductor switches (13, 14, 15) and a plurality of low-side semiconductor switches (16, 17, 18) arranged on a substrate (2), - wherein the substrate (2) has contact terminal pads (6, 8, 10, 11, 12, 19) which are contacted by contact pads (7, 9) of the semiconductor switches (13, 14, 15, 16, 17, 18) and which are connected to external terminals (23, 24, 25) of the power semiconductor module (1), - wherein the power semiconductor module (1) has HV- terminals (24) and HV+ terminals (23) for a supply voltage and also phase terminals (25) as external terminals, - wherein the low-side semiconductor switches (16, 17, 18) are arranged along a current path (32) extending from an emitter terminal (33) of a first low-side semiconductor switch (16) as far as the HV- terminals (24) for the supply voltage, wherein a last low-side semiconductor switch (18) along the current path (32) is arranged closest to the HV- terminals (24) and the first low-side semiconductor switch (16) is arranged furthest away from the HV- terminals (24); - wherein the power semiconductor module (1) has at least one auxiliary emitter tap (20) for the low-side semiconductor switches (16, 17, 18) which is arranged on the current path (32) between, firstly, the last low-side semiconductor switch (18) and, secondly, the HV- terminals (24). The invention also relates to an inverter comprising an aforementioned power semiconductor module.
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Description

[0001] Description

[0002] Power semiconductor module, inverter with a power semiconductor module

[0003] The present invention relates to a power semiconductor module comprising a half-bridge circuit, for example, a triple or multiple half-bridge circuit with three or more high-side semiconductor switches and three or more low-side semiconductor switches arranged on a substrate. Such power semiconductor modules can be used, for example, as part of an inverter, particularly in electrically powered vehicles. Furthermore, the invention relates to an inverter comprising one or more of said power semiconductor modules, which can be used, for example, for an electrically powered vehicle.

[0004] Such power semiconductor modules typically have an auxiliary emitter on both the high and low sides as a reference point or for measurement purposes. The current flow in the metallized contact surfaces of the substrate on the high and low sides varies and depends on the respective geometry of the contact pads and on the arrangement of the semiconductor switches and their contacting. If the installed semiconductor switches exhibit fluctuations in the threshold voltage, this can influence the short-circuit behavior of the semiconductor switches. In particular, at relatively low threshold voltages, a higher short-circuit current can occur in the semiconductor switches in question. To avoid this and to distribute the load as evenly as possible across the individual semiconductor switches, problematic substrates are currently sorted out in the short-circuit test.

[0005] It is an object of the present invention to provide a design for a power semiconductor module with which the most symmetrical current distribution possible to the semiconductor switches is achieved in the event of a short circuit.

[0006] This problem is solved by the subject matter of the independent patent claim. Embodiments and further developments are the subject matter of the dependent claims.

[0007] According to a first aspect of the invention, a power semiconductor module is specified which has a half-bridge circuit with a plurality, such as three or six or nine, of high-side semiconductor switches and a plurality, such as three or six or nine, of low-side semiconductor switches arranged on a substrate. The substrate has, on its upper side, on which the semiconductor switches are arranged, electrical contact pads which are electrically contacted by electrical contact pads of the semiconductor switches (or on which the semiconductor switches rest above their respective upper-side electrical contact pads and are electrically contacted therewith) and which are connected or electrically connected to external terminals of the power semiconductor module. As external terminals, the power semiconductor module has HV' terminals and HV +-Connections for a supply voltage as well as several, for example three, phase connections.

[0008] The HV' terminals are arranged close (and especially directly) to each other or close to each other, especially closer to each other compared to the low-side semiconductor switches.

[0009] The low-side semiconductor switches are arranged along a current path or in a main extension direction of the current path, which extends from an emitter terminal of a first low-side semiconductor switch furthest away from the HV' terminals to the HV' terminals for the supply voltage, wherein a last low-side semiconductor switch is arranged closest to the HV' terminals along the current path or in the main extension direction of the current path, and the first low-side semiconductor switch is furthest away from the HV' terminals in the main extension direction of the current path.For example, in the case of a triple half-bridge module, if there are three low-side semiconductor switches, the third semiconductor switch is referred to as the last semiconductor switch, while a second low-side semiconductor switch is arranged between the first low-side semiconductor switch and the last, in this case the third, low-side semiconductor switch.

[0010] The power semiconductor module has at least one auxiliary emitter tap for the low side or the low side semiconductor switches, wherein the auxiliary emitter tap is arranged on the current path and, viewed in the main extension direction of the current path, between the last or the third low side semiconductor switch on the one hand and the HV' terminals on the other hand.

[0011] The current path is understood to be a perpendicular to equipotential lines on the contact pad of the substrate, on which the low-side semiconductor switches are arranged and physically and electrically connected, and which, in particular, forms a (common) low-side emitter terminal of all low-side semiconductor switches. In the event of a short circuit, the voltage potential between the (common) low-side emitter terminal and the respective gate terminals of the low-side semiconductor switches is crucial. If an excessive load current flows through the semiconductor switches, for example, as a result of an electrical short circuit, damage to the corresponding components or semiconductor switches can occur.

[0012] However, in the event of a short circuit or excessive load current, a parasitic stray inductance at the individual semiconductor switches counteracts the short circuit or excessive load current. This stray inductance is greater for the first low-side semiconductor switch, located furthest from the HV' terminals, or for additional low-side semiconductor switches located farther from the HV' terminals, than for the last low-side semiconductor switch, located closest to the HV' terminals, or for additional low-side semiconductor switches located closer to the HV' terminals. If the auxiliary emitter tap is arranged at essentially the same potential as the gate terminal of the last low-side semiconductor switch, located closest to the HV' terminals, there is practically no stray inductance for the last low-side semiconductor switch.

[0013] However, by arranging the auxiliary emitter tap on the current path between the last low-side semiconductor switch and the HV' terminals, a relevant stray inductance also results for the last low-side semiconductor switch and thus at least a less asymmetric current distribution between the individual low-side semiconductor switches in the event of a short circuit.

[0014] The power semiconductor module described above has the advantage of being more robust and producing less waste during production. This is achieved simply by relocating the auxiliary emitter tap along the current path toward the HV terminals. A complex redesign of the substrate is not required, as a bond connection for the auxiliary emitter tap can be bonded to the already large-area emitter contact pad, thus eliminating the need for a separate pad.

[0015] The auxiliary emitter tap serves primarily as a reference point for testing or checking the condition of the power semiconductor module or the semiconductor switches, especially during a short-circuit test. By positioning the auxiliary emitter tap on the low-side current path and, viewed in the main direction of the low-side current path, between the last low-side semiconductor switch closest to the HV' terminals on the one hand and the HV' terminals on the other, an asymmetrical current distribution is changed in the event of an electrical short circuit or an excessively high load current. This results in a parasitic stray inductance that was not previously present. This (deliberately generated) stray inductance counteracts the short circuit or the high load current and thus prevents a possible defect in the semiconductor switches during testing, especially during a short-circuit test.

[0016] As it turns out, this method can significantly reduce waste in production.

[0017] According to one embodiment, an external emitter contact of the low side or the low side semiconductor switch is arranged at a first edge region of the substrate or the power semiconductor module, and the HV' terminals are arranged at a second edge region of the substrate or the power semiconductor module opposite the first edge region, wherein a distance a of the auxiliary emitter tap from the second edge region is at most half as large as the distance A of a gate contact surface of the last low side semiconductor switch from the second edge region, preferably a is at most 0.33*A, preferably a is at most 0.25*A.

[0018] In other words: an external emitter contact of the low side or the low side semiconductor switch is arranged at a first edge region on the first edge of the substrate or the power semiconductor module and the HV' connections are arranged at a second edge region or the second edge of the substrate or the power semiconductor module opposite the first edge region and thus the first edge, wherein a distance a of the auxiliary emitter tap from the second edge region or the second edge is at most half as large as the distance A of a gate contact surface of the last low side semiconductor switch from the second edge region or the second edge, preferably a is at most 0.33*A, preferably a is at most 0.25*A.Thus, viewed from the same second edge, the gate contact area of ​​the last low-side semiconductor switch closest to the second edge is more than twice as far from the second edge as the auxiliary emitter tap is from the same second edge. According to one embodiment, the auxiliary emitter tap is connected to a common emitter terminal of the low-side semiconductor switches by means of a bond wire.

[0019] In other words, the auxiliary emitter tap is formed, for example, by a bonding wire that electrically connects the common, usually large-area, emitter terminal of the low-side semiconductor switches to the external terminal of the low-side emitter. The auxiliary emitter tap thus forms part of a low-inductance contact for the common emitter terminal of the low-side.

[0020] In particular, the semiconductor switches can each have an IGBT (Insulated-Gate Bipolar Transistor), and they typically also include a freewheeling diode.

[0021] The substrate can be designed, in particular, as a DCB (Direct Copper Bonded) substrate. DCB substrates are made of ceramic with copper contact pads and are used, in particular, for power semiconductor modules due to their good heat dissipation.

[0022] The power semiconductor module can be designed as a triple or multiple half-bridge module and each have at least three high-side semiconductor switches and at least three low-side semiconductor switches.

[0023] The power semiconductor module may also have a further auxiliary emitter tap for the high-side semiconductor switches, which is connected to a high-side current path between a HV +-connections to the nearest high-side semiconductor switch on the one hand and the HV + terminals on the other hand. The high-side semiconductor switches are arranged analogously to the high-side semiconductor switches along the high-side current path, which extends from an emitter terminal of a HV + terminals of the furthest high-side semiconductor switch to the HV' terminals for the supply voltage.

[0024] According to a second aspect of the invention, an inverter, in particular for an electrically powered vehicle, is provided, which comprises at least one power semiconductor module as described above. The inverter further comprises a housing in which the power semiconductor module is arranged.

[0025] Embodiments of the invention are described below by way of example with reference to schematic drawings.

[0026] Figure 1 shows a power semiconductor module 1 according to one embodiment of the invention. In this embodiment, the power semiconductor module 1 is constructed as a triple bridge module and can be used, for example, as a DC-DC converter in an electrically powered vehicle.

[0027] The power semiconductor module 1 has three high-side semiconductor switches 13, 14, 15 and three low-side semiconductor switches 16, 17, 18. Each semiconductor switch 13, 14, 15, 16, 17, 18 has an IGBT 4 and a freewheeling diode 5. Most of the connections of the IGBT 4 and the freewheeling diode 5 are not shown for clarity.

[0028] The semiconductor switches 13, 14, 15, 16, 17, 18 comprise a first high-side semiconductor switch 13, a second high-side semiconductor switch 14, a third high-side semiconductor switch 15, a first low-side semiconductor switch 16, a second low-side semiconductor switch 17, and a third low-side semiconductor switch 18. They are arranged on a substrate 2, which, in the embodiment shown, is designed as a DCB substrate and has copper contact pads on its upper side.

[0029] The semiconductor switches 13 to 15 of the high side are arranged with their rear contacts on a collector contact pad 6. The IGBTs 4 have emitter contact pads 7 on their upper sides (not shown in detail), which are connected to a common contact pad 8 by means of bond connections indicated only schematically. Furthermore, the IGBTs 4 also have gate contact pads 9 on their upper sides, which are also connected to gate contact pads 10 of the substrate 2 by means of bond connections shown schematically. The gate contact pads 10 of the high side are connected to one another by means of bond connections and to a gate contact pad 19, which can be contacted by means of an external connection 28. The collector contact pad 6 can be contacted by means of an external connection 26.The contact pad 8 can be contacted via an external connection 27 on the high side and an external connection 29 on the low side. It is located at the emitter potential of the high side and the collector potential of the low side.

[0030] The semiconductor switches 16, 17, 18 of the low side, similar to those of the high side, have rear contacts with which they are arranged on the contact pad 8. On their upper sides, they have emitter contact pads 7, which are connected to a common emitter contact pad 11 on the substrate 2 by means of bonds shown only schematically. Furthermore, they also have gate contact pads 9, which are connected to gate contact pads 10 by means of bonds. The gate contact pads 10 of the low side are also connected to one another by means of a bond and, by means of this bond, are also connected to a gate contact pad 19, which can be contacted via the external contact 31.

[0031] The power semiconductor module 1 also has external terminals 23 and 24 for a supply voltage, for example, from a vehicle battery, as well as external terminals 25 as phase terminals. Furthermore, the power semiconductor module 1 can have further external terminals, in particular signal terminals, which are not shown here for the sake of clarity.

[0032] The power semiconductor module 1 further has an auxiliary emitter tap 20 on the low side. An auxiliary emitter tap can also be provided on the high side, but is not shown. The auxiliary emitter tap 20 is formed by a bonding wire 22, which, via a contact pad 21 insulated from the emitter contact pad 11, contacts the contact pad 12, which is connected to the external terminal 30 of the low-side emitter. The auxiliary emitter tap 20 thus provides a low-inductance contact for the low-side emitter contact pad 11.

[0033] In the power semiconductor module 1, an auxiliary emitter tap is also provided on the high side, which, however, is not shown for the sake of clarity.

[0034] The semiconductor switches 16, 17, 18 of the low side are arranged along a current path indicated by the dashed line 32, wherein the current path extends from an emitter terminal 33 of the first semiconductor switch 16 to the HV' external terminals 24. The first semiconductor switch 16 of the low side is arranged furthest away from the HV' external terminals 24, the third semiconductor switch 18 is arranged closest to the HV' external terminals 24, and the second semiconductor switch 17 is arranged between the first semiconductor switch 16 and the third semiconductor switch 18. The electrical potential decreases along the current path in the direction of the external terminals 24. In particular, the current path can run perpendicular to equipotential lines of the emitter contact pad 11.

[0035] The auxiliary emitter tap 20 is arranged between the third semiconductor switch 18 or its emitter terminal 34 and the external terminals 24. Thus, it is at a lower potential than the emitter terminal 34 of the third semiconductor switch 18. In the event of a short circuit, this has the following effect:

[0036] The current path in the DCB causes stray inductances that accumulate along the current path. While the first low-side semiconductor switch 16 "sees" a relatively large stray inductance that counteracts the short-circuit current due to the long distance along the current path between the first low-side semiconductor switch 16 and the HV' terminal 24, the stray inductance is smaller for the second semiconductor switch 17 and even smaller for the third semiconductor switch 18. However, since the auxiliary emitter tap 20 has been shifted relatively far along the current path toward the HV' terminals 24, a stray inductance - albeit a relatively small one - acts on the third semiconductor switch 18 in the event of a short circuit, and the current distribution is less asymmetrical than in previously known power semiconductor modules.

[0037] For this purpose, the auxiliary emitter tap 20 was moved closer to the edge region of the substrate 2, in which the HV' terminals are also located. While the external emitter contact 30 of the low side is arranged at a first edge region 35 of the power semiconductor module 1, the HV' terminals 24 are arranged at a second edge region 36 opposite the first edge region 35. The auxiliary emitter tap 20 is also arranged near the second edge region 36, wherein the distance a of the auxiliary emitter tap 20 from the second edge region 36 is at most half the distance A of the gate contact area 9 of the third low-side semiconductor switch 18 from the second edge region 36; preferably, a is at most 0.33*A, preferably a is at most 0.25*A. List of Reference Symbols

[0038] 1 power semiconductor module

[0039] 2 Substrat

[0040] 4 IGBT

[0041] 5 freewheeling diode

[0042] 6 Collector contact connection area (high side)

[0043] 7 Emitter contact area (high side)

[0044] 8 Contact connection surface

[0045] 9 Gate contact area

[0046] 10 Gate contact pad

[0047] 11 Emitter contact pad (low side)

[0048] 12 contact connection surface

[0049] 13 first semiconductor switch (high side)

[0050] 14 second semiconductor switch (high side)

[0051] 15 third semiconductor switch (high side)

[0052] 16 first semiconductor switch (low side)

[0053] 17 second semiconductor switch (low side)

[0054] 18 third semiconductor switch (low side)

[0055] 19 Gate contact area

[0056] 20 Auxiliary emitter tap

[0057] 21 Contact pad

[0058] 22 bonding wire

[0059] 23 External connection (supply voltage)

[0060] 24 External connection (supply voltage)

[0061] 25 External connection (phase)

[0062] 26 External connection

[0063] 27 External connection

[0064] 28 External connection

[0065] 29 External connection

[0066] 30 external connection

[0067] 31 External connection

[0068] 32 dashed line, current path

[0069] 33 Emitter connection

[0070] 34 Emitter connection

[0071] 35 first edge area

[0072] 36 second edge area

Claims

Patent claims 1. Power semiconductor module (1), comprising a half-bridge circuit with a plurality of high-side semiconductor switches (13, 14, 15) and a plurality of low-side semiconductor switches (16, 17, 18) arranged on a substrate (2), - wherein the substrate (2) has contact pads (6, 8, 10, 11, 12, 19) which are contacted by contact pads (7, 9) of the semiconductor switches (13, 14, 15, 16, 17, 18) and which are connected to external terminals (23, 24, 25) of the power semiconductor module (1), - wherein the power semiconductor module (1 ) has HV' terminals (24) and HV + -connections (23) for a supply voltage and phase connections (25) as external connections, - wherein the low-side semiconductor switches (16, 17, 18) are arranged along a current path (32) extending from an emitter terminal (33) of a first low-side semiconductor switch (16) to the HV' terminals (24) for the supply voltage, wherein a last low-side semiconductor switch (18) along the current path (32) is arranged closest to the HV' terminals (24) and the first low-side semiconductor switch (16) is furthest away from the HV' terminals (24); - wherein the power semiconductor module (1) has at least one auxiliary emitter tap (20) for the low-side semiconductor switches (16, 17, 18), which is arranged on the current path (32) between the last low-side semiconductor switch (18) on the one hand and the HV' terminals (24) on the other hand.

2. Power semiconductor module (1) according to claim 1, wherein an emitter external contact (30) of the low side at a first edge region (35) of the substrate (2) and the HV' terminals (24) are arranged on a second edge region (36) of the substrate (2) opposite the first edge region (35), wherein a distance a of the auxiliary emitter tap (20) from the second edge region (36) is at most half as large as the distance A of a gate contact surface (9) of the last low-side semiconductor switch (18) from the second edge region (36).

3. Power semiconductor module (1) according to claim 1 or 2, wherein the auxiliary emitter tap (20) is connected to a common emitter terminal (11) of the low-side semiconductor switches (16, 17, 18) by means of a bonding wire (22).

4. Power semiconductor module (1) according to one of claims 1 to 3, wherein the semiconductor switches (13, 14, 15, 16, 17, 18) each have an IGBT (4).

5. Power semiconductor module (1) according to one of claims 1 to 4, wherein the substrate (2) is designed as a DCB substrate.

6. Power semiconductor module (1) according to one of claims 1 to 5, which is designed as a triple or multiple half-bridge module and has at least three high-side semiconductor switches (13, 14, 15) and at least three low-side semiconductor switches (16, 17, 18).

7. Inverter, comprising: - a housing, at least one power semiconductor module (1) according to one of the preceding claims, which is arranged in the housing.