Common mode filter, common mode filter assembly and terminal device

Abstract

Disclosed are a common-mode filter, a common-mode filter component, and a terminal device. The common-mode filter includes a substrate made based on a PCB technology, and conductor layers and insulation layers are alternately stacked on the substrate in sequence. A pin of each winding is configured on a conductor layer at the bottom, and a coil of each winding is configured on a conductor layer located above a pin layer. A coil layer is constructed to increase an inductance value of each winding of the common-mode filter. On the premise of meeting a common-mode suppression requirement, this can avoid a magnetic loss caused by impact of a magnetic core, and reduce an insertion loss of a differential-mode signal of the common-mode filter. The pin layer located at the bottom is connected to a circuit board. In this way, a pin being laterally led out does not affect phase symmetry of the winding coils, a phase balance requirement of the winding coils is met, and a component of common-mode noise converted to differential-mode noise is controlled within a low range. This can reduce differential-mode interference and further improve a noise filtering capability of the common-mode filter.

Description

[0001] This application claims priority to Chinese Patent Application No. 2023101631575, filed with the China National Intellectual Property Administration on February 17, 2023 and entitled "COMMON-MODE FILTER, COMMON-MODE FILTER COMPONENT, AND TERMINAL DEVICE", which is incorporated herein by reference in its entirety.TECHNICAL FIELD

[0002] Embodiments of this application relate to the field of electronic technologies, and in particular, to a common-mode filter, a common-mode filter component, and a terminal device.BACKGROUND

[0003] With increasing requirements for miniaturization of mobile terminal products, the products become smaller in size, and a quantity of antenna frequency bands inside the products increases, resulting in a reduced distance between a radio frequency antenna and a high-speed data transmission interface. Consequently, a common-mode signal on an antenna side is coupled to the high-speed interface and superimposed on a high-speed signal through modal conversion. This makes high-speed data transmission through an interface like a MIPI (Mobile Industry Processor Interface) susceptible to signal degradation due to impact of radio frequency transmit power. To suppress interference from radio frequency antenna signals to a high-speed differential data transmission module like the MIPI, a small-sized common-mode filter is usually used in a terminal device to filter out common-mode noise on high-speed signal lines such as the MIPI.

[0004] To obtain a good noise filtering capability, high requirements are imposed on electrical performance (common-mode suppression, symmetry, differential mode loss, and resistance to radiation interference) of the common-mode filter.

[0005] An existing common-mode filter is processed by using an LTCC technology. A winding coil is first printed on a ceramic blank, and then pressed and sintered to form a main body of the common-mode filter. The main body includes two parts: a coil and a magnetic core. A magnetic core made of a high magnetic permeability material results in a high insertion loss of a differential-mode signal at a high frequency, affecting link transmission efficiency. In addition, based on a characteristic of a process of the LTCC technology, an electrode pin is led out laterally from the main body of the common-mode filter. When assembled on a circuit board, all electrode pins need to implement line connection through connection leads. Electrical lengths between windings differ greatly, leading to poor phase symmetry between the windings. This further results in significant conversion between a differential-mode component and a common-mode component, leading to a poor noise filtering capability of the common-mode filter.SUMMARY

[0006] Embodiments of this application provide a common-mode filter, a common-mode filter component, and a terminal device, to improve electrical performance symmetry between windings and improve a noise filtering capability of the common-mode filter while reducing a differential-mode loss of the common-mode filter.

[0007] A first aspect of embodiments of this application provides a common-mode filter. The common-mode filter includes a substrate made based on a PCB technology, and a plurality of conductor layers and a plurality of insulation layers are alternately stacked on the substrate in sequence. The insulation layers are arranged between the conductor layers, to establish an insulation relationship between the conductor layers and meet a function requirement of coil arrangement. The common-mode filter includes a plurality of windings, each winding is disposed on the conductor layer, and each winding includes a pin and a coil. The pin of the winding is configured on a conductor layer at the bottom, and the conductor layer at the bottom is a pin layer. The coil of the winding is configured on a conductor layer located above the pin layer, and the conductor layer located above the pin layer is a coil layer. In other words, the pin layer is a conductor layer at the bottom of the substrate, and the coil layer is a conductor layer other than the pin layer. An external via is provided in the insulation layer, and the pin of each winding is connected to the coil through the external via. In this way, a coil layer is constructed to increase an inductance value of each winding of the common-mode filter. On the c of meeting a common-mode suppression requirement, this avoids a magnetic loss caused by using a magnetic core in a conventional technology. In addition, as a carrier, the insulation layer formed based on the PCB technology, has a lower dielectric constant, and a lower dielectric loss than ceramic blank in an existing LTCC technology. Therefore, this can effectively reduce an insertion loss of a differential-mode signal of the common-mode filter, and improve a noise filtering capability of the common-mode filter.

[0008] In addition, in the common-mode filter provided in this solution, the pin layer is located at the bottom of the substrate and is directly connected to a circuit board. In this way, a pin being laterally led out and connected to the circuit board through a lead does not affect phase symmetry of the winding coils, and an electrical length can be conveniently adjusted based on a physical length of the coil arranged on the coil layer, meeting a phase balance requirement of the winding coils. In this way, conversion efficiency between common mode noise and a differential-mode signal is low, so that a component of the common-mode noise converted to differential-mode noise is controlled within a low range. This can reduce differential-mode interference and further improve the noise filtering capability of the common-mode filter.

[0009] During actual application, the common-mode filter includes a first winding, a second winding, and a third winding, and a coil body of the first winding, a coil body of the second winding, and a coil body of the third winding are alternately disposed on different coil layers, to construct a three-wire common-mode filter for use in a link according to a C-PHY protocol standard.

[0010] In addition, the common-mode filter may alternatively be a two-wire common-mode filter for use in a link according to a D-PHY protocol standard.

[0011] According to the first aspect, an embodiment of this application further provides a first implementation of the first aspect: The external via includes an input via and an output via, and the pin of each winding includes an input pin and an output pin. Correspondingly, in each winding, the input pin is connected to an input end of the coil through the input via, the output pin is connected to an output end of the coil through the output via, and the input pin and the output pin of each winding are spaced apart in a first direction. All the input pins are sequentially spaced apart in a second direction, and all the output pins are sequentially spaced apart in the second direction. The first direction is different from the second direction, to facilitate appropriate control of phase symmetry of all the windings.

[0012] For example, the input pin and output pin of each winding are disposed at a same spacing. Further, the input pins are disposed at a same spacing, and the output pins are also disposed at a same spacing.

[0013] According to the first implementation of the first aspect, this embodiment of this application further provides a second implementation of the first aspect: One of the input via and the output via of each winding is located inside the coil, that is, is an internal via. The other is located outside the coil, that is, is an external via. In this way, based on a configuration relationship of the internal via, occupying space at a periphery of a coating layer of the component can be avoided. This further improves utilization of a wire winding area.

[0014] During actual application, a connection section is configured on a corresponding pin connected to the internal via, and the connection section extends from a pin side to the corresponding internal via, to implement electrical connection with a corresponding winding coil.

[0015] During other actual application, both the input via and the output via of each winding may be located outside the coil.

[0016] According to the first aspect, the first implementation of the first aspect, or the second implementation of the first aspect, this embodiment of this application further provides a third implementation of the first aspect: All winding coils are located on different coil layers, and are wound in a same direction. This facilitates a layout design of a coil body, and results in a compact structure.

[0017] According to the third implementation of the first aspect, this embodiment of this application further provides a fourth implementation of the first aspect: The coil bodies of the plurality of windings are alternately disposed on the different coil layers, to avoid a loss caused by coupling between the coils. During actual application, the coil of each winding includes at least two sequentially connected coil bodies, and the coil bodies are respectively located on different coil layers and are connected through a connection via provided in the insulation layer.

[0018] According to the fourth implementation of the first aspect, this embodiment of this application further provides a fifth implementation of the first aspect: In the at least two coil bodies, a coil body forming the input end of the coil is an input coil body, and the input coil body is a top-layer coil body of the coil, namely, a top-layer coil body of the winding coil. In this way, an overall structure is more appropriate and compact and a quantity of configured connection vias can be reduced. This helps improve phase balance performance.

[0019] During actual application, in the at least two coil bodies, a coil body forming the input end of the coil is an input coil body, and the input coil body is a coil body located below a top-layer coil body of the coil.

[0020] According to the first aspect, the first implementation of the first aspect, the second implementation of the first aspect, the third implementation of the first aspect, the fourth implementation of the first aspect, or the fifth implementation of the first aspect, this embodiment of this application further provides a sixth implementation of the first aspect: The coil body of the coil is a rectangle formed through continuously winding, and an arc-shaped conductor section exists between adjacent straight strip conductor sections. In this way, a coil body on each conductor layer is arranged in a rectangle formed through winding, and a coating area of the component is fully utilized, to obtain good utilization of a wire winding area of the component. To some extent, this can avoid a loss caused by increasing the inductance value of the winding through addition of the coil layer. In addition, the arc-shaped conductor section at a turn of the rectangle may be determined based on a parameter associated with each winding of an actual product, and a curvature radius or a round corner radius of the arc-shaped conductor section of the coil body of each winding coil may be adjusted as required, to obtain good phase balance through coordinated control of the physical length of the coil body.

[0021] According to the first aspect, the first implementation of the first aspect, the second implementation of the first aspect, the third implementation of the first aspect, the fourth implementation of the first aspect, the fifth implementation of the first aspect, or the sixth implementation of the first aspect, this embodiment of this application further provides a seventh implementation of the first aspect: The common-mode filter includes a shield cage made based on the PCB technology; the shield cage includes a metal shield layer formed on the top of the substrate, and a plurality of ground vias spaced apart at a periphery of the substrate; and a bottom end of the ground via extends to the pin layer of the substrate, and a top end of the ground via is connected to the metal shield layer, to form the shield cage. In this way, the common-mode filter has a self-shielding function. The common-mode filter can be widely used in different application scenarios without additional shield cover, effectively reducing an occupied board area.

[0022] During actual application, the metal shield layer may be a complete metal shield layer, or a hollow metal shield layer, for example, but not limited to a hollow metal shield layer in a PGS or mesh form.

[0023] During other actual application, a shaping and cutting trajectory of the common-mode filter passes through at least some of the plurality of ground vias. The common-mode filter has good processing manufacturability.

[0024] A second aspect of embodiments of this application provides a common-mode filter component. The common-mode filter component includes a substrate made based on a PCB technology, and a conductor layer and an insulation layer are alternately stacked on the substrate in sequence. The common-mode filter component includes a plurality of windings, and is capable of forming at least two common-mode filters, each winding is disposed on the conductor layer, and the winding includes a pin and a coil. The pin is configured on a conductor layer at the bottom, and the conductor layer at the bottom is a pin layer. The coil is configured on a conductor layer located above the pin, and the conductor layer located above the pin layer is a coil layer. An external via is provided in the insulation layer, and the pin is connected to the coil through the external via. In this way, a plurality of common-mode filters are integrated, that is, the common-mode filter component is obtained by cutting and depaneling. This can integrate a plurality of D-PHY or C-PHY common-mode filters simultaneously used in a link into a same component, effectively reducing board occupation and providing technical assurance for product miniaturization.

[0025] For example, the common-mode filter component may integrate a two-wire common-mode filter or a three-wire common-mode filter, or may integrate and be compatible with implementations of the two-wire common-mode filter and the three-wire common-mode filter.

[0026] A third aspect of embodiments of this application provides a terminal device. The terminal device includes a circuit board, and further includes the common-mode filter or the common-mode filter component. The common-mode filter or the common-mode filter component is electrically connected to the circuit board.

[0027] The terminal device includes the common-mode filter in the embodiment according to the first aspect, can resolve a same technical problem as the common-mode filter in the foregoing technical solution, and achieve same expected effect.BRIEF DESCRIPTION OF DRAWINGS

[0028] FIG. 1 is a diagram of an existing typical three-wire common-mode filter; FIG. 2 is a diagram of a system architecture of a mobile phone terminal according to an embodiment of the present invention; FIG. 3 is a schematic cross-sectional view of a three-wire common-mode filter according to an embodiment of the present invention; FIG. 4 is a diagram of a structure of a winding of the common-mode filter shown in FIG. 3; FIG. 5 is a diagram of pin distribution of the winding of the common-mode filter shown in FIG. 4; FIG. 6 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 3; FIG. 7 is a diagram of a connection manner between an input pin and an input via shown in FIG. 3; FIG. 8 is a diagram of a connection manner of an output pin and an output via shown in FIG. 3; FIG. 9 is a diagram of comparison between modal conversion loss SDC21 curves of the common-mode filter shown in FIG. 3; FIG. 10 is a diagram of a structure of a winding of another three-wire common-mode filter according to an embodiment of the present invention; FIG. 11 is a diagram of pin distribution of the winding of the common-mode filter shown in FIG. 10; FIG. 12 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 10; FIG. 13 is a diagram of a connection manner between an input pin and an input via shown in FIG. 10; FIG. 14 is a diagram of a connection manner of an output pin and an output via shown in FIG. 10; FIG. 15 is a diagram of a structure of a winding of still another three-wire common-mode filter according to an embodiment of the present invention; FIG. 16 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 15; FIG. 17 is a diagram of a connection manner between an input pin and an input via shown in FIG. 15; FIG. 18 is a diagram of a connection manner of an output pin and an output via shown in FIG. 15; FIG. 19 is a diagram of a structure of a winding of another three-wire common-mode filter according to an embodiment of the present invention; FIG. 20 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 19; FIG. 21 is a diagram of a connection manner between an input pin and an input via shown in FIG. 19; FIG. 22 is a diagram of a connection manner of an output pin and an output via shown in FIG. 19; FIG. 23 is a diagram of a structure of a winding of still another three-wire common-mode filter according to an embodiment of the present invention; FIG. 24 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 23; FIG. 25 is a diagram of a connection manner between an input pin and an input via shown in FIG. 23; FIG. 26 is a diagram of a connection manner of an output pin and an output via shown in FIG. 23; FIG. 27 is a diagram of a structure of a winding of another two-wire common-mode filter according to an embodiment of the present invention; FIG. 28 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 27; FIG. 29 is a diagram of a connection manner between an input pin and an input via shown in FIG. 27; FIG. 30 is a diagram of a connection manner of an output pin and an output via shown in FIG. 27; FIG. 31 is a diagram of a structure of still another common-mode filter having a shielding function according to an embodiment of the present invention; FIG. 32 is a diagram of a cutting process of the common-mode filter shown in FIG. 31; FIG. 33 is diagrams of three-wire common-mode filter assemblies according to an embodiment of the present invention; FIG. 34 is diagrams of two-wire common-mode filter assemblies according to an embodiment of the present invention; FIG. 35 is a diagram of a compatible common-mode filter component according to an embodiment of the present invention; and FIG. 36 is a diagram of another compatible common-mode filter component according to an embodiment of the present invention. DESCRIPTION OF EMBODIMENTS

[0029] An embodiment of this application provides a common-mode filter formed based on a process of a PCB (Printed Circuit Board, printed circuit board) technology, to appropriately reduce an insertion loss of a differential-mode signal and differential-mode interference. This can improve an overall noise filtering capability of the common-mode filter.

[0030] FIG. 1 shows a typical common-mode filter formed based on a process of an LTCC (Low Temperature Co-fired Ceramic, low temperature co-fired ceramic) technology. The common-mode filter shown in the figure is a three-wire common-mode filter used for a C-PHY (C-Port physical Layer) standard link. A main body of the common-mode filter includes two parts: a coil and a magnetic core. The magnetic core results in a high insertion loss of a differential-mode signal at a high frequency, affecting transmission efficiency of the C-PHY link. In addition, based on a characteristic of the process of the LTCC technology, an electrode pin (pin) is led out laterally from the main body of the common-mode filter. All pins (pins) implement line connection to a circuit board through connection leads. Electrical lengths between windings differ greatly, leading to poor phase symmetry between the windings. Consequently, a component of common-mode noise that is of the common-mode filter and that is converted to differential-mode noise cannot be effectively controlled, and differential-mode interference is formed.

[0031] In view of this, an embodiment of this application provides a common-mode filter. The common-mode filter includes a substrate made based on a PCB technology, and conductor layers and insulation layers are alternately stacked on the substrate in sequence. In other words, the insulation layers are arranged between the conductor layers, to establish an insulation relationship between the conductor layers and meet a function requirement of coil arrangement. Each winding of the common-mode filter is disposed on the conductor layer, and the winding includes a pin and a coil. The pin is configured on a conductor layer at the bottom, and the coil is configured on a conductor layer located above the pin. Herein, the conductor layer located at the bottom of the substrate is defined as a pin layer, and the conductor layer located above the pin layer is defined as a coil layer, that is, the coil layer is a conductor layer other than the pin layer. A coil body of the winding is formed through winding on the coil layer. An external via is provided in the insulation layer. For each winding of the common-mode filter, a pin is connected to a coil through a corresponding external via.

[0032] Based on the common-mode filter in this embodiment, the coil layer is constructed to increase an inductance value of each winding of the common-mode filter. On the premise of meeting a common-mode suppression requirement, this avoids a magnetic loss caused by using a magnetic core in a conventional technology. In addition, as a carrier, the insulation layer formed based on the PCB technology has a lower dielectric constant and a lower dielectric loss than ceramic blank in an existing LTCC technology. Therefore, this effectively reduces an insertion loss of a differential-mode signal of the common-mode filter, and improves a noise filtering capability of the common-mode filter.

[0033] In addition, in the common-mode filter provided in this solution, the pin layer is located at the bottom of the substrate, and is directly connected to a circuit board. In this way, a pin being laterally led out and connected to the circuit board through a lead does not affect phase symmetry of the winding coils and an electrical length can be conveniently adjusted based on a physical length of the coil arranged on the coil layer, meeting a phase balance requirement of the winding coils. In this way, conversion efficiency between common mode noise and a differential-mode signal is low, so that a component of the common-mode noise converted to differential-mode noise is controlled within a low range. This can reduce differential-mode interference and further improve a noise filtering capability of the common-mode filter.

[0034] In a scenario in which a radio frequency signal and a high-speed differential data transmission module coexist, for example, but not limited to a small-sized mobile terminal device, like a mobile phone, a tablet computer, or a notebook computer. FIG. 2 is a diagram of a system architecture of a mobile phone terminal in which a common-mode filter according to an embodiment of this application is used.

[0035] As shown in FIG. 2, in the system architecture of the mobile phone terminal 100, the common-mode filter 10 is disposed on an MIPI transmission line 40 between a processor 20 and a camera 30, and is configured to suppress common-mode noise on a link for transmitting a differential data signal. A radio frequency antenna 50 is configured on a side of the camera 30. Based on a good noise filtering capability of the common-mode filter 10 provided in this solution, signal transmission quality of the link can be improved, link transmission efficiency can be improved, and impact of radio frequency transmit power can be effectively avoided. This effectively enhances a capability of the camera of the mobile phone to resist interference from a radio frequency antenna signal, and avoids a problem like pattern distortion or blurring generated during use of the camera. Certainly, for a display unit of the mobile phone terminal, the common-mode filter provided in this solution is configured on the MIPI transmission link, so that the capability of the camera of the mobile phone to resist interference from the radio frequency antenna signal can be enhanced, and a problem like blurred display caused by color bleeding, pattern distortion, or the like on a display component of the device is avoided.

[0036] In a terminal device, a D-PHY protocol and a C-PHY protocol are mostly used as data transmission standards. In the D-PHY protocol standard, a two-wire common-mode filter with two windings is used. In the C-PHY protocol standard, a three-wire common-mode filter with three windings is used.

[0037] To better understand the technical solutions and technical effects of this application, without loss of generality, the following separately describes in detail specific embodiments of a two-wire common-mode filter and a three-wire common-mode filter with reference to the accompanying drawings. Refer to FIG. 3 and FIG. 4. FIG. 3 is a schematic cross-sectional view of a three-wire common-mode filter according to an embodiment of the present invention. FIG. 4 is a diagram of a structure of a winding of the common-mode filter shown in FIG. 3.

[0038] As shown in FIG. 3, a substrate of the common-mode filter 10 includes seven conductor layers: a first conductor layer L1, a second conductor layer L2, a third conductor layer L3, a fourth conductor layer L4, a fifth conductor layer L5, a sixth conductor layer L6, and a seventh conductor layer L7. All the conductor layers are stacked in a stacking direction Z, insulation layers m are alternately stacked between the conductor layers in sequence, and adjacent conductor layers are isolated by using an insulation layer. Herein, the first conductor layer L1 is a pin layer, and the second conductor layer L2, the third conductor layer L3, the fourth conductor layer L4, the fifth conductor layer L5, the sixth conductor layer L6, and the seventh conductor layer L7 are coil layers.

[0039] To clearly show a stacking relationship between the conductor layers and the insulation layers of the substrate, thicknesses of the layers shown in FIG. 3 are different from actual thicknesses of the conductor layers of the product, and adjacent insulation layers between which a conductor layer is not configured are jointed, for example, but not limited to a position shown on two sides in FIG. 3. It may be understood that, an interlayer dimensional ratio shown in the figure does not constitute a substantive limitation on the common-mode filter described in this solution.

[0040] As shown in FIG. 4, three windings (1, 2, and 3) of the common-mode filter 10 are separately disposed on all the conductor layers, and are specifically formed by using a PCB technology. During specific implementation, the seven conductor layers may be separately processed on an organic substrate, and corresponding insulation layers are constructed based on the organic substrate.

[0041] Input pins and output pins of the first winding 1, the second winding 2, and the third winding 3 are all configured on the first conductor layer L1 at the bottom. The positional term "bottom" used herein and the positional term "top" used below are defined by using an orientation relationship of the common-mode filter assembled on a circuit board as a description reference, that is, a position on one side facing the circuit board is the bottom, and a position on the other side away from the circuit board is the top. FIG. 5 is a diagram of pin distribution of the winding structure shown in FIG. 4.

[0042] In this implementation solution, a first input pin 12 and a first output pin 13 of the first winding 1, a second input pin 22 and a second output pin 23 of the second winding 2, and a third input pin 32 and a third output pin 33 of the third winding 3 are all spaced apart in a first direction X. The input pins of the three windings are spaced apart in a second direction Y and the output pins of the three windings are spaced apart in the second direction Y. The first input pin 12, the second input pin 22, and the third input pin 32 are all spaced apart in the second direction Y. The first output pin 13, the second output pin 23, and the third output pin 33 are all spaced apart in the second direction Y. By way of example, and not limitation, the input pins are disposed at a same spacing, and the output pins are also disposed at a same spacing, to facilitate appropriate control of phase symmetry of all the windings.

[0043] Certainly, during other specific implementation, a relative position relationship between the input pins and the output pins of all the windings on the pin layer may be arranged according to overall design requirements of different products, and is not limited to an arrangement manner shown in the figure.

[0044] Planar coil bodies of the first winding 1, the second winding 2, and the third winding 3 are all configured on the coil layers located above the pin layer. FIG. 6 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 3.

[0045] In this implementation solution, a first coil 11 of the first winding 1, a second coil 21 of the second winding 2, and a third coil 31 of the third winding 3 are respectively located on different conductor layers.

[0046] Specifically, for the first coil 11 of the first winding, a first coil body 111 is located on the seventh conductor layer L7, and a second coil body 112 is located on the fourth conductor layer L4; for the second coil 21 of the second winding, a first coil body 211 is located on the sixth conductor layer L6, and a second coil body 212 is located on the third conductor layer L3; and for the third coil 31 of the third winding, a first coil body 311 is located on the fifth conductor layer L5, and a second coil body 312 is located on the second conductor layer L2. In this implementation solution, the coil bodies of the first coil 11 are arranged on the seventh conductor layer L7 and the fourth conductor layer L4, the coil bodies of the second coil 21 are arranged on the sixth conductor layer L6 and the third conductor layer L3, and the coil bodies of the third coil 31 are arranged on the fifth conductor layer L5 and the second conductor layer L2. In this way, a distance between winding coils is controlled, to avoid generation of a mutually induced current between windings. This further reduces a possibility of generating electromagnetic interference between the coils, and avoids a loss caused by coupling between the coils.

[0047] To implement electrical connection of planar coil bodies that are of all the winding coils and that are located on different conductor layers, connection vias 4 are correspondingly provided in insulation layers m, and coil bodies of windings with a same name located on the different conductor layers are electrically connected through the connection vias 4. In other words, the first coil body 111 of the first winding on the seventh conductor layer L7 is electrically connected to the second coil body 112 of the first winding on the fourth conductor layer L4 through a corresponding connection via 4; the first coil body 211 of the second winding on the sixth conductor layer L6 is electrically connected to the second coil body 212 of the second winding on the third conductor layer L3 through a corresponding connection via 4; the first coil body 311 of the third winding on the fifth conductor layer L5 is also electrically connected to the second coil body 312 of the third winding on the second conductor layer L2 through a corresponding connection via 4. It may be understood that arrangement positions and structures of all connection vias 4 are adaptively determined based on a winding arrangement form of all planar coil bodies.

[0048] To implement electrical connection between all the winding coils and the input pins and the output pins, external vias are provided in the insulation layers m, and specifically include input vias 5 connected to the input pins and output vias 6 connected to the output pins.

[0049] Specifically, a signal is input to the first coil 11 from the first input pin 12, the first input pin 12 is electrically connected to an input end of the first coil body 111 of the first winding through a corresponding input via 5, and an output end of the second coil body 112 of the first winding is electrically connected to the first output pin 13 through a corresponding output via 6, and the signal is output through the first output pin 13; a signal is input to the second coil 21 from the second input pin 22, the second input pin 22 is electrically connected to an input end of the first coil body 211 of the second winding through a corresponding input via 5, and an output end of the second coil body 212 of the second winding is electrically connected to the second output pin 23 through a corresponding output via 6, and the signal is output through the second output pin 23; a signal is input to the third coil 31 from the third input pin 32, the third input pin 32 is electrically connected to an input end of the first coil body 311 of the third winding through a corresponding input via 5, the second coil body 312 of the third winding is electrically connected to the third output pin 33 through a corresponding output via 6, and the signal is output through the third output pin 33.

[0050] In the three windings, each of the first coil body 111 of the first winding, the first coil body 211 of the second winding, and the first coil body 311 of the third winding is used as an input coil body of an input end of each coil, is located on a top layer of a corresponding winding coil, that is, is a top-layer coil body of a winding coil. An overall structure is more appropriate and compact, and a quantity of configured connection vias 4 can be reduced. This helps improve phase balance performance.

[0051] During specific implementation, the planar coil bodies of all winding coils are continuously winding rectangles, and winding directions are the same. It may be understood that the "winding direction" herein means a direction in which a coil body is wound on a corresponding conductor layer, that is, the coil body is wound clockwise or counterclockwise. An arc-shaped conductor section exists between adjacent straight strip conductor sections, which is specifically formed by using a process of a PCB technology. Details are not described herein again. It should be noted that, a coil body on each conductor layer is arranged in a rectangle formed through winding, and a coating area of the component is fully utilized, to obtain good utilization of a wire winding area of the component. To some extent, this can avoid a loss caused by increasing the inductance value of the winding through addition of the coil layer.

[0052] Herein, the arc-shaped conductor section R at a turn of the rectangle may be determined based on a parameter associated with each winding of an actual product, and a curvature radius or a round corner radius of the arc-shaped conductor section of the coil body of each winding coil may be adjusted as required, to obtain good phase balance through coordinated control of the physical length of the coil body. Compared with a common-mode filter in a conventional solution, the common-mode filter in this solution reduces an overall differential-mode insertion loss by more than 70%.

[0053] FIG. 9 is a diagram of comparison between modal conversion loss SDC21 curves according to an implementation solution of this application. As shown in FIG. 9, SDC21-AB is a curve of a modal conversion loss SCD21 of the second coil 21 and the third winding 3 of a common-mode to differential-mode conversion curve measured based on the first winding 1 and the second winding 2, SDC21-BC is a curve of a modal conversion loss SCD21 of the second coil 21 and the third winding 3 of a common-mode to differential-mode conversion curve measured based on the second winding 2 and a third winding 3, and SDC21-AC is a curve of a modal conversion loss SCD21 of the second coil 21 and the third winding 3 of a common-mode to differential-mode conversion curve measured based on the first winding 1 and the third winding 3. As shown in the figure, in this implementation solution, in a 6 GHz range, a common-mode-to-differential-mode component may be controlled to be less than -30 dB.

[0054] In addition, during other specific implementation, coil bodies of different windings may be arranged with equal coil widths and equal coil spacings, to ensure phase balance of a common-mode filter. This can reduce design difficulty when providing good manufacturability.

[0055] During other specific implementation, the wound coil bodies formed on all conductor layers may be wound for a single turn or spirally wound for a plurality of turns. In addition, a coil body structure in an approximately rectangular winding shape shown in the figure may alternatively be in an elliptical winding shape or a circular winding shape.

[0056] To further improve utilization of the wire winding area, in this implementation solution, the input vias of the three windings are all located inside coils. Refer to a diagram of a connection manner between an input pin and an input via shown in FIG. 7, which is formed from a field of view in a direction A shown in FIG. 4. As shown in the figure, the three input vias 5 (with an overlapping projection relationship) that are respectively electrically connected to the first coil body 111 of the first winding, the first coil body 211 of the second winding, and the first coil body 311 of the third winding are all located inside the coil bodies formed through winding, that is, the input vias are internal vias relative to the coil bodies connected to the input vias. A connection section 7 is configured on each of the first input pin 12, the second input pin 22, and the third input pin 32. The connection section extends from an input pin to a corresponding internal via, to implement electrical connection with a corresponding winding coil. Based on a configuration relationship of the internal via, occupying space at a periphery of a coating layer of the component can be avoided. This further improves utilization of a wire winding area.

[0057] Correspondingly, the output vias of the three windings are all located outside coils. Refer to a diagram of a connection manner of an output pin and an output via shown in FIG. 8, which is formed from a field of view in the direction A shown in FIG. 4. The three output vias 6 (with an overlapping projection relationship) that are respectively electrically connected to the second coil body 112 of the first winding, the second coil body 212 of the second winding, and the second coil body 312 of the third winding are all located outside the coil bodies formed through winding, that is, the output vias are external vias relative to the coil bodies connected to the output vias. The first output pin 13, the second output pin 23, and the third output pin 33 are electrically connected to the corresponding winding coils through the external vias, so that the external vias are respectively electrically connected to the output pins that are spaced apart from corresponding input pins in a first direction Y.

[0058] It may be understood that, in the structure of the winding of the three-wire common-mode filter shown in FIG. 4, the input pins and the output pins of all windings may alternatively be reversely connected to a differential signal line. In other words, functions of an input pin and an output pin of each winding are interchanged (not shown in the figure). In this application connection relationship, all the three input vias are located outside the coils, and all the three output vias are located inside the coils.

[0059] During other specific implementation, the external vias connected to the pins of the windings may alternatively be arranged outside the coils, that is, both the input pins and output pins are electrically connected to the winding coils through the external vias. Refer to FIG. 10 and FIG. 11. FIG. 10 is a diagram of a structure of a winding of another three-wire common-mode filter according to an embodiment of the present invention. FIG. 11 is a diagram of pin distribution of the winding of the common-mode filter shown in FIG. 10. To clearly show differences and relationships between this implementation and the foregoing embodiment, same functional composition or a same functional structure is illustrated by using a same label in the figures.

[0060] In the common-mode filter 10a provided in this implementation solution, a first input pin 12a and a first output pin 13a of a first winding 1a are spaced apart in a first direction X, a second input pin 22a and a second output pin 23a of a second winding 2a are spaced apart in the first direction X, and a third input pin 32a and a third output pin 33a of a third winding 3a are spaced apart in a first direction X. The first input pin 12a, the second input pin 22a, and the third input pin 32a are all sequentially spaced apart in a second direction Y. The first output pin 13a, the second output pin 23a, and the third output pin 33a are all sequentially spaced apart in the second direction Y. This facilitates appropriate control of phase symmetry of all the windings.

[0061] FIG. 12 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 10. In this implementation solution, coil bodies of a first coil 11a are arranged on a fifth conductor layer L5 and a second conductor layer L2, coil bodies of a second coil 21a are arranged on a sixth conductor layer L6 and a third conductor layer L3, and coil bodies of a third coil 31a are arranged on a seventh conductor layer L7 and a fourth conductor layer L4. This can avoid a loss caused by coupling between the coils.

[0062] Similarly, a first coil body 111a of the first winding on the fifth conductor layer L5 is electrically connected to a second coil body 112a of the first winding on the second conductor layer L2 through a corresponding connection via 4a; a first coil body 211a of the second winding on the sixth conductor layer L6 is electrically connected to a second coil body 212a of the second winding on the third conductor layer L3 through a corresponding connection via 4a; and a first coil body 311a of the third winding on the seventh conductor layer L7 is electrically connected to a second coil body 312a of the third winding on the fourth conductor layer L4 through a corresponding connection via 4a.

[0063] A signal is input to the first coil 11a from the first input pin 1a2, the first input pin 12a is electrically connected to an input end of the first coil body 111a of the first winding through a corresponding input via 5a, and an output end of the second coil body 112a of the first winding is electrically connected to the first output pin 13a through a corresponding output via 6a, and the signal is output through the first output pin 13a; a signal is input to the second coil 21a from the second input pin 22a, the second input pin 22a is electrically connected to an input end of the first coil body 211a of the second winding through a corresponding input via 5a, and an output end of the second coil body 212a of the second winding is electrically connected to the second output pin 23a through a corresponding output via 6a, and the signal is output through the second output pin 23a; a signal is input to the third coil 31a from the third input pin 32a, the third input pin 32a is electrically connected to an input end of the first coil body 311a of the third winding through a corresponding input via 5a, the second coil body 312a of the third winding is electrically connected to the third output pin 33 through a corresponding output via 6a, and the signal is output through the third output pin 33a.

[0064] In this implementation solution, both input vias and output vias of the three windings are located outside the coils. Refer to FIG. 13 and FIG. 14. FIG. 13 is a diagram of a connection manner between an input pin and an input via shown in FIG. 10. FIG. 14 is a diagram of a connection manner of an output pin and an output via shown in FIG. 10. The two figures are formed from a field of view in the B direction shown in FIG. 10.

[0065] As shown in FIG. 13, the three input vias 5a (with an overlapping projection relationship) that are respectively electrically connected to the first coil body 111a of the first winding, the first coil body 211a of the second winding, and the first coil body 311a of the third winding are all located outside the coil bodies formed through winding. As shown in FIG. 14, the three output vias 6a (with an overlapping projection relationship) that are respectively electrically connected to the second coil body 112a of the first winding, the second coil body 212a of the second winding, and the second coil body 312a of the third winding are all also located outside the coil bodies formed through winding.

[0066] Based on the common-mode filter 10a provided in this implementation solution, an insertion loss of a differential-mode signal and differential-mode interference can be reduced, and a noise filtering capability can be improved. To increase an inductance value of a winding of the common-mode filter, a coil layer of the winding may be added as required, for example, but not limited to increasing the inductance value by adding one coil body layer to one of the first winding, the second winding, or the third winding.

[0067] Refer to FIG. 15 and FIG. 16. FIG. 15 is a diagram of a structure of a winding of still another three-wire common-mode filter according to an embodiment of the present invention. FIG. 16 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 15. To clearly show differences and relationships between this implementation and the foregoing embodiments in FIG. 3 to FIG. 8, same functional composition or a same functional structure is illustrated by using a same label in the figures.

[0068] A substrate of the common-mode filter 10b provided in this implementation solution includes eight conductor layers. A first conductor layer L1 is a pin layer, and a second conductor layer L2, a third conductor layer L3, a fourth conductor layer L4, a fifth conductor layer L5, a sixth conductor layer L6, a seventh conductor layer L7, and an eighth conductor layer L8 are coil layers. Insulation layers are alternately stacked between the conductor layers in sequence. In comparison with the structure of the winding of the common-mode filter described in FIG. 4, in this implementation solution, one coil layer is added to a first coil 11b of a first winding 1b.

[0069] Specifically, for the first coil 11b of the first winding, a first coil body 111b is located on the eighth conductor layer L8, a second coil body 112b is located on the fifth conductor layer L5, and a third coil body 113b is located on the fourth conductor layer L4; for a second coil 21b of a second winding, a first coil body 211b is located on the seventh conductor layer L7, and a second coil body 212b of the second winding is located on the third conductor layer L3; and for a third coil 31b of a third winding, a first coil body 311b is located on the sixth conductor layer L6, and a second coil body 312b is located on the second conductor layer L2. In comparison with the implementation solution described in FIG. 3, in this implementation solution, one coil body layer is added to a coil of the first winding, to increase an inductance value, further improving strength of common-mode suppression and an effective operating frequency range. It may be understood that the figure shows an example structure. During specific implementation, an actual quantity of coil layers to be added may be determined as required.

[0070] Coil bodies of windings with a same name located on the different conductor layers are electrically connected through connection vias 4b. Similarly, a layout position and a structure of each connection via 4b are adaptively determined based on a winding arrangement form of each planar coil body.

[0071] In this implementation solution, the coil bodies of the first coil 11b are arranged on the eighth conductor layer L8, the fifth conductor layer L5, and the fourth conductor layer L4; the coil bodies of the second coil 21b are arranged on the seventh conductor layer L7 and the third conductor layer L3; and the coil bodies of the third coil 31b are arranged on the sixth conductor layer L6 and the second conductor layer L2. On the basis of increasing an inductance value of the first coil 11b, a loss caused by coupling between the coils can be avoided.

[0072] A signal is input to the first coil 11b from a first input pin 12, the first input pin 12 is electrically connected to an input end of the first coil body 111b of the first winding through a corresponding input via 5b, and an output end of the third coil body 113b of the first winding is electrically connected to a first output pin 13 through a corresponding output via 6b, and the signal is output through the first output pin 13; a signal is input to the second coil 21b from a second input pin 22, the second input pin 22 is electrically connected to an input end of the first coil body 211b of the second winding through a corresponding input via 5b, and an output end of the second coil body 212b of the second winding is electrically connected to a second output pin 23 through a corresponding output via 6b, and the signal is output through the second output pin 23; a signal is input to the third coil 31b from a third input pin 32, the third input pin 32 is electrically connected to an input end of the first coil body 311b of the third winding through a corresponding input via 5b, the second coil body 312b of the third winding is electrically connected to a third output pin 33 through a corresponding output via 6b, and the signal is output through the third output pin 33.

[0073] In this implementation solution, the input vias of the three windings are all located inside the coils, and the output vias of the three windings are all located outside the coils. Refer to FIG. 17 and FIG. 18. FIG. 17 is a diagram of a connection manner between an input pin and an input via shown in FIG. 15. FIG. 18 is a diagram of a connection manner of an output pin and an output via shown in FIG. 15. The two figures are formed from a field of view in the C direction shown in FIG. 15.

[0074] As shown in the figure, the three input vias 5b (with an overlapping projection relationship) that are respectively electrically connected to the first coil body 111b of the first winding, the first coil body 211b of the second winding, and the first coil body 311b of the third winding are all internal vias, improving utilization of a wire winding area; and the three output vias 6b (with an overlapping projection relationship) that are respectively electrically connected to the second coil body 112b of the first winding, the second coil body 212b of the second winding, and the second coil body 312b of the third winding are all external vias, and are respectively electrically connected to output pins that are spaced apart from corresponding input pins in a first direction Y.

[0075] In the implementation solution described in FIG. 15, one intermediate coil layer is added to the first winding 1b, to increase the inductance value. During other specific implementation, n intermediate coil layers may be simultaneously added to the three windings according to an actual requirement, where n≥1. Refer to FIG. 19 and FIG. 20. FIG. 19 is a diagram of a structure of a winding of another three-wire common-mode filter according to an embodiment of the present invention. FIG. 20 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 19. To clearly show differences and relationships between this implementation and the foregoing embodiment in FIG. 15, same functional composition or a same functional structure is illustrated by using a same label in the figures.

[0076] A substrate of the common-mode filter 10c provided in this implementation solution includes ten conductor layers. A first conductor layer L1 is a pin layer, and a second conductor layer L2, a third conductor layer L3, a fourth conductor layer L4, a fifth conductor layer L5, a sixth conductor layer L6, a seventh conductor layer L7, an eighth conductor layer L8, a ninth conductor layer L9, and a tenth conductor layer L10 are coil layers. In comparison with the structure of the winding of the common-mode filter described in FIG. 15, in this implementation solution, one coil layer is added to each of three windings. Insulation layers m that are alternately stacked in sequence are disposed between the conductor layers.

[0077] Specifically, for a first coil 11c of a first winding, a first coil body 111c is located on the tenth conductor layer L10, a second coil body 112c is located on the seventh conductor layer L7, and a third coil body 113c is located on the fourth conductor layer L4; for a second coil 21c of a second winding, a first coil body 211c is located on the ninth conductor layer L9, a second coil body 212c is located on the sixth conductor layer L6, and a third coil body 213c is located on the third conductor layer L3; and for a third coil 31c of a third winding, a first coil body 311c is located on the eighth conductor layer L8, a second coil body 312c is located on the fifth conductor layer L5, and a third coil body 313c is located on the second conductor layer L2. In comparison with the implementation solution described in FIG. 15, in this implementation solution, one coil body layer is added to each of the coils of the first winding 1c, the second winding 2c, and the third winding 3c, to respectively increase a corresponding inductance value. This improves strength of common-mode suppression and an effective operating frequency range according to an overall design requirement of an actual product.

[0078] Coil bodies of windings with a same name located on the different conductor layers are electrically connected through connection vias 4c. Similarly, a layout position and a structure of each connection via 4c are adaptively determined based on a winding arrangement form of each planar coil body.

[0079] In this implementation solution, the coil bodies of the first coil 11c are arranged on the tenth conductor layer L10, the seventh conductor layer L7, and the fourth conductor layer L4; the coil bodies of the second coil 21c are arranged on the ninth conductor layer L9, the sixth conductor layer L6, and the third conductor layer L3; and the coil bodies of the third coil 31c are arranged on the eighth conductor layer L8, the fifth conductor layer L5, and the second conductor layer L2. The coil bodies of all the coils are sequentially spaced apart on different conductor layers, so that good common-mode suppression is obtained by increasing an inductance value of a coil, and a loss caused by coupling between the coils can be avoided.

[0080] A signal is input to the first coil 11c from a first input pin 12, the first input pin 12 is electrically connected to an input end of the first coil body 111c of the first winding through a corresponding input via 5c, and an output end of the third coil body 113c of the first winding is electrically connected to a first output pin 13 through a corresponding output via 6c, and the signal is output through the first output pin 13; a signal is input to the second coil 21c from a second input pin 22, the second input pin 22 is electrically connected to an input end of the first coil body 211c of the second winding through a corresponding input via 5c, and an output end of the third coil body 213c of the second winding is electrically connected to a second output pin 23 through a corresponding output via 6c, and the signal is output through the second output pin 23; a signal is input to the third coil 31c from a third input pin 32, the third input pin 32 is electrically connected to an input end of the first coil body 311c of the third winding through a corresponding input via 5c, the third coil body 313c of the third winding is electrically connected to a third output pin 33 through a corresponding output via 6c, and the signal is output through the third output pin 33.

[0081] In this implementation solution, the input vias of the three windings are all located inside the coils, and the output vias of the three windings are all located outside the coils. Refer to FIG. 21 and FIG. 22. FIG. 21 is a diagram of a connection manner between an input pin and an input via shown in FIG. 19. FIG. 22 is a diagram of a connection manner of an output pin and an output via shown in FIG. 19. The two figures are formed from a field of view in the D direction shown in FIG. 19.

[0082] As shown in the figure, the three input vias 5c (with an overlapping projection relationship) that are respectively electrically connected to the first coil body 111c of the first winding, the first coil body 211c of the second winding, and the first coil body 311c of the third winding are all internal vias, improving utilization of a wire winding area; and the three output vias 6c (with an overlapping projection relationship) that are respectively electrically connected to the second coil body 112c of the first winding, the second coil body 212c of the second winding, and the second coil body 312c of the third winding are all external vias, and are respectively electrically connected to output pins that are spaced apart from corresponding input pins in a first direction Y.

[0083] In the foregoing implementation solutions, an input coil body of each winding is a top-layer coil body in two or three coil bodies. That is, a first coil body connected to an input pin is located on a top layer of conductor layers on which coil bodies are located, and other wound coil bodies are sequentially arranged from top to bottom. This helps optimize an overall wiring structure and avoid an unnecessary loss. During other specific implementation, the input coil body of each winding may alternatively be located at an intermediate layer position. Refer to FIG. 23 and FIG. 24. FIG. 23 is a diagram of a structure of a winding of still another three-wire common-mode filter according to an embodiment of the present invention. FIG. 24 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 23. To clearly show differences and relationships between this implementation and the foregoing embodiment in FIG. 15, same functional composition or a same functional structure is illustrated by using a same label in the figures.

[0084] A substrate of the common-mode filter 10d provided in this implementation solution includes ten conductor layers. In comparison with the structure of the winding of the common-mode filter described in FIG. 19, an input coil body of each of a first winding 1d, a second winding 2d, and a third winding 3d are is located on an intermediate conductor layer.

[0085] Specifically, for a first coil 11d of the first winding, a first coil body 111d is located on a fifth conductor layer L5, a second coil body 112d is located on an eighth conductor layer L8, and a third coil body 113d is located on a second conductor layer L2; for a second coil 21d of the second winding, a first coil body 211d is located on a sixth conductor layer L6, a second coil body 212d is located on a ninth conductor layer L9, and a third coil body 213d is located on a third conductor layer L3; and for a third coil 31d of the third winding, a first coil body 311d is located on a seventh conductor layer L7, a second coil body 312d is located on a tenth conductor layer L10, and a third coil body 313d is located on a fourth conductor layer L4.

[0086] Coil bodies of windings with a same name located on the different conductor layers are electrically connected through connection vias 4d. Similarly, a layout position and a structure of each connection via 4d are adaptively determined based on a winding arrangement form of each planar coil body.

[0087] In comparison with the implementation solution described in FIG. 19, in this implementation solution, an input coil body of each of the first winding 1d, the second winding 2d, and the third winding 3d is located at an intermediate layer position. Certainly, during other specific implementation, the input coil body of each winding may alternatively be located at a bottom layer position, that is, for a multi-layer coil body (a quantity of intermediate coil layers n≥1), an input coil body may be located on any conductor layer below a top-layer coil body of a corresponding winding coil.

[0088] In this implementation solution, the coil bodies of the first coil 11d is arranged on the fourth conductor layer L4, the eighth conductor layer L8, and the second conductor layer L2, and an input coil body of the first coil 11d is located on the fifth conductor layer L5; the coil bodies of the second coil 21d are arranged on the sixth conductor layer L6, the ninth conductor layer L9, and the third conductor layer L3, and an input coil body of the second coil 21d is located on the sixth conductor layer L6; and the coil bodies of the third coil 31d is arranged on the seventh conductor layer L7, the tenth conductor layer L10, and the fifth conductor layer L5, and an input coil body of the third coil 31d is located on the seventh conductor layer L7. Good common-mode suppression is obtained by using an inductance value of a coil, and a loss caused by coupling between the coils can be avoided.

[0089] Specifically, a signal is input to the first coil 11d from a first input pin 12, and the first input pin 12 is electrically connected to the first coil body 111d of the first winding located on the fifth conductor layer L5 through an input via 5d; a signal is input to the second coil 21d from a second input pin 22, and the second input pin 22 is electrically connected to the first coil body 211d of the second winding located on the sixth conductor layer L6 through an input via 5d; a signal is input to the third coil 31d from a third input pin 32, and the third input pin 32 is electrically connected to the first coil body 311d of the third winding located on the seventh conductor layer L7 through an input via 5d. A third coil body of each wound coil is electrically connected to an output pin through a corresponding output via 6d.

[0090] In this implementation solution, the input vias of the three windings are all located inside the coils, and the output vias of the three windings are all located outside the coils. Refer to FIG. 25 and FIG. 26. FIG. 25 is a diagram of a connection manner between an input pin and an input via shown in FIG. 23. FIG. 26 is a diagram of a connection manner of an output pin and an output via shown in FIG. 23. The two figures are formed from a field of view in the E direction shown in FIG. 23.

[0091] As shown in the figure, the three input vias 5d (with an overlapping projection relationship) that are respectively electrically connected to the first coil body 111d of the first winding, the first coil body 211d of the second winding, and the first coil body 311d of the third winding are all internal vias, improving utilization of a wire winding area; and the three output vias 6d (with an overlapping projection relationship) that are respectively electrically connected to the second coil body 112d of the first winding, the second coil body 212d of the second winding, and the second coil body 312d of the third winding are all external vias, and are respectively electrically connected to output pins that are spaced apart from corresponding input pins in a first direction Y.

[0092] The foregoing implementation solutions respectively provide three-wire common-mode filters having seven conductor layers, eight conductor layers, and ten conductor layers. A coil structure configuration with a quantity of intermediate coil layers n≥2 may be alternately stacked in sequence in the foregoing implementation solutions. Details are not described herein again.

[0093] During other specific implementation, a two-wire common-mode filter may be further formed based on a process of a PCB technology. An intermediate layer position at which an input coil body is located may be selected according to an overall design requirement of an actual product. Refer to FIG. 27 and FIG. 28. FIG. 27 is a diagram of a structure of a winding of a two-wire common-mode filter according to an embodiment of the present invention. FIG. 28 is a diagram of distribution of the winding of the common-mode filter shown in FIG. 27.

[0094] A substrate of the common-mode filter 10e includes five conductor layers: a first conductor layer L1, a second conductor layer L2, a third conductor layer L3, a fourth conductor layer L4, and a fifth conductor layer L5. All the conductor layers are stacked in a stacking direction Z. As shown in FIG. 27, the first conductor layer L1 is a pin layer, and the second conductor layer L2, the third conductor layer L3, the fourth conductor layer L4, and the fifth conductor layer L5 are coil layers.

[0095] As shown in FIG. 28, two windings (1e and 2e) of the common-mode filter 10e are separately disposed on all the conductor layers.

[0096] Input pins and output pins of a first winding 1e and a second winding 2e are all configured on the first conductor layer L1 at the bottom. In this implementation solution, a first input pin 12e and a first output pin 13e of the first winding 1e are spaced apart in a first direction X, and a second input pin 22e and a second output pin 23e of the second winding 2e are spaced apart in the first direction X. By way of example, and not limitation, the input pins and output pins of the two windings are disposed at a same spacing; the first input pin 12e and the second input pin 22e are both spaced apart in a second direction Y, and the first output pin 13e and the second output pin 23e are both sequentially spaced apart in the second direction Y. By way of example, and not limitation, the input pins are disposed at a same spacing, and the output pins are also disposed at a same spacing.

[0097] Certainly, a relative position relationship between the input pins and the output pins of the two windings on the pin layer is not limited to an arrangement manner shown in the figure, and may be specifically arranged according to overall design requirements of different products.

[0098] In this implementation solution, a first coil 11e of the first winding 1e and a second coil 21e of the second winding 2e are respectively located on different conductor layers.

[0099] Specifically, for the first coil 11e of the first winding, a first coil body 111e is located on the fifth conductor layer L5, a second coil body 112e is located on the third conductor layer L3; and for the second coil 21e of the second winding, a first coil body 211e is located on the fourth conductor layer L4, and a second coil body 212e is located on the second conductor layer L2. In this implementation solution, the coil bodies of the first coil 11e are arranged on the fifth conductor layer L5e and the third conductor layer L3e, and the coil bodies of the second coil 21e are arranged on the fourth conductor layer L4e and the second conductor layer L2e. This can avoid a loss caused by coupling between the coils.

[0100] In this implementation solution, coil bodies of windings with a same name located on different conductor layers are electrically connected through connection vias 4e. A signal is input to the first coil 11e from the first input pin 12e, and the first input pin 12e is electrically connected to the first coil body 111e of the first winding located on the fifth conductor layer L5 through an input via 5e; a signal is input to the second coil 21e from the second input pin 22e, and the second input pin 22e is electrically connected to the first coil body 211e of the second winding located on the fourth conductor layer L4 through an input via 5e. A third coil body of each wound coil is electrically connected to an output pin through a corresponding output via 6e.

[0101] In this implementation solution, the input vias of the two windings are both located inside the coils, and the output vias of the two windings are both located outside the coils. Refer to FIG. 29 and FIG. 30. FIG. 29 is a diagram of a connection manner between an input pin and an input via shown in FIG. 27. FIG. 30 is a diagram of a connection manner of an output pin and an output via shown in FIG. 27. The two figures are formed from a field of view in the F direction shown in FIG. 27.

[0102] As shown in the figure, the two input vias 5e (with an overlapping projection relationship) that are respectively electrically connected to the first coil body 111e of the first winding and the first coil body 211e of the second winding are both internal vias, improving utilization of a wire winding area; and the two output vias 6e (with an overlapping projection relationship) that are respectively electrically connected to the second coil body 112e of the first winding and the second coil body 212e of the second winding are both external vias, and are respectively electrically connected to output pins that are spaced apart from corresponding input pins in a first direction Y.

[0103] Based on the two-wire common-mode filter provided in this implementation solution, a coil layer is constructed and an inductance value of each winding of the common-mode filter is increased, to meet a common-mode suppression requirement. On this basis, this can avoid a magnetic loss caused by impact of a magnetic core, reduce a dielectric loss, effectively reduce an insertion loss of a differential-mode signal of the common-mode filter, and improve a noise filtering capability.

[0104] During other specific implementation, the input vias and the output vias of the two windings may alternatively be located outside coils. In contrast, the input vias of the two-wire common-mode filter shown in the figure are located inside the coils, and have better utilization of a wire winding area.

[0105] In addition, an existing common-mode filter formed by using an LTCC technology has no shield layer structure, and is susceptible to interference from another component or device, like a radio frequency antenna, in a mobile terminal. An external shield cover occupies an area of a circuit board. In addition, each channel needs to simultaneously use three common-mode filters (C-PHY standard) or two common-mode filters (D-PHY standard). A necessary spacing is reserved between components, further occupying an additional area of the circuit board and affecting product integration.

[0106] Further, for a shield cage 7 that may be made based on a PCB technology, refer to FIG. 31 and FIG. 32. FIG. 31 is a diagram of a structure of a common-mode filter having a shielding function according to an embodiment of the present invention. FIG. 32 is a diagram of a cutting process of the common-mode filter shown in FIG. 31.

[0107] As shown in FIG. 31, a hollow metal layer 71 is formed on the top of a substrate of the common-mode filter 10g, a plurality of ground vias 72 are spaced apart at a periphery of the substrate of the common-mode filter 10g; and a bottom end of each ground via 72 extends to a pin layer of the substrate, namely, a first conductor layer located at the bottom of the substrate, and a top end of each ground via 72 is connected to the hollow metal layer 71, to form the shield cage 7 having a self-shielding function.

[0108] In a process of a technology, the common-mode filter having the shielding function provided in this implementation solution may be implemented by using the following steps: Step 1: Prepare a substrate of a winding coil of the common-mode filter, which may be specifically the substrate of the common-mode filter described in FIG. 2 to FIG. 30. Step 2: Drill ground vias 72 at a spacing at the periphery of the substrate of the winding coil, where the ground via 72 is connected to a ground pin disposed at the bottom of the substrate of the common-mode filter, to be connected to a ground pad 8 of a circuit board through the ground pin. During specific implementation, two or more ground pins may be disposed, and a specific quantity and specific positions of the ground pins may be determined according to an overall design requirement of a product. In addition, the spacing between the ground vias may also be selected according to an implementation requirement. By way of example, and not limitation, the ground vias are arranged at a spacing controlled within 300 um, to obtain good shielding effect. Step 3: Lay the metal shield layer 71 on a top layer of the component, where the metal shield layer 71 is connected to the ground vias located at the periphery, to form a basic structure of the shield cage 7. Step 4: Perform cutting and shaping, to form, at a periphery of the common-mode filter 10g, the ground vias 72 located at the periphery of the substrate.

[0109] Herein, a shaping and cutting trajectory of the common-mode filter 10g passes through at least some of the plurality of ground vias 72. During specific implementation, a cutting trajectory line 11 shown in FIG. 32 may be used to perform cutting. The cutting trajectory line passes through a first ground via 72a and fits against an outer surface of a second ground via 72b. During other specific implementation, a cutting trajectory line l2 shown in FIG. 32 may be alternatively used. Cutting is performed by passing through a second ground via 72b. In this case, a corresponding shield cage structure may also be formed on an outer peripheral surface.

[0110] During specific implementation, the metal shield layer 71 may be printed and formed on a top insulation layer by using the PCB technology, or may be coated on the top insulation layer by using another technology. The metal shield layer 71 may be a complete metal shield layer, or a hollow metal shield layer.

[0111] FIG. 33 shows a mesh-shaped metal shield layer 71a provided in an embodiment of the present invention, and specifically shows five types of mesh copper shield layers of different shapes.

[0112] FIG. 34 shows a PGS metal shield layer 71b provided in an embodiment of the present invention, and specifically shows two PGS forms of different shapes.

[0113] It may be understood that, the metal shield layer 71 is set in a PGS or mesh form, to reduce impact of the shield layer on an inductance value of a winding coil, and ensure that the inductance value of the winding coil meets a requirement to form a required filtering feature. Table 1 shows comparison of common-mode suppression effect among a fully shielded metal shield layer, a mesh copper metal shield layer, and a PGS metal shield layer. Table 1Fully shielded metal shield layerMesh-shaped metal shield layerPGS metal shield layerCommon-mode suppression performanceSignificant impactModerate impactSmall impactShielding effectStrongFairModerate

[0114] Compared with the mesh-shaped metal shield layer, the PGS metal shield layer has weaker shielding effect, but smaller impact on an inductance value, and is a better solution used to ensure a filtering capability. The shield structure formed based on the PCB technology may allow the common-mode filter to have a self-shielding function. The common-mode filter can be widely used in different application scenarios without additional shield cover.

[0115] To further reduce a board area occupied by the common-mode filter, a plurality of common-mode filters may be monolithically integrated, that is, a common-mode filter component is obtained through cutting and depaneling. In this way, this can integrate a plurality of D-PHY or C-PHY common-mode filters simultaneously used in a link into a same component, effectively reducing board occupation and providing technical assurance for product miniaturization.

[0116] FIG. 33 is diagrams of two three-wire common-mode filter assemblies, which may be used in a link using a C-PHY protocol as a data transmission standard.

[0117] In this implementation solution, (a) in FIG. 33 shows a common-mode filter component 10h integrating two three-wire common-mode filters 10-1, and (b) in FIG. 33 shows a common-mode filter component 10i integrating three three-wire common-mode filters 10-1. Each three-wire common-mode filter 10-1 is separated by a dashed line, and every two pins form an input pin and an output pin of one winding coil.

[0118] FIG. 34 is diagrams of two two-wire common-mode filter assemblies, which may be used in a link using a D-PHY protocol as a data transmission standard.

[0119] In this implementation solution, (a) in FIG. 34 shows a common-mode filter component 10j integrating two two-wire common-mode filters 10-2, and (b) in FIG. 34 shows a common-mode filter component 10k integrating three two-wire common-mode filters 10-2.

[0120] During specific implementation, a common-mode filter component that is compatible with the C / D-PHY protocol may be alternatively configured.

[0121] FIG. 35 is a diagram of a compatible common-mode filter component according to an embodiment of the present invention. As shown in (a) in FIG. 35, the common-mode filter component 10m includes nine winding coils 10-1, each with two pins collectively arranged in two rows and nine columns.

[0122] During specific application, the common-mode filter component may be divided as required and used as three-wire common-mode filters or two-wire common-mode filters. For a link according to the C-PHY protocol standard, three three-wire common-mode filters 10m-1 may be formed as shown in dashed boxes in (a) in FIG. 35; for the D-PHY protocol standard link, five two-wire common-mode filters 10m-2 may be formed as shown in dashed boxes in (b) FIG. 35.

[0123] It should be noted that, a quantity and a configuration manner of winding coils on the compatible common-mode filter component may be determined based on actual product application, and are not limited to the nine winding coils shown in the figure.

[0124] FIG. 36 is a diagram of a compatible common-mode filter component according to an embodiment of the present invention. As shown in (a) in FIG. 36, the common-mode filter component 10n includes nine winding coils 10-1, each with two pins collectively arranged in three rows and six columns.

[0125] During specific application, the common-mode filter component may be divided as required and used as three-wire common-mode filters or two-wire common-mode filters. For a link according to the C-PHY protocol standard, three three-wire common-mode filters 10n-1 may be formed as shown in dashed boxes in (a) in FIG. 36; for the D-PHY protocol standard link, five two-wire common-mode filters 10n-2 may be formed as shown in dashed boxes in (b) FIG. 36.

[0126] An embodiment of this application further provides a terminal device. The terminal device includes a circuit board and a common-mode filter. The common-mode filter may be the common-mode filter described in FIG. 3 to FIG. 8 and FIG. 10 to FIG. 30.

[0127] In addition to a mobile terminal device, like a mobile phone, a tablet computer, and a notebook computer, the terminal device may further include a fixed terminal device or a mobile terminal device that includes a common-mode filter, for example, an ultra-mobile personal computer (ultra-mobile personal computer, UMPC), a handheld computer, a two way radio, a netbook, a POS terminal, a personal digital assistant (personal digital assistant, PDA), a wearable device, a smart television, a virtual reality (virtual reality, VR) device, or an augmented reality (augmented reality, AR) device.

[0128] It should be understood that other functions of a corresponding terminal device are not a core invention point of this application. Therefore, details are not described in this specification.

[0129] The above are only the preferred implementations of the present invention, and it should be noted that for a person of ordinary skill in the art, several improvements and modifications may be made without departing from the principle of the present invention, and these improvements and modifications should also be regarded as falling within the protection scope of the present invention.

Claims

1. A common-mode filter, wherein the common-mode filter comprises a substrate made based on a PCB technology, and a plurality of conductor layers and a plurality of insulation layers are alternately stacked on the substrate in sequence; the common-mode filter comprises a plurality of windings, the plurality of windings are disposed on the plurality of conductor layers, the plurality of conductor layers comprise a pin layer and a coil layer, the pin layer is a conductor layer located at the bottom of the substrate, the coil layer is a conductor layer other than the pin layer, each winding comprises a pin and a coil, the pin is located on the pin layer, and the coil is located on the coil layer; and a via is provided in the insulation layer, and in each winding, the pin is connected to the coil through the via.

2. The common-mode filter according to claim 1, wherein the via comprises an input via and an output via, and the pin of each winding comprises an input pin and an output pin; in each winding, the input pin is connected to an input end of the coil through the input via, the output pin is connected to an output end of the coil through the output via, and the input pin and the output pin are spaced apart in a first direction; and the input pins of the plurality of windings are spaced apart in a second direction, and the output pins of the plurality of windings are spaced apart in the second direction, wherein the first direction is different from the second direction.

3. The common-mode filter according to claim 2, wherein one of the input via and the output via of each winding is located inside the coil and the other is located outside the coil.

4. The common-mode filter according to claim 2, wherein the input via and the output via of each winding are both located outside the coil.

5. The common-mode filter according to any one of claims 1 to 4, wherein the coils of the plurality of windings are located on different coil layers.

6. The common-mode filter according to any one of claims 1 to 5, wherein the coil of each winding comprises at least two connected coil bodies, and the coil bodies are respectively located on the different coil layers and are connected through a connection via provided in the insulation layer.

7. The common-mode filter according to claim 6, wherein the coil bodies of the plurality of windings are alternately disposed on the different coil layers.

8. The common-mode filter according to claim 7, wherein in the at least two coil bodies, a coil body forming the input end of the coil is an input coil body, and the input coil body is a top-layer coil body of the coil.

9. The common-mode filter according to claim 7, wherein in the at least two coil bodies, a coil body forming the input end of the coil is an input coil body, and the input coil body is a coil body located below a top-layer coil body of the coil.

10. The common-mode filter according to any one of claims 6 to 9, wherein the coil body of the coil is a rectangle formed through continuously, and an arc-shaped conductor section exists between adjacent straight strip conductor sections.

11. The common-mode filter according to any one of claims 6 to 10, wherein the common-mode filter comprises a first winding and a second winding, and a coil body of the first winding and a coil body of the second winding are alternately disposed on the different coil layers.

12. The common-mode filter according to any one of claims 6 to 10, wherein the common-mode filter comprises a first winding, a second winding, and a third winding, and a coil body of the first winding, a coil body of the second winding, and a coil body of the third winding are alternately disposed on the different coil layers.

13. The common-mode filter according to any one of claims 1 to 12, wherein the common-mode filter comprises a shield cage made based on the PCB technology; the shield cage comprises a metal shield layer formed on the top of the substrate, and a plurality of ground vias spaced apart at a periphery of the substrate; and a bottom end of the ground via extends to the pin layer of the substrate, and a top end of the ground via is connected to the metal shield layer.

14. The common-mode filter according to claim 13, wherein the metal shield layer is a hollow metal shield layer.

15. The common-mode filter according to claim 13 or 14, wherein a shaping and cutting trajectory of the common-mode filter passes through at least some of the plurality of ground vias.

16. A common-mode filter component, wherein the common-mode filter component comprises a substrate made based on a PCB technology, and a conductor layer and an insulation layer are alternately stacked on the substrate in sequence; the common-mode filter component comprises a plurality of windings, and is capable of forming at least two common-mode filters, each winding is disposed on the conductor layer, and the winding comprises a pin and a coil; the pin is configured on a conductor layer at the bottom, and the conductor layer at the bottom is a pin layer; the coil is configured on a conductor layer located above the pin, and the conductor layer located above the pin layer is a coil layer; and an external via is provided in the insulation layer, and the pin is connected to the coil through the external via.

17. The common-mode filter component according to claim 16, wherein the common-mode filter is a two-wire common-mode filter or a three-wire common-mode filter.

18. A terminal device, comprising: a circuit board; and the common-mode filter according to any one of claims 1 to 15, or the common-mode filter component according to claim 16 or 17, wherein the common-mode filter or the common-mode filter component is electrically connected to the circuit board.

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