Method for manufacturing a cmut transducer

Abstract

The present invention relates to a method for manufacturing a cMUT transducer, comprising the following steps: a) forming a first structure comprising a cavity (137) extending in a first silicon oxide layer (133) which coats one face of a first silicon layer (131); b) forming a lower metal electrode (141) of the transducer at the bottom of the cavity; c) forming a second structure comprising a second silicon layer (105); d) after steps a), b) and c), transferring and fixing the second structure onto the first structure by molecular bonding, so as to close the cavity.

Description

DESCRIPTION TITLE: Manufacturing process of a CMUT transducer This application is based on, and claims priority from, French patent application FR2304528 filed on May 5, 2023 and entitled "Method for manufacturing a CMUT transducer", which is considered to be an integral part of this description within the limits provided by law. Technical field

[0001] This description relates generally to the field of ultrasonic transducers, and, more particularly, to that of capacitive membrane ultrasonic transducers, also called CMUT transducers (from the English "Capacitive Micromachined Ultrasonic Transducer"). Prior art

[0002] Conventionally, a CMUT transducer comprises a flexible membrane suspended above a cavity, a first electrode, called the lower electrode, located on the side of the cavity opposite the membrane, and a second electrode, called the upper electrode, located on the side of the cavity opposite the first electrode and mechanically secured to the flexible membrane. In operation, a direct current (DC) bias voltage is applied between the electrodes. When an appropriate alternating current excitation voltage, superimposed on the DC bias voltage, is applied between the electrodes, the flexible membrane vibrates under the effect of the variation in the electrostatic force exerted between the electrodes, resulting in the emission of an ultrasonic acoustic wave. Conversely, when the transducer receives an ultrasonic acoustic wave, the flexible membrane vibrates under the effect of the variation in mechanical pressure, leading to the appearance, between the lower and upper electrodes of the transducer, of an alternating voltage superimposed on the direct polarization voltage, due to the variation in capacitance between the electrodes.

[0003] A CMUT transducer is conventionally coupled to an electronic control circuit configured to, during a transmission phase, apply between the electrodes of the transducer an alternating excitation voltage superimposed on a direct bias voltage, so as to cause the emission of an ultrasonic acoustic wave by the transducer, and, during a reception phase, apply between the electrodes of the transducer a direct bias voltage and read between said electrodes an alternating voltage generated under the effect of a received ultrasonic acoustic wave.

[0004] It would be desirable to have a method for manufacturing a CMUT transducer, this method at least partially overcoming some of the disadvantages of the known methods for manufacturing a CMUT transducer. Summary of the invention

[0005] For this, one embodiment provides a method for manufacturing a CMUT transducer, comprising the following steps: a) forming a first structure comprising a cavity extending in a first layer of silicon oxide coating one face of a first layer of silicon; b) forming a lower metal electrode of the transducer at the bottom of the cavity; c) forming a second structure comprising a second layer of silicon; d) after steps a), b) and c), transferring and fixing the second structure to the first structure by molecular bonding, so as to close the cavity.

[0006] According to one embodiment, the second structure comprises a second layer of silicon oxide coating one face of the second layer of silicon, and, in step d), the second structure is fixed to the first structure by molecular bonding of the second layer of silicon oxide to the first layer of silicon oxide.

[0007] According to one embodiment, the method comprises, before step d), a step of forming an upper metal electrode of the transducer on and in contact with the face of the second silicon oxide layer opposite the second silicon layer.

[0008] According to one embodiment, the second silicon layer is unintentionally doped or has a doping level of less than 1013 atoms / cm 3 .

[0009] According to one embodiment, the second silicon layer has an electrical resistivity greater than 100 Ω cm.

[0010] According to one embodiment, the method comprises, before the formation of the upper metal electrode, a step of forming conductive vias passing through the second silicon layer, the upper metal electrode of the transducer then being formed in contact with the conductive vias.

[0011] According to one embodiment, the second silicon layer has a doping level greater than 10 16 atoms / cm 3 and forms a non-metallic upper electrode of the transducer.

[0012] According to one embodiment, the second silicon layer has an electrical resistivity of less than 0.2 Q.cm and forms a non-metallic upper electrode of the transducer.

[0013] According to one embodiment, in step d), annealing at a temperature between 700 and 1200°C, for example at a temperature of the order of 1100°C, is carried out after the transfer of the second structure onto the first structure.

[0014] According to one embodiment, the lower metal electrode of the transducer is made of a metal having a melting temperature greater than 1100°C, for example greater than 1500°C, for example greater than 1600°C.

[0015] According to one embodiment, the lower metal electrode of the transducer is made of molybdenum, platinum, titanium, tantalum, hafnium, iridium or tungsten.

[0016] According to one embodiment, the method comprises, after step d), a step e) of forming a localized opening in the second silicon layer opposite a peripheral part of the cavity, so as to expose a contact recovery region of the lower metal electrode of the transducer, leading to laterally reopening the cavity.

[0017] According to one embodiment, the method comprises, after step e), a step of forming a sealing plug made of a dielectric material, for example silicon oxide or silicon nitride, at the lateral opening of the cavity formed in step e).

[0018] According to one embodiment, the sealing plug is formed by physical vapor deposition, preferably at a pressure below atmospheric pressure. Brief description of the drawings

[0019] These and other features and advantages will be set forth in detail in the following description of particular embodiments given without limitation in relation to the attached figures, among which:

[0020] Figure 1A, Figure 1B, Figure 1C, Figure 1D, Figure 1E, Figure 1F, Figure 1G, Figure 1H, Figure 1I, Figure 1J, Figure 1K, Figure 1L, Figure 1M, Figure 1N and Figure 10 illustrate steps of an example of a method of manufacturing a CMUT transducer according to one embodiment;

[0021] Figure 2 illustrates an example of a pattern of electrodes of a CMUT transducer of the type described in relation to Figures 1A to 10;

[0022] Figure 3 is an enlarged perspective view of a portion of a CMUT transducer of the type described in connection with Figures 1A to 10;

[0023] Figure 4A, Figure 4B, Figure 4C and Figure 4D illustrate steps of another example of a method of manufacturing a CMUT transducer according to one embodiment; and

[0024] Figure 5 illustrates yet another example of a method of manufacturing a CMUT transducer according to one embodiment. Description of the embodiments

[0025] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0026] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the various applications that the described transducers may have have not been detailed, the described embodiments being compatible with the usual applications of ultrasonic transducers, particularly in ultrasound imaging devices. Furthermore, the control circuits of the described transducers have not been detailed, the described embodiments being compatible with all or most known CMUT transducer control circuits.

[0027] In the present description, unless otherwise specified, a CMUT transducer is a device composed of one or more CMUT transduction elements arranged according to the requirements of the application. Each CMUT transduction element consists of one or more CMUT transduction elementary cells electrically connected to each other, for example in parallel. Each CMUT elementary cell comprises, for example, a single flexible membrane suspended above a cavity, and two opposite electrodes adapted to receive an electrical excitation signal to vibrate the membrane and / or to generate an electrical response signal under the effect of a vibration of the membrane.

[0028] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or be connected by means of one or more other elements.

[0029] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.

[0030] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0031] Figures 1A to 10 illustrate steps of an example of a method for manufacturing a CMUT transducer according to one embodiment. In Figures 1A to 10, the production of a single elementary CMUT transducer cell has been shown. In practice, a large number of cells can be produced simultaneously from the same starting substrate.

[0032] Figures 1A to 1F illustrate successive steps in producing a structure 120 comprising in particular the flexible membrane and the upper electrode of the CMUT transducer.

[0033] Figure 1A illustrates a starting stack of the SOI (Semiconductor On Insulator) type comprising a support substrate 101 made of silicon, a silicon oxide layer 103 covering one face, the lower face in the orientation of Figure 1A, of the substrate 101, and a silicon layer 105 covering the face of the silicon oxide layer 103 opposite the substrate 101. By way of example, each of the layers 103 and 105 extends continuously and with a substantially uniform thickness over the entire surface of the substrate 101. In this example, the substrate 101 is in contact, by its lower face, with the upper face of the layer 103, and the layer 105 is in contact, by its upper face, with the lower face of the layer 103. The substrate 101 corresponds for example to a wafer of silicon or to a portion of a wafer. of silicon.

[0034] The thickness of the substrate 101 is for example between 10 μm and 1 mm, for example between 400 and 800 μm. The thickness of the silicon oxide layer 103 is for example example between 50 nm and 2 pm. The thickness of the silicon layer 105 is for example between 0.2 and 10 pm. The silicon layer 105 is preferably highly resistive. By way of example, the silicon layer 105 has a relatively low doping level, for example less than 10 13 atoms / cm 3 . Layer 105 is for example not intentionally doped. For example, layer 105 has an electrical resistivity greater than 100 Q.cm.

[0035] In this example, the silicon layer 105 corresponds to the future flexible membrane of the transducer.

[0036] Figure 1B illustrates a step of forming, for each elementary cell of the transducer, one or more holes 107 in the silicon layer 105, with a view to forming one or more conductive vias for contact recovery on the upper electrode of the elementary cell of the transducer. In this example, several small holes 107 are formed in a peripheral region of each elementary cell of the transducer.

[0037] Figure 1B, as well as figures 1C, 1D, 1E and 1F described below each comprise a vertical sectional view b) of the structure, and a partial horizontal sectional view a) in a plane between the lower face and the upper face of the silicon layer 105, representing the peripheral region for forming the holes 107.

[0038] In the example shown, nine holes 107 arranged in a matrix in three rows and three columns are formed for each elementary cell of the transducer. The embodiments described are however not limited to this particular arrangement.

[0039] For example, the width of each hole 107 is between 0.5 and 100 pm. The holes have, for example, in viewed from above, a circular, square, rectangular, or polygonal shape.

[0040] The holes 107 are formed from the lower face of the layer 105 and open into the silicon oxide layer 103 or onto the lower face of the silicon oxide layer 103.

[0041] The holes 107 are for example formed by photolithography and etching.

[0042] Figure 1C illustrates a step of forming a silicon oxide layer 109 on the lower face of the structure of Figure 1A. The layer 109 is for example formed by thermal oxidation of the silicon layer 105. Thus, the layer 109 is formed, for example with a substantially constant thickness, on the lower face of the layer 105 and on the side walls of the holes 107. The thickness of the layer 109 is for example between 1 and 20 μm.

[0043] Figure 1D illustrates a step of filling the holes 107 with metal so as to form conductive vias 111. The metal used to fill the holes 107 preferably has a high melting temperature, for example greater than 1100°C, for example greater than 1500°C, for example greater than 1600°C. As a preferred example, the metal used to fill the holes 107 is molybdenum (Mo). As a variant, the metal may be platinum (Pt), titanium (Ti), tantalum (Ta), hafnium (Hf), iridium (Ir) or tungsten (W).The deposition of the metal in the holes 107 can be carried out by physical vapor deposition, for example by cathodic sputtering ("sputter deposition" in English), by electron beam evaporation and electroplating ("e-beam evaporation and electroplating" in English), or by autocatalytic plating ("electroless plating" in English) after formation of a layer of metallic primer located at the bottom and on the walls. lateral holes 107 (for example by full plate deposition then localized etching).

[0044] Figure 1E illustrates a localized etching step, for example by photolithography, of a portion of the thickness of the silicon oxide layer 109, so as to form in the layer 109, in each elementary cell of the transducer, a recess 113 intended to accommodate the upper electrode of the elementary cell. In this example, a portion of the thickness of the layer 109 is kept at the bottom of the recess 113 so as to electrically insulate the future upper electrode from the silicon layer 105.

[0045] In this example, the recess 113 is located mainly in a central part (in bottom view) of the structure, intended to be positioned opposite the future cavity of the elementary cell of the transducer. The recess 113 also extends opposite the peripheral part comprising the vias 111, to allow the resumption of an electrical connection on the upper electrode by means of the vias 111.

[0046] Figure 1F illustrates a step of forming an upper electrode 115 of the transducer, located in the recess 113. In this example, the electrode 115 is metallic. The electrode 115 is for example formed by full wafer deposition then localized etching of a metal layer. In this example, the electrode 115 is entirely located in the recess 113 and has a thickness less than or equal to the depth of the recess 113. Thus, in this example, the lower face of the upper electrode 115 is set back relative to the lower face of the parts of the silicon oxide layer 109 not etched in the step of Figure 1E, or is flush with the lower face of the parts of the silicon oxide layer 109 not etched in the step of Figure 1E. The electrode 115 extends for example over substantially the entire surface of the recess 113 and is in contact, by its upper face, with the lower face of the metal vias 111.

[0047] The metal used to form the electrode preferably has a high melting temperature, for example greater than 1100°C, for example greater than 1500°C, for example greater than 1600°C. The metal used to form the electrode 115 may be the same as or different from the metal used to form the vias 111. As a preferred example, the metal used to form the electrode 115 is molybdenum (Mo). Alternatively, the metal may be platinum (Pt), titanium (Ti), tantalum (Ta), hafnium (Hf), iridium (Ir) or tungsten (W).

[0048] Reference 120 denotes the structure obtained at the end of this step, comprising in particular the upper electrode 115 and the future flexible membrane 105 of the CMUT transducer, as well as conductive vias 115 passing through the membrane 105 and making it possible to connect the electrode 115 to an external control circuit.

[0049] View (a) of Figure 2 illustrates the shape, in this example, seen from below, of the upper electrode 115 of the transducer, corresponding substantially to the shape of the recess 113 formed in the step of Figure 1E.

[0050] Figures 1G to 11I illustrate successive steps in producing a structure 150 including in particular the lower electrode of the CMUT transducer.

[0051] Figure 1G illustrates a step of oxidation of a silicon substrate or layer 131. The substrate 131 corresponds for example to a silicon wafer or to a portion of a silicon wafer. The substrate 131 has for example the same lateral dimensions as the substrate 101. The thickness of the substrate 131 is for example comprised between 10 pm and 1 mm, for example between 400 and 800 pm. The substrate 131 is preferably highly resistive. For example, the substrate 131 has a relatively low doping level, for example less than 10 13 atoms / cm 3 . The substrate 131 is for example not intentionally doped.

[0052] During this step, a layer of silicon oxide 133 is formed on and in contact with the upper face of the substrate 131. The thickness of the layer of silicon oxide 133 is for example between 100 nm and 800 nm. In the example shown, a layer of silicon oxide 135 is further formed on and in contact with the lower face of the substrate 131 during this step.

[0053] Figure 1H illustrates a localized etching step, for example by photolithography and etching, of a portion of the thickness of the silicon oxide layer 133, so as to form in the layer 133, in each elementary cell of the transducer, a recess 137 intended to accommodate the lower electrode of the elementary cell and defining the cavity of the elementary cell.

[0054] In this example, two successive etchings are implemented to form the recess 137, so as to obtain two distinct etching depths in distinct regions of the recess 137. More particularly, during the first etching, a first thickness of the layer 133 is removed over the entire surface of the recess 137, and, during the second etching, one or more portions 139 of the insulating layer 133 in the form of islands are kept intact (i.e. not etched) in a central part of the cavity of the transducer. The portions 139 form mechanical stop pads making it possible to avoid a possible short circuit between the lower and upper electrodes of the transducer in the event of collapse of the flexible membrane.

[0055] In this example, part of the thickness of the layer 133 is kept at the bottom of the recess 137 so as to electrically insulate the future lower electrode from the silicon substrate 131.

[0056] In this example, the recess 137 is located mainly in a central part (in top view) of the structure, intended to be positioned opposite the future cavity of the elementary cell of the transducer. The recess 137 also extends opposite a peripheral part of the transducer, for example located on the side of the cavity opposite the peripheral region comprising the vias 111, to allow the resumption of an electrical contact on the lower electrode of the transducer.

[0057] Figure II illustrates a step of forming a lower electrode 141 of the transducer, located in the recess 137. The electrode extends at the bottom of the recess 137 and is interrupted at the level of the pads 139, that is to say that it laterally surrounds the pads 139. The thickness of the electrode 141 is less than the height of the pads 139. Thus, the upper face of the electrode 141 is set back relative to the upper face of the pads 139, itself set back relative to the upper face of the layer 133 outside the recess 137. In this example, the height of the cavity of the CMUT transducer is defined by the distance between the plane of the upper face of the electrode 141 and the plane of the upper face of the silicon oxide layer 133. The height of the cavity is for example between 10 nm and 1 pm.

[0058] In this example, the electrode 141 is metallic. The electrode 141 is for example formed by full plate deposition then localized etching of a metallic layer. The metal used to form the electrode preferably has a high melting temperature, for example greater than 1100°C, for example greater than 1500°C, for example greater than 1600°C. The metal used to form the electrode 141 may be the same as or different from the metal used to form the lower electrode 115. As a preferred example, the metal used to form the electrode 141 is molybdenum (Mo). Alternatively, the metal may be platinum (Pt), titanium (Ti), tantalum (Ta), hafnium (Hf), iridium (Ir) or tungsten (W).

[0059] The structure obtained at the end of this step is designated by the reference 150, comprising in particular the lower electrode 141 and the recess 137 defining the future cavity of the transducer.

[0060] View (b) of Figure 2 illustrates the shape, in this example, in top view, of the lower electrode 141 of the transducer.

[0061] Figures 1J to 10 are vertical sectional views illustrating successive steps of manufacturing the transducer from the structures 120 and 150 of Figures 1F and II.

[0062] Figure 1J illustrates a step of transferring and fixing the structure 120 of Figure 1F onto the structure 150 of Figure II.

[0063] More particularly, during this step, the structure 120 of FIG. 1F is fixed to the structure 150 by direct bonding or molecular bonding of the lower face of the silicon oxide layer 109 on and in contact with the upper face of the silicon oxide layer 133. This step is preferably carried out under vacuum.

[0064] This closes the cavity 137 of the transducer, the lower 141 and upper 115 electrodes being placed opposite each other inside the cavity, respectively on the side of the lower wall and on the side of the upper wall of the cavity.

[0065] To improve the quality of the bonding, annealing of the structure at a relatively high temperature is preferably provided after the transfer. The annealing is carried out at a temperature lower than the melting temperature of the metals which make up the vias 111, the upper electrode 115 and the lower electrode 141, for example at a temperature between 700 and 1200°C, for example at a temperature of the order of 1100°C. This is called fusion bonding.

[0066] At the end of this step, the transducer cavity is hermetically sealed.

[0067] Figure 1K illustrates a step of removing, for example by grinding and / or etching, the support substrate 101 and the buried silicon oxide layer 103 on the side of the upper face of the assembly. At the end of this step, the upper face of the silicon layer 105, forming the flexible membrane of the transducer, is exposed. The upper face of the vias 111 is also exposed and is flush with the upper face of the layer 105.

[0068] Figure 11 illustrates a step of forming, for example by photolithography and etching, a localized opening 143 in the silicon layer 105, directly above a peripheral contact recovery zone on the lower electrode 141 of the transducer. In the example shown, the etching is interrupted on the upper face of the silicon oxide layer 109.

[0069] Figure 1M illustrates a step of localized removal of the silicon oxide layer 109 at the bottom of the opening 143, so as to expose the upper face of the lower electrode 141 of the transducer in the peripheral zone of resumption of contact. During this step, a through opening 145 is formed in the silicon oxide layer 109 at the bottom of the opening 143. In top view, the surface of the opening 145 is for example less than the surface of the opening 143.

[0070] During this step, the cavity 137 of the transducer, previously hermetically closed in the step of figure 1J, is locally reopened, that is to say that the cavity is put back into contact with the external atmosphere.

[0071] Figure IN illustrates a step of forming a seal or sealing plug 147 made of an electrically insulating material, for example silicon oxide (SiO2) or silicon nitride (SiN x) on the flank of the opening 145 in contact with the cavity 137, and around the junction zone between the central part of the lower electrode 141 located in the cavity of the transducer, and the peripheral contact recovery region of the electrode 141, located outside the cavity. The seal 147 then closes the lateral opening of the cavity formed in the step of FIG. 1M. The material of the seal 147 is preferably deposited under vacuum, that is to say under a pressure lower than atmospheric pressure, so as to obtain a cavity having a pressure lower than atmospheric pressure. The material of the seal 147 is for example deposited by chemical vapor deposition, for example by PE-CVD deposition (from the English “Plasma Enhanced Chemical Vapor Deposition”).For example, the material is first deposited in full plate, over the entire upper face of the structure, then removed locally, for example by photolithography and etching, to be kept only in the vicinity of the lateral opening of the cavity formed in the step of figure IM.

[0072] At the end of this step, the cavity 137 is again hermetically sealed, preferably under a pressure lower than atmospheric pressure.

[0073] Figure 3 is an enlarged perspective view illustrating in more detail the arrangement of the seal 147 in the opening 143.

[0074] Figure 10 illustrates a step of forming, on the side of the upper face of the transducer, electrical connection pads 149 and 151 (not connected to each other) respectively on and in contact with the upper face of the conductive vias 111 and on and in contact with the upper face of the portion of the lower electrode 141 exposed in the step of figure 1M.

[0075] The pads 149 and 151 are thus connected respectively to the upper electrode 115 and to the lower electrode 141 of the CMUT transducer and make it possible to polarize and / or electrically excite the transducer and / or to read electrical signals generated by the transducer.

[0076] The pads 149 are for example metallic, for example made of copper, aluminum, or an alloy based on one or more of these materials. In this example, the pad 149 does not extend over the flexible membrane 105 opposite the central part of the cavity 137 of the CMUT transducer.

[0077] An advantage of the method presented in relation to Figures 1A to 10, 2 and 3 is that it makes it possible to produce a CMUT transducer whose upper and lower electrodes are both metallic, which makes it possible to minimize the access resistance to these electrodes. In particular, this makes it possible to reduce the access resistance compared to CMUT transducers whose electrodes are made of silicon. The use of high melting point metals allows the implementation of a bonding assembly process. fusion, which results in a transducer with great robustness and high reliability. The electrical connection of all the transducer electrodes to an external device can then be made on the same face of the transducer, for example by wire bonding.

[0078] In the example shown, the use of a plurality of small conductive vias 111 surmounted by a connection pad 149 to connect the upper electrode 115 to the exterior, advantageously makes it possible to obtain a stable and robust contact recovery structure.

[0079] Figures 4A-4D are vertical sectional views illustrating steps of another example of a method of manufacturing a CMUT transducer according to one embodiment.

[0080] The method of Figures 4A-4D differs from the method described previously primarily in that, in the example of Figures 4A-4D, the CMUT transducer does not include a top metal electrode within the cavity. In this example, the silicon layer 105 forming the flexible membrane of the transducer is heavily doped and also forms the top electrode of the transducer.

[0081] Figure 4A illustrates a structure corresponding to an SOI-type stack, similar to that of Figure 1A. In this example, the silicon layer 105 is heavily doped. For example, the doping level of the silicon layer 105 is greater than 10 16 atoms / cm 3 , for example greater than or equal to 10 18 atoms / cm 3 . For example, layer 105 has an electrical resistivity of less than 0.2 Q. cm

[0082] Figure 4B illustrates another structure identical or similar to the structure of Figure II and made in substantially the same manner.

[0083] Figure 4C illustrates a step of transferring and fixing the stack of Figure 4A to the structure of Figure 4B.

[0084] More particularly, during this step, the structure of Figure 4A is fixed to the structure of Figure 4B by direct bonding or molecular bonding. The bonding is in this example a direct silicon-to-silicon oxide bonding. More particularly, the lower face of the silicon layer 105 is bonded by direct bonding to and in contact with the upper face of the silicon oxide layer 133.

[0085] This hermetically seals the cavity 137 of the CMUT transducer.

[0086] To improve the quality of the bonding, the bonding is preferably a fusion bonding, i.e. annealing of the structure at a relatively high temperature is planned after the transfer, for example at a temperature between 700 and 1200°C, for example at a temperature of the order of 1100°C.

[0087] The following steps are for example identical or similar to the steps described in relation to figures 1K, IL, IM, IN and 10. It will be noted that in this example, the doped silicon constituting the membrane can optionally be etched to electrically isolate portions of the membrane.

[0088] Figure 4D illustrates the structure obtained at the end of these steps. As illustrated in Figure 4D, in this example, the electrical connection pad 149 of the structure of Figure 10 is replaced by a metal layer 401 extending over and in contact with the upper face of the silicon layer 105. The layer 401 extends for example over the entire surface of the flexible membrane 105 opposite the central part of the cavity 137 of the CMUT transducer.

[0089] Figure 5 is a vertical sectional view illustrating yet another example of a method of manufacturing a CMUT transducer according to one embodiment.

[0090] Figure 5 represents the final structure obtained at the end of the process.

[0091] The method of Figure 5 differs from the method of Figures 4A to 4D mainly in that, in the example of Figure 5, a silicon oxide layer 501 is formed on and in contact with the lower face of the silicon layer 105. The layer 501 is for example formed between the step of Figure 4A and the step of Figure 4C, for example by thermal oxidation of the lower face of the layer 105 of the stack of Figure 4A.

[0092] The bonding implemented in the step of FIG. 4B is then a direct silicon oxide bonding on silicon oxide. More particularly, the lower face of the silicon oxide layer 501 is bonded by direct bonding, preferably by fusion bonding, on and in contact with the upper face of the silicon oxide layer 133.

[0093] The rest of the process is the same or similar to what was described previously.

[0094] Thus, in this example, the silicon oxide layer 501 extends over the entire lower surface of the flexible membrane 105 opposite the lower electrode 141 of the CMUT transducer. This makes it possible to avoid any direct electrical contact between the upper electrode (i.e. the layer 105) and the lower electrode 141 in the event of collapse of the membrane of the CMUT transducer.

[0095] This makes it possible in particular to operate the transducer in a so-called collapsed mode. In this operating mode, a DC bias voltage is applied between the lower and upper electrodes of the transducer such that the flexible membrane collapses, so that the lower face of the silicon oxide layer 501 remains permanently in contact with the upper face of the lower electrode 141 in a central part of the cavity 137 of the CMUT transducer. In this case, the stop pads 139 formed in the cavity 137 can be omitted.

[0096] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art. In particular, the described embodiments are not limited to the examples of materials and dimensions mentioned in the description.

[0097] Furthermore, in the examples described above, the cavity of the CMUT transducer is defined by structuring (recess 137) of the silicon oxide layer 133 coating the upper face of the substrate 131. As a variant, the cavity can be defined by structuring a silicon oxide layer formed on the side of the lower face of the silicon layer 105 forming the flexible membrane of the transducer.

Claims

CLAIMS 1. A method of manufacturing a CMUT transducer, comprising the following steps: a) forming a first structure (150) comprising a cavity (137) extending into a first silicon oxide layer (133) covering one face of a first silicon layer (131); b) forming a lower metal electrode (141) of the transducer at the bottom of the cavity; c) forming a second structure (120) comprising a second silicon layer (105); d) after steps a), b) and c), transferring and fixing the second structure (120) to the first structure (150) by molecular bonding, so as to close the cavity, in which the second structure (120) comprises a second layer of silicon oxide (109) covering one face of the second layer of silicon (105), and in which, in step d), the second structure (120) is fixed to the first structure (150) by molecular bonding of the second layer of silicon oxide (109) to the first layer of silicon oxide (133),the method comprising, before step d), a step of forming an upper metal electrode (115) of the transducer on and in contact with the face of the second silicon oxide layer (109) opposite the second silicon layer (105), the method further comprising, before the formation of the upper metal electrode (115), a step of forming conductive vias (111) passing through the second silicon layer (105), the upper metal electrode, (115) of the transducer then being formed in contact with the conductive vias (111).

2. The method of claim 1, wherein the second silicon layer (105) is unintentionally doped or has a doping level of less than 10 13 atoms / cm 3 .

3. Method according to claim 1 or 2, in which the second silicon layer (105) has an electrical resistivity greater than 100 Q.cm.

4. Method according to any one of claims 1 to 3, in which, in step d), annealing at a temperature between 700 and 1200°C, for example at a temperature of the order of 1100°C, is carried out after the transfer of the second structure (120) onto the first structure (150).

5. Method according to any one of claims 1 to 4, in which the lower metal electrode (141) of the transducer is made of a metal having a melting temperature greater than 1100°C, for example greater than 1500°C, for example greater than 1600°C.

6. A method according to any one of claims 1 to 5, wherein the lower metal electrode (141) of the transducer is made of molybdenum, platinum, titanium, tantalum, hafnium, iridium or tungsten.

7. Method according to any one of claims 1 to 6, comprising, after step d), a step e) of forming an opening (143) located in the second silicon layer (105) opposite a peripheral part of the cavity (137), so as to expose a contact recovery region of the lower metal electrode (141) of the transducer, leading to laterally reopening the cavity (137).

8. Method according to claim 7, comprising, after step e), a step of forming a sealing plug (147) made of a dielectric material, for example silicon oxide or silicon nitride, at the lateral opening of the cavity formed in step e).

9. The method of claim 8, wherein the sealing plug (147) is formed by physical vapor deposition, preferably at subatmospheric pressure.

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