Image display device and video wall having same

Abstract

An image display device and a video wall including the same are disclosed. The image display device includes: a panel including a plurality of light emitting diodes; a driving controller to output a scan signal during each of a plurality of subframe periods, wherein the driving controller includes a buffer to store frame data, wherein in a first mode in which a frame rate or a vertical synchronization signal changes, in response to a frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller is configured to repeat the frame data stored in the buffer and output only some of subframe data within the repeated frame data without outputting another part of the subframe data. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

Description

[Technical Field]

[0001] The present disclosure relates to an image display device and a video wall including the same, and more particularly to an image display device capable of reducing flicker when a frame rate or a vertical synchronization signal changes, and a video wall including the same.[Background Art]

[0002] An image display device is a device with a display that displays images.

[0003] Meanwhile, various types of displays are used in the image display device, including a liquid crystal display panel, a light emitting diode panel, etc.

[0004] Meanwhile, for a light emitting diode panel-based image display device, an active matrix driving scheme or a passive-matrix driving scheme is used in order to drive the light emitting diode panel.

[0005] When driving the light emitting diode panel-based image display device based on the passive-matrix driving scheme, light emitting diodes are made to emit light or not by using a plurality of subframes.

[0006] However, if no light is emitted for a considerable length of time during a plurality of subframes, flicker occurs when an image is output.

[0007] Particularly, there is a drawback in that when a frame rate changes, no light is emitted during some subframe periods within a frame period, causing more severe flicker.[Disclosure of Invention][Technical Problem]

[0008] It is an object of the present disclosure to provide an image display device capable of reducing flicker when a frame rate or a vertical synchronization signal changes, and a video wall including the same.

[0009] It is another object of the present disclosure to provide an image display device capable of easily reducing flicker even though an image output mode changes, and a video wall including the same.

[0010] It is yet another object of the present disclosure to provide an image display device capable of reducing flicker when a frame rate or a vertical synchronization signal changes by outputting a data signal corresponding to a light emitting diode, and a video wall including the same.[Technical Solution]

[0011] In accordance with an aspect of the present disclosure, the above and other objects can be accomplished by providing an image display device including: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein the driving controller includes a buffer configured to store frame data, wherein in a first mode in which a frame rate or a vertical synchronization signal changes, in response to a frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller is configured to repeat the frame data stored in the buffer and to output only some of subframe data within the repeated frame data without outputting another part of the subframe data.

[0012] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, in response to the frequency of the changed vertical synchronization signal exceeding the reference frequency, the driving controller can be configured to output only some of the subframe data within the frame data without outputting another part of the subframe data.

[0013] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, in response to the frequency of the changed vertical synchronization signal being the reference frequency, the driving controller can be configured to output all the subframe data within the frame data.

[0014] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to set a first number of subframe periods in response to the frequency of the changed vertical synchronization signal being less than the reference frequency, and configured to set a second number of subframe periods, less than the first number, in response to the frequency of the changed vertical synchronization signal exceeding the reference frequency.

[0015] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to set subframe periods when the frequency of the changed vertical synchronization signal is less than the reference frequency to be equal to subframe periods in resposne to the frequency of the changed vertical synchronization signal exceeding the reference frequency.

[0016] Meanwhile, in a second mode in which the frame rate or the vertical synchronization signal is constant, the driving controller can be configured to output all the subframe data within the frame data.

[0017] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to prevent a non-emission period from occurring during a plurality of subframe periods within a period between the vertical synchronization signals.

[0018] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to control an interval of the plurality of subframe periods to be constant during the period between the vertical synchronization signals.

[0019] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to control a scanning period of a scan signal to be constant during the period between the vertical synchronization signals.

[0020] Meanwhile, in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller can be configured to prevent a non-emission period from occurring during the plurality of subframe periods within the period between the vertical synchronization signals.

[0021] Meanwhile, in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller can be configured to control an interval of the plurality of subframe periods to be constant during the period between the vertical synchronization signals.

[0022] Meanwhile, in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller can be configured to control a scanning period of a scan signal to be constant during the period between the vertical synchronization signals.

[0023] Meanwhile, in the first mode, the driving controller can be configured to change a number of subframes within a frame according to the frequency of the changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant.

[0024] Meanwhile, the plurality of light emitting diodes can include a red light emitting diode, a green light emitting diode, and a blue light emitting diode, wherein the driving controller can be configured to control a level of a data signal supplied to the red light emitting diode to be less than a level of a data signal supplied to the green light emitting diode or the blue light emitting diode.

[0025] Meanwhile, the image display device according to an embodiment of the present disclosure can further include a signal processing device configured to output an image signal to the display.

[0026] In accordance with another aspect of the present disclosure, the above and other objects can be accomplished by providing an image display device including: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein, in response to an image output mode being a game mode or a variable refresh rate (VRR) mode, the driving controller is configured to change a number of subframes within a frame according to a frequency of a changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant.

[0027] Meanwhile, in response to the image output mode being the game mode or VRR mode and the frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller can be configured to perform frame repeating and subframe cutting.

[0028] Meanwhile, in response to the image output mode being the game mode or the VRR mode and the frequency of the changed vertical synchronization signal exceeding the reference frequency, the driving controller can be configured to perform the subframe cutting.

[0029] Meanwhile, in response to the image output mode being a normal mode, the driving controller can be configured to output each of a scan signal and a data signal corresponding to a constant number of subframes within a frame, based on a constant frequency of the vertical synchronization signal.

[0030] In accordance with yet another aspect of the present disclosure, the above and other objects can be accomplished by providing a video wall including a plurality of image display devices, wherein the image display device includes: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein the driving controller includes a buffer configured to store frame data, wherein in a first mode in which a frame rate or a vertical synchronization signal changes, in response to a frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller is configured to repeat the frame data stored in the buffer and to output only some of subframe data within the repeated frame data without outputting another part of the subframe data.

[0031] In accordance with still another aspect of the present disclosure, the above and other objects can be accomplished by providing a video wall including a plurality of image display devices, wherein the image display device includes: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein, in response to an image output mode being a game mode or a variable refresh rate (VRR) mode, the driving controller is configured to change a number of subframes within a frame according to a frequency of a changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant.[Advantageous Effects]

[0032] An image display device according to an embodiment of the present disclosure includes: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein the driving controller includes a buffer configured to store frame data, wherein in a first mode in which a frame rate or a vertical synchronization signal changes, in response to a frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller is configured to repeat the frame data stored in the buffer and to output only some of subframe data within the repeated frame data without outputting another part of the subframe data. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0033] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, in response to the frequency of the changed vertical synchronization signal exceeding the reference frequency, the driving controller can be configured to output only some of the subframe data within the frame data without outputting another part of the subframe data. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0034] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, in response to the frequency of the changed vertical synchronization signal being the reference frequency, the driving controller can be configured to output all the subframe data within the frame data. Accordingly, image data can be stably output.

[0035] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to set a first number of subframe periods in response to the frequency of the changed vertical synchronization signal being less than the reference frequency, and configured to set a second number of subframe periods, less than the first number, in response to the frequency of the changed vertical synchronization signal exceeding the reference frequency. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0036] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to set subframe periods when the frequency of the changed vertical synchronization signal is less than the reference frequency to be equal to subframe periods in resposne to the frequency of the changed vertical synchronization signal exceeding the reference frequency. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0037] Meanwhile, in a second mode in which the frame rate or the vertical synchronization signal is constant, the driving controller can be configured to output all the subframe data within the frame data. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0038] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to prevent a non-emission period from occurring during a plurality of subframe periods within a period between the vertical synchronization signals. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0039] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to control an interval of the plurality of subframe periods to be constant during the period between the vertical synchronization signals. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0040] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller can be configured to control a scanning period of a scan signal to be constant during the period between the vertical synchronization signals. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0041] Meanwhile, in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller can be configured to prevent a non-emission period from occurring during the plurality of subframe periods within the period between the vertical synchronization signals. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0042] Meanwhile, in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller can be configured to control an interval of the plurality of subframe periods to be constant during the period between the vertical synchronization signals. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0043] Meanwhile, in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller can be configured to control a scanning period of a scan signal to be constant during the period between the vertical synchronization signals. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0044] Meanwhile, in the first mode, the driving controller can be configured to change a number of subframes within a frame according to the frequency of the changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0045] Meanwhile, the plurality of light emitting diodes can include a red light emitting diode, a green light emitting diode, and a blue light emitting diode, wherein the driving controller can be configured to control a level of a data signal supplied to the red light emitting diode to be less than a level of a data signal supplied to the green light emitting diode or the blue light emitting diode. Accordingly, it is possible to output a data signal corresponding to a light emitting diode.

[0046] Meanwhile, the image display device according to an embodiment of the present disclosure can further include a signal processing device configured to output an image signal to the display. Accordingly, a signal-processed image can be displayed.

[0047] An image display device according to another embodiment of the present disclosure includes: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein, in response to an image output mode being a game mode or a variable refresh rate (VRR) mode, the driving controller is configured to change a number of subframes within a frame according to a frequency of a changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0048] Meanwhile, in response to the image output mode being the game mode or VRR mode and the frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller can be configured to perform frame repeating and subframe cutting. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0049] Meanwhile, in response to the image output mode being the game mode or the VRR mode and the frequency of the changed vertical synchronization signal exceeding the reference frequency, the driving controller can be configured to perform the subframe cutting. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0050] Meanwhile, in response to the image output mode being a normal mode, the driving controller can be configured to output each of a scan signal and a data signal corresponding to a constant number of subframes within a frame, based on a constant frequency of the vertical synchronization signal. Accordingly, it is possible to easily reduce flicker even though an image output mode changes.

[0051] A video wall according to an embodiment of the present disclosure includes a plurality of image display devices, wherein the image display device includes: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein the driving controller includes a buffer configured to store frame data, wherein in a first mode in which a frame rate or a vertical synchronization signal changes, in response to a frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller is configured to repeat the frame data stored in the buffer and to output only some of subframe data within the repeated frame data without outputting another part of the subframe data. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.

[0052] A video wall according to another embodiment of the present disclosure includes a plurality of image display devices, wherein the image display device includes: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein, in response to an image output mode being a game mode or a variable refresh rate (VRR) mode, the driving controller is configured to change a number of subframes within a frame according to a frequency of a changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes.[Description of Drawings]

[0053] FIG. 1 is a diagram illustrating a video wall according to an embodiment of the present disclosure; FIG. 2 is an exemplary internal block diagram of the video wall of FIG. 1; FIG. 3 is an exemplary internal block diagram of a signal processing device of FIG. 2; FIG. 4 is an internal block diagram of a display of FIG. 2; FIGS. 5A to 5C are diagrams referred to in the description of a light emitting diode panel of FIG. 4; FIG. 6 is a diagram illustrating an example of the light emitting diode panel of FIG. 4; FIGS. 7A to 8D are diagrams referred to in the description of the operation of an image display device related to the present disclosure; FIG. 9A is a flowchart illustrating a method of operating an image display device according to an embodiment of the present disclosure; FIG. 9B is a flowchart illustrating a method of operating an image display device according to another embodiment of the present disclosure; and FIGS. 10A to 10E are diagrams referred to in the description of FIG. 9A or FIG. 9B. [Best Mode for Carrying Out the Invention]

[0054] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0055] The suffixes "module" and "unit" in elements used in description below are given only in consideration of ease in preparation of the specification and do not have specific meanings or functions. Therefore, the suffixes "module" and "unit" can be used interchangeably.

[0056] FIG. 1 is a diagram illustrating a video wall according to an embodiment of the present disclosure.

[0057] Referring to the drawing, a video wall 10 according to an embodiment of the present disclosure can include a plurality of image display devices 100a to 100d.

[0058] The video wall 10 according to an embodiment of the present disclosure can receive images from a set-top box (not shown), a server (not shown), an internal memory, or the like.

[0059] For example, the video wall 10 can receive an image signal from the set-top box (not shown) through an HDMI terminal.

[0060] In another example, the video wall 10 can receive an image signal from the server (not shown) through a network terminal.

[0061] Meanwhile, the video wall 10 can be installed inside or outside a building.

[0062] For example, the video wall 10 can be provided in public places such as vehicles, bus terminals, railroad stations and airports, in order to provide information such as advertisements, news and notices. In addition, the display device can also be provided near display windows of department stores, shopping malls or markets, for advertisements of specific products.

[0063] In another example, the video wall 10 can be installed on a wall surface in a house.

[0064] The video wall 10 can include a plurality of displays 180a to 180d arranged contiguously.

[0065] Meanwhile, the plurality of displays 180a to 180d can be implemented with any one of various panels. For example, the plurality of displays 180a to 180d can be any one of a liquid crystal display (LCD) panel, an organic light emitting diode (OLED) panel, an inorganic light emitting diode (LED) panel, and the like.

[0066] The following description will be made based on an example in which the plurality of displays 180a to 180d include the inorganic light emitting diode (LED) panel.

[0067] Meanwhile, the inorganic light emitting diode (LED) panel includes light emitting diodes, and is advantageous in that it has a fast response speed and can reproduce colors very well.

[0068] Meanwhile, the plurality of displays 180a to 180d can include a plurality of panels 210a to 210d and bezels Ba to Bd surrounding the panels 210a to 210d, respectively.

[0069] In the drawing, it is illustrated that the video wall 10 includes a plurality of image display devices 100a to 100d including respective displays 180a to 180d.

[0070] Alternatively, for image display of the video wall 10, signal processing devices 170 to 170d provided respectively in the plurality of image display devices 100a to 100d can be used.

[0071] For example, images distributed by the signal processing device 170 can be input into the signal processing devices 170 to 170d provided respectively in the plurality of image display devices 100a to 100d, and images whose image signals are processed by the respective signal processing devices 170 to 170d can be input into the respective displays 180a to 180d, and the respective displays 180a to 180d can display the images.

[0072] Accordingly, a viewer 50 can view the images displayed through the video wall 10 as illustrated in the drawing. Particularly, the viewer can view the images displayed through the plurality of displays 180a to 180d.

[0073] In another example, the video wall 10 can include one signal processing device for commonly controlling the plurality of image display devices 100a to 100d. Accordingly, the common signal processing device can perform signal processing on the displayed image. The processed images can be input to the displays 180a to 180d and the respective displays 180a to 180d can display the images.

[0074] Meanwhile, in the case in which the plurality of displays 180a to 180d include an inorganic light emitting diode panel including light emitting diodes, and the light emitting diodes emit light or not by using a plurality of subframes based on a passive-matrix scheme, flicker can occur when an image is output.

[0075] Particularly, if no light is emitted for a considerable length of time during a plurality of subframes, severe flicker can occur. Particularly, when a frame rate changes, no light is emitted during some subframe periods within a frame period, causing more severe flicker.

[0076] In this regard, the present disclosure adopts a method of outputting only some of subframe data within frame data, without outputting another part of the subframe data. Accordingly, it is possible to reduce flicker when a frame rate or a vertical synchronization signal changes, which will be described in detail with reference to FIG. 9A and subsequent figures.

[0077] FIG. 2 is an exemplary internal block diagram of the video wall of FIG. 1.

[0078] Referring to the drawing, the video wall 10 can include a first to fourth image display devices 100a to 100d.

[0079] For convenience of explanation, it is illustrated in the drawing that second to fourth image display devices 100b to 100d include second to fourth displays 180b to 180d, respectively, and second to fourth signal processing devices 170b to 170d, respectively, but can include an external device interface, a network interface, a memory, an image divider, a power supply, an audio output device, etc., unlike the drawing.

[0080] Meanwhile, a first image display device 100a can include an external device interface 130, a network interface 135, a memory 140, a user input interface 150, a signal processing device 170, a signal processing device 170, a first display 180a, a power supply 190, an audio output device 185, and the like.

[0081] The external device interface 130 can serve to transmit or receive data to or from an external device (not shown) connected thereto. To this end, the external device interface 130 can include an A / V input / output (I / O) device (not shown) or a data input / output module (not shown).

[0082] For example, the external device interface 130 can include an HDMI port, an RGB port, a component port, a USB port, a micro SD port, etc.

[0083] The network interface 135 serves as an interface between the image display device 100 and a wired / wireless network such as the Internet. For example, the network interface 135 can receive content or data provided by an Internet or content provider or a network operator over a network.

[0084] The memory 140 can store various programs necessary for the signal processing device 170 to process and control signals, and can also store processed video, audio and data signals.

[0085] Further, the memory 140 can temporarily store a video, audio and / or data signal received from the external device interface 130.

[0086] Meanwhile, the plurality of displays 180a to 180d can be contiguously arranged, can include various display panels such as LCDs, OLEDs, PDPs, etc., and can display predetermined images through the display panels.

[0087] The user input interface 150 transmits a signal input by a user to the signal processing device 170 or transmits a signal received from the signal processing device 170 to the user.

[0088] To this end, the user input interface 150 can include a local key including a power key, a touch panel for inputting user information, etc.

[0089] The signal processing device 170 can divide an input image stored in the memory 140 or an input image received from an external device through the external device interface 130 or the network interface 135 into a plurality of images, for displaying the input image through the plurality of displays 180a to 180d.

[0090] For example, the signal processing device 170 can crop the input image into a plurality of images and scale the images.

[0091] Particularly, the signal processing device 170 can perform cropping and scaling in consideration of the resolution and size of the plurality of displays 180a to 180d.

[0092] Meanwhile, the signal processing device 170 can perform overall control of the video wall 10, and, more particularly, control operation of the units of the video wall 10.

[0093] Meanwhile, the signal processing device 170 can distribute images and send the distributed images to the plurality of signal processing devices 170 to 170d.

[0094] Meanwhile, at least one signal processing device can be provided in order to control the plurality of displays 180a to 180d.

[0095] Meanwhile, in order to control the plurality of displays 180a to 180d, the plurality of signal processing devices 170 to 170d corresponding to the number of the plurality of displays 180a to 180d are illustrated in the drawing.

[0096] The plurality of signal processing devices 170 to 170d can perform a control operation for image display through the plurality of displays 180a to 180d.

[0097] The plurality of signal processing devices 170 to 170d can process an input image signal and send the processed image signal to the plurality of displays 180a to 180d, respectively.

[0098] That is, each of the plurality of signal processing devices 170 to 170d can control the plurality of displays 180a to 180d to output a predetermined image. More specifically, RGB signals corresponding to a video image to be displayed can be output through the plurality of displays 180a to 180d. Thus, the plurality of displays 180a to 180d can display respective images.

[0099] The power supply 190 can receive external or internal power and supply power necessary for operation of the components.

[0100] The power supply 190 supplies power throughout the image display device 100 and, more particularly, supplies power to the plurality of signal processing devices 170 to 170d implemented in the form of a system on chip (SOC), the plurality of displays 180a to 180d for displaying a video, and the audio output device 185 for outputting audio.

[0101] A temperature sensor (not shown) can detect the temperature of the video wall 10.

[0102] The temperature detected by the temperature sensor (not shown) can be input to at least one of the plurality of signal processing devices 170 to 170d, and at least one of the plurality of signal processing devices 170 to 170d can control the operation of a fan driver (not shown) in order to reduce internal heat based on the detected temperature.

[0103] Meanwhile, the image display device 100A according to an embodiment of the present disclosure can include an image receiver 105, a memory 140, a user input interface 150, a sensor part (not shown), a signal processing device 170, a display 180, and an audio output device 185.

[0104] The image receiver 105 can include a tuner 110, a demodulator 120, a network interface 135, and an external device interface 130.

[0105] Meanwhile, unlike the drawing, the image receiver 105 can include only the tuner 110, the demodulator 120, and the external device interface 130. That is, the network interface 135 can not be included.

[0106] The tuner 110 selects an RF broadcast signal corresponding to a channel selected by a user or all prestored channels among radio frequency (RF) broadcast signals received through an antenna (not shown). In addition, the selected RF broadcast signal is converted into an intermediate frequency signal, a baseband image, or an audio signal.

[0107] For example, if the selected RF broadcast signal is a digital broadcast signal, it is converted into a digital IF signal (DIF). If the selected RF broadcast signal is an analog broadcast signal, it is converted into an analog baseband image or audio signal (CVBS / SIF). That is, the tuner 110 can process a digital broadcast signal or an analog broadcast signal. The analog baseband image or audio signal (CVBS / SIF) output from the tuner 110 can be directly input to the signal processing device 170.

[0108] Meanwhile, the tuner 110 can include a plurality of tuners for receiving broadcast signals of a plurality of channels. Alternatively, a single tuner that simultaneously receives broadcast signals of a plurality of channels is also available.

[0109] The demodulator 120 receives the converted digital IF signal DIF from the tuner 110 and performs a demodulation operation.

[0110] The demodulator 120 can perform demodulation and channel decoding and then output a stream signal TS. In this case, the stream signal can be a demultiplexed signal of an image signal, an audio signal, or a data signal.

[0111] The stream signal output from the demodulator 120 can be input to the signal processing device 170. The signal processing device 170 performs demultiplexing, image / audio signal processing, and the like, and then outputs an image to the display 180 and outputs audio to the audio output device 185.

[0112] The external device interface 130 can transmit or receive data with a connected external apparatus (not shown), e.g., a set-top box 50. To this end, the external device interface 130 can include an A / V input and output unit (not shown).

[0113] The external device interface 130 can be connected by wire or wirelessly to an external device such as a digital versatile disk (DVD), a Blu ray, a game equipment, a camera, a camcorder, a computer (note book), and a set-top box, and can perform an input / output operation with an external device.

[0114] The A / V input and output unit can receive image and audio signals from an external device. Meanwhile, a wireless communication unit (not shown) can perform short-range wireless communication with other electronic devices.

[0115] Through the wireless communication unit (not shown), the external device interface 130 can exchange data with an adjacent mobile terminal 600. Particularly, in a mirroring mode, the external device interface 130 can receive device information, executed application information, application image, and the like from the mobile terminal 600.

[0116] The network interface 135 provides an interface for connecting the image display device 100 to a wired / wireless network including the Internet network. For example, the network interface 135 can receive, via the network, content or data provided by the Internet, a content provider, or a network operator.

[0117] Meanwhile, the network interface 135 can include a wireless communication unit (not shown).

[0118] The memory 140 can store a program for each signal processing and control in the controller 170, and can store a signal-processed image, audio, or data signal.

[0119] In addition, the memory 140 can serve to temporarily store image, audio, or data signal input to the external device interface 130. In addition, the memory 140 can store information on a certain broadcast channel through a channel memory function such as a channel map.

[0120] Although FIG. 2 illustrates that the memory 140 is provided separately from the signal processing device 170, the scope of the present invention is not limited thereto. The memory 140 can be included in the signal processing device 170.

[0121] The user input interface 150 transmits a signal input by the user to the controller 170 or transmits a signal from the controller 170 to the user.

[0122] For example, it can transmit / receive a user input signal such as power on / off, channel selection, screen setting, etc., from a remote controller 200, can transfer a user input signal input from a local key (not shown) such as a power key, a channel key, a volume key, a set value, etc., to the signal processing device 170, can transfer a user input signal input from a sensor device (not shown) for sensing a user's gesture to the signal processing device 170, or can transmit a signal from the signal processing device 170 to the sensor device (not shown).

[0123] The signal processing device 170 can demultiplex the input stream through the tuner 110, the demodulator 120, the network interface 135, or the external device interface 130, or can process the demultiplexed signals to generate and output a signal for image or audio output.

[0124] For example, the controller 170 receives a broadcast signal received by the image receiver 105 or an HDMI signal, and perform signal processing based on the received broadcast signal or the HDMI signal to thereby output a signal-processed image signal.

[0125] The image signal processed by the signal processing device 170 is input to the display 180, and can be displayed as an image corresponding to the image signal. In addition, the image signal processed by the signal processing device 170 can be input to the external output device through the external device interface 130.

[0126] The audio signal processed by the signal processing device 170 can be output to the audio output device 185 as an audio signal. In addition, audio signal processed by the signal processing device 170 can be input to the external output device through the external device interface 130.

[0127] Although not illustrated in FIG. 2, the signal processing device 170 can include a demultiplexer, an image processor, and the like. That is, the signal processing device 170 can perform various signal processing operations, and thus can be implemented in the form of a system on chip (SOC), which will be described later with reference to FIG. 3.

[0128] In addition, the signal processing device 170 can control the overall operation of the image display device 100. For example, the signal processing device 170 can control the tuner 110 to control the tuning of the RF broadcast corresponding to the channel selected by the user or the previously stored channel.

[0129] In addition, the signal processing device 170 can control the image display device 100 according to a user command input through the user input interface 150 or an internal program.

[0130] Meanwhile, the signal processing device 170 can control the display 180 to display an image. In this case, the image displayed on the display 180 can be a still image or a moving image, and can be a 2D image or a 3D image.

[0131] Meanwhile, the signal processing device 170 can display a certain object in an image displayed on the display 180. For example, the object can be at least one of a connected web screen (newspaper, magazine, etc.), an electronic program guide (EPG), various menus, a widget, an icon, a still image, a moving image, and a text.

[0132] Meanwhile, the signal processing device 170 can recognize the position of the user based on the image photographed by a photographing device (not shown). For example, the distance (z-axis coordinate) between a user and the image display device 100 can be determined. In addition, the x-axis coordinate and the y-axis coordinate in the display 180 corresponding to a user position can be determined.

[0133] The display 180 generates a driving signal by converting an image signal, a data signal, an OSD signal, a control signal processed by the signal processing device 170, an image signal, a data signal, a control signal, and the like received from the external device interface 130.

[0134] Meanwhile, the display 180 can be configured as a touch screen and used as an input device in addition to an output device.

[0135] The audio output device 185 receives a signal processed by the signal processing device 170 and outputs it as an audio.

[0136] The photographing device (not shown) photographs a user. The photographing device (not shown) can be implemented by a single camera, but is not limited thereto and can be implemented by a plurality of cameras. Image information photographed by the photographing device (not shown) can be input to the signal processing device 170.

[0137] The signal processing device 170 can sense a gesture of the user based on each of the images photographed by the photographing device (not shown), the signals detected from the sensor device (not shown), or a combination thereof.

[0138] The power supply 190 supplies corresponding power throughout the image display device 100. Particularly, the power can be supplied to the signal processing device 170 which can be implemented in the form of a system on chip (SOC), the display 180 for displaying an image, and the audio output device 185 for outputting an audio.

[0139] Specifically, the power supply 190 can include a converter for converting AC power into DC power, and a DC / DC converter for converting the level of the DC power.

[0140] The remote controller 200 transmits the user input to the user input interface 150. To this end, the remote controller 200 can use Bluetooth, a radio frequency (RF) communication, an infrared (IR) communication, an Ultra Wideband (UWB), ZigBee, or the like. In addition, the remote controller 200 can receive the image, audio, or data signal output from the user input interface 150, and display it on the remote controller 200 or output it as an audio.

[0141] Meanwhile, the image display device 100 can be a fixed or mobile digital broadcasting receiver capable of receiving digital broadcasting.

[0142] Meanwhile, the block diagram of the image display device 100 shown in FIG. 3 is a block diagram for an embodiment of the present disclosure. Each component of the block diagram can be integrated, added, or omitted according to a specification of the image display device 100 actually implemented. That is, two or more components can be combined into a single component as needed, or a single component can be divided into two or more components. The function performed in each block is described for the purpose of illustrating embodiments of the present disclosure, and specific operation and apparatus do not limit the scope of the present disclosure.

[0143] FIG. 3 is an exemplary internal block diagram of a signal processing device of FIG. 2.

[0144] Referring to the drawing, the signal processing device 170 according to an embodiment of the present invention can include a demultiplexer 310, an image processor 320, a processor 330, and an audio processor 370. In addition, the signal processing device 170 can further include a data processor (not shown).

[0145] The demultiplexer 310 demultiplexes the input stream. For example, when an MPEG-2 TS is input, it can be demultiplexed into image, audio, and data signal, respectively. Here, the stream signal input to the demultiplexer 310 can be a stream signal output from the tuner 110, the demodulator 120, or the external device interface 130.

[0146] The image processor 320 can perform signal processing on an input image. For example, the image processor 320 can perform image processing on an image signal demultiplexed by the demultiplexer 310.

[0147] To this end, the image processor 320 can include an image decoder 325, a scaler 335, an image quality processor 635, an image encoder (not shown), an OSD processor 340, a frame rate converter 350, a formatter 360, etc.

[0148] The image decoder 325 decodes a demultiplexed image signal, and the scaler 335 performs scaling so that the resolution of the decoded image signal can be output from the display 180.

[0149] The image decoder 325 can include a decoder of various standards. For example, a 3D image decoder for MPEG-2, H.264 decoder, a color image, and a depth image, and a decoder for a plurality of view image can be provided.

[0150] The scaler 335 can scale an input image signal decoded by the image decoder 325 or the like.

[0151] For example, if the size or resolution of an input image signal is small, the scaler 335 can upscale the input image signal, and if the size or resolution of the input image signal is great, the scaler 335 can downscale the input image signal.

[0152] The image quality processor 635 can perform image quality processing on an input image signal decoded by the image decoder 325 or the like.

[0153] For example, the image quality processor 625 can perform noise reduction processing on an input image signal, extend a resolution of high gray level of the input image signal, perform image resolution enhancement, perform high dynamic range (HDR)-based signal processing, change a video frame rate, perform image quality processing appropriate for properties of a panel, especially a light emitting diode panel, etc.

[0154] The OSD processor 340 generates an OSD signal according to a user input or by itself. For example, based on a user input signal, the OSD processor 340 can generate a signal for displaying various information as a graphic or a text on the screen of the display 180. The generated OSD signal can include various data such as a user interface screen of the image display device 100, various menu screens, a widget, and an icon. In addition, the generated OSD signal can include a 2D object or a 3D object.

[0155] In addition, the OSD processor 340 can generate a pointer that can be displayed on the display, based on a pointing signal input from the remote controller 200. In particular, such a pointer can be generated by a pointing controller, and the OSD processor 240 can include the pointing controller (not shown). Obviously, the pointing controller (not shown) can be provided separately from the OSD processor 240.

[0156] The Frame Rate Converter (FRC) 350 can convert a frame rate of the input image. The frame rate converter 350 can output the image as it is without separate frame rate conversion.

[0157] Meanwhile, the formatter 360 can change a format of an input image signal into a format suitable for displaying the image signal on a display and output the image signal in the changed format.

[0158] In particular, the formatter 360 can change a format of an image signal to correspond to a display panel.

[0159] The processor 330 can control the overall operation of the image display device 100 or the signal processing device 170.

[0160] For example, the processor 330 can control the tuner 110 to control the tuning of an RF broadcast corresponding to a channel selected by a user or a previously stored channel.

[0161] In addition, the processor 330 can control the image display device 100 according to a user command input through the user input interface 150 or an internal program.

[0162] In addition, the processor 330 can control data transmission to the network interface 135 or to the external device interface 130.

[0163] In addition, the processor 330 can control the operation of the demultiplexer 310, the image processor 320, and the like in the signal processing device 170.

[0164] Meanwhile, the audio processor 370 in the signal processing device 170 can perform the audio processing of the demultiplexed audio signal. To this end, the audio processor 370 can include various decoders.

[0165] In addition, the audio processor 370 in the signal processing device 170 can process a base, a treble, a volume control, and the like.

[0166] The data processor (not shown) in the signal processing device 170 can perform data processing of the demultiplexed data signal. For example, when the demultiplexed data signal is a coded data signal, it can be decoded. The encoded data signal can be electronic program guide information including broadcast information such as a start time and an end time of a broadcast program broadcasted on each channel.

[0167] Meanwhile, the block diagram of the signal processing device 170 shown in FIG. 4 is a block diagram for an embodiment of the present disclosure. Each component of the block diagram can be integrated, added, or omitted according to a specification of the signal processing device 170 actually implemented.

[0168] In particular, the frame rate converter 350 and the formatter 360 can be provided separately in addition to the image processor 320.

[0169] FIG. 4 is an internal block diagram of a display of FIG. 2.

[0170] Referring to the drawing, the light emitting diode panel-based display 180 can include a light emitting diode panel 210, a first interface 230, a second interface 231, a timing controller 232, a gate driver 234, a data driver 236, a memory 240, a power supply 290, and the like.

[0171] The display 180 receives an image signal Vd, a first DC power V1, and a second DC power V2, and can display a predetermined image based on the image signal Vd.

[0172] Meanwhile, the first interface 230 in the display 180 can receive the image signal Vd and the first DC power V1 from the signal processing device 170.

[0173] Here, the first DC power V1 can be used for the operation of the power supply 290 and the timing controller 232 in the display 180.

[0174] Next, the second interface 231 can receive a second DC power V2 from an external power supply 190. Meanwhile, the second DC power V2 can be input to the data driver 236 in the display 180.

[0175] The timing controller 232 can output a data driving signal Sda and a gate driving signal Sga, based on the image signal Vd.

[0176] For example, when the first interface 230 converts the input image signal Vd and outputs the converted image signal va1, the timing controller 232 can output the data driving signal Sda and the gate driving signal Sga based on the converted image signal va1.

[0177] The timing controller 232 can further receive a control signal, a vertical synchronization signal Vsync, etc., in addition to the video signal Vd from the signal processing device 170.

[0178] In addition to the video signal Vd, based on a control signal, a vertical synchronization signal Vsync, and the like, the timing controller 232 generates a gate driving signal Sga for the operation of the gate driver 234, and a data driving signal Sda for the operation of the data driver 236.

[0179] In this case, when the panel 210 includes a RGB subpixel, the data driving signal Sda can be a data driving signal for driving of RGB subpixel.

[0180] Meanwhile, the timing controller 232 can further output a control signal Cs to the gate driver 234.

[0181] The gate driver 234 and the data driver 236 supply a scan signal and a data signal to the light emitting diode panel 210 through a gate line GL and a data line DL, respectively, according to the gate driving signal Sga and the data driving signal Sda from the timing controller 232. Accordingly, the light emitting diode panel 210 displays a predetermined image.

[0182] Meanwhile, the light emitting diode panel 210 can include a light emitting layer. In order to display an image, a plurality of gate lines GL and data lines DL can be disposed in a matrix form in each pixel corresponding to the light emitting layer.

[0183] Meanwhile, the gate line GL can be called a scan line since a scan signal is input through it.

[0184] Meanwhile, the data driver 236 can output a data signal to the light emitting diode panel 210 based on a second DC power V2 from the second interface 231.

[0185] The power supply 290 can supply various powers to the gate driver 234, the data driver 236, the timing controller 232, and the like.

[0186] Meanwhile, in the drawing, the timing controller 232, the gate driver 234, and the data driver 236 can be implemented as a single integrated circuit IC.

[0187] Accordingly, the timing controller 232, the gate driver 234, and the data driver 236 can be referred to as a driving controller 285.

[0188] Meanwhile, the driving controller 285 can include a buffer 238 configured to store frame data.

[0189] Particularly, the timing controller 232 in the driving controller 285 can output a gate driving signal and a data driving signal based on the frame data stored in the buffer 238.

[0190] FIGS. 5A to 5C are diagrams referred to in the description of a light emitting diode panel of FIG. 4.

[0191] First, FIG. 5A is a diagram illustrating a pixel in the light emitting diode panel 210.

[0192] Referring to the drawing, the light emitting diode panel 210 can include a plurality of scan lines Scan 1 to Scan n and a plurality of data lines R1, G1, and B1 to Rm, Gm, and Bm intersecting the scan lines.

[0193] Meanwhile, a pixel (subpixel) is defined in an intersecting area of the scan line and the data line in the light emitting diode panel 210. In the drawing, a pixel including sub-pixels SR1, SG1, and SB1 of RGB is shown.

[0194] Meanwhile, a red light emitting diode, a green light emitting diode, and a blue light emitting diode are disposed in the subpixels SR1, SG1, and SB1 of RGB.

[0195] FIG. 5B illustrates a circuit of any one sub-pixel in the pixel of the light emitting diode panel of FIG. 5A.

[0196] Referring to the drawing, a light emitting sub pixel circuit (CRTm) can be of a passive type, and can include only a light emitting diode LED without a separate switching element.

[0197] As illustrated in the drawing, an anode of the light emitting diode LED can be connected to a data line through which a data signal Vdata is input, and a cathode of the light emitting diode LED can be connected to a scan line through which a scan signal Vscan is input.

[0198] Meanwhile, the light emitting diode can emit light or not using a plurality of subframes based on a passive-matrix scheme.

[0199] FIG. 5C is a diagram illustrating an example of a scan signal and data signals.

[0200] Referring to the drawing, a scan signal Vscan applied to each of a red light emitting diode, a green light emitting diode, and a blue light emitting diode maintains LVb level and then drops to LVa level at a scan timing.

[0201] In this case, the width of the scan signal Vscan can be set to Wa.

[0202] Meanwhile, the red light emitting diode can have higher luminance efficiency than the green light emitting diode and the blue light emitting diode because of the device characteristics.

[0203] In response thereto, the driving controller 285 can be configured to control the level of a data signal supplied to the red light emitting diode to be less than the level of a data signal supplied to the green light emitting diode or the blue light emitting diode.

[0204] In (b) of FIG. 5C, a data signal Vdata is illustrated which maintains LVd level and rises to LVc level in response to a scan timing of the scan signal Vscan.

[0205] In (c) of FIG. 5C, a data signal Vdatam is illustrated which maintains LVd level and rises to LVe level which is higher than LVc level in response to a scan timing of the scan signal Vscan.

[0206] The data signal Vdata of LVc level can be applied to the red light emitting diode, and the data signal Vdatam of LVe level which is higher than LVc level can be applied to the green light emitting diode or the blue light emitting diode.

[0207] Accordingly, a data signal corresponding to a light emitting diode can be output, and furthermore uniform colors can be rendered.

[0208] Meanwhile, the data signal Vdatda in (b) of FIG. 5C or the data signal Vdatam in (c) of FIG. 5C is a data signal based on pulse width modulations, and the luminance of the light emitting diodes changes with variations in duty corresponding to pulse width.

[0209] FIG. 6 is a diagram illustrating an example of the light emitting diode panel of FIG. 4.

[0210] Referring to the drawing, the light emitting diode panel 210 can include a plurality of data lines and a plurality of scan lines.

[0211] In FIG. 6, four data lines Data 1 to Data 4 and four scan lines Scan 1 to Scan 4 are illustrated as an example of the light emitting diode panel 210 for convenience of explanation.

[0212] FIGS. 7A to 8D are diagrams referred to in the description of the operation of an image display device related to the present disclosure.

[0213] FIG. 7A illustrates an example of a data signal applied when a frame has a first gray level, during a plurality of subframe periods within a frame period.

[0214] Referring to the drawing, a plurality of subframe periods Subframes 1 to 3 can be included within a frame period Frame 1.

[0215] For convenience of explanation, the plurality of subframe periods Subframes 1 to 3 within the frame period Frame 1 are illustrated in the drawing, but can be variously modified.

[0216] In (a) of FIG. 7A, it is illustrated that data signals Vdata 1 to 4 are respectively applied to the four data lines illustrated in FIG. 6 during a first subframe period Subframe 1 among the plurality of subframe periods Subframes 1 to 3.

[0217] In the drawing, data signals Vdata 1 to 4 each having four pulses or voltages Vx are respectively applied to four data lines during the first subframe period Subframe 1.

[0218] In this case, the pulse width of the data signals Vdata 1 to 4 can be Wx.

[0219] In (b) of FIG. 7A, it is illustrated that scan signals Vscan 1 to 4 are sequentially applied to four scan lines during the first subframe period Subframe 1.

[0220] Accordingly, sixteen light emitting diodes emit light during the first subframe period Subframe 1, as illustrated in (c) of FIG. 7A.

[0221] In (a) of FIG. 7A, it is illustrated that data signals Vdata 1 to 4 are respectively applied to the four data lines illustrated in FIG. 6 during a second subframe period Subframe 2.

[0222] In the drawing, data signals Vdata 1 to 4 each having one pulse or voltage Vx are respectively applied to four data lines during the second subframe period Subframe 2.

[0223] In (b) of FIG. 7A, it is illustrated that scan signals Vscan 1 to 4 are sequentially applied to four scan lines during the second subframe period Subframe 2.

[0224] Accordingly, four light emitting diodes in a diagonal direction emit light during the second subframe period Subframe 2, as illustrated in (c) of FIG. 7A.

[0225] In (a) of FIG. 7A, it is illustrated that data signals Vdata 1 to 4 are respectively applied to the four data lines illustrated in FIG. 6 during a third subframe period Subframe 3.

[0226] In the drawing, data signals Vdata 1 to 4 each having one pulse or voltage Vx are respectively applied to four data lines during the third subframe period Subframe 3.

[0227] In (b) of FIG. 7A, it is illustrated that scan signals Vscan 1 to 4 are sequentially applied to four scan lines during the third subframe period Subframe 3.

[0228] Accordingly, four light emitting diodes in a diagonal direction emit light during the third subframe period Subframe 3, as illustrated in (c) of FIG. 7A.

[0229] FIG. 7B illustrates an example of a data signal applied when a frame has a second gray level which is less than the first gray level, during a plurality of subframe periods within a frame period.

[0230] In (a) of FIG. 7B, it is illustrated that data signals Vdata 1 to 4 each having one pulse or voltage Vx are respectively applied to the four data lines illustrated in FIG. 6 during the first subframe period Subframe 1 among the plurality of subframe periods Subframes 1 to 3, and the pulse or voltage Vx is not applied during the second subframe period Subframe 2 and the third subframe period Subframe 3.

[0231] In (b) of FIG. 7B, it is illustrated that scan signals Vscan 1 to 4 are sequentially applied to four scan lines during the plurality of subframe periods Subframes 1 to 3.

[0232] Accordingly, as illustrated in (c) of FIG. 7B, four light emitting diodes in a diagonal direction emit light during the first subframe period Subframe 1, and all of sixteen light emitting diodes are turned off and emit no light during the second subframe period Subframe 2 and the third subframe period Subframe 3.

[0233] As illustrated in FIG. 7B, when a plurality of light emitting diodes are turned off and emit no light during some periods among the plurality of subframe periods Subframes 1 to 3, a flicker phenomenon can occur.

[0234] FIG. 7C illustrates an on period Pon in which a plurality of light emitting diodes are turned on and an off period Pff in which a plurality of light emitting diodes are turned off, during a frame period Frame 1 between vertical synchronization signals.

[0235] Referring to the drawing, when the frame period Frame 1 is split into an on period Pon in which a plurality of light emitting diodes are turned on and an off period Poff in which a plurality of light emitting diodes are turned off, an image 790 can be displayed on the display as illustrated in the drawing.

[0236] Particularly, the image 790, when perceived by the user's eye, can be split into an area Ara where no flicker occurs and an area Arb where flicker occurs.

[0237] In this case, the area Ara where no flicker occurs can correspond to the on period Pon in which a plurality of light emitting diodes are turned on in the drawing, and the area Arb where flicker occurs can correspond to the off period Poff in which a plurality of light emitting diodes are turned off in the drawing.

[0238] FIG. 8A is a diagram illustrating an image 810 in a first mode in which a frame rate or a vertical synchronization signal Vsync changes.

[0239] The first mode can be a game mode or a variable refresh rate (VRR) mode.

[0240] In the first mode, the frame rate or the frequency of the vertical synchronization signal Vsync can vary within a range of approximately 40 Hz to 144 Hz.

[0241] FIG. 8B is a diagram illustrating an example of a method of displaying an image at various frame rates or vertical synchronization signals Vsync in an active-matrix display.

[0242] Referring to the drawing, the active-matrix display includes a scan switching device, a data switching device, and a storage capacitor in a pixel, such that data signals can be stored, and an image display period can be variable.

[0243] That is, an image 821 is displayed for 1 / 120 seconds at 120 Hz as illustrated in (a) of FIG. 8B; the image 821 is displayed for 1 / 144 seconds at 144 Hz as illustrated in (b) of FIG. 8B; and the image 821 is displayed for 1 / 60 seconds at 60 Hz as illustrated in (c) of FIG. 8B.

[0244] FIG. 8C is a diagram illustrating an example of a method of displaying images at various frame rates or vertical synchronization signals Vsync in a passive-matrix display.

[0245] Referring to the drawing, the passive-matrix display does not include a scan switching device, a data switching device, and a storage capacitor in a pixel circuit, and an image is displayed using only the scan signal and the data signal, such that an image display period is determined by the pulse width of the scan signal.

[0246] FIG. 8C illustrates the case in which the frame rate or the frequency of a vertical synchronization signal Vsync changes when the pulse width of the scan signal is constant.

[0247] Sixteen images 831 can be displayed at 120 Hz during 16 subfield periods as illustrated in (a) of FIG. 8C, 14 images 833 can be displayed during 14 subfield periods as illustrated in (b) of FIG. 8C, and 32 images 835 can be displayed at 60 Hz during 32 subfield periods as illustrated in (c) of FIG. 8C.

[0248] That is, as the frame rate or the frequency of the vertical synchronization signal Vsync increases, the number of subfield periods is reduced, and thus a corresponding number of images can be displayed.

[0249] FIG. 8D is a diagram illustrating another example of a method of displaying images at various frame rates or vertical synchronization signals Vsync in a passive-matrix display.

[0250] Unlike FIG. 8C, FIG. 8D illustrates an example of changing the pulse width of a scan signal with variations in the frame rate or the frequency of the vertical synchronization signal Vsync.

[0251] Specifically, a constant number of subfields are arranged even when the frame rate or the frequency of the vertical synchronization signal Vsync changes.

[0252] That is, FIG. 8D illustrates the case in which the pulse width of a scan signal changes when the frame rate or the frequency of the vertical synchronization signal Vsyn changes.

[0253] Accordingly, 14 images 841 can be displayed at 120 Hz during 14 subfield periods as illustrated in (a) of FIG. 8D, 14 images 843 can be displayed during 14 subfield periods as illustrated in (b) of FIG. 8D, and 14 images 845 can be displayed at 60 Hz during 14 subfield periods as illustrated in (c) of FIG. 8D.

[0254] That is, the number of subfield periods is constant even when the frame rate or the frequency of the vertical synchronization signal Vsync changes, such that a constant number of images are displayed.

[0255] FIG. 8E is a diagram illustrating a driving method when the frame rate or the frequency of a vertical synchronization signal Vsyn is a first frequency and a second frequency.

[0256] FIG. 8E(a) illustrates a light intensity sensor waveform GRax, a subframe waveform GRbx, a vertical synchronization signal input waveform GRcx, and a vertical synchronization signal output waveform GRdx, when the frame rate or the frequency of the vertical synchronization signal Vsync is the first frequency.

[0257] FIG. 8E(b) illustrates a light intensity sensor waveform GRay, a subframe waveform GRby, a vertical synchronization signal input waveform GRcy, and a vertical synchronization signal output waveform GRdy, when the frame rate or the frequency of the vertical synchronization signal Vsync is the second frequency.

[0258] In this case, the first frequency can be 120 Hz, and the second frequency can be 70 Hz.

[0259] In the case where frame data and subframe data in the frame data are generated based on the first frequency, subframes can be arranged at regular intervals as shown in the subframe waveform GRbx of (a) of FIG. 8E, but if the frequency is changed to the second frequency, a period occurs in which arrangement of subframes within the frame data is omitted.

[0260] Accordingly, in the light intensity sensor waveform Gray of (b) of FIG. 8E, a period in which an amount of light decreases occurs after the period in which arrangement of subframes is omitted. There is a drawback in that flicker occurs due to the period in which an amount of light decreases.

[0261] Accordingly, the present disclosure proposes a method of reducing flicker when the frame rate or the frequency of the vertical synchronization signal Vsync changes, which will be described below with reference to FIG. 9A and subsequent figures.

[0262] FIG. 9A is a flowchart illustrating a method of operating an image display device according to an embodiment of the present disclosure.

[0263] Referring to the drawing, in response to an image output mode being a normal mode (S910), a driving controller 285 in the image display device 100 according to an embodiment of the present controls operation at a constant frame rate (S913).

[0264] For example, in response to the image output mode being the normal mode, the driving controller 285 can output a scan signal and a data signal based on a constant frame rate.

[0265] Specifically, in response to the image output mode being the normal mode, the driving controller 285 can output a scan signal and a data signal based on 60 Hz as an example of a constant frame rate.

[0266] Meanwhile, in response to the image output mode not being the normal mode in operation 910 (S910), the driving controller 285 can determine whether the image output mode is a game mode or a variable refresh rate (VRR) mode (S915), and if so, the driving controller 285 can vary the frame rate (S920).

[0267] In response to the image output mode being the game mode or the VRR mode, the driving controller 285 can vary the frame rate or the frequency of the vertical synchronization signal Vsync within a range of approximately 40 Hz to 144 Hz.

[0268] Then, the driving controller 285 determines whether a range of the changed frame rate is a first range (S923).

[0269] In this case, the first range can correspond to a case in which the frequency of the vertical synchronization signal Vsync is in a range of approximately 40 Hz to 60 Hz.

[0270] Then, in response to the frame rate or the frequency of the vertical synchronization signal Vsync being within the first range, the driving controller 285 performs frame repeating or subframe cutting (S926).

[0271] Meanwhile, in response to a range of the changed frame rate not being the first range in operation 923 (S923), the driving controller 285 determines whether the range is a second range (S930), and if so, performs subframe cutting while omitting frame repeating (S933).

[0272] In this case, the second range can correspond to a case in which the frequency of the vertical synchronization signal Vsync is in a range of approximately 60 Hz to 144 Hz.

[0273] Meanwhile, operation 923 (S923) can have the same meaning as determining whether the frequency of the vertical synchronization signal Vsync is less than a reference frequency.

[0274] Meanwhile, operation 930 (S930) can have the same meaning as determining whether the frequency of the vertical synchronization signal Vsync exceeds the reference frequency.

[0275] Meanwhile, the frame repeating can refer to an operation of repeatedly outputting frame data.

[0276] The subframe cutting can refer to an operation of outputting only some of a plurality of subframe data within the frame data without outputting another part of the subframe data.

[0277] In the first mode in which the frame rate or the vertical synchronization signal Vsync changes, in response to the frequency of the vertical synchronization signal Vsync being less than the reference frequency, the driving controller 285 in the image display device 100 repeats frame data stored in a buffer 2238 and outputs only some of the subframe data within the repeated frame data without outputting another part of the subframe data.

[0278] That is, based on operation 926 (S926), the driving controller 285 performs frame repeating and subframe cutting.

[0279] Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0280] In this case, the first mode can be the game mode or the VRR mode.

[0281] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, in response to the frequency of the vertical synchronization signal Vsync exceeding a reference frequency, the driving controller 285 can output only some of the subframe data within the frame data without outputting another part of the subframe data.

[0282] That is, the driving controller 285 can perform frame repeating and subframe cutting based on operation 933 (S933).

[0283] Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0284] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, in response to the frequency of the changed vertical synchronization signal Vsync exceeding the reference frequency, the driving controller 285 can output all the subframe data within the frame data.

[0285] For example, the reference frequency can be 60 Hz.

[0286] Specifically, in response to the frequency of the changed vertical synchronization signal Vsync being 60 Hz which is the reference frequency, the driving controller 285 can output all the subframe data within the frame data without performing subframe cutting. Accordingly, an image can be displayed without flickering when the vertical synchronization signal Vsync changes.

[0287] Meanwhile, in the first mode, the driving controller 285 can vary the number of subframes within a frame according to the frequency of the changed vertical synchronization signal Vsync, while controlling the interval of a plurality of subframe periods to be constant.

[0288] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, the driving controller 25 can be configured to set a first number of subframe periods in response to the frequency of the changed vertical synchronization signal Vsync being less than the reference frequency, and configured to set a second number of subframe periods, less than the first number, in response to the frequency of the changed vertical synchronization signal Vsync exceeding the reference frequency.

[0289] For example, the driving controller 285 can be configured to set 48 subframe periods in response to the frequency of the changed vertical synchronization signal Vsync being 45 Hz which is less than the reference frequency, and configured to set 16 subframe periods in response to the frequency of the changed vertical synchronization signal Vsync being 120 Hz which exceeds the reference frequency.

[0290] Meanwhile, as illustrated in FIG. 8C, the driving controller 285 can be configured to set 32 subframe periods in response to the frequency of the changed vertical synchronization signal Vsync being 60 Hz which is the reference frequency, and configured to set 14 subframe periods in response to the frequency of the changed vertical synchronization signal Vsync being 1440 Hz which exceeds the reference frequency.

[0291] Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0292] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, the driving controller 285 can set subframe periods when the frequency of the changed vertical synchronization signal Vsync is less than the reference frequency to be equal to subframe periods when the frequency of the changed vertical synchronization signal Vsync exceeds the reference frequency.

[0293] For example, the driving controller 285 can be configured to set 48 subframe periods so that each subframe period can be a first period in response to the frequency of the changed vertical synchronization signal Vsync being 45 Hz which is less than the reference frequency, and configured to set 16 subframe periods so that each subframe period can be the first period in response to the frequency of the changed vertical synchronization signal Vsync being 120 Hz which exceeds the reference frequency.

[0294] Meanwhile, as illustrated in FIG. 8C, the driving controller 285 can be configured to set 32 subframe periods so that each subframe period can be the first period in response to the frequency of the changed vertical synchronization signal Vsync being 60 Hz which is the reference frequency, configured to set 16 subframe periods so that each subframe period can be the first period in response to the frequency of the changed vertical synchronization signal Vsync being 120 Hz which exceeds the reference frequency, and configured to set 14 subframe periods so that each subframe period can be the first period in response to the frequency of the changed vertical synchronization signal Vsync being 1440 Hz which exceeds the reference frequency.

[0295] Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0296] Meanwhile, in a second mode in which the frame rate or the vertical synchronization signal Vsync is constant, the driving controller 285 can output all the subframe data within the frame data. In this case, the second mode can be a normal mode.

[0297] Meanwhile, in response to an image output mode being a normal mode, the driving controller 285 can set the frame rate or the frequency of the vertical synchronization signal Vsync to a reference frequency, and can generate and output frame data.

[0298] That is, in response to the image output mode being the normal mode, the driving controller 285 can set 32 subframe periods corresponding to the reference frequency of 60 Hz, so that each subframe period can be the first period. Accordingly, image data can be stably output.

[0299] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, the driving controller 285 can prevent a non-emission period from occurring during a plurality of subframe periods within a period between the vertical synchronization signals Vsync. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0300] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, the driving controller 285 can control the interval of the plurality of subframe periods to be constant during the period between the vertical synchronization signals Vsync. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0301] Meanwhile, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, the driving controller 285 can control a scanning period of a scan signal to be constant during the period between the vertical synchronization signals Vsync. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0302] FIG. 9B is a flowchart illustrating a method of operating an image display device according to another embodiment of the present disclosure.

[0303] Referring to the drawing, in response to an image output mode being a normal mode (S960), the driving controller 285 in the image display device 100 according to an embodiment of the present disclosure controls operation at a constant frequency of the vertical synchronization signal Vsync (S965).

[0304] For example, in response to the image output mode being the normal mode, the driving controller 285 can output a scan signal and a data signal based on the vertical synchronization signal Vsync of 60 Hz as an example of a constant frame rate. In this case, a pulse width of the scan signal can be at a first level.

[0305] Meanwhile, in response to the image output mode not being the normal mode in operation 960 (S960), the driving controller 285 can determine whether the image output mode is the game mode or the VRR mode (S970), and if so, the driving controller 285 can change the frequency of the vertical synchronization signal Vsync while controlling a period of the scan signal to be constant (S975).

[0306] In response to the image output mode being the game mode or the VRR mode, the driving controller 285 can vary the frame rate or the frequency of the vertical synchronization signal Vsync within a range of approximately 40 Hz to 144 Hz.

[0307] In response thereto, when changing the frequency of the vertical synchronization signal Vsync, the driving controller 285 can vary the number of subframes as illustrated in FIG. 8C.

[0308] Further, when changing the frequency of the vertical synchronization signal Vsync, the driving controller 285 can control the period of the scan signal to be constant.

[0309] That is, when changing the frequency of the vertical synchronization signal Vsync, the driving controller 285 can control the interval of scan signals or the interval of subframes to be constant. Accordingly, the period of the scan signal can be constant.

[0310] In this case, the second range can correspond to a case in which the frequency of the vertical synchronization signal Vsync is approximately greater than 60 Hz and less than or equal to 144 Hz. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal changes.

[0311] FIGS. 10A to 10E are diagrams referred to in the description of FIG. 9A or FIG. 9B.

[0312] FIG. 10A is an exemplary internal block diagram of a driving controller for changing a frame rate.

[0313] Referring to the drawing, the driving controller 285 can include a controller 1010 configured to output pixel data and starting point information of a vertical synchronization signal based on image data SGa with the frame rate or the frequency of the vertical synchronization signal Vsync changing between 40 Hz and 144 Hz, and a data output unit 1020 configured to output corresponding image data SGd based on the pixel data and the starting point information.

[0314] Meanwhile, the image data SGa that changes between 40 Hz and 144 Hz can be image data received from the signal processing device 170.

[0315] For example, the signal processing device 170 can output image data based on 60 Hz in response to an image output mode being a normal mode.

[0316] In another example, in response to the image output mode being a game mode or a VRR mode, the signal processing device 170 can output image data SGa based on 40 Hz to 144 Hz.

[0317] The controller 1010 can receive the image data SGa based on 40 Hz to 144 HZ, and can output pixel data SGb based on 144 Hz, which is the highest frequency, for image quality processing.

[0318] Meanwhile, the controller 1010 can further output a clock signal of based on 144 Hz which is the highest frequency.

[0319] Meanwhile, in response to changing the frame rate between 40 Hz to 144 Hz, the controller 1010 can output starting point information SGc of the changed vertical synchronization signal.

[0320] The data output unit 1020 can output image data SGd based on the reference frequency of 60 Hz, by using the pixel data SGb and the starting point information SGc of the vertical synchronization signal.

[0321] In this case, in response to the image output mode being the game mode or the VRR mode, driving controller 285 can vary the number of subframes within a frame according to the frequency of the changed vertical synchronization signal Vsync, while controlling the interval of the plurality of subframe periods to be constant.

[0322] FIG. 10B is a diagram illustrating an example of subframe data that is output when an image output mode is a game mode or a VRR mode.

[0323] In (a) of FIG. 10B, an example is illustrated in which a frequency of the vertical synchronization signal Vsync changes between 40 Hz to 144 Hz.

[0324] Meanwhile, in response to the image output mode being the game mode or the VRR mode and the frequency of the variable vertical synchronization signal Vsync being less than a reference frequency, the driving controller 285 can perform frame repeating and subframe cutting.

[0325] In response to the frequency of the vertical synchronization signal Vsync being greater than or equal to 40 Hz and less than 60 Hz which is less than the reference frequency as illustrated in (b) of FIG. 10B, the driving controller 285 can arrange frame data FRa and copied repeated frame data FRa2 between two vertical synchronization signals Vsync.

[0326] In addition, the driving controller 285 can output some of the repeated frame data FRa2 arranged within a second vertical synchronization signal Vsync, without outputting another part of the repeated frame data FRa2 which is arranged outside the second vertical synchronization signal Vsync.

[0327] Meanwhile, in response to the image output mode being the game mode or the VRR mode and the frequency of the changed vertical synchronization signal Vsync being the reference frequency, the driving controller 285 can output all the subframe data within the frame data.

[0328] In response to the frequency of the vertical synchronization signal Vsync being 60Hz which is the reference frequency as illustrated in (c) of FIG. 10B, the driving controller 285 can arrange frame data FRb between the two vertical synchronization signals Vsync based on the starting point information SGc of the vertical synchronization signal.

[0329] The data output unit 1020 outputs the image data SGd based on the reference frequency of 60 Hz, such that the driving controller 285 can output all the plurality of subframe data within the frame data FRb.

[0330] Meanwhile, in response to the image output mode being the game mode or the VRR mode and the frequency of the variable vertical synchronization signal Vsync exceeding the reference frequency, the driving controller 285 can perform subframe cutting.

[0331] In response to the frequency of the vertical synchronization signal Vsync being greater than 60Hz and less than or equal to 144 Hz which exceeds the reference frequency, the driving controller 285 can arrange frame data FRc between the two vertical synchronization signals Vsync by using the starting point information SGc of the vertical synchronization signal, as illustrated in (d) of FIG. 10B.

[0332] In addition, the driving controller 285 can output some of the frame data FRc arranged within a second vertical synchronization signal Vsync, without outputting another part of the frame data FRc which is arranged outside the second vertical synchronization signal Vsync.

[0333] Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal changes.

[0334] Meanwhile, in response to the image output mode being the normal mode, the driving controller 285 can operate corresponding to (c) of FIG. 10B.

[0335] That is, in response to the image output mode being the normal mode, the driving controller 285 can output a scan signal and a data signal corresponding to a constant number of subframes within a frame, based on the reference frequency which is a constant frequency of the vertical synchronization signal Vsync.

[0336] FIG. 10C is a diagram illustrating a light intensity sensor waveform GRam, a subframe waveform GRbm, a vertical synchronization signal input waveform GRcm, and a vertical synchronization signal output waveform GRdm, when the frame rate or the frequency of a vertical synchronization signal Vsync is a first frequency.

[0337] In this case, the first frequency can be 120 Hz.

[0338] Referring to the drawing, in a first mode in which the frame rate or the vertical synchronization signal Vsync changes, the driving controller 285 can prevent a non-emission period from occurring during a plurality of subframe periods within a period between the vertical synchronization signals Vsync, as illustrated in FIG. 10C. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0339] FIG. 10D is a diagram illustrating a light intensity sensor waveform GRan, a subframe waveform GRbn, a vertical synchronization signal input waveform GRen, and a vertical synchronization signal output waveform GRdn, when the frame rate or the frequency of a vertical synchronization signal Vsync is a second frequency less than the first frequency.

[0340] Referring to the drawing, in the first mode in which the frame rate or the vertical synchronization signal Vsync changes, the driving controller 285 can prevent a non-emission period from occurring during a plurality of subframe periods within a period between the vertical synchronization signals Vsync, as illustrated in FIG. 10D. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0341] In this case, the second frequency can be 70 Hz.

[0342] In comparison with FIG. 8E, FIG. 10D illustrates an example in which arrangement of subframes is not omitted, but a plurality of subframe periods are arranged within a period between the vertical synchronization signals Vsync. Accordingly, a period in which an amount of light decreases does not occur.

[0343] FIG. 10E is a diagram illustrating a light intensity sensor waveform GRao, a subframe waveform GRbo, a vertical synchronization signal input waveform GRco, and a vertical synchronization signal output waveform GRdo, when a vertical synchronization signal Vsync changes from a first level to a second level.

[0344] Referring to the drawing, the vertical synchronization signal Vsync can have the first level in a period between a time point Ta and a time point Tb, and the vertical synchronization signal Vsync can have the second level in a period between the time point Tb and a time point Tc.

[0345] For example, the first level can be 60 Hz, and the second level can be 70 Hz.

[0346] Meanwhile, in response to the frame rate or the vertical synchronization signal Vsync changing from the first level to the second level, the driving controller 285 can prevent a non-emission period from occurring during a plurality of subframe periods within a period between the vertical synchronization signals Vsync, as illustrated in FIG. 10E. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0347] Meanwhile, in response to the frame rate or the vertical synchronization signal Vsync changing from the first level to the second level, the driving controller 285 can control an interval GPa of the plurality of subframe periods to be constant during the period between the vertical synchronization signals Vsync, as illustrated in FIG. 10E. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0348] Meanwhile, in response to the frame rate or the vertical synchronization signal Vsync changing from the first level to the second level, the driving controller 285 can control a scanning period GPa of a scan signal to be constant during the period between the vertical synchronization signals Vsync, as illustrated in FIG. 10E. Accordingly, it is possible to reduce flicker when the frame rate or the vertical synchronization signal Vsync changes.

[0349] While the present disclosure has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that the present disclosure is not limited to those exemplary embodiments and various changes in form and details can be made therein without departing from the scope and spirit of the invention as defined by the appended claims and should not be individually understood from the technical spirit or prospect of the present disclosure.

Claims

1. An image display device comprising: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein the driving controller comprises a buffer configured to store frame data, wherein in a first mode in which a frame rate or a vertical synchronization signal changes, in response to a frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller is configured to repeat the frame data stored in the buffer and to output only some of subframe data within the repeated frame data without outputting another part of the subframe data.

2. The image display device of claim 1, wherein in the first mode in which the frame rate or the vertical synchronization signal changes, in response to the frequency of the changed vertical synchronization signal exceeding the reference frequency, the driving controller is configured to output only some of the subframe data within the frame data without outputting another part of the subframe data.

3. The image display device of claim 1, wherein in the first mode in which the frame rate or the vertical synchronization signal changes, in response to the frequency of the changed vertical synchronization signal being the reference frequency, the driving controller is configured to output all the subframe data within the frame data.

4. The image display device of claim 2, wherein the driving controller is configured to : in the first mode in which the frame rate or the vertical synchronization signal changes, set a first number of subframe periods in response to the frequency of the changed vertical synchronization signal being less than the reference frequency, and set a second number of subframe periods, less than the first number, in response to the frequency of the changed vertical synchronization signal exceeding the reference frequency.

5. The image display device of claim 2, wherein in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller is configured to set subframe periods when the frequency of the changed vertical synchronization signal is less than the reference frequency to be equal to subframe periods in resposne to the frequency of the changed vertical synchronization signal exceeding the reference frequency.

6. The image display device of claim 2, wherein in a second mode in which the frame rate or the vertical synchronization signal is constant, the driving controller is configured to output all the subframe data within the frame data.

7. The image display device of claim 1, wherein in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller is configured to prevent a non-emission period from occurring during a plurality of subframe periods within a period between the vertical synchronization signals.

8. The image display device of claim 1, wherein in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller is configured to control an interval of the plurality of subframe periods to be constant during the period between the vertical synchronization signals.

9. The image display device of claim 1, wherein in the first mode in which the frame rate or the vertical synchronization signal changes, the driving controller is configured to control a scanning period of a scan signal to be constant during the period between the vertical synchronization signals.

10. The image display device of claim 1, wherein in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller is configured to prevent a non-emission period from occurring during the plurality of subframe periods within the period between the vertical synchronization signals.

11. The image display device of claim 1, wherein in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller is configured to control an interval of the plurality of subframe periods to be constant during the period between the vertical synchronization signals.

12. The image display device of claim 1, wherein in response to the frame rate or the vertical synchronization signal changing from the first level to the second level, the driving controller is configured to control a scanning period of a scan signal to be constant during the period between the vertical synchronization signals.

13. The image display device of claim 1, wherein in the first mode, the driving controller is configured to change a number of subframes within a frame according to the frequency of the changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant.

14. The image display device of claim 1, wherein the plurality of light emitting diodes comprise a red light emitting diode, a green light emitting diode, and a blue light emitting diode, wherein the driving controller is configured to control a level of a data signal supplied to the red light emitting diode to be less than a level of a data signal supplied to the green light emitting diode or the blue light emitting diode.

15. The image display device of claim 1, further comprising a signal processing device configured to output an image signal to the display.

16. An image display device comprising: a panel including a plurality of light emitting diodes; a driving controller configured to output a scan signal to the plurality of light emitting diodes during each of a plurality of subframe periods, wherein, in response to an image output mode being a game mode or a variable refresh rate (VRR) mode, the driving controller is configured to change a number of subframes within a frame according to a frequency of a changed vertical synchronization signal, while controlling an interval of the plurality of subframe periods to be constant.

17. The image display device of claim 16, wherein in response to the image output mode being the game mode or VRR mode and the frequency of the changed vertical synchronization signal being less than a reference frequency, the driving controller is configured to perform frame repeating and subframe cutting.

18. The image display device of claim 17, wherein in response to the image output mode being the game mode or the VRR mode and the frequency of the changed vertical synchronization signal exceeding the reference frequency, the driving controller is configured to perform the subframe cutting.

19. The image display device of claim 16, wherein in response to the image output mode being a normal mode, the driving controller is configured to output each of a scan signal and a data signal corresponding to a constant number of subframes within a frame, based on a constant frequency of the vertical synchronization signal.

20. A video wall comprising a plurality of image display devices, wherein the image display device comprises the image display device of any one of claims 1 to 19.

Images