A dual output dc-dc converter

Abstract

A mechanism for providing two output voltage levels. An input voltage is converted into a first output voltage level using an inductor arrangement operating in a buck mode. The inductor arrangement is then controlled to operate in a boost mode to produce a second output voltage level. The first output voltage level is less than the input voltage level. The second output voltage level is greater than the first output voltage level.

Description

[0001] A dual output DC-DC converter

[0002] FIELD OF THE INVENTION

[0003] The present invention relates to the field of DC-DC converters, and in particular to DC-DC converters for simultaneously providing two different output voltages.

[0004] BACKGROUND OF THE INVENTION

[0005] A wide variety of DC-DC converters are known in the art for powering a load. Typically, if there are two separate loads to be powered, it is common to provide two separate DC-DC converters specifically designed for each load. For further reducing the size of electronic devices, it would be advantageous if a single DC-DC converter were able to drive two different loads, i.e., have at least two different outputs.

[0006] One existing DC-DC converter able to provide two output voltages is a flyback converter, which is able to provide multiple output voltages depending on the winding ratio of the flyback transformer. However, a disadvantage of such a converter is the large size of the flyback transformer, which needs to store the full energy before it is transferred to the outputs. Moreover, in such converters, the ratio of the output voltages is fixed. Moreover, the transformer size is further negatively impacted by the need for multiple windings, as an extra winding needs to be provided for each additional output voltage to be provided by the flyback converter.

[0007] It would be advantageous to provide a DC-DC converter able to provide different voltage levels without significantly impacting the size of the DC-DC converter.

[0008] SUMMARY OF THE INVENTION

[0009] The invention is defined by the claims.

[0010] According to examples in accordance with an aspect of the invention, there is provided a dual output DC-DC converter comprising: an input interface configured to receive a DC input signal having an input voltage level; a first output interface for providing, at a first output node, a first DC output signal having a first output voltage level, lower than the input voltage level; a second output interface for providing, at a second output node, a second DC output signal having a second output voltage level, higher than the input voltage level; an inductor arrangement coupled to the first output interface and the second output interface, and switchable between: a buck mode, in which the inductor arrangement performs a buck converter function for defining the first output voltage level; and a boost mode, in which the inductor arrangement performs a boost converter function for defining the second output voltage level.

[0011] The present disclosure thereby proposes the use of a same inductor arrangement for performing two separate functions, to provide a buck-converted voltage at a first output node and a boost-converted voltage at a second output node. The proposed approach significantly reduces a number of components that are required to provide two separate voltage outputs at two separate locations, thereby reducing the material cost of a dual output DC-DC converter compared to existing converters.

[0012] In some examples, the inductor arrangement is connected between the input interface and the first output interface; and the inductor arrangement is configured to: when operating in the buck mode, convert a power flow from the input interface to the first output interface to define the first output voltage level; and when operating in the boost mode, provide a power flow to the second output interface using the first output voltage level to define the second output voltage level. Thus, the second output voltage level may be defined using at least some of the power or charge that defines the first output voltage level. This provides a mechanism for using the same inductor arrangement to define both the first output voltage level and the second output voltage level. In particular, the first output voltage level is defined using the input voltage level and the second output voltage level is defined using the first output voltage level.

[0013] Preferably, a power flow through the inductor arrangement reverses when switching from the buck mode to the boost mode. This approach thereby switches the direction of power flow through the inductor arrangement when switching between a buck and boost mode. This facilitates the dual functionality of the inductor arrangement.

[0014] Embodiments comprise a switching arrangement configured to control a power flow between: the input interface and the inductor arrangement; and the inductor arrangement and the second output interface. More particularly, the switching arrangement may control a power flow from the input interface to the inductor arrangement (and therefore to the first output interface) and from the first output interface (or intermediate storage element) to the second output interface.

[0015] The switching arrangement may act to control whether the inductor arrangement operates in the buck mode or the boost mode. In particular, by controlling the power flow to and from the inductor arrangement, the mode of operation of the inductor arrangement can be effectively controlled.

[0016] The switching arrangement may comprise: a first switch connected between the input interface and a switch node, the switch node being connected to the inductor arrangement; and a second switch connected between the switch node and a ground or reference voltage.

[0017] Preferably, the first switch further connects the second output node of the second output interface to the switch node. This provides a path for controllable current or power flow from the inductor arrangement to the second output interface.

[0018] Some embodiments further comprise first diode connected from the input interface to an intermediate node, wherein the first switch is connected from the intermediate node to the switch node. This avoids current flow back to the source for improved efficiency and reduced ripple in the output voltage levels.

[0019] Embodiments may further comprise a second diode connected from the intermediate node to the second output node of the second output interface. This avoids current flow from the second output interface to the first output interface, thereby ensuring that the second output voltage level will be maintained at a voltage higher than the input voltage level.

[0020] In some examples, the converter further comprises a control arrangement for controlling the operation of the first and second switches.

[0021] In some examples, the first output interface comprises a first output capacitor connected between the first output node and a ground or reference voltage. This may be omitted if, for instance, a load connected to the first output node comprises an input capacitor.

[0022] The inductor arrangement may be configured to, when operating in boost mode, perform the boost converter function for defining the second output voltage level using the voltage across the first output capacitor.

[0023] In some examples, the second output interface comprises a second output capacitor connected between the second output node and a ground or reference voltage. This may be omitted if, for instance, a load connected to the second output node comprises an input capacitor.

[0024] There is also proposed an electronic arrangement comprising any herein disclosed dual output DC-DC converter; a first load configured to draw power from the first output interface; and a second load configured to draw power from the second output interface.

[0025] There is also proposed a lighting arrangement comprising the electronic arrangement of claim 13, wherein: the first load comprises a first LED arrangement; and the second load comprises a second, different LED arrangement.

[0026] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment s) described hereinafter.

[0027] BRIEF DESCRIPTION OF THE DRAWINGS

[0028] For a better understanding of the invention, and to show more clearly how it may be carried into effect, reference will now be made, by way of example only, to the accompanying drawings, in which:

[0029] Fig. 1 illustrates a proposed DC-DC converter;

[0030] Fig. 2 illustrates waveforms for the proposed DC-DC converter; and

[0031] Fig. 3 illustrates an alternative DC-DC converter.

[0032] DETAILED DESCRIPTION

[0033] The invention will be described with reference to the Figures.

[0034] It should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the apparatus, systems and methods, are intended for purposes of illustration only and are not intended to limit the scope of the invention. These and other features, aspects, and advantages of the apparatus, systems and methods of the present invention will become better understood from the following description, appended claims, and accompanying drawings. It should be understood that the Figures are merely schematic and are not drawn to scale. It should also be understood that the same reference numerals are used throughout the Figures to indicate the same or similar parts.

[0035] The invention provides a mechanism for providing two output voltage levels. An input voltage level is converted into a first output voltage level using an inductor arrangement operating in a buck mode. The inductor arrangement is then controlled to operate in a boost mode to produce a second output voltage level. The first output voltage level is less than the input voltage level. The second output voltage level is greater than the input voltage level. The present disclosure proposes a new configuration for a DC-DC converter, that effectively uses a buck converter to generate a first voltage lower than an input voltage (i.e., operates in a buck mode) and is able to operate the buck converter in reverse to generate a second output voltage higher than the input voltage.

[0036] In the context of the present disclosure, a switch is “on” when it permits the flow of current therethrough and is “off’ when no or negligible current is permitted to flow therethrough. This follows well-established nomenclature for the operation of a switch. A switch may be formed of any suitable switching element, such as a field-effect transistor (e.g., a MOSFET), a GaN transistor, a IGBT and so on.

[0037] Figure 1 illustrates a dual output DC-DC converter 100 according to a proposed approach.

[0038] The converter 100 comprises an input interface 110 configured to receive a DC input signal having an input voltage level. The input interface 110 may be connected or connectable to an input supply 105 that provides the DC input signal. The input supply may, for instance, comprise a battery or cell arrangement configured to directly provide a DC input signal. Alternatively, the input supply may comprise an AC power supply (e.g., a mains supply) and a rectifier arrangement (e.g., a bridge rectifier) configured to output a DC signal as the DC input signal for the converter 100.

[0039] The converter 100 also comprises a first output interface 121 having a first output node ol. A voltage at the first output node ol defines a first output voltage level. The voltage at the first output node ol may be defined as a voltage difference between the first output node ol and a ground or reference node GND. A first load 151 (which does not form part of the converter 100) may be configured to draw power from the first output node ol.

[0040] The converter 100 also comprises a second output interface 122 having a second output node o2. A voltage at the second output node o2 defines a second output voltage level. The voltage at the second output node o2 may similarly be defined as a voltage difference between the second output node o2 and the ground or reference node GND. A second load 152 (which does not form part of the converter 100) may be configured to draw power from the second output node o2.

[0041] The converter 100 also comprises an inductor arrangement 130. The inductor arrangement 130 comprises one or more inductor LI, here a single inductor LI. In preferred examples, the inductor arrangement comprises only a single inductor. It has been advantageously recognized that the proposed mechanism can function with a single inductor, thereby minimized material and component usage. The inductor arrangement is coupled to both the first output interface 121 and the second output interface 122. The inductor arrangement is configured to be switchable between a buck mode and a boost mode. When operating in the buck mode, the inductor arrangement is configured to define the first output voltage level, which will be lower than the input voltage level. When operating in the boost mode, the inductor arrangement is configured to define the second output voltage level, which will be higher than the input voltage level.

[0042] In particular, the inductor arrangement 130 may be connected between the input interface 110 and the first output interface 121. A power flow from the input interface and through the inductor arrangement 130 thereby controls or defines the first output voltage.

[0043] In general, the inductor arrangement is such that a power flow through the inductor arrangement is controlled between flowing in a forward direction towards the first output node (during a buck mode of operation) and a reverse direction away from the first output node, and towards the second output node, during a boost mode of operation.

[0044] In particular, the input voltage level is converted using the buck mode of operation to define the first output voltage level. The first output voltage level is similarly converted using the boost mode of operation (with the inductor arrangement operating in reverse) to define the second output voltage level. In this way, the first output voltage level is lower than the input voltage level (due to the buck mode of operation) and the second output voltage level is higher than the input voltage level (due to the boost mode of operation).

[0045] The present disclosure therefore proposes to reverse the power flow though the inductor arrangement so that the converter can perform a buck conversion functionality (to define the first output voltage level using the input voltage level) and a boost conversion functionality (to define the second output voltage level using the first output voltage level). Two different voltage output levels are thereby defined.

[0046] The flow of current through the inductor arrangement may be controlled by a switching arrangement Ml, M2.

[0047] In particular, the converter 100 may comprise a switching arrangement Ml, M2 that controls the power flow through the inductor arrangement (and thereby to the first output interface 121). The switching arrangement Ml, M2 comprises a first switch Ml connected between the input interface and a switch node x. The switch node x is connected to the inductor arrangement. The switching arrangement Ml, M2 also comprises a second switch M2 connected between the switch node and a ground or reference voltage. The operation of the switching arrangement, e.g., the state of the first Ml and second M2 switches, may be controlled by a control arrangement 140. The function and design of suitable control arrangements for controlling and driving switches are well known to the skilled person. In particular, the control arrangement 140 may be configured to control a gate voltage of each switch to thereby control whether the switch is turned on or turned off.

[0048] A buck and boost mode of operation is described with further reference to Fig. 2, which illustrates a first waveform 210 and a second waveform 220. For the sake of illustrative clarity, non-ideal effects (such as any voltage drops) are ignored in the illustrated waveforms.

[0049] The first waveform 210 illustrates the voltage V(x) at the switch node x, i.e., the voltage difference between the switch node x and the ground or reference node GND, with respect to time t. The value V0 is zero, i.e., no voltage difference.

[0050] The second waveform 210 illustrates the inductor current I(L1), being the current through the inductor LI, with respect to time t. A positive value for the inductor current indicates a current flow towards the first output node.

[0051] During a buck mode of operation, the first switch Ml is used as a control switch and the second switch M2 is used as a sync switch. The magnitude of the first output voltage is controlled by the on-time of the first switch Ml as control switch.

[0052] For the boost mode of operation, initially (before a time to) the current through the inductor arrangement 130 (i.e., the inductor LI) is negative or zero and at least the second switch M2 is turned off. At an initial point in time to, the first switch Ml is on and the current through the inductor LI is at zero. This begins a buck mode of operation. The current through inductor LI will increases and charge a first output capacitor Cl connected between the first output node and a reference or ground voltage. The voltage V(x) at the switch node x is held at a voltage VI, which has a magnitude equivalent to the input voltage level provided at the input interface. After a first period of time, the first switch Ml is turned off (at a time ti) and (optionally, after a first dead time - not illustrated) the second switch M2 will turn on. This allows the current through the inductor to freewheel. The first output capacitor Cl is then further charged until the inductor current I(L1) becomes zero at a time t2, i.e., after a second period of time (t2 - ti). The buck mode of operation ends when the inductor current reaches zero. During the second period of time, the voltage V(x) at the switch node x is held at the ground or reference voltage V0.

[0053] Thus, the buck mode of operation persists between the time t0and the time t2. The length of the first period of time (i.e., ti-to) is controlled to define the first output voltage. The greater the length of the first period of time, the larger the first output voltage, following well known buck converter control principles.

[0054] The use of a deadtime between switching first switch Ml off and switching second switch M2 on is advantageous. This is because the inductor current I(L1) is positive when the switch node voltage V(x) changes from VI to VO at the end of the first period of time. The introduction of a (small) length of deadtime before switching on the second switch thereby achieves zero voltage switching, reducing loss and electromagnetic interference (EMI). The chosen deadtime may be chosen to be sufficiently large such that the switch node voltage V(x) can fully commutate (from VI to VO) with the given inductor current.

[0055] The above process describes a conventional buck operation process, in which a voltage at a first output node is defined by controlling a current flow in a forward direction (i.e., towards the first output node) through an inductor LI.

[0056] The present disclosure proposes to further use the inductor arrangement 130, and therefore inductor LI, to control the voltage at a second output node. In particular, a reverse current flow (i.e., away from the first output node) through the inductor LI is controlled to define the second output voltage. The inductor arrangement is thereby controlled to operate in a boost mode of operation.

[0057] In the illustrated example, the inductor arrangement is controlled to operate in a boost mode the first time that the inductor current reaches 0 when operating in the buck mode. In other examples, the inductor arrangement operates in the boost mode the Nth time that the inductor current reaches 0 when operating the buck mode (e.g., where N > 1). Otherwise, the previously described procedure for operating in the buck mode may be repeated.

[0058] For the boost mode of operation, initially (before or at a time t?) the current through the inductor arrangement 130 is positive or zero and at least the first switch Ml is turned off. This initial state may represent the second period of time during the buck mode of operation. At a time t2, the second switch M2 is on, with the first switch Ml being maintained off. The inductor current decreases past zero, as the first output capacitor Cl is discharged to the ground or reference voltage through the second switch M2. During this period, the voltage V(x) at the switch node x is held at the ground or reference voltage V0. After a third period of time t2 -t3, the second switch M2 is turned off (at a time C) and the first switch Ml is turned on (optionally, after a second dead time). The reverse current flow through inductor LI then flows through the first switch and towards the second output node o2, e.g., to charge a second output capacitor C2 (connected between the second output node o2 and a ground or reference voltage) for a fourth period of time t3 - , i.e., until a time This causes the inductor arrangement to act analogously to a boost converter, to provide a large voltage to the second output node. In particular, the voltage V(x) at the switch node x is boosted to a second voltage level V2, greater than the input voltage level. The fourth period of time t? - may end when the inductor current I(L) reaches zero. It will be clear that if the first switch Ml is thereafter maintained to be turned on, the inductor arrangement will again switch to operate in the buck mode of operation.

[0059] The power transferred to the second output node o2 will be controlled by the on time of M2 after inductor current I(L1) crosses zero. In other words, the length of the third period of time (i.e., ts-t?) is controlled to define the second output voltage.

[0060] The slope of the inductor current is defined by the inductance and the voltage across the inductor. During the first period of time to - ti, the voltage across the inductor is the difference between the input voltage VIN and the first output voltage level V(ol). During the third period of time t3 - , voltage across the inductor is the difference between the second output voltage level V(o2) and the first output voltage level V(ol). As V(o2) > V(in) the slope of the inductor current will be larger during the third time period than during the first time period.

[0061] In the illustrated example, the inductor arrangement is controlled to operate in a buck mode the first time that the inductor current reaches or breaches 0 when operating in the boost mode. In other examples, the inductor arrangement operates in the buck mode the Mth time that the inductor current reaches 0 when operating the boost mode (e.g., where N > 1). Otherwise, the previously described procedure for operating in the boost mode may be repeated (e.g., turning the first switch off and turning the second switch on).

[0062] With continued reference to Figure 1, to prevent current flow from any output node to the input interface, a first diode DI may be connected from the input interface to an intermediate node y. More particularly, an anode end of the first diode DI may connected to the input interface, with the cathode end being connected to the intermediate node y. The first switch connects from the intermediate node to the inductor arrangement 130.

[0063] To prevent current flow from the second output node to the inductor arrangement (e.g., during the buck mode of operation), the converter 100 may comprise a second diode connected from the intermediate node y to the second output interface, e.g. the second output node o2. The first diode and / or second diode (where present) may be replaced by an appropriately controlled switch. For instance, the first diode may be replaced by a switch that is only open during the buck mode of operation. The second diode may be replaced by a switch that is only open during the boost mode of operation. Thus, each diode (where present) may be replaced by an appropriate synchronously controlled switch.

[0064] It will be appreciated that the first Cl and / or second C2 output capacitor may be omitted if, for instance, it is known that the load to be connected to the respective output interface will comprise an input capacitor.

[0065] In general, the switch arrangement may be operable in (at least) four states different states. In a first state, switch Ml is on, switch M2 is off and current flows through the inductor arrangement towards the first output node. In a second state, switch Ml is off, switch M2 is on and current flows through the inductor arrangement towards the first output node. In a third state, switch Ml is off, switch M2 is on and current and current flows through the inductor arrangement away from the first output node. In a fourth state, switch Ml is on, switch M2 is off and current flows through the inductor arrangement away from the first output node.

[0066] Of course, the switch arrangement may operate in additional states, e.g., to provide the optional deadtimes when switching the mode of operation. When providing a deadtime, neither switch Ml nor M2 is on.

[0067] The switch arrangement operates in the first state and the second state when the inductor arrangement operates in the buck mode. The switch arrangement operates in the third state and the fourth state when the inductor arrangement operates in the boost mode.

[0068] The (average) length of time that the switch arrangement operates in the first state defines the magnitude of the first voltage output level. Similarly, the (average) length of time that the switch arrangement operates in the third state defines the magnitude of the second voltage output level.

[0069] From the foregoing, it will be clear that in short energy is first transferred from the input interface to a storage element at or connected to the first output interface (having a voltage lower than the input voltage). A part of this energy is taken from the storage element at the first output interface and transferred in boost operation to a storage element at or connected to the second output interface. This provides a dual output DC-DC converter that repurposes existing buck conversion technology to perform a boost conversion functionality to provide a supplementary or auxiliary power. Although not forming part of the DC-DC converter 100, the first load 151 and second load 152 may form part of an electronic arrangement comprising the DC-DC converter 100, the first load 151 and the second load 152.

[0070] Figure 3 illustrates an alternative dual output DC-DC converter 300. Elements structurally identical to the previously described converter maintain the same reference numerals.

[0071] The converter 300 differs from the previously described converter by comprising an intermediate buffer capacitor C3 connected between the inductor arrangement 130 and the ground or reference voltage GND. In particular, the intermediate buffer capacitor is connected in parallel with the first output interface 121, e.g., with the first output capacitor Cl (if present). More specifically, the inductor arrangement is connected between the input interface and the intermediate buffer capacitor C3.

[0072] The intermediate buffer capacitor C3 is connected to the first output node ol by a third diode D3.

[0073] This approach differs in that, during the buck mode of operation, both the intermediate buffer capacitor C3 and the first output capacitor Cl (if present) are charged by the inductor arrangement - i.e., to the first output voltage. However, during the buck mode of operation, only the intermediate buffer capacitor C3 is discharged to produce the second output voltage. This advantageously maintains the first output voltage, e.g., the voltage across the first output capacitor Cl at the first output voltage, without discharging or repurposing this voltage to produce the second output voltage. This reduces a ripple in the first output voltage.

[0074] The third diode D3 may be replaced by an appropriately controlled switch. For instance, the third diode D3 may be replaced by a switch that is only open during the buck mode of operation.

[0075] In the example control scheme illustrated by Figure 2, the inductor arrangement 130 is controlled to operate in both a buck mode and a boost mode for each switching cycle of either the first switch Ml or the second switch M2. In particular, each time the inductor current reaches 0, the mode of the inductor arrangement is switched to the other of the buck or boost mode.

[0076] However, this is not essential, and in some examples, the inductor arrangement is controlled to change between buck and boost mode not every switching cycle, but every N switching cycles of either the first switch or the second switch. Thus, in some examples, the mode of the inductor arrangement may only be switched from the buck mode to the boost mode only after the inductor current I(L) reaches 0 for the Nth time whilst operating in a buck mode. Similarly, in some examples, the mode of the inductor arrangement may only be switched from the boost mode to the buck mode only after the inductor current I(L) reaches 0 for the Mth time whilst operating in a boost mode. The value of N and / or M is a positive integer value (e.g., 1, 2, 3 or 5).

[0077] In some examples, the inductor arrangement is controlled to change synchronously and / or dependent on the input voltage, e.g. in PFC applications.

[0078] If there is a need to prioritize one of two output voltages at start-up (e.g., to enable, for example, shorter start-up time), the converter could be configured to first charge only one of two output capacitors Cl, C2 until it reaches the desired output voltage. For instance, the inductor arrangement may be controlled to be only in the buck mode until a first load (drawing power from the first output interface). As a working example, in some use-case scenarios, (such as lighting devices) only certain light channels are used on start-up (e.g., white light channels). The volage supply for other light channels (e.g., RGB) could therefore be generated with a delay, without affecting the functionality of the lighting device.

[0079] It will also be appreciated that the mode of operation of the inductor arrangement may also be controlled responsive to a status of the input signal. For instance, if the input voltage is lower than the first output voltage for a short period of time (and therefore the first output voltage cannot be supplied from the input voltage), it could be advantageous to disable the boost mode of operation, such that the first output capacitor is then only supporting a single load.

[0080] The two output voltages levels can be individually controlled using two independent feedback control loops. A first control loop may, for instance, sense the first voltage output level (i.e., the voltage at the first output node ol), and control it to a desired value by adjusting the time duration of the first state. A second loop may then sense the second voltage output level and control it to a desired value by adjusting the time duration of the third state.

[0081] There is also proposed an electronic device comprising any herein disclosed a dual output DC-DC converter, a first load connected to the first output interface and a second load connected to the second output interface.

[0082] The first load and second load may, for instance, each comprise a light emitting arrangement. The light emitting arrangement of the first load may comprise only white LEDs or light emitting elements. The light emitting arrangement of the second load may comprise only non-white LEDs (e.g., red green and / or blue) LEDs. Variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure and the appended claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

[0083] In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. If the term "adapted to" is used in the claims or description, it is noted the term "adapted to" is intended to be equivalent to the term "configured to". If the term "arrangement" is used in the claims or description, it is noted the term "arrangement" is intended to be equivalent to the term "system", and vice versa.

[0084] Any reference signs in the claims should not be construed as limiting the scope.

Claims

CLAIMS:

1. A dual output DC-DC converter (100, 300) comprising: an input interface (110) configured to receive a DC input signal having an input voltage level; a first output interface (121) for providing, at a first output node (ol), a first DC output signal having a first output voltage level, lower than the input voltage level; a second output interface (122) for providing, at a second output node (o2), a second DC output signal having a second output voltage level, higher than the input voltage level; an inductor arrangement (130) coupled to the first output interface and the second output interface, and switchable between: a buck mode, in which the inductor arrangement performs a buck converter function for defining the first output voltage level; and a boost mode, in which the inductor arrangement performs a boost converter function for defining the second output voltage level, a switching arrangement (Ml, M2) comprising: a first switch (Ml) connected between the input interface and a switch node (x), the switch node being connected to the inductor arrangement; and a second switch (M2) connected between the switch node and a ground or reference voltage, wherein the switching arrangement (Ml, M2) is configured to control a power flow between the input interface and the inductor arrangement and between the inductor arrangement and the second output interface, wherein the inductor arrangement is connected between the input interface and the first output interface and wherein the inductor arrangement is configured to: when operating in the buck mode, convert a power flow from the input interface to the first output interface to define the first output voltage level; and when operating in the boost mode, provide a power flow to the second output interface using the first output voltage level to define the second output voltage level,wherein the first switch further connects the second output node of the second output interface to the switch node.

2. The dual output DC-DC converter of claim 1, configured such that a power flow through the inductor arrangement reverses when switching from the buck mode to the boost mode.

3. The dual output DC-DC converter of claim 1, wherein the switching arrangement controls whether the inductor arrangement operates in the buck mode or the boost mode.

4. The dual output DC-DC converter according to any of the preceding claims, further comprising a first diode (DI) connected from the input interface to an intermediate node (y), wherein the first switch is connected from the intermediate node to the switch node.

5. The dual output DC-DC converter according to any of preceding claims, further comprising a second diode (D2) connected from the intermediate node to the second output node of the second output interface.

6. The dual output DC-DC converter according to any of the preceding claims, comprising a control arrangement (140) for controlling the operation of the first and second switches.

7. The dual output DC-DC converter according to any of the preceding claims, wherein the first output interface comprises a first output capacitor (Cl) connected between the first output node and a ground or reference voltage (GND).

8. The dual output DC-DC converter of claim 7, wherein the inductor arrangement is configured to, when operating in boost mode, perform the boost converter function for defining the second output voltage level using the voltage across the first output capacitor.

9. The dual output DC-DC converter according to any of the preceding claims, wherein the second output interface comprises a second output capacitor (C2) connected between the second output node and a ground or reference voltage (GND).

10. An electronic arrangement comprising: the dual output DC-DC converter (100, 300) according to any of the preceding claims; a first load (151) configured to draw power from the first output interface; and a second load (152) configured to draw power from the second output interface.

11. A lighting arrangement comprising the electronic arrangement of claim 9, wherein: the first load comprises a first LED arrangement; and the second load comprises a second, different LED arrangement.

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