ELECTRONIC CIRCUIT ENABLING ON-BOARD IMPEDANCE VERIFICATION AND IMPEDANCE VERIFICATION METHOD

Abstract

The present invention relates to an electronic circuit (10) comprising a first component (12), a second component (14), and an electronic bus (16) capable of establishing communication between the first component (12) and the second component (14). The first component (12) comprises: means (20) for transmitting a voltage, and means (22) for measuring a voltage. The second component (14) comprises: a reference impedance (26), and switching means (28). The electronic circuit (10) further comprises, in addition to a nominal state, a test state in which: the transmitting means (20) are configured to send a predefined voltage signal (30) into the bus, the switching means (28) are configured in the connected state, and the measuring means (22) are configured to measure a reflected voltage signal (32) from the bus. Figure for the abstract: 1

Description

Title of the invention: ELECTRONIC CIRCUIT ALLOWING VERIFICATION ON-BOARD IMPEDANCE AND IMPEDANCE VERIFICATION METHOD Technical field of the invention

[0001] The present invention relates to the field of impedance verification of communication buses within electronic circuits.

[0002] The invention relates more particularly to an electronic circuit enabling impedance verification in an embedded manner and a method for impedance verification in such an electronic circuit. Technical background

[0003] Many electronic circuits include at least two components exchanging information by means of a communication bus. Some high-speed buses must be routed with controlled impedance.

[0004] When designing such an electronic circuit, the bus impedance is calculated theoretically or simulated using a Computer-Aided Design (CAD) tool.

[0005] The electronic circuit is then manufactured with tolerances which are generally on the order of 10%.

[0006] At the end of the manufacturing process, it is necessary to verify that the bus impedance meets the specifications and is within the tolerance range. The current method for measuring the impedance of a bus, particularly within a printed circuit board, is very long and tedious. The method requires a bare printed circuit board and cannot be performed on all printed circuit boards produced. Consequently, the impedance measurement is only representative of a single production batch of the printed circuit board. Summary of the invention

[0007] The invention proposes an electronic circuit comprising a first component, a second component, and an electronic bus capable of establishing communication between the first component and the second component, - the first component comprising: - means of emitting a voltage, and - means of measuring voltage; - the second component comprising: - a reference impedance equal to the theoretical impedance of the bus, and - switching means having a connected state in which the reference impedance is connected to the bus and a disconnected state in which the reference impedance is disconnected from the bus, the electronic circuit comprising, in addition to a nominal state, a test state in which: - The transmission means are configured to send a predefined voltage signal into the bus, - the switching means are configured in the connected state, and - the measurement means are configured to measure a reflected voltage signal from the bus.

[0008] According to other features of the invention: - the first component is a microcontroller; - the second component is a transceiver or a network switch; - the measurement means include an analog-to-digital converter or analog comparison means.

[0009] The invention also relates to an impedance verification method implemented in an electronic circuit comprising a first component, a second component, and an electronic bus capable of establishing communication between the first component and the second component, - the first component comprising: - means of emitting a voltage, and - means of measuring voltage; - the second component comprising: - a reference impedance equal to the theoretical impedance of the bus, and - switching means having a connected state in which the reference impedance is connected to the bus and a disconnected state in which the reference impedance is disconnected from the bus, the method comprising the following steps: - El: within the second component, putting the switching means into the connected state so as to connect the reference impedance to the bus; - E2: sending a voltage signal into the bus via the transmission means of the first component, - E3: measurement by the measuring means of the first component of a reflected voltage signal from the bus.

[0010] According to other features of the invention: - the first component also comprising a memory, the process also includes a step E4 of memorizing the measurement in the memory; - the process further includes step E5: analysis of the measurement carried out in step E3 according to at least one predefined criterion in order to determine whether the bus impedance is acceptable or not; - the predefined criterion includes at least one voltage threshold value for the measurement; - in step E2, the voltage signal sent consists of a long voltage square followed by a short voltage pulse; - in step E2, the voltage signal sent includes several short voltage pulses with several steepnesses of voltage rise slope and the process further includes a step E6: of determining the maximum operating frequency of the bus as a function of the steepness from which the impedance is degraded; - the process is implemented automatically by a system embedded within the electronic circuit; - the analysis carried out in step E5 having identified a bus impedance lower than the theoretical bus impedance within a tolerance margin, the process further includes step E7: series connection of an additional impedance within the first component; - the process further includes step E8: within the second component, connection of a variable impedance in parallel with the reference resistance and adaptation of the variable impedance so as to cancel the wave reflected in the bus. Brief description of the figures

[0011] Other features and advantages of the invention will become apparent upon reading the detailed description that follows, for an understanding of which reference should be made to the accompanying drawings in which:

[0012] [Fig.1] is a schematic representation of an electronic circuit according to a first embodiment of the invention;

[0013] [Fig.2] is a diagram representing the voltage signal measured during transmission of a voltage slot in the bus of the electronic circuit of the [Fig.l];

[0014] [Fig.3] is a diagram representing the voltage signal measured when sending a voltage pulse in the bus of the electronic circuit of [Fig.1];

[0015] [Fig.4] is a schematic representation of a printed circuit according to a second embodiment of the invention showing vias in the printed circuit bus;

[0016] [Fig.5] is a diagram representing the voltage signal measured during transmission of a voltage slot in the bus of the printed circuit board of the [Fig.4];

[0017] [Fig.6] is a diagram representing a voltage signal emitted in a bus of a electronic circuit according to a third embodiment of the invention, the emitted signal comprising a sequence of voltage pulses having edges with different rise times. Detailed description of the invention

[0018] For the description of the invention and the understanding of the claims, the vertical, longitudinal and transverse orientations according to the V, L, T coordinate system shown in the figures shall be adopted, without limitation and without limiting reference to Earth's gravity, in which the longitudinal axis L and transverse axis T extend in a horizontal plane. By convention, the longitudinal axis L is oriented from back to front.

[0019] In the description that follows, identical, similar or analogous elements will be designated by the same reference numerals.

[0020] Figure 1 illustrates an electronic circuit 10 according to an embodiment of the invention. The electronic circuit 10 comprises a first component 12, a second component 14, and an electronic bus 16 capable of establishing communication between the first component 12 and the second component 14.

[0021] The first component 12 includes a first functional set 18 which is activated in a test mode. The first functional set 18 of the first component 12 comprises:

[0022] - means for emitting 20 of a voltage, and

[0023] - means for measuring 22 of a voltage.

[0024] The second component 14 includes a second functional set 24 which is activated in test mode. The second functional set 24 of the second component 14 includes:

[0025] - a reference impedance 26 equal to the theoretical impedance of bus 16, and

[0026] - switching means 28 having a connected state in which reference impedance 26 is connected to bus 16 and a disconnected state in which reference impedance 26 is disconnected from bus 16.

[0027] When the first functional set 18 and the second functional set 24 are activated, the electronic circuit is said to be in test state.

[0028] In the test state:

[0029] - the transmitting means 20 are configured to send a voltage signal 30 predefined in bus 16,

[0030] - the switching means 28 are configured in the connected state, and

[0031] - the measuring means 22 are configured to measure a reflected voltage signal 32 coming from bus 16.

[0032] The first component 12 can be, for example: - a microcontroller, - a microprocessor, - an Ethernet network switch, also called a "switch" according to Anglo-Saxon terminology, - an expansion card such as a graphics card, - a solid-state drive (SSD), meaning a disk that stores information on flash memory, - a hard drive, or - a network card including for example an expansion bus according to the PCI Express standard, "Peripheral Component Interconnect Express" according to the commonly used Anglo-Saxon name.

[0033] The second component 14 can be, for example: - a transceiver, or - an Ethernet network switch, also called a "switch" according to Anglo-Saxon terminology.

[0034] The measuring means 22 include for example: - an analog-to-digital converter, or - analog comparison means.

[0035] In order to perform a check of the impedance of the bus 16 within the electronic circuit 10, the test mode is programmed in a logic unit 34 of the electronic circuit 10. The logic unit 34 is for example comprised by the first functional set 18 of the first component 12. The logic unit 34 can be coupled to a memory 36.

[0036] Thus, the impedance verification process is embedded in an electronic chip and can be triggered by means of the test mode at any time by an operator or in a programmed or automated manner and automatically give test results in a few milliseconds.

[0037] The impedance verification method of the invention is based on the application of reflectometry principles to the electronic circuit 10 in order to establish the following relationship between the reference impedance 26 and the bus impedance 16:

[0038] [Math.l] _ (Zbus-Zref) P~ (Zbus+Zref)

[0039] Where: - p is the reflection coefficient (ratio of reflected Fonde to emitted wave), - Zref is the value of the reference impedance 26, - Zbus is the value of the bus impedance 16.

[0040] According to the above formula, the reflection coefficient p is zero, i.e. Reflected background is zero, when the value of the bus impedance 16 is equal to the value of the reference impedance 26 (Zbus = Zref).

[0041] Insofar as the value Zref of the reference impedance 26 is chosen to be equal to the desired value for the impedance Zbus of the bus 16, the method of the invention therefore consists of verifying that the reflected voltage signal 32 is zero.

[0042] The test mode includes the implementation of an impedance verification procedure comprising the following steps: - El: putting the switching means 28 into the connected state so as to connect the reference impedance 26 to the bus 16; - E2: sending a voltage signal 30 into bus 16 via the transmitting means 20 of the first component 12, - E3: measurement by measuring means 22 of the first component 12 of a reflected voltage signal 32 coming from the bus 16, - E4: memorization of the measurement in memory 36, - E5: analysis of the measurement carried out in step E3 according to at least one predefined criterion in order to determine whether the impedance of bus 16 is acceptable or not.

[0043] Step El corresponds to putting the electronic circuit 10 into the test state.

[0044] Steps E2 and E3 are carried out in the manner of a time-domain reflectometer or TDR (Time Domain Reflectometer according to Anglo-Saxon terminology). In step E2, the transmitting means 20 emit a pulse with a very fast rise time into the bus 16. The edge, i.e. the rise time of the pulse, depends on the functional frequency of the bus 16.

[0045] Measuring the reflected voltage signal 32 allows the reflection coefficient of the line to be calculated (ratio of reflected ground to emitted ground). Using the mathematical formula, it is possible to deduce the impedance of the bus 16 from the values ​​of the reference impedance 26 and the reflection coefficient p.

[0046] In the case of an impedance-matched bus 16, that is to say in the case of a bus 16 with an impedance equal to the reference impedance 26, the transmitted pulse will be entirely absorbed at the end of the line and no signal will be reflected back to the measuring means 22.

[0047] The expected target value for the bus impedance is, for example, 50 Q.

[0048] In case of impedance discontinuity, part of the incident voltage signal 30 will be sent back into the bus towards the measuring means 22.

[0049] If the impedance of bus 16 is less than the reference impedance 26, then a reflection that opposes the original impulse is generated. Conversely, if the impedance of bus 16 is greater than the reference impedance 26, then a reflection that reinforces the original impulse is generated.

[0050] Figure 2 shows the signal measured by the measuring means 22 when a voltage pulse is sent by the transmitting means 20. The measurement used to verify the impedance is taken after a fixed delay, indicated by the vertical dashed line, corresponding to twice the propagation time of the electrical wave in the bus 16.

[0051] The signal shown in [Fig.2] represents: - an emitted wave 38, - a first measured wave 40 in the case of bus impedance 16 greater than the reference impedance 26, - a second measured wave 42 in the case of bus impedance 16 equal to the reference impedance 26, - a third measured wave 44 in case of bus impedance 16 lower than the reference impedance 26.

[0052] In the case where the pulse is emitted with a full-scale voltage by the transmitting means 20, all voltages or discontinuities above the full-scale voltage, and in particular the first measured wave 40, can be clipped by the measuring means 22. In this case, it is not possible to distinguish between the following two situations: - an impedance of bus 16 greater than the reference impedance 26, - an impedance of bus 16 equal to the reference impedance 26.

[0053] Figure 3 shows the signal measured by the measuring means 22 when a short voltage pulse is sent by the transmitting means 20. In particular, the voltage pulse has a duration less than twice the propagation time of the electrical wave in the bus 16, so that the emitted wave does not overlap with the reflected wave. It is then possible to distinguish the following two situations, which were confused in the example of Figure 2: - an impedance of bus 16 greater than the reference impedance 26: this is the case of the first measured wave 40 which has a positive voltage value slightly lower than the emitted voltage, - an impedance of bus 16 equal to the reference impedance 26: this is the case of the second measured wave 42 which has a zero voltage value.

[0054] However, in the example of [Fig.3], it is not possible to distinguish the following two situations, both of which correspond to a measured wave of zero voltage: - an impedance of bus 16 less than the reference impedance 26, - an impedance of bus 16 equal to the reference impedance 26.

[0055] To allow verification of the impedance of bus 16 in all cases, i.e. for: - an impedance of bus 16 less than the reference impedance 26, - an impedance of bus 16 equal to the reference impedance 26, - an impedance of bus 16 greater than the reference impedance 26; one solution is to send a signal consisting of a long voltage square followed by a short voltage pulse.

[0056] Thus, in step E2, the voltage signal sent consists of a long voltage pulse followed by a short voltage pulse. The long voltage pulse determines whether the bus impedance 16 is less than the reference impedance 26 and calculates its value in that case. The short voltage pulse determines whether the bus impedance 16 is greater than or equal to the reference impedance 26 and calculates its value in that case.

[0057] In step E3, the measurement by the measuring means 22 of the first component 12 of a reflected voltage signal 32 from the bus 16 therefore corresponds to a sequence composed of a response to the voltage square according to the example of [Fig.2] and a response to the voltage pulse according to the example of [Fig.3].

[0058] The E4 step of memorizing the measurement in memory 36 can allow for further analysis of the measurements or a subsequent analysis of the measurements.

[0059] Step E5 of analyzing the measurement to determine whether the impedance of bus 16 is acceptable or not can be carried out in several ways.

[0060] The simplest way is to determine a threshold voltage value for measuring the reflected signal 32. For example, the criterion for determining whether the bus impedance 16 is acceptable could be the following: - the voltage response signal must have a voltage higher than a first threshold voltage, and - the voltage pulse response signal must have a voltage lower than a second threshold voltage.

[0061] If either of the two above conditions is not met, then bus 16 or the entire electronic circuit is reported as not meeting the criterion. For example, a diagnostic is sent back to the operator or the control unit in an embedded application.

[0062] A more complex way of determining whether the impedance of bus 16 is acceptable is to calculate the value of the impedance of bus 16 and compare it to a range of impedance values ​​considered acceptable.

[0063] Analysis of the impedance measurement also makes it possible to detect capacitive behavior.

[0064] In some cases, the electronic trace corresponding to bus 16 does not have the same characteristics along its entire length. Indeed, in a printed circuit board, for example, the traces are not monotonous, particularly due to layer changes.

[0065] Figure 4 represents such a printed circuit board. To analyze the routing in more detail, it is possible to record the discontinuities in the memory 36 of the first component 12. In this case, several measurement points are taken, for example, by means of an acquisition of the analog-to-digital converter over a longer period.

[0066] Figure 5 shows an example of a voltage measurement performed within the printed circuit board of Figure 4 using the measuring means 22. The measurement detects impedance breaks along the trace, represented by discontinuities 46 in the voltage measurement. These impedance breaks are due to vias 48 along the bus trace 16. Thus, the detection of these impedance breaks determines that the impedance of bus 16 is unacceptable and rejects the printed circuit board.

[0067] Similarly, with a single sampling point, the emission of a long voltage pulse is followed by the sending of a short pulse to cover all possible deviations and obtain a better diagnosis.

[0068] According to an improvement of the invention, the method further comprises a step:

[0069] - E6: of determining the maximum operating frequency of the bus in function of the slope of the square wave or impulse from which the impedance is degraded.

[0070] Indeed, by adjusting the rise time of the voltage pulse or pulse, it is also possible to determine at which frequency, close to the target frequency, the electronic circuit is best suited and thus modify the operating speed of bus 16 accordingly. Step E6 is particularly relevant in the context of network cards including, for example, an expansion bus according to the PCI Express standard, "Peripheral Component Interconnect Express" according to the commonly used Anglo-Saxon name.

[0071] Fig. 6 shows an example of a wave emitted 38 in the bus 16 comprising a sequence of voltage pulses 50 exhibiting edges 52 with different rise times.

[0072] For example, if a pulse with a rise time of 200ps gives good results in terms of impedance and the impedance degrades by decreasing the rise time, then the maximum speed of the bus will be fixed at 1.75 GHz by virtue of the following relationship relating the frequency F to the rise time T: F = 0.35 / T.

[0073] In the case where the analysis carried out in step E5 has made it possible to identify a bus impedance lower than the theoretical bus impedance, i.e. the target impedance, within a tolerance margin, the method of the invention may further comprise the following step:

[0074] - E7: series connection of an additional impedance within the first component 12.

[0075] According to an improvement, the process may further comprise the following step:

[0076] - E8: within the second component 14, connection of a variable impedance in parallel of the reference resistance 26 and adaptation of the variable impedance so as to cancel Fonde reflected in the bus 16.

[0077] The invention has many advantages, including:

[0078] - rapid diagnosis;

[0079] - a possible activation on each printed circuit board;

[0080] - a precision of diagnosis.

[0081] Legend: 10 electronic circuit 12th first component 14 second component 16 buses 18 first functional set 20 means of emission 22 means of measurement 24 second functional set 26 reference impedance 28 switching methods 30 voltage signal 32 reflected voltage signal 34 logic units 36 memories 38 wave emitted 40 wave measured when the bus impedance is lower than the reference impedance 42 wave measured when the bus impedance is equal to the reference impedance 44 Measured waveform when bus impedance is greater than reference impedance 46 Discontinuity 48 vias 50 pulses 52 front

Claims

Demands

1. Impedance verification method implemented in an electronic circuit (10) comprising a first component (12), a second component (14) and an electronic bus (16) capable of establishing communication between the first component (12) and the second component (14), - the first component (12) comprising: - means for emitting a voltage, and - means for measuring a voltage;- the second component (14) comprising: - a reference impedance (26) equal to the theoretical impedance of the bus (16), and - switching means (28) having a connected state in which the reference impedance (26) is connected to the bus (16) and a disconnected state in which the reference impedance (26) is disconnected from the bus (16), the method being characterized in that it comprises the following steps: - E1: within the second component (14), putting the switching means (28) into the connected state so as to connect the reference impedance (26) to the bus (16);- E2: sending a voltage signal (30) into the bus (16) by the transmitting means (20) of the first component (12), - E3: measurement by the measuring means (22) of the first component (12) of a reflected voltage signal (32) from the bus (16), the first component (12) further comprising a memory (36), the method further comprises a step E4 of memorizing the measurement in the memory (36) and in that it further comprises the following step: - E5: analysis of the measurement carried out in step E3 according to at least one predefined criterion in order to determine whether the bus impedance is acceptable or not.

2. Impedance verification method according to claim 1, characterized in that the predefined criterion includes at least one voltage threshold value for measurement.

3. A method for verifying impedance according to any one of claims 1 or 2, characterized in that in step E2, the signal voltage (30) sent consists of a long voltage square followed by a short voltage pulse.

4. Impedance verification method according to any one of claims 1 to 3, characterized in that in step E2, the voltage signal (30) sent comprises several short voltage pulses having several steepnesses of voltage rise slope and in that it further comprises a step: - E6: of determining the maximum operating frequency of the bus as a function of the steepness from which the impedance is degraded.

5. Impedance verification method according to any one of claims 1 to 4, characterized in that it is implemented in an automated manner by a system embedded within the electronic circuit (10).

6. Impedance verification method according to any one of claims 1 to 5, characterized in that, the analysis carried out in step E5 having identified a bus impedance lower than the theoretical bus impedance within a tolerance margin, it further comprises the following step: - E7: series connection of an additional impedance within the first component (12).

7. Impedance verification method according to any one of claims 1 to 6, characterized in that it further comprises the following step: - E8: within the second component (14), connection of a variable impedance in parallel with the reference resistance (26) and adaptation of the variable impedance so as to cancel the wave reflected in the bus (16).

8. An electronic circuit (10) suitable for implementing the method according to any one of claims 1 to 7, said electronic circuit (10) comprising a first component (12), a second component (14), and an electronic bus (16) suitable for establishing communication between the first component (12) and the second component (14), - the first component (12) comprising: - means for emitting a voltage, and - means for measuring a voltage; - the second component (14) comprising:

9.

10.

11. - a reference impedance (26) equal to the theoretical impedance of the bus (16), and - switching means (28) having a connected state in which the reference impedance (26) is connected to the bus (16) and a disconnected state in which the reference impedance (26) is disconnected from the bus (16), the electronic circuit (10) being characterized in that it further comprises, in addition to a nominal state, a test state in which: - the transmitting means (20) are configured to send a predefined voltage signal (30) into the bus, - the switching means (28) are configured in the connected state, and - the measuring means (22) are configured to measure a reflected voltage signal (32) from the bus. Electronic circuit (10) according to claim 8, characterized in that the first component (12) is a microcontroller. Electronic circuit (10) according to any one of the claims 8 or 9, characterized in that the second component (14) is a transceiver or network switch. Electronic circuit (10) according to any one of claims 8 to 10, characterized in that the measuring means (22) comprise an analog-to-digital converter or analog comparison means.

Images