Capacitive depth image sensor
The depth pixel design with a controllable storage area and transfer grids addresses the challenge of compactness and sensitivity in load-based architectures by enabling efficient correlated double sampling, reducing thermal noise and blind spots, thus improving image sensor performance.
FR3170200A1Pending Publication Date: 2026-06-19COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Patent Information
- Authority / Receiving Office
- FR · FR
- Patent Type
- Applications
- Current Assignee / Owner
- COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Filing Date
- 2024-12-13
- Publication Date
- 2026-06-19
Smart Images
Figure 00000000_0000_ABST
Abstract
The invention relates to a sensor comprising a depth pixel having a controllable storage area which successively includes a potential barrier, a memory region, a pinch-off area; a transfer grid opposite the barrier; an inverse transfer grid opposite the barrier and the photosensitive region; a pinch-off grid opposite the memory forming a coupling capacitor with the memory. A charge flow path above the photosensitive region includes a collection area separated from the photosensitive region by a channel; and an initialization grid opposite the channel. A circuit is configured to: sample a signal from the memory; disconnect the pinch-off area and the capacitor; clear the memory by activating the inverse transfer and initialization grids; and read an electrical potential from the capacitor. (See Figure 3A for the abstract.)
Need to check novelty before this filing date? Find Prior Art