EQUIPMENT FAILURE MONITORING CIRCUIT

A hardware-based fault monitoring circuit with sensor interfaces, scaling amplifiers, and logic gates addresses software vulnerability in power electronics, enhancing reliability and accuracy while reducing power consumption and costs.

FR3170730A1Pending Publication Date: 2026-06-26EATON INTELLIGENT POWER LTD

Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
EATON INTELLIGENT POWER LTD
Filing Date
2025-12-12
Publication Date
2026-06-26

AI Technical Summary

Technical Problem

Existing fault detection in power electronics, such as inverters, is vulnerable to software failures and requires costly, power-consuming hardware solutions like CPLDs or FPGAs, lacking reliability and accuracy.

Method used

A hardware-based fault monitoring circuit with sensor interfaces, scaling amplifiers, comparators, and logic gates provides secure, reliable, and low-power fault detection with hysteresis characteristics, preventing instability due to sensor variations and noise.

Benefits of technology

The hardware fault monitoring circuit enhances reliability and reduces control device failures by offering accurate and fast fault responses with low power consumption and cost, improving system stability.

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Abstract

A fault detection circuit provides hardware-based fault detection to a system that includes power electronics. The fault detection circuit includes sensor interfaces and scaling amplifiers to scale sensor outputs for comparison with reference voltages at the respective comparators. The logic levels at the comparator outputs are received at logic gate circuits and used to determine a master logic level, which is used to drive a gate driver, thus directing a fault detection response through the fault detection circuit. The fault detection circuit can be included in a motor control device, such as a hydraulic power unit motor driver. Figure for abstract: [Fig 1]
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Description

Title of the invention: HARDWARE FAILURE MONITORING CIRCUIT Technological background

[0001] The reliability of power electronics such as inverters is becoming increasingly important as a result of electrification, for example in automotive or aerospace applications. Faults can impact power electronics and the systems that depend on them, leading to inefficiency, component deterioration, system shutdown, or other similar effects. Existing fault detection is generally software-based, which makes it vulnerable to control device failures such as voltage drop, software corruption, security vulnerabilities, and a lack of safety that may be necessary for critical components, for example in aerospace.Alternatively, additional hardware such as complex programmable logic devices (CPLDs) or field-programmable gate arrays (FPGAs) can be used for fault monitoring, but these are generally large, expensive, and / or add significantly to power consumption. Summary

[0002] This disclosure relates to a hardware failure monitoring circuit for power electronics, and electronics such as motor control units including the hardware failure monitoring circuit.

[0003] By providing a simple hardware logic system for fault detection, embodiments of the present disclosure can provide secure and reliable built-in fault detection and response in power electronics such as inverters, motor control units, and the like, for example in applications such as hydraulic power unit motor control units, while exhibiting high reliability, low cost, and low power consumption. The hardware fault monitoring system can provide more accurate and faster fault responses compared, for example, to fault detection based on a control device.The hardware failure monitoring circuit can be configured to exhibit hysteresis characteristics, preventing instability due to variations in sensor readings, noise, operations near failure thresholds, transient or similar effects.

[0004] Hardware failure monitoring circuits according to embodiments can reduce the frequency of control device failures, thereby increasing the reliability of modules or devices where control devices tend to be among the components exhibiting the lowest mean time between failures, such as in hydraulic power units.

[0005] In one embodiment, a fault monitoring circuit includes one or more sensor interfaces and one or more scaling amplifiers. Each scaling amplifier is connected to a respective sensor interface. Each scaling amplifier is configured to output a scaled voltage proportional to a voltage received from its respective sensor interface. The fault monitoring circuit further includes one or more comparators, each configured to receive the scaled voltage from one or more scaling amplifiers and to output a logic level based on the scaled voltage. The logic level indicates a healthy state or a fault.The fault monitoring circuit further includes a logic gate circuit configured to receive the logic level from each of the one or more comparators and to output a master logic level signal.

[0006] In one embodiment, a method includes receiving one or more voltages at one or more respective sensor interfaces. The method further includes scaling the one or more received voltages using one or more respective scaling amplifier circuits to output one or more scaled voltages. The method further includes comparing the one or more scaled voltages to one or more respective reference voltages using one or more respective comparators to output one or more respective logic levels. The method also includes determining a master logic level using one or more logic gate circuits based on the one or more logic levels, and actuation of a gate driver based on the master logic level.

[0007] A variety of additional inventive aspects will be set forth in the following description. These inventive aspects may relate to individual features and combinations of features. It should be understood that the preceding general description and the detailed description that follows are merely examples and explanations and are not exhaustive of the general inventive concepts on which the embodiments disclosed herein are based. Brief description of the drawings

[0008] The accompanying drawings, which are incorporated into and form part of the description, illustrate several aspects of this disclosure. A brief description of the drawings is as follows:

[0009] Fig. 1 represents a diagram of a fault monitoring circuit according to one embodiment;

[0010] Fig. 2 represents a circuit diagram for examples of a scaling amplifier and comparator according to one embodiment;

[0011] Fig. 3 represents a circuit diagram for an example of a fault detection logic circuit according to one embodiment;

[0012] The [Fig.4] represents a fault detection method according to one embodiment;

[0013] Figure 5 shows a diagram of a hydraulic power unit according to a mode of realization. Detailed description

[0014] We will now refer in detail to exemplary aspects of this disclosure which are illustrated in the accompanying drawings. Where possible, the same numerical references will be used throughout the drawings to designate identical or similar parts.

[0015] Hardware fault monitoring using fault monitoring circuits according to embodiments can provide safe and reliable fault detection and response in power electronics such as inverters, motor control units, hydraulic power units, and the like. Hardware monitoring can provide such fault detection and response with high reliability, low cost, and low power consumption. Hardware fault monitoring can also provide more accurate and faster fault responses compared to, for example, fault detection based on a control device.

[0016] Figure 1 shows a schematic diagram of a fault monitoring circuit according to one embodiment. A fault monitoring circuit 100 includes sensors 102, sensor interfaces 104, scaling amplifiers 106, comparators 108, and a fault detection logic circuit 110. The fault detection logic circuits 110 can be connected to a grid driver 112. The grid driver 112 can control the operation of an inverter 114. In one embodiment, the control device 116 may also optionally be included in the fault monitoring circuit 100.

[0017] The fault monitoring circuit 100 is configured to provide hardware-based fault detection in the power electronics, such as the inverter 114, based on inputs from the sensors 102. The fault monitoring circuit 100 can direct the shutdown of the electronics when a fault is detected, for example by means of the operation of the grid driver 112 on the basis of a master logic level signal delivered at the output by the fault monitoring circuit 100. The fault monitoring circuit 100 can optionally be combined with a control device 116 providing software-based fault detection in parallel with the fault detection performed by the fault monitoring circuit 100.

[0018] The sensors 102 are sensors configured to provide a voltage signal indicative of a measured condition. The conditions measured by the respective sensors 102 can be any suitable condition indicative of a fault in the system monitored by the fault monitoring circuit 100. Non-limiting examples of conditions measured by the respective sensors 102 may include current, voltage, temperature, or pressure. In one embodiment, at least some of the sensors 102 may be positioned on a circuit board of a device to be monitored by the fault monitoring circuit 100. In one embodiment, the sensors 102 may be sensors included as a single unit on a circuit board of the device. In another embodiment, the sensors 102 are separate sensors applied to the circuit board of the device.In one embodiment, the sensors 102 include at least one voltage sensor, at least one current sensor, and / or at least one temperature sensor. The sensors 102 may further include a pressure sensor, or any other suitable type of sensor capable of measuring a condition indicative of a fault. While three sensors 102 are shown in [Fig. 1], more or fewer sensors 102 may be provided to measure conditions within the system monitored by the fault monitoring circuit 100.

[0019] Sensor interfaces 104 are each configured to receive a signal from one of the respective sensors 102 and provide the signal to one of the respective scaling amplifiers 106. The sensor interfaces 104 may be, for example, wires or any other suitable electrical connection, or a combination thereof, linking the outputs of the sensors 102 to the scaling amplifiers 106. One sensor interface 104 may be provided for each of the sensors 102 used to determine faults. Each sensor interface 104 may connect to one of the respective scaling amplifiers 106. While three sensor interfaces 104 are illustrated in [Fig. 1], more or fewer sensor interfaces 104 may be provided to supply one sensor interface 104 to each of the sensors 102.

[0020] The scaling amplifiers 106 are circuits each configured to proportionally scale the voltage of a respective sensor output from the respective sensor interface 104 such that the voltage from the scaling amplifier is suitable for use by the respective comparator 108. A scaling amplifier 106 may be provided for each sensor interface 104 included in the fault monitoring circuit 100. The scaling amplifiers 106 include one or more operational amplifiers and suitable resistors, capacitors, connections to voltages, and the like, such that the gain of the operational amplifier scales the voltage from the sensor output to a range suitable for input into the respective comparator 108.In one embodiment, the gain of each scaling amplifier 106 can be selected to scale the voltage to a value where the sensor output received at the sensor interface 104 is greater than a reference voltage of the respective comparator 108 when the sensor output is indicative of healthy operation, and less than the reference voltage when the sensor output is indicative of a fault, or vice versa. In one embodiment, the scaling amplifiers 106 can further be connected to the control device 116, so that the scaling voltages can be received at the control device 116, for example, at an analog-to-digital converter included within it. In one embodiment, the gain for the operational amplifiers is selected such that the scaling voltage output of the scaling amplifiers 106 is in the range of 0 to 5 volts DC. A non-limiting example of a circuit for the scaling amplifier 106 is shown in [Fig. 2] and described in more detail below. While three scaling amplifiers are shown in [Fig. 1], more or fewer scaling amplifiers can be provided to supply a scaling amplifier 106 corresponding to each of the sensor interfaces 104.

[0021] The comparators 108 are each configured to receive a voltage from a respective amplifier among the scaling amplifiers 106 and a reference voltage, and to output an indicative logic level voltage based on a comparison of the voltage received from the scaling amplifier 106 and the reference voltage. The reference voltage may be a fixed voltage. The reference voltage may be a predetermined value based on the characteristics of the voltages from the sensors 102 scaled by the respective scaling amplifier 106 and the indicative fault characteristics.The comparators 108 can be configured such that they exhibit hysteresis, with a certain threshold for switching the comparator 108 output from healthy operation to fault state, and a different threshold for switching the comparator 108 output from fault state to healthy operation. This hysteresis can prevent constant switching. between the healthy state and the fault state, for example by maintaining a fault state once the fault state has been detected. The hysteresis exhibited by the comparators 108 can provide stability and prevent rapid switching between healthy and fault states, for example due to noise, transient conditions, operations near fault limits, and the like. The comparators 108 can be operational amplifier circuits, for example as described below and illustrated in [Fig. 2]. While three comparators 108 are shown in [Fig. 1], more or fewer comparators 108 can be provided to supply a comparator 108 corresponding to each of the scaling amplifiers 106.

[0022] The fault detection logic circuit 110 is a circuit including one or more logic gates configured to receive logic levels at the output of comparators 108, and based on the received logic levels, output a master logic level signal. The fault detection logic circuit 110 includes logic gates capable of receiving each of the voltages from the respective comparators 108. In one embodiment, the fault detection logic circuit 110 may include a plurality of AND gates, such that the detection of a fault indicated by the output from any of the comparators 108 results in a master logic level signal indicating a fault. In one embodiment, the fault detection logic circuit 110 may receive a logic level output by the control device 116.

[0023] The gate driver 112 can be a gate driver connected to the device monitored by the fault monitoring circuit 100, such as the inverter 114. The gate driver 112 can provide a drive signal, such as a pulsed-wave modulation (PWM) signal, for a high-power transistor, such as a metal-oxide-semiconductor field-effect transistor (MOSFET) in the device. The gate driver 112 is configured to receive a master logic signal from the fault detection logic circuits 110, and when the master logic signal indicates a fault, the gate driver is configured to implement a corrective action in response to the fault. The corrective action can be, for example, modifying the output of the gate driver 112 to stop or modify the operations of the device monitored by the fault monitoring circuit 100, for example, by stopping or modifying the PWM signal supplied to the MOSFET.

[0024] In one embodiment, the master logic level signal from the fault detection logic circuit 110 can be supplied to a control device, such as the control device 116, and the control device can be actuated to implement corrective actions such as stopping the device or system by means of appropriate software when the master logic level signal is indicative of a fault.

[0025] The inverter 114 is an example of a power electronics device capable of being monitored and controlled by the fault monitoring circuit 100. In some embodiments, the fault monitoring circuit 100 can be applied to other devices such as other power electronics components. The inverter 114 can be controlled based on the output of the gate driver 112. For example, the gate driver 112 can be connected to one or more metal-oxide-semiconductor field-effect transistors (MOSFETs) of the inverter 114 to trigger shutdown or adjust the operation of the inverter 114 when the gate driver 112 receives the master logic-level signal indicating a fault. In one embodiment, the inverter 114 is a component of another device or system such as a hydraulic power unit.

[0026] The control device 116 is a control device configured to receive the outputs from sensors 102 or the scaled sensor outputs from the scaling amplifier 106, and to determine, using software included in the control device 116, whether a fault is present. The control device 116 and the software used by it may be standard fault detection software for use in power electronics. The control device 116 may include one or more processors and one or more memories suitable for storing and executing the software instructions to perform fault detection based on measurements by the sensors 102. The control device 116 may be a control device included in the device monitored by the fault monitoring circuit 100, for example, a control device for a hydraulic power unit, an inverter 114, or the like.The control device 116 can be used for fault detection in parallel with the fault monitoring circuit 100. In one embodiment, the control device 116 can output a logic level to the fault detection logic circuit 110, the logic level indicating whether a fault has been detected by the control device 116. The logic level can be received at any of the logic gates of the fault detection logic circuit 110 and used to determine a fault in the fault detection logic circuit 110 and the corresponding operation of the grid driver 112. In one embodiment, the control device 116 can be connected to the grid driver 112 to direct responses to faults detected by the control device 116.For example, the grid driver 112 can be controlled based on fault detection by the fault monitoring circuit 100 or the control device 116. In one embodiment, the control device 116 is configured to detect the same faults as those detected by the fault monitoring circuit 100, for example, to provide redundancy in fault detection and response. In another embodiment... In implementation, the control device 116 can be configured to detect at least some different faults than those detected by the fault monitoring circuit 100, for example to provide more comprehensive fault detection and response.

[0027] Figure 2 shows a circuit diagram for examples of a scaling amplifier 106 and a comparator 108 according to one embodiment. Each respective sensor interface 104 can be connected to a respective scaling amplifier 106 and a respective comparator 108, such as the example circuits illustrated in Figure 2.

[0028] The scaling amplifier 106 includes an operational amplifier 200 with suitable ground connections connected to the respective resistor 202 and capacitor 204. The resistor 202 and capacitor 204 are selected to obtain the desired gain for scaling the amplifier 106 in order to scale the signal from the sensor interface 104 to a suitable voltage for the comparator 108. In the embodiment shown in [Fig. 2], the output of the operational amplifier 200 is connected to the comparator 108 and also to the control device 116. A resistance-capacitor filter (RC filter) may be included in the connection of the output of the operational amplifier 200 to the control device 116.

[0029] The comparator 108 includes an operational amplifier 210, a reference voltage input 212, and a resistor 214. The positive feedback to the operational amplifier 210 through the resistor 214 in the circuit for the comparator 108 can provide hysteresis in the response characteristics of the comparator 108, thus requiring a threshold to cause the output of the comparator 108 to change from healthy operation to the fault state, and a different threshold to change the output of the comparator 108 from the fault state to healthy operation. The hysteresis provided by the comparator 108 increases the stability of the logic output of the comparator 108, thereby preventing rapid switching between logic states for healthy operation or the presence of a fault based on noise, transient conditions, operation near the fault threshold, or the like.The output of comparator 108 can be connected to the fault detection logic circuit 110.

[0030] Figure 3 shows a circuit diagram for a fault detection logic circuit, example 110, according to one embodiment. The fault detection logic circuit 110 includes a plurality of logic gates 302. The logic gates 302 are configured to receive outputs from each of the comparators 108 of the fault monitoring circuit 100, which includes the fault detection logic circuit 110. The logic gates 302 can be AND gates where the healthy operating outputs are a logic '1', so that any fault results in a logic '0' in the circuit. The fault detection logic 110 would cause the logic gate to return a "0" indicating the presence of a fault as the master logic level. Sufficient logic gates 302 can be included to accept an output from each of the comparators 108, and connected such that the outputs of all the comparators 108 are used to determine a master logic level signal, which is output from the fault detection logic circuit 110. The master logic level can be a "1" indicating healthy operation based on the outputs of all the sensors 102, or a "0" when a fault is determined based on a scaled output from at least one of the sensors 102. The output of the final logic gate 302 providing the master logic level can, for example, be connected to the gate driver 112.

[0031] In one embodiment, an input to the fault logic circuit 110 can be a logic signal delivered at the output by the control device 116. The logic signal delivered by the control device 116 can be based on the determination of a fault by the control device 116, for example, based on the scaling voltages received at the control device 116 from the scaling amplifiers 106. The logic signal delivered at the output by the control device 116 can be a logic "1" when the control device 116 does not determine that a fault is present, and a logic "0" when the control device 116 determines the presence of a fault.The logic signal delivered at output by the control device 116 can be processed by the logic gates 302 in the same way as the outputs from the comparators 108, such that when the control device 116 delivers a logic "0" at output, the master logic level is a "0" indicating a fault, and when the control device 116 delivers a logic "1" at output, the master logic level can be a "0" or a "1" depending on whether a fault is indicated or not by any of the outputs of the comparators 108 connected to the logic gates 302.

[0032] Figure 4 illustrates a fault detection method according to one embodiment. The method 400 includes receiving voltages from sensors at respective interfaces 402, scaling the received voltages using respective scaling amplifier circuits 404, comparing the scaled voltages to respective reference voltages 406, determining a master logic level based on the comparison outputs at one or more logic gate circuits 408, and operating a gate driver based on the master logic level 410. Optionally, the method 400 may further include receiving the scaled voltages at a control device 412 and determining a fault using the control device 414.

[0033] Method 400 is a hardware-based fault detection and corrective action triggering method. In one embodiment, software-based fault detection may optionally be performed in parallel with the hardware-based fault detection in Method 400, for example, by receiving scaled voltages at a control device 412 and determining a fault using the control device 414. Method 400 may be repeated, for example, by being performed periodically or continuously to monitor the occurrence of faults or fault-ending conditions during the operation of a system such as a motor control device or a hydraulic power unit incorporating such a motor control device.In one embodiment, method 400 can be implemented in other power electronics systems, for example to control an inverter in order to detect and respond to faults in such a system. Method 400 can be carried out using hardware components arranged according to the fault detection circuit 100 described above and illustrated in [Fig. 1].

[0034] Voltages are received from sensors at respective interfaces in 402. The voltages are indicative of measured parameters as detected by sensors, such as voltage, current, temperature, and / or pressure sensors. The sensors can be selected to measure parameters indicative of a fault in a device or system, such as a hydraulic power unit, an inverter, control devices thereof, or the like. The voltages can be received in 402 at a respective interface for each sensor, such as a wire or other electrical connection linking the sensor output to a respective scaling amplifier circuit.

[0035] The received voltages can be scaled using respective scaling amplifier circuits in 404. The scaling amplifier circuits can be, for example, scaling amplifiers 106 as described above and shown in Figures 1 and 2. The scaling of the received voltages can be a proportional scaling of the received voltage to a suitable voltage range for an input into comparators, such as comparators 108 as described above and shown in Figures 1 and 2. The scaling to 404 can be carried out using an operational amplifier circuit configured to have a predetermined gain selected to scale the output of the respective sensor to the appropriate voltage range, for example by selecting the capacitor and resistor used in the amplifier circuit.The scaled voltages at 404 can then be supplied to the respective comparators.

[0036] The scaled voltages are compared to respective reference voltages 406 using the respective comparator circuits, such as comparators 108 as described above and shown in Figures 1 and 2. The comparison with 406 can provide the reference voltage when the scaled voltage is indicative of proper operation, and provide a different output voltage when the scaled voltage is indicative of a fault. The comparators 108 can exhibit hysteresis, for example by including positive feedback as described above and shown in [Fig. 2].Hysteresis can introduce a threshold for switching the comparator output from healthy to faulty operation, and a different threshold for switching the comparator output from faulty to healthy operation, thus preventing rapid switching between healthy and faulty states based on noise, transient conditions, near-fault threshold operations, or similar factors. The output of each comparator can be supplied to the respective inputs of a logic gate circuit.

[0037] A master logic level is determined based on comparisons at the level of a 408 logic gate circuit. Logic gate circuits may include a plurality of hardware logic gates configured to receive each of the comparator outputs from the 406 comparisons and to determine the master logic level based on each of the outputs. The logic gate circuit used to determine the master logic level at 408 may be the 110 logic gate circuit as discussed above and shown in Figures 1 and 3. The logic gate circuit may include one or more logic gates such that all comparator outputs can be received as inputs and output a master logic level.The logic gates used to determine the master logic level can be AND gates where a logic "1" represents a comparator output indicating healthy operations and a logic "0" represents a comparator output indicating a fault. In one embodiment, when a comparator output determined in 406 indicates a fault, the master logic level determined in 408 is a "0", and when no fault is indicated, the master logic level determined in 408 is a "1" based on the arrangement of the AND gates in the logic gate circuit.

[0038] A grid driver is actuated based on the master logic level signal in 410. The grid driver may be a grid driver of the device or system being monitored for faults according to method 400, such as a hydraulic power unit, an inverter, control devices thereof, or the like. The grid driver may receive the master logic level as a signal from the logic gate circuit determining the master logic level in 408, for example, logic gate circuit 110. The grid driver may operate the device or system In 410, normal operation occurs when the master logic level indicates healthy operation, for example, by providing appropriate PWM or analog signals to one or more high-power transistors in the system or device, such as an internal MOSFET. The gate driver can modify or stop the operation of the device or system in 410 when the master logic level signal indicates a fault, for example, by modifying or stopping the PWM or analog signal.

[0039] Optionally, the method 400 may further include receiving the scaled voltages at a control device 412 and determining a fault using the control device at 414. The control device may be, for example, the control device 116 discussed above and illustrated in [Fig. 1]. The scaled voltages may be received at the control device at 412 via connections from each scaling amplifier circuit to the control device. The scaled voltages may be filtered, for example, through an RC filter included in the connection from the scaling amplifier circuit to the control device.The voltages received at 412 can be used by the control device 414 to determine if a fault is present, for example, by using suitable software to process the received voltages to determine if a fault is present. Fault determination at 414 can be performed in parallel with fault determination by comparing the scaled voltages at 406 and determining faults based on the comparison outputs at 408. In one embodiment, the fault determination at 414 can be provided as a logic level supplied to the logic gate circuit for use in determining the master logic level at 408. In one embodiment, the operation of the gate driver at 410 can be based on fault determination either by one or more logic gate circuits at 408 or by fault determination by the control device at 414.

[0040] Figure 5 shows a schematic diagram of a hydraulic power unit according to one embodiment. The hydraulic power unit 500 includes a power source 502, a control device 504, an inverter 506, and a motor 508. Sensors 510 can be provided at one or more of the power source 502, the control device 504, the inverter 506, and / or the motor 508. The fault monitoring circuit 512 can provide a master logic level based on the outputs of the sensors 510.

[0041] The hydraulic power unit 500 may be an electrically powered hydraulic power unit including a power source 502. The power source 502 may be an electrical power source, such as a or Several batteries are configured to provide power to operate the hydraulic power unit 500. The control device 504 is configured to control operations of the hydraulic power unit 500, including the supply of power from the power source 502, the operation of the inverter 506, and / or the operation of the motor 508. The inverter 506 can be provided to convert the direct current (DC) power from the power source 502 into alternating current (AC) power suitable for driving the operation of the motor 508. The motor 508 can drive one or more pumps to provide pressure to a fluid during the operation of the hydraulic power unit 500.

[0042] One or more sensors 510 may be provided to measure conditions at one or more of the power supply 502, the control device 504, the inverter 506 and / or the motor 508. Each of the sensors 510 may be configured to measure conditions indicative of potential failures at the respective component where the sensor 510 is provided, such as voltage, current, temperature, pressure or the like, and deliver at the output a voltage indicative of the measured condition.

[0043] The fault monitoring circuit 512 can be configured to receive the respective output voltages from one or more sensors 510 and generate a master logic level indicating healthy operation or the presence of a fault based on the received voltages. The fault monitoring circuit 512 can be a hardware circuit configured to output the master logic level as a signal upon receiving voltages from one or more sensors. An exemplary embodiment of the fault monitoring circuit 512 is the fault monitoring circuit 100 as described above and shown in [Fig. 1]. The fault monitoring circuit 512 can be connected, for example, to the control device 504, such that the control device 504 directs corrective actions when a fault is indicated by the master logic level.Alternatively, or in addition, the fault monitoring circuit 512 can be connected directly to one or more of the power supply 502, inverter 506, and / or motor 508 to provide the master logic level, and corrective action such as a modification or completion of operations can be performed at the respective power supply 502, inverter 506, and / or motor 508, for example, by actuation of a grid driver included within it. In one embodiment, the control device 504 can be configured to determine the presence of a fault, for example, based on software executed by the control device 504. In one embodiment, the determination of a fault at the control device 504 can be provided to the fault monitoring circuit 512 as a... logic level input into logic gates used to determine the master logic level of the 512 fault monitoring circuit. Aspects of disclosure:

[0044] It is understood that any one of aspects 1 to 13 can be combined with any one of aspects 13 to 20.

[0045] Aspect 1 of the disclosure relates to a fault monitoring circuit, comprising:

[0046] one or more sensor interfaces;

[0047] one or more scaling amplifiers, each scaling amplifier being connected to a respective sensor interface of one or more sensor interfaces, each of the one or more scaling amplifiers being configured to deliver at output a scaling voltage proportional to a voltage received from the respective sensor interface;

[0048] one or more comparators each configured to receive the scaled voltage from one or more scaling amplifiers and to output a logic level based on the scaled voltage, the logic level being indicative of a healthy state or a fault;

[0049] a logic gate circuit configured to receive the logic level from each of the one or more comparators and to deliver a master logic level signal at the output.

[0050] Aspect 2 relates to a fault monitoring circuit according to aspect 1, in which one or more comparators exhibit hysteresis.

[0051] Aspect 3 relates to a fault monitoring system according to aspect 1 or aspect 2, further including one or more sensors connected to one or more sensor interfaces.

[0052] Aspect 4 relates to a fault monitoring system according to aspect 3, in which the one or more sensors include at least one of a voltage sensor, a current sensor and a temperature sensor.

[0053] Aspect 5 relates to a fault monitoring system according to aspect 4, in which one or more sensors include a voltage sensor, a current sensor and a temperature sensor.

[0054] Aspect 6 relates to a fault monitoring system according to aspect 4 or aspect 5, in which the one or more sensors further include a pressure sensor.

[0055] Aspect 7 relates to a fault monitoring system according to any one of aspects 1 to 6, further comprising a control device configured to receive scaled voltages from one or more scaling amplifiers and determine a fault on the basis of the scaled voltages.

[0056] Aspect 8 relates to a fault monitoring system according to aspect 7, in which the control device is configured to operate a door driver on the basis of the fault determination.

[0057] Aspect 9 of the disclosure relates to a fault monitoring circuit according to any one of aspects 1 to 8, further comprising a gate driver.

[0058] Aspect 10 relates to a fault monitoring system according to aspect 9, in which the door driver is configured to control an inverter.

[0059] Aspect 11 of the disclosure relates to a motor control unit comprising the fault monitoring system according to aspect 10 and the inverter.

[0060] Aspect 12 of the disclosure relates to a hydraulic power unit including the motor control unit according to aspect 11.

[0061] Aspect 13 of the disclosure relates to a process, comprising the steps of: receive one or more voltages at one or more respective sensor interfaces. scale the one or more received voltages using one or more respective scaling amplifier circuits to deliver one or more scaled voltages at the output; compare the one or more scaled voltages to one or more respective reference voltages using one or more respective comparators to deliver one or more respective logic levels at output; determine a master logic level using one or more logic gate circuits based on one or more logic levels; and operate a grid driver based on the master logic level.

[0062] Aspect 14 relates to a method according to aspect 13, further comprising the measurement of one or more voltages, temperatures or one or more currents using one or more respective sensors to generate the one or more voltages.

[0063] Aspect 15 relates to a method according to aspect 13 or aspect 14, further comprising the measurement of a pressure using a pressure sensor to generate one or more voltages.

[0064] Aspect 16 relates to a method according to any one of aspects 13 to 15, in which one or more comparators are configured to exhibit hysteresis when delivering the output of one or more respective logic levels.

[0065] Aspect 17 relates to a method according to any one of aspects 13 to 16, in which the operation of the door pilot controls the operation of an inverter.

[0066] Aspect 18 relates to a method according to aspect 17, in which the inverter is included in a motor control unit.

[0067] Aspect 19 relates to a method according to any one of aspects 13 to 18, further comprising receiving one or more scaled voltages at a control device and determining a fault using the control device.

[0068] Aspect 20 relates to a method according to aspect 19, further comprising an operation of the door pilot on the basis of an output from the control device.

[0069] Having described the preferred aspects and implementations of this disclosure, modifications and equivalents of the disclosed concepts may readily be apparent to a person skilled in the art. However, it is intended that these modifications and equivalents will be included within the scope of the claims annexed hereto.

Claims

Demands

1. Fault monitoring circuit, comprising: one or more sensor interfaces; one or more scaling amplifiers, each scaling amplifier being connected to a respective sensor interface of the one or more sensor interfaces, each of the one or more scaling amplifiers being configured to output a scaled voltage proportional to a voltage received from the respective sensor interface; one or more comparators each configured to receive the scaled voltage from some of the one or more scaling amplifiers and to output a logic level based on the scaled voltage, the logic level being indicative of a healthy state or a fault;a logic gate circuit configured to receive the logic level from each of the one or more comparators and to output a master logic level signal.

2. Fault monitoring circuit according to claim 1, wherein one or more comparators exhibit hysteresis.

3. Fault monitoring circuit according to claim 1 or 2, further including one or more sensors connected to one or more sensor interfaces.

4. Fault monitoring circuit according to claim 3, wherein the one or more sensors include at least one of a voltage sensor, a current sensor and a temperature sensor.

5. Fault monitoring circuit according to any one of claims 1 to 4, further comprising a control device configured to receive scaled voltages from one or more scaling amplifiers and determine a fault based on the scaled voltages.

6. Fault monitoring circuit according to claim 7, wherein the control device is configured to operate a gate driver on the basis of the fault determination.

7. Fault monitoring circuit according to any one of claims 1 to 6, further comprising a gate driver.

8. Fault monitoring circuit according to claim 7, wherein the fault driver is configured to control an inverter. 18

9. Motor control unit comprising the fault monitoring circuit of claim 8 and the inverter.

10. Hydraulic power unit including the motor control unit of claim 9.