Non-volatile memory device and method of implementation

Abstract

Title: Non-volatile memory device and method of embodiment The invention relates to a memory device comprising: • a transistor (1), • an interconnection (I) connecting the source (12), comprising: a line (212), a via (222), a first portion (32a) of a stop layer (30) interposed between the via (222) and the line (212), • a memory element (M) connecting the drain (13), comprising: - a first electrode (E1) comprising a line (211), a via (221), and a second portion (32b) of the stop layer interposed between the two, - a layer (31) based on a dielectric or ferroelectric material covering the line (211) and the via (221), - a second electrode (E2) surmounting the layer (31), • an interconnection (I) connecting the gate (10), comprising: a line (212), a via (222), and a third portion (32c) of the arrest layer sandwiched between the two. Figure for the abstract: Fig. 17A