Two-step ion current measurement in device for analysing plasma process

Abstract

To provide a method for acquiring an ion energy distribution measurement value in a plasma processing system.SOLUTION: A method for acquiring an ion energy distribution measurement value, contains steps of: providing a substrate that includes an ion energy analyzer arranged in an inner part, where the analyzer comprises a plurality of conductive grids, and a collection electrode, where each grid is separated by an insulation layer; providing a high-voltage generation circuit that is constructed so as to receive an output voltage of a battery supplied to the high-voltage generation circuit, and apply the voltage to a first grid of the plurality of conductive grids; providing a high-voltage switch constructed so as to discharge the first grid to a floating ground of a device, and a resister in parallel with the high-voltage switch; sampling an ion current while a first voltage is in a first step; and sampling the ion current while a second voltage applied to the first grid is in a second step.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] This application relates to a device for measuring incident charged particle current density and energy distribution reaching a substrate or surface during plasma processing. [Background technology]

[0002] Plasma processing is widely used in a wide range of applications in modern industry. A well-known example is the fabrication of integrated circuits in the semiconductor industry. Plasma processing is also used in the manufacture of solar panels, flat panel displays, thin film coatings, and medical devices, among others.

[0003] The current density (ion flux) and energy distribution of ions reaching the substrate surface strongly influence the performance of plasma-based processes. In semiconductor manufacturing, the substrate is a silicon wafer, while in other industries, the substrate may be a glass panel or various alternatives. Wafer and substrate may be used interchangeably throughout this specification and are understood to refer to any type of substrate used in plasma processes. Throughout the process, the substrate surface is bombarded by plasma species, including energetic ions, to remove (etch) and / or deposit layers of material to form structures or features on the workpiece surface. Ion bombardment may directly drive etching and deposition or may be used to activate the surface for the action of more reactive plasma species. For example, in plasma etching of features in the semiconductor industry, ion flux and related (IED) determine important parameters such as etch rate, etch selectivity, and etch anisotropy. Therefore, IED is an important plasma parameter to measure, understand, and control to ensure optimal process performance.

[0004] European Patent Application No. 21193805.5 describes an apparatus for obtaining ion energy distribution measurements in a plasma processing system, the apparatus comprising: a substrate for placement in the plasma processing system; an ion energy analyzer disposed in the substrate for measuring ion energy distribution at a surface of the substrate during plasma processing, the analyzer comprising a first conductive grid, a second conductive grid, a third conductive grid, a fourth conductive grid, and a collector electrode, each grid separated by an insulating layer; a battery power supply and a battery manager integrated in the substrate for supplying and controlling voltages to each of the grids of the ion energy analyzer and to the collector; and a high voltage generation circuit in the substrate, the high voltage generation circuit comprising a high voltage pulse generator feeding a voltage multiplier, the high voltage generation circuit being configured to receive the output voltage of the battery manager and to supply a third voltage sweep to the third conductive grid.

[0005] The high voltage generation circuit of European Patent Application No. 21193805.5 may be configured to generate a descending voltage sweep and the ion energy analyzer may be configured to sample the ion current while the voltage sweep is descending.

[0006] EP3971942 describes an apparatus for obtaining ion energy distribution (IED) measurements in a plasma processing system, the apparatus comprising: a substrate exposed to plasma for placement in the plasma processing system; an ion energy analyzer disposed in the substrate for measuring the ion energy distribution at the substrate surface during plasma processing, the analyzer comprising a first conductive grid G0, a second conductive grid G1, a third conductive grid G2, a fourth conductive grid G3 and a collector electrode C, each grid separated by an insulating layer; a battery power supply and a battery manager integrated in the substrate for supplying and controlling voltages to each of the grids of the ion energy analyzer and to the collector; and a high voltage generation circuit in the substrate, the high voltage generation circuit receiving the output voltage of the battery manager and supplying a third voltage sweep to the third conductive grid.

[0007] The use of a descending voltage sweep based on a fast charge and slow discharge of a high voltage generation circuit is advantageous in that it requires less power than a continuous mode in which the voltage is gradually increased from zero to a maximum value. However, there are potential problems with using such a descending voltage sweep that are addressed by this application. Summary of the Invention

[0008] A method of operating an apparatus for obtaining ion energy distribution measurements in a plasma processing system includes providing a substrate for placement in the plasma processing system and exposure to plasma, wherein an ion energy analyzer is disposed within the substrate for measuring ion energy distribution at a surface of the substrate during plasma processing, the analyzer comprising a plurality of conductive grids and a collecting electrode C, each grid separated by an insulating layer; and providing a high voltage generation circuit within the substrate, the high voltage generation circuit receiving an output voltage of a battery for powering the high voltage generation circuit and configured to connect the plurality of conductive grids to a collecting electrode C. a high voltage switch configured to discharge the first grid to a floating ground of the device; and a resistor in parallel with the high voltage switch; sampling an ion current during a first phase while a first voltage is charging the first grid from the floating ground potential to a plateau voltage; and sampling an ion current during a second phase while a second voltage applied to the first grid is discharging through the resistor from a predetermined voltage generated by the high voltage generation circuit to the plateau voltage.

[0009] The method may further include closing a switch to discharge the first grid to a floating ground before sampling the ion current during the first stage.

[0010] The method can further include opening a switch to allow ion current from the plasma process to charge the first grid to the plateau voltage.

[0011] Optionally, the plateau voltage is determined by an ion current from the plasma process flowing through a resistor.

[0012] Optionally, the first voltage is an ascending voltage sweep and the second voltage is a descending voltage sweep.

[0013] The high voltage circuit may include a voltage multiplier, with a resistor in parallel with the voltage multiplier.

[0014] The resistance of the resistor in parallel with the total capacitance to the floating ground of the voltage multiplier and the ion current may determine the rate at which the second voltage discharges.

[0015] The resistance of the resistor in parallel with the total capacitance to the floating ground of the voltage multiplier and the ion current determine the rate at which the first voltage charges.

[0016] The method may further include combining the current measurements taken during each sampling step to obtain a complete set of measurements.

[0017] The method may further include plotting the complete set of measurements to provide an ion energy distribution.

[0018] Optionally, the plurality of grids are arranged as a stack of grids, the first grid being any one of the grids in the stack, the first grid being used for ion energy discrimination. [Brief explanation of the drawings]

[0019] The present application will now be described with reference to the accompanying drawings.

[0020] [Figure 1] An overview of a matched system capable of measuring the ion energy distribution reaching a wafer probe surface during plasma processing is presented. [Figure 2(a)] 1 shows an array of sensors for measuring IEDs distributed across the surface of a wafer probe. [Figure 2(b)] 2(a) shows one arrangement of the grid within the sensor of FIG. 2(a). [Figure 2(c)] 2(b) shows an alternative arrangement of the grid within the sensor of FIG. 2(a). [Figure 2(d)]2(b) shows a further arrangement of the grid within the sensor of FIG. 2(a); [Figure 3(a)] 1 shows one configuration for powering the sensor. [Figure 3(b)] 10 illustrates an alternative configuration for powering the sensor. [Figure 4(a)] 1 illustrates the configuration of a high voltage generating circuit according to the present teachings. [Figure 4(b)] 1 illustrates another configuration of a high voltage generation circuit in accordance with the present teachings. [Figure 5] 10 shows a plot of the voltage applied to the conductive grid of a sensor in accordance with the present teachings. [Figure 6] 1 illustrates a further configuration of a high voltage generating circuit in accordance with the present teachings. [Figure 7] 1 illustrates another configuration of a high voltage generating circuit in accordance with the present teachings.

[0021] FIG. 1 shows an overview of a system 100 capable of measuring the ion energy distribution reaching a wafer probe surface 101 during plasma processing. In this particular illustration, the diagnostic system 100 includes a dummy wafer probe with an integrated ion energy analyzer, electronic control circuitry, battery power, and wireless communication. The diagnostic system further includes a docking station 102 with an integrated wireless transponder 103 that allows charging, configuration, and data retrieval of the dummy wafer probe 101. The docking station 102 includes an Ethernet connection for communication with a host PC 104. Application software is provided for displaying and analyzing retrieved data. The application software provides a control panel for scheduling experiment assignments. An advanced programming interface (API) is also provided that allows direct interaction between the docking station and the factory's control software.

[0022] A four-chamber plasma processing system 105 is also shown in FIG. 1 . This is one of many different types of plasma processing systems and is used to illustrate the functionality of the dummy wafer probe 101 according to the present teachings. The plasma processing system 105 can have one or more interconnected processing chambers 106. Each processing chamber 106 includes a vacuum pump for evacuating the chamber, gas flow controls for setting the process recipe, a vacuum gauge and transducer for adjusting the process operating pressure, a power delivery mechanism for exciting the chemical recipe into a plasma state, and a pedestal for holding the substrate during processing. A load lock chamber 108 with a robotic transfer mechanism 107 is used to transport substrates to and from the processing chambers. Batches of substrates are delivered to the load lock chamber 108 via cassettes or FOUPs.

[0023] In a preferred embodiment, the wafer probe 101 is placed in the docking station 102, and communication is established through application software on the host PC 104. The battery power on the wafer probe 101 is charged, stored data is retrieved, and the next experimental assignment is scheduled to prepare the wafer probe 101. The dummy wafer probe 101 is then placed into an available slot in a front-opening universal pod (FOUP) and then delivered to the load lock chamber 108. The robot arm 107 transports the dummy wafer probe 101 to the processing chamber 106 and positions it on the processing pedestal in preparation for plasma exposure. With the chamber 106 already under vacuum, a process recipe is configured and the plasma is ignited. Once the plasma is formed, plasma species begin bombarding the wafer probe 101, and samples of the dummy wafer probe 101 enter the probe's 101 sensors for analysis. When the onboard pressure sensor reports that the high-voltage application threshold has been reached, the analysis proceeds at the time configured in the scheduler. This safety mechanism prevents the accidental application of high voltage at atmospheric pressure, which could destroy the sensor through an electrical arc. If the pressure threshold is met, the wafer probe 101 is activated at the scheduled time. Appropriate voltages are applied to all grids and collectors, and the collector current is recorded as a function of the ion discrimination potential by a microcontroller (MCU) (not shown), and the resulting data is stored in memory. The wafer probe 101 returns to sleep mode until the next scheduled measurement, at which point the process repeats. Once the experimental allocation is complete, the plasma process can be terminated, allowing the wafer probe 101 to be retrieved from the processing pedestal using a robotic arm that transports the wafer probe back to the FOUP through the load lock chamber 108. The user removes the wafer probe 101 from the FOUP and places it back in the docking station 102 for data retrieval, recharging, and scheduling the next experimental allocation.Alternatively, the wafer probe can transmit sensor data in real time from its location within the processing chamber to the docking station using known wireless communication devices and methodologies.

[0024] The wafer probe 101 can be fabricated on a silicon wafer base to mimic a standard semiconductor workpiece. The wafer probe may also be fabricated from other materials, such as ceramic, metal, or glass, to mimic other types of substrates used in plasma processing, and may have the same shape as a standard substrate of substantially the same dimensions and weight. An example of one such configuration is shown in FIG. 2(a), which depicts an array of sensors (or sensor stacks) 201 distributed across the surface of the semiconductor wafer probe 101. In particular, FIG. 2(a) shows a top view of a 300 mm wafer probe 101 having nine sensors 201. A registration notch 202 is also shown. As described in more detail below, these sensors 201 are preferably ion energy analyzers for measuring the ion energy distribution at the substrate surface of the wafer probe 101.

[0025] FIG. 3(a) shows one possible architecture in which each sensor 201 of the wafer probe 101 is modularized and has its own dedicated power supply, signal conditioning circuitry, MCU, pressure sensor, and wireless transponder.

[0026] In an alternative architecture, the electronic control circuitry is centralized, and the individual collector currents from each sensing element are multiplexed into a centralized measurement circuit, as shown in Figure 3(b).

[0027] The ion energy analyzer 201 is particularly important for measuring the ion energy distribution at the substrate surface during plasma processing. Referring to Figure 2(b), it can be seen that the ion energy analyzer 201 comprises alternating layers of planar, parallel conductive metal grids and insulators, where the grids are systematically electrically polarized to filter out plasma electrons, separate positive ions based on their energy, suppress secondary electron emissions, and collect the ion current for measurement.

[0028] In FIG. 2(b), the plasma-facing surface 203 of the sensor 201 is flush with the substrate surface and made from the same material. An array of sampling apertures 204 is formed in this surface 203, through which plasma species enter the device for analysis. The sampling apertures 204 may be less than a millimeter in diameter and must provide sufficient opening area to deliver an adequate charged particle flux for detection. At the onset of plasma formation in the processing chamber, a plasma sheath is formed adjacent to the surface of the substrate and all other surfaces exposed to the plasma. A voltage applied to the sheath is used to manipulate the ion energy reaching the substrate surface. The presence of the sensor aperture 204 has the potential to inhibit local sheath formation near the aperture. Any aperture exposed to the plasma is measured using the Debye length of the plasma.

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[0029] The electron temperature is 3 eV and the electron density is

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[0030] 2(b), a first conductive grid (or mesh), hereafter referred to as G0, is attached to the underside of the aperture 204 with good electrical connection between both sides. The grid G0 is fabricated with an aperture size less than the Debye length to ensure plasma screening, and has an aperture area ratio sufficient to transmit sufficient ion flux for detection.

[0031] In another embodiment, G0 can be attached to the side of the aperture facing the plasma to achieve the same function as shown in FIG. 2(c).

[0032] In an alternative embodiment, the apertures 204 are fabricated directly in the plasma-facing surface, with dimensions less than the Debye length, and in sufficient numbers to maintain an adequate ion flux for detection, thus eliminating the need for a separate G. This embodiment is shown in FIG.

[0033] In each of the configurations of Figures 2(a), 2(b), and 2(c), G0 adopts the same potential as the wafer probe outer body, determined by the excitation potential applied to the process pedestal and the plasma characteristics. This potential serves as the reference potential for the sensor circuitry and inter-grid electric field formation.

[0034] A first insulating layer 205 is positioned adjacent to G0 to provide electrical isolation from the other grids, e.g., G1, G2, and G3. The insulating layer 205 can be composed of one or more insulators. The insulators can have an aperture array that matches the ion sampling aperture array to allow ions to pass unimpeded. Alternatively, the insulator can have a single large aperture with an aperture area spanning the entire aperture array.

[0035] In FIG. 2(b), a second grid, hereinafter referred to as G1, is positioned adjacent to a first insulator 205 having the same or similar geometric characteristics as G0 in terms of aperture size and aperture area ratio. G1 is coupled to a first voltage source and is negatively biased relative to G0, thus generating the retarding electric field necessary to repel incoming plasma electrons. A second insulating layer 206 having the same or similar dimensions as the first insulating layer is positioned adjacent to G1. A third grid, hereinafter referred to as G2, having the same or similar shape as the other grids is positioned adjacent to the second insulating layer. G2 is coupled to a second voltage source and biased with a positive potential sweep relative to G0, thus generating the electric field necessary for ion energy discrimination. A third insulating layer 207 having the same or similar dimensions as the other insulating layers is positioned adjacent to G2. A fourth grid, hereinafter referred to as G3, having the same or similar geometric characteristics as the other grids is positioned adjacent to the third insulating layer 207. G3 is coupled to a third voltage source and negatively biased relative to the collector, thus generating the electric field necessary to suppress secondary electron emission from the collector. A fourth insulating layer 208, having the same or similar dimensions as the other insulating layers, is positioned adjacent to G3. An ion collecting electrode, i.e., collector C, is positioned adjacent to the fourth insulating layer 208. The collector is coupled to the fourth voltage source through a current measurement circuit and is negatively biased relative to G0, establishing an attractive electric field that draws ions to the collector for detection. A final insulating layer 209 is positioned between the collector electrode and the backplate of the sensor chassis. The grid is typically made of a metal such as nickel or stainless steel, although any other process-compatible conductive material can also be used. The insulator is typically made of ceramic, mica, or other process-compatible insulating material.

[0036] Referring to Figures 3(a) and 3(b), it can be seen that signal conditioning provides a voltage source to each of grids G1, G2, and G3, as well as the collector described above. The voltage supplied to G2 is variable; that is, a voltage sweep is applied to G2. To properly measure IEDs found in common plasma processes, it is important to generate a sufficiently high G2 voltage sweep range. Many of the plasma processes encountered produce ions with energies ranging from tens of eV to thousands of eV. This requires that the G2 voltage sweep range extend from zero volts to thousands of volts relative to G0 to properly probe IEDs in various industrial processes.

[0037] 4(a) shows a general configuration of a high voltage generation circuit 400 that can be used to generate the required high voltage sweep range. The circuit includes two stages that take the low voltage of the battery and generate the required high voltage sweep. Specific details of possible configurations of each stage are described below with respect to FIGS. 6 and 7. However, it should be understood that the stages are not limited to the details of FIGS. 6 and / or 7.

[0038] In Figure 4(a), the circuit includes a low voltage source B1, a high voltage pulse generator 401 (first stage), and a voltage multiplier 402 (second stage). The voltage multiplier 402 is also known in the art as a charge pump. The high voltage pulse generator 401 provides a high voltage pulse train to the voltage multiplier 402. The voltage multiplier 402 uses the pulse train to charge a series of internal capacitors, charging the output to a voltage that is multiple times, typically 4 to 5 times, the pulse voltage from the pulse generator 401.

[0039] It should be understood that the high voltage generation circuit 400 can be included in the signal conditioning circuit outlined with respect to Figures 3(a) and 3(b). It will also be understood that a battery manager circuit (described in more detail below) shown in Figures 3(a) and 3(b) can be provided with the circuit 400. The battery manager circuit regulates the battery output voltage to a fixed voltage level. In an exemplary embodiment, the low voltage power source may be a single cell LiPo battery with a 3v DC regulator. It should further be understood that the configuration of the high voltage generation circuit and the battery manager can be appropriately selected by one skilled in the art.

[0040] The circuit of Figure 4(a) generates a voltage sweep that starts from zero and gradually increases to a maximum value, i.e., an increasing voltage sweep. As the sweep increases, the ion current is sampled. However, a rapid ramp-up and slow release of the voltage has been found to improve battery performance; that is, less power is consumed from the battery with each sweep. Thus, the sensor can be used for a longer period of time before the battery needs to be replaced or recharged.

[0041] The high voltage generator circuit 500 of FIG. 4(b) is used to sweep a voltage by rapidly ramping it up to a maximum level and then slowly returning it to zero. This circuit is very similar to the circuit of FIG. 4(a), but requires a few additional elements. A discharge resistor R1 is added to control the discharge rate, or timing, of the voltage sweep. The voltage sweep is V G2 before being applied to V G2 A discharge switch S1 has also been added to discharge G2. This switch between the high voltage output to G2 and the floating ground is used to discharge G2 just before the voltage sweep process begins. As the voltage decreases (voltage sweep down), the ion current is sampled.

[0042] In an exemplary embodiment, circuit 500 includes a V G2 allows the voltage to be rapidly charged to just over 2kV within 5ms, and then V G2is allowed to slowly discharge through R1 for up to 1 second. As mentioned above, resistor R1 in FIG. 4(b) is used to set the discharge time of the high voltage. The discharge time can be as little as a few seconds (or less), and the ion current is sampled rapidly as the voltage discharges. That is, the resistor is in parallel with the voltage multiplier 402 of the high voltage generation circuit. The resistance of the resistor in parallel with the total capacitance to the floating ground of the voltage multiplier determines the rate at which the voltage discharges.

[0043] The ion current collected on the G2 frame is returned to the plasma through resistor R1 and connected to the sensor chassis ground. The ion current reaching the G2 frame is a function of plasma conditions and can range over a wide range. As a result, the G2 voltage may not discharge completely to 0 V as desired. Instead, it may plateau at a level E above 0 V, as shown in Figure 5. The plateau voltage is determined by the ion current flowing through R1. The incoming ion current maintains the charge on the pump capacitor of the voltage multiplier 402. Therefore, the voltage cannot be further discharged, i.e., it cannot be discharged to 0 V. In this scenario, the low-energy region of the ion energy distribution becomes inaccessible. That is, ion energy analysis cannot sample the ion current for G2 voltages below E.

[0044] To address this issue, an apparatus according to the present teachings utilizes a two-stage voltage scan to obtain measurements across the entire ion energy distribution. The first stage involves measuring the ion current while the voltage applied to the third conductive grid G2 is increased, and the second stage involves measuring the ion current while the voltage applied to the third conductive grid G2 is decreased. The current measurements from both stages are then combined to obtain a complete set of measurements.

[0045] When a sensor according to the present teachings is in standby mode (not sampling ion current), the plasma can be turned on and ion current flows from the third conductive grid G2 through resistor R1 to sensor ground. This flow charges the surface of G2 to a voltage level, shown as "A" in FIG. 5. When it is desired for the sensor to make a measurement, switch S1 is closed, completely discharging the third conductive grid G2 to 0 V. As a result of closing the switch, the third grid is almost instantly discharged, as can be seen in FIG. 5. Switch S1 is then returned to its open position, and the ion current begins to charge G2 again, as shown as "B" in FIG. 5. The ion current is measured rapidly during this period B as the third grid G2 is charged by the incoming ions. G2 settles to a plateau level "E." This is the first stage in which the ion current is measured for a G2 voltage sweep between zero and a plateau voltage E determined by the ion current through R1. That is, the ion current is measured while the G2 voltage sweep is ramping up. The resistance of the resistor in parallel with the total capacitance to the floating ground of the voltage multiplier and the ion current determine the rate at which the first voltage charges.

[0046] In the second phase of operation, the high voltage generation circuitry is triggered, rapidly boosting / pumping the G2 voltage to its maximum level "C". When pumping stops, for reasons previously mentioned, G2 discharges again through section "D" to level "E", and the ion current is measured during the discharge phase (downward voltage sweep). The resistance of the resistor in parallel with the voltage multiplier's total capacitance to floating ground, and the ion current, determine the rate at which the second voltage discharges. The high-energy and low-energy regions of the ion energy distribution are then fully restored when the two regions (charge and discharge) are stitched together for plotting.

[0047] While the high-voltage generating circuit described herein refers to supplying a voltage to the third grid G2 of the sensor, those skilled in the art will understand that the present teachings are not limited in this regard. The high-voltage generating circuit described herein can supply a voltage to any grid in the grid stack of the sensor. For example, the sensor may have only two conductive grids, with the voltage from the high-voltage generating circuit applied to one of them. It will be understood that the voltage sweep is applied to the grid used for ion energy discrimination, and that this grid can have any position in the stack of grids. The grid used for ion energy discrimination and to which the voltage sweep is applied can be considered the discrimination grid.

[0048] The low-voltage dc source of the high-voltage generation circuit can be a thin, solid-state battery with a dc voltage output in the range of 2.75 to 4.5 V. A battery manager is used to protect the battery from overcharging and over-discharging. The battery manager is configured to disconnect the battery when the voltage drops below a certain threshold, thereby disconnecting power to the main circuitry. Power to the main circuitry will not be restored until the battery voltage exceeds the threshold level and is recharged. The battery manager also draws charging power from an RF antenna forming part of the receiver in the docking station. The battery manager circuit also regulates the battery output voltage to a fixed voltage level, which in the exemplary embodiment is 3.2 V.

[0049] A more detailed description of each stage of the high voltage generation circuits 400, 500 of Figures 4(a) and 4(b) is provided below with respect to Figures 6 and 7. The circuits of both Figures 6 and 7 can be configured to operate in accordance with the two-stage ion current measurement technique described above.

[0050] Figure 6 shows one configuration of a high-voltage generation circuit, in which a microcontroller (MCU in Figures 3(a) and 3(b)) is powered by a battery and programmed to output a sinusoidal AC voltage swept over a certain frequency range. The output is connected to the primary winding of a step-up transformer. The number of turns in the secondary winding is selected to raise the voltage to the maximum level required for the particular frequency applied to the primary winding input. At the secondary winding output, the voltage is rectified to produce a direct current (DC) voltage, which is coupled to a voltage multiplier (Stage 2) to further multiply the voltage as needed to extend the voltage range. The DC voltage produced at the secondary winding output is frequency-dependent. By sweeping the frequency and / or amplitude of the AC signal applied to the primary winding, the DC voltage at the secondary winding or multiplier output is swept over the required voltage range from zero volts to several thousand volts, depending on the transformer turns ratio used. The current is sampled at regular voltage intervals during the high-voltage sweep using an ADC to construct a current-voltage characteristic. Although a four-stage voltage multiplier (quadruple multiplier) is used in the exemplary embodiment, it should be understood that any number of stages may be suitably selected by one skilled in the art.

[0051] The high-voltage generation circuit shown in FIG. 6 will now be described in more detail. As previously mentioned, this circuit includes a low-to-high-voltage transformer (T1) (first stage) that feeds a voltage multiplier (second stage). The voltage multiplier is a type of Cockcroft-Walton voltage multiplier circuit, consisting of capacitor components C1, C2, C3, and C4 in combination with diode components D1, D2, D3, and D4. A low-voltage AC signal is generated on the primary side of T1 using an H-bridge switch. An H-bridge, or similar switching topology, is used to allow bipolar current to flow from a single-rail power supply to the primary winding of T1. The frequency and amplitude of the AC signal are controlled by a microcontroller. A 1:N turns ratio transformer T1 generates a high-voltage AC signal on the secondary side. During the positive half-cycle, C2 is charged via C1 and D2, and C4 is charged via C1, C3, and D4. During the negative half-cycle, C1 charges via D1, and C3 charges via C2 and D3. After a predetermined number of AC cycles, the voltages across all capacitors become equal, and VG2 reaches a maximum level of four times the voltage across C2. It is clear that by controlling the frequency and amplitude of the AC signal applied to the primary winding of T1, VG2 can be gradually increased from zero to its maximum value. Thus, a typical increasing voltage ramp (sawtooth or step function) used to drive ion energy discrimination in reverse potential analyzers can be realized. Once the maximum voltage of the voltage sweep is reached and the resulting ion current is measured, the AC voltage applied to the primary winding of T1 is turned off to reset VG2 to zero in preparation for the next voltage sweep. Switch S1 also closes at this point, serving to quickly discharge G2 and the capacitor.

[0052] Alternative configurations for circuits for generating voltage sweeps can apply the principles of boost conversion and / or charge pumping. While a hybrid solution is provided, it is clear that variations on the current technique can be applied. Figure 7 shows a circuit used to generate a high-voltage sweep using this technique. A battery delivers a 3V output to the input of a low-profile DC-DC converter, which increases the voltage to approximately 80V. The 80V signal is coupled to a voltage multiplier circuit through a series boost inductor and diode (boost circuit). A field-effect transistor (FET) controlled by a pulse-width modulation (PWM) signal is coupled to the system floating ground after the series diode to modulate the 80V supply and drive the voltage multiplier circuit. At the input to the voltage multiplier circuit, the boost circuit boosts the voltage to approximately 250V, but it can be higher depending on the application needs. In this example, the voltage multiplier has four stages, but more stages can be used to provide even higher voltages. Each voltage multiplier stage has a typical design, with each stage increasing the voltage applied to its input. The first capacitor, C1, charges to a maximum level of 500V after a sufficient number of cycles of the PWM signal have been generated. Similarly, the output of C3 reaches 1000V, C5 reaches 1500V, and C7 reaches 2000V. In each stage, a series of diodes is configured to prevent the charge storage capacitor from discharging during the PWM off state, thus providing the "multiplication" effect required to generate the high-voltage sweep. The ion current is sampled at regular voltage intervals during the high-voltage sweep using an ADC to construct a current-voltage characteristic.

[0053] The configuration in Figure 7 was devised to meet the more stringent height requirements. The battery and battery manager components are the same as those in Figure 6. The battery manager feeds an off-the-shelf, low-profile DC-DC converter with a built-in voltage doubler to boost the DC voltage level to 80V. The high-voltage generation circuit consists of a boost section followed by a voltage multiplier section. The boost section is a typical DC-DC boost converter topology using inductor L1, MOSFET transistor Q1 (switched on and off by a pulse-width modulator), diode D2, and capacitor C1. This allows the circuit to charge C1 to a voltage higher than the 80V DC-DC output voltage in this exemplary embodiment. The multiplier section is very similar to the Cockcroft-Walton voltage multiplier circuit in Figure 6, with capacitor components C2, C3, C4, C5, C6, and C7 and diode components D3, D4, D5, D6, D7, and D8. The circuit in Figure 7 generates a voltage sweep differently than the circuit in Figure 6. Instead of a voltage sweep starting from zero and gradually increasing to a maximum value, this circuit is used to rapidly increase the voltage to a maximum level and then slowly sweep it back down to zero, although it can also be used to gradually sweep the voltage from zero to a maximum voltage.

[0054] Those skilled in the art should understand that the present teachings are not limited to MOSFET transistors, but rather any suitable transistor may be selected, such as, for example, a bipolar transistor.

[0055] Note that the circuit of Figure 6 can be operated in discontinuous mode as described with respect to Figure 7. In this case, the voltage can be rapidly increased to a maximum value before slowly discharging back to zero, i.e., the circuit of Figure 6 can provide a descending voltage sweep. As will be apparent to those skilled in the art, this requires the addition of a discharge resistor R1, as described in more detail with respect to Figures 4(b) and 7.

[0056] Because the circuit shown in Figure 7 operates discontinuously, D1 is added to prevent current from flowing back from C2 through L1 to the floating ground after the energy stored in L1 has been depleted.

[0057] Switch S1 is used to connect the boost circuit to the 80V output of the DC-DC converter. S1 remains closed while VG2 is charging to its maximum level. The switching rate of MOSFET transistor Q1 is microprocessor output controlled. When Q1 is open, C1 is charged from the 80V output of the DC-DC converter and the conducting inductor through D1 and D2. C3 is then charged by C2 through D4, C5 is charged by C4 through D6, and C7 is charged by C6 through D8. When Q1 is closed, L1 is energized by current flowing from the DC-DC converter through Q1 to the floating ground. The voltages across capacitors C2, C4, and C6 relative to the floating ground decrease because Q1 is closed and are lower than the voltages across capacitors C1, C3, and C5, respectively. Now, C2 is charged by C1 through D3, C4 is charged by C3 through D5, and C6 is charged by C5 through D7. With the boost segment operating in discontinuous mode, the energy (E) stored in L1 is

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[0058] The voltage multiplier (stage 2 of the high-voltage generating circuit) in Figure 7 has two parallel strings of capacitors: C1, C3, C5, and C7, and C2, C4, and C6. When transistor switch Q1 is open, the input to the multiplier goes high, and the multiplier charges C1, C2 charges C3, C4 charges C5, and C6 charges C7. When Q1 is closed, the input goes low, and C1 charges C2, C3 charges C4, and C5 charges C6. Switch Q1 is repeatedly switched on and off so that all capacitors have a charging voltage equal to the input voltage. As a result, the output VG2 is four times the input voltage. Considering efficiency, if the voltage multiplier is used directly from an 80V line, the maximum voltage will be approximately 300V.

[0059] To further increase the voltage, a boost circuit precedes the voltage multiplier. Energy is stored in inductor L1 and transferred to capacitor C1, where diode D1 prevents the energy from returning to the input through the inductor. The input to the boost circuit is 80V. When the transistor is on, the inductor is shorted to ground, causing the inductor current to increase and energy to be stored. When the transistor is off, current continues to flow through the inductor via D8 and D1 to capacitor C7. The voltage across capacitor C7 increases as the stored energy increases. The input voltage is 80V, and the MOSFET transistor shorts both the inductor and the voltage multiplier input to ground. After a few microseconds, the transistor is released, thereby inducing the current necessary to achieve the charge pump effect and generate the maximum voltage VG2.

[0060] Those skilled in the art will understand that the voltage values ​​provided with respect to the exemplary embodiments of Figures 4(a), 4(b), and 5-7 are merely exemplary. The present teachings should not be considered limited to these values. Rather, these circuits can be appropriately configured to provide the required voltages.

[0061] The present invention is not limited to the embodiments described herein, which can be amended or modified without departing from the scope of the invention.

Claims

1. 1. A method of operating an apparatus for obtaining ion energy distribution measurements in a plasma processing system, comprising: providing a substrate for placement within the plasma processing system and exposure to the plasma, the substrate having an ion energy analyzer disposed therein for measuring the ion energy distribution at a surface of the substrate during plasma processing, the analyzer comprising a plurality of conductive grids and a collecting electrode, each grid separated by an insulating layer; providing a high voltage generation circuit within the substrate, the high voltage generation circuit configured to receive an output voltage of a battery for powering the high voltage generation circuit and to apply a voltage to a first grid of the plurality of conductive grids; providing a high voltage switch configured to discharge the first grid to a floating ground of the device, and a resistor in parallel with the high voltage switch; sampling an ion current during a first phase while a first voltage is being charged on the first grid from the floating ground potential to a plateau voltage; sampling the ion current during a second phase during which the second voltage applied to the first grid is discharging through the resistor from a predetermined voltage generated by the high voltage generation circuit to the plateau voltage.

2. 2. The method of claim 1, further comprising closing the switch to discharge the first grid to the floating ground prior to sampling the ion current during the first stage.

3. 3. The method of claim 1 or 2, further comprising opening the switch to allow ion current from a plasma process to charge the first grid to the plateau voltage.

4. The method of claim 1 , wherein the plateau voltage is determined by the ion current from the plasma process flowing through the resistor.

5. 2. The method of claim 1, wherein the first voltage is an ascending voltage sweep and the second voltage is a descending voltage sweep.

6. 2. The method of claim 1, wherein the high voltage circuit includes a voltage multiplier, and the resistor is in parallel with the voltage multiplier.

7. 7. The method of claim 6, wherein the resistance of the resistor in parallel with the total capacitance of the voltage multiplier to the floating ground and the ion current determine the rate at which the second voltage discharges.

8. 8. The method of claim 6 or 7, wherein the resistance of the resistor in parallel with the total capacitance of the voltage multiplier to the floating ground and the ion current determine the rate at which the first voltage charges.

9. The method of claim 1 , further comprising combining the current measurements taken during each sampling step to obtain a complete set of measurements.

10. 10. The method of claim 9, further comprising plotting the complete set of measurements to provide an ion energy distribution.

11. 2. The method of claim 1, wherein the plurality of grids are arranged as a stack of grids, the first grid is one of the grids in the stack, and the first grid is used for ion energy discrimination.

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