Photoelectric conversion apparatus, method for manufacturing photoelectric conversion apparatus, and equipment

Abstract

To provide a photoelectric conversion apparatus that achieve both of improvement of light emission crosstalk and maintenance of sensitivity.SOLUTION: A photoelectric conversion apparatus disclosed herein is a photoelectric conversion apparatus including a semiconductor layer. The photoelectric conversion apparatus includes: a plurality of photoelectric conversion elements that each include a photoelectric conversion unit disposed on a side of a first surface of the semiconductor layer, and in which light of a light source enters from a side of a second surface opposite to the first surface of the semiconductor layer; a first element isolation portion that extends in the semiconductor layer from the first surface toward the second surface between neighboring first photoelectric conversion element and second photoelectric conversion element of the plurality of photoelectric conversion elements; and a second element isolation portion that extends in the semiconductor layer from the second surface toward the first surface between the first photoelectric conversion element and the second photoelectric conversion element, and comes into contact with the first element isolation portion. The first element isolation portion includes a coated portion whose conductive material is coated with an insulation material and the coated portion is in contact with the second element isolation portion.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The technology disclosed herein relates to a photoelectric conversion device, a manufacturing method thereof, and an apparatus therefor. [Background technology]

[0002] The structure and material selection of the element isolation between photoelectric conversion elements can be effective in suppressing light emission crosstalk and sensitivity reduction. Patent Document 1 describes an isolation layer as an element isolation provided between photoelectric conversion elements in a photoelectric conversion device. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2015 / 0372031 Summary of the Invention [Problem to be solved by the invention]

[0004] However, since the separation layer formed in the above-mentioned photoelectric conversion device is composed of an insulating layer, the separation layer may not be able to sufficiently reduce the diffusion of electrons photoelectrically converted in the photoelectric conversion element, and light emission crosstalk may not be suppressed appropriately. Also, the light incident on the photoelectric conversion element may be attenuated by the separation layer, which may reduce the sensitivity of the photoelectric conversion element.

[0005] The technology disclosed herein has been made in consideration of the above-mentioned problems, and has an object to provide a photoelectric conversion device having an element isolation portion that achieves both improvement of light emission crosstalk and maintenance of sensitivity. [Means for solving the problem]

[0006] In order to achieve the above-mentioned object, the photoelectric conversion device according to the present disclosure includes a photoelectric conversion device having a semiconductor layer, comprising: a plurality of photoelectric conversion elements, each having a photoelectric conversion section arranged on a first surface side of the semiconductor layer, and light from a light source being incident on a second surface side opposite the first surface of the semiconductor layer; a first element isolation section, in the semiconductor layer, extending from the first surface toward the second surface between a first photoelectric conversion element and a second photoelectric conversion element adjacent to each other among the plurality of photoelectric conversion elements; and a second element isolation section, in the semiconductor layer, extending from the second surface toward the first surface between the first photoelectric conversion element and the second photoelectric conversion element and abutting the first element isolation section, wherein the first element isolation section has a covering section in which a conductive material is covered with an insulating material, and the covering section abuts the second element isolation section.

[0007] In addition, in order to achieve the above-mentioned object, a manufacturing method for a photoelectric conversion device according to the present disclosure includes a manufacturing method for a photoelectric conversion device, characterized by comprising the steps of: arranging, in a semiconductor layer, a plurality of photoelectric conversion elements, each having a photoelectric conversion section arranged on a first surface side of the semiconductor layer and into which light from a light source is incident from a second surface side opposite the first surface of the semiconductor layer; and forming, in the semiconductor layer, a first element isolation section extending from the first surface toward the second surface between adjacent first and second photoelectric conversion elements among the plurality of photoelectric conversion elements, and having a covering section in which a conductive material is covered with an insulating material.

[0008] In order to achieve the above object, the device according to the present disclosure is a device equipped with the above photoelectric conversion device, and further includes at least one of an optical device corresponding to the imaging device, a control device that controls the imaging device, a processing device that processes a signal output from the imaging device, a display device that displays information obtained by the imaging device, a storage device that stores information obtained by the imaging device, and a mechanical device that operates based on information obtained by the imaging device. This includes devices characterized by: Effect of the Invention

[0009] According to the technique of the present disclosure, it is possible to provide a photoelectric conversion device that achieves both improvement of light emission crosstalk and maintenance of sensitivity. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a plan view of a photoelectric conversion device according to an embodiment; [Diagram 2] 1 is a cross-sectional view of a photoelectric conversion device according to a first embodiment. [Diagram 3] 1A to 1C are diagrams illustrating a method for manufacturing an element isolation portion of a photoelectric conversion device according to a first embodiment. [Figure 4] 1A to 1C are diagrams illustrating a method for manufacturing an element isolation portion of a photoelectric conversion device according to a first embodiment. [Diagram 5] 1A to 1C are diagrams illustrating a method for manufacturing an element isolation portion of a photoelectric conversion device according to a first embodiment. [Figure 6] 1 is an enlarged cross-sectional view of an element isolation portion of a photoelectric conversion device according to a first embodiment; [Figure 7] 1 is a cross-sectional view of a photoelectric conversion device according to a second embodiment. [Figure 8] 11 is a cross-sectional view of a photoelectric conversion device according to a third embodiment. [Figure 9] 11 is a cross-sectional view of a photoelectric conversion device according to a third embodiment. [Figure 10] Schematic diagram of an apparatus including a photoelectric conversion device according to a fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings. In the following description, terms indicating specific directions or positions (for example, "up", "down", "right", "left" and other terms including these terms) will be used as necessary. The use of these terms is for the purpose of facilitating understanding of the embodiments with reference to the drawings, and the meaning of these terms does not limit the technical scope of the present invention. Furthermore, the use of these terms is for the purpose of embodying the technical ideas of the present invention, and does not limit the present invention. Components of each embodiment can be added to another embodiment or replaced with components of another embodiment. Furthermore, the size and positional relationship of the members shown in each drawing may be exaggerated to clarify the explanation.

[0012] First Embodiment The photoelectric conversion device according to the first embodiment will be described with reference to Fig. 1 and Fig. 2. Fig. 1 is a plan view of two pixels of the photoelectric conversion device 1 according to this embodiment, and is a plan view of the pixels as viewed from a surface opposite to the light incident surface of the pixel. Fig. 2A is a cross-sectional view of two pixels in a direction perpendicular to the substrate of the photoelectric conversion device 1 according to this embodiment, and corresponds to the cross section taken along line A-A' in Fig. 1. Fig. 2B corresponds to the cross section taken along line B-B' in Fig. 1.

[0013] In this embodiment, as an example, it is assumed that the photoelectric conversion device 1 is an avalanche multiplication type photoelectric conversion device. First, the structure and function of the photoelectric conversion device 1 will be described. As shown in FIG. 1, the photoelectric conversion device 1 has an avalanche photodiode (APD) 10 which is a first photoelectric conversion element constituting one pixel, and an avalanche photodiode (APD) 20 which is a second photoelectric conversion element constituting another pixel. Also, as shown in FIGS. 2A and 2B, the photoelectric conversion device 1 has a substrate 101 including a semiconductor layer 102 and a wiring layer 103.

[0014] The semiconductor layer 102 is, for example, a semiconductor layer that is an N-type semiconductor region. The semiconductor layer 102 is formed of, for example, silicon. The semiconductor layer 102 has a first surface (surface indicated by "A" in the figure) and a second surface (surface indicated by "B" in the figure) that faces the first surface. The first surface C and second surface D of the semiconductor layer 102 are the front and back surfaces of the semiconductor layer 102, respectively, and are boundary surfaces with other members. The first surface C side is the side on which the photoelectric conversion unit of the pixel is disposed, and the second surface D side is the side on which light from the light source is incident.

[0015] The semiconductor layer 102 also has a first N-type semiconductor region 111, a third semiconductor region 113, a fifth semiconductor region 115, and a sixth semiconductor region 116. The semiconductor layer 102 also has a second P-type semiconductor region 112, a fourth semiconductor region 114, a seventh semiconductor region 117, and a ninth semiconductor region 119. In the following description, the P-type semiconductor region is a semiconductor region of the first conductivity type, and the N-type semiconductor region is a semiconductor region of the second conductivity type.

[0016] 2A and 2B, in this embodiment, an N-type first semiconductor region 111 is formed in the vicinity of the surface facing the light incident surface, and an N-type third semiconductor region 113 is formed around the first semiconductor region 111. A P-type second semiconductor region 112 is formed on the first semiconductor region 111 and the third semiconductor region 113. Furthermore, an N-type fifth semiconductor region 115 is formed on the second semiconductor region 112, and an N-type sixth semiconductor region 116 is formed around the fifth semiconductor region 115.

[0017] Fig. 1 also shows the positional relationship between the cathode wiring 131A and the anode wiring 131B in Fig. 2A and Fig. 2B. As shown in Fig. 1, in a plan view of the photoelectric conversion device 1, the cathode wiring end 132A is disposed so as to be included in the first semiconductor region 111, and the anode wiring end 132B is disposed in a region that does not overlap with the third semiconductor region 113.

[0018] The impurity concentration of the first semiconductor region 111 is higher than the impurity concentrations of the third semiconductor region 113 and the fifth semiconductor region 115. A PN junction is formed between the P-type second semiconductor region 112 and the N-type first semiconductor region 111. By making the impurity concentration of the second semiconductor region 112 lower than the impurity concentration of the first semiconductor region 111, in a plan view of the photoelectric conversion device 1, a region of the second semiconductor region 112 that overlaps with the first semiconductor region 111 becomes a depletion layer region. At this time, the potential difference between the first semiconductor region 111 and the second semiconductor region 112 becomes larger than the potential difference between the second semiconductor region 112 and the fifth semiconductor region 115. Furthermore, this depletion layer region extends to a partial region of the first semiconductor region 111, and a strong electric field is induced in the extended depletion layer region. This strong electric field causes avalanche multiplication in the depletion layer region that extends to a partial region of the first semiconductor region 111, and a current based on the amplified charge is output as a signal charge.

[0019] Light incident on the APDs 10 and 20 from the second surface D side of the photoelectric conversion device 1 is photoelectrically converted, and when avalanche multiplication occurs in the depletion layer region (avalanche multiplication region), the generated first conductive type charges are collected in the first semiconductor region 111. In addition, in FIG. 2A and FIG. 2B, the third semiconductor region 113 and the fifth semiconductor region 115 are formed to have approximately the same size in a plan view of the photoelectric conversion device 1, but the size of each semiconductor region is not limited to this. For example, in a plan view of the photoelectric conversion device 1, by forming the fifth semiconductor region 115 larger than the third semiconductor region 113, it is possible to collect charges from a wider range in the first semiconductor region 111. In addition, the third semiconductor region 113 may be a P-type semiconductor region instead of an N-type semiconductor region.

[0020] A first element isolation section 124 and a second element isolation section 125 are provided between the APD 10 and the APD 20. The first element isolation section 124 extends from the surface facing the light incident surface of the semiconductor layer 102 toward the light incident surface, that is, from the first surface C to the second surface D of the substrate 101. The second element isolation section 125 extends from the light incident surface side of the semiconductor layer 102, that is, from the second surface D of the substrate toward the first surface C so as to abut the first element isolation section 124 in a direction perpendicular to the substrate 101 (the up-down direction on the paper in the figure). The first element isolation section 124 is formed so as to be contained within the seventh semiconductor region 117 and the ninth semiconductor region 119 in a direction horizontal to the substrate 101 (the left-right direction on the paper in the figure).

[0021] The first element isolation section 124 has a covering section 124E in which a conductive material is covered with an insulating material. The covering section 124E is composed of a first section 124A, a second section 124B, a third section 124C, and a fourth section 124D. The covering section 124E includes at least one conductive material and at least one insulating material. Specifically, the first section 124A and the second section 124B are formed of insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof. The third section 124C is formed of titanium or titanium nitride as a barrier metal of the conductive material. The fourth section 124D is formed of tungsten, titanium, gold, silver, copper, platinum, or the like as a conductive material.

[0022] The second element isolation section 125 is composed of a first portion 125A and a second portion 125B. The first portion 125A of the second element isolation section 125 is formed of aluminum oxide or hafnium oxide as a fixed charge film. The second portion 125B is formed of silicon oxide. The covering portion 124E of the first element isolation section 124 abuts against the second element isolation section 125. A portion is formed in which the interface between the insulating material constituting the covering portion 124E of the first element isolation section 124 and the end portion on the second surface D side of the first element isolation section 124 is discontinuous. That is, as shown in FIG. 6 described later, in a cross section perpendicular to the substrate 101, the layer of the insulating material of the first element isolation section 124 (the first portion 124A in the figure) has a portion that is discontinuous due to the second element isolation section 125. The interface between the insulating material constituting the covering portion 124E of the first element isolation section 124 and the conductive material is continuously connected. That is, as shown in FIG. 6 described later, in a cross section perpendicular to substrate 101, the interface between second portion 124B and third portion 124C of first element isolation portion 124 is not in contact with the second element isolation portion.

[0023] If the covering portion 124E of the first element isolation portion 124 and the second element isolation portion 125 are not in contact with each other, the light emission crosstalk in the APDs 10 and 20 may be deteriorated. Therefore, in this embodiment, the first element isolation portion 124 and the second element isolation portion 125 are formed so that the covering portion 124E of the first element isolation portion 124 and the second element isolation portion 125 are in contact with each other. The first element isolation portion 124 is formed so that the end portion of the first element isolation portion 124 on the second surface D side is positioned deeper in the vertical direction than the second semiconductor region 112 as viewed from the first surface C. More specifically, the fourth portion 124D of the first element isolation portion 124 made of a conductive material is formed so as to extend to a position deeper than the second semiconductor region 112 that induces avalanche multiplication as viewed from the first surface C side. As a result, when a potential is applied to fourth portion 124D of first element isolation portion 124, an electric field is generated, and charges from second semiconductor region 112 that induce avalanche multiplication are prevented from entering the adjacent APD.

[0024] If covering portion 124E of first element isolation portion 124 were made only of a conductive material, a current would flow from second semiconductor region 112 to first semiconductor region 111 via first element isolation portion 124. Therefore, when forming covering portion 124E of first element isolation portion 124, first portion 124A and second portion 124B of insulating material are buried before burying third portion 124C and fourth portion 124D of conductive material. Furthermore, by forming covering portion 124E in such a structure, an effect of reducing dark current while reducing metal diffusion into semiconductor layer 102 can be expected.

[0025] Here, a specific configuration of the covering portion 124E of the first element isolation portion 124 will be described. In a cross section perpendicular to the substrate 101 of the photoelectric conversion device 1 (cross section shown in FIG. 2), the length from the first surface C to the tip of the covering portion 124E is defined as L1. The thickness of the first portion 124A of the covering portion 124E is defined as 124AT, and the thickness of the second portion 124B is defined as 124BT. The sum of the thicknesses of the first portion 124A and the second portion 124B is defined as L2. Details of the thicknesses 124AT, 124BT, L1, and L2 in the first element isolation portion 124 will be described in detail in the manufacturing method described later. An example will be described below. In this case, if the film thickness is determined by the following formula (1), the insulating material layer (first portion 124A and second portion 124B) of first element isolation portion 124 can function as an etching stop film when second element isolation portion 125 is formed by etching. L2 ≧ (A-L1) × B (1)

[0026] In formula (1), A is the thickness of substrate 101, and the thicker substrate 101 is, the longer it takes to form the grooves of second element isolation portion 125, and therefore the thickness required for the etching stop film to absorb variations in processing of second element isolation portion 125 increases. Also, in formula (1), B is a constant determined by the etching selectivity of the material used for substrate 101. As an example, when substrate 101 is made of silicon nitride, B=0.003; when substrate 101 is made of silicon oxynitride, B=0.015; and when substrate 101 is made of silicon oxide, B=0.044.

[0027] On the other hand, the second element isolation section 125 is formed of an insulating reflective member. The second element isolation section 125 reflects light incident on the substrate 101, thereby causing avalanche multiplication in the semiconductor layer 102. Examples of the reflective member of the second element isolation section 125 include silicon oxide or silicon nitride, and the fixed charge film includes aluminum oxide or hafnium oxide, or a combination of these. In addition, as the reflective member of the second element isolation section 125, it is preferable to use a member with a smaller extinction coefficient, because the smaller the extinction coefficient, the more the attenuation of incident light can be suppressed.

[0028] 2A and 2B, on the light incident surface side of the semiconductor layer 102, i.e., the second surface D side, a fixed charge film 121 containing aluminum oxide or hafnium oxide, a planarization film 122, and a microlens 123 are further formed. On the surface opposite to the light incident surface of the semiconductor layer 102, i.e., the first surface C side, a wiring layer 103 containing a conductive band and an insulating film is provided, and a wiring structure consisting of an oxide film 141, a protective film 142, and a conductive band are laminated from the side closer to the semiconductor layer 102.

[0029] An interlayer film 143, which is an insulating film, is provided between the wiring and the semiconductor layer and between the wiring layers. The protective film 142 is a film for protecting the semiconductor layer from plasma damage and metal contamination during etching. Although silicon nitride, which is a nitride film, is generally used, silicon oxynitride, silicon carbide, silicon nitride carbide, etc. may also be used. The wiring layer 103 has a cathode wiring 131A and an anode wiring 131B, the cathode wiring 131A is connected to the first semiconductor region 111, and the anode wiring 131B supplies a voltage to the seventh semiconductor region 117 via the ninth semiconductor region 119, which is an anode contact.

[0030] According to the photoelectric conversion device 1 of this embodiment, by combining the first element isolation portion 124 and the second element isolation portion 125, it is possible to improve the sensitivity while suppressing the emission crosstalk to adjacent pixels. Furthermore, when forming a groove in the substrate 101, which is a silicon substrate, by an etching device, it is possible to prevent the silicon being processed from being exposed to a metal atmosphere, thereby reducing the generation of dark current. Furthermore, when processing the first element isolation portion 124 and the second element isolation portion 125, the thickness of the insulating material covering the embedded metal around the element isolation portion is kept uniform, so that it is possible to reduce the decrease in the withstand voltage between the conductive material and the silicon substrate.

[0031] (Method of manufacturing a photoelectric conversion device) A method for manufacturing the photoelectric conversion device 1 in this embodiment will be described below with reference to Figures 3A, 3B, 4A to 4C, 5A, and 5B. Figures 3A, 3B, and 4A to 4C show a process in which a substrate including a semiconductor layer 102 is used as a support substrate. Also, Figures 4A to 4C show enlarged views of the tip of the first element isolation portion 124, and the tip of the second element isolation portion 125 is the first element isolation portion. The state of first element isolation portion 124 before contact with isolation portion 124 is shown. Note that Fig. 4B is an enlarged view of a portion indicated by rectangle 501 in Fig. 4A, and Fig. 4C is an enlarged view of a portion indicated by rectangle 502 in Fig. 4B. Figs. 5A and 5B are views showing the manufacturing process after the layers constituting photoelectric conversion device 1 are stacked.

[0032] As shown in FIG. 3A, the first semiconductor region 111 to the ninth semiconductor region 119 are formed in the semiconductor layer 102 by repeating processes such as photolithography, ion implantation, and thermal diffusion. Next, as shown in FIG. 3B, the first element isolation portion 124 is formed in the semiconductor layer 102 by etching. In order to reduce the generation of dark current due to etching damage, sacrificial oxidation or chemical dry etching is performed to remove damage generated on the surface of the first element isolation portion 124. In addition, by removing this damage, the bottom of the first element isolation portion 124 becomes rounded, and stress is relieved, which is expected to reduce the generation of dark current. In addition, the groove shape of the first element isolation portion 124 is formed by removing silicon contained in the semiconductor layer 102 by anisotropic dry etching.

[0033] Here, the thickness of the silicon layer included in the semiconductor layer 102, i.e., the preferred distance from the first face C to the second face D where the semiconductor region is formed in the cross section of the photoelectric conversion device 1, is 3.5 μm or more and 4.5 μm or less. Furthermore, in the cross section of the photoelectric conversion device 1, the preferred groove depth of the first element isolation section 124 is 900 nm or more and 1.5 μm or less, and the preferred groove width is 300 nm or more and 600 nm or less. In this case, it is desirable to form the first element isolation section 124 as wide as possible than the second element isolation section 125.

[0034] By increasing the contact area with the first element isolation portion 124 when forming the second element isolation portion 125, it is possible to reduce poor contact with the first element isolation portion 124 due to misalignment of each portion in the process of forming the second element isolation portion 125, and reduce the occurrence of crosstalk. When forming the first portion 124A to the fourth portion 124D of the first element isolation portion 124, an insulating material is first disposed by CVD or the like. In this embodiment, 150 nm of silicon oxide and 10 nm of silicon nitride that function as an etching stop film for silicon etching are disposed in a laminated manner. This insulating film layer may be made of silicon oxynitride according to the purpose, or a combination of these films may be used.

[0035] As shown in FIG. 4B and FIG. 4C, the thickness of silicon oxide at the end of the first element isolation unit 124 in the vertical direction of the cross section perpendicular to the substrate 101 is 124AT, and the thickness of silicon nitride is 124BT. As shown in FIG. 4B and FIG. 4C, the thickness of silicon oxide at the side of the first element isolation unit 124 in the horizontal direction of the cross section perpendicular to the substrate 101 can also be 124AT, and the thickness of silicon nitride can also be 124BT. Here, the thickness of the insulating material at the end and side of the first element isolation unit 124 is the same. Depending on the manufacturing method, the insulating material may be formed so that the thickness of the insulating material at the side of the first element isolation unit 124 is smaller than that at the end. Also, as shown in the figure, the depth of the groove of the first element isolation unit 124 from the first surface C is L1, and the total thickness of 124AT and 124BT, which are the thicknesses of the insulating material included in the first element isolation unit 124, is L2.

[0036] Considering the minimum thickness at which the etch stop function can be achieved even with a single film and the embeddability of the conductive material in the element isolation portion, the thickness L2 is preferably 10 nm to 200 nm when the insulating material is silicon nitride. Similarly, the thickness L2 is preferably 50 nm to 200 nm when the insulating material is silicon oxynitride, and 150 nm to 200 nm when the insulating material is silicon oxide. Silicon nitride has a particularly high selectivity to silicon etching, so it functions adequately as an etch stop film even with a small thickness.

[0037] Thereafter, the conductive material constituting the first element isolation portion 124 is embedded by CVD, a sol-gel method, or the like. At this time, the embedding depth of the conductive material when measured from the first surface C is set to be the same as the position of the second semiconductor region 112 or a depth exceeding the position of the second semiconductor region 112. In this embodiment, the embedding depth of the conductive material is set to 750 nm, but may be changed appropriately depending on the design of the photoelectric conversion device 1. Then, as shown in FIG. 4A, processes such as film formation, photolithography, and etching are repeated to form the wiring layer 103 from the contact plug to the junction metal (not shown).

[0038] Next, a method for manufacturing the second element isolation portion 125 will be described with reference to FIGS. 5A and 5B. FIG. 5A shows a state after the substrate 101 is joined to another support substrate or circuit substrate and thinned. The silicon layer of the substrate 101 is etched from the light incident surface side, i.e., the second surface D side, by a dry etching device until it contacts the inner wall of the first element isolation portion 124. If the metal film of the third portion 124C and the fourth portion 124D is exposed during etching, metal atoms will diffuse into the silicon substrate and cause dark current, so etching is performed so as not to expose the conductive material of the third portion 124C and the fourth portion 124D.

[0039] Moreover, the silicon oxide and silicon nitride arranged in the first element isolation portion 124 function as an etching stop film for silicon etching, and the groove of the second element isolation portion 125 abuts against the first element isolation portion 124. Then, the etching stops at the first portion 124A or the second portion 124B of the first element isolation portion 124, and the groove of the second element isolation portion 125 does not reach the third portion 124C and the fourth portion 124D. The selectivity of silicon etching is higher for silicon nitride than for silicon oxide. Therefore, in the etching for forming the second element isolation portion 125, the etching rate is gradually decreased from the first portion 124A to the second portion 124B. This makes it possible to uniform the distance between the inner wall of the first element isolation portion 124 and the third portion 124C and the fourth portion 124D made of a conductive material.

[0040] Finally, a reflective material is embedded in the groove of the second element isolation portion 125 by CVD, a sol-gel method, or the like. The reflective material may be a fixed charge film, an oxide film, a nitride film, a metal film, or a combination of a plurality of these. By the same processing method as for the wiring layer 103, a fixed charge film 121, a planarization film 122, and a microlens 123 are formed as shown in FIG. 5B.

[0041] (Shape of element isolation part) Next, the shape of the connection portion between first element isolation portion 124 and second element isolation portion 125 and the process of etching stop when processing second element isolation portion 125 in this embodiment will be described with reference to FIGS. 6A to 6D.

[0042] Fig. 6A is an enlarged schematic cross-sectional view of a connection portion between first element isolation portion 124 and second element isolation portion 125 in Fig. 2. As shown in Fig. 6A, the groove of second element isolation portion 125 is etched for a sufficient amount of time until it reaches first element isolation portion 124.

[0043] In the etching process for processing second element isolation portion 125, the groove of second element isolation portion 125 first reaches the silicon oxide layer of first portion 124A, and then reaches the silicon nitride layer of second portion 124B. Since the silicon etching selectivity is higher for silicon nitride than for silicon oxide, the etching rate is gradually slowed down during etching of second element isolation portion 125, thereby maintaining uniformity in the processing depth.

[0044] 6A to 6D show a case where, during etching of the second isolation section 125, the trench of the second isolation section 125 penetrates the silicon oxide layer of the first isolation section 124 and reaches the silicon nitride layer, and etching is stopped. However, depending on the amount of overetching and variations, the trench of the second isolation section 125 may be in the silicon oxide layer or the silicon nitride layer. In some cases, etching may be stopped at this stage.

[0045] FIG. 6B shows a cross-sectional view in the case where an offset of the second element isolation portion 125 occurs with respect to the first element isolation portion 124. When the second element isolation portion 125 is formed by anisotropic etching, the etching rate is not partially decelerated in a portion where the silicon nitride layer does not exist under the silicon oxide layer of the first element isolation portion 124. As a result, as shown in FIG. 6B, a portion 125E may be formed in which the groove of the second element isolation portion 125 deeply enters the first portion 124A along the second portion 124B of the first element isolation portion 124. The material of the second element isolation portion 125 is unlikely to enter such a portion 125E, and there is a possibility that a filling failure of the material may occur. Therefore, in this embodiment, as shown in FIG. 6C, in the cross section of the photoelectric conversion device 1, the width 124W1 of the groove of the first element isolation portion 124 and the width 124W2 of the conductive material are made 100 nm or more larger than the width 125W of the second element isolation portion 125. 6D, the silicon nitride layer constituting second portion 124B of first element isolation portion 124 is disposed to a thickness of more than 10 nm. This makes it possible to more suitably achieve connection between first element isolation portion 124 and second element isolation portion 125.

[0046] In this embodiment, the second element isolation section 125 is connected to the first element isolation section 124 as close as possible to the conductive material of the first element isolation section 124 while suitably reducing the decrease in breakdown voltage between the conductive material and the silicon substrate. To this end, a silicon oxide layer and a silicon nitride layer are stacked in the first element isolation section 124, but the film thicknesses and film thickness ratios of the layers may be changed as long as the design requirements of the photoelectric conversion device 1 can be satisfied.

[0047] <Second embodiment> Next, a photoelectric conversion device according to a second embodiment will be described with reference to Figures 7A and 7B. In the following description, the same reference numerals are used for configurations common to the first embodiment, detailed description is omitted, and differences from the first embodiment will be mainly described. Figure 7A is a cross-sectional view of two pixels of a photoelectric conversion device 2 according to the second embodiment in a direction perpendicular to the substrate, and corresponds to the cross section taken along line A-A' in Figure 1. Figure 7B corresponds to the cross section taken along line B-B' in Figure 1.

[0048] In this embodiment, a metallic reflective member is embedded in the groove of the second element isolation portion 125 formed in the same manner as in the first embodiment, so that the incident light is reflected by the second element isolation portion 125, and avalanche multiplication can be generated in the semiconductor layer 102. The second element isolation portion 125 is composed of a first portion 125A, a second portion 125B, and a third portion 125C. The first portion 125A of the second element isolation portion 125 contains aluminum oxide or hafnium oxide as a fixed charge film. The second portion 125B of the second element isolation portion 125 contains silicon oxide. The third portion 125C of the second element isolation portion 125 contains a conductive material such as titanium, gold, silver, copper, or platinum. The first element isolation portion 124 and the second element isolation portion 125 are connected to each other in the same manner as in the first embodiment, so that the sensitivity of the APD 10 and the APD 20 can be improved while reducing light emission crosstalk to adjacent pixels.

[0049] A fixed charge film 121 containing aluminum oxide or hafnium oxide, a planarization film 122, and a microlens 123 are formed on the light incident surface side of the semiconductor layer 102 of the photoelectric conversion device 2 of this embodiment, i.e., the second surface D side. A wiring layer 103 containing a conductive band and an insulating film is provided on the surface opposite to the light incident surface of the semiconductor layer 102, i.e., the first surface C side, and a wiring structure consisting of an oxide film 141, a protective film 142, and further a conductive band are laminated from the side closer to the semiconductor layer 102.

[0050] Between the wiring and the semiconductor layer and between the wiring layers, an interlayer film 143 which is an insulating film is provided. The protective film 142 is a film for protecting the semiconductor layer from plasma damage and metal contamination during etching. Silicon nitride, which is a nitride film, is generally used, but silicon oxynitride, silicon carbide, silicon carbide nitride, or the like may also be used. The wiring layer 103 has a cathode wiring 131A and an anode wiring 131B, the cathode wiring 131A is connected to the first semiconductor region 111, and the anode wiring 131B supplies a voltage to the seventh semiconductor region 117 via the ninth semiconductor region 119, which is an anode contact.

[0051] According to the photoelectric conversion device 2 of this embodiment, by combining the first element isolation section 124 and the second element isolation section 125, it is possible to improve sensitivity while suppressing light emission crosstalk to adjacent pixels.

[0052] As described above, according to the photoelectric conversion device of the above embodiment, when forming the second element isolation portion using an etching device, it is possible to prevent the silicon contained in the substrate from being exposed to the metal material during etching. As a result, according to the photoelectric conversion device of the above embodiment, it is possible to suppress the generation of dark current caused by the diffusion of metal atoms. In addition, the thickness of the insulating material covering the conductive material around the connection portion between the first element isolation portion and the second element isolation portion does not become locally small, and the decrease in the withstand voltage between the conductive material and the silicon substrate can be reduced. Furthermore, since the metallic material constituting each element isolation portion is not easily affected by the shape change caused by etching, the variation in the electric field generated when a potential is applied to the element isolation portion for charge control is suppressed, and the variation in sensitivity between pixels and chips can also be reduced.

[0053] <Third embodiment> Next, a photoelectric conversion device according to a third embodiment will be described with reference to Figs. 8 and 9. In the following description, the same reference numerals are used for configurations common to the above-mentioned embodiments, detailed description is omitted, and differences from the above-mentioned embodiments will be mainly described. Fig. 8 is a cross-sectional view of two pixels of a photoelectric conversion device 3 according to this embodiment in a direction perpendicular to the substrate, and corresponds to the cross-section along line B-B' in Fig. 1. Fig. 9 is a cross-sectional view of two pixels of a photoelectric conversion device 4 according to this embodiment in a direction perpendicular to the substrate, and corresponds to the cross-section along line B-B' in Fig. 1.

[0054] In the above embodiment, a photoelectric conversion device having an APD has been described. However, other device configurations, for example, a CMOS (Complementary Metal-Oxide Semiconductor) image sensor, The above-mentioned embodiments can also be applied to a photoelectric conversion device having a filter. A photoelectric conversion device 3 shown in Fig. 8 corresponds to a modified example of the photoelectric conversion device 1 of the first embodiment, and a photoelectric conversion device 4 shown in Fig. 9 corresponds to a modified example of the photoelectric conversion device 2 of the second embodiment.

[0055] As shown in FIG. 8, the photoelectric conversion device 3 of this embodiment has a photodiode 310 corresponding to the first photoelectric conversion element of the photoelectric conversion device 1 and a photodiode 320 corresponding to the second photoelectric conversion element. In addition, in the photoelectric conversion device 3, N-type semiconductor regions 305, 306, 311, 312, 315 and P-type semiconductor regions 307, 308 are arranged instead of the first semiconductor region 111 to the fifth semiconductor region 115 of the photoelectric conversion device 1. In addition, the interlayer film 143 of the photoelectric conversion device 3 is provided with gate electrodes 313, 314 made of a silicide-based material. The semiconductor regions 307, 308 function as a channel stop layer. The semiconductor regions 311, 312 function as a photoelectric conversion unit that converts incident light into a signal by photoelectric conversion. The gate electrodes 313, 314 are gate electrodes of transfer transistors that receive a photoelectrically converted signal and transfer the signal to a downstream amplification transistor.

[0056] 9, in the photoelectric conversion device 4 of this embodiment, N-type semiconductor regions 405, 406, 411, 412, and 415 and P-type semiconductor regions 407 and 408 are arranged instead of the first semiconductor region 111 to the fifth semiconductor region 115 of the photoelectric conversion device 2. The interlayer film 143 of the device 4 is provided with gate electrodes 413 and 414 made of a silicide-based material. The semiconductor regions 407 and 408 function as channel stop layers. The semiconductor regions 411 and 412 function as photoelectric conversion sections that convert incident light into a signal by photoelectric conversion. The gate electrodes 413 and 414 are gate electrodes of transfer transistors that receive the photoelectrically converted signal and transfer the signal to a downstream amplification transistor.

[0057] The photoelectric conversion devices 3 and 4 of this embodiment have a photodiode as a photoelectric conversion element, and employ a typical configuration such as a transfer transistor and an amplification transistor as a readout element from the photodiode. As a result, the photoelectric conversion devices 3 and 4 of this embodiment can also improve sensitivity while suppressing light emission crosstalk to adjacent pixels, similar to the photoelectric conversion devices 1 and 2 of the first and second embodiments.

[0058] <Fourth embodiment> Any of the first to third embodiments can be applied to the fourth embodiment. FIG. 10 is a schematic diagram for explaining a device 9191 including a semiconductor device 930 of this embodiment. The semiconductor device 930 can be any of the photoelectric conversion devices explained in the first to third embodiments, or a photoelectric conversion device combining a plurality of the embodiments. The device 9191 including the semiconductor device 930 will be explained in detail. The semiconductor device 930 can include a package 920 that houses the semiconductor device 910 in addition to a semiconductor device 910 having a semiconductor layer. The package 920 can include a base to which the semiconductor device 910 is fixed, and a cover such as glass that faces the semiconductor device 910. The package 920 can further include a bonding member such as a bonding wire or a bump that connects a terminal provided on the base and a terminal provided on the semiconductor device 910.

[0059] The device 9191 can include at least one of an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 is, for example, a lens, a shutter, or a mirror. The control device 950 controls the semiconductor device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0060] The processing device 960 processes the signal output from the semiconductor device 930. The processing device 960 is a semiconductor device such as a CPU or ASIC for configuring an AFE (analog front end) or a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (images) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or a semiconductor device that stores information (images) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0061] The mechanical device 990 has a moving part or a propulsion part such as a motor or an engine. In the device 9191, the signal output from the semiconductor device 930 is displayed on the display device 970, or transmitted to the outside by a communication device (not shown) included in the device 9191. For this purpose, the device 9191 preferably further includes a memory device 980 and a processing device 960 in addition to the memory circuit and arithmetic circuit included in the semiconductor device 930. The mechanical device 990 may be controlled based on the signal output from the semiconductor device 930.

[0062] The device 9191 is also suitable for electronic devices such as information terminals (e.g., smartphones and wearable devices) with a photographing function and cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). The mechanical device 990 in the camera can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in the camera can move the semiconductor device 930 for vibration isolation operation. do.

[0063] The device 9191 may be transportation equipment such as a vehicle, a ship, or an aircraft. The mechanical device 990 in the transportation equipment may be used as a moving device. The device 9191 as a transportation equipment is suitable for transporting the semiconductor device 930 or for assisting and / or automating driving (piloting) by using a photographing function. The processing device 960 for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device 990 as a moving device based on information obtained by the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, an office machine such as a copier, or an industrial device such as a robot.

[0064] According to the fourth embodiment described above, it is possible to obtain good pixel characteristics. Therefore, it is possible to increase the value of the semiconductor device 930. In this case, increasing the value corresponds to at least one of adding a function, improving performance, improving characteristics, improving reliability, improving manufacturing yield, reducing environmental load, reducing costs, reducing size, and reducing weight.

[0065] Therefore, if the semiconductor device 930 according to the fourth embodiment is used in the equipment 9191, the value of the equipment can be improved. For example, by mounting the semiconductor device 930 on a transport equipment, excellent performance can be obtained when photographing the outside of the transport equipment or measuring the external environment. Therefore, in manufacturing and selling the transport equipment, it is advantageous to decide to mount the semiconductor device 930 according to the fourth embodiment on the transport equipment in order to improve the performance of the transport equipment itself. In particular, the semiconductor device 930 is suitable for transport equipment that performs driving assistance and / or automatic driving of the transport equipment using information obtained by the semiconductor device 930.

[0066] The above-described embodiments may be modified as appropriate without departing from the technical concept. The disclosure of this specification includes not only what is described in this specification, but also all matters that can be understood from this specification and the drawings attached hereto. The disclosure of this specification also includes the complement of the concepts described in this specification. In other words, if this specification contains a statement that "A is greater than B," even if the statement that "A is not greater than B" is omitted, this specification still discloses that "A is not greater than B." This is because when it contains a statement that "A is greater than B," it is assumed that the case in which "A is not greater than B" is taken into consideration.

[0067] The disclosure of this embodiment includes the following configurations and methods. (Configuration 1) A photoelectric conversion device having a semiconductor layer, a plurality of photoelectric conversion elements, each having a photoelectric conversion unit disposed on a first surface side of the semiconductor layer, into which light from a light source is incident from a second surface side of the semiconductor layer opposite to the first surface; a first element isolation portion extending from the first surface toward the second surface in the semiconductor layer between adjacent first and second photoelectric conversion elements among the plurality of photoelectric conversion elements; a second element isolation portion extending from the second surface toward the first surface in the semiconductor layer between the first photoelectric conversion element and the second photoelectric conversion element and in contact with the first element isolation portion; having the first element isolation portion has a covering portion in which a conductive material is covered with an insulating material, The covering portion is in contact with the second element isolation portion. A photoelectric conversion device comprising: (Configuration 2) The insulating material may be silicon oxide, silicon nitride, or silicon oxynitride, or The photoelectric conversion device according to configuration 1 includes any of these combinations. (Configuration 3) The photoelectric conversion device described in configuration 2, characterized in that the film thickness of the insulating material in a cross section perpendicular to the substrate on which the semiconductor layer is laminated is 10 nm or more when the insulating material is silicon nitride, 150 nm or more when the insulating material is silicon oxide, and 50 nm or more when the insulating material is silicon oxynitride. (Configuration 4) 2. The photoelectric conversion device according to configuration 1, wherein the second element isolation portion has an insulating material or a conductive material. (Configuration 5) 2. The photoelectric conversion device according to configuration 1, wherein the second element isolation portion is not in contact with the conductive material of the covering portion. (Configuration 6) The photoelectric conversion device described in configuration 1, characterized in that in a direction from the first surface to the second surface, a layer of the conductive material and a layer of the insulating material of the covering portion of the first element isolation portion, and a layer of the second element isolation portion are stacked. (Configuration 7) The photoelectric conversion device described in configuration 1, characterized in that in a cross section perpendicular to the substrate on which the semiconductor layer is stacked, the layer of insulating material in the first element isolation portion has a portion that is discontinuous due to the second element isolation portion. (Configuration 8) The photoelectric conversion device described in configuration 7, characterized in that in a cross section perpendicular to the substrate on which the semiconductor layer is stacked, the interface between the layer of insulating material and the layer of conductive material in the first element isolation part is not in contact with the second element isolation part. (Configuration 9) the photoelectric conversion device has a substrate on which the semiconductor layer and a wiring layer are laminated, In a cross section perpendicular to the substrate, the distance from the first surface to the tip of the coating is L1, the thickness of the insulating material of the coating in the vertical or horizontal direction of the cross section is L2, the thickness of the substrate is A, and a constant determined according to the material of the substrate is B. Then, the following formula (1) is satisfied: L2 ≧ (A-L1) × B (1) Here, when the material of the substrate is silicon nitride, B=0.003, when the material of the substrate is silicon oxynitride, B=0.015, when the material of the substrate is silicon oxide, B=0.044. 2. The photoelectric conversion device according to configuration 1. (Configuration 10) 2. The photoelectric conversion device according to configuration 1, wherein the first photoelectric conversion element and the second photoelectric conversion element are photodiodes. (Method 1) A step of arranging a plurality of photoelectric conversion elements in a semiconductor layer, the photoelectric conversion units being arranged on a first surface side of the semiconductor layer, and light from a light source being incident on a second surface side of the semiconductor layer opposite to the first surface; forming a first element isolation section in the semiconductor layer between adjacent first and second photoelectric conversion elements among the plurality of photoelectric conversion elements, the first element isolation section extending from the first surface toward the second surface and having a covering section in which a conductive material is covered with an insulating material; A method for producing a photoelectric conversion device, comprising: (Method 2) The method further includes a step of forming a second element isolation portion made of an insulating material or a conductive material in the semiconductor layer, the second element isolation portion extending from the second surface toward the first surface between the first photoelectric conversion element and the second photoelectric conversion element and abutting the first element isolation portion. 2. The method for producing a photoelectric conversion device according to claim 1, (Method 3) The method for manufacturing a photoelectric conversion device described in Method 2, characterized in that in the step of forming the second element isolation portion, the second element isolation portion is formed by etching the semiconductor layer, and the etching is stopped before the insulating material of the covering portion is exposed and the conductive material of the covering portion is exposed. (Configuration 11) An apparatus comprising the photoelectric conversion device according to any one of claims 1 to 10, an optical device corresponding to the photoelectric conversion device; A control device for controlling the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device. [Explanation of symbols]

[0068] 1 Photoelectric conversion device, 10, 20 APD, 102 Semiconductor layer, 124, 125 Element isolation portion, 124E Covering portion

Claims

1. A photoelectric conversion device having a semiconductor layer, a plurality of photoelectric conversion elements, each having a photoelectric conversion unit disposed on a first surface side of the semiconductor layer, into which light from a light source is incident from a second surface side of the semiconductor layer opposite to the first surface; a first element isolation portion extending from the first surface toward the second surface in the semiconductor layer between adjacent first and second photoelectric conversion elements among the plurality of photoelectric conversion elements; a second element isolation portion extending from the second surface toward the first surface between the first photoelectric conversion element and the second photoelectric conversion element in the semiconductor layer and abutting on the first element isolation portion; and the first element isolation portion has a covering portion in which a conductive material is covered with an insulating material containing silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof; the covering portion abuts against the second element isolation portion, The film thickness of the insulating material in a cross section perpendicular to the substrate on which the semiconductor layer is laminated is 10 nm or more when the insulating material is silicon nitride, 150 nm or more when the insulating material is silicon oxide, and 50 nm or more when the insulating material is silicon oxynitride. A photoelectric conversion device characterized by:

2. The photoelectric conversion device according to claim 1 , wherein the second element isolation portion includes an insulating material or a conductive material.

3. The photoelectric conversion device according to claim 1 , wherein the second element isolation portion is not in contact with the conductive material of the covering portion.

4. The photoelectric conversion device according to claim 1, characterized in that in the direction from the first surface toward the second surface, a layer of the conductive material of the covering portion of the first element isolation portion, a layer of the insulating material, and a layer of the second element isolation portion are stacked.

5. 2. The photoelectric conversion device according to claim 1, wherein in a cross section perpendicular to the substrate on which the semiconductor layer is stacked, the layer of insulating material in the first element isolation portion has a portion that is discontinuous due to the second element isolation portion.

6. 6. The photoelectric conversion device according to claim 5, wherein in a cross section perpendicular to the substrate on which the semiconductor layer is stacked, the interface between the layer of insulating material and the layer of conductive material in the first element isolation portion is not in contact with the second element isolation portion.

7. the photoelectric conversion device has a substrate on which the semiconductor layer and the wiring layer are stacked, In a cross section perpendicular to the substrate, the distance from the first surface to the tip of the covering portion is L1, the thickness of the insulating material of the covering portion in the vertical or horizontal direction of the cross section is L2, the thickness of the substrate is A, and a constant determined depending on the material of the substrate is B. Then, the following formula (1) is satisfied: L2≧(A-L1)×B...(1) Here, when the substrate material is silicon nitride, B=0.003, when the substrate material is silicon oxynitride, B=0.015, and when the substrate material is silicon oxide, B=0.

044.

2. The photoelectric conversion device according to claim 1.

8. 2. The photoelectric conversion device according to claim 1, wherein the first photoelectric conversion element and the second photoelectric conversion element are photodiodes.

9. A photoelectric conversion device having a substrate on which a semiconductor layer and a wiring layer are stacked, a plurality of photoelectric conversion elements, each having a photoelectric conversion unit disposed on a first surface side of the semiconductor layer, into which light from a light source is incident from a second surface side of the semiconductor layer opposite to the first surface; a first element isolation portion extending from the first surface toward the second surface in the semiconductor layer between adjacent first and second photoelectric conversion elements among the plurality of photoelectric conversion elements; a second element isolation portion extending from the second surface toward the first surface between the first photoelectric conversion element and the second photoelectric conversion element in the semiconductor layer and abutting on the first element isolation portion; and the first element isolation portion has a covering portion in which a conductive material is covered with an insulating material, the covering portion abuts against the second element isolation portion, In a cross section perpendicular to the substrate, the distance from the first surface to the tip of the covering portion is L1, the thickness of the insulating material of the covering portion in the vertical or horizontal direction of the cross section is L2, the thickness of the substrate is A, and a constant determined depending on the material of the substrate is B. Then, the following formula (1) is satisfied: L2≧(A-L1)×B...(1) Here, when the substrate material is silicon nitride, B=0.003, when the substrate material is silicon oxynitride, B=0.015, and when the substrate material is silicon oxide, B=0.

044. A photoelectric conversion device characterized by:

10. A photoelectric conversion device as described in Claim 9, characterized in that the insulating material includes silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof.

11. The film thickness of the insulating material in a cross section perpendicular to the substrate on which the semiconductor layer is laminated is 10 nm or more when the insulating material is silicon nitride, 150 nm or more when the insulating material is silicon oxide, or 50 nm or more when the insulating material is silicon oxynitride.

11. The photoelectric conversion device according to claim 10, wherein

12. A photoelectric conversion device as described in Claim 9, characterized in that the second element isolation portion has an insulating material or a conductive material.

13. A photoelectric conversion device as described in Claim 9, characterized in that the second element isolation portion is not in contact with the conductive material of the covering portion.

14. A photoelectric conversion device as described in Claim 9, characterized in that in the direction from the first surface toward the second surface, a layer of conductive material and a layer of insulating material of the covering portion of the first element isolation portion, and a layer of the second element isolation portion are stacked.

15. A photoelectric conversion device as described in Claim 9, characterized in that in a cross section perpendicular to the substrate on which the semiconductor layer is stacked, the layer of insulating material of the first element isolation portion has a portion that is discontinuous due to the second element isolation portion.

16. A photoelectric conversion device as described in Claim 15, characterized in that in a cross section perpendicular to the substrate on which the semiconductor layer is stacked, the interface between the layer of insulating material and the layer of conductive material of the first element isolation portion is not in contact with the second element isolation portion.

17. The photoelectric conversion device according to claim 9, wherein the first photoelectric conversion element and the second photoelectric conversion element are photodiodes.

18. a step of arranging a plurality of photoelectric conversion elements in a semiconductor layer, the photoelectric conversion units being arranged on a first surface side of the semiconductor layer, and light from a light source being incident on a second surface side of the semiconductor layer opposite to the first surface; forming a first element isolation section in the semiconductor layer between adjacent first and second photoelectric conversion elements among the plurality of photoelectric conversion elements, the first element isolation section extending from the first surface toward the second surface and having a covering section covered with an insulating material containing a conductive material selected from the group consisting of silicon oxide, silicon nitride, and silicon oxynitride, or a combination thereof; and The film thickness of the insulating material in a cross section perpendicular to the substrate on which the semiconductor layer is laminated is 10 nm or more when the insulating material is silicon nitride, 150 nm or more when the insulating material is silicon oxide, and 50 nm or more when the insulating material is silicon oxynitride. A method for manufacturing a photoelectric conversion device, comprising:

19. 19. The method for manufacturing a photoelectric conversion device according to claim 18, further comprising a step of forming a second element isolation portion made of an insulating material or a conductive material in the semiconductor layer between the first photoelectric conversion element and the second photoelectric conversion element, extending from the second surface toward the first surface and abutting the first element isolation portion.

20. 20. The method for manufacturing a photoelectric conversion device according to claim 19, wherein in the step of forming the second element isolation portion, the second element isolation portion is formed by etching the semiconductor layer, and the etching is stopped before the insulating material of the covering portion is exposed and the conductive material of the covering portion is exposed.

21. An apparatus comprising the photoelectric conversion device according to any one of claims 1 to 17, an optical device corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device.

Images