Method and apparatus for adaptive reordering for reference frames

Abstract

To provide a method and an apparatus for adaptive reordering for reference frames.SOLUTION: The present disclosure relates to adaptively reordering reference frames for video coding technologies. Template matching (TM) may be used to reorder the reference frames or reference frame pairs for each block by comparing the difference between the template of a current block and the template of a reference block with reference to the motion information of the spatial reference motion information (or spatial motion vectors) and / or temporal reference motion information (or temporal motion vectors). The difference between the template of the current block and the template of the reference block may be calculated for each spatial reference motion information and / or temporal reference motion information, and marked as the score value of the associated reference frames or reference frame pairs. The available reference frames or reference frame pairs are ranked on the basis of the score value.SELECTED DRAWING: Figure 24

Description

[Technical field]

[0001] [Incorporated by reference]

[0002] This application claims the benefit of priority to U.S. Nonprovisional Application No. 17 / 932,333, entitled "METHOD AND APPARATUS FOR ADAPTIVE REORDERING FOR REFERENCE FRAMES," filed on September 15, 2022, which claims priority to U.S. Provisional Application No. 63 / 247,088, entitled "METHOD AND APPARATUS FOR ADAPTIVE REORDERING FOR REFERENCE FRAMES," filed on September 22, 2021, each of which is incorporated by reference in its entirety herein. [Technical field]

[0003] This disclosure describes a set of advanced video coding techniques. More specifically, the techniques disclosed involve adaptively reordering reference frames. [Background technology]

[0004] This background discussion provided herein is intended to generally present the context of the present disclosure. The work of the presently named inventors is not admitted expressly or impliedly as prior art to the present disclosure, as are aspects of the description that are not admitted as prior art at the time of the filing of this application, to the extent that such work is described in this background section.

[0005] Video coding and decoding can be performed using inter-picture prediction with motion compensation. Uncompressed digital video can include a sequence of pictures, each having spatial dimensions of, for example, 1920x1080 luminance samples and associated full or subsampled chrominance samples. The sequence of pictures can have a fixed or variable picture rate (alternatively called frame rate), for example, 60 pictures / second or 60 frames / second. Uncompressed video has specific bit rate requirements for streaming or data processing. For example, a video with a pixel resolution of 1920x1080, a frame rate of 60 frames / second, and chroma subsampling of 4:2:0 with 8 bits / pixel per color channel requires a bandwidth close to 1.5 Gbit / second. One hour of such video requires more than 600 gigabytes of storage space.

[0006] One goal of video coding and decoding may be to reduce redundancy in the uncompressed input video signal through compression. Compression can help reduce the aforementioned bandwidth and / or storage space requirements, in some cases by more than one order of magnitude. Both lossless and lossy compression and combinations of these may be employed. Lossless compression refers to techniques where an exact copy of the original signal can be reconstructed from the compressed original signal through the decoding process. Lossy compression refers to a coding / decoding process where the original video information is not fully preserved during coding and is not fully recoverable during decoding. When using lossy compression, the reconstructed signal may not be identical to the original signal, but the distortion between the original and reconstructed signals is made small enough to make the reconstructed signal useful for the intended application, albeit with some information loss. For video, lossy compression has been widely adopted in many applications. The amount of acceptable distortion depends on the application. For example, a user of a particular consumer video streaming application may tolerate higher distortion than a user of a movie or television broadcast application. The compression ratio achievable by a particular coding algorithm may be selected or adjusted to reflect different distortion tolerances. A higher tolerable distortion generally allows for coding algorithms that result in higher loss and higher compression ratios.

[0007] Video encoders and decoders can utilize techniques from a number of broad categories and steps, including, for example, motion compensation, Fourier transform, quantization, and entropy coding.

[0008] Video codec technology can include a technique known as intra-coding. In intra-coding, sample values ​​are represented without reference to samples or other data from previously reconstructed reference pictures. In some video codecs, a picture is spatially subdivided into blocks of samples. When all blocks of samples are coded in intra mode, the picture may be called an intra-picture. Intra-pictures and their derivatives, such as independent decoder refresh pictures, can be used to reset the decoder state and thus can be used as the first picture in a coded video bitstream and a video session or as a still image. The samples of the block after intra prediction can then undergo a transform to the frequency domain, and the transform coefficients so generated can be quantized before entropy coding. Intra-prediction represents a technique that minimizes sample values ​​in the pre-transform domain. In some cases, the smaller the DC value after the transform and the smaller the AC coefficients, the fewer bits are required at a given quantization step size to represent the block after entropy coding.

[0009] Conventional intra-coding, for example as known from MPEG-2 generation coding techniques, does not use intra-prediction. However, some newer video compression techniques include techniques that attempt to code / decode a block based on surrounding sample data and / or metadata obtained during the encoding and / or decoding of its spatial neighbors and that precede in decoding order the block of data being intra-coded or decoded. Such techniques are hereinafter referred to as "intra-prediction" techniques. It should be noted that, at least in some cases, intra-prediction uses only reference data from the current picture being reconstructed and not from other reference pictures.

[0010] There may be many different forms of intra prediction. When more than one of such techniques are available in a given video coding technique, the technique in use may be referred to as an intra prediction mode. In a particular codec, one or more intra prediction modes may be provided. In certain cases, a mode may have sub-modes and / or may be associated with various parameters, and the mode / sub-mode information and intra coding parameters for a block of video may be coded individually or collectively included in a mode codeword. As to which codeword to use for a given mode, sub-mode, and / or parameter combination may affect the coding efficiency gain from intra prediction, and therefore may also affect the entropy coding technique used to convert the codeword into a bitstream.

[0011] Certain modes of intra prediction were introduced in H.264, improved in H.265, and further refined in newer coding techniques such as the joint exploration model (JEM), versatile video coding (VVC), and benchmark sets (BMS). In general, for intra prediction, a predictor block may be formed using neighboring sample values ​​that have become available. For example, available values ​​of a particular set of neighboring samples along a particular direction and / or line may be copied into the predictor block. A reference to the direction in use may be codeable in the bitstream or may itself be predicted.

[0012] Referring to FIG. 1A, shown at the bottom right is a subset of the nine predictor directions defined in the 33 possible intra predictor directions of H.265 (corresponding to the 33 angle modes of the 35 intra modes defined in H.265). The point where the arrows converge (101) represents the sample being predicted. The arrows represent the direction in which neighboring samples are used to predict the sample at 101. For example, arrow (102) indicates that sample (101) is predicted from one or more neighboring samples to the top right at an angle of 45 degrees from the horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from one or more neighboring samples to the bottom left of sample (101) at an angle of 22.5 degrees from the horizontal.

[0013] Continuing with reference to FIG. 1A, at the top left is shown a square block (104) of 4×4 samples (indicated by a thick dashed line). The square block (104) contains 16 samples, each of which is labeled with "S" and its position in the Y dimension (e.g., row index) and its position in the X dimension (e.g., column index). For example, sample S21 is the second sample (from the top) in the Y dimension and the first sample (from the left) in the X dimension. Similarly, sample S44 is the fourth sample in the block (104) in both the Y and X dimensions. Since the block is 4×4 samples in size, S44 is at the bottom right. Also shown are exemplary reference samples that follow a similar numbering scheme. The reference samples are labeled with R and their Y position (e.g., row index) and X position (column index) relative to the block (104). In both H.264 and H.265, predicted samples that neighbor the block being reconstructed are used.

[0014] Intra-picture prediction of block 104 may start by copying reference sample values ​​from adjacent samples according to the signaled prediction direction. For example, assume that the coded video bitstream includes signaling for this block 104 indicating the prediction direction of the arrow (102), i.e., the sample is predicted from one or more prediction samples to the upper right at an angle of 45 degrees from the horizontal. In such a case, samples S41, S32, S23, and S14 are predicted from the same reference sample R05. And sample S44 is predicted from reference sample R08.

[0015] In certain cases, especially when the orientation is not evenly divisible by 45 degrees, the values ​​of multiple reference samples may be combined, for example by interpolation, to calculate the reference sample.

[0016] As video coding technology continues to develop, the number of possible directions is increasing. For example, in H.264 (2003), nine different directions are available for intra prediction. In H.265 (2013), this increases to 33, and at the time of this disclosure, JEM / VVC / BMS can support up to 65 directions. Experimental studies have been conducted to help identify the most appropriate intra prediction directions, and certain techniques in entropy coding can be used to code those most appropriate directions with fewer bits while accepting certain bit penalties for the directions. Furthermore, the directions themselves can be predicted from neighboring directions used in intra prediction of decoded neighboring blocks.

[0017] FIG. 1B shows a schematic diagram (180) illustrating 65 intra prediction directions according to JEM to illustrate the increasing number of prediction directions in various coding techniques developed over time.

[0018] Methods for mapping bits representing intra-prediction directions to prediction directions in a coded video bitstream may vary from one video coding technique to another, and may range, for example, from simple direct mapping of prediction directions to intra-prediction modes, to codewords, complex adaptation schemes involving most probable modes, and similar techniques. In all cases, however, there may be certain directions for intra-prediction that are statistically less likely to occur in the video content than certain other directions. Since the goal of video compression is to reduce redundancy, those less likely directions may be represented by a larger number of bits than more likely directions in a well-designed video coding technique.

[0019] Inter-picture prediction or inter-prediction may be based on motion compensation. In motion compensation, sample data from a previously reconstructed picture or part thereof (reference picture) may be used to predict a newly reconstructed picture or picture part (e.g., block) after being spatially shifted in a direction indicated by a motion vector (hereinafter, MV). In some cases, the reference picture may be the same as the picture currently being reconstructed. The MV may have two dimensions X and Y, or three dimensions, with the third dimension being an indication of the reference picture in use (similar to the temporal dimension).

[0020] In some video compression techniques, the current MV applicable to a particular area of ​​sample data is predictable from other MVs, e.g., from those other MVs related to other areas of sample data that are spatially adjacent to the area being reconstructed and that precede the current MV in decoding order. Doing so can substantially reduce the overall amount of data required to code the MV by relying on removing redundancy in correlated MVs, thereby increasing compression efficiency. MV prediction can work effectively because, for example, when coding an input video signal derived from a camera (known as natural video), there is a statistical possibility that areas larger than the area to which a single MV is applicable move in a similar direction in the video sequence, and therefore, in some cases, can be predicted using similar motion vectors derived from MVs of neighboring areas. As a result, the actual MV of a given area is similar or identical to the MV predicted from the surrounding MVs. Such MVs can be represented with fewer bits after entropy coding than would have been used if the MVs were directly coded instead of predicted from the neighboring MV(s). In some cases, MV prediction can be an example of lossless compression of a signal (i.e., MV) derived from an original signal (i.e., sample stream). In other cases, the MV prediction itself may be lossy, for example due to rounding errors when computing a predictor from several surrounding MVs.

[0021] Various MV prediction mechanisms are described in H.265 / HEVC (ITU-T Rec. H.265, “High Efficiency Video Coding”, December 2016). Among the many MV prediction mechanisms specified by H.265, the one described below is a technique called “spatial merging” hereafter.

[0022] Specifically, referring to FIG. 2, a current block (201) contains samples that were discovered by the encoder during a motion search process to be predictable from a spatially shifted previous block of the same size. Instead of coding its MV directly, the MV may be derived from metadata associated with one or more reference pictures, e.g., from the most recent reference picture (in decoding order), using the MV associated with any one of five surrounding samples, denoted A0, A1, and B0, B1, B2 (202-206, respectively). In H.265, MV prediction may use predictors from the same reference picture as the neighboring blocks use.

[0023] AOMedia Video 1 (AV1) is an open video coding format designed for video transmission over the Internet. It was developed as a successor to VP9 by building on the VP9 code base and incorporating additional techniques. The AV1 bitstream specification includes reference video codecs such as H.265 or the High Efficiency Video Coding (HEVC) standard or Versatile Video Coding (VVC). Summary of the Invention

[0024] The embodiments of the present disclosure provide a method and apparatus for adaptively reordering reference frames for video coding techniques. Template matching (TM) may be used to reorder reference frames or reference frame pairs for each block by comparing the difference between a template of a current block and a template of a reference block with reference to motion information of spatial reference motion information (or spatial motion vectors) and / or temporal reference motion information (or temporal motion vectors). The difference between the template of a current block and a template of a reference block may be calculated for each spatial reference motion information and / or temporal reference motion information and marked as a score value of the associated reference frame or reference frame pair. The available reference frames or reference frame pairs are ranked based on the score value.

[0025] In one embodiment, a method for reordering reference frames for each block by template matching (TM) is provided, the method comprising the steps of: comparing a template of a current block with a template of a reference block for motion information, the motion information including spatial reference motion information or temporal reference motion information; calculating a difference between the template of the current block and the template of the reference block; determining a score value of an associated reference frame based on the calculated difference; and reordering the reference frames based on the determined score. The reference frames further comprise reference frame pairs. The TM includes a decoder-side motion vector derivation for refining the motion information of the current block. The reordering step further comprises ranking available reference frames based on a score value for each of the reference frames. When the score values ​​of the multiple reference frames are comparable, the ranking step corresponds to a scanning order of the spatial reference motion information or the temporal reference motion information. When the score values ​​of the multiple reference frames are comparable, the ranking step is based on the frequency of occurrence of these reference frames used in the spatial reference motion information or the temporal reference motion information. The calculating step includes at least one of sum of absolute differences (SAD), sum of squared differences (SSD), mean squared error (MSE), or sum of absolute difference transform (SATD). The template includes an upper or left neighboring block. The spatial reference motion information includes one or more spatial motion vectors. The temporal reference motion information includes one or more temporal motion vectors. When multiple motion vectors point to one of the reference frames, one of the motion vectors with the smallest difference is used to determine the score value. When there is no motion vector pointing to one of the reference frames, the score value is determined to be the maximum allowed value. The allowed unidirectional and bidirectional composite reference frames are ranked together by using TM, and the index of the reference frame for the current block is signaled in the bitstream.The allowed single reference frames are ranked together by using TM, and the index of the reference frame for the current block is signaled in the bitstream.

[0026] In some other embodiments, a device for processing video information is disclosed. The device may include circuitry configured to perform any one of the method implementations described above.

[0027]

[0013] Embodiments of the present disclosure also provide a non-transitory computer-readable medium storing instructions that, when executed by a computer, cause the computer to perform a method for video decoding and / or encoding. [Brief description of the drawings]

[0028] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings. [Figure 1A] 1 shows a schematic diagram of an example subset of intra-prediction direction modes. [Figure 1B] 1 shows a diagram of an exemplary intra-prediction direction. [Diagram 2] 1 illustrates a schematic diagram of a current block and its surrounding spatial merging candidates for motion vector prediction in an example. [Diagram 3] 1 shows a simplified block diagram schematic of a communication system (300) in accordance with an exemplary embodiment. [Figure 4] 4 shows a simplified block diagram schematic of a communication system (400) in accordance with an example embodiment. [Diagram 5] 1 shows a schematic diagram of a simplified block diagram of a video decoder according to an exemplary embodiment; [Figure 6] 1 shows a schematic diagram of a simplified block diagram of a video encoder according to an example embodiment; [Figure 7] 4 shows a block diagram of a video encoder according to another example embodiment. [Figure 8] 4 shows a block diagram of a video decoder according to another exemplary embodiment. [Figure 9] 1 illustrates a coding block partitioning scheme according to an exemplary embodiment of the present disclosure. [Figure 10] 1 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 11] 1 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 12] 4 illustrates an exemplary partitioning of a base block into coding blocks according to an exemplary partitioning scheme. [Figure 13] 1 illustrates an exemplary ternary partitioning scheme. [Figure 14] 1 illustrates an exemplary quadtree / binary tree coding block partitioning scheme. [Figure 15] 1 illustrates a scheme for partitioning a coding block into multiple transform blocks and a coding order of the transform blocks according to an example embodiment of this disclosure. [Figure 16] 1 illustrates another scheme for partitioning a coding block into multiple transform blocks and a coding order of the transform blocks according to an example embodiment of this disclosure. [Figure 17] 1 illustrates another scheme for partitioning a coding block into multiple transform blocks, according to an example embodiment of this disclosure. [Figure 18] 1 illustrates an exemplary partition tree for block partitioning. [Figure 19] 1 shows an example partition and tree for a quadtree plus binary tree (QTBT) structure. [Figure 20] 1 illustrates an exemplary ternary tree partitioning. [Figure 21] 1 illustrates an exemplary template matching (TM) on a search area around an initial motion vector (MV). [Figure 22]4 illustrates an example of decoder-side motion vector refinement. [Diagram 23] 4 illustrates an example of an exemplary spatial motion vector search pattern. [Figure 24] 1 illustrates a flowchart of a method according to an exemplary embodiment of the present disclosure. [Diagram 25] 1 shows a schematic diagram of a computer system according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] Throughout this specification and the claims, terms may have subtle meanings that are suggested or implied in the context beyond the explicitly stated meaning. The phrases "in one embodiment" or "in some embodiments" used herein do not necessarily refer to the same embodiment, and the phrases "in another embodiment" or "in other embodiments" used herein do not necessarily refer to different embodiments. Similarly, the phrases "in one implementation" or "in some implementations" used herein do not necessarily refer to the same implementation, and the phrases "in another implementation" or "in other implementations" used herein do not necessarily refer to different implementations. For example, the claimed subject matter is intended to include combinations of example embodiments / implementations in whole or in part.

[0030] Generally, terms may be understood at least in part from their usage in context. For example, terms such as "and", "or", or "and / or" as used herein may include various meanings that may depend at least in part on the context in which such terms are used. Typically, when "or" is used to relate a list such as A, B, or C, it is intended to mean A, B, and C (used herein in an inclusive sense) as well as A, B, or C (used herein in an exclusive sense). In addition, the terms "one or more" or "at least one" as used herein may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe a combination of features, structures, or characteristics in a plural sense, depending at least in part on the context. Similarly, terms such as "a", "an", or "the" may be understood to convey a singular use or to convey a plural use, depending at least in part on the context. In addition, it may be understood that the terms "based on" or "determined by" are not intended to convey a necessarily exclusive set of factors, but instead may permit the existence of additional factors not necessarily explicitly described, again depending at least in part on the context.

[0031] FIG. 3 shows a simplified block diagram of a communication system (300) according to one embodiment of the present disclosure. The communication system (300) includes a plurality of terminal devices capable of communicating with each other, for example, via a network (350). For example, the communication system (300) includes a first pair of terminal devices (310) and (320) interconnected via the network (350). In the example of FIG. 3, the first pair of terminal devices (310) and (320) may perform unidirectional transmission of data. For example, the terminal device (310) may code video data (e.g., of a stream of video pictures captured by the terminal device (310)) for transmission to the other terminal device (320) via the network (350). The encoded video data may be transmitted in the form of one or more coded video bitstreams. The terminal device (320) may receive coded video data from the network (350), decode the coded video data to recover video pictures, and display the video pictures according to the recovered video data. The one-way data transmission may be implemented in a media serving application, etc.

[0032] In another example, the communication system (300) includes a second pair of terminal devices (330) and (340) performing bidirectional transmission of coded video data, which may be implemented, for example, in a videoconferencing application. For the bidirectional transmission of data, in one example, each of the terminal devices (330) and (340) may code video data (e.g., of a stream of video pictures captured by the terminal device) for transmission to the other of the terminal devices (330) and (340) over the network (350). Each of the terminal devices (330) and (340) may also receive coded video data transmitted by the other of the terminal devices (330) and (340), decode the coded video data to recover the video pictures, and display the video pictures on an accessible display device according to the recovered video data.

[0033] In the example of FIG. 3, the terminal devices (310), (320), (330), and (340) may be implemented as a server, a personal computer, and a smartphone, although the applicability of the basic principles of the present disclosure may not be so limited. The embodiments of the present disclosure may be implemented in desktop computers, laptop computers, tablet computers, media players, wearable computers, dedicated video conferencing equipment, and / or the like. The network (350) represents any number or type of network that conveys coded video data between the terminal devices (310), (320), (330), and (340), including, for example, wireline (wired) and / or wireless communication networks. The communication network (350) may exchange data over circuit-switched, packet-switched, and / or other types of channels. Representative networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this description, the architecture and topology of the network (350) may not be important to the operation of the present disclosure unless explicitly described herein.

[0034] 4 illustrates an arrangement of a video encoder and a video decoder in a video streaming environment as an example of an application of the disclosed subject matter. The disclosed subject matter may be equally applicable to other video applications, including, for example, video conferencing, digital TV broadcasting, gaming, virtual reality, storage of compressed video on digital media including CDs, DVDs, memory sticks, and the like.

[0035] A video streaming system may include a video source (401) for creating a stream of uncompressed video pictures or images (402), such as a video capture subsystem (413) that may include a digital camera. In one example, the stream of video pictures (402) includes samples recorded by the digital camera of the video source 401. The stream of video pictures (402), shown in bold to emphasize its high data volume compared to the encoded video data (404) (or coded video bitstream), may be processed by an electronic device (420) that includes a video encoder (403) coupled to the video source (401). The video encoder (403) may include hardware, software, or a combination thereof for enabling or implementing aspects of the disclosed subject matter, as described in more detail below. The encoded video data (404) (or encoded video bitstream (404)), shown with thin lines to emphasize its low data volume compared to the stream of uncompressed video pictures (402), may be stored on the streaming server (405) for future use or directly stored on a downstream video device (not shown). One or more streaming client subsystems, such as the client subsystems (406) and (408) of FIG. 4, may access the streaming server (405) to retrieve copies (407) and (409) of the encoded video data (404). The client subsystem (406) may include a video decoder (410), for example, within the electronic device (430). The video decoder (410) decodes the incoming copy of the encoded video data (407) and creates an outgoing stream of video pictures (411) that is uncompressed and can be rendered on a display (412) (e.g., a display screen) or other rendering device (not shown). The video decoder 410 may be configured to perform some or all of the various functions described in this disclosure.In some streaming systems, the encoded video data (404), (407), and (409) (e.g., video bitstreams) may be encoded according to a particular video coding / compression standard. Examples of such standards include ITU-T Recommendation H.265. In one example, a video coding standard under development is informally known as Versatile Video Coding (VVC). The disclosed subject matter may be used in the context of VVC and other video coding standards.

[0036] It should be noted that the electronic devices (420) and (430) may include other components (not shown). For example, the electronic device (420) may include a video decoder (not shown), and the electronic device (430) may also include a video encoder (not shown).

[0037] 5 shows a block diagram of a video decoder (510) according to any of the following embodiments of the present disclosure. The video decoder (510) may be included in an electronic device (530). The electronic device (530) may include a receiver (531) (e.g., a receiving circuit). The video decoder (510) may be used in place of the video decoder (410) in the example of FIG. 4.

[0038] The receiver (531) may receive one or more coded video sequences to be decoded by the video decoder (510). In the same or another embodiment, one coded video sequence may be decoded at a time, where the decoding of each coded video sequence is independent of the other coded video sequences. Each video sequence may be associated with multiple video frames or images. The coded video sequences may be received from a channel (501), which may be a hardware / software link to a storage device that stores the coded video data or a streaming source that transmits the coded video data. The receiver (531) may receive the coded video data along with other data, such as coded audio data and / or auxiliary data streams, which may be forwarded to their respective processing circuits (not shown). The receiver (531) may separate the coded video sequences from other data. To combat network jitter, a buffer memory (515) may be disposed between the receiver (531) and the entropy decoder / parser (520) (hereinafter, "parser (520)"). In certain applications, the buffer memory (515) may be implemented as part of the video decoder (510). In other applications, it may be external and separate from the video decoder (510) (not shown). In still other applications, there may be a buffer memory (not shown) external to the video decoder (510), for example to combat network jitter, and there may be another additional buffer memory (515) internal to the video decoder (510), for example to handle playback timing. When the receiver (531) is receiving data from a storage / forwarding device with sufficient bandwidth and controllability, or from an isosynchronous network, the buffer memory (515) may not be needed or may be small. For use on a best-effort packet network such as the Internet, a buffer memory (515) of sufficient size may be needed, and its size may be relatively large.Such a buffer memory may be implemented with an adaptive size and may be implemented at least in part in an operating system or similar element (not shown) external to the video decoder (510).

[0039] The video decoder (510) may include a parser (520) for reconstructing symbols (521) from the coded video sequence. The categories of symbols include information used to manage the operation of the video decoder (510) and, in some cases, information for controlling a rendering device such as a display (512) (e.g., a display screen) that may or may not be an integral part of the electronic device (530) but may be coupled to the electronic device (530) as shown in FIG. 5. The control information for the rendering device(s) may be in the form of supplemental enhancement information (SEI message) or video usability information (VUI) parameter set fragments (not shown). The parser (520) may parse / entropy decode the coded video sequence received by the parser (520). The entropy coding of the coded video sequence may follow a video coding technique or standard and may follow various principles including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The parser (520) may extract, from the coded video sequence, a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the subgroup. The subgroup may include a group of pictures (GOP), a picture, a tile, a slice, a macroblock, a coding unit (CU), a block, a transform unit (TU), a prediction unit (PU), etc. The parser (520) may also extract information from the coded video sequence, such as transform coefficients (e.g., Fourier transform coefficients), quantizer parameter values, motion vectors, etc.

[0040] The parser (520) may perform entropy decoding / parsing operations on the video sequence received from the buffer memory (515) to produce symbols (521).

[0041] The reconstruction of symbols (521) may involve a number of different processing or functional units, depending on the type of coded video picture or portion thereof (inter-picture and intra-picture, inter-block and intra-block, etc.), and other factors. The units involved and how they are included may be controlled by subgroup control information parsed from the coded video sequence by the parser (520). The flow of such subgroup control information between the parser (520) and the following processing or functional units is not shown for simplicity.

[0042] Beyond the functional blocks already mentioned, the video decoder (510) may be conceptually subdivided into several functional units, as described below. In an actual implementation operating under commercial constraints, many of these functional units may interact closely with each other and may be at least partially integrated with each other. However, for purposes of clearly describing the various functions of the disclosed subject matter, a conceptual subdivision into functional units is adopted in the following disclosure.

[0043] The first unit may include a scalar / inverse transform unit (551). The scalar / inverse transform unit (551) may receive quantized transform coefficients and control information, including information indicating which type of inverse transform to use, block size, quantization factor / parameters, quantization scaling matrix, and lines as symbol(s) (521) from the parser (520). The scalar / inverse transform unit (551) may output blocks including sample values ​​that may be input to an aggregator (555).

[0044] In some cases, the output samples of the scaler / inverse transform (551) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture, but can use prediction information from a previously reconstructed portion of the current picture. Such prediction information may be provided by an intra-picture prediction unit (552). In some cases, the intra-picture prediction unit (552) may generate a block of the same size and shape as the block being reconstructed using surrounding block information already reconstructed and stored in the current picture buffer (558). The current picture buffer (558) buffers, for example, a partially reconstructed current picture and / or a fully reconstructed current picture. The aggregator (555) may, in some implementations, add prediction information generated by the intra-prediction unit (552) to the output sample information provided by the scaler / inverse transform unit (551) on a sample-by-sample basis.

[0045] In other cases, the output samples of the scalar / inverse transform unit (551) may relate to an inter-coded, possibly motion-compensated, block. In such cases, the motion compensated prediction unit (553) may access the reference picture memory (557) to fetch samples used for inter-picture prediction. After motion compensating the fetched samples according to the symbols (521) associated with the block, these samples may be added by the aggregator (555) to the output of the scalar / inverse transform unit (551) (the output of unit 551 may be referred to as a residual sample or residual signal) to generate output sample information. The address in the reference picture memory (557) from which the motion compensated prediction unit (553) fetches the prediction samples may be controlled by a motion vector available to the motion compensated prediction unit (553) in the form of a symbol (521) that may have, for example, an X, a Y component (shift), and a reference picture component (time). Motion compensation may also include interpolation of sample values ​​fetched from a reference picture memory (557) when sub-sample accurate motion vectors are used, and may be associated with a motion vector prediction mechanism, etc.

[0046] The output samples of the aggregator (555) may be subjected to various loop filtering techniques in the loop filter unit (556). The video compression techniques may include in-loop filter techniques controlled by parameters included in the coded video sequence (also called the coded video bitstream) and made available to the loop filter unit (556) as symbols (521) from the parser (520), but may also be responsive to meta-information obtained during decoding of a previous portion (in decoding order) of the coded picture or coded video sequence, or to previously reconstructed and loop filtered sample values. Several types of loop filters may be included as part of the loop filter unit 556 in various orders, as described in more detail below.

[0047] The output of the loop filter unit (556) may be a sample stream that can be output to a rendering device (512) as well as stored in a reference picture memory (557) for use in future inter-picture prediction.

[0048] Once a particular coded picture is fully reconstructed, it can be used as a reference picture for future inter-picture prediction. For example, once a coded picture corresponding to a current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser (520)), the current picture buffer (558) can become part of the reference picture memory (557), and a new current picture buffer can be reallocated before beginning reconstruction of the next coded picture.

[0049] The video decoder (510) may perform decoding operations according to a given video compression technique adopted in a standard such as ITU-T Recommendation H.265. The coded video sequence may conform to a syntax specified by the video compression technique or standard being used in the sense that the coded video sequence conforms to both the syntax of the video compression technique or standard and a profile documented in the video compression technique or standard. Specifically, a profile may select a particular tool from all tools available in the video compression technique or standard as the only tool available for use under that profile. To conform to a standard, the complexity of the coded video sequence may be within a range defined by a level of the video compression technique or standard. In some cases, the level limits a maximum picture size, a maximum frame rate, a maximum reconstruction sample rate (e.g., measured in megasamples / second), a maximum reference picture size, etc. The limits set by the level may be further limited in some cases through a Hypothetical Reference Decoder (HRD) specification and metadata for HRD buffer management signaled in the coded video sequence.

[0050] In some demonstrative embodiments, the receiver (531) may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence(s). The additional data may be used by the video decoder (510) to properly decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0051] 6 shows a block diagram of a video encoder (603) according to an exemplary embodiment of the present disclosure. The video encoder (603) may be included in an electronic device (620). The electronic device (620) may further include a transmitter (640) (e.g., a transmission circuit). The video encoder (603) may be used in place of the video encoder (403) in the example of FIG. 4.

[0052] The video encoder (603) may receive video samples from a video source (601) (which is not part of the electronic device (620) in the example of FIG. 6) that may capture the video image(s) to be coded by the video encoder (603). In another example, the video source (601) may be implemented as part of the electronic device (620).

[0053] The video source (601) may provide a source video sequence to be coded by the video encoder (603) in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 YCrCb, RGB, XYZ ...), and any suitable sampling structure (e.g., YCrCb 4:2:0, YCrCb 4:4:4). In a media serving system, the video source (601) may be a storage device that can store previously prepared video. In a video conferencing system, the video source (601) may be a camera that captures local image information as a video sequence. The video data may be provided as a number of individual pictures or images that give motion when viewed in succession. The picture itself may be organized as a spatial array of pixels, where each pixel may contain one or more samples depending on the sampling structure, color space, etc. being used. Those skilled in the art can easily understand the relationship between pixels and samples. The following description focuses on samples.

[0054] According to some example embodiments, the video encoder (603) may code and compress pictures of a source video sequence into a coded video sequence (643) in real time or under any other time constraint required by the application. Enforcing an appropriate coding rate constitutes one function of the controller (650). In some embodiments, the controller (650) may be functionally coupled to and control other functional units, as described below. Coupling is not shown for simplicity. Parameters set by the controller (650) may include rate control related parameters (picture skip, quantizer, lambda value of rate distortion optimization techniques, ...), picture size group of pictures (GOP) layout, maximum motion vector search range, etc. The controller (650) may be configured with other appropriate functions associated with the video encoder (603) optimized for a particular system design.

[0055] In some example embodiments, the video encoder (603) may be configured to operate in a coding loop. As an oversimplified explanation, in one example, the coding loop may include a source coder (630) (e.g., responsible for creating symbols, such as a symbol stream, based on an input picture to be coded and reference picture(s)) and a (local) decoder (633) embedded in the video encoder (603). The decoder (633) reconstructs the symbols to create sample data in a similar manner as the (remote) decoder would, even if the embedded decoder 633 processed the coded video stream by the source coder 630 without entropy coding (since any compression between the symbols in entropy coding and the coded video bitstream may be lossless in the video compression techniques considered in the disclosed subject matter). The reconstructed sample stream (sample data) is input to a reference picture memory (634). Since the decoding of the symbol stream results in bit-exact results independent of the location of the decoder (local or remote), the contents in the reference picture memory (634) are also bit-exact between the local and remote encoders. In other words, the predictive part of the encoder "sees" exactly the same sample values ​​as the reference picture samples that the decoder will "see" when using the prediction during decoding. This basic principle of reference picture synchrony (and the resulting drift if synchrony cannot be maintained, e.g., due to channel errors) is used to improve coding quality.

[0056] The operation of the "local" decoder (633) may be the same as that of a "remote" decoder, such as the video decoder (510) already described in detail above in connection with Figure 5. However, with brief reference also to Figure 5, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder (645) and parser (520) may be lossless, the entropy decoding portion of the video decoder (510), including the buffer memory (515) and parser (520), may not be implemented entirely within the local decoder (633) in the encoder.

[0057] An observation that can be made at this point is that any decoder technology, except for parsing / entropy decoding, which may only exist in the decoder, may also necessarily need to exist in the corresponding encoder, in substantially identical functional form. For this reason, the disclosed subject matter may sometimes focus on the decoder operations related to the decoding portion of the encoder. Thus, a description of the encoder technology may be omitted, since it is the reverse of the decoder technology described generically. Only in certain areas or aspects is a more detailed description of the encoder provided below.

[0058] During operation in some example implementations, the source coder (630) may perform motion-compensated predictive coding, which predictively codes an input picture with reference to one or more previously coded pictures from a video sequence designated as “reference pictures.” In this manner, the coding engine (632) codes differences (or residuals) in color channels between pixel blocks of the input picture and pixel blocks of reference picture(s) that may be selected as predictive reference(s) to the input picture. The term “residue” and its adjective form “residual” may be used interchangeably.

[0059] The local video decoder (633) may decode coded video data of pictures that may be designated as reference pictures based on symbols created by the source coder (630). The operation of the coding engine (632) may advantageously be a lossy process. When the coded video data may be decoded in a video decoder (not shown in FIG. 6), the reconstructed video sequence may be a replica of the source video sequence, typically with some errors. The local video decoder (633) may replicate the decoding process that may be performed by the video decoder on the reference pictures and store the reconstructed reference pictures in a reference picture cache (634). In this way, the video encoder (603) may locally store copies of reconstructed reference pictures that have common content with reconstructed reference pictures obtained by a far-end (remote) video decoder (without transmission errors).

[0060] The predictor (635) may perform the prediction search of the coding engine (632). That is, for a new picture to be coded, the predictor (635) may search the reference picture memory (634) for sample data (as candidate reference pixel blocks) or specific metadata such as reference picture motion vectors, block shapes, etc., that may serve as suitable prediction references for the new picture. The predictor (635) may operate on a sample block-by-pixel block basis to find suitable prediction references. In some cases, as determined by the search results obtained by the predictor (635), the input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory (634).

[0061] The controller (650) may manage the coding operations of the source coder (630), including, for example, setting the parameters and subgroup parameters used to encode the video data.

[0062] The output of all the aforementioned functional units may undergo entropy coding in entropy coder 645. The entropy coder (645) converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0063] The transmitter (640) may buffer the coded video sequence(s) created by the entropy coder (645) in preparation for transmission over a communication channel (660), which may be a hardware / software link to a storage device that stores the coded video data. The transmitter (640) may merge the coded video data from the video coder (603) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).

[0064] The controller (650) may manage the operation of the video encoder (603). During coding, the controller (650) may assign a particular coded picture type to each coded picture, which may affect the coding technique that may be applied to the respective picture. For example, pictures may often be assigned as one of the following picture types:

[0065] An intra picture (I-picture) may be one that can be coded and decoded without using other pictures in a sequence as a source of prediction. Some video codecs allow different types of intra pictures, including, for example, independent decoder refresh ("IDR") pictures. Those skilled in the art are aware of these variations of I-pictures, as well as their respective uses and characteristics.

[0066] A predictive picture (P picture) may be one that can be coded and decoded using intra- or inter-prediction, which uses at most one motion vector and reference index to predict sample values ​​for each block.

[0067] A bidirectionally predicted picture (B-picture) may be one that can be coded and decoded using intra- or inter-prediction, which uses at most two motion vectors and reference indices to predict the sample values ​​of each block. Similarly, a multi-predicted picture may use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0068] A source picture may generally be spatially subdivided into multiple sample coding blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each) and coded block-by-block. A block may be predictively coded with reference to other (already coded) blocks as determined by a coding assignment applied to the respective picture of the block. For example, a block of an I picture may be non-predictively coded or predictively coded with reference to an already coded block of the same picture (spatial or intra prediction). A pixel block of a P picture may be predictively coded via spatial prediction or via temporal prediction with reference to one previously coded reference picture. A block of a B picture may be predictively coded via spatial prediction or via temporal prediction with reference to one or two previously coded reference pictures. A source picture or an intermediate processed picture may be subdivided into other types of blocks for other purposes. The division of coding blocks and other types of blocks may or may not follow the same method, as described in more detail below.

[0069] The video encoder (603) may perform coding operations in accordance with a given video coding technique or standard, such as ITU-T Recommendation H.265. In its operations, the video encoder (603) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard being used.

[0070] In some example embodiments, the transmitter (640) may transmit additional data along with the encoded video. The source coder (630) may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, SEI messages, VUI parameter set fragments, etc.

[0071] A video may be captured as multiple source pictures (video pictures) in a time sequence. Intra-picture prediction (often abbreviated as intra-prediction) exploits spatial correlation in a given picture, while inter-picture prediction exploits temporal or other correlation between pictures. For example, a particular picture being coded / decoded, called a current picture, may be partitioned into blocks. When a block in a current picture is similar to a reference block in a previously coded and still buffered reference picture in the video, it may be coded by a vector, called a motion vector. A motion vector points to a reference block in a reference picture, and may have a third dimension that identifies the reference picture if multiple reference pictures are used.

[0072] In some exemplary embodiments, a bi-prediction technique may be used for inter-picture prediction. According to such a bi-prediction technique, two reference pictures are used, such as a first reference picture and a second reference picture, both of which precede the current picture in the video in decoding order (but may be past or future, respectively, in display order). A block in the current picture may be coded by a first motion vector that points to a first reference block in the first reference picture and a second motion vector that points to a second reference block in the second reference picture. A block may be jointly predicted by a combination of the first reference block and the second reference block.

[0073] In addition, a merge mode technique may be used in inter-picture prediction to improve coding efficiency.

[0074] According to some exemplary embodiments of the present disclosure, predictions such as inter-picture prediction and intra-picture prediction are performed on a block-by-block basis. For example, a picture in a sequence of video pictures is partitioned into coding tree units (CTUs) for compression, and the CTUs in a picture may have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. In general, a CTU may include three parallel coding tree blocks (CTBs), i.e., one luma CTB and two chroma CTBs. Each CTU may be recursively quadtree partitioned into one or more coding units (CUs). For example, a CTU of 64×64 pixels may be partitioned into one CU of 64×64 pixels, or four CUs of 32×32 pixels. Each of one or more of the 32×32 blocks may be further partitioned into four CUs of 16×16 pixels. In some exemplary embodiments, each CU may be analyzed during encoding to determine the prediction type of that CU from among various prediction types, such as inter prediction type or intra prediction type. A CU may be divided into one or more prediction units (PUs) according to temporal and / or spatial predictability. In general, each PU includes one luma prediction block (PB) and two chroma PBs. In one embodiment, prediction operations during coding (encoding / decoding) are performed on a prediction block basis. The division of a CU into PUs (or PBs of different color channels) may be performed in various spatial patterns. For example, a luma or chroma PB may include a matrix of sample values ​​(e.g., luma values), such as 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 samples, etc.

[0075] 7 shows a diagram of a video encoder (703) according to another exemplary embodiment of the present disclosure. The video encoder (703) is configured to receive a processed block (e.g., a predictive block) of sample values ​​in a current video picture in a sequence of video pictures and to encode the processed block into a coded picture that is part of a coded video sequence. The exemplary video encoder (703) may be used in place of the video encoder (403) in the example of FIG. 4.

[0076] For example, the video encoder (703) receives a matrix of sample values ​​for a processing block, such as a predictive block of 8×8 samples. The video encoder (703) then determines whether the processing block is best coded using intra-mode, inter-mode, or bi-predictive mode, for example, using rate-distortion optimization (RDO). When it is determined that the processing block is coded in intra-mode, the video encoder (703) may use intra-prediction techniques to code the processing block into a coded picture, and when it is determined that the processing block is coded in inter-mode or bi-predictive mode, the video encoder (703) may use inter-prediction techniques or bi-prediction techniques to code the processing block into a coded picture, respectively. In some exemplary embodiments, a merge mode may be used as a sub-mode of inter-picture prediction, where a motion vector is derived from one or more motion vector predictors without the benefit of coded motion vector components outside the predictors. In some other exemplary embodiments, there may be motion vector components applicable to the current block. Accordingly, the video encoder (703) may include components not explicitly shown in FIG. 7, such as a mode decision module, to determine the prediction mode of a processing block.

[0077] In the example of FIG. 7, the video encoder (703) includes an inter-encoder (730), an intra-encoder (722), a residual calculator (723), a switch (726), a residual encoder (724), an overall controller (721), and an entropy encoder (725), coupled together as shown in the exemplary configuration of FIG.

[0078] The inter encoder (730) is configured to receive a sample of a current block (e.g., a processing block), compare the block to one or more reference blocks in a reference picture (e.g., blocks in previous and subsequent pictures in display order), generate inter prediction information (e.g., a description of redundant information due to inter encoding techniques, motion vectors, merge mode information), and calculate an inter prediction result (e.g., a prediction block) based on the inter prediction information using any suitable technique. In some examples, the reference picture is a decoded reference picture decoded based on the coded video information using a decoding unit 633 embedded in the example encoder 620 of FIG. 6 (depicted as a residual decoder 728 of FIG. 7, as described in more detail below).

[0079] The intra encoder (722) is configured to receive samples of a current block (e.g., a processing block), compare the block with already coded blocks in the same picture, generate quantized coefficients after transformation, and possibly generate intra prediction information (e.g., intra prediction direction information according to one or more intra encoding techniques). The intra encoder (722) may calculate intra prediction results (e.g., prediction blocks) based on the intra prediction information and reference blocks in the same picture.

[0080] The general controller (721) may be configured to determine general control data and control other components of the video encoder (703) based on the general control data. In one example, the general controller (721) determines a prediction mode of the block and provides a control signal to the switch (726) based on the prediction mode. For example, if the prediction mode is an intra mode, the general controller (721) controls the switch (726) to select an intra mode result for use by the residual calculator (723) and controls the entropy encoder (725) to select intra prediction information and include the intra prediction information in the bitstream, and if the prediction mode of the block is an inter mode, the general controller (721) controls the switch (726) to select an inter prediction result for use by the residual calculator (723) and controls the entropy encoder (725) to select inter prediction information and include the inter prediction information in the bitstream.

[0081] The residual calculator (723) may be configured to calculate a difference (residual data) between a received block and a prediction result for a block selected from the intra-encoder (722) or the inter-encoder (730). The residual encoder (724) may be configured to encode the residual data to generate transform coefficients. For example, the residual encoder (724) may be configured to transform the residual data from the spatial domain to the frequency domain to generate transform coefficients. The transform coefficients then undergo a quantization process to obtain quantized transform coefficients. In various exemplary embodiments, the video encoder (703) also includes a residual decoder (728). The residual decoder (728) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data may be used by the intra-encoder (722) and the inter-encoder (730) as appropriate. For example, the inter-encoder (730) may generate decoded blocks based on the decoded residual data and the inter-prediction information, and the intra-encoder (722) may generate decoded blocks based on the decoded residual data and the intra-prediction information. The decoded blocks may be appropriately processed to generate decoded pictures, which may be buffered in a memory circuit (not shown) and used as reference pictures.

[0082] The entropy encoder (725) may be configured to format a bitstream to include the coded blocks and to perform entropy coding. The entropy encoder (725) may be configured to include various information in the bitstream. For example, the entropy encoder (725) may be configured to include overall control data, selected prediction information (e.g., intra-prediction information or inter-prediction information), residual information, and other suitable information in the bitstream. When coding a block in a merged sub-mode of either an inter mode or a bi-prediction mode, the residual information may be absent.

[0083] 8 shows a diagram of an exemplary video decoder (810) according to another embodiment of the present disclosure. The video decoder (810) is configured to receive coded pictures that are part of a coded video sequence and decode the coded pictures to generate reconstructed pictures. In one example, the video decoder (810) may be used in place of the video decoder (410) in the example of FIG. 4.

[0084] In the example of FIG. 8, the video decoder (810) includes an entropy decoder (871), an inter decoder (880), a residual decoder (873), a reconstruction module (874), and an intra decoder (872), coupled to each other as shown in the exemplary configuration of FIG. 8.

[0085] The entropy decoder (871) may be configured to reconstruct from the coded picture certain symbols representing syntax elements that make up the coded picture. Such symbols may include, for example, prediction information (e.g., intra- or inter-prediction information) that may identify the mode in which the block is coded (e.g., intra-mode, inter-mode, bi-prediction mode, merged sub-mode, or another sub-mode), certain samples or metadata used for prediction by the intra-decoder (872) or inter-decoder (880), residual information in the form of quantized transform coefficients, etc. In one example, if the prediction mode is an inter- or bi-prediction mode, the inter-prediction information is provided to the inter-decoder (880), and if the prediction type is an intra-prediction type, the intra-prediction information is provided to the intra-decoder (872). The residual information may undergo inverse quantization and is provided to the residual decoder (873).

[0086] The inter decoder (880) may be configured to receive inter prediction information and generate inter prediction results based on the inter prediction information.

[0087] The intra decoder (872) may be configured to receive intra prediction information and generate a prediction result based on the intra prediction information.

[0088] The residual decoder (873) may be configured to perform inverse quantization to extract inverse quantized transform coefficients and process the inverse quantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (873) may also utilize certain control information (to include quantizer parameters (QP)), which may be provided by the entropy decoder (871) (data path not shown as this may be only low data volume control information).

[0089] The reconstruction module (874) may be configured to combine, in the spatial domain, the residual output by the residual decoder (873) with the prediction results (output by the inter prediction module or the intra prediction module, as the case may be) to form reconstructed blocks that form part of the reconstructed picture as part of the reconstructed video. It should be noted that other suitable operations, such as deblocking operations, may also be performed to improve visual quality.

[0090] It should be noted that the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using any suitable technique. In some exemplary embodiments, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using one or more integrated circuits. In another embodiment, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using one or more processors executing software instructions.

[0091] Turning to block partitioning for coding and decoding, a general partitioning may start from a base block and may follow a predefined set of rules, a specific pattern, a partition tree, or any partition structure or scheme. The partitioning may be hierarchical and recursive. After splitting or partitioning the base block according to the exemplary partitioning procedure or any of the other procedures described below, or a combination thereof, a final set of partitions or coding blocks may be obtained. Each of these partitions may be at one of various partitioning levels in the partitioning hierarchy and may be of various shapes. Each of the partitions may be referred to as a coding block (CB). For various exemplary partitioning implementations described further below, each resulting CB may be of any of the allowed sizes and partitioning levels. Such partitions are referred to as coding blocks because they may form a unit around which some basic coding / decoding decisions may be made and coding / decoding parameters may be optimized, determined, and signaled in the encoded video bitstream. The highest or deepest level in the final partition represents the depth of the coding block partitioning structure of the tree. The coding block may be a luma coding block or a chroma coding block. The CB tree structure for each color may be referred to as a coding block tree (CBT).

[0092] The coding blocks of all color channels may be collectively referred to as a coding unit (CU). The hierarchical structure of all color channels may be collectively referred to as a coding tree unit (CTU). The partitioning pattern or structure for various color channels in a CTU may or may not be the same.

[0093] In some implementations, the partition tree scheme or structure used for the luma channel and the chroma channel may not need to be the same. In other words, the luma channel and the chroma channel may have separate coding tree structures or patterns. Furthermore, whether the luma channel and the chroma channel use the same or different coding partition tree structures, and the actual coding partition tree structure to be used, may depend on whether the slice being coded is a P slice, a B slice, or an I slice. For example, for an I slice, the chroma channel and the luma channel may have separate coding partition tree structures or coding partition tree structure modes, while for a P or B slice, the luma channel and the chroma channel may share the same coding partition tree scheme. When separate coding partition tree structures or modes are applied, the luma channel may be partitioned into CBs by one coding partition tree structure, and the chroma channel may be partitioned into chroma CBs by another coding partition tree structure.

[0094] In some exemplary implementations, a predefined partitioning pattern may be applied to the base block. As shown in FIG. 9, an exemplary 4-way partition tree may start at a first predefined level (e.g., 64×64 block level or other size as the base block size), and the base block may be partitioned hierarchically down to a predefined lowest level (e.g., 4×4 level). For example, the base block may receive four predefined partitioning options or patterns, as shown by 902, 904, 906, and 908, and the partition designated as R is capable of recursive partitioning in that the same partitioning options as shown in FIG. 9 may be repeated at a lower scale down to the lowest level (e.g., 4×4 level). In some implementations, additional restrictions may be applied to the partitioning scheme of FIG. 9. In the implementation of FIG. 9, rectangular partitions (e.g., 1:2 / 2:1 rectangular partitions) may be allowed, but they may not be allowed to be recursive, whereas square partitions are allowed to be recursive. Partitioning according to FIG. 9 with recursion generates a final set of coding blocks, if necessary. A coding tree depth may be further defined to indicate the partition depth from the root node or root block. For example, the coding tree depth for a root node or root block, e.g., a 64×64 block, may be set to 0, and the coding tree depth is increased by 1 after the root block is further divided according to FIG. 9. The maximum or deepest level from the 64×64 base block to the 4×4 minimum partition is 4 (starting from level 0) in the above scheme. Such a partitioning scheme may be applied to one or more of the color channels. Each color channel may be partitioned independently according to the scheme of FIG. 9 (e.g., a partitioning pattern or option between predefined patterns may be determined independently for each of the color channels at each hierarchical level).Alternatively, two or more of the color channels may share the same hierarchical pattern tree as in FIG. 9 (e.g., the same partitioning pattern or options among predefined patterns may be chosen for two or more color channels at each hierarchical level).

[0095] FIG. 10 illustrates another exemplary predefined partitioning pattern that allows recursive partitioning to form a partitioning tree. As illustrated in FIG. 10, an exemplary 10-way partitioning structure or pattern may be predefined. A root block may start at a predefined level (e.g., from a base block at a 128×128 level or a 64×64 level). The exemplary partitioning structure of FIG. 10 includes various 2:1 / 1:2 and 4:1 / 1:4 rectangular partitions. A partition type having three subpartitions, indicated by 1002, 1004, 1006, and 1008 in the second row of FIG. 10, may be referred to as a “T-shaped” partition. The “T-shaped” partitions 1002, 1004, 1006, and 1008 may be referred to as a left T-shaped, an upper T-shaped, a right T-shaped, and a lower T-shaped. In some exemplary implementations, none of the rectangular partitions of FIG. 10 allow further subdivision. A coding tree depth may be further defined to indicate the division depth from the root node or root block. For example, the coding tree depth for the root node or root block, e.g., a 128x128 block, may be set to 0, and the coding tree depth is increased by 1 after the root block is further divided according to FIG. 10. In some implementations, only the full square partition at 1010 allows recursive partitioning to the next level of the partitioning tree according to the pattern of FIG. 10. In other words, recursive partitioning may not be possible for the square partitions in the T-shaped patterns 1002, 1004, 1006, and 1008. The partitioning procedure according to FIG. 10 with recursion generates a final set of coding blocks, as necessary. Such a scheme may be applied to one or more of the color channels. In some implementations, more flexibility may be added to the use of partitions less than 8x8 levels. For example, 2x2 chroma inter prediction may be used in certain cases.

[0096] In some other example implementations for coding block partitioning, a quadtree structure may be used to divide a base block or an intermediate block into quadtree partitions. Such quadtree division may be applied hierarchically and recursively to any square partition. Whether a base block or an intermediate block or partition is further quadtree divided may be adapted to various local characteristics of the base block or intermediate block / partition. The quadtree partitioning at the picture boundary may be further adapted. For example, an implicit quadtree division may be performed at the picture boundary such that a block maintains the quadtree division until its size fits the picture boundary.

[0097] In some other example implementations, hierarchical binary partitioning from a base block may be used. For such a scheme, a base block or a mid-level block may be partitioned into two partitions. The binary partitioning may be either horizontal or vertical. For example, horizontal binary partitioning may divide a base block or a mid-level block into equal right and left partitions. Similarly, vertical binary partitioning may divide a base block or a mid-level block into equal top and bottom partitions. Such binary partitioning may be hierarchical and recursive. At each of the base or mid-level blocks, a decision may be made as to whether the binary partitioning scheme should continue, and if the scheme continues further, whether horizontal or vertical binary partitioning should be used. In some implementations, further partitioning may stop at a predefined minimum partition size (in one or both dimensions). Alternatively, further partitioning may stop when a predefined partitioning level or depth from the base block is reached. In some implementations, the aspect ratio of the partitions may be limited. For example, the aspect ratio of a partition will not be smaller than 1:4 (or larger than 4:1). Thus, a vertical strip partition having a 4:1 vertical-to-horizontal aspect ratio may be further binary partitioned only vertically into a top partition and a bottom partition, each having a 2:1 vertical-to-horizontal aspect ratio.

[0098] In yet some other examples, a ternary partitioning scheme may be used to partition the base block or any intermediate blocks, as shown in FIG. 13. The ternary pattern may be implemented vertically, as shown in 1302 of FIG. 13, or horizontally, as shown in 1304 of FIG. 13. The exemplary division ratio in FIG. 13 is shown as 1:2:1, either vertically or horizontally, but other ratios may be predefined. In some implementations, two or more different ratios may be predefined. Such a ternary partitioning scheme may be used to complement a quadtree or binary tree partitioning structure in that while quadtrees and binary trees always divide along block centers, resulting in objects being divided into separate partitions, such ternary tree partitioning is capable of capturing objects located at block centers in one contiguous partition. In some implementations, the width and height of the partitions of the exemplary ternary tree are always powers of two to avoid additional transformations.

[0099] The above partitioning schemes may be combined in any manner at different partitioning levels. As an example, the quadtree and binary partitioning schemes described above may be combined to partition the base block into a quadtree-binary tree (QTBT) structure. In such a scheme, the base block or intermediate blocks / partitions may be either quadtree partitioned or binary partitioned according to a set of predefined conditions, if specified. A specific example is shown in FIG. 14. In the example of FIG. 14, the base block is first quadtree partitioned into four partitions, as shown by 1402, 1404, 1406, and 1408. Each of the resulting partitions is then either quadtree partitioned into four further partitions (such as 1408), binary partitioned into two further partitions at the next level (e.g., horizontally or vertically, such as 1402 or 1406, both of which are symmetric), or not partitioned (1404). Binary or quadtree partitioning may be recursively enabled for square partitions, as shown by the overall example partition pattern of 1410 and the corresponding tree structure / representation in 1420, where solid lines represent quadtree partitioning and dashed lines represent binary partitioning. A flag may be used for each binary partition node (non-leaf binary partition) to indicate whether the binary partitioning is horizontal or vertical. For example, as shown in 1420, consistent with the partitioning structure of 1410, flag "0" may represent horizontal binary partitioning and flag "l" may represent vertical binary partitioning. In the case of quadtree partitioned partitions, there is no need to indicate the partition type, since quadtree partitioning always splits a block or partition both horizontally and vertically to generate four sub-blocks / partitions with equal size. In some implementations, flag "l" may represent horizontal binary partitioning and flag "0" may represent vertical binary partitioning.

[0100] In some example implementations of QTBT, the quadtree and binary splitting rule sets may be represented by the following predefined parameters and their associated corresponding functions: - CTU size: Size of the root node of the quadtree (size of the base block) - MinQTSize: The minimum allowable quadtree leaf node size. - MaxBTSize: Maximum allowed binary tree root node size - MaxBTDepth: Maximum allowed binary tree depth - MinBTSize: The minimum allowable binary tree leaf node size In some example implementations of the QTBT partitioning structure, the CTU size may be set as 128×128 luma samples with two corresponding 64×64 blocks of chroma samples (when considering and using the example chroma subsampling), MinQTSize may be set as 16×16, MaxBTSize may be set as 64×64, MinBTSize (both width and height) may be set as 4×4, and MaxBTDepth may be set as 4. Quad-tree partitioning may be applied to the CTU first to generate quad-tree leaf nodes. The quad-tree leaf nodes may have a size from its minimum allowed size of 16×16 (i.e., MinQTSize) to 128×128 (i.e., CTU size). If a node is 128×128, it will not be split by the binary tree first because the size exceeds MaxBTSize (i.e., 64×64). Otherwise, nodes that do not exceed MaxBTSize may be partitioned by binary tree. In the example of FIG. 14, the base block is 128×128. The base block can only be quadtree partitioned according to a predefined set of rules. The base block has a partitioning depth of 0. Each of the resulting four partitions is 64×64, does not exceed MaxBTSize, and may be further quadtree or binary tree partitioned at level 1. The process continues. When the binary tree depth reaches MaxBTDepth (i.e., 4), no further partitions will be considered. When a binary tree node has a width equal to MinBTSize (i.e., 4), no further horizontal partitions will be considered. Similarly, when the height of a binary tree node is equal to MinBTSize, no further vertical partitions will be considered.

[0101] In some example implementations, the above QTBT schemes may be configured to support flexibility for luma and chroma to have the same or separate QTBT structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU may share the same QTBT structure. However, for I slices, the luma CTB may be partitioned into CBs by a QTBT structure, and the chroma CTB may be partitioned into chroma CBs by another QTBT structure. This means that CUs may be used to refer to different color channels in an I slice, for example, an I slice may be composed of one luma component coding block or two chroma component coding blocks, and a CU in a P slice or B slice may be composed of all three color component coding blocks.

[0102] In some other implementations, the QTBT scheme may be supplemented with the ternary scheme described above. Such implementations may be referred to as a multi-type tree (MTT) structure. For example, in addition to the binary partitioning of the nodes, one of the ternary partition patterns of FIG. 13 may be selected. In some implementations, only square nodes may be subject to ternary partitioning. An additional flag may be used to indicate whether the ternary partitioning is horizontal or vertical.

[0103] The design of two-level or multi-level trees, such as the QTBT implementation and the QTBT implementation supplemented by ternary partitioning, may be primarily motivated by complexity reduction. Theoretically, the complexity of traversing a tree is TD, where T denotes the number of partition types and D is the depth of the tree. Trade-offs can be made by using multiple types (T) while reducing the depth (D).

[0104] In some implementations, the CB may be further partitioned. For example, the CB may be further partitioned into multiple prediction blocks (PBs) for the purpose of intra- or inter-frame prediction during the coding and decoding process. In other words, the CB may be further divided into different sub-partitions at which individual prediction decisions / configurations may be made. In parallel, the CB may be further partitioned into multiple transform blocks (TBs) for the purpose of delineating the level at which the transformation or inverse transformation of the video data is performed. The partitioning scheme of the CB into PBs and TBs may be the same or different. For example, each partitioning scheme may be performed using its own procedure, for example, based on various characteristics of the video data. The PB and TB partitioning schemes may be independent in some exemplary implementations. The PB and TB partitioning schemes and boundaries may be correlated in some other exemplary implementations. In some implementations, for example, the TB may be partitioned into PB partitions, and in particular, the PB may be further partitioned into one or more TBs after being determined according to the partitioning of the coding blocks. For example, in some implementations, the PB may be divided into one, two, four, or other number of TBs.

[0105] In some implementations, the luma and chroma channels may be treated differently for partitioning base blocks into coding blocks and further partitioning into predictive and / or transform blocks. For example, in some implementations, partitioning of coding blocks into predictive and / or transform blocks may be allowed for the luma channel, but such partitioning of coding blocks into predictive and / or transform blocks may not be allowed for the chroma channel(s). In such implementations, transform and / or prediction of luma blocks may thus be performed only at the coding block level. In another example, the minimum transform block size for the luma and chroma channel(s) may be different, e.g., coding blocks for the luma channel may be allowed to be partitioned into smaller transform and / or predictive blocks than the chroma channels. As yet another example, the maximum depth of partitioning of coding blocks into transform and / or predictive blocks may differ between luma and chroma channels, e.g., coding blocks for the luma channel may be allowed to be partitioned into deeper transform and / or predictive blocks than the chroma channel(s). In a specific example, a luma coding block is partitioned into transform blocks of multiple sizes that can be expressed with recursive partitions going up to two levels down, and transform block shapes such as square, 2:1 / 1:2, and 4:1 / 1:4 may be allowed, as well as transform block sizes from 4×4 to 64×64. However, for chroma blocks, only the largest possible transform block specified for the luma block may be allowed.

[0106] In some example implementations for partitioning a coding block into PBs, the depth, shape, and / or other characteristics of the PB partitioning may depend on whether the PB is intra-coded or inter-coded.

[0107] Partitioning of coding blocks (or predictive blocks) into transform blocks may be implemented in various exemplary manners, including but not limited to recursive or non-recursive quadtree partitioning and predefined pattern partitioning, with additional consideration of transform blocks at coding or predictive block boundaries. In general, the resulting transform blocks may be at different partitioning levels, may not be the same size, and may not need to be square in shape (e.g., they may be rectangular with some allowed size and aspect ratio). Further examples are described in more detail below with respect to Figures 15, 16, and 17.

[0108] However, in some other implementations, the CB obtained through any of the above partitioning schemes may be used as a basic or minimum coding block for prediction and / or transformation. In other words, no further partitioning is performed for inter-prediction / intra-prediction purposes and / or transformation purposes. For example, the CB obtained from the above QTBT scheme may be directly used as a unit for performing prediction. Specifically, such a QTBT structure removes the concept of multiple partition types, i.e., it removes the separation of CU, PU and TU, and supports more flexibility for CU / CB partition shapes as described above. In such a QTBT block structure, the CU / CB can have either a square shape or a rectangular shape. The leaf nodes of such a QTBT are used as units for prediction and transformation processing without further partitioning. This means that the CU, PU, ​​and TU have the same block size in such an exemplary QTBT coding block structure.

[0109] The various CB partitioning schemes described above, as well as further partitioning of the CB into PB and / or TB (including no PB / TB partitioning), may be combined in any manner. The following specific implementations are provided as non-limiting examples.

[0110] A specific exemplary implementation of coding block and transform block partitioning is described below. In such an exemplary implementation, a base block may be divided into coding blocks using a recursive quadtree division or a predefined division pattern described above (such as those in Figures 9 and 10). At each level, whether to continue further quadtree division of a particular partition may be determined by local video data characteristics. The resulting CBs may be at various quadtree division levels and various sizes. A decision on whether to code a picture area using inter-picture (temporal) prediction or intra-picture (spatial) prediction may be made at the CB level (or at the CU level for all three color channels). Each CB may be further divided into one, two, four, or other number of PBs according to a predefined PB division type. Inside one PB, the same prediction process may be applied, and related information may be transmitted to the decoder for each PB. After obtaining the residual block by applying a prediction process based on the PB division type, the CB may be partitioned into TBs according to another quadtree structure similar to the coding tree for the CB. In this particular implementation, the CB or TB may be limited to a square, but need not be limited thereto. Furthermore, in this particular example, the PB may be square or rectangular for inter prediction, and only square for intra prediction. A coding block may be divided, for example, into four square TBs. Each TB may be further divided recursively (using quadtree partitioning) into smaller TBs called residual quadtrees (RQTs).

[0111] Another exemplary implementation for partitioning a base block into CB, PB, and / or TB is further described below. For example, rather than using multiple partition unit types such as those shown in FIG. 9 or FIG. 10, a quadtree with nested multi-type tree using binary and ternary partition segmentation structures (e.g., QTBT or QTBT with ternary partitioning as described above) may be used. Separation of CB, PB, and TB (i.e., partitioning of CB into PB and / or TB and partitioning of PB into TB) may be abandoned except when required for CBs with sizes that are too large for the maximum transform length, and such CBs may require further partitioning. This exemplary partitioning scheme may be designed to support more flexibility for CB partition shapes, such that both prediction and transformation may be performed at the CB level without further partitioning. In such a coding tree structure, the CB may have either a square or rectangular shape. Specifically, the coding tree block (CTB) may be first partitioned by a quadtree structure. The quadtree leaf nodes can then be further partitioned by a nested multi-type tree structure. An example of a nested multi-type tree structure using binary or ternary partitioning is shown in FIG. 11. Specifically, the exemplary multi-type tree structure in FIG. 11 includes four partition types called vertical binary partitioning (SPLIT_BT_VER) (1102), horizontal binary partitioning (SPLIT_BT_HOR) (1104), vertical ternary partitioning (SPLIT_TT_VER) (1106), and horizontal ternary partitioning (SPLIT_TT_HOR) (1108). And CB corresponds to the leaf of the multi-type tree. In this exemplary implementation, as long as CB is not too large for the maximum transform length, this segmentation is used for both prediction and transform processing without further partitioning. This means that in most cases, CB, PB, and TB have the same block size in a quadtree with a nested multi-type tree coding block structure.An exception occurs when the maximum supported transform length is smaller than the width or height of the color components of the CB. In some implementations, in addition to the binary or ternary partitioning, the nested pattern of FIG. 11 may further include a quadtree partitioning.

[0112] One specific example for quadtree with nested multi-type tree coding block structure of block partition (including quadtree, binary, and ternary split options) for one base block is shown in FIG. 12. More specifically, FIG. 12 shows that a base block 1200 is quadtree split into four square partitions 1202, 1204, 1206, and 1208. A decision to further use the multi-type tree structure and quadtree of FIG. 11 for further splitting is made for each of the quadtree split partitions. In the example of FIG. 12, partition 1204 is not split any further. Partitions 1202 and 1208 each adopt another quadtree split. For partition 1202, the second level quadtree split upper left, upper right, lower left, and lower right partitions adopt third level split of quadtree, horizontal binary split 1104 of FIG. 11, non-split, and horizontal ternary split 1108 of FIG. 11, respectively. Partition 1208 adopts another quadtree partitioning, and the second level quadtree partitioned top-left, top-right, bottom-left, and bottom-right partitions adopt third level partitioning of vertical ternary partitioning 1106, not partitioned, not partitioned, and horizontal binary partitioning 1104 of FIG. 11, respectively. Two of the subpartitions of the top-left partition of the third level of 1208 are further divided according to horizontal binary partitioning 1104 and horizontal ternary partitioning 1108 of FIG. 11, respectively. Partition 1206 adopts a second level partitioning pattern according to vertical binary partitioning 1102 of FIG. 11 into two partitions, and these partitions are further divided at the third level according to horizontal ternary partitioning 1108 and vertical binary partitioning 1102 of FIG. 11. A fourth level partitioning is further applied to one of them according to horizontal binary partitioning 1104 of FIG. 11.

[0113] In the above specific example, the maximum luma transform size may be 64×64, and the maximum supported chroma transform size may differ, for example, luma at 32×32. Although the above example CB in FIG. 12 is generally not further divided into smaller PBs and / or TBs, when the width or height of a luma coding block or chroma coding block is larger than the maximum transform width or height, the luma coding block or chroma coding block may be automatically divided horizontally and / or vertically to meet the transform size limitation in that direction.

[0114] In a specific example for partitioning the above base blocks into CBs, as described above, the coding tree scheme may support the ability for luma and chroma to have separate block tree structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU may share the same coding tree structure. For I slices, for example, luma and chroma may have separate coding block tree structures. When separate block tree structures are applied, the luma CTB may be partitioned into luma CBs by one coding tree structure, and the chroma CTB is partitioned into chroma CBs by another coding tree structure. This means that a CU in an I slice may be composed of one luma component coding block or two chroma component coding blocks, and a CU in a P or B slice is always composed of coding blocks of all three color components, unless the video is monochrome.

[0115] When a coding block is further partitioned into multiple transform blocks, the transform blocks therein may be ordered in the bitstream according to various orders or scanning methods. Exemplary implementations for partitioning a coding block or a predictive block into transform blocks and the coding order of the transform blocks are described in further detail below. In some exemplary implementations, as described above, the transform partitioning may support transform blocks of multiple shapes, e.g., 1:1 (square), 1:2 / 2:1, and 1:4 / 4:1, with transform block sizes ranging from, e.g., 4×4 to 64×64. In some implementations, when a coding block is less than or equal to 64×64, the transform block partitioning may be applied only to the luma component, and thus, for chroma blocks, the transform block size is the same as the coding block size. Otherwise, if the coding block width or height is greater than 64, both the luma coding block and the chroma coding block may be implicitly divided into multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32), respectively, of transform blocks.

[0116] In some example implementations of transform block partitioning, for both intra-coded and inter-coded blocks, the coding block may be further partitioned into multiple transform blocks at a partition depth up to a predefined number of levels (e.g., two levels). The transform block partition depth and size may be related. For some example implementations, the mapping from the transform size of the current depth to the transform size of the next depth is shown in Table 1 below. [Table 1]

[0117] Based on the example mapping of Table 1, for a 1:1 square block, the next level transform partition may create four 1:1 square sub-transform blocks. The transform partition may stop at, for example, 4×4. So, a transform size of 4×4 at the current depth corresponds to the same size of 4×4 at the next depth. In the example of Table 1, for a 1:2 / 2:1 non-square block, the next level transform partition may create two 1:1 square sub-transform blocks, while for a 1:4 / 4:1 non-square block, the next level transform partition may create two 1:2 / 2:1 sub-transform blocks.

[0118] In some example implementations, for the luma components of intra-coded blocks, additional restrictions may be applied regarding transform block partitioning. For example, for each level of transform partitioning, all sub-transform blocks may be restricted to have equal size. For example, for a 32×16 coding block, level 1 transform partitioning creates two 16×16 sub-transform blocks, and level 2 transform partitioning creates eight 8×8 sub-transform blocks. In other words, the second level partitioning must be applied to all first level sub-blocks to keep the transform units equal in size. An example of transform block partitioning for an intra-coded square block according to Table 1 is shown in FIG. 15 with the coding order indicated by the arrows. Specifically, 1502 shows a square coding block. The first level partitioning into four equal-sized transform blocks according to Table 1 is shown in 1504 with the coding order indicated by the arrows. The second level partitioning of all first level equal-sized blocks according to Table 1 into 16 equal-sized transform blocks is shown in 1506 with the coding order indicated by the arrows.

[0119] In some example implementations, for the luma components of an inter-coded block, the above restrictions for intra-coding may not apply. For example, after the first level of transform partitioning, any one of the sub-transform blocks may be partitioned independently at another level. Thus, the resulting transform blocks may or may not be of the same size. An example partitioning of an inter-coded block into transform blocks is shown in FIG. 16 along with their coding order. In the example of FIG. 16, an inter-coded block 1602 is partitioned into transform blocks at two levels according to Table 1. At the first level, the inter-coded block is partitioned into four transform blocks of equal size. Then, as indicated by 1604, only one of the four transform blocks (but not all of them) is further partitioned into four sub-transform blocks, resulting in a total of seven transform blocks with two different sizes. An example coding order of these seven transform blocks is indicated by arrows at 1604 in FIG. 16.

[0120] In some example implementations, for the chroma component(s), some additional restrictions for the transform block may be applied. For example, for the chroma component(s), the transform block size can be as large as the coding block size, but cannot be smaller than a predefined size, e.g., 8×8.

[0121] In some other example implementations, for coding blocks with either width (W) or height (H) greater than 64, both luma coding blocks and chroma coding blocks may be implicitly divided into multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32), respectively, including where in this disclosure, "min(a,b)" may return the smaller value between a and b.

[0122] Figure 17 further illustrates another alternative exemplary scheme for partitioning coding blocks or predictive blocks into transform blocks. As shown in Figure 17, instead of using recursive transform partitioning, a predefined set of partitioning types may be applied to a coding block according to the transform type of the coding block. In the particular example shown in Figure 17, one of six exemplary partitioning types may be applied to split the coding block into various numbers of transform blocks. Such a scheme for generating transform block partitioning may be applied to either coding blocks or predictive blocks.

[0123] More specifically, the partitioning scheme of FIG. 17 provides up to six exemplary partition types for any given transform type (transform type refers to the type of primary transform, e.g., ADST). In this scheme, every coding or predictive block may be assigned a transform partition type based on, e.g., rate-distortion cost. In one example, the transform partition type assigned to a coding or predictive block may be determined based on the transform type of the coding or predictive block. A particular transform partition type may correspond to a transform block partition size and pattern, as illustrated by the six transform partition types illustrated in FIG. 17. The correspondence between various transform types and various transform partition types may be predefined. An example is shown below, with capitalized labels indicating transform partition types that may be assigned to a coding or predictive block based on rate-distortion cost: · PARTITION_NONE: Allocates a transformation size equal to the block size. · PARTITION_SPLIT: Allocates a transformation size that is 1 / 2 the width of the block size and 1 / 2 the height of the block size. · PARTITION_HORZ: Allocates a transformation size with width equal to the block size and height 1 / 2 the block size. · PARTITION_VERT: Allocates a transformation size with a width half the block size and a height equal to the block size. · PARTITION_HORZ4: Allocates a transformation size with width equal to the block size and height 1 / 4 of the block size. · PARTITION_VERT4: Allocates a transformation size with width 1 / 4 of the block size and height equal to the block size.

[0124] In the above example, all transform partition types include a uniform transform size for the partitioned transform blocks, as shown in Figure 17. This is merely an example and not a limitation. In some other implementations, mixed transform block sizes may be used for the partitioned transform blocks in a particular partition type (or pattern).

[0125] The PBs (or CBs, also called PBs when not further partitioned into predictive blocks) obtained from any of the above partitioning schemes can then become individual blocks for coding via either intra-prediction or inter-prediction. In the case of inter-prediction for the current PB, a residual between the current block and the predictive block can be generated, coded, and included in the coded bitstream.

[0126] Inter prediction may be implemented, for example, in single reference mode or mixed reference mode. In some implementations, a skip flag may be included first in the (or higher level) bitstream for the current block to indicate whether the current block is inter-coded and should not be skipped. If the current block is inter-coded, another flag may be further included in the bitstream as a signal to indicate whether a single reference mode or a mixed reference mode is used for predicting the current block. In the case of a single reference mode, one reference block may be used to generate a predictive block for the current block. In the case of a mixed reference mode, two or more reference blocks may be used to generate a predictive block, for example, by weighted averaging. A mixed reference mode may be referred to as a more-than-one-reference mode, a two-reference mode, or a multiple-reference mode. One or more reference blocks may be identified using one or more reference frame indexes and additionally using one or more corresponding motion vectors indicating a shift(s) between the reference block(s) and the current block in location, for example, in horizontal and vertical pixels. For example, in a single reference mode, an inter-predicted block for a current block may be generated from a single reference block identified as a predictive block by one motion vector in a reference frame, while in a mixed reference mode, the predictive block may be generated by a weighted average of two reference blocks in two reference frames indicated by two reference frame indexes and two corresponding motion vectors. The motion vector(s) may be coded in various ways and included in the bitstream.

[0127] In some implementations, the encoding or decoding system may maintain a decoded picture buffer (DPB). Some images / pictures are maintained in the DPB waiting to be displayed (in the decoding system), and some images / pictures in the DPB may be used as reference frames to enable inter prediction (in the decoding system or the encoding system). In some implementations, the reference frames in the DPB may be tagged as either short-term or long-term references for the current image being encoded or decoded. For example, short-term reference frames may include frames used for inter prediction for blocks in the current frame or in a predefined number (e.g., two) subsequent video frames closest to the current frame in decoding order. Long-term reference frames may include frames in the DPB that can be used to predict image blocks of frames that are more than a predefined number away from the current frame in decoding order. Information regarding such tags for short-term and long-term reference frames may be referred to as a reference picture set (RPS) and may be added to the header of each frame in the encoded bitstream. Each frame in the encoded bitstream may be identified by a Picture Order Counter (POC), which is numbered according to the playback sequence, either in an absolute manner or relative to a group of pictures starting, for example, with an I-frame.

[0128] In some example implementations, one or more reference picture lists including identification of short-term and long-term reference frames for inter prediction may be formed based on information in the RPS. For example, for unidirectional inter prediction, a single picture reference list may be formed, denoted as L0 reference (or reference list 0), and for bidirectional inter prediction, two picture reference lists may be formed, denoted as L0 (or reference list 0) and L1 (or reference list 1), for each of the two prediction directions. The reference frames included in the L0 and L1 lists may be ordered in various predetermined manners. The lengths of the L0 and L1 lists may be signaled in the video bitstream. The unidirectional inter prediction may be either a single reference mode or a mixed reference mode when multiple references for generating a prediction block by weighted averaging in a mixed prediction mode are on the same side of the block to be predicted. The bidirectional inter prediction may be a mixed mode only in that the bidirectional inter prediction involves at least two reference blocks.

[0129] Block Partitioning

[0130] FIG. 18 shows an exemplary partition tree for block partitioning. VP9 uses a 4-way partition tree starting from the 64×64 level down to the 4×4 level, with additional restrictions for blocks 8×8 and below. This is shown in FIG. 18. The partitions, designated as R, can be recursive in that the same partition tree is repeated at lower scales until the lowest 4×4 level is reached. AV1 extends the partition tree to a 10-way structure, as shown in the figure, but also increases the maximum size (called a superblock in VP9 / AV1) to start at 128×128. This includes 4:1 / 1:4 rectangular partitions, which did not exist in VP9. None of the rectangular partitions can be further subdivided. In addition, AV1 adds more flexibility to the use of partitions below the 8×8 level. For example, 2×2 chroma inter prediction is allowed in certain cases.

[0131] In HEVC, to accommodate various local characteristics, a coding tree unit (CTU) is divided into coding units (CUs) by using a quadtree structure, denoted as a coding tree. A CU may also be considered to be a block containing a prediction block or a coding block. The decision on whether to code a picture area using inter-picture (temporal) prediction or intra-picture (spatial) prediction is made at the CU level. Each CU may be further divided into one, two, or four prediction units (PUs) according to a PU partition type. Inside one PU, the same prediction process is applied, and related information is sent to the decoder for each PU. After obtaining the residual block by applying a prediction process based on the PU partition type, the CU may be partitioned into transform units (TUs) according to another quadtree structure, such as a coding tree for CUs. The HEVC structure has multiple partition concepts, including CUs, PUs, and TUs. In HEVC, a CU or TU may only be square, while a PU may be square or rectangular for an inter-prediction block. In HEVC, one coding block may be further divided into four square sub-blocks, and a transform is performed on each sub-block (i.e., TU). Each TU may be further recursively divided (using quadtree partitioning) into smaller TUs, called residual quadtrees (RQTs). At picture boundaries, HEVC employs implicit quadtree partitioning, such that a block maintains the quadtree partitioning until its size fits the picture boundary.

[0132] There may be a block positioning structure using a quadtree (QT) plus a binary tree (BT). In HEVC, to accommodate various local characteristics, a CTU may be divided into CUs by using a quadtree structure, denoted as a coding tree. The decision on whether to code a picture area using inter-picture (temporal) prediction or intra-picture (spatial) prediction is made at the CU level. In some embodiments, each CU may be further divided into one, two, or four PUs according to a PU partition type. Inside one PU, the same prediction process may be applied, and related information is sent to the decoder for each PU. After obtaining the residual block by applying a prediction process based on the PU partition type, the CU may be partitioned into transform units (TUs) according to another quadtree structure, such as a coding tree for CUs. The HEVC structure may have multiple partition concepts, including CUs, PUs, and TUs.

[0133] FIG. 19 shows an example partition and tree for a quad-tree plus binary tree (QTBT) structure. The QTBT structure may not have a similar concept of multiple partition types and may eliminate the separation of the concepts of CU, PU, ​​and TU. The QTBT structure may support increased flexibility for CU partition shapes. In some embodiments of the QTBT block structure, the CU may have a square or rectangular shape.

[0134] As shown in FIG. 19, the coding tree unit (CTU) is first partitioned by a quadtree structure. The quadtree leaf node is further partitioned by a binary tree structure. The binary tree partition may have two partition types: symmetric horizontal partition and symmetric vertical partition. The binary tree leaf node is called a coding unit (CU), and its segmentation may be used for prediction and transformation processing without further partitioning. The CU, PU, ​​and TU may have the same block size in the QTBT coding block structure. In JEM, a CU may include coding blocks (CBs) of different color components (e.g., for P slices and B slices in 4:2:0 chroma format, one CU includes one luma CB and two chroma CBs). In other embodiments, it may include a CB of a single component (e.g., for I slices, one CU includes one luma CB or two chroma CBs).

[0135] The following parameters may be defined for the QTBT partitioning scheme: CTU size: The root node size of the quadtree, the same concept as in HEVC. MinQTSize: The minimum allowable quadtree leaf node size. MaxBTSize: Maximum allowed binary tree root node size MaxBTDepth: Maximum allowed binary tree depth MinBTSize: The minimum allowable binary tree leaf node size.

[0136] In one embodiment of the QTBT partitioning structure, the CTU size may be set as 128×128 luma samples with two corresponding 64×64 blocks of chroma samples. In one embodiment, MinQTSize may be set as 16×16, MaxBTSize may be set as 64×64, MinBTSize (both width and height) may be set as 4×4, and MaxBTDepth may be set as 4. Quad-tree partitioning may be applied to the CTU first to generate quad-tree leaf nodes. The quad-tree leaf nodes may have a size from 16×16 (i.e., MinQTSize) to 128×128 (i.e., CTU size). If the leaf quad-tree node is 128×128 in size, it will not be further split by the binary tree since it exceeds MaxBTSize (i.e., 64×64). If not, the leaf quad-tree node may be further partitioned by the binary tree. A quadtree leaf node may also be the root node of a binary tree and has a binary tree depth as 0. When the binary tree depth reaches MaxBTDepth (i.e., 4), no further splits will be considered. When a binary tree node has a width equal to MinBTSize (i.e., 4), no further horizontal splits will be considered. Similarly, when a binary tree node's height is equal to MinBTSize, no further vertical splits will be considered. A binary tree leaf node may be further processed by prediction and transform processing without further partitioning. In JEM, the maximum CTU size may be 256x256 luma samples.

[0137] FIG. 19 shows an example of block partitioning by using QTBT (left side of FIG. 19) and the corresponding tree representation (right side of FIG. 19). Solid lines indicate quadtree partitioning and dashed lines indicate binary tree partitioning. At each partition (i.e., non-leaf) node of the binary tree, one flag is signaled to indicate which partition type (i.e., horizontal or vertical) is used, with 0 indicating horizontal partitioning and 1 indicating vertical partitioning. In the case of quadtree partitioning, there is no need to indicate the partition type since the quadtree partitioning splits the block both horizontally and vertically to generate four sub-blocks with equal size.

[0138] In addition, the QTBT scheme supports the flexibility for luma and chroma to have separate QTBT structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU share the same QTBT structure. However, for I slices, the luma CTB may be partitioned into CUs by a QTBT structure, and the chroma CTB is partitioned into chroma CUs by another QTBT structure. In this example, a CU in an I slice includes one luma component coding block or two chroma component coding blocks, and a CU in a P or B slice includes all three color component coding blocks. In HEVC, inter prediction for small blocks may be restricted to reduce memory access for motion compensation, so that bi-prediction is not supported for 4x8 and 8x4 blocks, and inter prediction is not supported for 4x4 blocks. With QTBT as implemented in JEM-7.0, these restrictions can be removed.

[0139] The block partitioning may be by a ternary tree (TT) structure. Figure 20 shows an exemplary ternary tree partitioning. In VVC, a multi-type tree (MTT) structure may add horizontal and vertical center-side ternary trees on top of the QTBT, as shown in Figure 20 (a and b, respectively). Ternary tree partitioning may complement quad-tree and binary tree partitioning. Whereas quad-tree and binary tree split along the block center, ternary tree partitioning may be able to capture objects located at the block center. With ternary tree partitioning, the width and height of the partitions of the proposed ternary tree may be a power of two so that no additional transformation is required. The design of the two-level tree may be motivated by complexity reduction, and the complexity of traversing the tree is TD, where T indicates the number of split types and D is the depth of the tree.

[0140] Template Matching (TM)

[0141] FIG. 21 shows an example of template matching (TM) on a search area around an initial motion vector (MV). Template matching may be a decoder-side MV derivation method to refine the motion information of a current coding unit (CU) or block by finding the closest match between a template (i.e., a neighboring block above and / or to the left of the current CU) in a current picture and a reference block (i.e., the same size as the template). The motion information may include spatial reference motion information (or spatial motion vectors) and / or temporal reference motion information (or temporal motion vectors). As shown in FIG. 21, a better MV should be searched around the initial motion vector of the current CU within a [-8, +8]-pel search range.

[0142] In AMVP mode, the MVP candidate with the smallest TM error between the template of the current block and the template of the reference block is selected at the encoder and decoder sides. TM is performed on this MVP candidate for MV refinement. In merge mode, a similar search method can be applied to the merge candidate indicated by the merge index.

[0143] Decoder-side Motion Vector Refinement (DMVR)

[0144] Figure 22 shows an example of decoder-side motion vector refinement. To improve the accuracy of MV in merge mode, bilateral matching (BM) based decoder-side motion vector refinement may be applied in VVC. In bi-predictive operation, a refined MV is searched around an initial MV in reference picture list L0 and reference list Ll. The BM method calculates the distortion between two candidate blocks in reference list L0 and list Ll. As shown in Figure 22, the SAD (MV1') between two blocks based on each MV candidate around the initial MV is calculated. The MV candidate with the lowest SAD becomes the refined MV and is used to generate a bi-predictive signal.

[0145] The refined MV derived by the DMVR process is used to generate inter-prediction samples for the current block, and is also used in temporal motion vector prediction for future picture coding. Meanwhile, the original MV is used in the deblocking and spatial motion vector prediction processes for future CU coding in the current frame. In DMVR, the search point surrounds the initial MV, and the MV offset may follow the MV difference mirroring rule. In other words, any point checked by DMVR, indicated by a candidate MV pair (MV0, MV1), may follow the following two equations: MV0'=MV0+MV_offset Equation (1) MV1'=MV1-MV_offset formula (2) Here, MV_offset represents the refinement offset between the initial MV (MV0, MV1) and the refined MV (MV0', MV1') in one of the reference pictures. The refinement search range is two integer luma samples from the initial MV. The search includes an integer sample offset search stage and a fractional sample refinement stage.

[0146] In one embodiment, a 25-point full search is applied to the integer sample offset search. First, the SAD of the initial MV pair is calculated. If the SAD of the initial MV pair is smaller than a threshold, the integer sample stage of DMVR ends. Otherwise, the SAD of the remaining 24 points is calculated and checked in raster scan order. The point with the smallest SAD is selected as the output of the integer sample offset search stage. To reduce the uncertainty penalty of DMVR refinement, the original MV in the DMVR process may be favored. The SAD between the reference blocks referenced by the initial motion vector is reduced by ¼ of the SAD value.

[0147] The integer sample search may be followed by fractional sample refinement. To reduce computational complexity, instead of an additional search with SAD comparison, the fractional sample refinement is derived by using a parametric error surface equation. Parametric error surface based sub-pixel offset estimation uses a cost at the center location and costs at four adjacent integer locations from the center to fit a 2D parabolic surface equation of the following form: E(x,y)=A(xx min ) 2 +B(yy min ) 2 +C formula (3) Here, (x min ,y min ) corresponds to the coordinate of the fractional position with the minimum cost, and C corresponds to the minimum cost value. By solving the above equation using the cost values ​​of the five search points, (x min ,y min ) is calculated as follows: x min=(E(-1,0)-E(1,0)) / (2(E(-1,0)+E(1,0)-2E(0,0))) Equation (4) y min =(E(0,-1)-E(0,1)) / (2((E(0,-1)+E(0,1)-2E(0,0))) Equation (5)

[0148] x min and y min The value of x is clipped between -8 and 8 since all cost values ​​are positive and the minimum is E(0,0). This corresponds to a half-pixel offset with 1 / 16-pel MV precision in VVC. The calculated (x min ,y min ) is added to the integer distance refinement MV to obtain the final refined delta MV with sub-pixel accuracy.

[0149] Reference Frame Coding in AV1

[0150] In AV1, for each coded block in an inter frame, if the mode of the current block is an inter coded mode rather than a skip mode, one flag may be signaled to indicate whether a single reference mode or a mixed reference mode is used for the current block. In the single reference mode, a prediction block is generated by one motion vector, and in the mixed reference mode, a prediction block is generated by a weighted average of two prediction blocks derived from two motion vectors. In the single reference case, a reference frame index having a value from 1 to 7 is signaled in the bitstream to indicate which reference frame is used for the current block. Reference frame indexes 1 to 4 may be specified for reference frames preceding the current frame in display order, and indexes 5 to 7 are reference frames following the current frame in display order.

[0151] In case of mixed reference, another flag may be signaled to indicate whether it is unidirectional or bidirectional mixed reference mode. In case of unidirectional mixed reference mode, both reference frames are either before or after the current frame in display order. In case of bidirectional mixed reference mode, one reference frame is before the current frame and the other is after the current frame in display order. In addition, the combinations of unidirectional reference frames allowed are limited to only four possible pairs, namely (1,2), (1,3), (1,4), and (5,7), while in case of bidirectional, all 12 combinations are supported. The rationale behind it is that bidirectional reference prediction is likely to provide a better prediction if the number of reference frames on both sides of the current frame in display order is balanced. When most of the reference frames are on one side of the current frame, the closest-inclusive extrapolation may be more relevant to the current frame.

[0152] Motion Vector Reference Method in AV1 and CWG-B049

[0153] Bits for signaling motion vectors take up a significant portion of the overall bitrate. Modern video codecs may employ predictive coding for motion vectors and code the difference using entropy coding. Prediction accuracy has a significant impact on coding efficiency. AV1 employs a dynamic motion vector referencing scheme that obtains candidate motion vectors from spatial and temporal neighbors and ranks them for efficient entropy coding. In one embodiment, with spatial motion vector referencing, a coding block searches its spatial neighbors in units of 8x8 luma samples to find one that has the same reference frame index as the current block. In the case of mixed inter prediction mode, it may include the same reference frame pair. Figure 23 shows an exemplary spatial motion vector search pattern. As shown in Figure 23, the search area includes three 8x8 block rows above the current block and three 8x8 block columns to the left of the current block, and the search order is indicated by the index. In CWG-B049, the number of 8x8 block rows above may be reduced from three to one, while the number of columns to the left remains at three.

[0154] In another embodiment, the temporal motion vector reference may include a motion trajectory between the current frame and a previously coded frame that is constructed by first utilizing motion vectors from the previously coded frame through either linear interpolation or extrapolation. A motion field between the current frame and a given reference frame may then be formed by extending the motion trajectory from the current frame toward the reference frame.

[0155] In the current design of the signaling method for reference frames, the order of reference frames in Reference Frame List 0 and Reference Frame List 1 is fixed for all blocks in one frame, regardless of the reference frames in neighboring blocks. Therefore, spatial and / or temporal correlation of reference frame selection is not exploited.

[0156] For mixed reference mode, if the POCs of two reference frames for one motion vector pair are both greater than or less than the POC of the current frame, the orientations of the two reference frames are the same. Otherwise, if the POC of one reference frame is greater than the POC of the current frame and the POC of the other reference frame is less than the POC of the current frame, the orientations of the two reference frames are different.

[0157] The proposed embodiments may be used separately or combined in any order. Moreover, each of the method (or embodiment), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. In the following, the term block may be interpreted as a prediction block, a coding block, or a coding unit, i.e., a CU. The direction of the reference frame may be determined by whether the reference frame is before the current frame in display order or after the current frame in display order.

[0158] FIG. 24 shows a flowchart of a method according to an exemplary embodiment of the present disclosure. For single or mixed reference mode, this template matching (TM) method may be adopted to sort the reference frame or reference frame pair for each block. In block 2402, the template of the current block is compared with the template of the reference block. The comparison may be for the difference between the template of the current block (i.e., the upper and / or left neighboring block) and the template of the reference block referenced by the motion information of the spatial reference motion information (or spatial motion vector) and / or the temporal reference motion information (or temporal motion vector). Based on this comparison, the difference between the templates is calculated in block 2404. The calculation may be based on the sum of absolute differences (SAD), sum of squared differences (SSD), mean squared error (MSE), or sum of absolute differences transform (SATD). In one embodiment, for each spatial reference motion information and / or temporal reference motion information, the difference between the template of the current block and the template of the reference block is calculated and marked as a score value of the associated reference frame or reference frame pair, as in block 2406. A score is determined for each reference frame based on the calculated difference. Then, in block 2408, all available reference frames are ranked based on the score values. The ranking may be used to reorder the frames in block 2410.

[0159] Although described as a reference frame, it may also include a reference frame pair. In one embodiment, when multiple motion vectors point to one reference frame or one reference frame pair, the minimum different value referenced by these motion vectors may be marked as the score value of one reference frame or one reference frame pair. In another embodiment, when there is no motion vector pointing to one reference frame or one reference frame pair, the score value of that reference frame or reference frame pair is marked as the maximum allowable value. In another embodiment, when multiple reference frames or multiple reference frame pairs have the same score value, the ranking order for these reference frames or reference frame pairs is the same as the scanning order of the spatial reference motion information and / or the temporal reference motion information. In another embodiment, when multiple reference frames or multiple reference frame pairs have the same score value, the ranking order for these reference frames or reference frame pairs depends on the frequency of occurrence of these reference frames or reference frame pairs used in the spatial reference motion information and / or the temporal reference motion information.

[0160] In one embodiment, all allowed unidirectional and bidirectional composite reference frame pairs are ranked together by using the TM method, and the indexes of the reference frame pairs for the current block in this ranking order are signaled in the bitstream. In one embodiment, all allowed single reference frames are ranked together by using the TM method, and the indexes of the reference frames of the current block in this ranking order are signaled in the bitstream.

[0161] In one embodiment, a method for reordering reference frames for each block by template matching (TM) is provided, the method comprising the steps of: comparing a template of a current block with a template of a reference block for motion information, the motion information including spatial reference motion information or temporal reference motion information; calculating a difference between the template of the current block and the template of the reference block; determining a score value of an associated reference frame based on the calculated difference; and reordering the reference frames based on the determined score. The reference frames further comprise reference frame pairs. The TM includes a decoder-side motion vector derivation for refining the motion information of the current block. The reordering step further comprises ranking available reference frames based on a score value for each of the reference frames. When the score values ​​of the multiple reference frames are comparable, the ranking step corresponds to a scanning order of the spatial reference motion information or the temporal reference motion information. When the score values ​​of the multiple reference frames are comparable, the ranking step is based on the frequency of occurrence of these reference frames used in the spatial reference motion information or the temporal reference motion information. The calculating step includes at least one of sum of absolute differences (SAD), sum of squared differences (SSD), mean squared error (MSE), or sum of absolute difference transform (SATD). The template includes an upper or left neighboring block. The spatial reference motion information includes one or more spatial motion vectors. The temporal reference motion information includes one or more temporal motion vectors. When multiple motion vectors point to one of the reference frames, one of the motion vectors with the smallest difference is used to determine the score value. When there is no motion vector pointing to one of the reference frames, the score value is determined to be the maximum allowed value. The allowed unidirectional and bidirectional composite reference frames are ranked together by using TM, and the index of the reference frame for the current block is signaled in the bitstream.The allowed single reference frames are ranked together by using TM, and the index of the reference frame for the current block is signaled in the bitstream.

[0162] The embodiments in this disclosure may be used separately or combined in any order. Furthermore, each of the methods (or embodiments), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. The term block may include a prediction block, a coding block, or a coding unit, i.e., a CU. The embodiments in this disclosure may be applied to a luma block or a chroma block.

[0163] The techniques described above may be implemented as computer software using computer-readable instructions and physically stored on one or more computer-readable media. For example, FIG. 25 illustrates a computer system (2500) suitable for implementing certain embodiments of the disclosed subject matter.

[0164] Computer software may be coded using any suitable machine code or computer language that may be subject to assembly, compilation, linking, or similar mechanisms to produce code containing instructions that can be executed directly, or through interpretation, microcode execution, etc., by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc.

[0165] The instructions may be executed on various types of computers or components thereof including, for example, personal computers, tablet computers, servers, smart phones, gaming devices, Internet of Things devices, and the like.

[0166] 25 for the computer system (2500) are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing the embodiments of the present disclosure, nor should the arrangement of components be interpreted as having any dependency or requirement regarding any one or combination of components illustrated in the exemplary embodiment of the computer system (2500).

[0167] The computer system (2500) may include certain human interface input devices. Such human interface input devices may be responsive to input by one or more human users through, for example, tactile input (keystrokes, swipes, data glove movements, etc.), audio input (voice, clapping, etc.), visual input (gestures, etc.), olfactory input (not shown). Human interface devices may also be used to capture certain media not necessarily directly associated with conscious human input, such as audio (speech, music, ambient sounds, etc.), images (scanned images, photographic images obtained from still image cameras, etc.), video (two-dimensional video, three-dimensional video including stereoscopic video, etc.).

[0168] The input human interface devices may include one or more (only one of each is shown) of a keyboard (2501), a mouse (2502), a trackpad (2503), a touch screen (2510), a data glove (not shown), a joystick (2505), a microphone (2506), a scanner (2507), and a camera (2508).

[0169] The computer system (2500) may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the human user's senses, for example, through haptic output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touch screen (2510), data gloves (not shown), or joystick (2505), although there may also be haptic feedback devices that do not serve as input devices), audio output devices (such as speakers (2509), headphones (not shown)), visual output devices (such as screens (2510), including CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch screen input capability, each with or without haptic feedback capability, some of which may be capable of outputting two-dimensional visual output or more than three-dimensional output via means such as stereographic output), virtual reality glasses (not shown), holographic displays, and smoke tanks (not shown)), and printers (not shown).

[0170] The computer system (2500) may also include human accessible storage devices and their associated media, such as optical media, including CD / DVD ROM / RW (2520) having media (2521) such as CDs / DVDs, thumb drives (2522), removable hard drives or solid state drives (2523), legacy magnetic media (not shown) such as tapes and floppy disks, and dedicated ROM / ASIC / PLD based devices (not shown) such as security dongles.

[0171] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with the presently disclosed subject matter does not encompass transmission media, carrier waves, or other transitory signals.

[0172] The computer system (2500) may also include an interface (2554) to one or more communication networks (2555). The network may be, for example, wireless, wireline, optical. The network may further be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of networks include local area networks such as Ethernet, wireless LAN, cellular networks including GSM, 3G, 4G, 5G, LTE, etc., TV wireline or wireless wide area digital networks including cable TV, satellite TV, and terrestrial broadcast TV, vehicular and industrial including CAN bus, etc. Certain networks generally require an external network interface adapter attached to a particular general-purpose data port or peripheral bus (2549) (e.g., a USB port of the computer system (2500) etc.), while other networks are generally integrated into the core of the computer system (2500) by attachment to a system bus as described below (e.g., an Ethernet interface to a PC computer system or a cellular network interface to a smartphone computer system). Using any of these networks, the computer system (2500) can communicate with other entities. Such communications may be one-way receive-only (e.g., broadcast TV), one-way transmit-only (e.g., CANbus to a particular CANbus device), or two-way, e.g., to other computer systems using local or wide area digital networks. Specific protocols and protocol stacks may be used with each of these networks and network interfaces, as described above.

[0173] The aforementioned human interface devices, human accessible storage devices, and network interfaces may be attached to the core (2540) of the computer system (2500).

[0174] The cores (2540) may include one or more central processing units (CPUs) (2541), graphics processing units (GPUs) (2542), dedicated programmable processing units in the form of field programmable gate areas (FPGAs) (2543), hardware accelerators for specific tasks (2544), graphics adapters (2550), and the like. These devices may be connected through a system bus (2548), along with read only memory (ROM) (2545), random access memory (2546), internal mass storage devices (2547) such as internal hard drives, SSDs, etc. that are not accessible to the user. In some computer systems, the system bus (2548) may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripheral devices may be connected directly to the core's system bus (2548) or through a peripheral bus (2549). In one example, a screen (2510) may be connected to the graphics adapter (2550). Peripheral bus architectures include PCI, USB, etc.

[0175] The CPU (2541), GPU (2542), FPGA (2543), and accelerator (2544) can execute certain instructions that can combine to constitute the aforementioned computer code. The computer code can be stored in ROM (2545) or RAM (2546). Temporary data can also be stored in RAM (2546), and persistent data can be stored, for example, in an internal mass storage device (2547). Rapid storage and retrieval in any of the memory devices can be made possible through the use of cache memory, which can be closely associated with one or more of the CPU (2541), GPU (2542), mass storage device (2547), ROM (2545), RAM (2546), etc.

[0176] The computer-readable medium can bear computer code for performing various computer-implemented operations. The medium and computer code may be those specially designed and constructed for the purposes of the present disclosure, or they may be of the kind well known and available to those skilled in the computer software arts.

[0177] As a non-limiting example, a computer system having the architecture (2500), and specifically the core (2540), can provide functionality as a result of the processor(s) (including CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media can be media associated with user-accessible mass storage devices as introduced above, as well as specific storage devices of the core (2540) that are non-transitory in nature, such as mass storage device (2547) internal to the core or ROM (2545). Software implementing various embodiments of the present disclosure can be stored in such devices and executed by the core (2540). The computer-readable media can include one or more memory devices or chips, depending on the particular needs. The software can cause the core (2540) and specifically the processors therein (including CPU, GPU, FPGA, etc.) to perform particular processes or particular portions of particular processes described herein, including defining data structures stored in RAM (2546) and modifying such data structures according to processes defined by the software. Additionally, or alternatively, the computer system may provide functionality as a result of logic hardwired or otherwise embodied in circuitry (e.g., accelerator (2544)) that may operate in place of or in conjunction with software to perform particular processes or particular portions of particular processes described herein. Reference to software may encompass logic, and vice versa, where appropriate. Reference to a computer-readable medium may encompass, where appropriate, circuitry (such as an integrated circuit (IC)) that stores software for execution, circuitry that embodies logic for execution, or both. The present disclosure encompasses any suitable combination of hardware and software.

[0178] While this disclosure has described several exemplary embodiments, there are alterations, permutations, and various substitute equivalents that fall within the scope of the disclosure. It will thus be appreciated that those skilled in the art can devise numerous systems and methods that, although not explicitly shown or described herein, embody the principles of the disclosure and are therefore within the spirit and scope of the disclosure. Appendix A: Acronyms ALF: Adaptive Loop Filter AMVP: Advanced Motion Vector Prediction APS: Adaptation Parameter Set ASIC: Application-Specific Integrated Circuit AV1:AOMedia Video 1 AV2:AOMedia Video 2 BCW: Bi-prediction with CU-level Weights BM: Bilateral Matching BMS:benchmark set CANBus: Controller Area Network Bus CC-ALF: Cross-Component Adaptive Loop Filter CCSO: Cross-Component Sample Offset CD: Compact Disc CDEF: Constrained Directional Enhancement Filter CDF: Cumulative Density Function CfL: Chroma from Luma CIIP: Combined intra-inter prediction CPUs: Central Processing Units CRT: Cathode Ray Tube CTBs: Coding Tree Blocks CTU: Coding Tree Unit CTUs: Coding Tree Units CU: Coding Unit DMVR: Decoder-side Motion Vector Refinement DPB: Decoded Picture Buffer DPS: Decoding Parameter Set DVD: Digital Video Disc FPGA: Field Programmable Gate Areas GBI: Generalized Bi-prediction GOPs: Groups of Pictures GPUs: Graphics Processing Units GSM: Global System for Mobile communications HDR: high dynamic range HEVC: High Efficiency Video Coding HRD: Hypothetical Reference Decoder IBC (or IntraBC): Intra Block Copy IC: Integrated Circuit ISP: Intra Sub-Partitions JEM: joint exploration model JVET: Joint Video Exploration Team LAN: Local Area Network LCD: Liquid-Crystal Display LR: Loop Restoration Filter LSO:Local Sample Offset LTE: Long-Term Evolution MMVD: Merge Mode with Motion Vector Difference MPM: Most probable mode MV: Motion Vector MV: Motion Vector MVD: Motion Vector Difference MVD: Motion vector difference MVP: Motion Vector Predictor OLED: Organic Light-Emitting Diode PBs: Prediction Blocks PCI: Peripheral Component Interconnect PDPC: Position Dependent Prediction Combination PLD: Programmable Logic Device POC: Picture Order Count PPS: Picture Parameter Set PU: Prediction Unit PUs: Prediction Units RAM: Random Access Memory ROM: Read-Only Memory RPS: Reference Picture Set SAD: Sum of Absolute Difference SAO: Sample Adaptive Offset SB: Super Block SCC: Screen Content Coding SDP: Semi Decoupled Partitioning SDR: standard dynamic range SDT: Semi Decoupled Tree SEI: Supplementary Enhancement Information SNR: Signal Noise Ratio SPS: Sequence Parameter Setting SSD: solid-state drive SST: Semi Separate Tree TM: Template Matching TU: Transform Unit TUs: Transform Units USB: Universal Serial Bus VPS:Video Parameter Set VUI: Video Usability Information VVC: versatile video coding WAIP: Wide-Angle Intra Prediction

Claims

**Claim 1** A method executed by an encoder for rearranging reference frames for each block by template matching (TM), the method comprising: comparing, for motion information, a template of a current block with a template of a reference block, the motion information including spatial reference motion information or temporal reference motion information; calculating a difference between the template of the current block and the template of the reference block; determining a score value of an associated reference frame based on the calculated difference; rearranging the reference frame based on the determined score value; signaling, in a bitstream, an index indicating the reference frame for the current block and including. **Claim 2** The method according to claim 1, wherein the reference frame further includes a reference frame pair. **Claim 3** The method according to claim 1, wherein the TM includes decoder-side motion vector derivation for refining the motion information of the current block. **Claim 4** The rearranging step includes: ranking available reference frames based on the score value for each of the reference frames and further including. The method according to claim 1. **Claim 5** The method according to claim 4, wherein when the score values of a plurality of reference frames are equal, the ranking step corresponds to the scanning order of the spatial reference motion information or the temporal reference motion information. **Claim 6** The method according to claim 4, wherein when the score values of a plurality of reference frames are equal, the ranking step is based on the appearance frequency of these reference frames used in the spatial reference motion information or the temporal reference motion information. **Claim 7** The method according to claim 1, wherein the calculating step includes at least one of sum of absolute differences (SAD), sum of squared differences (SSD), mean squared error (MSE), or sum of absolute transformed differences (SATD). **Claim 8** The method according to claim 1, wherein the template includes an upper or left adjacent block. **Claim 9** The method according to claim 1, wherein the spatial reference motion information includes one or more spatial motion vectors. **Claim 10** The method according to claim 1, wherein the temporal reference motion information includes one or more temporal motion vectors. **Claim 11** The method according to claim 1, wherein when a plurality of motion vectors point to one of the reference frames, one of the motion vectors having the smallest difference is used to determine the score value.

12. The method according to claim 1, wherein when there is no motion vector pointing to one of the reference frames, the score value is determined to be the maximum allowable value.

13. The method according to claim 1, wherein the allowed single-direction and bi-directional composite reference frames are ranked together by using the TM.

14. The method according to claim 1, wherein the allowed single reference frames are ranked together by using the TM.

15. An apparatus for encoding a video bitstream, comprising: a memory for storing instructions; a processor communicating with the memory wherein when the processor executes the instructions, the processor causes the apparatus to execute the method according to any one of claims 1 to 14.

16. A computer program for causing a computer to execute the method according to any one of claims 1 to 14.

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