Photoelectric conversion device, movable body, photoelectric conversion method, and computer program

Abstract

To provide a photoelectric conversion device that can acquire an image according to a situation.SOLUTION: A photoelectric conversion device has: a plurality of pixels each including a sensor part that emits pulses at a frequency according to the frequency of receiving photons, a counter that counts the number of pulses, and a memory that stores a count value of the counter; and control means that generates a signal on the basis of the difference between the counter value of the counter at the start of a storage period and the counter value of the counter at the end of the storage period. The photoelectric conversion device performs storage operations in a first storage period and a second storage period in a full frame, wherein the first storage period is shorter than the second storage period, outputs a signal generated in the first storage period within a period from the end of the first storage period until the end of the second storage period, and controls the number of times of the other storage operations in the same full frame or the length of the storage period on the basis of a result of evaluation of the signal generated in the first storage period.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present invention relates to a photoelectric conversion device, a moving object, a photoelectric conversion method, a computer program, and the like. [Background technology]

[0002] In recent years, photoelectric conversion devices have been developed that digitally count the number of photons incident on an avalanche photodiode (APD) and output the counted value from a pixel as a photoelectrically converted digital signal. For example, Patent Document 1 describes a configuration in which a photoelectric conversion device having an APD can output multiple images whose accumulation periods overlap with each other, thereby enabling continuous shooting even in low illuminance. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 7223070 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when considering the image sensor of an in-vehicle camera installed on a moving object, for example, because recognition processing is performed on a frame-by-frame basis in normal sensor driving, recognition processing can only be performed every 33.3 ms in the case of 30 fps, for example. Therefore, even if an object appears immediately after a frame change in an in-vehicle camera, recognition processing cannot be performed until the end of the frame.

[0005] In addition, in order to suppress flicker caused by traffic lights, in-vehicle cameras often have a certain accumulation period (11 ms or more), and in particular in low-light conditions, the accumulation period is extended to capture brighter images. However, because the accumulation period is long, subject blurring occurs for fast-moving objects, lowering the recognition rate.

[0006] In addition, the accumulation period required to recognize a subject changes depending on the situation, such as daytime or nighttime. For example, in a situation where the illuminance is extremely high, such as during the daytime in summer, the pixel saturation limit may be reached even if the accumulation period is short, and the gradation of the bright parts of the image may be lost, resulting in a decrease in the accuracy of recognizing the subject. In addition, at night, there is not enough light, and the gradation of the image may be insufficient, resulting in a decrease in the accuracy of recognizing the subject.

[0007] Therefore, an object of the present invention is to provide a photoelectric conversion device capable of acquiring an image according to a situation. [Means for solving the problem]

[0008] A photoelectric conversion device according to one aspect of the present invention comprises: A sensor unit that emits pulses at a frequency corresponding to the frequency of receiving photons; A counter that counts the number of pulses; A plurality of pixels each including a memory for storing a count value of the counter; a control means for generating a signal based on a difference between the count values ​​of the counter at the start and end of an accumulation period; The control means performs accumulation operations of a first accumulation period and a second accumulation period within a full frame, the first accumulation period being shorter than the second accumulation period, controls so that a signal generated during the first accumulation period is output between the end of the first accumulation period and the end of the second accumulation period, and controls the number of other accumulation operations or the length of the accumulation period within the same full frame based on a result of evaluating the signal generated during the first accumulation period. Effect of the Invention

[0009] According to the present invention, it is possible to provide a photoelectric conversion device capable of acquiring an image according to a situation. [Brief description of the drawings]

[0010] [Figure 1] 1 is a diagram showing a configuration example of a photoelectric conversion element according to an embodiment of the present invention. [Diagram 2] 2 is a diagram showing a configuration example of a sensor substrate 11. FIG. [Diagram 3] 2 is a diagram showing an example of the configuration of a circuit board 21. FIG. [Figure 4] 2 and 3, and shows an equivalent circuit of a pixel 101 and a signal processing circuit 103 corresponding to the pixel 101. [Diagram 5] 2 is a diagram illustrating a relationship between the operation of an APD 201 and an output signal. FIG. [Figure 6] 7 is a functional block diagram of a photoelectric conversion device 600 and a moving object 700 according to the embodiment. [Figure 7] 11 is a diagram for explaining a photoelectric conversion method by a camera control unit 605 according to an embodiment. FIG. [Figure 8] FIG. 13 is a diagram showing an example of an image divided into a plurality of frames. [Figure 9] FIG. 2 is a diagram illustrating a relationship between a memory circuit and a buffer in the embodiment. [Figure 10] 5 is a flowchart showing details of an example of driving a photoelectric conversion element in the embodiment. [Figure 11] This is a continuation of the flowchart in Figure 10. [Figure 12] 6 is a functional block diagram showing the input / output relationship between a photoelectric conversion element 100, an image processing unit 603, and a camera control unit 605, and showing a detailed configuration example of the camera control unit 605. FIG. [Figure 13] 10 is a flowchart showing details of an operation example of a camera control unit 605 in an embodiment. [Figure 14] 11 is a diagram for explaining an example of a photoelectric conversion method by the camera control unit 605 when the number of accumulations is reduced according to the embodiment. FIG. [Figure 15] 13 is a diagram for explaining an example of a photoelectric conversion method by the camera control unit 605 when the number of accumulations is increased according to the embodiment. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. However, the present invention is not limited to the following embodiment. In each drawing, the same members or elements are given the same reference numerals, and duplicated descriptions are omitted or simplified.

[0012] 1 is a diagram showing a configuration example of a photoelectric conversion element according to an embodiment of the present invention. In the following, a photoelectric conversion device having a so-called stacked structure in which a photoelectric conversion element 100 is configured by stacking and electrically connecting two substrates, a sensor substrate 11 and a circuit substrate 21, will be described as an example.

[0013] However, a so-called non-laminated structure in which the components included in the sensor substrate and the components included in the circuit substrate are disposed on a common semiconductor layer may be used. The sensor substrate 11 includes a pixel region 12. The circuit substrate 21 includes a circuit region 22 that processes signals detected in the pixel region 12.

[0014] 2 is a diagram showing a configuration example of the sensor substrate 11. The pixel region 12 of the sensor substrate 11 includes a plurality of pixels 101 arranged two-dimensionally across a plurality of rows and columns. Each pixel 101 includes a photoelectric conversion unit 102 including an avalanche photodiode (hereinafter, APD).

[0015] Here, the photoelectric conversion unit 102 functions as a sensor unit that emits a pulse at a frequency corresponding to the frequency of receiving photons. The number of rows and columns of the pixel array that constitutes the pixel region 12 is not particularly limited.

[0016] Fig. 3 is a diagram showing an example of the configuration of the circuit board 21. The circuit board 21 has a signal processing circuit 103 that processes charges photoelectrically converted by each photoelectric conversion unit 102 in Fig. 2, a readout circuit 112, a control pulse generation unit 115, a horizontal scanning circuit 111, a vertical signal line 113, a vertical scanning circuit 110, and an output circuit 114.

[0017] The vertical scanning circuit 110 receives a control pulse supplied from a control pulse generating unit 115, and sequentially supplies the control pulse to a plurality of pixels arranged in the row direction. The vertical scanning circuit 110 uses logic circuits such as a shift register and an address decoder.

[0018] The signal output from the photoelectric conversion unit 102 of each pixel is processed by each signal processing circuit 103. The signal processing circuit 103 is provided with a counter, a memory, etc., and a digital value is stored in the memory. The horizontal scanning circuit 111 inputs a control pulse that sequentially selects each column to the signal processing circuit 103 in order to read the signal from the memory of each pixel in which the digital signal is stored.

[0019] A signal is output to the vertical signal line 113 from the signal processing circuit 103 of the pixel of the row selected by the vertical scanning circuit 110. The signal output to the vertical signal line 113 is output to the outside of the photoelectric conversion element 100 via the readout circuit 112 and the output circuit 114. The readout circuit 112 has a plurality of buffers built therein and connected to the vertical signal line 113.

[0020] 2 and 3, a plurality of signal processing circuits 103 are arranged in a region overlapping the pixel region 12 in a plan view. A vertical scanning circuit 110, a horizontal scanning circuit 111, a readout circuit 112, an output circuit 114, and a control pulse generating unit 115 are arranged so as to overlap between an end of the sensor substrate 11 and an end of the pixel region 12 in a plan view.

[0021] That is, the sensor substrate 11 has a pixel region 12 and a non-pixel region arranged around the pixel region 12. A vertical scanning circuit 110, a horizontal scanning circuit 111, a readout circuit 112, an output circuit 114, and a control pulse generating unit 115 are arranged in a region overlapping the non-pixel region in a plan view.

[0022] The arrangement of the vertical signal lines 113, the readout circuits 112, and the output circuits 114 are not limited to the example shown in Fig. 3. For example, the vertical signal lines 113 may be arranged extending in the row direction, and the readout circuits 112 may be arranged at the ends of the vertical signal lines 113. Also, it is not necessary to provide one signal processing circuit 103 for each photoelectric conversion unit, and a configuration may be adopted in which one signal processing unit is shared by a plurality of photoelectric conversion units and performs signal processing sequentially.

[0023] FIG. 4 is a diagram showing an equivalent circuit of the pixel 101 in FIG. 2 and FIG.

[0024] The APD 201 included in the photoelectric conversion unit 102 generates a pair of electric charges according to incident light by photoelectric conversion. One of the two nodes of the APD 201 is connected to a power supply line to which a driving voltage VL (first voltage) is supplied. The other of the two nodes of the APD 201 is connected to a power supply line to which a driving voltage VH (second voltage) higher than the voltage VL is supplied.

[0025] In Fig. 4, one node of the APD 201 is the anode, and the other node of the APD is the cathode. A reverse bias voltage is supplied to the anode and cathode of the APD 201 so that the APD 201 performs avalanche multiplication. By supplying such a voltage, the charge generated by the incident light undergoes avalanche multiplication, generating an avalanche current.

[0026] When a reverse bias voltage is supplied, there are two modes: Geiger mode, in which the voltage difference between the anode and cathode is greater than the breakdown voltage, and linear mode, in which the voltage difference between the anode and cathode is close to or less than the breakdown voltage. An APD that operates in Geiger mode is called a SPAD. In the case of a SPAD, for example, the drive voltage VL (first voltage) is -30V, and the drive voltage VH (second voltage) is 1V.

[0027] The signal processing circuit 103 includes a quench element 202, a waveform shaping unit 210, a counter circuit 211, and a memory circuit 212. The quench element 202 is connected to a power supply line to which a driving voltage VH is supplied and one of the anode and cathode nodes of the APD 201.

[0028] The quench element 202 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the APD 201 (quench operation).The quench element 202 also has a function of returning the voltage supplied to the APD 201 to the drive voltage VH by flowing a current equivalent to the voltage drop caused by the quench operation (recharge operation).

[0029] FIG. 4 shows an example in which the signal processing circuit 103 includes a waveform shaping section 210, a counter circuit 211, and a memory circuit 212 in addition to the quench element 202.

[0030] The waveform shaping unit 210 shapes the voltage change of the cathode of the APD 201 obtained when a photon is detected, and outputs a pulse signal. For example, an inverter circuit is used as the waveform shaping unit 210. Although an example in which one inverter is used as the waveform shaping unit 210 is shown in Fig. 4, a circuit in which a plurality of inverters are connected in series may be used, or another circuit having a waveform shaping effect may be used.

[0031] The counter circuit 211 counts the number of pulses output from the waveform shaping unit 210 and holds the count value. When a control pulse RES is supplied via a drive line 213, the signal held in the counter circuit 211 is reset. Here, the counter circuit 211 generates a signal based on the difference between the count values ​​at the start and end of the accumulation period.

[0032] 3 to the memory circuit 212 via a drive line 214 (not shown in FIG. 3) in FIG. 4, and switches between electrical connection and disconnection between the counter circuit 211 and the vertical signal line 113. The memory circuit 212 functions as a memory that temporarily stores the count value of the counter, and outputs an output signal from the counter circuit 211 of the pixel to the vertical signal line 113.

[0033] Note that electrical connections may be switched by disposing a switch such as a transistor between the quench element 202 and the APD 201 or between the photoelectric conversion unit 102 and the signal processing circuit 103. Similarly, the supply of the driving voltage VH or the driving voltage VL to the photoelectric conversion unit 102 may be electrically switched using a switch such as a transistor.

[0034] 5 is a diagram showing a schematic diagram of the relationship between the operation of the APD 201 and the output signal. The input side of the waveform shaping unit 210 is nodeA, and the output side is nodeB. Between time t0 and time t1, a potential difference of VH-VL is applied to the APD 201. When a photon is incident on the APD 201 at time t1, avalanche multiplication occurs in the APD 201, an avalanche multiplication current flows through the quench element 202, and the voltage at nodeA drops.

[0035] When the amount of voltage drop further increases and the potential difference applied to the APD 201 decreases, the avalanche multiplication of the APD 201 stops as at time t2, and the voltage level of nodeA does not drop below a certain value.

[0036] After that, between time t2 and time t3, a current flows through nodeA to compensate for the voltage drop from voltage VL, and at time t3, nodeA is stabilized to its original potential level. At this time, the portion of the output waveform at nodeA that exceeds a certain threshold is shaped by waveform shaping section 210 and is output as a pulse signal at nodeB.

[0037] Next, a photoelectric conversion device 600 and a moving object 700 according to an embodiment will be described. Fig. 6 is a functional block diagram of the photoelectric conversion device 600 and the moving object 700 according to the embodiment. Some of the functional blocks shown in Fig. 6 are realized by causing a computer (not shown) included in the photoelectric conversion device 600 and the moving object 700 to execute a computer program stored in a memory serving as a storage medium (not shown).

[0038] However, some or all of them may be realized by hardware. For the hardware, a dedicated circuit (ASIC) or a processor (reconfigurable processor, DSP) may be used. Furthermore, the respective functional blocks shown in Fig. 6 do not have to be built in the same housing, and may be configured by separate devices connected to each other via signal paths. The above explanation regarding Fig. 6 also applies to Fig. 12 described later.

[0039] 1 to 5, an imaging optical system 601, an image processing unit 603, a recognition unit 604, a camera control unit 605, a storage unit 606, a communication unit 607, etc. The photoelectric conversion element 100 is composed of an avalanche photodiode for photoelectrically converting an optical image, as described in FIGS.

[0040] The photoelectric conversion device of the embodiment is mounted on a moving body 700, and a camera unit consisting of a set of an imaging optical system 601 and a photoelectric conversion element 100 is configured to capture an image in at least one direction, for example, in front, behind, or to the side of the moving body. Note that a plurality of camera units may be provided on the moving body 700.

[0041] The image processing unit 603 performs image processing such as black level correction, gamma curve adjustment, noise reduction, digital gain adjustment, demosaic processing, data compression, etc. on the image signal acquired by the photoelectric conversion element 100 to generate a final image signal. Note that, if the photoelectric conversion element 100 has an on-chip color filter such as RGB, it is desirable for the image processing unit 603 to perform processing such as white balance correction and color conversion.

[0042] Moreover, the output of the image processing unit 603 is supplied to a recognition unit 604, an ECU (Electric Control Unit) 701 of the moving body 700, and a camera control unit 605. The recognition unit 604 recognizes people, vehicles, etc. in the vicinity by performing image recognition based on the image signal, and issues a warning, etc. as necessary.

[0043] In this embodiment, the moving body 700 is described using an example of an automobile, but the moving body may be any moving body, such as an airplane, a train, a ship, a drone, an AGV, or a robot.

[0044] The camera control unit 605 has a built-in CPU as a computer and a memory that stores a computer program, and controls each unit of the photoelectric conversion device 600 by the CPU executing the computer program stored in the memory.

[0045] The camera control unit 605 controls the length of the accumulation period of each frame of the photoelectric conversion element 100, the number of accumulations, and the timing of accumulation and control signal CLK, for example, via a control pulse generation unit of the photoelectric conversion element 100. The camera control unit 605 will be described in detail later with reference to FIG.

[0046] The storage unit 606 includes a recording medium such as a memory card, a hard disk, etc., and can store and read image signals. The communication unit 607 includes a wireless or wired interface, and outputs the generated image signal to the outside of the photoelectric conversion device 600 and receives various signals from the outside.

[0047] The ECU 701 incorporates a CPU as a computer and a memory that stores a computer program, and controls each part of the moving body 700 by the CPU executing the computer program stored in the memory.

[0048] The output of ECU 701 is supplied to vehicle control unit 702 and display unit 703. Vehicle control unit 702 functions as a movement control means for driving, stopping, controlling the direction, etc. of the vehicle as a moving object based on the output of ECU 701. Note that vehicle control unit 702 as a movement control means controls the operation of the moving object based on the result of recognition processing using signals generated during at least the first accumulation period.

[0049] The display unit 703 functions as a display means, includes a display element such as a liquid crystal device or an organic EL, and is mounted on the moving body 700. The display unit 703 displays images acquired by the photoelectric conversion element 100 and various information related to the vehicle's running state and the like to the driver of the moving body 700 using, for example, a GUI based on the output of the ECU 701.

[0050] In addition, the image processing unit 603, the recognition unit 604, etc. in Figure 6 do not have to be mounted on the moving body 700, and may be provided, for example, in an external terminal provided separately from the moving body 700 for remotely controlling the moving body 700 or for monitoring the traveling of the moving body.

[0051] 7 is a diagram for explaining a photoelectric conversion method by the camera control unit 605 according to the embodiment. In this embodiment, photoelectric conversion is performed periodically at, for example, 30 full frames / second. Note that in this embodiment, one frame having a length of 33.3 ms is called a full frame (or main frame), and a full frame divided into four is called a frame (or subframe).

[0052] That is, as shown in Fig. 7, full frame 1 from time T0 to time T12 is divided into frames 1_1, 1_2, 1_3, and 1_4, each having an equal period (8.33 ms). In Fig. 7 and subsequent figures, frames 0_3, 0_4, 1_1, 1_2, 1_3, 1_4, 2_1, and 2_2 are represented as F0_3, 0_4, 1_1, 1_2, 1_3, 1_4, 2_1, and 2_2.

[0053] Frame 1_1 has an accumulation period from time T0 to time T1 of full frame 1, and frame 1_2 has an accumulation period from time T0 to time T2. Frame 1_3 has an accumulation period from time T0 to time T3, and frame 1_4 has an accumulation period from time T0 to time T4. In this embodiment, for example, the accumulation period from time T0 to time T1 is called a first accumulation period, and the accumulation period from time T0 to time T4 is called a second accumulation period.

[0054] Then, at time T0, the counter circuit 211 is reset, and count values ​​C1_1, C1_2, C1_3, and C1_4 are obtained from the counter circuit 211 at times T1 to T4, respectively.

[0055] Moreover, the count values ​​C1_1, C1_2, C1_3, and C1_4 are temporarily stored in the memory circuit 212. Then, the signals for one row temporarily stored in the memory circuit 212 are sequentially output from the photoelectric conversion elements via the buffer of the readout circuit 112.

[0056] In this way, according to this embodiment, the signals accumulated during the period of frame 1_1 are read out from time T1 to T2 and processed by the recognition unit 604. Therefore, image recognition can be performed quickly. Similarly, the signals accumulated during the periods of frames 1_2, 1_3, and 1_4 are sequentially read out from time T2 to T3, T3 to T4, and T4 to T1, respectively, and image recognition can be performed repeatedly.

[0057] Fig. 8 is a diagram showing an example of images of a plurality of divided frames. As shown in Fig. 8, the image of frame 1_1 is dark because the accumulation period is short, but there is little subject blur of a person who jumps out in front of the camera. On the other hand, the accumulation periods of frames 1_2, 1_3, and 1_4 are longer in that order, so subject blur is more likely to occur. Note that stopped vehicles and white lines are less likely to be blurred, and the longer the accumulation period, the more likely the contrast is to be improved.

[0058] In this manner, in this embodiment, accumulation operations are performed for the first and second accumulation periods within one full frame. Also, the first accumulation period is shorter than the second accumulation period, and the signal generated during the first accumulation period is controlled to be output between the end of the first accumulation period and the end of the second accumulation period.

[0059] In this embodiment, the first and second accumulation periods overlap, and start at the same time. Furthermore, the end of the second accumulation period is a full frame boundary, and the second accumulation period is an integer multiple of the first accumulation period. That is, the end of the second accumulation period coincides with the end of the full frame.

[0060] However, the second accumulation period does not need to be an integer multiple of the first accumulation period. The second accumulation period only needs to be longer than the first accumulation period and end after the first accumulation period.

[0061] That is, an image with a short accumulation period and an image with a long accumulation period are created, the timing at which the short accumulation period ends is set to be earlier than the timing at which the long accumulation period ends, and as soon as the short accumulation period ends, the image is output and sent to a downstream recognition unit.The subject is recognized based on at least a signal generated during the first accumulation period.The recognition unit 604 as a recognition means recognizes the subject based on at least a signal generated during the first accumulation period.

[0062] Therefore, while in the past it was not possible to recognize an image until one full frame had elapsed, in this embodiment, image recognition can be performed after as little as ¼ full frame period, and for example, when a moving body is moving at high speed, an obstacle or the like can be recognized quickly. Therefore, it is possible to apply the brakes quickly, or to avoid the obstacle early.

[0063] Incidentally, an image with a long accumulation period can improve the contrast, and can therefore be used as an image for display. That is, an image with a short accumulation period is suitable for quick subject recognition, and an image with a long accumulation period is suitable as an image for display. In this manner, the display device of this embodiment displays as an image at least a signal generated during the second accumulation period. Incidentally, the recognition unit 604 may further recognize the subject based on a signal generated during the second accumulation period.

[0064] In addition, since the present embodiment uses an APD, unlike a CMOS sensor, the accumulated charge does not deteriorate due to readout, so the accumulation periods can be overlapped. Also, since there is no readout noise, the original signal does not deteriorate even if it is read out many times after one accumulation.

[0065] Fig. 9 is a diagram showing the relationship between memory circuits and buffers in an embodiment. Fig. 9 shows a state in which memory circuits 212 in signal processing circuit 103 in Fig. 3 are arranged in N rows and M columns, and each memory circuit is represented as memory 1-1 to memory NM. Also, buffer 1 to buffer M in Fig. 9 indicate buffers included in read circuit 112 in Fig. 3. Output circuit 114 in Fig. 9 corresponds to output circuit 114 in Fig. 3.

[0066] Fig. 10 is a flowchart showing details of an example of driving a photoelectric conversion element in an embodiment, and Fig. 11 is a flowchart continuing from Fig. 10. Note that the CPU as a computer in the camera control unit 605 executes a computer program stored in the memory, thereby sequentially performing the operations of the steps in the flowcharts of Fig. 10 and Fig. 11.

[0067] 10, the CPU in the camera control unit 605 sets i=1, and in step S102 outputs the count value Count of the counter circuit 211 at time Ti to the memory circuit 212. At this time, output is performed simultaneously to all memory circuits. This operation corresponds to the operation at time T1 in FIG.

[0068] Next, in step S103, the CPU in the camera control unit 605 sets j = 1, and in step S104, it outputs the count value Count(j - k - i) in the memory circuit j - k in FIG. 9 to the buffer. At this time, it outputs to the buffer simultaneously for 1 to M columns. This operation means the operation of taking in the count value of the first row in FIG. 9 into the buffer.

[0069] Next, in step S105, the CPU in the camera control unit 605 sets k = 1, and in step S106, it outputs the count value Count(j - k - i) of buffer k to the output circuit 114. This operation corresponds to the operation of reading out the signal of the buffer in the leftmost column in FIG. 9 from the output circuit.

[0070] Next, it proceeds to step S107 in FIG. 11 via A. In step S107, the CPU in the camera control unit 605 determines whether k < M. If Yes, in step S108, it increments k by 1 as k = k + 1, returns to step S106 via B, and performs the operation of step S106. This operation corresponds to the operation of reading out the signal of the buffer in the second column from the left in FIG. 9 from the output circuit.

[0071] If it becomes No in step S107, that is, if k = M, it means that the signal of the buffer in the Mth column in FIG. 9 has been read out from the output circuit. Next, it proceeds to step S109, and the CPU in the camera control unit 605 determines whether j < N.

[0072] If it is Yes in step S109, then in step S110, the CPU in the camera control unit 605 sets j = J + 1, increments j by 1, and returns to step S104 via C. This corresponds to the operation for starting the reading of the next row.

[0073] If the determination in step S109 is No, this means that reading out of all rows has been completed, so the process proceeds to step S111, where the CPU in the camera control unit 605 determines whether j<4. If the determination in step S111 is Yes, the process proceeds to step S112, where the CPU in the camera control unit 605 increments i by 1 as i=i+1, and returns to step S102 via D. This operation corresponds to the operation of starting reading out at the next time T2.

[0074] If the result of the determination in step S111 is No, this means that the readout at time T4 is completed, so the process proceeds to step S113, where the CPU in the camera control unit 605 resets the counter circuit 211 with a reset signal. This operation corresponds to the reset operation of the counter circuit 211 at time T4 in Fig. 7. In this manner, the signals accumulated in the photoelectric conversion element 100 can be read out sequentially.

[0075] Next, a configuration example of the camera control unit 605 will be described with reference to Fig. 12. Fig. 12 is a functional block diagram showing the input / output relationship between the photoelectric conversion element 100, the image processing unit 603, and the camera control unit 605, and a detailed configuration example of the camera control unit 605.

[0076] The camera control unit 605 has an evaluation value calculation unit 608 and a judgment unit 609, and controls the length of the accumulation period and the number of accumulations for each frame of the photoelectric conversion element 100, and controls the timing of accumulation and the control signal CLK, for example, via the control pulse generation unit of the photoelectric conversion element 100.

[0077] The evaluation value calculation unit 608 calculates an evaluation value from the count value of the image signal having a short accumulation period, and outputs the calculation result to the determination unit 609 .

[0078] The judgment unit 609 judges whether or not to change the number of accumulations within the same full frame and the length of each accumulation period based on the evaluation value output from the evaluation value calculation unit 608, and outputs the judgment result to the control signal output unit 610.

[0079] A control signal output unit 610 outputs a control signal to the photoelectric conversion element 100 in response to the determination result output from the determination unit 609 so as to change the number of accumulations within the same full frame and the length of each accumulation period. Fig. 13 is a flowchart showing details of an example of the operation of the camera control unit 605 in the embodiment. Note that the operation of each step of the flowchart in Fig. 13 is performed sequentially by the CPU as a computer in the camera control unit 605 executing a computer program stored in the memory.

[0080] In step S114 in the figure, the CPU in the camera control unit 605 sets i=1, and in the next step S115, receives the count value Count(i_1) of frame (i_1) from the image processing unit 603.

[0081] In the next step S116, the CPU in the camera control unit 605 calculates the average value of the count value Count(i_1) of frame (i_1) by the evaluation value calculation unit 608, and calculates the number of increments of the count value per unit time, i.e., the increase rate, from the calculated average value. Here, the number of increments of the count value per unit time, i.e., the increase rate, corresponds to the result of evaluating the signal generated in, for example, the first accumulation period.

[0082] In the next step S117, the CPU in the camera control unit 605 determines whether or not the increase rate is below a lower limit threshold by the determination unit 609. That is, it determines whether or not the increase in the count value per unit time calculated by the evaluation value calculation unit 608 is below the minimum increase in the count value per unit time (hereinafter referred to as the lower limit threshold) at which the recognition unit 604 can recognize an object.

[0083] If the result of the determination in step S117 is Yes, the process proceeds to step S118. In the next step S118, the CPU in the camera control unit 605 causes the control pulse generation unit 115 via the control signal output unit 610 to lengthen the length of the accumulation period from frame (i_2) onward, or outputs a control signal to the photoelectric conversion element 100 so as to reduce the number of accumulations, and the process proceeds to step S121.

[0084] Fig. 14 is a diagram for explaining an example of a photoelectric conversion method by the camera control unit 605 when the number of accumulations is reduced according to the embodiment. Fig. 14 shows an example in which the number of accumulations in one full frame is reduced from 4 to 3 in step S118, and the interval for reading frames after frame (i_2) is changed to every 12.49 ms.

[0085] If the result of the determination in step S117 is No, the process proceeds to step S119. In the next step S119, the CPU in the camera control unit 605 determines, via the determination unit 609, whether the increase rate exceeds an upper limit threshold value.

[0086] That is, in step S119, it is determined whether the increase in the count value per unit time calculated by the evaluation value calculation unit 608 exceeds the maximum increase in the count value per unit time (hereinafter referred to as the upper limit threshold) at which the recognition unit 604 can recognize an object.

[0087] If the result of the determination in step S119 is Yes, the process proceeds to step S120. In the next step S120, the CPU in the camera control unit 605 outputs a control signal to the photoelectric conversion element 100 via the control signal output unit 610, by the control pulse generation unit 115, to shorten the length of the accumulation period from frame (i_2) onward, or to increase the number of accumulations, and the process proceeds to step S121.

[0088] Fig. 15 is a diagram for explaining an example of a photoelectric conversion method by the camera control unit 605 when the number of accumulations is increased according to the embodiment. Fig. 15 shows an example in which the number of accumulations in one full frame is increased from 4 to 5 in step S120, and the interval for reading frames after frame (i_2) is changed to every 6.24 ms.

[0089] If the result of the determination in step S119 is No, the process proceeds to step S121. In the next step S121, the CPU in the camera control unit 605 receives images from frame (i_2) onwards from the image processing unit, and in step S122, i=i+1 is set, incrementing i by 1, and the process returns to step S115.

[0090] In this way, steps S116 to S120 control the number of other accumulation operations or the length of the accumulation period within the same full frame based on the result of evaluating the signal generated during the first accumulation period.

[0091] By performing the above-described control, it is possible to realize a photoelectric conversion device that can read out the short-term accumulation results midway and optimize the accumulation period in response to changes in environmental brightness, such as at night or during the day.

[0092] In the above embodiment, accumulation is performed for a minimum of 1 / 4 full frame period, but the length of the minimum accumulation period may be changed to, for example, 1 / 5 full frame period or 1 / 3 full frame period.

[0093] Furthermore, even if the readout cycle is set to every 1 / 4 full frame period, the counter circuit may be reset midway through the accumulation period of frame 1_1 in Fig. 7 depending on the brightness of the subject, the image recognition accuracy, etc. In this way, the effective accumulation period may be made shorter than the 1 / 4 full frame period.

[0094] Alternatively, the counter circuit may be reset once at time T1 in Fig. 7. This may adjust the count value read out at time T4.

[0095] In the above embodiment, the number of increments in the count value per unit time calculated from the average value of the count values ​​is used as the evaluation value, but the number of increments in the most frequent counter value may be used as the evaluation value. Alternatively, the evaluation value may be calculated from the smallest or largest counter value among all pixels in the frame. That is, when making the evaluation, the number of increments per unit time of the minimum or maximum value among the signals generated during the first accumulation period may be used.

[0096] Alternatively, the histogram of the count values ​​of all pixels in the frame may be used as the evaluation value for the number of increments of the count value per unit time. That is, when calculating the evaluation value, a histogram of the signal generated during the first accumulation period may be used.

[0097] Also, the recognition unit 604 may output a recognition result (e.g., recognition reliability) of the subject to the determination unit 609, and the determination unit 609 may control the number of accumulations in the same full frame and the length of each accumulation period based on the recognition result. That is, the number of other accumulation operations or the length of the accumulation period in the same full frame may be controlled based on the recognition result output from the recognition means.

[0098] Furthermore, in the above embodiment, the length of the accumulation period of frame (i_1) is fixed, but the length of the accumulation period of frame (i_1) may be changed based on the determination result and the set value in frame i-1.

[0099] In the above embodiment, the length of each accumulation period and the number of accumulations for full frame i+1 are controlled while maintaining the determination result and set value for full frame i. However, when accumulation for full frame i is completed, the determination result and set value may be reset once, and accumulation for full frame i+1 may start with the initial setting value set.

[0100] Although the present invention has been described in detail based on the preferred embodiment, the present invention is not limited to the above embodiment, and various modifications are possible based on the spirit of the present invention, and are not excluded from the scope of the present invention. Note that this embodiment includes the following combinations.

[0101] (Configuration 1) A photoelectric conversion device comprising: a sensor unit that emits a pulse at a frequency corresponding to a frequency of receiving photons; a counter that counts the number of the pulses; and a plurality of pixels each having a memory that stores the count value of the counter; and a control means that generates a signal based on the difference between the count values ​​of the counter at the start and end of an accumulation period, wherein the control means performs accumulation operations for a first accumulation period and a second accumulation period within a full frame, the first accumulation period being shorter than the second accumulation period, and controls so that a signal generated during the first accumulation period is output between the end of the first accumulation period and the end of the second accumulation period, and controls the number of other accumulation operations or the length of the accumulation period within the same full frame based on a result of evaluating the signal generated during the first accumulation period.

[0102] (Configuration 2) The photoelectric conversion device according to configuration 1, wherein the first accumulation period and the second accumulation period overlap each other.

[0103] (Configuration 3) The photoelectric conversion device according to configuration 1 or 2, wherein the first accumulation period and the second accumulation period start simultaneously.

[0104] (Configuration 4) The photoelectric conversion device according to any one of configurations 1 to 3, wherein the end of the second accumulation period coincides with the end of the full frame.

[0105] (Configuration 5) The photoelectric conversion device according to any one of configurations 1 to 4, further comprising a recognition means for recognizing a subject based on a signal generated during at least the first accumulation period.

[0106] (Configuration 6) The photoelectric conversion device according to configuration 5, wherein the control means controls the number of other accumulation operations or the length of the accumulation period within the same full frame based on the recognition result output from the recognition means.

[0107] (Configuration 7) The photoelectric conversion device according to any one of configurations 5 or 6, wherein the recognition means further recognizes the subject based on a signal generated during the second accumulation period.

[0108] (Configuration 8) The photoelectric conversion device according to any one of configurations 1 to 7, further comprising a display means for displaying, as an image, at least a signal generated during the second accumulation period.

[0109] (Configuration 9) The photoelectric conversion device according to any one of configurations 1 to 8, wherein the sensor portion includes an avalanche photodiode.

[0110] (Configuration 10) The photoelectric conversion device according to any one of configurations 1 to 9, wherein the evaluation is performed using an average value or an increase in the mode of the signals generated during the first accumulation period.

[0111] (Configuration 11) The photoelectric conversion device according to any one of configurations 1 to 10, characterized in that when making the evaluation, an increase per unit time in the minimum or maximum value of the signals generated during the first accumulation period is used.

[0112] (Configuration 12) The photoelectric conversion device according to any one of configurations 1 to 11, wherein the evaluation is performed using a histogram of a signal generated during the first accumulation period.

[0113] (Configuration 13) A moving body comprising the photoelectric conversion device according to any one of configurations 1 to 12, and a movement control means for controlling the operation of the moving body based on the result of a recognition process using a signal generated during at least the first accumulation period.

[0114] (Method) A photoelectric conversion method for performing photoelectric conversion using a plurality of pixels, each of which has a sensor unit that emits pulses at a frequency corresponding to the frequency of receiving photons, a counter that counts the number of the pulses, and a memory that stores the count value of the counter, the photoelectric conversion method comprising: generating a signal based on the difference between the count values ​​of the counter at the start and end of an accumulation period; performing accumulation operations for a first accumulation period and a second accumulation period within a full frame; the first accumulation period is shorter than the second accumulation period; controlling the signal generated during the first accumulation period to be output between the end of the first accumulation period and the end of the second accumulation period; and controlling the number of other accumulation operations or the length of the accumulation period within the same full frame based on the result of evaluating the signal generated during the first accumulation period.

[0115] (Program) A computer program for controlling each means of the photoelectric conversion device according to any one of configurations 1 to 12 or the moving body according to configuration 13 by a computer.

[0116] A computer program for implementing the functions of the above-described embodiment as part or all of the control in this embodiment may be supplied to the photoelectric conversion device via a network or various storage media. Then, a computer (or a CPU, MPU, etc.) in the photoelectric conversion device may read and execute the program. In this case, the program and the storage medium storing the program constitute the present invention. [Explanation of symbols]

[0117] 11: Sensor board 12: Pixel area 21: Circuit board 22: Circuit area 100: Photoelectric conversion element 101: Pixel 102: Photoelectric conversion unit 103: Signal processing circuit 110: Vertical scanning circuit 111: Horizontal scanning circuit 112: Readout circuit 113: Vertical signal line 114: Output circuit 115: Control pulse generation unit 201: Avalanche photodiode 202: Quench element 210: Waveform shaping section 211: Counter circuit 212: Memory circuit 213: Drive line 600: Photoelectric conversion device 601: Imaging optical system 603: Signal processing unit 604: Recognition part 605: Camera control unit 606: Storage section 607: Communications Department 608: Evaluation value calculation unit 609: Judgment section 610: Control signal output unit

Claims

1. A sensor unit that emits pulses at a frequency corresponding to the frequency of receiving photons; A counter that counts the number of pulses; A plurality of pixels each including a memory for storing a count value of the counter; a control means for generating a signal based on a difference between the count values ​​of the counter at the start and end of an accumulation period; a control means for controlling a signal generated during the first accumulation period to be output between the end of the first accumulation period and the end of the second accumulation period, and for controlling the number of other accumulation operations or the length of the accumulation period within the same full frame based on a result of evaluating the signal generated during the first accumulation period, said control means performing accumulation operations for a first accumulation period and a second accumulation period within a full frame, said control means controlling a signal generated during the first accumulation period to be output between the end of the first accumulation period and the end of the second accumulation period, and controlling the number of other accumulation operations or the length of the accumulation period within the same full frame based on a result of evaluating the signal generated during the first accumulation period.

2. 2. The photoelectric conversion device according to claim 1, wherein the first accumulation period and the second accumulation period overlap each other.

3. 2. The photoelectric conversion device according to claim 1, wherein the first accumulation period and the second accumulation period start simultaneously.

4. 2. The photoelectric conversion device according to claim 1, wherein the end of the second accumulation period coincides with the end of the full frame.

5. 2. The photoelectric conversion device according to claim 1, further comprising recognition means for recognizing a subject based on a signal generated during at least the first accumulation period.

6. 6. The photoelectric conversion device according to claim 5, wherein the control means controls the number of other accumulation operations or the length of an accumulation period within the same full frame based on the recognition result output from the recognition means.

7. 6. The photoelectric conversion device according to claim 5, wherein the recognition means further recognizes the subject based on a signal generated during the second accumulation period.

8. 2. The photoelectric conversion device according to claim 1, further comprising display means for displaying, as an image, at least a signal generated during the second accumulation period.

9. 2. The photoelectric conversion device according to claim 1, wherein the sensor portion includes an avalanche photodiode.

10. 2. The photoelectric conversion device according to claim 1, wherein the evaluation is performed using an average value or an increase in a mode of the signal generated during the first accumulation period.

11. 2. The photoelectric conversion device according to claim 1, wherein the evaluation is performed using an increase in the number of minimum or maximum values ​​per unit time of the signals generated during the first accumulation period.

12. 2. The photoelectric conversion device according to claim 1, wherein the evaluation is performed using a histogram of the signal generated during the first accumulation period.

13. The photoelectric conversion device according to any one of claims 1 to 12, A moving body comprising a movement control means for controlling the movement of the moving body based on a result of a recognition process using at least a signal generated during the first accumulation period.

14. A photoelectric conversion method for performing photoelectric conversion using a plurality of pixels each including a sensor unit that emits a pulse at a frequency corresponding to a frequency of receiving photons, a counter that counts the number of the pulses, and a memory that stores a count value of the counter, comprising: generating a signal based on a difference between the count values ​​of the counter at the start and end of an accumulation period; performing accumulation operations of a first accumulation period and a second accumulation period within a full frame; the first accumulation period is shorter than the second accumulation period; A signal generated during the first accumulation period is output during a period from the end of the first accumulation period to the end of the second accumulation period; A photoelectric conversion method comprising controlling the number of other accumulation operations or the length of an accumulation period within the same full frame based on a result of evaluating a signal generated during the first accumulation period.

15. A computer program for controlling the photoelectric conversion device according to any one of claims 1 to 12 or each means of the moving body according to claim 13 by a computer.

Images