Display panel and display device

Abstract

To provide a display panel and a display device.SOLUTION: The display panel and the display device are disclosed. The display panel includes a base substrate with a first display region and a second display region. A pixel circuit for driving a light-emitting element in the second display region is arranged in the first display region alone and is not arranged in the second display region, and an excellent light transmittance of the second display region can be thus secured. The display panel disclosed in the present application can accordingly have an excellent display effect.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] This application is a divisional application of a Japanese patent application having application number 2023-518291, which is a Japanese national stage application of an international application filed on September 30, 2020, application number PCT / CN2020 / 119673, the entire contents of which are incorporated herein by reference. The present application relates to the field of display technology, and in particular to display panels and display devices. [Background technology]

[0002] Under-screen embedded camera technology is a new technology proposed to increase the screen occupancy rate of display devices.

[0003] In the related art, a display panel with an under-screen embedded camera generally includes a first display area for normal display and a second display area for locating the camera, the second display area generally includes a plurality of light-emitting elements and a plurality of pixel circuits, each pixel circuit is connected to one light-emitting element and is used to drive the light-emitting element to emit light, and the pixel circuits and the light-emitting elements connected to each other overlap in a direction perpendicular to the display panel.

[0004] In the related art, since the pixel circuit is also installed in the second display area, the light transmittance of the second display area is poor, and correspondingly, the display effect of the display panel is poor. Summary of the Invention [Means for solving the problem]

[0005] The present application provides a display panel and a display device, the technical solutions of which are as follows:

[0006] In one aspect, a display device includes a base substrate having a first display region and a second display region, the first display region at least partially surrounding the second display region; a plurality of first pixel circuits, a plurality of second pixel circuits arranged at intervals between the plurality of first pixel circuits, and a plurality of first light-emitting elements, all of which are arranged in the first display region; A plurality of second light emitting elements arranged in the second display area; Including, wherein at least one first pixel circuit among the plurality of first pixel circuits is connected to at least one first light-emitting element among the plurality of first light-emitting elements, an orthogonal projection of the at least one first pixel circuit onto the base substrate at least partially overlaps with an orthogonal projection of the at least one first light-emitting element onto the base substrate, and at least one second pixel circuit among the plurality of second pixel circuits is connected to at least one second light-emitting element among the plurality of second light-emitting elements by a conductive line. Regarding the display panel.

[0007] As an option, the density of the plurality of second light emitting elements is the same as the density of the plurality of first light emitting elements.

[0008] As one option, the resolution of the first display area is the same as the resolution of the second display area, or the resolution of the first display area is different from the resolution of the second display area.

[0009] As an option, each of the first pixel circuits is connected to one of the first light emitting elements; Then, the orthogonal projection of each of the first pixel circuits onto the base substrate at least partially overlaps with the orthogonal projection of the first light emitting element connected thereto onto the base substrate.

[0010] As one option, the plurality of first pixel circuits include a plurality of columns of first pixel circuits extending along a first direction, and the plurality of second pixel circuits include a plurality of columns of second pixel circuits extending along the first direction; Here, the second pixel circuits in the multiple columns are arranged at intervals between the first pixel circuits in the multiple columns.

[0011] As one option, the first pixel circuits in the same or different columns are disposed between any two adjacent columns of the second pixel circuits.

[0012] As one option, the plurality of first pixel circuits include a plurality of rows of first pixel circuits extending along a second direction, and the plurality of second pixel circuits include a plurality of rows of second pixel circuits extending along the second direction, the second direction intersecting the first direction, and wherein the plurality of rows of second pixel circuits are spaced apart between the plurality of rows of first pixel circuits.

[0013] As an option, the first direction is perpendicular to the second direction.

[0014] As an option, the first display area includes a first sub-display area and a second sub-display area arranged sequentially along a first direction, and the first sub-display area includes two symmetric target sub-display areas; Here, the one target sub-display area, the second display area, and the other target sub-display area are sequentially arranged along a second direction.

[0015] As an option, the second display area includes two third sub-display areas symmetrically arranged along the second direction, and the display panel includes a first conductive line, a second conductive line and a third conductive line; each of the third sub-display areas includes k light-emitting element groups, each of the light-emitting element groups includes adjacent columns of the second light-emitting elements, the first light-emitting element group through the kth light-emitting element group are sequentially arranged along a direction closer to the other of the third sub-display areas, k is an integer greater than 0; Each of the target sub-display areas includes k pixel circuit groups that correspond one-to-one to the k light-emitting element groups, and each of the pixel circuit groups includes adjacent columns of the second pixel circuits, the first pixel circuit group to the kth pixel circuit group are sequentially arranged along a direction away from the adjacent third sub-display area, and each of the second light-emitting elements in each of the light-emitting element groups is connected to each of the second pixel circuits in a corresponding one of the pixel circuit groups by the first conductive line, the second conductive line and / or the third conductive line.

[0016] One option is for k to be 4.

[0017] As one option, each of the second light-emitting elements in a first of the light-emitting element groups is connected to each of the second pixel circuits in a first of the pixel circuit groups by the first conductive lines; each of the second light-emitting elements in the second light-emitting element group is connected to each of the second pixel circuits in the second pixel circuit group by the second conductive line; each of the second light-emitting elements in a third of the light-emitting element groups is connected to each of the second pixel circuits in a third of the pixel circuit groups by the third conductive lines; Each of the second light-emitting elements in the fourth light-emitting element group is connected to each of the second pixel circuits in the fourth pixel circuit group by the first conductive line, the second conductive line and the third conductive line.

[0018] As one option, the first conductive line connected to each of the second light-emitting elements in a first group of the light-emitting elements, the second conductive line connected to each of the second light-emitting elements in a second group of the light-emitting elements, and each of the third conductive lines connected to each of the second light-emitting elements in a third group of the light-emitting elements include a first conductive line segment, a second conductive line segment, and a third conductive line segment; One end of the first conductive line segment is connected to a corresponding second light emitting element, and the other end of the first conductive line segment is connected to one end of the second conductive line segment; the other end of the second conductive line segment is connected to one end of the third conductive line segment; the other end of the third conductive line segment is connected to the corresponding second pixel circuit; Here, the first conductive line segment and the third conductive line segment extend along the first direction, the second conductive line segment extends along the second direction, and a orthogonal projection of the second conductive line segment onto the base substrate at least partially overlaps with a orthogonal projection of a second light-emitting element connected to the second conductive line segment onto the base substrate.

[0019] As one option, the second conductive line segment in the first conductive line at least partially overlaps the second conductive line segment in the third conductive line, the second conductive line segment in the first conductive line does not overlap the second conductive line segment in the second conductive line, and the second conductive line segment in the third conductive line does not overlap the second conductive line segment in the second conductive line.

[0020] As one option, the fourth light-emitting element group includes two first sub-light-emitting element groups, two second sub-light-emitting element groups, and two third sub-light-emitting element groups that are symmetrically arranged along an axis of the third sub-display area, each sub-light-emitting element group includes adjacent rows of the second light-emitting elements, and the first sub-light-emitting element groups, the second sub-light-emitting element groups, and the third sub-light-emitting element groups arranged on the same side are sequentially arranged along a direction away from the axis, and the axis extends along the second direction; the fourth pixel circuit group includes two first subpixel circuit groups corresponding one-to-one to the two first sublight-emitting element groups, two second subpixel circuit groups corresponding one-to-one to the two second sublight-emitting element groups, and two third subpixel circuit groups corresponding one-to-one to the two third sublight-emitting element groups; Here, each of the second light-emitting elements in each of the first sub-light-emitting element groups is connected to each of the second pixel circuits in the corresponding first sub-pixel circuit group by the first conductive line, each of the second light-emitting elements in each of the second sub-light-emitting element groups is connected to each of the second pixel circuits in the corresponding second sub-pixel circuit group by the second conductive line, and each of the second light-emitting elements in each of the third sub-light-emitting element groups is connected to each of the second pixel circuits in the corresponding third sub-pixel circuit group by the third conductive line.

[0021] As one option, the first conductive line connected to each of the second light-emitting elements in each of the first sub-light-emitting element groups, the second conductive line connected to each of the second light-emitting elements in each of the second sub-light-emitting element groups, and the third conductive line connected to each of the second light-emitting elements in each of the third sub-light-emitting element groups include a fourth conductive line segment, a fifth conductive line segment, a sixth conductive line segment, and a seventh conductive line segment; One end of the fourth conductive line segment is connected to a corresponding second light emitting element, and the other end of the fourth conductive line segment is connected to one end of the fifth conductive line segment; The other end of the fifth conductive line segment is connected to one end of the sixth conductive line segment; The other end of the sixth conductive line segment is connected to one end of the seventh conductive line segment; the other end of the seventh conductive line segment is connected to the corresponding second pixel circuit; wherein the fifth conductive line segment and the seventh conductive line segment extend along the first direction, the sixth conductive line segment extends along the second direction, and the fourth conductive line segment is disposed between a row in which the second light emitting element is connected and an adjacent row; The fifth conductive line segment included in the first conductive line is disposed in a region where the second light-emitting element group through the fourth light-emitting element group are located, the fifth conductive line segment included in the second conductive line is disposed in a region where the third light-emitting element group and the fourth light-emitting element group are located, the fifth conductive line segment included in the third conductive line is disposed in a region where the fourth light-emitting element group is located, the sixth conductive line segment on a side away from the second sub-display region along the axis is disposed on a side of the second display region away from the second sub-display region, and the sixth conductive line segment on a side closer to the second sub-display region along the axis is disposed in a second display region closer to the second sub-display region.

[0022] As one option, each of the first light-emitting element group to the third light-emitting element group includes 12 columns of the second light-emitting elements, and the fourth light-emitting element group includes 8 columns of the second light-emitting elements, Each of the first to third pixel circuit groups includes 12 columns of the second pixel circuits, and the fourth pixel circuit group includes 8 columns of the second pixel circuits.

[0023] Optionally, the display panel further comprises a plurality of metal layers; a data cable connected to each of the second pixel circuits is disposed in the same layer as any of the metal layers; Here, the plurality of metal layers include a first gate metal layer, a second gate metal layer, a first source-drain metal layer and a second source-drain metal layer.

[0024] As one option, along a direction away from the adjacent third sub-display area, in the second pixel circuits from the 1st column to the ith column in each of the target sub-display areas, data cables connected to the second pixel circuits arranged in odd columns are arranged in the same layer as the first gate metal layer, data cables connected to the second pixel circuits arranged in even columns are arranged in the same layer as the second gate metal layer, and data cables connected to the second pixel circuits from the ith column to the nth column are arranged in the same layer as the first source drain metal layer, where i is an integer greater than 1 and less than n, and n is equal to the total number of columns in each of the target sub-display areas.

[0025] As an option, the data cable connected to each of the second pixel circuits includes a first data cable segment, a second data cable segment, and a third data cable segment; One end of the first data cable segment is connected to a corresponding metal layer, and the other end is connected to one end of the second data cable segment, the other end of the second data cable segment is connected to one end of the third data cable segment, and the other end of the third data cable segment is connected to the second pixel circuit; Here, the second data cable segment extends along the first direction, and the second data cable segment included in the data cable arranged in the same layer as the first gate metal layer, the second data cable segment included in the data cable arranged in the same layer as the second gate metal layer, and the second data cable segment included in the data cable arranged in the same layer as the first source-drain metal layer do not overlap each other.

[0026] As an option, the second source / drain metal layer covers the first gate metal layer, the second gate metal layer and the first source / drain metal layer.

[0027] As one option, for the second pixel circuits in the same column, the data cable connected to the second pixel circuit arranged in the first sub-display area is different from the data cable connected to the second pixel circuit arranged in the second sub-display area.

[0028] As an option, the display panel further includes at least one column of dummy second pixel circuits, the at least one column of dummy second pixel circuits being disposed in the target sub-display area proximate to the second display area.

[0029] As one option, the width of any one of the plurality of first pixel circuits and the plurality of second pixel circuits is smaller than the width of any one of the first light-emitting elements.

[0030] In one option, the difference between the width of each pixel circuit and the width of the first light emitting element is 4 micrometers.

[0031] As one option, each of the second pixel circuits and each of the second light-emitting elements has a switching unit, and the conductive line is respectively connected to the switching unit of the at least one second pixel circuit and the switching unit of the at least one second light-emitting element.

[0032] As an option, the conductive lines are transparent conductive lines.

[0033] As an option, the material of the transparent conductive lines is indium tin oxide.

[0034] Optionally, the second display area is a translucent display area.

[0035] In another aspect, a display device includes an integrated circuit and the display panel according to the above aspect, the integrated circuit is connected to a first pixel circuit and a second pixel circuit in the display panel and is used to drive the first pixel circuit and the second pixel circuit to operate; This relates to a display device.

[0036] As an option, the display device further comprises a light-sensitive sensor, the light-sensitive sensor being disposed within a second display area of ​​the display panel.

[0037] As one option, the second display area is rectangular, and an area of ​​an orthogonal projection of the light-sensitive sensor onto the base substrate is equal to or less than an area of ​​an inscribed circle of the second display area. [Brief description of the drawings]

[0038] In order to more clearly explain the technical solutions in the embodiments of the present application, the drawings used in the description of the embodiments will be briefly described below. The drawings in the following description are only some embodiments of the present disclosure, and it is obvious to those skilled in the art that other drawings can also be obtained based on these drawings without any creative work.

[0039] [Figure 1] FIG. 2 is a structural schematic diagram of a display panel according to an embodiment of the present application. [Diagram 2] FIG. 2 is a structural schematic diagram of another display panel according to an embodiment of the present application. [Diagram 3] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 4] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 5] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 6] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 7] 1A and 1B are layout diagrams of a pixel circuit before and after compression according to an embodiment of the present application. [Figure 8] FIG. 2 is a structural schematic diagram of a display panel according to an embodiment of the present application. [Figure 9] FIG. 2 is a structural schematic diagram of a pixel circuit according to an embodiment of the present application; [Figure 10]FIG. 2 is a layout diagram of a pixel circuit configuration according to an embodiment of the present application. [Figure 11] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 12] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 13] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 14] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 15] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 16] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 17] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 18] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 19] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 20] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 21] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 22] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 23] FIG. 2 is a structural schematic diagram of a conductive line according to an embodiment of the present application. [Figure 24] FIG. 2 is a structural schematic diagram of a conductive line according to an embodiment of the present application. [Diagram 25] FIG. 2 is a structural schematic diagram of a conductive line according to an embodiment of the present application. [Figure 26] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 27] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 28] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 29] 1 is a cross-sectional view of a display panel according to an embodiment of the present application. [Diagram 30] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 31] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 32] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 33] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 34] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 35] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 36] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 37] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 38] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Figure 39] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 40] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 41] 1 is a structural schematic diagram of a data cable according to an embodiment of the present application; [Diagram 42] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 43] FIG. 2 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. [Diagram 44] 1 is a structural schematic diagram of a display device according to an embodiment of the present application; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0040] In order to make the objectives, technical solutions and advantages of the present application clearer, the following describes the embodiments of the present application in more detail with reference to the drawings.

[0041] With the development of display technology, the traditional notch display design or waterdrop display design can no longer meet the user's need for a high screen occupancy rate of the display panel, and a display panel with a series of transparent display areas has been born. In such a display panel, hardware such as a light-sensitive sensor (e.g., a camera) can be placed in the transparent display area, eliminating the need to drill holes, thus enabling true full-screen display while ensuring the practicality of the display panel.

[0042] In an embodiment of the present application, a display panel is provided that ensures a good display effect in the non-light-transmitting display area without reducing the number of pixels in the non-light-transmitting display area, on the premise that the light-emitting elements in the light-transmitting display area can be reliably driven and the light transmittance of the light-transmitting display area is well ensured.

[0043] 1 is a structural schematic diagram of a display panel according to an embodiment of the present application. As shown in FIG. 1, the display panel may include a base substrate 01.

[0044] The base substrate 01 has a first display area A1 and a second display area A2, and the first display area A1 can at least partially surround the second display area A2. For example, the second display area A2 shown in Fig. 1 is located at the top center of the base substrate 01, and correspondingly, the four sides of the rectangular first display area A1 can surround the second display area A2, that is, the second display area A2 can be surrounded by the first display area A1.

[0045] In some embodiments, the second display area A2 may be located at other positions than the top center of the base substrate 01 shown in Fig. 1. For example, referring to Fig. 1, the second display area A2 may be located at the top left corner or the top right corner of the base substrate 01.

[0046] Further referring to another display panel shown in FIG. 2, the display panel may further include a plurality of first pixel circuits 10, a plurality of second pixel circuits 20 and a plurality of first light-emitting elements 30 arranged in a first display area A1, and a plurality of second light-emitting elements 40 arranged in a second display area A2, and the plurality of second pixel circuits 20 may be arranged at intervals between the plurality of first pixel circuits 10.

[0047] Here, at least one first pixel circuit 10 of the multiple first pixel circuits 10 is connected to at least one first light-emitting element 30 of the multiple first light-emitting elements 30, and an orthogonal projection of the at least one first pixel circuit 10 onto the base substrate 01 at least partially overlaps with an orthogonal projection of the at least one first pixel circuit 30 onto the base substrate 01. The at least one first pixel circuit 10 can be used to drive the connected first light-emitting element 30 to emit light by providing a drive signal to the connected first light-emitting element 30.

[0048] At least one second pixel circuit 20 of the plurality of second pixel circuits 20 is connected to at least one second light-emitting element 40 of the plurality of second light-emitting elements 40 by a conductive line L1, and the at least one second pixel circuit 20 can be used to drive the connected second light-emitting element 40 to emit light by providing a drive signal to the second light-emitting element 40. Since the second light-emitting element 40 and the second pixel circuit 20 are arranged in different regions, as shown in FIG. 2, the orthogonal projection of the at least one second pixel circuit 20 onto the base substrate 01 does not overlap with the orthogonal projection of the at least one second light-emitting element 40 onto the base substrate 01.

[0049] As an option, in the embodiment of the present application, the first display area A1 can be set as a non-translucent display area, and the second display area A2 can be set as a translucent display area. That is, the first display area A1 described in the embodiment of the present application cannot transmit light, and the second display area A2 can transmit light. In this way, there is no need to perform a hole-drilling process on the display panel, and the necessary hardware structures such as photosensitive sensors can be directly arranged in the second display area A2, providing a robust foundation for realizing a true full-screen display. Since the second display area A2 only includes light-emitting elements and does not include pixel circuits, the light transmittance of the second display area A2 can also be well ensured.

[0050] In view of the above, the embodiment of the present application provides a display panel including a base substrate having a first display area and a second display area. The pixel circuit for driving the light-emitting element in the second display area is only disposed in the first display area, not disposed in the second display area, so that the light transmittance of the second display area is good. Correspondingly, the display effect of the display panel described in the embodiment of the present application is good.

[0051] Figure 3 shows a structural schematic diagram of another display panel, taking the display panel shown in Figure 2 as an example. Referring to Figure 3, it can be further seen that the first display area A1 not only includes a plurality of pixels, but also includes a plurality of columns of second pixel circuits 20, and the second display area A2 only includes a plurality of second light-emitting elements 40.

[0052] Here, a pixel refers to a structure including a pixel circuit and a light-emitting element. Taking the first pixel circuit 10 and the first light-emitting element 30 as an example, referring to FIG. 3, each pixel shown includes a red subpixel R, two green subpixels G1 and G2, and one blue subpixel B, where the red subpixel R and the blue subpixel B are arranged in the same column, and the two green subpixels G1 and G2 are arranged in the same column. Of course, in some embodiments, a pixel may include subpixels of other colors and other numbers, and the arrangement of each subpixel is not limited to the configuration shown in FIG. 3. For example, each pixel may only include one red subpixel R, one blue subpixel B, and one green subpixel G.

[0053] As an option, in the embodiment of the present application, the electrical connection relationship between the multiple first pixel circuits 10 and the multiple first light-emitting elements 30 may be in one-to-one correspondence. That is, each of the first pixel circuits 10 may be connected to one first light-emitting element 30, and the first light-emitting element 30 connected to each first pixel circuit 10 is different. As a result, referring to the display panel shown in FIG. 2, the orthogonal projection of each first pixel circuit 10 onto the base substrate 01 at least partially overlaps with the orthogonal projection of the connected first light-emitting element 30 onto the base substrate 01.

[0054] Similar to the electrical connection relationship between the first pixel circuit 10 and the first light-emitting element 30, the electrical connection relationship between the plurality of second pixel circuits 20 and the plurality of second light-emitting elements 40 may also correspond one-to-one. Furthermore, the orthogonal projection of each second pixel circuit 20 onto the base substrate 01 does not overlap with the orthogonal projection of the connected second light-emitting element 40 onto the base substrate 01.

[0055] As one option, the density of the plurality of second light-emitting elements 40 arranged in the second display area A2 may be the same as the density of the plurality of first light-emitting elements 30 arranged in the first display area A1. That is, the number of light-emitting elements per inch in the first display area A1 and the second display area A2 is the same. In other words, the first display area A1 (i.e., the main display area) does not have two sub-areas with different pixel densities, and further, compared to the related art, there is no light-dark boundary line in the first display area A1 when displaying a screen, and the display effect of the display panel is good.

[0056] Taking the display panel shown in Fig. 2 as an example, Fig. 4 is a layout diagram of the configuration of a display panel. Referring to Fig. 4, the resolution of the first display area A1 is greater than the resolution of the second display area A2. That is, the area of ​​the first display area A1 is greater than the area of ​​the second display area A2, and the number of light emitting elements included in the first display area A1 is greater than the number of light emitting elements included in the second display area A2.

[0057] In some embodiments, the resolution of the first display area A1 may be equal to or less than the resolution of the second display area A2. For example, the area of ​​the first display area A1 may be the same as the area of ​​the second display area A2, and the number of light-emitting elements included in the first display area A1 may be the same as the number of light-emitting elements included in the second display area A2. Or, the area of ​​the first display area A1 may be smaller than the area of ​​the second display area A2, and the number of light-emitting elements included in the first display area A1 may be smaller than the number of light-emitting elements included in the second display area A2.

[0058] As an option, FIG. 5 is a partially enlarged schematic diagram of the display panel shown in FIG. 4. Referring to FIG. 4 and FIG. 5, the size of the first light-emitting element 30 may be larger than that of the second light-emitting element 40, that is, the anode of the light-emitting element in the second display area A2 is smaller than that of the light-emitting element in the first display area A1. In this way, it can be ensured that the light transmittance of the second display area A2 is larger than that of the first display area A1. Furthermore, better light transmittance can also be ensured by further optimizing the shape and size of the anode of the second light-emitting element 40. For example, referring to the display panel shown in FIG. 3, the anode of the second light-emitting element 40 shown is elliptical.

[0059] In order to improve the light transmittance of the second display area A2, the conductive line L1 described in the embodiments of the present application may be a transparent conductive line. For example, the conductive line L1 can be made of transparent materials such as indium tin oxide (ITO) or indium gallium zinc oxide (IGZO). Assuming that the conductive line L1 is made of ITO material, the conductive line L1 may also be called an ITO line. In all the following embodiments, the conductive line L1 is taken as an example to be an ITO line.

[0060] As an option, in the embodiment of the present application, since the base substrate 01 has a light-transmitting display area, i.e., the second display area A2, the structure of the photosensitive sensor 50 (e.g., a camera) in the display module included in the display device can be directly disposed in the second display area A2, i.e., there is no need to drill an additional hole in the display panel, as shown in Fig. 6. In this way, a robust foundation for realizing a full-screen display panel can be provided.

[0061] As an option, the second display area A2 may be rectangular, and the area of ​​the orthogonal projection of the photosensitive sensor 50 onto the base substrate 01 may be equal to or smaller than the area of ​​the inscribed circle of the second display area A2. That is, the size of the area in which the photosensitive sensor 50 is disposed may be equal to or smaller than the size of the inscribed circle of the second display area A2. For example, referring to FIG. 6, in the illustrated display panel, the size of the area in which the photosensitive sensor 50 is disposed is equal to the size of the inscribed circle YO of the second display area A2, that is, the shape of the area in which the photosensitive sensor 50 is located may be circular, and therefore the area in which the photosensitive sensor 50 is located may also be referred to as a light-transmitting hole. Of course, in some embodiments, the second display area A2 may be other shapes than rectangular, such as circular or elliptical.

[0062] In the related art, the pixel circuits (including the first pixel circuit 10 and the second pixel circuit 20) and the first light-emitting element 30 have the same size (pitch). For example, the width is generally about 30 microns (μm) to 32 microns (μm), and the length is about 60 microns (μm) to 65 microns (μm). In the embodiment of the present application, in order to provide a sufficient space for arranging the second pixel circuit 20 without reducing the number of pixels in the first display area A1, the width of the pixel circuit in the second direction X2 (for example, the extension direction of the gate line, also called the lateral direction) is made smaller than the width of the first light-emitting element 30. Alternatively, the width of the first light-emitting element 30 in the second direction is made larger than the width of the pixel circuit by stretching the first light-emitting element 30 along the second direction. In this way, assuming that the size of the base substrate 01 is the same, many areas can be provided within the first display area A1, and correspondingly, the many areas can be provided with second pixel circuits 20 for driving second light-emitting elements 40 arranged in the second display area A2.

[0063] For example, the difference between the width of the pixel circuit and the width of the first light-emitting element 30 is about 4 μm. Taking the compressed pixel circuit and the width difference of 4 μm as an example, FIG. 7 is a layout diagram of the configuration of the pixel circuit before and after compression (i.e., the related art and the embodiment of the present application). Referring to FIG. 7, the pixel circuit may include a driving structure and a switching unit B1 for connecting to the anode of the light-emitting element, and the size of the switching unit B1 can represent the size of the pixel circuit. The size of the pixel circuit and the light-emitting element before compression is both 1-100 μm in width and 2-200 μm in height, and the size of the light-emitting element after compression does not change, and the height of the pixel circuit does not change, but the width is reduced by 1-20 μm. In this way, there are one or more additional columns of compressed pixel circuits for every several columns of compressed pixel circuits, and the entire screen adopts such a design to achieve full-screen compression. Here, these additional columns are selected to connect the second light-emitting element 40 in the second display area A2 and control the second light-emitting element 40 to emit light. In some embodiments, it is preferred that the pixel circuits of the additional columns closer to the periphery of the second display area A2 are the second pixel circuits 20 for connecting the second light emitting elements 40. In this way, the normal display can be ensured without changing the resolution of the display panel, that is, the existing space of the display panel is fully utilized to realize the normal display.

[0064] 3, the width of the pixel circuit may refer to the length of the orthogonal projection of the layout of the pixel circuit in the second direction X2 onto the base substrate 01. The width of the first light-emitting element 30 refers to the length of the orthogonal projection of the anode of the first light-emitting element 30 onto the base substrate 01 in the second direction X2.

[0065] Also, referring to FIG. 3 and FIG. 8, each first light-emitting element described in the embodiment of the present application belongs to one subpixel in one pixel. For example, red subpixel R, green subpixel G1, G2, or blue subpixel B. When determining the size of the anode of the first light-emitting element, generally, one pixel can be taken as a period and the width D10 of the pixel in the first direction X1 or the second direction X2 can be measured, and then, for the width D01 of each first light-emitting element, the total width D10 of the pixel can be divided by the number of subpixels included in the pixel (for example, 4 shown in FIG. 8). Similarly, since each first light-emitting element is connected to a corresponding pixel circuit, the width of each pixel circuit in the first direction X1 or the second direction X2 can be taken as a period and each pixel circuit connected to a pixel can be measured, and then, for the width D0 of each pixel circuit, the total width can be divided by the number of subpixels included in the pixel.

[0066] As an option, referring to the pixel circuit shown in Figure 7, the pixel circuit described in the embodiment of the present application may be a 7T1C structure, i.e., includes seven transistors and one capacitor. Figure 9 is a structural schematic diagram of the 7T1C pixel circuit, and Figure 10 is a layout diagram of the configuration of the 7T1C pixel circuit.

[0067] 9 and 10, the 7T1C pixel circuit 10 includes a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first emission control transistor T4, a second emission control transistor T5, a first reset transistor T6, a second reset transistor T7, and a storage capacitor C1. The pixel circuit can be connected to a gate signal end Gate, a data signal end Data, a reset signal end RST1, RST2, an emission control signal end EM, a power supply end VDD, an initial power supply end Vinit1, Vinit2, and a light emitting element, which can also be connected to a power supply end VSS. The pixel circuit can be used to drive the connected light emitting element to emit light in response to signals provided from the connected signal ends.

[0068] In addition, according to the characteristics of the transistor, the transistor can be divided into an N-type transistor and a P-type transistor. In the embodiments of the present application, a transistor that is a P-type transistor is taken as an example for description. Based on the description and teaching of the embodiments of the present application, a person skilled in the art can easily come up with an embodiment in which at least a part of the transistors in the pixel circuit structure in the embodiments of the present application are N-type transistors, that is, N-type transistors or a combination of N-type transistors and P-type transistors, without performing creative labor, and these embodiments are also within the scope of protection of the embodiments of the present application.

[0069] To further reflect the existence of multiple columns of additional pixel circuits after the pixel circuits are compressed, a structural schematic diagram of the first display area A1 is shown in Figure 11. Figure 12 is a schematic diagram of a partial structure (including only pixel circuits) of Figure 4, and Figure 13 is a schematic diagram of a partial structure (including only light-emitting elements) of Figure 4.

[0070] 11 to 13, the width of the pixel circuit is smaller than the width of the light-emitting element, and thus the pixel circuits in the second and ninth columns from left to right do not connect the first light-emitting element 30, but belong to an additional column of pixel circuits, and may be the second pixel circuits 20 for connecting the second light-emitting element 40 in the second display area A2. Also, each first light-emitting element 30 may include four types of anodes RG1BG2 and a switching unit B2 for connecting with the first pixel circuit 10. The switching unit B1 of the first pixel circuit 10 and the switching unit B2 of the first light-emitting element 30 are connected by the source-drain metal layer SD2. Alternatively, when the first pixel circuit 10 and the first light-emitting element 30 are connected, there is no need to provide an SD2 line for connection.

[0071] In addition, both at least one second pixel circuit 20 and at least one second light-emitting element 40 may also have a switching unit, and when at least one second pixel circuit 20 is connected to at least one second light-emitting element 40 by a conductive line L1, in reality, the conductive line L1 may be connected to the switching unit of at least one second pixel circuit 20 and the switching unit of at least one second light-emitting element 40, respectively.

[0072] As a result, in order to ensure sufficient space for passing the conductive line L1, the axis of the switching part of each second pixel circuit 20 arranged in the same row can be parallel to the axis of the switching part of any of the second light-emitting elements 40, and the axis can extend along the second direction X2. That is, in the same row in the row direction, the switching part of the second pixel circuit 20 and the switching part of the second light-emitting element 40 are located on the same straight line. Similarly, referring to the above-mentioned Figures 11 to 13, in the same row, the switching part B1 of the first pixel circuit 10 and the switching part B2 of the first light-emitting element 30 may be located on the same straight line so that the wiring is aligned.

[0073] As an option, FIG. 14 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. As shown in FIG. 14, the first display area A1 may include a first sub-display area A11 and a second sub-display area A12 arranged sequentially along a first direction X1. The first sub-display area A11 may include two symmetrical target sub-display areas A110. That is, the two target sub-display areas A110 have the same layout. The second display area A2 may include two third sub-display areas A21 arranged symmetrically along a second direction X2. That is, the two third sub-display areas A21 have the same layout. Here, one target sub-display area A110, the second display area A2, and the other target sub-display area A110 may be arranged sequentially along the second direction X2.

[0074] Based on the display panel shown in Fig. 14, the left half and the right half of the display panel have the same layout. Therefore, in the following embodiment, only the structure of the left half of the display panel is shown, that is, one target sub-display area A110 located in the left half and one adjacent third sub-display area A21 are shown. The same is true for the right half, and the description is omitted.

[0075] Furthermore, the additional columns of pixel circuits described in the embodiments of the present application, i.e., the plurality of second pixel circuits 20, can be distributed and arranged in the first display area A1, and the arrangement positions can be flexibly adjusted as needed, as long as they can ensure efficient connection with the second light-emitting element 40 and drive the second light-emitting element 40 to reliably emit light. For example, in the embodiments of the present application, the arrangement positions of the second pixel circuits 20 are taken as an example in which the plurality of second pixel circuits 20 are distributed and arranged in the column direction, row direction, and diagonal direction, and are briefly described below.

[0076] As an optional embodiment, the second pixel circuits 20 extend along a column direction, and Fig. 15 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. Referring to Fig. 14 and Fig. 15, the plurality of first pixel circuits 10 may include a plurality of columns of first pixel circuits 10 extending along a first direction X1, and the plurality of second pixel circuits 20 may include a plurality of columns of second pixel circuits 20 extending along the first direction X1.

[0077] Here, the second pixel circuits 20 in the multiple columns may be arranged at intervals between the first pixel circuits 10 in the multiple columns. For example, there is one second pixel circuit 20 for each of the first pixel circuits 10 in the multiple adjacent columns. In other words, the first pixel circuits 10 in the multiple adjacent columns can be arranged between the second pixel circuits 20 in two adjacent columns.

[0078] As one option, the same number of columns of first pixel circuits 10 can be arranged between any two adjacent columns of second pixel circuits 20, thereby ensuring uniformity of arrangement. For example, eight adjacent columns of first pixel circuits 10 can be arranged between any two adjacent columns of second pixel circuits 20, or a different number of columns of first pixel circuits 10 can be arranged between any two adjacent columns of second pixel circuits 20.

[0079] 16, for example, taking the left boundary line between the third sub-display area A21 and the target sub-display area A110 as a starting position, the second column of pixel circuits, the twelfth column of pixel circuits, and the twentieth column of pixel circuits to the left may all be the second pixel circuits 20. Note that an additional column of the second pixel circuits 20 below the second display area A2 may be used as a dummy column and is not connected to a light-emitting element.

[0080] As another optional embodiment, the second pixel circuits 20 do not extend along the column direction, and Fig. 17 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. As shown in Fig. 17, the plurality of first pixel circuits 10 may include a plurality of rows of first pixel circuits 10 extending along the second direction X2, and the plurality of second pixel circuits 20 may include a plurality of rows of second pixel circuits 20 extending along the second direction X2.

[0081] As an option, the first direction X1 may cross the second direction X2. For example, when the first direction X1 and the second direction X2 are not perpendicular, the second pixel circuits 20 may be arranged along a diagonal direction. When the first direction X1 and the second direction X2 are perpendicular, the second pixel circuits 20 may be arranged along a row direction.

[0082] Here, the second pixel circuits 20 in the multiple rows are arranged at intervals between the first pixel circuits 10 in the multiple rows. For example, the multiple second pixel circuits 20 shown in FIG. 17 extend along the row direction, i.e., one row of the second pixel circuits 20 exists for each of the first pixel circuits 10 in the multiple adjacent rows. In other words, the first pixel circuits 10 in the multiple adjacent rows can be arranged between the second pixel circuits 20 in two adjacent rows. In all of the following embodiments, an example will be described in which the multiple second pixel circuits 20 are arranged sequentially along the column direction.

[0083] It should be noted that the additional column of pixel circuits, i.e., the second pixel circuit 20, is connected to the second light-emitting element 40 by the conductive line L1, and the number of stacked conductive lines L1 can be flexibly adjusted according to the radius of the light-transmitting hole. For example, FIG. 18 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. As shown in FIG. 18, the display panel may include a conductive line L11 (i.e., ITO1), a second conductive line L12 (i.e., ITO2), and a third conductive line L13 (i.e., ITO3).

[0084] Each third sub-display area A21 may include k light-emitting element groups. Each light-emitting element group may include adjacent columns of second light-emitting elements 40, and the first light-emitting element group to the kth light-emitting element group may be sequentially arranged along a direction closer to the other third sub-display area. Correspondingly, each target sub-display area A110 includes k pixel circuit groups in one-to-one correspondence with the k light-emitting element groups Z0. Each pixel circuit group may include adjacent columns of second pixel circuits 20, and the first pixel circuit group to the kth pixel circuit group may be sequentially arranged along a direction away from the adjacent third sub-display area.

[0085] Here, k may be an integer greater than 0. For example, in the embodiments of the present application, an example will be described in which k is 4. As an option, each of the first light-emitting element group Z01 to the third light-emitting element group Z03 may include 12 columns of second light-emitting elements 40. The fourth light-emitting element group Z04 may include 8 columns of second light-emitting elements 40. Correspondingly, each of the first pixel circuit group Z11 to the third pixel circuit group Z13 may include 12 columns of second pixel circuits 20. The fourth pixel circuit group Z14 may include 8 columns of second pixel circuits 20.

[0086] That is, in the display panel shown in FIG. 18, in the third sub-display area A21, the second light-emitting element 40 in the first column to the second light-emitting element 40 in the thirteenth column (i.e., R1 to R13) belong to the first light-emitting element group Z01, the second light-emitting element 40 in the fourteenth column to the second light-emitting element 40 in the twenty-sixth column (i.e., R14 to P26) belong to the second light-emitting element group Z02, the second light-emitting element 40 in the twenty-seventh column to the second light-emitting element 40 in the thirty-ninth column (i.e., P27 to R39) belong to the third light-emitting element group Z03, and the second light-emitting element 40 in the fortieth column to the second light-emitting element 40 in the forty-eighth column (i.e., R40 to R48) belong to the fourth light-emitting element group Z04.

[0087] Correspondingly, in the target sub-display area A110, the second pixel circuit 20 in the first column to the second pixel circuit 20 in the thirteenth column (i.e., P1 to P13) belong to the first pixel circuit group Z11, the second pixel circuit 20 in the fourteenth column to the second pixel circuit 20 in the twenty-sixth column (i.e., P14 to P26) belong to the second pixel circuit group Z12, the second pixel circuit 20 in the twenty-seventh column to the second pixel circuit 20 in the thirty-ninth column (i.e., P27 to P39) belong to the third pixel circuit group Z13, and the second pixel circuit 20 in the fortieth column to the second pixel circuit 20 in the fortieth column (i.e., P40 to P48) belong to the fourth pixel circuit group Z14. FIG. 18 does not show only the first pixel circuit 10 and the first light-emitting element 30.

[0088] As an option, in the embodiment of the present application, each second light-emitting element 40 in each light-emitting element group is connected to each second pixel circuit 20 in a corresponding one of the pixel circuit groups by a first conductive line L11, a second conductive line L12 and / or a third conductive line L13.

[0089] For example, as shown in FIG. 19, each second light-emitting element 40 in the first light-emitting element group Z01 is connected to each second pixel circuit 20 in the first pixel circuit group Z11 by a first conductive line L11 (in FIG. 19, the first conductive line L11 is shown as ITO1).

[0090] As shown in FIG. 20, each second light-emitting element 40 in the second light-emitting element group Z02 is connected to each second pixel circuit 20 in the second pixel circuit group Z12 by a second conductive line L12 (in FIG. 20, the second conductive line L12 is shown as ITO2).

[0091] As shown in FIG. 21, each second light-emitting element 40 in the third light-emitting element group Z03 is connected to each second pixel circuit 20 in the third pixel circuit group Z13 by a third conductive line L13 (in FIG. 21, the third conductive line L13 is shown as ITO3).

[0092] As shown in FIG. 22, each second light-emitting element 40 in the fourth light-emitting element group Z04 is connected to each second pixel circuit 20 in the fourth pixel circuit group Z14 by a first conductive line L11 (i.e., ITO1), a second conductive line L12 (i.e., ITO2) and a third conductive line L13 (i.e., ITO3).

[0093] For example, referring to Fig. 22, the fourth light-emitting element group Z04 may include two first sub-light-emitting element groups Z041, two second sub-light-emitting element groups Z042, ​​and two third sub-light-emitting element groups Z043, which are symmetrically arranged along the axis xx of the third sub-display area A21. Here, the number of rows of the second light-emitting elements 40 included in each sub-light-emitting element group may be the same or different. In addition, the first sub-light-emitting element group Z041, the second sub-light-emitting element group Z042, ​​and the third sub-light-emitting element group Z043 arranged on the same side are sequentially arranged along a direction away from the axis xx, and the axis xx extends along the second direction X2. The fourth pixel circuit group Z14 may include two first subpixel circuit groups Z141 corresponding one-to-one to the two first sublight-emitting element groups Z041, two second subpixel circuit groups Z142 corresponding one-to-one to the two second sublight-emitting element groups Z042, ​​and two third subpixel circuit groups Z143 corresponding one-to-one to the two third sublight-emitting element groups Z043. The arrangement of the first subpixel circuit group Z141, the second subpixel circuit group Z142, and the third subpixel circuit group Z143 arranged on the same side is the same as the arrangement of the sublight-emitting element groups.

[0094] Here, each second light-emitting element 40 in each first sub-light-emitting element group Z041 is connected to each second pixel circuit 20 in the corresponding first sub-pixel circuit group Z141 by a first conductive line L11 (i.e., ITO1). Each second light-emitting element 40 in each second sub-light-emitting element group Z042 is connected to each second light-emitting element 40 in the corresponding second sub-pixel circuit group Z142 by a second conductive line L12 (i.e., ITO2). Each second light-emitting element 40 in each third sub-light-emitting element group Z043 is connected to each second pixel circuit 20 in the corresponding third sub-pixel circuit group Z143 by a third conductive line L13 (i.e., ITO3).

[0095] Fig. 23 is a structural schematic diagram of a conductive line according to an embodiment of the present application. Fig. 24 is a layout diagram of the configuration shown in Fig. 19 to Fig. 21. Further referring to Fig. 19 to Fig. 21, the first conductive line L11 connected to each second light-emitting element 40 in the first light-emitting element group Z01, the second conductive line L12 connected to each second light-emitting element 40 in the second light-emitting element group Z02, and each third conductive line L13 connected to each second light-emitting element 40 in the third light-emitting element group Z03 may each include a first conductive line segment La, a second conductive line segment Lb, and a third conductive line segment Lc.

[0096] Here, one end of the first conductive line segment La is connected to the corresponding second light-emitting element 40, and the other end of the first conductive line segment La is connected to one end of the second conductive line segment Lb. The other end of the second conductive line segment Lb is connected to one end of the third conductive line segment Lc. The other end of the third conductive line segment Lc is connected to the corresponding second pixel circuit 20. The first conductive line segment La and the third conductive line segment Lc extend along the first direction X1, the second conductive line segment Lb extends along the second direction X2, and the orthogonal projection of the second conductive line segment Lb onto the base substrate 01 at least partially overlaps with the orthogonal projection of the second light-emitting element 40 onto the base substrate 01 (see FIG. 24). That is, both the first conductive line L11, the second conductive line L12 and the third conductive line L13 can be pulled out from the connected second light-emitting element 40 and extend laterally from the row direction to the second pixel circuit 20 in order to connect to the second pixel circuit 20.

[0097] As an option, the second conductive line segment Lb included in the first conductive line L11 can at least partially overlap with the second conductive line segment Lb included in the third conductive line L13 to prevent interference between signals. The second conductive line segment Lb included in the first conductive line L11 may not overlap with the second conductive line segment Lb included in the second conductive line L12, and the second conductive line segment Lb included in the third conductive line L13 may not overlap with the second conductive line segment Lb included in the second conductive line L12. The overlapping portions are switched through vias.

[0098] 24 shows only the layout in the display panel of the first conductive wires L11, i.e., ITO1 wiring, connected to each second light-emitting element 40 in the first light-emitting element group Z01. The layout in the display panel of the second conductive wires L12 (i.e., ITO2 wiring) connected to each second light-emitting element 40 in the second light-emitting element group Z02 and the third conductive wires L13 (i.e., ITO3 wiring) connected to each second light-emitting element 40 in the third light-emitting element group Z03 can be directly referred to the schematic diagram of the display panel shown in FIG. 24, and description thereof will be omitted here.

[0099] As an option, Fig. 25 is a structural schematic diagram of a conductive line according to an embodiment of the present application. As shown in Fig. 25, the first conductive line L11 connected to each second light-emitting element 40 in each first sub-light-emitting element group Z041, the second conductive line L12 connected to each second light-emitting element 40 in each second sub-light-emitting element group Z042, ​​and the third conductive line L13 connected to each second light-emitting element 40 in each third sub-light-emitting element group Z043 may include a fourth conductive line segment Ld, a fifth conductive line segment Le, a sixth conductive line segment Lf, and a seventh conductive line segment Lg.

[0100] Here, one end of the fourth conductive line segment Ld is connected to the corresponding second light-emitting element 40, and the other end of the fourth conductive line segment Ld is connected to one end of the fifth conductive line segment Le. The other end of the fifth conductive line segment Le is connected to one end of the sixth conductive line segment Lf. The other end of the sixth conductive line segment Lf is connected to one end of the seventh conductive line segment Lg. The other end of the seventh conductive line segment Lg is connected to the corresponding second pixel circuit 20. The fifth conductive line segment Le and the seventh conductive line segment Lg extend along the first direction X1, and the sixth conductive line segment Lf extends along the second direction X2. The fourth conductive line segment Ld is disposed between the row in which the connected second light-emitting element 40 is located and the adjacent row.

[0101] FIG. 26 is a structural schematic diagram of yet another display panel according to an embodiment of the present application, and FIG. 27 is a structural schematic diagram of yet another display panel according to an embodiment of the present application. FIG. 28 is a simplified schematic diagram of the display panel shown in FIG. 27. Referring to FIG. 26 to FIG. 28, the fifth conductive line segment Le included in the first conductive line L11 (i.e., ITO1) is disposed in the area where the second light-emitting element group Z02 to the fourth light-emitting element group Z04 are located. The fifth conductive line segment Le included in the second conductive line L12 (i.e., ITO2) is disposed in the area where the third light-emitting element group Z03 and the fourth light-emitting element group Z04 are located. The fifth conductive line segment Le included in the third conductive line L13 (i.e., ITO3) is disposed in the area where the fourth light-emitting element group Z04 is located. The sixth conductive line segment Lf on the side away from the second sub-display area A12 along the axis is arranged on the side of the second display area A2 away from the second sub-display area A12, and the sixth conductive line segment Lf on the side closer to the second sub-display area A12 along the axis is arranged within the second display area A2 close to the second sub-display area A12.

[0102] That is, the fifth conductive line segment Le included in the first conductive line L11 can be pulled out from the connected second light-emitting element 40 to connect to the second pixel circuit 20, and extend along the column direction from the area where the second light-emitting elements 40 in columns R14 to R48 are located (i.e., the area where Z02 to Z04 are located) to the side closer to the non-display area of ​​the third sub-display area A21 or the side closer to the second sub-display area A12 of the third sub-display area A21, and then extend laterally along the row direction to the area where the corresponding second pixel circuit 20 is located. The fifth conductive line segment Le included in the second conductive line L12 can be pulled out from the connected second light-emitting element 40 to connect to the second pixel circuit 20, and extend along the column direction from the area where the second light-emitting elements 40 in columns P27 to R48 are located (i.e., the area where Z03 and Z04 are located) to the side closer to the non-display area of ​​the third sub-display area A21 or the side closer to the second sub-display area A12 of the third sub-display area A21, and then extend laterally along the row direction to the area where the corresponding second pixel circuit 20 is located. The fifth conductive line segment Le included in the third conductive line L13 may be drawn out from the connected second light-emitting element 40 to connect with the second pixel circuit 20, and may extend along the column direction from the region where the second light-emitting element 40 in columns R40 to R48 is located (i.e., the region where Z04 is located) to the side closer to the non-display region of the third sub-display region A21 or the side closer to the second sub-display region A12 of the third sub-display region A21, and then extend laterally along the row direction to the region where the corresponding second pixel circuit 20 is located. Also, the sixth conductive line segment Lf included in each conductive line disposed on the same side and extending along the row direction may or may not overlap partially.

[0103] 26 and 27, the display panel further includes at least one column of dummy second pixel circuits 20, which are arranged in the target sub-display area A110. The dummy second pixel circuits 20 in the column are also called transition columns, and the dummy second pixel circuits 20 in the column are not connected to any light-emitting elements.

[0104] By providing the transition column, the problem that the distance between the second light-emitting element 40 in the first column and the second pixel circuit 20 connected thereto is smaller than the distance between the second light-emitting element 40 in the last column and the second pixel circuit 20 connected thereto, resulting in a large difference in lighting between the second light-emitting element 40 in the first column and the second light-emitting element 40 in the last column, can be avoided, and a better display effect can be further ensured.

[0105] Comparing FIG. 26 and FIG. 27, in the first light-emitting element group 01, the first conductive lines L11 (i.e., ITO1) connected to the second light-emitting elements 40 arranged in adjacent rows may be arranged on the same side facing upward, or may be arranged symmetrically on different sides. In the second light-emitting element group 01, the second conductive lines L12 (i.e., ITO2) connected to the second light-emitting elements 40 arranged in adjacent rows may be arranged on the same side facing upward, or may be arranged symmetrically on different sides. In the third light-emitting element group 01, the third conductive lines L13 (i.e., ITO1) connected to the second light-emitting elements 40 arranged in adjacent rows may be arranged on the same side facing upward, or may be arranged symmetrically on different sides. Of course, all of the above signal lines may be arranged on the same side facing downward, and the description will be omitted.

[0106] Fig. 29 is a cross-sectional view of a display panel. Here, ITO1 represents the first conductive line L11, ITO2 represents the second conductive line L12, and ITO3 represents the third conductive line L13. Anode refers to the anode of the light-emitting element, PLN refers to the flat layer, and the display panel shown in Fig. 29 includes five flat layers PLN1 to PLN5, SD1 refers to the first source-drain metal layer, and SD2 refers to the second source-drain metal layer.

[0107] As an option, the display panel may include multiple metal layers, such as a first gate metal layer GATE1, a second gate metal layer GATE2, a first source-drain metal layer SD1 and a second source-drain metal layer SD2, etc. A data cable DATA connected to each second pixel circuit 20 may be disposed in the same layer as any of the metal layers.

[0108] For example, referring to the display panel shown in FIG. 30, in the second pixel circuits 20 in the first to i-th columns in each target sub-display area A110 along the direction away from the adjacent third sub-display area A21, the data cable DATA connected to the second pixel circuits 20 arranged in the odd columns may be arranged in the same layer as the first gate metal layer GATE1. The data cable DATA connected to the second pixel circuits 20 arranged in the even columns may be arranged in the same layer as the second gate metal layer GATE2. The data cable DATA connected to the second pixel circuits 20 in the i-th to n-th columns may be arranged in the same layer as the first source-drain metal layer SD1. Here, i is an integer greater than 1 and less than n, and n is equal to the total number of columns in each target sub-display area A110. That is, the data cable DATA connected to the second pixel circuits 20 in the first to i-th columns may be arranged in the same layer as GATE1 and GATE2 alternately. The data cables DATA connected to the second pixel circuits 20 in the ith to nth columns may be disposed in the same layer as SD1.

[0109] As an option, assuming there are 48 columns of second light-emitting elements 40 in the third sub-display area A21, i may be 24, i.e., one set for every 24 columns of second light-emitting elements 40. Correspondingly, that is, in the 1st to 24th columns, the data cables DATA connected to the odd columns may be arranged in the same layer as the first gate metal layer GATE1, in the 1st to 24th columns, the data cables DATA connected to the even columns may be arranged in the same layer as the second gate metal layer GATE2, and the data cables DATA connected to the 24th to 48th columns are all arranged in the same layer as the first source-drain metal layer SD1.

[0110] As one of the options, Figs. 31 and 32 are layout diagrams of a configuration in which the data cable DATA connected to the second pixel circuits 20 in the odd columns is arranged in the same layer as the first gate metal layer GATE1 at different positions. Figs. 33 and 34 are layout diagrams of a configuration in which the data cable DATA connected to the second pixel circuits 20 in the even columns is arranged in the same layer as the second gate metal layer GATE2 at different positions. Figs. 35 and 36 are layout diagrams of a configuration in which the data cable DATA connected to the second pixel circuits 20 in the i-th to n-th columns is arranged in the same layer as SD1 at different positions. Figs. 37 and 38 are layout diagrams of the entire display panel arranged in the same layer as the first gate metal layer GATE1, the same layer as the second gate metal layer GATE2, and the same layer as SD1 at different positions. Figs. 39 and 40 are layout diagrams including the conductive line L1 and the data cable DATA.

[0111] 41 is a structural schematic diagram of a data cable. Referring to the above-mentioned data cable diagram, the data cable DATA connected to each second pixel circuit 20 may include a first data cable segment D11, a second data cable segment D12, and a third data cable segment D13.

[0112] Here, one end of the first data cable segment D11 is connected to a corresponding metal layer, and the other end is connected to one end of the second data cable segment D12, the other end of the second data cable segment D12 is connected to one end of the third data cable segment D13, and the other end of the third data cable segment D13 may be connected to the second pixel circuit 20.

[0113] And the second data cable segment D12 extends along the first direction X1, and the second data cable segment D12 included in the data cable DATA arranged in the same layer as the first gate metal layer GATE1, the second data cable segment D12 included in the data cable DATA arranged in the same layer as the second gate metal layer GATE2, and the second data cable segment D12 included in the data cable DATA arranged in the same layer as the first source-drain metal layer SD1 may not overlap each other. That is, each data cable DATA can be switched and pulled out from the metal layer at the boundary between the third sub-display area A21 and the second sub-display area A12, and extends in the column direction from the display area to the non-display area in the third sub-display area A21, then extends in the row direction to the second pixel circuit 20 of the corresponding column, and is connected to the second pixel circuit 20.

[0114] 42, the data cable DATA connected to the second pixel circuit 20 arranged in the first sub-display area A11 may be different from the data cable DATA connected to the second pixel circuit 20 arranged in the second sub-display area A12 in the same column. For example, the data cable DATA connected to the second pixel circuit 20 in one column is cut at the boundary between the first sub-display area A11 and the second sub-display area A12. In this way, it is possible to avoid the problem of mutual interference due to signals supplied from the data cables and ensure effective and reliable driving of the second light-emitting element 40.

[0115] Further, referring to the display panel shown in Fig. 43, the second source-drain metal layer SD2 covers the first gate metal layer GATE1, the second gate metal layer GATE2 and the first source-drain metal layer SD1. In this way, signal shielding at the connection point between the driving transistor and the light-emitting element can be realized, thereby reducing signal crosstalk.

[0116] A certain shielding effect can be achieved against the influence of the parasitic capacitance on the conductive line L1, and a good display effect can be ensured.

[0117] In view of the above, the embodiment of the present application provides a display panel including a base substrate having a first display area and a second display area. The pixel circuit for driving the light-emitting element in the second display area is only disposed in the first display area, not disposed in the second display area, so that the light transmittance of the second display area is good. Correspondingly, the display effect of the display panel described in the embodiment of the present application is good.

[0118] 44 is a structural schematic diagram of a display device according to an embodiment of the present application. As shown in FIG. 44, the display device may include an integrated circuit and a display panel 200 as shown in any of the above figures.

[0119] Here, the integrated circuit 100 is connected to a first pixel circuit and a second pixel circuit in a display panel 200 and is used to drive the first pixel circuit and the second pixel circuit to operate. For example, the driving circuit 100 is connected to each signal terminal connected to the pixel circuit and is used to supply signals to each signal terminal.

[0120] 44 shows only a schematic position of the integrated circuit 100, and the integrated circuit 100 may be disposed on the right side of the display panel 200, or on both the left and right sides of the display panel 200. Alternatively, the integrated circuit 100 may be disposed on the upper and / or lower sides of the display panel 200.

[0121] As an option, the display device may be any product or component having a display function, such as an organic light-emitting diode (OLED) display device, an active-matrix organic light-emitting diode (AMOLED) display device, a mobile phone, a tablet, a flexible display device, a television, a display, etc.

[0122] It is obvious to those skilled in the art that for convenience and brevity of description, the specific operation process of the above-mentioned display substrate and display device can be referred to the corresponding process in the above method embodiment, and the description is omitted here.

[0123] The above are only optional examples of the present application, and do not limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should be included within the protection scope of the present application.

Claims

1. a base substrate having a first display area and a second display area, the first display area at least partially surrounding the second display area; a plurality of first pixel circuits, a plurality of second pixel circuits arranged at intervals between the plurality of first pixel circuits, and a plurality of first light-emitting elements, all of which are arranged in the first display region; A plurality of second light-emitting elements arranged in the second display area; At least one column of dummy second pixel circuits; Including, the plurality of first pixel circuits include a plurality of columns of first pixel circuits extending along a first direction; The at least one column of dummy second pixel circuits are arranged in a target sub-display area close to the second display area, the at least one column of dummy second pixel circuits are arranged between two adjacent columns of first pixel circuits, the first display area includes a first sub-display area, and the first sub-display area includes two symmetrical target sub-display areas; At least one first pixel circuit of the plurality of first pixel circuits is connected to at least one first light-emitting element of the plurality of first light-emitting elements, an orthogonal projection of the at least one first pixel circuit onto the base substrate at least partially overlaps an orthogonal projection of the at least one first light-emitting element onto the base substrate, and at least one second pixel circuit of the plurality of second pixel circuits is connected to at least one second light-emitting element of the plurality of second light-emitting elements by a conductive line. Display panel.

2. The display panel according to claim 1 , wherein a density of the second light-emitting elements is the same as a density of the first light-emitting elements.

3. The display panel of claim 1 , wherein a resolution of the first display area is the same as a resolution of the second display area, or a resolution of the first display area is different from a resolution of the second display area.

4. Each of the first pixel circuits is connected to one of the first light emitting elements, an orthogonal projection of each of the first pixel circuits onto the base substrate at least partially overlaps an orthogonal projection of the first light emitting element connected thereto onto the base substrate; The display panel according to claim 1 .

5. the plurality of second pixel circuits include a plurality of columns of second pixel circuits extending along a first direction; the second pixel circuits in the plurality of columns are spaced apart from the first pixel circuits in the plurality of columns; 4. The display panel according to claim 1, wherein the first pixel circuits in a same number of columns or a different number of columns are arranged between the second pixel circuits in any two adjacent columns.

6. the first display area includes a first sub-display area and a second sub-display area sequentially arranged along a first direction; the one target sub-display area, the second display area, and the other target sub-display area are sequentially arranged along a second direction; The display panel according to claim 1 .

7. the second display area includes two third sub-display areas symmetrically arranged along the second direction, and the display panel includes a first conductive line, a second conductive line and a third conductive line; each of the third sub-display areas includes k light-emitting element groups, each of the light-emitting element groups includes adjacent columns of the second light-emitting elements, the first light-emitting element group through the kth light-emitting element group are sequentially arranged along a direction closer to the other of the third sub-display areas, k is an integer greater than 0, each of the target sub-display areas includes k pixel circuit groups corresponding one-to-one to the k light-emitting element groups, each of the pixel circuit groups includes adjacent columns of the second pixel circuits, the first pixel circuit group to the kth pixel circuit group are sequentially arranged along a direction away from the adjacent third sub-display area, and each of the second light-emitting elements in each of the light-emitting element groups is connected to each of the second pixel circuits in a corresponding one of the pixel circuit groups by the first conductive line, the second conductive line and / or the third conductive line; The display panel according to claim 6.

8. the second light-emitting element in a first light-emitting element group is connected to the second pixel circuit in a first pixel circuit group by the first conductive line; the second light-emitting element in a second light-emitting element group is connected to the second pixel circuit in a second pixel circuit group by the second conductive line; the second light-emitting element in a third light-emitting element group is connected to the second pixel circuit in a third pixel circuit group by the third conductive line; the second light emitting element in a fourth light emitting element group is connected to the second pixel circuit in a fourth pixel circuit group by the first conductive line, the second conductive line, and the third conductive line; The display panel according to claim 7.

9. the first conductive line connected to each of the second light-emitting elements in a first light-emitting element group, the second conductive line connected to each of the second light-emitting elements in a second light-emitting element group, and the third conductive line connected to each of the second light-emitting elements in a third light-emitting element group include a first conductive line segment, a second conductive line segment, and a third conductive line segment; One end of the first conductive line segment is connected to a corresponding second light emitting element, and the other end of the first conductive line segment is connected to one end of the second conductive line segment; the other end of the second conductive line segment is connected to one end of the third conductive line segment; the other end of the third conductive line segment is connected to a corresponding second pixel circuit; the first conductive line segment and the third conductive line segment extend along the first direction, the second conductive line segment extends along the second direction, and an orthogonal projection of the second conductive line segment onto the base substrate at least partially overlaps with an orthogonal projection of a second light emitting element connected to the second conductive line segment onto the base substrate. The display panel according to claim 8.

10. 10. The display panel of claim 9, wherein the second conductive line segment included in the first conductive line at least partially overlaps with the second conductive line segment included in the third conductive line, the second conductive line segment included in the first conductive line does not overlap with the second conductive line segment included in the second conductive line, and the second conductive line segment included in the third conductive line does not overlap with the second conductive line segment included in the second conductive line.

11. the fourth light-emitting element group includes two first sub-light-emitting element groups, two second sub-light-emitting element groups, and two third sub-light-emitting element groups that are symmetrically arranged along an axis of the third sub-display area, each sub-light-emitting element group includes adjacent rows of the second light-emitting elements, the first sub-light-emitting element group, the second sub-light-emitting element group, and the third sub-light-emitting element group arranged on the same side are sequentially arranged along a direction away from the axis, and the axis extends along the second direction; the fourth pixel circuit group includes two first sub-pixel circuit groups corresponding one-to-one to the two first sub-light-emitting element groups, two second sub-pixel circuit groups corresponding one-to-one to the two second sub-light-emitting element groups, and two third sub-pixel circuit groups corresponding one-to-one to the two third sub-light-emitting element groups; each of the second light-emitting elements in each of the first sub-light-emitting element groups is connected to each of the second pixel circuits in the corresponding first sub-pixel circuit group by the first conductive line, each of the second light-emitting elements in each of the second sub-light-emitting element groups is connected to each of the second pixel circuits in the corresponding second sub-pixel circuit group by the second conductive line, and each of the second light-emitting elements in each of the third sub-light-emitting element groups is connected to each of the second pixel circuits in the corresponding third sub-pixel circuit group by the third conductive line; The display panel according to claim 8.

12. the first conductive line connected to each of the second light-emitting elements in each of the first sub-light-emitting element groups, the second conductive line connected to each of the second light-emitting elements in each of the second sub-light-emitting element groups, and the third conductive line connected to each of the second light-emitting elements in each of the third sub-light-emitting element groups include a fourth conductive line segment, a fifth conductive line segment, a sixth conductive line segment, and a seventh conductive line segment; One end of the fourth conductive line segment is connected to a corresponding second light emitting element, and the other end of the fourth conductive line segment is connected to one end of the fifth conductive line segment; the other end of the fifth conductive line segment is connected to one end of the sixth conductive line segment; the other end of the sixth conductive line segment is connected to one end of the seventh conductive line segment; the other end of the seventh conductive line segment is connected to the corresponding second pixel circuit; the fifth conductive line segment and the seventh conductive line segment extend along the first direction, the sixth conductive line segment extend along the second direction, and the fourth conductive line segment is disposed between a row in which the second light emitting element is connected and an adjacent row; a fifth conductive line segment included in the first conductive line is disposed in a region where the second light emitting element group through the fourth light emitting element group are located, a fifth conductive line segment included in the second conductive line is disposed in a region where the third light emitting element group and the fourth light emitting element group are located, a fifth conductive line segment included in the third conductive line is disposed in a region where the fourth light emitting element group is located, the sixth conductive line segment on a side away from the second sub-display region along the axis is disposed on a side of the second display region away from the second sub-display region, and the sixth conductive line segment on a side closer to the second sub-display region along the axis is disposed in a second display region close to the second sub-display region. The display panel according to claim 11.

13. further comprising a plurality of metal layers; a data cable connected to each of the second pixel circuits is disposed in the same layer as any of the metal layers; the plurality of metal layers include a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer; The display panel according to claim 7 .

14. along a direction away from the adjacent third sub-display area, in the second pixel circuits from the first column to the i-th column in each of the target sub-display areas, data cables connected to the second pixel circuits arranged in odd columns are arranged in the same layer as the first gate metal layer, data cables connected to the second pixel circuits arranged in even columns are arranged in the same layer as the second gate metal layer, and data cables connected to the second pixel circuits from the i-th column to the n-th column are arranged in the same layer as the first source-drain metal layer, i is an integer greater than 1 and less than n, and n is equal to a total number of columns in each of the target sub-display areas; a data cable connected to each of the second pixel circuits includes a first data cable segment, a second data cable segment, and a third data cable segment; one end of the first data cable segment is connected to a corresponding metal layer, and the other end is connected to one end of the second data cable segment, the other end of the second data cable segment is connected to one end of the third data cable segment, and the other end of the third data cable segment is connected to the second pixel circuit; the second data cable segment extends along the first direction, and the second data cable segment included in the data cable arranged in the same layer as the first gate metal layer, the second data cable segment included in the data cable arranged in the same layer as the second gate metal layer, and the second data cable segment included in the data cable arranged in the same layer as the first source drain metal layer do not overlap each other; The display panel according to claim 13.

15. 15. The display panel of claim 7, wherein in the same column of the second pixel circuits, a data cable connected to the second pixel circuits arranged in the first sub-display region is different from a data cable connected to the second pixel circuits arranged in the second sub-display region.

16. 16. The display panel of claim 1, wherein a width of any one of the plurality of first pixel circuits and the plurality of second pixel circuits is smaller than a width of any one of the first light-emitting elements.

17. The display panel according to claim 1 , wherein the conductive lines are transparent conductive lines.

18. an integrated circuit; and a display panel; The display panel has a first display region and a second display region, the first display region including: a base substrate at least partially surrounding the second display region; a plurality of first pixel circuits, a plurality of second pixel circuits, and a plurality of first light-emitting elements arranged at intervals between the plurality of first pixel circuits, which are arranged in the first display region; a plurality of second light-emitting elements arranged in the second display region; and at least one column of dummy second pixel circuits, the plurality of first pixel circuits including a plurality of columns of first pixel circuits extending along a first direction, the at least one column of dummy second pixel circuits being arranged in a target sub-display region close to the second display region, and the at least one column of dummy second pixel circuits being arranged between two adjacent columns of first pixel circuits, the first display region including a first sub-display region, and the first sub-display region including two symmetrical target sub-display regions; At least one first pixel circuit of the plurality of first pixel circuits is connected to at least one first light-emitting element of the plurality of first light-emitting elements, an orthogonal projection of the at least one first pixel circuit on the base substrate at least partially overlaps an orthogonal projection of the at least one first light-emitting element on the base substrate, and at least one second pixel circuit of the plurality of second pixel circuits is connected to at least one second light-emitting element of the plurality of second light-emitting elements by a conductive line. the integrated circuit is connected to a first pixel circuit and a second pixel circuit in the display panel and is used to drive the first pixel circuit and the second pixel circuit to operate; A display device comprising:

19. The display device of claim 18 , further comprising a light-sensitive sensor, the light-sensitive sensor being disposed within a second display area of ​​the display panel.

20. The display device according to claim 19 , wherein the second display region is rectangular, and an area of ​​the orthogonal projection of the photosensitive sensor onto the base substrate is equal to or smaller than an area of ​​an inscribed circle of the second display region.

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