Exposure device and image formation device
Patent Information
- Application Number
- JP2023127999
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-04
- Publication Date
- 2025-02-17
AI Technical Summary
【0008】 本発明によれば、ロッドレンズアレイに対する発光素子配列の配置を最適化して露光装置の光量むらを抑制することができる。
Smart Images

Figure 2025023666000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an exposure device and an image forming apparatus. [Background technology]
[0002] In an electrophotographic image forming apparatus, an electrostatic latent image is formed on a photoconductor by exposing the photoconductor to light as it is rotated, and the electrostatic latent image is developed with toner to form an image. In particular, a solid-state exposure type exposure device that uses a rod lens array to focus light from an array of light-emitting elements on the surface of a photoconductor is attracting attention because it is easier to reduce the size, noise level, and cost compared to a laser scanning type exposure device.
[0003] Patent Document 1 discloses an example of a solid-state exposure type exposure device. In the exposure device of Patent Document 1, a plurality of light-emitting chips, each having an array of light-emitting diodes (LEDs), are arranged in a staggered pattern parallel to the axial direction of a photoconductor to eliminate gaps between the light-emitting chips. Patent Document 1 proposes suppressing image unevenness (uneven light amount) caused by differences in light amount between the light-emitting chips by correcting the light amount based on the reading result of a test chart. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2018-1679 A Summary of the Invention [Problem to be solved by the invention]
[0005] However, the cause of the unevenness in the amount of light is not only the difference in the amount of light between the light-emitting chips. For example, the light transmittance of a rod lens array depends on the position from which the light is incident, and is not necessarily spatially uniform. Therefore, the degree of unevenness in the amount of light depends on where the light-emitting element array is arranged relative to the rod lens array, but there has been no proposal to optimize the arrangement of the light-emitting element array from the viewpoint of the light transmittance of the rod lens array.
[0006] The present invention aims to suppress unevenness in the amount of light from an exposure device by optimizing the arrangement of the light emitting element array relative to the rod lens array. [Means for solving the problem]
[0007] According to one aspect, an exposure device includes a printed circuit board on which a plurality of light-emitting chips, each having an array of light-emitting elements, are arranged in a staggered pattern along a reference line parallel to an axial direction of a photosensitive body, and a rod lens array that focuses light from the plurality of light-emitting chips on a surface of the photosensitive body, the rod lens array being composed of two rows of lenses arranged densely, the reference line being located on the printed circuit board at the center between a center line of a first lens row and a center line of a second lens row of the rod lens array, the ratio of the width of the light-emitting element array in the circumferential direction of the photosensitive body to a lens diameter of the rod lens array being approximately 0.28, and the distance between the reference line and each light-emitting element array being within a range of 0.56 to 0.84 times the lens diameter. An exposure device is provided. An image forming apparatus including the exposure device and the photoreceptor is also provided. Effect of the Invention
[0008] According to the present invention, the arrangement of the light emitting element array relative to the rod lens array can be optimized to suppress unevenness in the amount of light from the exposure device. [Brief description of the drawings]
[0009] [Figure 1] 1 is a diagram showing a schematic configuration of an image forming apparatus according to an embodiment; [Diagram 2] FIG. 2 is an explanatory diagram of a configuration of a photoconductor and an exposure head according to the embodiment. [Diagram 3] FIG. 4 is an explanatory diagram of the configuration of a printed circuit board of an exposure head according to an embodiment. [Figure 4] FIG. 1 is a plan view showing a schematic configuration of a light-emitting chip according to an embodiment. [Diagram 5] FIG. 1 is a cross-sectional view showing an example of the configuration of a light-emitting device according to an embodiment. [Figure 6] FIG. 4 is a circuit diagram showing a control configuration of an exposure apparatus according to an embodiment. [Figure 7] 6 is a signal chart related to access to a register of a light emitting chip according to an embodiment; [Figure 8] 11 is a signal chart related to the transmission of image data to a light-emitting chip according to an embodiment; [Figure 9] FIG. 2 is a functional block diagram showing a detailed circuit configuration of the light-emitting chip according to an embodiment. [Figure 10] FIG. 13 is an explanatory diagram of multiple exposure using light-emitting elements arranged in a stepped pattern. [Figure 11] 5 is an explanatory diagram of the positional relationship between a rod lens array and a light emitting element arrangement. FIG. [Figure 12] 11 is a graph showing the light transmittance distribution of a rod lens array measured at two different positions in a direction perpendicular to a reference line. [Figure 13] 11 is a graph showing the amplitude of the light amount measured under certain conditions according to the distance between a reference line and a light-emitting element array. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] Hereinafter, the embodiments will be described in detail with reference to the attached drawings. Note that the following embodiments do not limit the invention according to the claims. Although the embodiments describe a number of features, not all of these features are essential to the invention, and the features may be combined in any manner. Furthermore, in the attached drawings, the same reference numbers are used for the same or similar configurations, and duplicated descriptions are omitted.
[0011] <1. Schematic configuration of image forming apparatus> 1 shows an example of a schematic configuration of an image forming apparatus 1 according to an embodiment. The image forming apparatus 1 includes a reading unit 100, an image creating unit 103, a fixing unit 104, and a conveying unit 105. The reading unit 100 optically reads an original placed on a platen and generates read image data. The image creating unit 103 forms an image on a sheet based on the read image data generated by the reading unit 100, or based on print image data received from an external device via a network, for example.
[0012] The image forming unit 103 includes image forming units 101a, 101b, 101c, and 101d. The image forming units 101a, 101b, 101c, and 101d form black, yellow, magenta, and cyan toner images, respectively. The image forming units 101a, 101b, 101c, and 101d have the same configuration, and are collectively referred to as the image forming unit 101 below. The photoconductor 102 of the image forming unit 101 is rotated clockwise in the figure during image formation. The charger 107 charges the photoconductor 102. The exposure head 106 exposes the photoconductor 102 to light to form an electrostatic latent image on the surface of the photoconductor 102. The developer 108 develops the electrostatic latent image on the photoconductor 102 with toner to form a toner image. The toner image formed on the surface of the photoconductor 102 is transferred to a sheet transported on a transfer belt 111. By transferring the toner images of the four photoconductors 102 onto a sheet in an overlapping manner, a color image containing four color components, namely black, yellow, magenta, and cyan, can be formed.
[0013] The conveying unit 105 controls the feeding and conveying of the sheet. Specifically, the conveying unit 105 feeds the sheet from a designated unit among the internal storage units 109a and 109b, the external storage unit 109c, and the manual feed unit 109d to the conveying path of the image forming apparatus 1. The fed sheet is conveyed to the registration roller 110. The registration roller 110 conveys the sheet onto the transfer belt 111 at an appropriate timing so that the toner image of each photoconductor 102 is transferred onto the sheet. As described above, the toner image is transferred onto the sheet while the sheet is being conveyed on the transfer belt 111. The fixing unit 104 fixes the toner image onto the sheet by heating and pressing the sheet onto which the toner image has been transferred. After the toner image is fixed, the sheet is discharged to the outside of the image forming apparatus 1 by the discharge roller 112. An optical sensor 113 is disposed at a position opposite the transfer belt 111. Optical sensor 113 optically reads the test chart formed on transfer belt 111 by image forming unit 101. When an error in the image formation range is detected for the test chart read by optical sensor 113, image controller 700 (described later) performs control to compensate for the error when a subsequent job is executed.
[0014] Although an example in which a toner image is directly transferred from each photoconductor 102 to a sheet on the transfer belt 111 has been described here, the toner image may be indirectly transferred from each photoconductor 102 to a sheet via an intermediate transfer body. Also, although an example in which a color image is formed using toners of multiple colors has been described here, the technology according to the present disclosure is also applicable to an image forming apparatus that forms a monochrome image using toners of a single color.
[0015] <2. Exposure head configuration example> 2(A) and 2(B) show the photoconductor 102 and the exposure head 106. The exposure head 106 has a light emitting element array 201, a printed circuit board 202 on which the light emitting element array 201 is mounted, a rod lens array 203, and a housing 204 that supports the printed circuit board 202 and the rod lens array 203. The photoconductor 102 has a cylindrical shape. The exposure head 106 is disposed such that its longitudinal direction is parallel to the axial direction D1 of the photoconductor 102, and the surface on which the rod lens array 203 is attached faces the surface of the photoconductor 102. While the photoconductor 102 rotates in the circumferential direction D2, the light emitting element array 201 of the exposure head 106 emits light, and the rod lens array 203 forms an image of the light on the surface of the photoconductor 102.
[0016] Figures 3(A) and 3(B) show an example of the configuration of the printed circuit board 202. Note that Figure 3(A) shows the surface on which the connector 305 is mounted, and Figure 3(B) shows the surface on which the light emitting element array 201 is mounted (the surface opposite to the surface on which the connector 305 is mounted).
[0017] In this embodiment, the light-emitting element array 201 has a plurality of light-emitting elements arranged two-dimensionally. The light-emitting element array 201 includes, as a whole, N columns of light-emitting elements in the axial direction D1 of the photoconductor and M rows in the circumferential direction D2, where M and N are integers of 2 or more. In the example of FIG. 3B, the light-emitting element array 201 is divided into 20 light-emitting chips 400-1 to 400-20, each of which includes a subset of the entire plurality of light-emitting elements. The light-emitting chips 400-1 to 400-20 are arranged in a staggered pattern along a reference line 310 parallel to the axial direction D1. The light-emitting chips 400-1 to 400-20 are also collectively referred to as light-emitting chips 400. As shown in FIG. 3B, the range occupied by all the light-emitting elements of the 20 light-emitting chips in the axial direction D1 is wider than the range occupied by the maximum width W0 of the input image data. Therefore, some light-emitting elements located at both ends in the axial direction D1 may not be used to expose the photoconductor 102 unless an error in the image formation range is detected. Each light-emitting chip 400 on the printed circuit board 202 is connected to the image controller 700 (FIG. 6) via a connector 305. For convenience of explanation, the side with the smaller branch number of the light-emitting chips 400-1 to 400-20 arranged along the axial direction D1 may be referred to as the "left" and the side with the larger branch number as the "right". For example, the light-emitting chip 400-1 is the leftmost light-emitting chip 400, and the light-emitting chip 400-20 is the rightmost light-emitting chip.
[0018] 4 is a plan view showing a schematic configuration of one light emitting chip 400. The light emitting elements 602 of each light emitting chip 400 are formed on a light emitting substrate 402, which is, for example, a silicon substrate. A circuit section 406 for driving the light emitting elements 602 is provided on the light emitting substrate 402. Signal lines for communicating with the image controller 700, power lines for connecting to a power source, and ground lines for connecting to a ground are connected to the pads 408-1 to 408-9. The signal lines, power lines, and ground lines may be wires made of, for example, gold.
[0019] The number J (J=N / 20) of the light-emitting elements 602 arranged in each row of one light-emitting chip 400 may be equal to, for example, 748 (J=748). Meanwhile, the number M of the light-emitting elements 602 arranged in each column of one light-emitting chip 400 may be equal to, for example, 4 (M=4). That is, in an exemplary embodiment, each light-emitting chip 400 has a total of 2992 (=748×4) light-emitting elements 602, with 748 in the axial direction D1 and 4 in the circumferential direction D2. The interval between the center points of the light-emitting elements 602 adjacent to each other in the circumferential direction D2 may be, for example, about 21.16 μm, which corresponds to a resolution of 1200 dpi. The interval between the center points of the light-emitting elements 602 adjacent to each other in the axial direction D1 may also be about 21.16 μm, in which case the 748 light-emitting elements 602 occupy a length of about 15.8 mm in the axial direction D1. 4 shows an example in which the light emitting elements 602 are completely arranged in a lattice pattern in each light emitting chip 400 for convenience of explanation, but the M (M=4) light emitting elements 602 in each row may be arranged in a stepped or partially stepped pattern. The stepped arrangement of the light emitting elements 602 will be described in more detail later.
[0020] FIG. 5 is a cross-sectional view showing an example of the configuration of a light-emitting element 602. A plurality of lower electrodes 504 are formed on the light-emitting substrate 402, which is a silicon substrate. A gap of length d is provided between two adjacent lower electrodes 504. A light-emitting layer 506 is provided on the lower electrode 504, and an upper electrode 508 is provided on the light-emitting layer 506. The upper electrode 508 is one common electrode for the plurality of lower electrodes 504. When a voltage is applied between the lower electrode 504 and the upper electrode 508, a current flows from the lower electrode 504 to the upper electrode 508, causing the light-emitting layer 506 to emit light. Therefore, one lower electrode 504 and a partial region of the light-emitting layer 506 and the upper electrode 508 corresponding to the lower electrode 504 constitute one light-emitting element 602. That is, in this embodiment, the light-emitting substrate 402 includes a plurality of light-emitting elements 602.
[0021] An organic EL film is used for the light-emitting layer 506. That is, the light-emitting element 602 is an organic EL element. The upper electrode 508 is composed of a transparent electrode such as indium tin oxide (ITO) so as to transmit the emission wavelength of the light-emitting layer 506. Note that in this embodiment, the entire upper electrode 508 transmits the emission wavelength of the light-emitting layer 506, but it is not necessary for the entire upper electrode 508 to transmit the emission wavelength. Specifically, it is sufficient that a partial region through which light from each light-emitting element 602 passes transmits the emission wavelength.
[0022] In FIG. 5, one continuous light-emitting layer 506 is formed, but a plurality of light-emitting layers 506 each having a width equivalent to the width W of the lower electrode 504 may be formed on the lower electrode 504. In FIG. 5, the upper electrode 508 is formed as one common electrode for the plurality of lower electrodes 504, but a plurality of upper electrodes 508 each having a width equivalent to the width W of the lower electrode 504 may be formed corresponding to each of the lower electrodes 504. In addition, the first plurality of lower electrodes 504 of the lower electrodes 504 of each light-emitting chip 400 may be covered by the first light-emitting layer 506, and the second plurality of lower electrodes 504 may be covered by the second light-emitting layer 506. Similarly, the first upper electrode 508 may be commonly formed corresponding to the first plurality of lower electrodes 504 of the lower electrodes 504 of each light-emitting chip 400, and the second upper electrode 508 may be commonly formed corresponding to the second plurality of lower electrodes 504. In such a configuration, one lower electrode 504 and the region of the light emitting layer 506 and upper electrode 508 corresponding to the lower electrode 504 constitute one light emitting element 602 .
[0023] FIG. 6 is a circuit diagram related to a control configuration for controlling the light-emitting chip 400. The image controller 700 is a control circuit that communicates with the printed circuit board 202 via a plurality of signal lines (wires). The image controller 700 has a CPU 701, a clock generating unit 702, an image data processing unit 703, a register access unit 704, and a light-emitting control unit 705. The light-emitting control unit 705 terminates the signal line between the image controller 700 and the printed circuit board 202. The n-th light-emitting chip 400-n (n is an integer from 1 to 20) on the printed circuit board 202 is connected to the light-emitting control unit 705 via a signal line DATAn and a signal line WRITEn. The signal line DATAn is used to transmit image data from the image controller 700 to the light-emitting chip 400-n. The signal line WRITEn is used for the image controller 700 to write control data to the register of the light-emitting chip 400-n.
[0024] One signal line CLK, one signal line SYNC, and one signal line EN are further provided between the light-emitting control unit 705 and each light-emitting chip 400. The signal line CLK is used to transmit a clock signal for transmitting data on the signal lines DATAn and WRITEn. The light-emitting control unit 705 outputs a clock signal generated based on a reference clock signal from the clock generating unit 702 to the signal line CLK. The signals transmitted to the signal lines SYNC and EN will be described later.
[0025] The CPU 701 controls the entire image forming apparatus 1. The image data processing unit 703 performs image processing on image data received from the reading unit 100 or an external device to generate binary bitmap image data for controlling the on / off of the light emission of the light emitting element 602 of the light emitting chip 400 on the printed circuit board 202. The image processing here may include, for example, raster conversion, tone correction, color conversion, and halftone processing. The image data processing unit 703 transmits the generated image data to the light emission control unit 705 as input image data. The register access unit 704 receives control data to be written to the register in each light emitting chip 400 from the CPU 701 and transmits it to the light emission control unit 705.
[0026] FIG. 7 shows the transition of the signal level of each signal line when control data is written to the register of the light-emitting chip 400. An enable signal that is at high level during communication and indicates that communication is in progress is output to the signal line EN. The light-emitting control unit 705 transmits a start bit to the signal line WRITEn in synchronization with the rising edge of the enable signal. Next, the light-emitting control unit 705 transmits a write identification bit indicating a write operation, and then transmits the address of the register to which the control data is to be written (4 bits in this example) and the control data (8 bits in this example). When writing to the register, the light-emitting control unit 705 sets the frequency of the clock signal transmitted to the signal line CLK to, for example, 3 MHz.
[0027] FIG. 8 shows the transition of the signal level of each signal line when image data is transmitted to each light-emitting chip 400. A periodic line synchronization signal indicating the exposure timing of each line on the photoconductor 102 is output to the signal line SYNC. If the circumferential speed of the photoconductor 102 is 200 mm / s and the resolution in the circumferential direction is 1200 dpi (approximately 21.16 μm), the line synchronization signal is output at a period of approximately 105.8 μs. The light-emitting control unit 705 transmits image data to the signal lines DATA1 to DATA20 in synchronization with the rising edge of the line synchronization signal. In this embodiment, since each light-emitting chip 400 has 2992 light-emitting elements 602, it is necessary to transmit image data indicating the light emission / non-light emission of each of the total 2992 light-emitting elements 602 to each light-emitting chip 400 within a period of approximately 105.8 μs. Therefore, in this example, as shown in FIG. 8, when transmitting image data, the light-emitting control unit 705 sets the frequency of the clock signal transmitted to the signal line CLK to 30 MHz.
[0028] FIG. 9 is a functional block diagram showing a detailed circuit configuration of one light-emitting chip 400 (n-th light-emitting chip 400-n). The light-emitting chip 400 has nine pads 408-1 to 408-9, a circuit unit 406, and a light-emitting element array 410. The pads 408-1 and 408-2 are connected to a power supply voltage VCC by a power supply line. Power is supplied from this power supply voltage VCC to each circuit of the circuit unit 406 of the light-emitting chip 400. The pads 408-3 and 408-4 are connected to the ground by a ground line. Each circuit of the circuit unit 406 and the upper electrode 508 are connected to the ground via the pads 408-3 and 408-4. The signal line CLK is connected to the transfer unit 1003, the register 1102, and the latch units 1004-001 to 1004-748 via the pad 408-5. The signal lines SYNC and DATAn are connected to the transfer unit 1003 via pads 408-6 and 408-7. The signal lines EN and WRITEn are connected to a register 1102 via pads 408-8 and 408-9. The register 1102 stores control data indicating the magnitude of the drive current to be supplied to each light-emitting element 602, for example.
[0029] The transfer unit 1003 receives input image data including a series of pixel values each indicating the emission or non-emission of one light emitting element 602 from a signal line DATAn in synchronization with a clock signal from a signal line CLK, starting from a line synchronization signal from a signal line SYNC. The transfer unit 1003 performs serial-to-parallel conversion on the series of pixel values serially received from the signal line DATAn in units of M (for example, M=4) pixel values. For example, the transfer unit 1003 has four cascaded D flip-flops, and parallelizes pixel values DATA-1, DATA-2, DATA-3, and DATA-4 input over four clocks, and outputs the parallelized pixel values to the latch units 1004-001 to 1004-748. The transfer unit 1003 further has four D flip-flops for delaying the line synchronization signal, and outputs a first latch signal to the latch unit 1004-001 via a signal line LAT1 at a timing delayed by four clocks from the input of the line synchronization signal.
[0030] The kth latch unit 1004-k (k is an integer from 1 to 748) holds the four pixel values DATA-1, DATA-2, DATA-3, and DATA-4 input from the transfer unit 1003 at the same time as the kth latch signal is input, by using a latch circuit. In addition, except for the last-stage latch unit 1004-748, the kth latch unit 1004-k delays the kth latch signal by four clocks and outputs the (k+1)th latch signal to the latch unit 1004-(k+1) via the signal line LAT(k+1). Then, the kth latch unit 1004-k continues to output a drive signal based on the four pixel values held by the latch circuit to the current drive unit 1104 during the signal period of the kth latch signal. For example, there is a delay of four clocks between the timing when the first latch signal is input to the latch unit 1004-1 and the timing when the second latch signal is input to the latch unit 1004-2. Therefore, the latch unit 1004-1 outputs drive signals based on the 1st, 2nd, 3rd and 4th pixel values to the current driver 1104, whereas the latch unit 1004-2 outputs drive signals based on the 5th, 6th, 7th and 8th pixel values to the current driver 1104. Generally speaking, the latch unit 1004-k outputs drive signals based on the (4k-3), (4k-2), (4k-1) and (4k)th pixel values to the current driver 1104. Therefore, in the embodiment shown in FIG. 9, 748 latch units 1004-001 to 1004-748 output 2992 drive signals for controlling the driving of 2992 (=748×4) light emitting elements 602 in approximately parallel to the current driver 1104. Each drive signal is a binary signal indicating a high level or a low level.
[0031] The current driver 1104 has 2992 light emission driver circuits respectively corresponding to the 2992 light emitting elements 602 of the light emitting element array 410. Each light emission driver circuit passes a drive current of a magnitude indicated by the control data in the register 1102 to the light emitting layer 506 of the corresponding light emitting element 602 while the corresponding drive signal indicates a high level indicating that light emission is on. This causes the light emitting element 602 to emit light with a targeted amount of light. Note that the control data may indicate one individual current value for each light emitting element 602, may indicate one current value for each group of the light emitting elements 602, or may indicate one current value common to all the light emitting elements 602.
[0032] <3. Control of multiple exposure> 4 shows an example in which the light-emitting elements 602 in each light-emitting chip 400 are completely arranged in a lattice pattern, but the M light-emitting elements 602 in each row may be arranged in a stepped pattern at a constant pitch. FIG. 10 is an explanatory diagram of multiple exposure using light-emitting elements arranged in a stepped pattern. Here, an example of the arrangement of light-emitting elements in the light-emitting chip 400-1 when M=4 is partially shown. R in the figure j_m (j={0,1,...,J-1}, m={0,1,2,3}) represents the light emitting element 602 in the j-th column from the left in the axial direction and in the m-th row from the top in the circumferential direction. C As described above, the axial spacing between two adjacent light-emitting elements among the M light-emitting elements in each row, i.e., the axial pitch P A may be approximately 5 μm, which corresponds to a resolution of 4800 dpi.
[0033] By arranging the four light-emitting elements in each row in a stepped manner in this manner, any two adjacent light-emitting elements among the four light-emitting elements occupy areas that partially overlap in the axial direction. Then, the four light-emitting elements in the row corresponding to each pixel position of the input image data sequentially emit light while the photoconductor 102 is rotating, forming spots corresponding to each pixel position on the surface of the photoconductor 102. In the example of Figure 10, when the pixel value at the left end of the i-th line of the input image data indicates that light is on, the light-emitting element R0_0 , R 0_1 , R 0_2 , R 0_3 is a line L on the surface of the photoconductor 102. i As a result, the line L i In the same manner, when the jth pixel value from the left of the i-th line of the input image data indicates that light is emitted, the light-emitting element R j_0 , R j_1 , R j_2 , R j_3 is a line L on the surface of the photoconductor 102. i As a result, the line L i The jth spot area from the left of is multiplexed and the corresponding spot SP j is formed.
[0034] 10, just as two adjacent rows of light-emitting elements occupy a partially overlapping area, two rows of light-emitting elements located at the boundary between two adjacent light-emitting chips 400 also occupy a partially overlapping area in the axial direction. That is, of the two adjacent light-emitting chips 400, the light-emitting elements in the rightmost row of the left light-emitting chip 400 and the light-emitting elements in the leftmost row of the right light-emitting chip 400 also occupy a partially overlapping area in the axial direction. The axial pitch P of the light-emitting elements across all 20 light-emitting chips 400 A is constant at about 5 μm. By sequentially emitting light at appropriate times from the four light-emitting elements in each row of these light-emitting chips 400, a smooth line of an electrostatic latent image can be formed on the surface of the photoconductor 102, which is made up of a series of spots that are partially overlapping each other with a constant spot spacing. As a result of such lines being continuously formed in the circumferential direction, a two-dimensional electrostatic latent image is created.
[0035] <4. Arrangement of light emitting element arrangement relative to rod lens array> Generally, when there is spatial unevenness in the amount of light from an exposure head, deterioration of image quality appears in the form of uneven density in the printed image. In particular, unevenness in the axial direction (also called the main scanning direction) of the photoconductor leads to deterioration of image quality that is easily visually perceived as streaks in the image. One of the causes of unevenness in the amount of light is that the light transmittance of the rod lens array is not spatially uniform. A rod lens array typically has a structure in which a large number of cylindrical rod lenses are densely arranged in a plane perpendicular to the optical axis. Therefore, in the plane perpendicular to the optical axis, the light transmittance of the rod lens array exhibits a characteristic that varies periodically rather than spatially uniformly depending on the position from which the light is incident, and the period is related to the lens diameter. Therefore, the degree of unevenness in the amount of light is determined by where the light emitting element array is arranged relative to the rod lens array.
[0036] FIG. 11 is an explanatory diagram of the positional relationship between the rod lens array 203 and the light emitting element array 410 of the light emitting chip 400. In this embodiment, the rod lens array 203 is composed of multiple rows of lenses arranged densely to improve the efficiency of taking in light to the imaging surface. In particular, by setting the number of lens rows to two, it is possible to suppress the variation in assembly during manufacturing. The lenses 203a arranged in the axial direction D1 constitute a first lens row, and the lenses 203b arranged in the axial direction D1 constitute a second lens row. On the printed circuit board 202, a reference line 310 is located at the center between the center line of the first lens row and the center line of the second lens row (when viewed from a direction perpendicular to the board). This reference line 310 becomes the reference for the staggered arrangement of the multiple light emitting chips 400. The lens diameter L is common to all of the lenses 203a and 203b.
[0037] The length in the axial direction D1 of the light emitting element array 410 of the light emitting chip 400 is sufficiently large with respect to the lens diameter L. Therefore, no matter where the light emitting element array 410 is disposed in the axial direction D1, a periodic change in the light transmittance of the rod lens array 203 appears over the length of the light emitting element array 410 in the axial direction D1. On the other hand, the width (length in the circumferential direction D2) W Cis typically smaller than the lens diameter L. For example, as described above, the width W of the light emitting element array 410 in which four light emitting elements 602 are arranged at a pitch of about 21.16 μm in the circumferential direction D2 is C The lens diameter L is about 300 μm, while the lens length is about 84 μm. In this case, the periodic change in the light transmittance of the rod lens array 203 varies depending on where in the circumferential direction D2 the light emitting element array 410 is disposed.
[0038] FIG. 12 shows the light transmittance distribution of the rod lens array 203 measured at two different positions in a direction perpendicular to the reference line 310 (i.e., the circumferential direction D2). The horizontal axis of the graph in FIG. 12 represents the position X [mm] in the axial direction D1 within one period of the lens shape. The vertical axis represents the ratio of the transmitted light amount to the maximum light amount. A graph 1001 plotted with triangular marks represents the light transmittance distribution in the axial direction D1 measured at a position 212 μm away from the reference line 310. The graph 1001 shows the phase change of the first pattern in which the light transmittance is maximum at X=0.15 mm. A graph 1002 plotted with circular marks represents the light transmittance distribution in the axial direction D1 measured at a position 296 μm away from the reference line 310. The graph 1002 shows the phase change of the second pattern in which the light transmittance is maximum at X=0 mm. At X=0.15 mm where the light transmittance is maximum in graph 1001, graph 1002 shows a light transmittance of approximately 0.93. At X=0 mm where the light transmittance is maximum in graph 1002, graph 1001 shows a light transmittance of 0.92. That is, it can be seen that the phase change in graph 1002 is roughly inverted from the phase change in graph 1001. If the light emitting element array 410 is arranged to include two positions in the circumferential direction D2 where the phase changes of such light transmittance distributions are inverted from each other, the phase changes are at least partially cancelled out, and as a result, unevenness in the amount of light in the axial direction D1 can be suppressed.
[0039] Here, as shown in FIG. 11, the distance between the reference line 310 and the light emitting element array 410 of each light emitting chip 400 is defined as D N If the reference line 310 is set as the origin, the light emitting element array 410 is aligned along the circumferential direction D2.N From D N +W C If this range includes two positions where the phase change of the light transmittance distribution is roughly inverted, the effect of suppressing unevenness in the amount of light due to the phase changes canceling each other out can be obtained. Such two positions are 212 μm and 296 μm as shown in FIG. 12 as an example, but are not limited to this example. FIG. 13 shows a lens with a lens diameter L of about 300 μm and a width W C The distance D between the reference line 310 and the light-emitting element array 410 is measured under the condition of about 84 μm. N The horizontal axis of the graph 1101 in FIG. N The vertical axis represents the amplitude of the light amount, that is, the ratio of the difference between the maximum light amount and the minimum light amount to the maximum light amount. The smaller this amplitude, the smaller the unevenness of the light amount. In graph 1101, D N In the range from 169 μm to 253 μm, the amplitude of the light intensity is suppressed to a low level of about 0.04 (4%) to 0.06 (6%). N When the distance D is out of this range, the amplitude of the light intensity becomes significantly higher. N This suggests that when the thickness falls within the range defined by a lower limit of 169 μm and an upper limit of 253 μm, the effect of suppressing unevenness in the amount of light due to the cancellation of phase changes in the light transmittance distribution can be obtained.
[0040] The phase change pattern of the light transmittance distribution depends solely on the geometric shape of the rod lens array 203. The degree of cancellation of the phase changes depends on the spacing D N and the width W of the light emitting element array 410 C It depends on the lens diameter L and the width W C If the ratio is constant, the interval D N Lower limit D N_MIN and upper limit D N_MAX can be scaled to fit the lens diameter L as follows: Lens diameter L vs. width W C If the ratio is about 0.28 (=84 / 300), -lower limit D N_MIN = (169 / 300) L ≒ 0.56 L -Upper limit D N_MAX = (253 / 300) L ≒ 0.84 L That is, W C When / L≈0.28, the condition for obtaining the effect of suppressing unevenness in the amount of light is the distance D between the reference line 310 and each light-emitting element array 410. N is in the range of 0.56 to 0.84 times the lens diameter L (0.56L≦D N ≦0.84L).
[0041] As an example of a condition different from the above embodiment, the width W C Assume a case where a light-emitting element array with a diameter of 168 μm and a rod lens array with a lens diameter L of 600 μm are used. In this case, the distance D between the reference line and the light-emitting element array is N [μm] 336≦D N When the value is in the range of ≦504, the unevenness in the amount of light can be significantly suppressed and an image with good image quality can be formed.
[0042] In addition, the interval D N represents the distance between the reference line 310 and the proximal side of the light-emitting element array 410 (the closer side of the two sides parallel to the reference line 310). On the other hand, the distance D F (=D N +W C ) we can define similar ranges as follows: Lens diameter L vs. width W C If the ratio is about 0.28, -lower limit D F_MIN = (253 / 300) L ≒ 0.84 L -Upper limit D F_MAX = (337 / 300) L ≒ 1.12 L That is, W C When / L≈0.28, the condition for obtaining the effect of suppressing unevenness in the amount of light is that the distance D between the reference line 310 and the distal end of each light-emitting element array 410 is F is in the range of 0.84 to 1.12 times the lens diameter L (0.84L≦D F ≦1.12L).
[0043] In this specification, the expression "about" attached to a numerical value means that an error inevitably occurring during the manufacturing of a product and a slight difference in dimensions that does not impair the intended technical effect are allowed. For example, when the lens diameter L of the rod lens array is on the order of several hundred micrometers, the width W of the light emitting element array is approximately 100 micrometers. C The distance D between the reference line and the light-emitting element array does not have to be exactly 0.28L, and may have an error of, for example, about 1 to several micrometers. N The same applies to the lower and upper limits of the range. A person skilled in the art should understand that even if there are such errors or slight differences, the effect of the technology according to the present disclosure can be obtained, and the use of the expression "about" in the claims does not necessarily make the scope of the invention unclear.
[0044] <5. Summary> Various embodiments of the technology according to the present disclosure have been described in detail above with reference to FIGS. 1 to 13. In the above-described embodiment, the exposure device employs a rod lens array consisting of two rows of densely arranged lenses, and a printed circuit board on which a plurality of light-emitting chips, each having a light-emitting element array, are arranged in a staggered pattern along a reference line parallel to the axial direction of the photoconductor. The reference line is located at the center between the center line of the first lens row and the center line of the second lens row on the printed circuit board. The ratio of the width of the light-emitting element array in the circumferential direction of the photoconductor to the lens diameter of the rod lens array is about 0.28. By arranging the light-emitting chips on the printed circuit board so that the interval between the reference line and each light-emitting element array falls within the range of 0.56 to 0.84 times the lens diameter, it is possible to effectively suppress unevenness in the amount of light in the axial direction of the photoconductor and form a high-quality image.
[0045] In the above-described embodiment, the light transmittance distribution of the rod lens array measured at a first position that is a first distance away from the reference line indicates a phase change of the first pattern, and the light transmittance distribution measured at a second position that is a second distance away from the reference line indicates a phase change of the second pattern. The width of the light emitting element array in the circumferential direction of the photoconductor includes both the first and second positions, so that the phase changes of the first and second patterns at least partially cancel each other out. As a result, the amplitude of the light amount is reduced, and the unevenness of the light amount is suppressed. As long as such cancellation of the phase changes occurs, other design values may be adopted for the width of the light emitting element array, the lens diameter, and the interval between the reference line and each light emitting element array.
[0046] In this specification, specific numerical values are used for explanation, but these specific numerical values are merely examples, and the present invention is not limited to the specific numerical values used in the embodiments. Specifically, the number of light-emitting chips provided on one printed circuit board is not limited to 20, and may be any number. In addition, the size of the light-emitting element array of each light-emitting chip 400 is not limited to 4 rows and 748 columns, and may be any other size. In addition, the circumferential pitch and axial pitch of the light-emitting elements are not limited to about 21.16 μm and about 5 μm, and may be any other value.
[0047] The invention is not limited to the above-described embodiments, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]
[0048] 1: image forming apparatus, 102: photoconductor, 106: exposure head, 202: printed circuit board, 203: rod lens array, 310: reference line, 400-1 to 400-20: light emitting chips, 410: light emitting element array, 602: light emitting element (organic EL element), D1: axial direction, D2: circumferential direction, D N : distance between reference line and light-emitting element array, L: lens diameter, W C :Width of the light emitting element array
Claims
1. An exposure apparatus comprising: a printed circuit board on which a plurality of light emitting chips, each having an array of light emitting elements, are arranged in a staggered pattern along a reference line parallel to an axial direction of the photoconductor; a rod lens array that focuses light from the plurality of light emitting chips onto a surface of the photoconductor; Equipped with The rod lens array is made up of two rows of closely packed lenses, the reference line is located on the printed circuit board at a midpoint between a center line of a first lens row and a center line of a second lens row of the rod lens array, a ratio of a width of the light emitting element array in a circumferential direction of the photoconductor to a lens diameter of the rod lens array is about 0.28; The distance between the reference line and each light emitting element array is in the range of 0.56 to 0.84 times the lens diameter. Exposure equipment.
2. a distribution of optical transmittance in the axial direction of the rod lens array measured at a first position a first distance away from the reference line indicates a phase change of a first pattern; a distribution of optical transmittance in the axial direction of the rod lens array measured at a second position a second distance away from the reference line indicates a phase change of a second pattern; The width of the light-emitting element array in the circumferential direction includes both the first position and the second position, such that a phase change of the first pattern and a phase change of the second pattern at least partially cancel each other out.
2. The exposure apparatus according to claim 1.
3. the lens diameter of the rod lens array is about 300 micrometers; The width of the light emitting element array in the circumferential direction is about 84 micrometers.
2. The exposure apparatus according to claim 1.
4. 4. The exposure apparatus according to claim 3, wherein the light-emitting element array has four light-emitting elements in the circumferential direction, and the pitch of the light-emitting elements in the circumferential direction is approximately 21.16 micrometers.
5. 2. The exposure apparatus according to claim 1, wherein the light emitting element array is an array of organic EL (Electro Luminescence) elements.
6. An exposure apparatus according to any one of claims 1 to 5, The photoreceptor; An image forming apparatus comprising:
Citation Information
Patent Citations
Image formation apparatus
JP2018001679A