Quantum computing device and quantum computing method
Patent Information
- Application Number
- JP2023137580
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-25
- Publication Date
- 2025-03-07
AI Technical Summary
【0008】 小規模な量子計算機により大規模な量子計算タスクを効率的に模擬できる技術が提供される。
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Figure 2025031386000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a quantum computing device and a quantum computing method. [Background technology]
[0002] Quantum computers are a technology that performs calculations by utilizing the principle of superposition in quantum mechanics, and are expected to be able to quickly solve problems such as prime factorization and quantum chemical calculations, so their development is being actively pursued around the world. (Classical) bits, which are the elements that make up classical computers, have values of 0 or 1. On the other hand, qubits, which are the elements that make up quantum computers, can be in continuous superposition states of 0 and 1 in addition to 0 and 1.
[0003] In order to perform practical calculations using a quantum computer, it is necessary to build a quantum computer of a scale large enough to solve practical problems. However, due to the difficulty of controlling quantum bits, the number of quantum bits that can be integrated at present is limited. To solve this problem, various approaches have been proposed at various technology layers, and two representative approaches are known (Non-Patent Documents 1 and 2). [Prior art documents] [Non-patent literature]
[0004] [Non-Patent Document 1] Mitarai, K., & Fujii, K. (2021). Constructing a virtual two-qubit gate by sampling single-qubit operations. New Journal of Physics, 23(2), 023021. [Non-Patent Document 2] Enomoto, Y., Anai, K., Udagawa, K., & Takeda, S. (2022). Continuous-variable quantum approximate optimization on a programmable photonic quantum processor. arXiv preprint arXiv:2206.07214. Summary of the Invention [Problem to be solved by the invention]
[0005] However, despite the progress of these two approaches, a practical quantum computer has yet to be realized, and technological developments are currently being carried out to build computers capable of performing large-scale quantum computing tasks.
[0006] The present disclosure has been made in consideration of the above-mentioned points, and aims to provide a technique that can efficiently simulate large-scale quantum computing tasks using a small-scale quantum computer. [Means for solving the problem]
[0007] A quantum computing device according to one embodiment of the present disclosure is a quantum computing device equipped with a continuous quantum computer utilizing a quantum mode, and includes an input unit that inputs a description of a first quantum circuit expressing a quantum computing program utilizing the quantum mode and a list of controlled phase gates to be divided in the first quantum circuit, a division unit that divides the first quantum circuit into a plurality of second quantum circuits by dividing the controlled phase gates, and an execution unit that calculates a calculation result of the first quantum circuit by having the quantum computer execute the plurality of second quantum circuits. Effect of the Invention
[0008] A technique is provided that allows large-scale quantum computing tasks to be efficiently simulated using a small-scale quantum computer. [Brief description of the drawings]
[0009] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of a quantum computing device according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a diagram illustrating an example of a hardware configuration of a control device according to the present embodiment. [Diagram 3] FIG. 2 is a diagram illustrating an example of a functional configuration of a control device according to the present embodiment. [Figure 4] 1 is a flowchart illustrating an example of a quantum computing process according to the present embodiment. [Diagram 5] FIG. 1 illustrates an example of a quantum circuit. [Figure 6] FIG. 1 is a diagram illustrating an example of a divided quantum circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] Hereinafter, one embodiment of the present invention will be described.
[0011] <An approach to performing large-scale quantum computing tasks> Various approaches have been proposed to execute large-scale quantum computing tasks, and two representative approaches are known (Non-Patent Documents 1 and 2). One of them is a method that uses circuit cutting (Non-Patent Document 1). This method is a technique in which the execution of a large quantum computing program is decomposed into the execution of a group of multiple small quantum computing programs, and the small quantum computing is repeatedly executed to effectively solve a large-scale quantum computing problem.
[0012] The other is a method that uses the infinite-dimensional degrees of freedom of optical modes as a basic unit instead of quantum bits (Non-Patent Document 2). Optical modes are expected to be highly scalable as quantum computer devices due to their good transmission properties and the fact that they can be easily generated from light sources, etc. Such a method that uses the infinite-dimensional degrees of freedom of optical modes as a basic unit is called optical continuous quantum computing, because the state is characterized by continuous physical quantities. Note that optical modes refer to quantum modes that use light.
[0013] Despite the development of the above two representative approaches, a practical quantum computer has not yet been realized. For this reason, technological development is currently being carried out to build a computer capable of executing large-scale quantum computing tasks. In the following embodiment, a quantum computing device 10 is described that applies the circuit cutting technique, which has been conventionally constructed limited to systems with finite-dimensional degrees of freedom such as quantum bits, to a continuous quantum computer (optical quantum computer) that is expected to have high scalability at the device level. This makes it possible to ensure high scalability at the device level of the quantum computer, and to solve the problem that problems that can be solved by quantum computing remain small-scale (in other words, a large-scale quantum computing task can be efficiently simulated by a small-scale quantum computer).
[0014] Here, we first emphasize that it is not trivial to change the application of the circuit cutting technique from a system with finite-dimensional degrees of freedom to a system with infinite-dimensional degrees of freedom (i.e., a system with continuous quantities). This is for the following reason. In a system of quantum bits with finite-dimensional states, operators that represent transitions between states can be expressed as finite-dimensional matrices. Therefore, basic linear algebra operations such as expressing a matrix as a linear combination of base matrices, or finding the inverse or pseudo-inverse of a matrix, can be performed accurately, except for numerical errors, by using numerical calculations by a computer. Therefore, calculations for dividing a large program into smaller programs can be performed numerically.
[0015] On the other hand, operations in continuous quantum computing are expressed as infinite-dimensional operators, and therefore do not have expressions as matrixes represented by elements. Therefore, even if an infinite set of operators as bases can be defined, it is not self-evident that operators can be expanded and analytically handled by these. In addition, experimentally possible operations for optical modes are limited to a set of optically easy operations, and it is not self-evident that a program can be decomposed so that only optically easy operations occur. The method executed by the quantum computing device 10 according to this embodiment is particularly characterized by two points: transition to infinite-dimensional linear algebra, and presenting a method for solving problems caused by the fact that operations available with high accuracy are limited to experimentally easy operations.
[0016] <Configuration Example of Quantum Computing Device 10> An example of the configuration of a quantum computing device 10 according to this embodiment is shown in Fig. 1. As shown in Fig. 1, the quantum computing device 10 according to this embodiment includes a control device 100 and a quantum processor 200.
[0017] The control device 100 transmits a control signal to the quantum processor 200 and obtains a calculation result from the quantum processor 200. In this way, quantum calculation is performed. The control device 100 is realized by, for example, a classical computer or the like.
[0018] The quantum processor 200 is a continuous quantum computer realized in a physical system (i.e., a continuous system) capable of handling any real number. In the following, as an example, light is assumed as a quantum, and the quantum processor 200 is assumed to be an optical quantum computer. Note that the quantum processor 200 being an optical quantum computer is merely an example, and this embodiment can be similarly applied to any continuous quantum computer that utilizes a quantum mode.
[0019] Here, the purpose of the quantum computing device 10 according to this embodiment is to divide a large-scale quantum computing program into a group of small-scale quantum computing programs and then output the results of the quantum computing. Therefore, as a prerequisite, in the following, it is assumed that the quantum computing program is expressed as a quantum circuit. A quantum circuit is a virtual representation of a quantum computing program in the form of a logic circuit, and although it does not correspond to a specific electronic circuit implementation, the basic idea follows that of a logic circuit.
[0020] <Example of hardware configuration of the control device 100> An example of a hardware configuration of the control device 100 according to this embodiment is shown in Fig. 2. As shown in Fig. 2, the control device 100 according to this embodiment has an input device 101, a display device 102, an external I / F 103, a communication I / F 104, a RAM (Random Access Memory) 105, a ROM (Read Only Memory) 106, an auxiliary storage device 107, and a processor 108. Each of these pieces of hardware is connected to each other via a bus 109 so as to be able to communicate with each other.
[0021] The input device 101 is, for example, a keyboard, a mouse, a touch panel, a physical button, etc. The display device 102 is, for example, a display, a display panel, etc. Note that the control device 100 does not necessarily have to have at least one of the input device 101 and the display device 102, for example.
[0022] The external I / F 103 is an interface with an external device such as a recording medium 103a. Examples of the recording medium 103a include a CD (Compact Disc), a DVD (Digital Versatile Disk), an SD memory card (Secure Digital memory card), and a USB (Universal Serial Bus) memory card.
[0023] The communication I / F 104 is an interface for transmitting and receiving various signals to and from the quantum processor 200. The RAM 105 is a volatile semiconductor memory (storage device) that temporarily stores programs and data. The ROM 106 is a non-volatile semiconductor memory (storage device) that can store programs and data even when the power is turned off. The auxiliary storage device 107 is a non-volatile storage device (storage device) such as a hard disk drive (HDD), a solid state drive (SSD), or a flash memory. The processor 108 is an arithmetic device such as a central processing unit (CPU).
[0024] 2 is merely an example, and the hardware configuration of the control device 100 is not limited thereto. For example, the control device 100 may have multiple auxiliary storage devices 107 and multiple processors 108, may not have some of the hardware shown in the figure, or may have various hardware other than the hardware shown in the figure.
[0025] <Example of functional configuration of control device 100> FIG. 3 shows an example of the functional configuration of the control device 100 according to the present embodiment. As shown in FIG. 3, the control device 100 according to the present embodiment has an input unit 111, a division unit 112, an execution unit 113, and an output unit 114. Each of these units is realized, for example, by a process in which one or more programs installed in the control device 100 are executed by the processor 108 or the like. Here, the control device 100 according to the present embodiment is given a description of a quantum circuit representing a program of a large-scale quantum computation, and a list of controlled phase gates to be divided in the quantum circuit. Note that the quantum circuit is described, for example, by a list of components constituting the quantum circuit and information representing the connection relationship between the components, with at least one of one quantum mode operation, one quantum mode measurement, and a controlled phase gate as components.
[0026] The input unit 111 inputs the description of the quantum circuit given to the control device 100 and a list of controlled phase gates to be divided.
[0027] The dividing unit 112 divides the controlled phase gate to be divided in the quantum circuit. This gives us a description of a partitioned quantum circuit.
[0028] The execution unit 113 controls the quantum processor 200 to execute the divided quantum circuit, thereby obtaining a calculation result of the program represented by the quantum circuit (a calculation result of the quantum computation).
[0029] The output unit 114 outputs the calculation result of the quantum computation to a predetermined output destination. Examples of the output destination include the display device 102 such as a display, the auxiliary storage device 107 such as a HDD, SSD, or flash memory, a terminal device connected via a communication network, other programs, etc. However, these are merely examples, and the output destination of the output unit 114 is not limited to a specific output destination.
[0030] <Quantum computing processing> An example of the quantum computing process according to this embodiment will be described with reference to FIG.
[0031] First, the input unit 111 inputs a description of a given quantum circuit and a list of controlled phase gates to be divided (step S101). As an example, it is assumed below that a description of a quantum circuit 1000 shown in FIG. 5 and a list of controlled phase gates indicated by reference numeral 1100 in the quantum circuit 1000 to be divided are input. Here, in the quantum circuit 1000 shown in FIG. 5, U1 to U4 are quantum circuits having at least one of one quantum mode operation, one quantum mode measurement, and a controlled phase gate as a component (i.e., partial quantum circuits (sub-quantum circuits) of the quantum circuit 1000). Also, C zrepresents a controlled phase gate, and the meter-like symbol shown by reference numeral 1200 in the quantum circuit 1000 represents a gate that expresses one quantum mode measurement. In addition, |ψ1〉 and |ψ2〉 represent the state of continuous quantum modes. Furthermore, a connecting line marked with a diagonal line " / " represents a bundle of any number of connecting lines equal to or greater than 1. In one quantum mode measurement, a value of a continuous quantity is obtained as a measured value. Note that the controlled phase gate shown by reference numeral 1100 in the quantum circuit 1000 in FIG. 5 is an operation of two quantum modes spanning the upper half (part shown by reference numeral 1300) and lower half (part shown by reference numeral 1400) of the quantum circuit 1000.
[0032] Next, the dividing unit 112 divides the controlled phase gates to be divided in the quantum circuit based on the description of the quantum circuit input in the above step S101 and the list of controlled phase gates to be divided (step S102). For example, when the controlled phase gate indicated by reference numeral 1100 in the quantum circuit 1000 shown in FIG. 5 is divided, the quantum circuit 2000 shown in FIG. 6 is obtained. That is, the controlled phase gate indicated by reference numeral 1100 in the quantum circuit 1000 shown in FIG. 5 can be replaced with the part indicated by reference numeral 2100 in the quantum circuit 2000 shown in FIG. 6, and this part indicated by reference numeral 2100 can be divided into its upper and lower halves, which are independent parts. Here, in the quantum circuit 2000 shown in FIG. 6, |0〉 x is the initialization of the state in the continuous quantum mode, |0〉 q and represent the initialization of the state of the discrete quantum bit, respectively. More generally, for a continuous value a, |a〉 x is the state (eigenstate) of the position operator in the quantum mode, |a〉 q Each of D(x) represents a discrete quantum bit state (eigenstate). In addition, D(x) is a displacement operation in quantum optics, x=(x1, x2, x3, x4) is a variable whose value is determined when the quantum circuit 2000 is executed in the next step S103, and F †represents a Fourier transform, and H represents a Hadamard gate. Moreover, the open circle shown in the reference symbol 2101 means that when the state of the quantum bit to be controlled is 0, the gate connected thereto is executed, whereas the black circle shown in the reference symbol 2102 means that when the state of the quantum bit to be controlled is 1, the gate connected thereto is executed. Moreover, M1 and M2 represent the measurement of the quantum bit, and the bit values of 0 and 1 are obtained as the measured value. At this time, the measurement is performed in the Pauli X basis when the real part of the expected value is to be obtained, and in the Pauli Y basis when the imaginary part is to be obtained. Furthermore, the arrow 2103 starting from the gate representing one quantum mode measurement means that the behavior of the gate at the end of the arrow is determined based on the measured value of one quantum mode measurement (that is, in this case, it means that the values of a1 and a2 are dynamically determined based on the measured value of the immediately preceding one quantum mode measurement). Similarly, the arrow 2104 starting from the measurement gate of the quantum bit means that the behavior of the gate at the end of the arrow (the gate representing one quantum mode measurement) is determined based on the measured value of the measurement gate of the quantum bit.
[0033] 6, although communication is necessary between the upper half (part indicated by reference numeral 2200) and the lower half (part indicated by reference numeral 2300) to obtain a measurement value of one quantum mode from the other, the operation of two quantum modes across the upper and lower halves is removed, and it can be said that the circuit is divided into two independent quantum circuits that communicate classical information. In other words, it can be said that the original large-scale quantum circuit 1000 is divided into two independent quantum circuits (the quantum circuit described in the part indicated by reference numeral 2200 and the quantum circuit described in the part indicated by reference numeral 2300) that communicate classical information.
[0034] Here, the reason why the operation of the controlled phase gate indicated by reference numeral 1100 in the quantum circuit 1000 shown in FIG. 5 coincides with that of the part indicated by reference numeral 2100 in the quantum circuit 2000 shown in FIG. 6 is as follows. In quantum computing, the state of the quantum processor 200 is represented by a vector, and the operation on the state is described in the form of a linear operator acting on the vector. The linear operator can be decomposed into a linear combination using a set of linear operators that form the basis of the operator space. Therefore, if the linear operator when decomposing into a linear combination can be configured only with operations that are easy to physically implement, and a correction can be added to the calculation result so as to pseudo-reproduce the coefficient when expressed by a linear combination, the action of a certain physical operation can be reproduced by statistical processing of multiple calculations that are easier to effectively realize.
[0035] In the case of quantum bits that handle finite dimensions, vector spaces and operators acting on vectors also become finite dimensions, and a method is known in which two-qubit operations are expanded by a combination of one-qubit operations (Non-Patent Document 1). In quantum bit calculations, since any operation of one quantum bit is generally easy to implement, this method allows a large-scale quantum calculation program to be divided into a group of small-scale quantum calculation programs. On the other hand, when performing continuous quantity calculations using light, the operation of one quantum mode that is generally easy to implement is limited to a type of operation called Gaussian. In addition, when a quantum mode using light is used as an arithmetic element, vectors become infinite-dimensional, so the method of expansion in linear combinations using basis sets and correction with coefficients is also non-obvious. Therefore, in this embodiment, an operation using a quantum bit as a control quantum bit is introduced, and displacement operations that are relatively easy to implement with light are controlled by the quantum bit, and expansion in linear combinations is performed by these displacement operations. Regarding the implementation of the part indicated by the symbol 1100 in the quantum circuit 1000 shown in FIG. 5, a controlled phase gate, which is an operation of two quantum modes, is expanded as a linear combination of an operation (displacement operation) of one quantum mode, and then a correction is made to the coefficient of the linear combination later so that the calculation results can be reproduced, thereby obtaining an implementation of the part indicated by the symbol 2100 in the quantum circuit 2000 shown in FIG. 6.
[0036] Returning to the explanation of Fig. 4. Following step S102, the execution unit 113 controls the quantum processor 200 to execute the calculation of the quantum circuit divided in the above step S102 (quantum circuit 2000 shown in Fig. 6) (step S103). That is, the execution unit 113 executes the calculation of the quantum circuit 2000 shown in Fig. 6 as follows. Note that, hereinafter, the quantum circuit described in the portion indicated by reference numeral 2200 in the quantum circuit 2000 shown in Fig. 6 will be represented as "quantum circuit 2200", and the quantum circuit described in the portion indicated by reference numeral 2300 will be represented as "quantum circuit 2300".
[0037] First, the execution unit 113 defines a function φ as given by the following equation (1).
[0038]
number
[0039] In addition, the execution unit 113 calculates a complex number φ(x1, x2) where x=(x1, x2, x3, x4). * The real part of φ(x3,x4) is the function q R (x), the imaginary part is the function q I (x). Next, the execution unit 113 controls the quantum processor 200 to execute each quantum circuit divided in the above step S102 (i.e., the quantum circuit 2200 and the quantum circuit 2300) N times by repeating the following steps 1 to 6. Here, N is a predetermined integer of 1 or more.
[0040] Step 1: The execution unit 113 calculates the distribution |q R (x)| / ∫dx'|q R Sample x from (x')|.
[0041] Step 2: The execution unit 113 executes the quantum circuit 2200 and the quantum circuit 2300 divided by the quantum processor 200 in step S102 above using x sampled in step 1 above, and calculates the expected values r1 and r2. At this time, the execution unit 113 measures both M1 and M2 as the Pauli X basis, calculates the expected value r1 by integrating the measured values of one quantum mode measurement with the measured values as signs. Also, the execution unit 113 measures both M1 and M2 as the Pauli Y basis, calculates the expected value r2 by integrating the measured values of one quantum mode measurement with the measured values as signs. Note that using the measured values of M1 and M2 as signs means, for example, that if the measured value of M1 (or M2) is 0, nothing is done, and if the measured value of M1 (or M2) is 1, the measured value of one quantum mode measurement is multiplied by a negative value.
[0042] Step 3: The execution unit 113 assigns q to r1-r2. R The value m obtained by multiplying the sign of (x) R , that is, q R If (x) ≥ 0, then m R = r1-r2, otherwise m R Calculate =-(r1-r2).
[0043] Step 4: The execution unit 113 calculates the distribution |q I (x)| / ∫dx'|q I Sample x from (x')|.
[0044] Step 5: The execution unit 113 executes the quantum circuit 2200 and the quantum circuit 2300 divided by the quantum processor 200 in step S102 above using x sampled in step 4 above, and calculates expected values r3 and r4. At this time, the execution unit 113 measures M1 in the Pauli-X basis and M2 in the Pauli-Y basis, and calculates the expected value r3 by integrating the measured values of one quantum mode measurement with the measured values as signs. The execution unit 113 also measures M1 in the Pauli-Y basis and M2 in the Pauli-X basis, and calculates the expected value r4 by integrating the measured values of one quantum mode measurement with the measured values as signs.
[0045] Step 6: The execution unit 113 assigns q to r3+r4. I The value m obtained by multiplying the sign of (x) I , that is, q I If (x) ≥ 0, then m I =r3+r4, otherwise m I Calculate =-(r3+r4).
[0046] Note that the above steps 1 to 3 and steps 4 to 6 may be performed in any order. For example, steps 4 to 6 may be performed before steps 1 to 3 are performed.
[0047] By repeating steps 1 to 6 above N times, N (m R ,m I Then, the execution unit 113 obtains N (m R ,m I ), that is, the average of N m R The average value μ R and n m I The average value μ I Calculate μ R ∫dx'|q R (x')|-μ I ∫dx'|q I The value of |(x')| is calculated as the calculation result of the quantum circuit 2000. In this way, the calculation result of the quantum circuit 1000 that represents the original large-scale program is obtained by calculations of multiple small-scale quantum circuits 2200 and 2300 that are obtained by dividing the quantum circuit 1000.
[0048] Finally, the output unit 114 outputs the calculation result calculated in the above step S103 (the calculation result of the quantum circuit 2000) to a predetermined output destination (step S104).
[0049] <Summary> As described above, the quantum computing device 10 according to the present embodiment can efficiently simulate large-scale quantum computing tasks using a continuous quantum computer (quantum processor 200) using a small-scale optical mode. This makes it possible to solve large-scale problems even when the quantum computer is still small-scale, and allows practical quantum computing tasks to be realized early.
[0050] In addition, in the quantum computing device 10 according to the present embodiment, the technique of circuit cutting, which was previously considered as a technology for quantum bits, is combined with continuous quantum computing, but this is not self-evident. In order to actually implement this combination, both analytical difficulties due to infinite-dimensional linear algebra and protocol design based on the background of specific experiments with an eye on optical modes are required. The quantum computing device 10 according to the present embodiment solves these problems by appropriately considering these two points and proposing a realistic protocol (quantum computing process shown in FIG. 4).
[0051] The present invention is not limited to the above-described embodiments specifically disclosed, and various modifications, changes, combinations with known technologies, etc. are possible without departing from the scope of the claims. [Explanation of symbols]
[0052] 10 Quantum computing device 100 Control device 101 Input Device 102 Display device 103 External I / F 103a Recording media 104 Communication I / F 105 RAM 106 ROM 107 Auxiliary storage 108 processors 109 Bus 111 Input section 112 Division 113 Executive Department 114 Output section 200 Quantum Processors
Claims
1. A quantum computing device including a continuous quantum computer using a quantum mode, an input unit for inputting a description of a first quantum circuit expressing a quantum computing program using the quantum mode and a list of controlled phase gates to be divided in the first quantum circuit; a division unit that divides the first quantum circuit into a plurality of second quantum circuits by dividing the controlled phase gate; an execution unit that calculates a calculation result of the first quantum circuit by causing the quantum computer to execute the plurality of second quantum circuits; A quantum computing device having
2. the quantum mode is a quantum mode using light, The division unit is 2. The quantum computing device of claim 1, wherein the controlled phase gate, which is an operation of two quantum modes, is divided by expanding the controlled phase gate with a linear combination of an operation of one quantum mode representing a displacement operation in quantum optics.
3. The division unit is 3. The quantum computing device according to claim 2, wherein the quantum computing device divides the first quantum circuit into the second quantum circuits that can reproduce the calculation result of the first quantum circuit by applying a correction to a coefficient of the linear combination.
4. A quantum computing device including a continuous quantum computer utilizing a quantum mode, an input step of inputting a description of a first quantum circuit expressing a quantum computing program using the quantum mode and a list of controlled phase gates to be divided in the first quantum circuit; a division step of dividing the first quantum circuit into a plurality of second quantum circuits by dividing the controlled phase gate; an execution step of calculating a calculation result of the first quantum circuit by causing the quantum computer to execute the plurality of second quantum circuits; A quantum computing method for performing