Inverter circuit

JP2025033139APending Publication Date: 2025-03-13DIAMOND&ZEBRA ELECTRIC MFG CO LTD
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Patent Information

Application Number
JP2023138653
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-29
Publication Date
2025-03-13

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【0013】 本願の第1発明~第4発明によれば、スイッチング損失を抑えつつ、ゼロクロスタイミングにおける出力電圧の波形の歪みを低減できる。

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Abstract

To provide a technique for reducing waveform distortion of an output voltage at zero-cross timing while suppressing switching loss.SOLUTION: In an inverter circuit having a full-bridge circuit and a control circuit for performing switching control for each switching element, the full-bridge circuit has a first arm having two switching elements and a second arm having other two switching elements. The control circuit performs normal control during a period which does not include a zero-cross point, and performs changeover control during a period which includes a zero-cross point. In the normal control, the control circuit performs totem pole method which performs high-speed switching for the switching elements of the first arm and low-speed switching for the switching elements of the second arm. In the changeover control, the control circuit performs the high-speed switching for all switching elements of the first arm and the second arm.SELECTED DRAWING: Figure 3
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Description

[Technical field]

[0001] The present invention relates to an inverter circuit that performs soft switching. [Background technology]

[0002] 2. Description of the Related Art In a power conversion device including an inverter circuit such as a DC-DC converter, a totem pole system, a bipolar system, and other systems are known as systems for driving a bridge circuit using four switching elements.

[0003] In the bipolar method, all four switching elements that make up the bridge are switched using high-speed (e.g. 50 kHz) PWM (Pulse Width Modulation) drive. The bipolar method has the advantage that switch drive can be performed with a minimum number of signals: one PWM signal and its exclusive signal. On the other hand, the bipolar method has the disadvantages that all four switching elements are driven at high speed, resulting in high switching losses and making it difficult to simplify the circuit.

[0004] In the totem pole method, the two switching elements connected to one arm that makes up the bridge are switched at a low speed (for example, 50 Hz or 60 Hz), while the two switching elements connected to the other arm are switched with high-speed (for example, 50 kHz) PWM drive.The totem pole method has the advantages of low switching loss because the two switching elements are driven at a low speed, and a simplified circuit. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2022-21389 A Summary of the Invention [Problem to be solved by the invention]

[0006] Patent Document 1 describes a conventional power conversion device including a totem pole inverter circuit. As described in paragraph 0098 of Patent Document 1, unless special measures are taken, the totem pole method causes a problem that the waveform of the output voltage is distorted in the period around the zero cross timing.

[0007] One example of the reason is that near the zero crossing, it is necessary to drive with a small duty, but the lower limit of the duty is limited by the constraints of the actual drive circuit, switching elements, etc. Another example of the reason is that near the zero crossing, the duty of the high-speed arm switches between approximately 0 and approximately 1, and the low-speed arm also switches ON / OFF, and if these do not match the timing of the three zero crossings of the actual AC waveform, correct drive will not occur, but it is difficult to perfectly match the three in the actual circuit and control.

[0008] Therefore, an object of the present invention is to provide a technique for reducing distortion of the output voltage waveform at the zero-crossing timing while suppressing switching loss. [Means for solving the problem]

[0009] In order to solve the above problems, a first invention of the present application is an inverter circuit including a full bridge circuit having four switching elements and a control circuit that controls the switching of each of the switching elements of the full bridge circuit, wherein the full bridge circuit has a first arm having two of the switching elements and a second arm having the other two switching elements, and the control circuit performs normal control, which performs a totem pole method of switching the switching elements of the first arm at high speed and switching the switching elements of the second arm at low speed in a period not including a zero crossing point, and switching control, which performs high speed switching of all of the switching elements of the first arm and the switching elements of the second arm in a period including the zero crossing point.

[0010] A second aspect of the present invention is the inverter circuit of the first aspect, wherein the control circuit sets the duties of all the switching elements at the zero crossing points to about 0.5 in the switching control.

[0011] A third invention of the present application is an inverter circuit of the first invention, wherein the control circuit sets a duty in the switching control for each switching element at a timing of switching between the normal control and the switching control so that the duty in the normal control and the duty in the switching control have the same value.

[0012] A fourth invention of the present application is the inverter circuit of the third invention, wherein the control circuit sets the duty of one of the first arm or the second arm for each of the switching control periods by setting the duty at a start point of the switching control to the same value as the duty at an end point of the immediately preceding normal control, setting the duty at the end point of the switching control to the same value as the duty at the start point of the immediately succeeding normal control, and calculating the duties during other periods of the switching control by linearly interpolating the duty at the start point of the switching control and the duty at the end point of the switching control. Effect of the Invention

[0013] According to the first to fourth aspects of the present application, it is possible to reduce distortion of the output voltage waveform at the zero-cross timing while suppressing switching loss.

[0014] In particular, according to the third and fourth aspects of the invention, it is possible to smoothly switch between normal control and switching control. [Brief description of the drawings]

[0015] [Figure 1] FIG. 2 is a circuit diagram of an inverter circuit according to an embodiment. [Diagram 2] This shows the simulation results when normal control was performed throughout the entire period. [Diagram 3] 13 shows simulation results when normal control and switching control are performed. [Figure 4] FIG. 13 is a circuit diagram of an inverter circuit according to a modified example. [Diagram 5] FIG. 11 is a circuit diagram of an inverter circuit according to another modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0017] <1. Circuit configuration of DC-DC converter> 1 is a circuit diagram of an inverter circuit 1 according to this embodiment. The inverter circuit 1 includes a pair of input terminals T11, T12 and a pair of output terminals T21, T22. A DC power source E1 is connected to the pair of input terminals T11, T12. A load resistor RL is connected to the pair of output terminals T21, T22.

[0018] The inverter circuit 1 converts the power supply voltage of the DC power supply E1 inputted from the input terminals T11, T12 into an AC voltage and outputs it from the output terminals T21, T22. That is, the inverter circuit 1 is a circuit capable of power conversion.

[0019] The inverter circuit 1 includes a full-bridge circuit 10, an inductor L1, and a capacitor C1.

[0020] The full bridge circuit 10 has a first arm A1 in which a switching element S1 and a switching element S2 are connected in series, and a second arm A2 in which a switching element S3 and a switching element S4 are connected in series. Diodes Di1, Di2, Di3, and Di4 are connected in parallel to the switching elements S1, S2, S3, and S4. The switching elements S1 to S4 are MOS-FETs. However, the switching elements S1 to S4 may be IGBTs or JFETs, etc. The diodes Di1 to Di4 may be real elements or parasitic diodes.

[0021] The output terminal T21 is connected to a first intermediate point P1 between the switching element S1 and the switching element S2 of the first arm A1. The output terminal T22 is connected to a second intermediate point P2 between the switching element S3 and the switching element S4 of the second arm A2. An inductor L1 is inserted between the first intermediate point P1 and the output terminal T21. The capacitor C1 is connected in parallel to the output terminals T21 and T22.

[0022] The gate terminals of the switching elements S1 to S4 are connected to the control circuit 30. The control circuit 30 controls the switching of the switching elements S1 to S4 so that the output power of the inverter circuit 1 becomes a set target power.

[0023] The switching operation of each of the switching elements S1 to S4 will be described below. In the following description, the input terminals T11, T12 are the input side (primary side), and the output terminals T21, T22 are the output side (secondary side).

[0024] Here, the phase is expressed as an angle θ (rad). Also, the division of one period is -(1 / 2)π<θ<(3 / 2)π. The zero crossing points are as follows:

number

[0025] As described above, when the totem pole method is used during a certain period including the zero crossing point, the waveform of the output voltage is distorted. For this reason, in this embodiment, the control circuit 30 mainly performs normal control of the totem pole method, and also performs switching control during a certain period centered on the zero crossing point.

[0026] Here, the period during which switching control is performed is set to 2α (rad), where α is 0<α<(1 / 2)π. In this case, the region in which the totem pole method is stopped and switching control is performed is the following period.

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[0027] On the other hand, in the remaining region, i.e., the periods of -(1 / 2)π<θ<-α, α<θ<π-α, π+α<θ<(3 / 2)π, the control circuit 30 performs normal control using the totem pole method. In order to reduce switching loss, it is preferable for the control circuit 30 to drive using the totem pole method for a period of at least half of each cycle. In other words, it is preferable for α to be 0<α<(1 / 4)π.

[0028] First, the operation of the inverter circuit 1 in normal control of the totem pole system will be described.

[0029] The drive duties of the four switching elements S1, S2, S3, and S4 of the full bridge circuit 10 are defined as duties D1, D2, D3, and D4, respectively. Here, the duties D1 to D4 each take a value between 0 and 1, and indicate the rate at which the corresponding switching elements S1 to S4 are ON. That is, when the duties D1 to D4 are 0, the corresponding switching elements S1 to S4 are continuously OFF, and when the duties D1 to D4 are 1, the corresponding switching elements S1 to S4 are continuously ON.

[0030] Switching element S1 and switching element S2 perform opposite ON / OFF operations. Therefore, duties D1 and D2 have a relationship of D2 ≈ 1-D1. Note that they are not equal because dead time is taken into consideration. Switching elements S1 and S2 operate without being turned ON at the same time when switching ON / OFF, with a dead time in between. This type of operation is called complementary operation here.

[0031] Similarly, switching element S3 and switching element S4 perform the opposite ON / OFF operation. Therefore, duties D3 and D4 have a relationship of D4 ≈ 1-D3. Note that they are not equal because dead time is taken into consideration. Switching elements S3 and S4 perform complementary operation without being turned ON at the same time when switching ON / OFF, with dead time in between.

[0032] Also, the DC input voltage input between the input terminals T11, T12 is V1, the instantaneous value of the AC output voltage output between the output terminals T21, T22 is V2, and the effective value is V2rms. In such a full-bridge circuit 10, whether it is a totem-pole type, a bipolar type, or any other type, the instantaneous value V2 of the AC output voltage as an average voltage by the PWM-driven switching elements is equal to the average potential difference between the midpoints P1, P2 of the two arms A1, A2.

[0033] Here, the potential of the first intermediate point P1 with respect to the input terminal T12 is proportional to the duty D1 of the switching element S1 and is V1*D1. Also, the potential of the second intermediate point P2 with respect to the input terminal T12 is proportional to the duty D3 of the switching element S3 and is V1*D3. Therefore, the instantaneous value V2 of the AC output voltage is equal to the potential difference between the first intermediate point P1 and the second intermediate point P2, and is as follows:

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[0034] In normal control of the totem pole system, the control circuit 30 switches the switching elements S1 and S2 of the first arm A1 at high speed and switches the switching elements S3 and S4 of the second arm A2 at low speed. Specifically, the control circuit 30 switches the switching elements S1 and S2 of the first arm A1 at a PWM period, for example, 50 kHz. On the other hand, the switching period of the switching elements S3 and S4 of the second arm A2 is 50 Hz or 60 Hz, which is the same as one period (2π) of AC.

[0035] Here, the drive duties of the switching elements S1, S2, S3, and S4 in normal control are assumed to be D1t, D2t, D3t, and D4t, respectively. In order to make the instantaneous value V2 of the output voltage a sine wave, the duty D1t of the switching element S1 and the duty D3t of the switching element S3 are calculated as follows.

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[0036] Figure 2 shows the simulation results of the duty D1 of the switching element S1, the duty D3 of the switching element S3, and the instantaneous value V2 of the output voltage when the above-mentioned totem pole normal control is performed over the entire period. The horizontal axis of Figure 2 is the phase θ. As shown in Figure 2, when the above-mentioned totem pole normal control is performed, distortion occurs in the waveform of the instantaneous value V2 of the output voltage immediately after θ=0 and θ=π, which are the zero crossing points shown in Equation 1.

[0037] 3 shows simulation results of the duty D1 of the switching element S1, the duty D3 of the switching element S3, and the instantaneous value V2 of the output voltage when the switching control of this embodiment is performed during the periods of Equation 2 and Equation 3. In FIG. 3, even after the zero crossing points θ=0 and θ=π shown in Equation 1, no distortion occurs in the waveform of the instantaneous value V2 of the output voltage.

[0038] In the switching control of this embodiment, the switching elements S3 and S4, which are switched at a low speed in normal control, are also turned on / off in the same PWM cycle as the switching elements S1 and S2. In the switching control, the drive duties of the switching elements S1, S2, S3, and S4 are set to duties D1c, D2c, D3c, and D4c, respectively.

[0039] First, at the zero-crossing point (θ=0, α) of equation 1, the duties D1c, D2c, D3c, and D4c of the switching elements S1, S2, S3, and S4 are set to approximately 0.5 as follows. Note that the duty ratios are not exactly 0.5 because dead time is taken into consideration.

number

[0040] In this case, the duties D1c, D2c, D3c, and D4c of the switching elements S1, S2, S3, and S4 are set to have continuity with the duties D1t, D2t, D3t, and D4t in the normal control. That is, at each point of time θ=-α, α, π-α, and π+α, which is the switching timing between the normal control and the switching control, the duties D1t, D2t, D3t, and D4t in the normal control are set to have the same value as the duties D1c, D2c, D3c, and D4c in the switching control.

[0041] A method for setting the duty D3c of the switching element S3 for changeover control in the period of equation 2 (-α<θ<0, 0<θ<α) will be described below. First, the duty D3 in normal control is D3t=1 when θ=-α, and D3t=0 when θ=α. Therefore, when the duty D3c is calculated by linear interpolation in the period of equation 2 (-α<θ<0, 0<θ<α), the duty D3c is as follows:

number

[0042] In order to obtain an instantaneous value V2 of the output voltage equal to that of the normal control of the totem pole system, according to Equation 4, the duties D1t, D3t of the normal control and the duties D1c, D3c of the switching control are as follows:

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[0043] Therefore, the duty D1c of the switching control is as follows:

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[0044] By calculating the duties D1c, D3c of the switching control in this manner, switching between normal control and switching control can be performed smoothly.

[0045] Here, the switching control duties D1c, D3c calculated by Equation 8 and Equation 10 satisfy Equation 7 at the zero cross point (θ=0, α) of Equation 1. Therefore, the region of Equation 1 and the region of Equation 2 can be smoothly switched.

[0046] Considering the region of equation 3 in a similar manner, the duty D3c of the switching element S3 for changeover control in the region of equation 3 (π-α<θ<π, π<θ<π+α) can be calculated as follows.

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[0047] Then, the duty D1c of the switching element S1 for the changeover control can be calculated using Equations 10 and 11.

[0048] In this manner, in this embodiment, the control circuit 30 uses a totem pole system in which some of the switching elements are switched at a low speed in normal control, while performing switching control in which all of the switching elements are switched at a high speed near the zero crossing point. This reduces switching loss in normal control and suppresses distortion of the output voltage waveform near the zero crossing point due to switching control.

[0049] Particularly, in this embodiment, the control circuit 30 sets the duties D1c-D4c at the start and end points of the switching control so that the duties D1t-D4t in the normal control and the duties D1c-D4c in the switching control are the same for each of the switching elements S1-S4 at the timing of switching between the normal control and the switching control. That is, the control circuit 30 continuously changes the duties D1-D4 of each of the switching elements S1-S4 at the timing of switching between the normal control and the switching control. This allows the control method to be smoothly switched at the timing of switching between the normal control and the switching control.

[0050] Specifically, in this embodiment, the control circuit 30 sets the duty D3c of the switching element S3 of the second arm A2 for each switching control period such that the duty D3c at the start point of the switching control is the same as the duty D3t at the end point of the immediately preceding normal control, and the duty D3c at the end point of the switching control is the same as the duty D3t at the start point of the immediately succeeding normal control. Then, the control circuit 30 sets the duty D3c in other periods of the switching control (periods other than the start and end points) by linearly interpolating the duty D3c at the start point of the switching control and the duty D3c at the end point of the switching control.

[0051] <2. Modifications> Although one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment. In the following modified examples, only the parts different from the above embodiment will be described.

[0052] Fig. 4 is a diagram showing a circuit configuration of an inverter circuit 1A according to one modified example. In the above embodiment, as shown in Fig. 1, between the intermediate points P1, P2 of the full bridge circuit 10 and the output terminals T21, T22, an inductor L1 is inserted only between the first intermediate point P1 and the output terminal T21. In contrast, in the example of Fig. 4, an inductor L2 is also inserted between the second intermediate point P2 and the output terminal T22. In this way, by providing two inductors, noise can be reduced.

[0053] Fig. 5 is a diagram showing a circuit configuration of an inverter circuit 1B according to another modification. In the example of Fig. 5, instead of the full bridge circuit 10 having two arms, a first arm A1 and a second arm A2, a three-phase bridge circuit 10B having a total of three arms, two first arms A1x, A1y and one second arm A2, is provided. The three-phase bridge circuit 10B has a first first arm A1x having switching elements S1 and S2, a second first arm A1y having switching elements S3 and S4, and a second arm A2 having switching elements S5 and S6.

[0054] The output terminal T21 is connected to a first intermediate point P1 between the switching element S1 and the switching element S2 of the first first arm A1x and a second intermediate point P2 between the switching element S3 and the switching element S4 of the second first arm A1y. The output terminal T22 is connected to a third intermediate point P3 between the switching element S5 and the switching element S6 of the second arm A2. An inductor L1 is inserted between the first intermediate point P1 and the output terminal T21. An inductor L2 is inserted between the second intermediate point P2 and the output terminal T21.

[0055] In the inverter circuit 1 of the above embodiment, in normal control of the totem pole system, the switching elements S1 and S2 of the first arm A1 are on the high-speed side, and the switching elements S3 and S4 of the second arm A2 are on the low-speed side. In contrast, in the inverter circuit 1B of the example of FIG. 5, the switching elements S1 and S2 of the first arm A1x and the switching elements S3 and S4 of the first arm A1y are on the high-speed side, and the switching elements S5 and S6 of the second arm A2 are on the low-speed side. Then, by shifting the PWM periods of the switching elements S1 and S2 of the first arm A1x and the switching elements S3 and S4 of the first arm A1y by π (half period) to perform interleaved operation, the output voltage can be smoothed further.

[0056] In the above embodiment, a description has been given of a case where a DC voltage is converted into an AC voltage in the inverter circuit 1. However, in the same inverter circuit 1, when an AC voltage is converted into a DC voltage, the normal control of the totem pole system and the switching control for high-speed switching of all the switching elements S1 to S4 in a region including the zero crossing point may be performed similarly.

[0057] The above method can be applied in any of the cases where the inverter circuit 1 is used to convert a DC voltage to an AC voltage, convert an AC voltage to a DC voltage, and perform bidirectional operation. For example, in normal control of the totem pole system, the duty D1t may be a value calculated based on the formula 5 and further taking into account power supply control, etc. Even in that case, the calculated duty D1t is used to calculate the formulas other than the formula 5 in the same manner as in the above embodiment, and the normal control and the switching control can be switched in the same manner to suppress distortion of the output voltage waveform near the zero crossing point.

[0058] In the above embodiment, in the switching control, the duty D3c of the switching element S3 is calculated by linear interpolation, and then the duty D1c of the switching element S1 is calculated based on the calculated duty D3c. However, in the switching control, the duty D1c of the switching element S1 may be calculated by linear interpolation, and then the duty D3c of the switching element S3 may be calculated based on the calculated duty D1c.

[0059] In addition, when the duty D1t is a value calculated based on the formula 5 and further taking into account power supply control, etc., it is preferable to calculate the duty D3c of the switching element S3 first. In such a case, the duty D3t of the low-speed switching element S3 is determined as the duty for normal control at the switching timing, whereas the duty D1t of the high-speed switching element S1 is undetermined depending on the power supply control.

[0060] In the above embodiment, no reference was made to the phase difference in the PWM cycle between the switching elements S1, S2 of the first arm A1 and the switching elements S3, S4 of the second arm A2 in the switching control. In the switching control, the phase difference in the PWM cycle between the first arm A1 and the second arm A2 can be any phase difference. In the switching control, it is more preferable to set the phase difference in the PWM cycle between the first arm A1 and the second arm A2 to π (half cycle), since this results in driving close to the bipolar method near the zero crossing point.

[0061] Furthermore, the elements appearing in the above-described embodiment or modified examples may be combined as appropriate to the extent that no contradiction arises. [Explanation of symbols]

[0062] 1,1A,1B inverter circuit 10 Full-bridge circuit 10B 3-phase bridge circuit 30 Control circuit A1, A1x, A1y First arm A2 Second Arm S1, S2, S3, S4, S5, S6 switching elements

Claims

1. A full bridge circuit having four switching elements; a control circuit that controls the switching of each of the switching elements of the full bridge circuit; An inverter circuit comprising: The full bridge circuit includes: a first arm having two of the switching elements; a second arm having two other switching elements; having The control circuit includes: A normal control is performed in which the switching element of the first arm is switched at a high speed and the switching element of the second arm is switched at a low speed during a period not including a zero cross point. a switching control for switching all of the switching elements of the first arm and the second arm at high speed during a period including the zero cross point; This is an inverter circuit.

2. 2. The inverter circuit according to claim 1, The control circuit controls the switching of the inverter circuit so that the duties of all the switching elements at the zero crossing points are approximately 0.

5.

3. 2. The inverter circuit according to claim 1, The control circuit sets a duty in the switching control for each of the switching elements at a switching timing between the normal control and the switching control so that the duty in the normal control and the duty in the switching control have the same value.

4. 4. The inverter circuit according to claim 3, The control circuit controls a duty of one of the first arm and the second arm for each of the switching control periods, A duty at a start point of the switching control is set to the same value as a duty at an end point of the immediately preceding normal control, The duty at the end point of the switching control is set to the same value as the duty at the start point of the normal control immediately thereafter, Calculating a duty in the other period of the switching control by linearly interpolating the duty at the start point of the switching control and the duty at the end point of the switching control; Set up the inverter circuit.

Citation Information

Patent Citations

  • Power conversion device and power conversion system

    JP2022021389A