Display device

Abstract

To provide a display device capable of suppressing the decrease in display quality.SOLUTION: A display device in an embodiment includes a first substrate, a second substrate, and a liquid crystal layer held between the first substrate and the second substrate. The first substrate includes a plurality of first pixels overlapping with a display region and a plurality of second pixels overlapping with a peripheral region around the display region, that are arranged in matrix in a first direction and a second direction on the first substrate, a plurality of color filters corresponding to the respective first pixels, and a first light-blocking layer having an opening overlapping with the respective first and second pixels. The second substrate includes a second light-blocking layer that surrounds the display region and overlaps with the peripheral region in a plan view. The width of the first light-blocking layer in the first direction, which is disposed at a position overlapping with an end part of the display region extending in the second region, is larger than the width between the openings overlapping with the first pixels that are adjacent in the first direction among the plurality of first pixels.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present embodiment relates to a display device. [Background technology]

[0002] As an example of a display device, a liquid crystal display device including a pair of substrates and a liquid crystal layer disposed between the pair of substrates is known. In a liquid crystal display device capable of displaying color, a color filter is provided on one of the pair of substrates.

[0003] This color filter is often provided on a counter substrate separate from the array substrate which includes the switching elements and pixel electrodes. However, for example, in liquid crystal display devices which realize high definition, a configuration in which the color filter is provided on the array substrate side is sometimes adopted.

[0004] In the case of a configuration in which the color filter is provided on the array substrate side as described above, it is relatively easy to bond the array substrate and the opposing substrate together compared to a configuration in which the color filter is provided on the opposing substrate side. However, if there is any misalignment in the bonding, the display quality of the display device may be reduced. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2023-036194 A Summary of the Invention [Problem to be solved by the invention]

[0006] Therefore, an object of the present invention is to provide a display device capable of suppressing a decrease in display quality. [Means for solving the problem]

[0007] A display device according to an embodiment includes a first substrate, a second substrate facing the first substrate, and a liquid crystal layer held between the first substrate and the second substrate. The first substrate includes a plurality of first pixels overlapping a display region and a plurality of second pixels overlapping a peripheral region around the display region, which are arranged in a matrix in a first direction and a second direction on the first substrate, a plurality of color filters corresponding to each of the plurality of first pixels, and a first light-shielding layer having an opening overlapping each of the plurality of first and second pixels. The second substrate includes a second light-shielding layer surrounding the display region in a plan view and overlapping the peripheral region. The width in the first direction of the first light-shielding layer arranged at a position overlapping an end portion of the display region extending in the second direction is wider than the width between the openings overlapping each of the first pixels adjacent to each other in the first direction among the plurality of first pixels. [Brief description of the drawings]

[0008] [Figure 1] 1 is a schematic plan view of a display device according to an embodiment. [Diagram 2] FIG. 2 is a schematic cross-sectional view of a display area of ​​a display panel. [Diagram 3] FIG. 2 is a schematic cross-sectional view of a peripheral region of a display panel. [Figure 4] FIG. 4 is a schematic cross-sectional view of a peripheral region where a sealing material is disposed. [Diagram 5] FIG. 4 is a diagram for explaining a first light-shielding layer in a comparative example of the embodiment. [Figure 6] FIG. 4 is a diagram for explaining a first light-shielding layer in a comparative example of the embodiment. [Figure 7] FIG. 2 is a diagram for explaining a first light-shielding layer in the embodiment. [Figure 8] FIG. 2 is a diagram for explaining a first light-shielding layer in the embodiment. [Figure 9] FIG. 2 is a diagram for explaining a first light-shielding layer in the embodiment. [Figure 10] FIG. 2 is a diagram for explaining a first light-shielding layer in the embodiment. [Figure 11] 3A and 3B are diagrams for explaining pixel electrodes in the embodiment; [Figure 12] FIG. 2 is a diagram showing a first light-shielding layer, a pixel electrode, and a common electrode in a plan view. [Figure 13] 13 is a schematic cross-sectional view of the display panel taken along line AA shown in FIG. 12. [Figure 14] 13 is a schematic cross-sectional view of the display panel taken along line BB shown in FIG. 12. [Figure 15] 13 is a schematic cross-sectional view of the display panel taken along line CC shown in FIG. 12. [Figure 16] 13 is a schematic cross-sectional view of the display panel taken along line DD shown in FIG. 12. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment will be described with reference to the drawings. The disclosure is merely an example, and those who are skilled in the art can easily conceive of appropriate modifications while keeping the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be represented more diagrammatically than the actual embodiment in order to make the explanation clearer, but they are merely examples and do not limit the interpretation of the present invention. In addition, in each figure, the reference numerals may be omitted for identical or similar elements arranged consecutively. In addition, in this specification and each figure, the same reference numerals may be used for components that perform the same or similar functions as those described above with respect to the previous figures, and duplicate detailed descriptions may be omitted.

[0010] FIG. 1 is a schematic plan view of a display device 1 according to this embodiment. In this embodiment, an X direction, a Y direction, and a Z direction are defined as shown in FIG. 1. In this embodiment, the X direction, the Y direction, and the Z direction are perpendicular to each other, but may intersect at an angle other than perpendicular. In the following description, viewing the display device 1 or its components parallel to the Z direction is referred to as a planar view. In the following description, viewing the display device 1 or its components parallel to the X direction or the Y direction is referred to as a cross-sectional view.

[0011] 1, the display device 1 includes a display panel 2 including a first substrate SUB1 (array substrate), a second substrate SUB2 (counter substrate) opposed to the first substrate SUB1, and a liquid crystal layer (not shown) sealed (held) between the first and second substrates SUB1 and SUB2. The display device 1 is, for example, a transmissive liquid crystal display device provided with an illumination device (not shown) on the back surface of the display panel 2.

[0012] The display panel 2 also has a display area DA and a peripheral area (frame area) SA around the display area DA. As shown in Fig. 1, the display area DA has a polygonal shape having, for example, a side DA1 along the X direction, a side DA2 along the Y direction, and a side DA3 along a direction intersecting the X direction and the Y direction. Note that, although the display area DA is octagonal in the example shown in Fig. 1, it may have another shape.

[0013] Although omitted in Fig. 1, a plurality of pixels are arranged in a matrix in the X direction and the Y direction in the display area DA. Each of the plurality of pixels arranged in the display area DA includes a plurality of sub-pixels. In this embodiment, a pixel includes, as an example, a red sub-pixel, a green sub-pixel, and a blue sub-pixel. However, a pixel may also include sub-pixels of other colors, such as white.

[0014] 1, the bottom side of the first substrate SUB1 protrudes in the opposite direction to the Y direction beyond the second substrate SUB2. This forms a mounting area MA on the first substrate SUB1 that does not overlap with the second substrate SUB2. The mounting area MA is a part of the peripheral area SA.

[0015] A controller CT is mounted in the mounting area MA. The controller CT can be composed of an IC or various circuit elements. A terminal portion T is provided in the mounting area MA, and a flexible circuit board (not shown) is connected to the terminal portion T. The flexible circuit board inputs various signals sent from a board of an electronic device on which the display device 1 is mounted to the controller CT. The controller CT supplies a video signal to a selector circuit (not shown) based on the input signal, and controls a gate driver and a selector circuit. The gate driver sequentially supplies the gate signal to gate lines (not shown) that extend in the X direction and are arranged side by side in the Y direction. The selector circuit supplies the input video signal to signal lines (not shown) that extend in the Y direction and are arranged side by side in the X direction.

[0016] The display device 1 shown in FIG. 1 can be used in electronic devices such as a head-mounted display that displays images for VR (Virtual Reality), but may also be used in other electronic devices such as in-vehicle devices, smartphones, tablet terminals, mobile chat terminals, personal computers, television receivers, and game devices.

[0017] Fig. 2 is a schematic cross-sectional view of a display area DA of the display panel 2. As shown in Fig. 2, the first substrate SUB1 includes a first insulating substrate 10 such as a light-transmitting glass substrate or a flexible resin substrate.

[0018] The insulating layer 11 is disposed on the first insulating substrate 10 so as to cover the first insulating substrate 10. The insulating layer 12 is disposed on the insulating layer 11 so as to cover the insulating layer 11.

[0019] The gate line G1 is disposed on the insulating layer 12. The insulating layer 13 is disposed on the insulating layer 12 and the gate line G1 so as to cover the insulating layer 12 and the gate line G1.

[0020] The semiconductor layer SC1 is disposed, for example, on the insulating layer 13, and is formed of an oxide semiconductor (OS), which is a transparent semiconductor. Examples of the oxide semiconductor include indium gallium zinc oxide (InGaZnO), indium gallium oxide (InGaO), indium zinc oxide (InZnO), zinc tin oxide (ZnSnO), and zinc oxide (ZnO).

[0021] The insulating layer 14 is disposed on the insulating layer 13 and the semiconductor layer SC1 so as to cover the insulating layer 13 and the semiconductor layer SC1.

[0022] The gate line G2 is disposed on the insulating layer 14. The gate line G2 faces the channel region of the semiconductor layer SC1. The gate line G2 is connected to the gate line G1 via contact holes (not shown) formed in the insulating layers 13 and 14.

[0023] The insulating layer 15 is disposed on the insulating layer 14 and the gate line G2 so as to cover the insulating layer 14 and the gate line G2.

[0024] A signal line S is disposed on the insulating layer 15. The signal line S is connected to the semiconductor layer SC1 via a contact hole h1 formed in the insulating layers 14 and 15.

[0025] The insulating layer 16 is disposed on the insulating layer 15 and the signal line S so as to cover the insulating layer 15 and the signal line S.

[0026] A relay electrode RE is disposed on the insulating layer 16. The relay electrode RE is connected to the semiconductor layer SC1 through a contact hole h2 formed in the insulating layers 14 to 16. The relay electrode RE is formed of a transparent conductive material having optical transparency, such as indium tin oxide (ITO).

[0027] As described above, each of the pixels (sub-pixels) arranged in the display area DA includes a switching element SW1 (thin film transistor), and the switching element SW1 is composed of a semiconductor layer SC1, a gate electrode, a source electrode, a drain electrode, etc. In the example shown in Fig. 2, the gate lines G1 and G2 function as gate electrodes, and the switching element SW1 has a dual gate structure. In addition, the signal line S functions as one of the source electrode and the drain electrode, and the relay electrode RE functions as the other of the source electrode and the drain electrode.

[0028] The insulating layer 17 is disposed on the insulating layer 16 and the relay electrode RE so as to cover the insulating layer 16 and the relay electrode RE. The insulating layer 17 has a function of blocking foreign matter such as moisture and gas that travels from a color filter CF (described later) toward the first insulating substrate 10.

[0029] A plurality of color filters CF corresponding to the plurality of sub-pixels are disposed on the insulating layer 17. Specifically, the plurality of color filters CF include a red color filter corresponding to the sub-pixels displaying red, a green color filter corresponding to the sub-pixels displaying green, and a blue color filter corresponding to the sub-pixels displaying blue.

[0030] In this embodiment, the first substrate SUB1 (array substrate) is provided with a color filter CF, and such a display device 1 is said to have a color filter on array (COA) structure.

[0031] The insulating layer 18 is disposed on the insulating layer 17 and the color filters CF so as to cover the insulating layer 17 and the color filters CF. The insulating layer 18 is made of an organic insulating material.

[0032] A pixel electrode PE is disposed on the insulating layer 18. The pixel electrode PE is connected to the relay electrode RE through a contact hole h3 formed in the insulating layers 17 and 18. The pixel electrode PE is formed of a transparent conductive material having optical transparency, such as ITO.

[0033] The insulating layer 19 is disposed on the insulating layer 18 and the pixel electrode PE so as to cover the insulating layer 18 and the pixel electrode PE.

[0034] The insulating layers 11, 12, 13, 14, 15, 16, 17, and 19 are all transparent inorganic insulating layers and are formed of silicon oxide, silicon nitride, silicon oxynitride, etc. The insulating layer 18 is a transparent organic insulating layer.

[0035] A first light-shielding layer BMTL is disposed on the insulating layer 19. The first light-shielding layer BMTL is formed of a light-shielding material such as a metal. Note that in FIG. 2, the first light-shielding layer BMTL is disposed between two color filters CF, and the first light-shielding layer BMTL is formed in a lattice shape so as to separate each of the multiple color filters CF (i.e., multiple sub-pixels) in a plan view. In other words, the first light-shielding layer BMTL is formed so as to have openings that overlap each of the multiple sub-pixels.

[0036] The common electrode CE is disposed on the insulating layer 19 and the first light-shielding layer BMTL so as to cover the insulating layer 19 and the first light-shielding layer BMTL. The common electrode CE is disposed across a plurality of pixels (sub-pixels), and has a slit SL at a position overlapping with the pixel electrode PE in a planar view. The common electrode CE is formed of a transparent conductive material having optical transparency, such as ITO.

[0037] An insulating layer LEV for planarizing a recess formed in accordance with the contact hole h3 is disposed at a position overlapping a portion of the common electrode CE. The insulating layer LEV is made of an organic insulating material.

[0038] The spacers SP are disposed on the insulating layer LEV. The spacers SP are made of an organic insulating material and have, for example, a columnar shape. Such spacers SP function as holding members that hold the gap between the first substrate SUB1 and the second substrate SUB2 that form the liquid crystal layer LC.

[0039] The alignment film AL1 is disposed on the insulating layer 19, the common electrode CE, the insulating layer LEV, and the spacers SP so as to cover these.

[0040] On the other hand, the second substrate SUB2 includes a second insulating substrate 20 such as a glass substrate or a resin substrate having optical transparency. The overcoat layer OC is disposed so as to cover the second insulating substrate 20. The overcoat layer OC is made of an organic insulating material. The alignment film AL1 is disposed so as to cover the overcoat layer OC.

[0041] The first substrate SUB1 and the second substrate SUB2 are attached to each other by a ring-shaped sealant disposed in the peripheral area SA. A liquid crystal layer LC is sealed between the first substrate SUB1 and the second substrate SUB2.

[0042] The alignment films AL1 and AL2 have a function of aligning the liquid crystal molecules contained in the liquid crystal layer LC in the initial alignment direction. As an example, the alignment films AL1 and AL2 are photo-alignment films that have been subjected to a photo-alignment process in which a polymer film such as polyimide is irradiated with ultraviolet light to give it anisotropy. However, the alignment films AL1 and AL2 may also be rubbed alignment films that have been subjected to a rubbing process. Also, one of the alignment films AL1 and AL2 may be a photo-alignment film, and the other may be a rubbed alignment film.

[0043] The first polarizer PL1 faces the first substrate SUB1 and is bonded to the first insulating substrate 10. The second polarizer PL2 faces the second substrate SUB2 and is bonded to the second insulating substrate 20. The transmission axis of the first polarizer PL1 is perpendicular to the transmission axis of the second polarizer PL2.

[0044] In the above-described display device 1, when the display device 1 is in an off state in which no electric field is formed between the pixel electrodes PE and the common electrode CE, the liquid crystal molecules in the liquid crystal layer LC are maintained in an initial alignment state. At this time, the transmission axes of the first polarizer PL1 and the second polarizer PL2 are perpendicular to each other, so that the light from the illumination device is blocked and the pixels display black.

[0045] When a video signal is supplied to the pixel electrode PE, an electric field is formed between the pixel electrode PE and the common electrode CE. The electric field thus formed acts on the liquid crystal layer LC through the slit SL, so that the liquid crystal molecules contained in the liquid crystal layer LC are aligned in a direction different from the initial alignment direction. At this time, a part of the light from the lighting device is transmitted through the second polarizer PL2.

[0046] Fig. 3 is a schematic cross-sectional view of the peripheral area SA of the display panel 2. In Fig. 3, the same parts as those in Fig. 2 are given the same reference numerals, and detailed description thereof will be omitted.

[0047] In the peripheral area SA, a semiconductor layer SC2 is disposed on an insulating layer 11. The semiconductor layer SC2 is made of polycrystalline silicon. The semiconductor layer SC2 is covered with an insulating layer 12.

[0048] A gate electrode GE is disposed on the insulating layer 12. The gate electrode GE is covered with an insulating layer 13, which is covered with an insulating layer 14.

[0049] The first electrodes LE1 and LE2 are disposed on the insulating layer 14. The first electrode LE1 is connected to the semiconductor layer SC2 through a contact hole h4 formed in the insulating layers 12 to 14. Similarly, the first electrode LE2 is connected to the semiconductor layer SC2 through a contact hole h5 formed in the insulating layers 12 to 14. The first electrodes LE1 and LE2 are disposed at positions facing each other with the channel region of the semiconductor layer SC2 in between. The first electrodes LE1 and LE2 are covered with the insulating layer 15.

[0050] Second electrodes UE1 and UE2 are disposed on the insulating layer 15. The second electrode UE1 is connected to the first electrode LE1 through a contact hole h6 formed in the insulating layer 15. The second electrode UE2 is connected to the first electrode LE2 through a contact hole h7 formed in the insulating layer 15.

[0051] For example, a gate driver is arranged in the peripheral area SA of the display panel 2, and the above-mentioned semiconductor layer SC2, gate electrode GE, first electrodes LE1 and LE2 (source electrodes and drain electrodes), etc. constitute a switching element SW2 for realizing the gate driver (gate driving circuit).

[0052] In the above-mentioned display area DA, the second substrate SUB2 has been described as comprising a second insulating substrate 20, an overcoat layer OC and an alignment film AL2, but in the second substrate SUB2 in the peripheral area SA, a second light-shielding layer BM is further disposed between the second insulating substrate 20 and the overcoat layer OC.

[0053] As described above, the liquid crystal layer LC is held in the peripheral area SA by bonding the first substrate SUB1 and the second substrate SUB2 together with a sealant.

[0054] Fig. 4 is a schematic cross-sectional view of the peripheral area SA where the sealant is arranged. Note that while Fig. 3 shows the peripheral area SA, Fig. 4 shows an area closer to the edge of the display panel 2 than the area shown in Fig. 3.

[0055] A sealant SE is disposed in the peripheral area SA shown in FIG. 4, and the first substrate SUB1 and the second substrate SUB2 are bonded together by the sealant SE.

[0056] In the peripheral area SA, various peripheral wirings L are arranged, for example, on the insulating layer 12 (that is, in the same layer as the gate lines G2) and on the insulating layer 15 (that is, in the same layer as the signal lines S).

[0057] Furthermore, in the peripheral area SA, as described above with reference to FIG. 3, the second light-shielding layer BM is disposed between the second insulating substrate 20 and the overcoat layer OC.

[0058] Here, for example, in a configuration in which a color filter CF is arranged on the second substrate SUB2 side, it is difficult to align the pixels (sub-pixels) arranged on the first substrate SUB1 side with the color filters corresponding to those pixels (i.e., to accurately bond the first substrate SUB1 and the second substrate SUB2 together); however, since the display device 1 of this embodiment has a COA structure as described above, it is relatively easy to bond the first substrate SUB1 and the second substrate SUB2 together in the manufacturing process of the display device 1, which can contribute to higher pixel definition.

[0059] 3 and 4, when the second substrate SUB2 includes the second light-shielding layer BM in the peripheral area SA, the second light-shielding layer BM is disposed so as to surround the display area DA. For this reason, in the display device 1 according to this embodiment, it is necessary to bond the first substrate SUB1 and the second substrate SUB2 together so that at least the edge of the display area DA (i.e., the boundary between the display area DA and the peripheral area SA) coincides with the edge of the second light-shielding layer BM. If there is a misalignment in this bonding, appropriate light blocking is not achieved (i.e., light from the lighting device or reflected light from wiring, etc. leaks out from the boundary of the display area DA), and the display quality of the display device 1 is reduced.

[0060] Therefore, the display device 1 according to this embodiment has a configuration that can suppress degradation of the display quality of the display device 1 even if misalignment occurs in bonding the first substrate SUB1 and the second substrate SUB2.

[0061] Here, the first light-shielding layer BMTL in a comparative example of this embodiment will be described with reference to Fig. 5. Fig. 5 shows an enlarged view of the first light-shielding layer BMTL and the second light-shielding layer BM in the boundary portion between the display area DA and the peripheral area SA.

[0062] As shown in FIG. 5, the first light-shielding layer BMTL is disposed across the display area DA and at least a part of the peripheral area SA.

[0063] Meanwhile, the first light-shielding layer BMTL has openings overlapping with each of the sub-pixels SPX in the display area DA, for example. In addition, in order to reduce variations in the amount of etching when forming the openings in the first light-shielding layer BMTL, the first light-shielding layer BMTL further has openings overlapping with each of the dummy pixels SPX' at least partially overlapping with the peripheral area SA. In other words, the first light-shielding layer BMTL is formed in the same pattern in the display area DA and the peripheral area SA so as to partition each of the sub-pixels SPX and the dummy pixels SPX'.

[0064] The subpixels SPX include, for example, a subpixel configured to display red by disposing a red color filter CF therein, a subpixel configured to display green by disposing a green color filter CF therein, and a subpixel configured to display blue by disposing a blue color filter CF therein. These three subpixels SPX configured to display red, green, and blue form one pixel.

[0065] As described above, a color filter CF corresponding to a subpixel SPX is arranged at a position overlapping with the subpixel SPX, but a color filter corresponding to the dummy pixel SPX' does not have to be arranged at a position overlapping with the dummy pixel SPX'.

[0066] 5 shows an example in which an end 101 (i.e., side DA2 of the display area DA) extending in the Y direction of the display area DA (or the peripheral area SA) coincides with an end 102 of the second light-shielding layer BM extending in the Y direction. In this case, the second light-shielding layer BM is disposed on an opening overlapping with a dummy pixel SPX' disposed in the peripheral area SA, and light from the dummy pixel SPX', for example, does not leak.

[0067] In contrast to this, a case is assumed in which a misalignment occurs in bonding between the first substrate SUB1 on which the first light-shielding layer BMTL is arranged and the second substrate SUB2 on which the second light-shielding layer BM is arranged, as shown in Fig. 6. Note that Fig. 6 assumes that the second substrate SUB2 is misaligned in the X direction.

[0068] In this case, a portion of the dummy pixel SPX' located near the end 101 extending in the Y direction of the above-mentioned display area DA does not overlap with the second light-shielding layer BM (i.e., is exposed from the second light-shielding layer BM), so in the comparative example of this embodiment, a misalignment occurs in the bonding between the first substrate SUB1 and the second substrate SUB2, causing light leakage from the dummy pixel SPX' and degrading the display quality in the vicinity of the display area DA.

[0069] Next, the first light-shielding layer BMTL in this embodiment will be described with reference to Fig. 7. Fig. 7 shows an enlarged view of the first light-shielding layer BMTL and the second light-shielding layer BM in the boundary portion between the display area DA and the peripheral area SA, similar to Fig. 5.

[0070] As shown in FIG. 7, the first light-shielding layer BMTL in this embodiment is formed to have an opening overlapping each of the sub-pixels SPX in the display area DA as in the comparative example of this embodiment, but the width in the X direction at the position overlapping with the end 101 extending in the Y direction of the display area DA is different from that in the comparative example. Specifically, in this embodiment, the width W1 in the X direction of the first light-shielding layer BMTL arranged at the position overlapping with the end 101 extending in the Y direction of the display area DA is wider than the width W2 in the X direction of the first light-shielding layer BMTL arranged in the display area DA. Note that the width W2 corresponds to the width between the openings overlapping each of the sub-pixels SPX adjacent in the X direction among the multiple sub-pixels SPX. Note that the width W1 is, for example, 5 μm or more.

[0071] 7, the first light-shielding layer BMTL in this embodiment has a shape in which no openings are formed that overlap with at least a part of the multiple dummy pixels SPX' (dummy pixels SPX' arranged in the Y direction along an end 101 extending in the Y direction of the display area DA). In other words, the first light-shielding layer BMTL is formed so that the width W1 is wider than the width in the X direction of each of the openings that overlap with the subpixel SPX and the dummy pixel SPX'.

[0072] According to this, even if the second substrate SUB2 is shifted in the X direction when being bonded to the first substrate SUB1, as shown in FIG. 8, the light from the dummy pixel SPX' located in the vicinity of the end portion 101 extending in the Y direction of the display area DA is blocked by the first light-shielding layer BMTL having a width W1, thereby suppressing the degradation of display quality that occurs in the comparative example of this embodiment described above.

[0073] Note that, here, we have described the X-direction width of the first light-shielding layer BMTL arranged at a position overlapping with the end portion 101 extending in the Y direction of the display area DA. However, as shown in FIG. 9, the same applies to the Y-direction width of the first light-shielding layer BMTL arranged at a position overlapping with the end portion 103 extending in the X direction of the display area DA (i.e., the side DA1 of the display area DA).

[0074] In this case, the width W3 in the Y direction of the first light-shielding layer BMTL arranged at a position overlapping the end 103 extending in the X direction of the display area DA may be made wider than the width W4 in the Y direction of the first light-shielding layer BMTL arranged within the display area DA. Note that the width W3 is, for example, 5 μm or more.

[0075] According to this, as shown in FIG. 10, even if the second substrate SUB2 is misaligned in the Y direction when being bonded to the first substrate SUB1, it is possible to prevent light leakage.

[0076] 9 and 10, the shape of the opening formed in the peripheral area SA on the Y-direction side of the end of the display area DA extending in the X-direction is different from the shape of the opening shown in Figures 8 and 9 for convenience of design. However, the shape of the opening formed in the peripheral area SA on the Y-direction side of the end of the display area DA extending in the X-direction shown in Figures 9 and 10 may be the same as the shape of the opening shown in Figures 8 and 9.

[0077] Incidentally, for example, according to the first light-shielding layer BMTL shown in Fig. 8, even if the second substrate SUB2 is shifted in the X direction, it is possible to block light from the dummy pixels SPX' arranged near the end 101 extending in the Y direction of the display area DA, but it is not possible to block light from the dummy pixels SPX' overlapping with the end of the display area DA extending in a direction intersecting the X and Y directions (i.e., the side DA3 of the display area DA). In this case, the display quality is degraded near the end of the display area DA extending in a direction intersecting the X and Y directions. The same is true for the first light-shielding layer BMTL shown in Fig. 10.

[0078] Here, the above-mentioned liquid crystal layer LC transmits light from the lighting device when a potential difference is formed between the pixel electrode and the common electrode (i.e., when a pixel potential is applied to the pixel electrode), and does not transmit light from the lighting device when the potential difference is not formed.

[0079] For this reason, in this embodiment, the pixel electrode arranged at a position overlapping with the above-mentioned dummy pixel SPX' is set to the same potential as the common electrode (hereinafter referred to as COM potential) (i.e., the dummy pixel SPX' is always displayed in black), thereby suppressing degradation of display quality in the vicinity of the ends extending in directions intersecting the X and Y directions of the above-mentioned display area DA.

[0080] Here, the pixel electrodes PE in this embodiment will be described with reference to Fig. 11. Fig. 11 shows an enlarged view of the pixel electrodes PE and the signal lines S in the boundary portion between the display area DA and the peripheral area SA.

[0081] 11, in the display area DA, the pixel electrodes PE are disposed in each of the sub-pixels SPX. In other words, in the display area DA, the pixel electrodes PE are formed in an island shape at a position sandwiched between a plurality of signal lines S extending in the Y direction and arranged side by side in the X direction. An electric potential (i.e., a pixel electric potential) corresponding to a video signal supplied to the sub-pixel SPX corresponding to the pixel electrode PE is applied to each of the pixel electrodes PE, thereby displaying an image in the display area DA.

[0082] On the other hand, in the peripheral area SA, for example, a pixel electrode PE is not arranged for each of the plurality of dummy pixels SPX', but a pixel electrode PE' formed integrally with the plurality of dummy pixels SPX' is arranged.

[0083] Although not shown in Figure 11, the common electrode CE is formed across multiple sub-pixels SPX arranged in the display area DA and multiple dummy pixels SPX' arranged in the peripheral area SA, and in this embodiment, black display is achieved in the dummy pixels SPX' (i.e., the entire peripheral area SA) by setting the pixel electrode PE' to COM potential as described above.

[0084] According to this, even if a part of the dummy pixel SPX' overlapping with an end portion of the display area DA extending in a direction intersecting the X and Y directions does not overlap with the second light-shielding layer BM due to the second substrate SUB2 being shifted in the X direction as shown in FIG. 8 described above, the black display in the dummy pixel SPX' can achieve the same effect as the light-shielding effect provided by the first light-shielding layer BMTL and the second light-shielding layer BM (i.e., suppression of light leakage from the dummy pixel SPX').

[0085] Here, Fig. 12 is a diagram showing the first light-shielding layer BMTL, the pixel electrodes PE and PE', and the common electrode CE superimposed in a plan view. Fig. 13 is a schematic cross-sectional view of the display panel 2 taken along line AA shown in Fig. 12. Fig. 14 is a schematic cross-sectional view of the display panel 2 taken along line BB shown in Fig. 12. Fig. 15 is a schematic cross-sectional view of the display panel 2 taken along line CC shown in Fig. 12.

[0086] Note that Figures 13 to 15 are drawings for explaining the positional relationship between the first light-shielding layer BMTL, the pixel electrodes PE and PE', and the common electrode CE in a cross-sectional view, and for convenience, some components are shown in a simplified manner in Figures 13 to 15 compared to Figure 2 etc.

[0087] 13 to 15, the width W1 in the X direction of the first light-shielding layer BMTL arranged at a position overlapping the boundary between the display area DA and the peripheral area SA (i.e., an end portion of the display area DA extending in the Y direction) is wider than the width W2 in the X direction of the first light-shielding layer BMTL arranged within the display area DA. In other words, the first light-shielding layer BMTL at a position overlapping the end portion of the display area DA extending in the Y direction has a shape in which an opening overlapping one sub-pixel partitioned by the first light-shielding layer BMTL is filled.

[0088] 13 to 15, in the display area DA, the pixel electrodes PE are arranged in islands corresponding to the sub-pixels SPX, whereas in the peripheral area SA, pixel electrodes PE' each having a shape in which a plurality of conductive layers corresponding to the pixel electrodes PE are partially connected are arranged. Note that in this embodiment, the pixel electrode PE' has a shape in which, among the plurality of conductive layers corresponding to the pixel electrodes PE, the conductive layers arranged along the Y direction are connected at their ends in the Y direction, and the conductive layers arranged along the X direction are connected near the center in the Y direction.

[0089] In the present embodiment, it is necessary to apply a COM potential to the pixel electrode PE'. This COM potential is applied to the pixel electrode PE' via a power supply line disposed in the peripheral area SA.

[0090] Here, Fig. 16 is a cross-sectional view of the display panel 2 taken along the line DD shown in Fig. 12. Fig. 16 shows only the configuration for applying a COM potential to the pixel electrode PE' described above, and other components are shown in a simplified manner.

[0091] 16, a power supply line P is disposed on an insulating layer 15. The power supply line P is disposed in the same layer as the signal line S described above. The power supply line P is covered with an insulating layer 16.

[0092] The relay electrode RE' is disposed on the insulating layer 16 (that is, in the same layer as the relay electrode RE). The relay electrode RE' is connected to the power supply line P through a contact hole h8 formed in the insulating layer 16.

[0093] The relay electrode RE' is covered with an insulating layer 17. The insulating layer 18 is disposed on the insulating layer 17 so as to cover the insulating layer 17.

[0094] The pixel electrode PE' is disposed on the insulating layer 18. The pixel electrode PE' is connected to the relay electrode RE' via a contact hole h9 formed in the insulating layers 17 and 18.

[0095] The pixel electrode PE' is covered with an insulating layer 19. The common electrode CE is disposed on the insulating layer 19. The common electrode CE is connected to the pixel electrode PE' via a contact hole h10 formed in the insulating layer 19.

[0096] According to the configuration shown in Figure 16 above, it is possible to apply the same potential (COM potential) to the pixel electrode PE' and the common electrode CE via the power supply line P, and black display can be achieved in the dummy pixel SPX' in which the pixel electrode PE' is arranged.

[0097] As described above, in this embodiment, the width in the X direction (first direction) of the first light-shielding layer BMTL arranged at a position overlapping with an end portion extending in the Y direction (second direction) of the display area DA is wider than the width in the X direction of the first light-shielding layer BMTL arranged within the display area DA. In this embodiment, with such a configuration, even if the second substrate SUB2 including the second light-shielding layer BM surrounding the display area DA in a plan view and overlapping with the peripheral area SA is misaligned in the X direction when the second substrate SUB2 is bonded to the first substrate SUB1, the first light-shielding layer BMTL can block light from the dummy pixels SPX' (second pixels), thereby suppressing a decrease in display quality in the display device 1.

[0098] In this embodiment, as shown in FIG. 7, the first light-shielding layer BMTL has been described in which no openings are formed that overlap with the dummy pixels SPX′ arranged in the peripheral area SA and that are arranged near the end 101 extending in the Y direction of the display area DA. However, the first light-shielding layer BMTL may have a shape in which no openings are formed in the peripheral area SA (i.e., a shape in which no openings are formed that overlap with any of the dummy pixels SPX′).

[0099] 9, in this embodiment, the width in the Y direction of the first light-shielding layer BMTL arranged at a position overlapping with an end portion 103 extending in the X direction of the display area DA may be made wider than the width in the Y direction of the first light-shielding layer BMTL arranged within the display area DA. With this configuration, for example, even if the second substrate SUB2 is misaligned in the Y direction when bonding the second substrate SUB2 to the first substrate SUB1, it is possible to suppress a decrease in the display quality of the display device 1.

[0100] Furthermore, in this embodiment, black display is achieved in the dummy pixels SPX' by applying a COM potential (the same potential as the second potential supplied to the common electrode CE) to the pixel electrodes PX' (second pixel electrodes) that are integrally arranged across multiple dummy pixels SPX' that overlap with the peripheral area SA as shown in Fig. 11. This makes it possible to suppress degradation of display quality in the vicinity of the ends of the display area DA that extend in directions intersecting the X and Y directions (i.e., diagonal directions) even if the second substrate SUB2 is misaligned in the X or Y direction when bonding the second substrate SUB2 to the first substrate SUB1.

[0101] In the configuration shown in Figure 11, it is necessary to apply the same COM potential as that of the common electrode CE to the pixel electrode PE' that is arranged across multiple dummy pixels SPX' arranged in the peripheral area SA. The application of the COM potential to the pixel electrode PE' and the common electrode CE is achieved by connecting the pixel electrode PE' to the power supply line P via contact holes h8 and h9, and connecting the common electrode CE to the pixel electrode PE' via contact hole h10.

[0102] In addition, in this embodiment, for example, a configuration having only one of the configurations shown in Fig. 7 and Fig. 9 may be used. Furthermore, in this embodiment, as shown in Fig. 1, it is assumed that the display area DA is a polygonal shape having sides DA1 and DA2 (first sides) along the X direction and the Y direction and a side DA3 (second side) along a direction intersecting the X direction and the Y direction, and the configuration shown in Fig. 11 above assumes a case in which light from a dummy pixel SPX' overlapping with the side DA3 along the direction intersecting the X direction and the Y direction leaks. However, for example, when the display area DA is a rectangular shape having only sides along the X direction and the Y direction, the configuration shown in Fig. 11 may be omitted.

[0103] All display devices that can be implemented by those skilled in the art through appropriate design modifications based on the display devices described above as the embodiments of the present invention are within the scope of the present invention as long as they include the gist of the present invention.

[0104] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications, and such modifications are also understood to fall within the scope of the present invention. For example, those in which a person skilled in the art appropriately adds or removes components or modifies the design of the above-mentioned embodiment, or adds or omits steps or modifies conditions, are also included in the scope of the present invention as long as they include the gist of the present invention.

[0105] Furthermore, with regard to other effects and advantages brought about by the aspects described in the above-mentioned embodiments, those which are obvious from the description in this specification or which can be appropriately thought up by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0106] 1...display device, 2...display panel, SUB1...first substrate, SUB2...second substrate, DA...display area, SA...peripheral area, CF...color filter, PE, PE'...pixel electrodes (first and second pixel electrodes), BMTL...first light-shielding layer, CE...common electrode, LC...liquid crystal layer, BM...second light-shielding layer, SPX...sub-pixel (first pixel), SPX'...dummy pixel (second pixel).

Claims

1. A first substrate; a second substrate facing the first substrate; a liquid crystal layer held between the first substrate and the second substrate; Equipped with The first substrate is A plurality of first pixels overlapping a display area and a plurality of second pixels overlapping a peripheral area around the display area, the first pixels being arranged in a matrix in a first direction and a second direction on the first substrate; a plurality of color filters corresponding to the plurality of first pixels; a first light-shielding layer having an opening overlapping each of the first and second pixels; Including, the second substrate includes a second light-shielding layer that surrounds the display region in a plan view and overlaps with the peripheral region; The width in the first direction of the first light-shielding layer arranged at a position overlapping an end portion of the display area extending in the second direction is wider than a width between openings overlapping each of the first pixels adjacent to each other in the first direction among the plurality of first pixels. Display device.

2. 2. The display device according to claim 1, wherein the first light-shielding layer has a shape that does not form an opening that overlaps with a second pixel among the plurality of second pixels that is arranged near an end of the display area extending in the second direction.

3. The display device of claim 1 , wherein the width in the first direction of the first light-shielding layer arranged at a position overlapping with the end portion is wider than the width in the first direction of each of the opening overlapping with the first pixel and the opening overlapping with the second pixel.

4. 2. The display device according to claim 1, wherein the width in the second direction of the first light-shielding layer arranged at a position overlapping with an end portion extending in the first direction of the display area is wider than the width between openings overlapping with each of the second pixels adjacent to the first pixels in the second direction.

5. the first substrate includes a plurality of first pixel electrodes disposed in the plurality of first pixels, a second pixel electrode disposed across the plurality of second pixels, and a common electrode disposed across the plurality of first and second pixels and overlapping with the plurality of first pixel electrodes and the second pixel electrode; a first potential corresponding to a video signal supplied to a first pixel in which the first pixel electrode is disposed is applied to each of the first pixel electrodes; The second pixel electrode is applied with a potential equal to a second potential applied to the common electrode. The display device according to claim 1.

6. Further, the liquid crystal display device includes a first polarizing plate facing the first substrate and a second polarizing plate facing the second substrate, The transmission axis of the first polarizer is perpendicular to the transmission axis of the second polarizer. The display device according to claim 5 .

7. The display device according to claim 5 , wherein the display region has a polygonal shape having a first side along the first direction and the second direction, and a second side along a direction intersecting the first direction and the second direction.

8. The display device according to claim 7 , wherein the plurality of second pixels include a pixel overlapping the second side.

9. the first substrate further includes a power supply line that supplies the second potential and a relay electrode that are arranged in the peripheral region; the relay electrode is connected to the power supply line through a first contact hole formed in a first insulating layer covering the power supply line; the second pixel electrode is connected to the relay electrode via a second contact hole formed in a second insulating layer disposed on the relay electrode; The common electrode is connected to the second pixel electrode through a third contact hole formed in a third insulating layer covering the second pixel electrode. The display device according to any one of claims 5 to 8.

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