Display panel

Abstract

To provide electronic equipment capable of performing diverse display, or to provide electronic equipment capable of performing diverse operation.SOLUTION: In a display panel having a flexible board, the display panel has a first display area, a second display area, and a third display area. The first display area is in a shape in which its contour is quadrangular, and has a first side and a second side forming a first corner part of the contour, the second display area is provided in contact with the first side and the width in a direction parallel with the first side of the second display area matches the length of the first side, and the third display area is provided in contact with the second side and the width in a direction parallel with the second side in the third display area matches the length of the second side. The board has a cutout part in an area that faces the first display area while sandwiching the first corner part.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The present invention relates to a method, manufacture, or composition of matter. One embodiment of the present invention is a light-emitting device, a display device, an electronic device, a lighting device, a driving method thereof, In particular, the present invention relates to a display panel (display device) capable of displaying on a curved surface. Or, electronic devices, light-emitting devices, lighting devices, etc., that are equipped with a display device capable of displaying on a curved surface. Or the present invention relates to a method for producing the same. [Background technology]

[0002] In recent years, display devices are expected to be used for a variety of purposes, and diversification is required. For example, the thinning of smartphones and tablet devices equipped with touch panels as mobile information terminals These devices are becoming more powerful and multifunctional.

[0003] In addition, Patent Document 1 discloses a film substrate on which transistors and other semiconductor devices are mounted as switching elements. A flexible active matrix type light emitting device having an organic EL element is disclosed. . [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2003-174153 A Summary of the Invention [Problem to be solved by the invention]

[0005] An object of one embodiment of the present invention is to provide a novel electronic device. It is an object of the present invention to provide an electronic device capable of displaying information. It is an object of the present invention to provide a display device that can be applied to such an electronic device. Another object of the present invention is to provide a display device (display panel). One of the challenges we face is to

[0006] The description of these problems does not preclude the existence of other problems. It is not necessary to solve all of these problems. Problems other than those mentioned above are not necessarily solved. It will become clear from the description of the specification, etc., and problems other than those mentioned above will not be identified from the description of the specification, etc. It is possible to extract [Means for solving the problem]

[0007] One aspect of the present invention is a display panel including a flexible substrate, The first display area has a first display area, a second display area, and a third display area. The first display area has a contour has a quadrilateral shape and has a first side and a second side that form a first corner of the contour. The second display area is provided adjacent to the first side, and the first side of the second display area is The width in the parallel direction is equal to the length of the first side, and the third display area is provided adjacent to the second side. and the width of the third display area in a direction parallel to the second side is equal to the length of the second side. The substrate has a cutout in a region facing the first display region across the first corner.

[0008] The display panel has a plurality of pixels, and the pixels are formed by disposing an oxide film on a semiconductor layer in which a channel is formed. It is preferable to have a transistor including a nitride semiconductor.

[0009] The display panel has a plurality of pixels, and the pixels are formed in a semiconductor layer in which a channel is formed. It is preferable to have transistors that comprise crystalline silicon.

[0010] A first drive circuit outputs a signal to the first display area and the second display area. and a second drive circuit that outputs a signal to the third display area. The first driving circuit is provided along a side of the second display area opposite to the first side, and the second The driving circuit is provided along a side in a direction in which the first side of the third display area extends, and the first driving circuit The path and the second drive circuit are preferably electrically connected by wiring.

[0011] Alternatively, a signal is output to the first display area, the second display area, and the third display area. It is preferable that the display device further comprises a driving circuit for driving the first side of the second display area. The driving circuit and the third display area are electrically connected by wiring. It is preferable that the above-mentioned

[0012] A fourth display region is provided adjacent to a third side of the first display region, the third side being opposite to the first side. It is preferable to have a display area.

[0013] A fourth display region is provided adjacent to a third side of the first display region, the third side being opposite to the first side. a fifth display region provided adjacent to a fourth side of the first display region, the fourth side being opposite to the second side of the first display region; and a display area.

[0014] Another aspect of the present invention is an electronic device including any one of the display panels described above and a housing. The housing has a top surface, a back surface, a first side surface, a second side surface in contact with the first side surface, and a fourth side opposite the second side. each of the first side surface and the second side surface has a curved surface that is continuous from the upper surface to the rear surface; The first display area of ​​the display panel is provided along the top surface, and the second display area is provided along the first side surface. It is preferable that the third display area is provided along the second side surface.

[0015] Another aspect of the present invention is an electronic device including the above-described display panel and a housing, The body has an upper surface, a lower surface, a first side surface, a second side surface in contact with the first side surface, and a second side surface facing the first side surface. The surface shape has a third side and a fourth side opposite to the second side. Each of the second side surface and the third side surface has a curved surface that is continuous from the upper surface to the rear surface. The first display area of ​​the display panel is provided along the top surface, and the second display area is provided along the first side surface. a third display area is provided along the second side, and a fourth display area is provided along the third side. It is preferable that the groove is provided along the side of the groove.

[0016] Another aspect of the present invention is an electronic device including the above-described display panel and a housing, The housing has a top surface, a back surface, a first side surface, a second side surface in contact with the first side surface, and a second side surface facing the first side surface. The first side has a third side facing the second side and a fourth side facing the second side. Each of the first side, the second side, the third side and the fourth side is continuous from the top surface to the back surface. The display panel has a curved surface, and the first display area of ​​the display panel is provided along the top surface, and the second display area is provided along the first side, a third display area is provided along the second side, and a fourth A display area is provided along the third side, and a fifth display area is provided along the fourth side. It is preferable that

[0017] In any one of the above electronic devices, a touch sensor is provided at a position overlapping the display panel. In addition, the touch sensor has at least one of a first side surface, a second side surface, a third side surface, and a fourth side surface. It is preferable that the recess is provided at least along the top surface.

[0018] In this specification, a connector, such as an FPC (F lexible printed circuit) or TCP (Tape Car The module has a printed wiring board (PCB) attached to the TCP. or a COG (Chip On Glass) on a substrate on which a display element is formed. The module in which IC (integrated circuit) is directly mounted using the Glass method includes a display device. This may be the case. Effect of the Invention

[0019] According to one embodiment of the present invention, a novel electronic device capable of displaying various images can be provided. It is possible to provide an electronic device. Or, it is possible to provide an electronic device capable of performing various operations. Or, It is possible to provide a display device applicable to such electronic devices. Alternatively, it is possible to provide a novel display device. do.

[0020] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0021] [Figure 1] 1 shows a configuration example of an electronic device according to an embodiment. [Diagram 2] 1 shows a configuration example of an electronic device according to an embodiment. [Diagram 3] 1 shows a configuration example of an electronic device according to an embodiment. [Figure 4] 1 shows a configuration example of an electronic device according to an embodiment. [Diagram 5] 1 shows a configuration example of an electronic device according to an embodiment. [Figure 6] 3 shows a configuration example of a display panel according to the embodiment. [Figure 7] 3 shows a configuration example of a display panel according to the embodiment. [Figure 8] 3 shows an example of the configuration of a display panel and a touch sensor according to an embodiment. [Figure 9] 3 shows a configuration example of a display panel according to the embodiment. [Figure 10] 3 shows a configuration example of a display panel according to the embodiment. [Figure 11] 3 shows a configuration example of a display panel according to the embodiment. [Figure 12] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 13] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 14] 13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 15] Electron diffraction pattern of CAAC-OS. [Figure 16] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Figure 17] 1 shows a configuration example of an electronic device according to an embodiment. [Figure 18] 1 shows a configuration example of an electronic device according to an embodiment. [Figure 19] 1 shows a configuration example of an electronic device according to an embodiment. [Figure 20] 1 shows a configuration example of an electronic device according to an embodiment. [Figure 21]1 shows a configuration example of an electronic device according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various changes and modifications may be made in the form and details without departing from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that the present invention can be realized by the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0023] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and the repeated explanations are omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be used.

[0024] In each figure described in this specification, the size, layer thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0025] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The numbers are added for the purpose of convenience and are not intended to be limiting.

[0026] (Embodiment 1) In this embodiment, an electronic device of one embodiment of the present invention and a display panel applicable to the electronic device will be described. The display device (also called a display unit) will be described with reference to the drawings.

[0027] [Examples of electronic devices] FIG. 1A is a schematic perspective view showing the top side of an electronic device exemplified below, and FIG. FIG.

[0028] The electronic device shown in FIG. 1 includes a housing 101 and a display panel 11 provided on the surface of the housing 101. Equipped with 0.

[0029] The housing 101 has a top surface, a back surface, a first side surface, a second side surface in contact with the first side surface, and a fourth side opposite the second side.

[0030] The display panel 110 has a first display area 111 that overlaps with the top surface of the housing 101, A second display area 112 overlaps one of the side surfaces of the housing 101, and a third display area 113 overlaps the other of the side surfaces of the housing 101. The surface of the housing 101 that overlaps with the second display area 112 is called the first display area 113. The surface of the housing 101 that overlaps with the third display area 113 is defined as a second side surface.

[0031] At least the area of ​​the four sides of the housing 101 that overlaps with the display panel 110 is curved. For example, it is preferable that the shape of the substrate has corners between the top surface and the side surface, and between the side surface and the back surface. It is preferable that these surfaces are continuous. It is preferable that the surface has a curved surface such that the inclination of the tangent line is continuous from the front surface to the rear surface. It is preferable that the shape of the side surface has a developable surface obtained by deforming a flat surface without expanding or contracting. I wish.

[0032] As shown in FIG. 1, the second display area 112 is provided along a first side surface of the housing 101. Alternatively, the third display area 11 may extend to the rear surface of the housing 101. 3 is provided along the second side surface of the housing 101 and extends to the rear surface of the housing 101. Alternatively, it may be as shown in FIG. 17(A) and FIG. 17(B). FIG. 17(A) is a schematic perspective view showing the top side of the electronic device, and FIG. 17(B) is a schematic perspective view showing the back side. FIG. 18(A) and FIG. 18(B) are also possible. 18(A) is a schematic perspective view showing the top side of the electronic device, and FIG. 18(B) is a schematic perspective view showing the back side. FIG.

[0033] In addition to the display panel 110, the surface of the housing 101 is provided with hardware buttons and external connectors. It may have a terminal or the like.

[0034] In FIG. 1, two side surfaces of the housing 101 are used as display areas. The display area may be overlapped on the side surface.

[0035] 2(A1) and (A2) show a third side surface of the housing 101, which is opposite to the first side surface of the housing 101. 2(B1) and (B2) show a configuration having four display areas 114. In addition, a fifth display area 115 overlapping a fourth side surface of the housing 101 opposite to the second side surface is provided. Alternatively, it may be as shown in FIG. 19(A1) and FIG. 19(A2). FIG. 19(A1) is a schematic perspective view showing the top side of the electronic device, and FIG. 19(A2) is a schematic perspective view showing the back side of the electronic device. 19(B1) and 19(B2) are schematic perspective views showing the front side of the device. FIG. 19(B1) is a schematic perspective view showing the top side of the electronic device, and FIG. FIG. 20(A1) and FIG. 20(A2) are schematic perspective views showing the back side. FIG. 20(A1) is a schematic perspective view showing the top side of an electronic device. 2) is a perspective schematic diagram showing the back side. FIG. 20(B1) is a schematic perspective view showing the top side of the electronic device. (B2) is a perspective schematic view showing the back side.

[0036] 3(A1) and 3(A2) show a second display that overlaps the first side surface of the housing 101. and a fourth display area 114 overlapping a third side opposite the first side. 3(B1) and 3(B2) show a configuration of the housing 101 on the second side surface. 21(A1) and 21(B2) are views showing a configuration including only the overlapping third display area 113. FIG. 21(A1) is a perspective view showing the top side of the electronic device. 21(A2) is a schematic perspective view showing the back side. 21(B1) and FIG. 21(B2). FIG. 21(B1) shows the top side of the electronic device. 21(B2) is a schematic perspective view showing the rear surface side.

[0037] By adopting such a configuration, unlike conventional electronic devices, the display is not only displayed on the surface parallel to the top surface of the housing. In particular, it is possible to display not only on the surface of the housing but also on a surface parallel to the side of the housing. It is preferable to provide display areas along two or more sides, since this increases the variety of displays.

[0038] A first display area 111 is disposed along the top surface of the housing 101, and a second display area 112 is disposed along the side surface of the housing 101. Each display area may be used as an independent display area to display different images, etc. Alternatively, one image may be displayed across two or more display areas. An image to be displayed in a first display area 111 arranged along the top surface of the housing 101 is It may be displayed continuously in a second display area 112 provided along the side.

[0039] FIG. 4 shows an example of the usage state of the electronic device shown in FIG. 2(A1) and (A2). In FIG. 4, The first display area 111 provided along the top surface of the housing 101 displays text information 122 and apps. The housing 101 displays a plurality of icons 121 associated with various applications. A second display area 112 provided along the first side of the display 110 displays information related to an application, etc. It shows the attached icon 123, etc.

[0040] As shown in FIG. 4, a plurality of display areas (herein, In the example, text information 124 is displayed across the third display area 113 and the second display area 112. It is also possible to display the text in a flowing (moving) manner. By displaying information, the user can easily see the information when, for example, receiving a call, regardless of the orientation of the electronic device. This can prevent the information from being overlooked.

[0041] In addition, when a call or email is received, not only the first display area 111 but also the In a display area provided along a side of the second display area 112, sender information (e.g., The name, telephone number, email address, etc. of the follower may be displayed. When a call is received, the caller information is displayed in the second display area 112 and the third display area 113. This shows an example of a case where the

[0042] In addition, Fig. 5(A) and (B) show examples of the usage state of electronic devices different from those described above. ), a plurality of icons 121 are displayed in the first display area 111, and a plurality of icons 121 are displayed in the second display area 11 A slide bar 125 is displayed on the screen 2. When the slide bar 125 is touched with a finger 126 or the like, By moving the slide bar up and down while pressing the The display contents such as icon 121 displayed on screen 1 will slide up and down accordingly. In (A) and (B), the slide bar 125 is slid downward by a finger 126, A plurality of images such as icons 121 are displayed in the first display area 111 and the third display area 113. 4 shows the state in which the key is slid upward.

[0043] In this example, the image displayed in the first display area 111 is an icon. However, this is not limited to this, and various information such as document information, images, and videos can be displayed depending on the application being launched. The slide bar 125 can be used to slide and display various information. In addition to the display area 112, the first display area 111, the third display area 113, or the fourth display area The display area 114 may also be arranged.

[0044] In addition, during standby time when the electronic device is not in use, The display of the first display area 111 is turned off (for example, black display), and the second display area 112 is turned on (for example, black display). Alternatively, information may be displayed only in the display area 112, etc., which is larger than the other areas. By not displaying the first display area 111, power consumption during standby can be reduced. This can be done.

[0045] In addition, the touch panel 110 is not touched at the position where it overlaps with the display panel 110, specifically, at the area where it overlaps with each display area. It is preferable that the touch sensor has a sheet-shaped capacitance type. The touch sensor may be provided on the display panel 110. 110 uses a so-called in-cell type touch panel that has a touch sensor function in the As an in-cell type touch panel, a capacitive touch sensor may be applied. Alternatively, an optical touch sensor using a photoelectric conversion element may be applied.

[0046] For example, in the configuration shown in FIG. 4, a first display area 111, a second display area 112, a third display area 113, and a A combination of touch operations on the first display area 113 and the fourth display area 114 It is preferable to associate the setting with the operation of the application.

[0047] As an example, the second display area 112, the third display area 113, and the fourth display area 114 are The following table shows examples of combinations of touch operations and their association with application actions. For example, when all three display areas are touched, the power can be turned on and off. In addition, when a touch operation is performed simultaneously on the second display area 112 and the fourth display area 114, When you click this, the application related to the email will start and the contents of the email will be displayed. In addition, when a touch operation is performed simultaneously on the second display area 112 and the third display area 113, When the user presses the button, a call application is launched. When the touch operation is performed simultaneously on the fourth display area 113 and the fourth display area 114, the browser is started. Move.

[0048] [Table 1]

[0049] Note that the above-mentioned association between the touch operation and the application is an example. It is preferable that developers of operating systems and application software, as well as users, can set it appropriately. It is.

[0050] Alternatively, when the first display area 111 is touched, any of the second to fourth display areas is touched. Touch one or more buttons to perform the action of each application. This can prevent unintended operations from being executed.

[0051] In this way, the combination of touch actions in multiple areas can be linked to the application's actions. By attaching the device, intuitive operations can be performed, making it a user-friendly human interface. It is possible to realize the face.

[0052] The electronic device according to one embodiment of the present invention displays not only on the top surface of the housing but also along two or more side surfaces. This makes it possible to produce a wider variety of display expressions than with conventional electronic devices. In addition, by providing touch sensors in each display area, it is possible to perform a variety of operations compared to conventional electronic devices. This makes it possible to realize electronic devices that can be operated more intuitively.

[0053] Here, an example of performing various displays using the display panel 110 has been shown. One aspect of the present invention is not limited to this. For example, As an example, instead of the display panel 110, It may also be used as a lighting device. By applying it to a lighting device, it will become an interior design with excellent design. It can be used as a light that can illuminate in various directions. Alternatively, instead of the display panel 110, a backlight or a front light can be used. In other words, the display panel may be used as a part of the display panel. It may also be used as a lighting device for the room.

[0054] [Display panel configuration example] Next, a configuration example of a display panel that can be used in the electronic device of one embodiment of the present invention will be described. This will be described with reference to the drawings.

[0055] FIG. 6A is a schematic top view of a display panel 110 exemplified below. The liquid crystal display device 0 includes a flexible substrate 102 and has a plurality of pixels formed on the substrate 102. The display panel 110 includes a first display area 111, a second display area 112, and a third display area 113. 13 and a fourth display area 114. Note that, for clarity, These are clearly indicated by different hatching patterns.

[0056] The first display area 111 has a quadrilateral shape. The second display area 112 has 1, the first display area 111 is provided with a first side 131, which is adjacent to one of the four sides that define the outline of the first display area 111. The first side 13 of each of the first display area 111 and the second display area 112 is It is preferable that the widths of the third display area 113 and the third display area 114 are the same in the direction parallel to the screen 1. The first display area 11 is provided adjacent to a second side 132 that is adjacent to the first side 131. It is preferable that the widths of the first and third display areas 113 in a direction parallel to the second side 132 are the same. In addition, a second surface is provided at a corner (first corner) formed by a first side 131 and a second side 132. One of the corners of the first display area 112 and one of the corners of the second display area 113 are aligned with each other. It is preferable that

[0057] As shown in FIG. 6A, a first angle formed by a first side 131 and a second side 132 In a region facing the first display region 111 across the substrate 102, a notch 138 is formed. By providing the cutout portion 138 in this manner, the second display area 112 and The third display area 113 can be curved in different directions.

[0058] In FIG. 6A, a fourth surface 132 is in contact with a third side 133 opposite to the first side 131. The fourth display area 114 is provided at one corner thereof with a second It is preferable that the second corner portion is coincident with the second corner portion formed by the side 132 and the third side 133. In the region facing the first display region 111 across the notch portion, the substrate 102 has the notch portion. 138. With this configuration, the fourth display area 114 can be curved in a different direction from the third display area 113.

[0059] In addition, an FPC 10 is provided on a part of the substrate 102 to supply signals and power for driving the pixels. In FIG. 6A, an IC 104 is mounted on an FPC 103 by the COF method. However, if the IC 104 is not required, it may be omitted. Alternatively, the IC 104 may be mounted directly on the FPC 12 using the COF method. It is preferable that the width of the first display area 111 is smaller than the width of the first display area 111. In particular, the second display area 112 and the fourth display area 114 are curved, and the first display area When the area 111 is used in a flat shape, the joint between the FPC 103 and the substrate 102 is curved. Therefore, the FPC 103 can be prevented from peeling off.

[0060] FIG. 6(B) is an enlarged schematic top view of region A in FIG. 6(A).

[0061] In the configuration shown in FIG. 6B, the first display area 111 and the second display area 112 A first driving circuit 141 outputs a signal for driving the pixels included in the first driving circuit 141 and a second driving circuit 142. The second driver circuit 142 outputs a similar signal to the third display area 113. The driving circuit 141 is provided along the side of the second display area 112 opposite to the first side 131. The second driving circuit 142 is connected to the first side 131 of the third display area 113. The first driving circuit 141 and the second driving circuit 142 are provided along the side in the extension direction. 42 are electrically connected by wiring 145, and input is received from the FPC 103 via the wiring 145. The signal to be output may be supplied to the second driver circuit 142.

[0062] FIG. 6(C) shows a configuration different from that shown in FIG. 6(B). In the configuration shown in FIG. 1, a driving circuit 143 is provided instead of the first driving circuit 141. The circuit 143 drives the pixels included in the first display area 111 and the second display area 112. and outputs a signal for driving the pixels included in the third display area 113. The signal output from the driving circuit 143 is transmitted through the wiring 146. and outputting the signals to wirings electrically connected to pixels in the third display region 113. can be done.

[0063] The first drive circuit 141, the second drive circuit 142, and the drive circuit 143 are, for example, A circuit that functions as either a driver circuit or a source driver circuit can be used. In this case, IC104 is used as a source driver circuit. It is preferable that the ion exchange membrane has a function as a ion exchange membrane.

[0064] In this example, a so-called driver-integrated display panel is provided with a driving circuit on the substrate 102. However, a configuration not including a drive circuit may also be used.

[0065] In this manner, the third display region 113 is a first display region that outputs a signal for driving the pixels included in the third display region 113. The second driver circuit 142 or the wiring 146 for supplying a signal for driving the pixel is connected to the first driver circuit 142. By providing the cutout 138 along one side of the display area 113, the area of ​​the cutout 138 can be increased. This makes it possible to reduce the area of ​​the non-display section relative to the surface area of ​​the display panel 110. In addition, when the third display area 113 is curved as shown in FIG. 5, It is preferable to have a configuration in which no drive circuit is provided in the bending section. The electrical characteristics of semiconductor elements such as transistors may change due to the stress. Therefore, such a configuration may cause the output signal from the driver circuit to become unstable. This can be avoided.

[0066] Although FIG. 6 shows a configuration having first to fourth display areas, the first to third display areas Alternatively, the display device may be configured to include a fifth display area 115. FIG. 7A shows a schematic top view of the fifth display region 115. The wiring and the drive circuit between the fifth display area 115 and the second display area 112 are configured as shown in FIG. 6(B) or a configuration similar to that shown in FIG. 6(C) may be used.

[0067] FIG. 7B shows an example of a configuration in which an FPC 103a is provided. For example, the display panel has a function of supplying signals and power to each of the driving circuits exemplified above. If the panel 110 does not have a drive circuit, the IC is mounted on the FPC 103a using the COF method or similar. You may do so.

[0068] Here, the pixels included in each display area provided on the display panel 110 and the It is preferable to use an oxide semiconductor for a semiconductor device such as a transistor to be used in the semiconductor device. It is preferable to use an oxide semiconductor having a larger band gap than silicon for the silicon. If a semiconductor material with a wider band gap and lower carrier density than that of a capacitor is used, This is preferable because it can reduce the current when the transistor is in the off state.

[0069] For example, the oxide semiconductor may contain at least indium (In) or zinc (Zn It is preferable that the oxide contains In-M-Zn (wherein M is Al, Ti, Metals such as Ga, Ge, Y, Zr, Sn, La, Ce or Hf) are included. nothing.

[0070] In particular, the semiconductor layer has a plurality of crystal parts, and the crystal parts have a c-axis aligned with a surface on which the semiconductor layer is formed. or oriented perpendicular to the upper surface of the semiconductor layer and having no grain boundary between adjacent crystal portions. An oxide semiconductor film is preferably used.

[0071] Such an oxide semiconductor does not have crystal grain boundaries, so that when the display panel is curved, The occurrence of cracks in the oxide semiconductor film due to stress is suppressed. Such oxide semiconductors are suitable for use in display panels that are flexible and can be curved. There can be.

[0072] By using such materials for the semiconductor layer, the fluctuation of electrical characteristics is suppressed, and reliability is improved. This allows for high-performance transistors.

[0073] In addition, due to its low off-state current, the charge stored in the capacitance through the transistor can be released for a long period of time. By applying such a transistor to a pixel, It is also possible to stop the driving circuit while maintaining the gradation of the image displayed in the display area. As a result, it is possible to realize electronic equipment with extremely reduced power consumption.

[0074] Regarding preferred forms of oxide semiconductors applicable to the semiconductor layer and methods for forming the same, This will be explained in detail in a later embodiment.

[0075] In addition, the pixels included in each display area provided on the display panel 110 and the driving circuits A polycrystalline semiconductor may be used for a semiconductor device such as a transistor. It is preferable to use polycrystalline silicon. Polycrystalline silicon can be formed at a lower temperature than single crystal silicon. It has high field effect mobility and high reliability compared to amorphous silicon. By applying such a polycrystalline semiconductor to pixels, the aperture ratio of the pixels can be improved. Even if the pixels are extremely fine, the gate driver circuit and the source driver circuit It is possible to form the display on the same substrate as the pixels, which reduces the number of components that make up electronic devices. This can be done.

[0076] Here, an example of a case where a sheet-shaped touch sensor is provided over the display panel 110 will be described. This will be explained with reference to FIG.

[0077] FIG. 8A shows a state in which a part of a display panel 110 having an FPC 103 is curved. FIG. 8B shows a touch sensor 105 in the form of a sheet attached to a curved surface of a display panel 110. The touch sensor 105 is bent along the FPC 106. is.

[0078] FIG. 8C shows an example of a state in which the display panel 110 and the touch sensor 105 are overlapped. At this time, as shown in FIG. 8C, the FPC 103 provided on the display panel 110 and the It is preferable to arrange the FPC 106 provided on the touch sensor 105 so as not to overlap with the FPC 106. Therefore, the display panel 110 and the touch sensor 105 are not made to have the same shape. In the area where the FPC 103 or FPC 106 is attached, the display panel 110 and the touch sensor It is preferable that they have different shapes so that they do not overlap with each other.

[0079] In this way, the display panel 110 and the sheet-like touch sensor 105 are overlapped, By incorporating the inside of the housing 101, not only the top surface of the housing but also parts of the side and back surface It is also possible to add touch functionality to the

[0080] This embodiment may be combined with other embodiments described in this specification, at least in part. It can be implemented in combination.

[0081] (Embodiment 2) In this embodiment, a foldable LCD panel that can be used for an electronic device according to one embodiment of the present invention will be described. The configuration of the touch panel will be described with reference to FIG.

[0082] FIG. 9A is a diagram illustrating a structure of a touch panel that can be used for an electronic device of one embodiment of the present invention. FIG.

[0083] FIG. 9B is a cross-sectional view taken along line AB and line CD in FIG. 9A.

[0084] FIG. 9C is a cross-sectional view taken along line EF in FIG. 9A.

[0085] <Explanation of top view> A touch panel 300 exemplified in this embodiment has a display portion 301 (see FIG. 9A). ).

[0086] The display unit 301 includes a plurality of pixels 302 and a plurality of imaging pixels 308. This allows the detection of a finger or the like touching the display unit 301. A touch sensor can be formed using the above-mentioned.

[0087] The pixel 302 includes a plurality of sub-pixels (e.g., sub-pixel 302R). and a pixel circuit capable of supplying power to drive the light-emitting element.

[0088] The pixel circuit includes wiring that can supply a selection signal and a line that can supply an image signal. The semiconductor device is electrically connected to a wiring that can be connected to the semiconductor device.

[0089] The touch panel 300 also includes a scan line driver that can supply a selection signal to the pixel 302. A circuit 303g(1) and an image signal line driving circuit capable of supplying an image signal to the pixel 302. It has a path 303s(1).

[0090] The imaging pixel 308 includes a photoelectric conversion element and an imaging pixel circuit that drives the photoelectric conversion element. .

[0091] The imaging pixel circuit is provided with wiring capable of supplying a control signal and a power supply potential. The wires can be electrically connected.

[0092] The control signal may be, for example, a signal to select an imaging pixel circuit that reads out a recorded imaging signal. a signal that can initialize the imaging pixel circuit; and a signal that can detect when the imaging pixel circuit detects light. Examples of such signals include signals that can determine the time to be detected.

[0093] The touch panel 300 includes an imaging pixel driver that can provide control signals to the imaging pixels 308. and an image pickup signal line drive circuit 303s(2) that reads out an image pickup signal. .

[0094] <Explanation of the cross-sectional view> The touch panel 300 includes a substrate 310 and an opposing substrate 370 that faces the substrate 310. (See FIG. 9(B)).

[0095] The substrate 310 is a flexible substrate 310b, which prevents unintended diffusion of impurities into the light emitting element. A barrier film 310a for preventing the formation of a barrier layer 310a and an adhesive layer 31 for bonding the barrier film 310a to the substrate 310b. 0c is a laminated body.

[0096] The opposing substrate 370 is a flexible substrate 370b, which prevents unintended impurities from spreading to the light emitting element. A barrier film 370a for preventing diffusion and an adhesive layer for bonding the barrier film 370a to the substrate 370b. 370c (see FIG. 9(B)).

[0097] The sealing material 360 bonds the opposing substrate 370 and the substrate 310 together. The layer has a refractive index higher than that of air and also serves as an optical bonding layer. The light emitting element 350 R is located between the substrate 310 and the opposing substrate 370 .

[0098] 《Pixel Structure》 The pixel 302 includes a subpixel 302R, a subpixel 302G, and a subpixel 302B (FIG. 9 Also, the subpixel 302R includes a light-emitting module 380R, and the subpixel 302G includes a light-emitting module 380R. The subpixel 302A includes a light emitting module 380G, and the subpixel 302B includes a light emitting module 380B.

[0099] For example, subpixel 302R supplies power to light emitting element 350R and light emitting element 350R. The pixel circuit includes a transistor 302t that can The light emitting module 380R includes a light emitting element 350R and an optical element (e.g., a color layer 367R). Prepare.

[0100] The light emitting element 350R includes a lower electrode 351R, an upper electrode 352, and a lower electrode 351R and an upper electrode 353. Between the poles 352, there is a layer 353 containing a light-emitting organic compound (see FIG. 9(C)).

[0101] The layer 353 containing a light-emitting organic compound includes a light-emitting unit 353a, a light-emitting unit 353b, and a light-emitting An intermediate layer 354 is provided between the light-emitting unit 353a and the light-emitting unit 353b.

[0102] The light emitting module 380R has a colored layer 367R on the opposing substrate 370. Any material that transmits light having a wavelength of red, green, or blue may be used. A material that selectively transmits light can be used. Alternatively, the light emitted by the light-emitting element can be directly transmitted through the material. Alternatively, a transparent region may be provided.

[0103] For example, the light emitting module 380R includes a sealing layer in contact with the light emitting element 350R and the color layer 367R. The substrate 360 ​​has a material 360 .

[0104] The colored layer 367R is located so as to overlap the light emitting element 350R. A part of the light emitted by R passes through the sealing material 360, which also serves as an optical bonding layer, and the colored layer 367R. Then, the light is emitted to the outside of light emitting module 380R as indicated by the arrow in the figure.

[0105] In this embodiment, a light-emitting element is used as a display element. The embodiment is not limited thereto.

[0106] For example, in this specification, a display element, a display device having a display element, a light-emitting device, A light-emitting device, which is a device having an element and a light-emitting element, can be used in various forms or can be used in various forms. As an example of a display element, a display device, a light-emitting element, or a light-emitting device, EL (electroluminescence) elements (EL elements including organic and inorganic materials, organic EL LED elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc. etc.), transistors (transistors that emit light according to current), electron emission elements, liquid crystal elements, Electronic ink, electrophoretic element, grating light valve (GLV), plasma display ray (PDP), MEMS (Micro Electro Mechanical Systems), Digital Micromirror Device (DMD), DMS (Digital Micro Shutter), MI RASOL (registered trademark), IMOD (Interference Modulation) element, Electrowetting elements, piezoelectric ceramic displays, carbon nanotubes, Displays whose contrast, brightness, reflectance, transmittance, etc. change due to electromagnetic effects. An example of a display device using an EL element is an EL display. An example of a display device using electron-emitting elements is a field emission display. Flat-panel display (FED) or flat-panel display (SED:Surface-c Induction Electron-emitter Display) An example of a display device using a liquid crystal element is a liquid crystal display (transmissive liquid crystal display). Semi-transmissive LCD, reflective LCD, direct-view LCD, A type of display device that uses electronic ink or electrophoretic elements. An example is electronic paper.

[0107] <Touch panel configuration> The touch panel 300 has a light-shielding layer 367BM on the opposing substrate 370. M is provided so as to surround a colored layer (for example, the colored layer 367R).

[0108] The touch panel 300 includes an anti-reflection layer 367p at a position overlapping the display unit 301. As the antireflection layer 367p, for example, a circular polarizing plate can be used.

[0109] The touch panel 300 includes an insulating film 321. The insulating film 321 is connected to the transistor 302t. The insulating film 321 serves as a layer for flattening unevenness caused by the pixel circuits. In addition, the diffusion of impurities into the transistor 302t and the like can be suppressed. An insulating film in which layers capable of doing so are stacked can be used as the insulating film 321.

[0110] The touch panel 300 has a light emitting element (for example, a light emitting element 350R) on an insulating film 321. do.

[0111] The touch panel 300 has a partition wall 328 that overlaps an end of the lower electrode 351R on the insulating film 321. In addition, a space for controlling the distance between the substrate 310 and the counter substrate 370 is provided (see FIG. 9C). The separator 329 is disposed on the partition wall 328 .

[0112] Configuration of the Image Signal Line Driving Circuit The image signal line driver circuit 303s(1) includes a transistor 303t and a capacitor 303c. The driver circuit can be formed on the same substrate as the pixel circuit in the same process. As shown in FIG. 1B, the transistor 303t has a second gate on the insulating film 321. The second gate may be electrically connected to the gate of the transistor 303t. However, these may be given different potentials. If necessary, the second gate may be It may be provided in the transistor 308t, the transistor 302t, and the like.

[0113] <Imaging pixel configuration> The imaging pixel 308 is a photoelectric conversion element 308p and a light beam irradiated on the photoelectric conversion element 308p. The imaging pixel circuit includes a transistor 308t Includes.

[0114] For example, a pin-type photodiode can be used as the photoelectric conversion element 308p.

[0115] Other configurations The touch panel 300 includes wiring 311 through which a signal can be supplied, and a terminal 319. The wiring 311 is provided to supply signals such as image signals and synchronization signals. The FPC 309(1) is electrically connected to the terminal 319.

[0116] In addition, a printed wiring board (PWB) may be attached to the FPC309(1). stomach.

[0117] The transistors formed in the same process are transistor 302t, transistor 303 t, transistor 308t, and the like.

[0118] The transistor structure may be a bottom gate type, a top gate type, or the like. A transistor can be applied.

[0119] In addition to the gate, source, and drain of the transistor, the various wiring that makes up the touch panel Possible materials for the wires and electrodes include aluminum, titanium, chromium, nickel, Kel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten A single metal consisting of arsenic or an alloy consisting mainly of this metal is used in a single-layer structure or a multilayer structure. For example, a single layer structure of an aluminum film containing silicon, an aluminum film on a titanium film, A two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which an aluminum film is laminated on a tungsten film, a copper-magnesium film, A two-layer structure in which a copper film is laminated on a titanium film. a two-layer structure in which a copper film is laminated on a tungsten film; a two-layer structure in which a titanium film or a titanium nitride film is laminated on a tungsten film; Then, an aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and A three-layer structure in which a titanium film or titanium nitride film is formed on the first layer, a molybdenum film or a nitride film A molybdenum film and an aluminum film or a molybdenum nitride film are laminated on the molybdenum film or the molybdenum nitride film. A three-layer structure is formed by laminating a copper film on a silicon substrate and then forming a molybdenum film or a molybdenum nitride film on the copper film. The structure includes transparent conductive materials including indium oxide, tin oxide, or zinc oxide. In addition, when copper containing manganese is used, the controllability of the shape by etching is improved. Therefore, it is preferable.

[0120] Transistors such as transistor 302t, transistor 303t, and transistor 308t It is preferable that the above-mentioned oxide semiconductor is used as the semiconductor in which the channel of the oxide is formed. A preferred embodiment of the compound semiconductor will be described in detail later in the embodiments.

[0121] In addition, transistors such as transistor 302t, transistor 303t, and transistor 308t Silicon may be used as the semiconductor in which the channel of the transistor is formed. Although amorphous silicon may be used, it is particularly preferable to use silicon having crystallinity. For example, it is preferable to use microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon, and is amorphous. Compared to thick silicon, this polycrystalline semiconductor has high field effect mobility and high reliability. By applying a conductor to the pixel, the aperture ratio of the pixel can be improved. Even if the pixel is located on the same substrate as the pixel, the gate driver circuit and the source driver circuit are located on the same substrate as the pixel. This makes it possible to reduce the number of parts constituting the electronic device.

[0122] A method for forming a flexible light emitting panel will now be described.

[0123] For the sake of convenience, the term "pixels and driving circuits" refers to a configuration including optical members such as color filters. The element layer includes, for example, a display element, and in addition to the display element, It has wiring that electrically connects elements, and elements such as transistors used in pixels and circuits. Good too.

[0124] In addition, the support having an insulating surface on which the element layer is formed is referred to as a substrate. Let us assume that.

[0125] As a method for forming an element layer on a substrate having a flexible insulating surface, A method for forming a contact layer and forming an element layer on a support substrate having a different rigidity from the substrate Thereafter, the element layer is peeled off from the supporting base material and the element layer is transferred to the base material.

[0126] When the material constituting the base material has heat resistance against the heat applied in the process of forming the element layer, It is preferable to form the element layer directly on the substrate, since this simplifies the process. When the element layer is formed in a state where the substrate is fixed to the support substrate, the substrate can be easily transported within and between devices. This is preferable because it makes things easier.

[0127] In addition, when a method is used in which an element layer is formed on a supporting substrate and then transferred to the substrate, the supporting substrate is first A release layer and an insulating layer are laminated on the support substrate, and an element layer is formed on the insulating layer. The support substrate and the element layer are peeled off and transferred to the substrate. Materials may be selected such that release occurs at the interface of the edge layer or in the release layer.

[0128] For example, a layer containing a high melting point metal material such as tungsten as a peeling layer and an oxide layer of the metal material A layer including a substance is laminated, and a layer in which silicon nitride or silicon oxynitride is laminated on a peeling layer It is preferable to use a high melting point metal material. This is desirable.

[0129] Peeling can be achieved by applying mechanical force, etching the peeling layer, or by delaminating the peeling interface. The peeling may be performed by dropping a liquid on a portion of the surface and allowing it to penetrate into the entire peeling interface. Alternatively, the peeling may be performed by applying heat to the peeling interface, utilizing the difference in thermal expansion.

[0130] In addition, when peeling is possible at the interface between the support substrate and the insulating layer, it is not necessary to provide a peeling layer. For example, glass is used as the support substrate, and an organic resin such as polyimide is used as the insulating layer. A part of the organic resin is locally heated using a laser beam or the like to form a peeling starting point. The separation may be performed at the interface between the glass and the insulating layer. Providing a metal layer between the edge layers and heating the metal layer by passing an electric current through the metal layer. The metal layer and the insulating layer may be peeled off at the interface by using an organic resin. The insulating layer can be used as the substrate.

[0131] Examples of flexible substrates include polyethylene terephthalate (PET), poly Polyester resins such as ethylene naphthalate (PEN), polyacrylonitrile resins, Polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethylene Polyethersulfone (PES) resin, polyamide resin, cycloolefin resin, polystyrene Resins, polyamide-imide resins, polyvinyl chloride resins, etc. are examples. In particular, It is preferable to use a material with a low thermal expansion coefficient, for example, 30×10 -6 / K or less Polyamide-imide resin, polyimide resin, PET, etc. can be suitably used. Substrates made of resin-impregnated fibers (also called prepregs) and inorganic fillers mixed with organic resins It is also possible to use a substrate having a reduced thermal expansion coefficient.

[0132] When the above materials contain fibrous bodies, the fibrous bodies are made of high strength organic or inorganic compounds. High strength fibers are specifically fibers with high tensile modulus or Young's modulus. Representative examples are polyvinyl alcohol fibers, polyester fibers, polya Mid fiber, polyethylene fiber, aramid fiber, polyparaphenylene benzobisoxy Examples of the fiberglass include Sasol fiber, glass fiber, and carbon fiber. Examples of glass fibers include those made of glass fiber such as S-glass, D-glass, and Q-glass. Alternatively, it is used in the form of a nonwoven fabric, and the structure in which the fiber body is impregnated with resin and the resin is hardened is made flexible. As a substrate having flexibility, a substrate made of a fiber body and a resin may be used. The use of a structure is preferable because it improves reliability against damage caused by bending or local pressure. stomach.

[0133] Note that the display device of one embodiment of the present invention is an active matrix type display device having an active element in a pixel. Alternatively, a passive matrix system in which the pixels do not have active elements can be used.

[0134] In the active matrix method, a transistor is used as an active element (active element, nonlinear element). By using not only transistors but also various active elements (active elements, nonlinear elements), For example, MIM (Metal Insulator Metal) or T It is also possible to use FD (Thin Film Diode) and other elements. Since the number of manufacturing steps is small, it is possible to reduce manufacturing costs and improve yields. Alternatively, these elements can improve the aperture ratio due to their small size. This makes it possible to achieve low power consumption and high brightness.

[0135] As a non-active matrix type, active elements (active elements, nonlinear elements It is also possible to use a passive matrix type that does not use active elements. By not using elements such as nonlinear elements, the number of manufacturing steps is reduced, resulting in reduced manufacturing costs. This can improve the yield. Or, active elements (active elements, nonlinear elements ) can improve the aperture ratio, leading to lower power consumption, higher brightness, etc. It is possible to achieve this.

[0136] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0137] (Embodiment 3) In this embodiment, a foldable LCD panel that can be used for an electronic device according to one embodiment of the present invention will be described. The configuration of the touch panel will be described with reference to FIG.

[0138] FIG. 10 is a cross-sectional view of the touch panel 500.

[0139] The touch panel 500 includes a display unit 501 and a touch sensor 595. The panel 500 includes a substrate 510, a substrate 570, and a substrate 590. Both substrate 570 and substrate 590 are flexible.

[0140] The display unit 501 includes a substrate 510, a plurality of pixels on the substrate 510, and a signal supply unit for supplying signals to the pixels. The plurality of wirings 511 are arranged on the outer periphery of the substrate 510. The terminal 519 is connected to the FPC 509 ( 1) and electrically connect it.

[0141] <Touch sensor> The substrate 590 includes a touch sensor 595 and a plurality of electrodes electrically connected to the touch sensor 595. The wiring 598 is routed around the periphery of the substrate 590, and a part of the wiring 598 is constitutes a terminal, which is electrically connected to FPC509(2).

[0142] As the touch sensor 595, for example, a capacitive touch sensor can be used. The capacitance type includes a surface type capacitance type and a projected type capacitance type.

[0143] The projected capacitive type is classified into self-capacitance type, mutual capacitance type, etc., mainly based on the difference in the driving method. The mutual capacitance method is preferable because it enables simultaneous multi-point detection.

[0144] In the following, a case where a projected capacitive touch sensor is applied will be described.

[0145] In addition, various sensors capable of detecting the proximity or contact of a detection target such as a finger are used. It can be used.

[0146] The projected capacitive touch sensor 595 has an electrode 591 and an electrode 592. 591 is electrically connected to one of the multiple wirings 598, and the electrode 592 is connected to the multiple wirings 598. The other of the two is electrically connected to the other of the two.

[0147] The wiring 594 electrically connects the two electrodes 591 that sandwich the electrode 592. It is preferable that the area of ​​the intersection between the pole 592 and the wiring 594 be as small as possible. This reduces the area of ​​the region where no electrodes are provided, and reduces unevenness in transmittance. As a result, unevenness in the luminance of the light passing through the touch sensor 595 can be reduced.

[0148] The electrodes 591 and 592 may have various shapes. 91 are arranged so that there is as little gap as possible, and the electrode 592 is connected to the electrode 59 via an insulating layer. A configuration may be adopted in which a plurality of the electrodes are provided at intervals so that there is an area that does not overlap with the adjacent electrodes. If a dummy electrode that is electrically insulated from the two adjacent electrodes 592 is provided between them, This is preferable because the area of ​​the region with different transmittance can be reduced.

[0149] The touch sensor 595 includes a substrate 590, electrodes 591 arranged in a staggered pattern on the substrate 590, and The insulating layer 593 covers the electrodes 591 and 592, and the adjacent electrodes 591 and 592. The wiring 594 electrically connects the

[0150] The adhesive layer 597 is formed on the substrate 590 so that the touch sensor 595 overlaps the display unit 501. It is pasted onto board 570.

[0151] The electrode 591 and the electrode 592 are formed using a light-transmitting conductive material. The conductive materials that can be used are indium oxide, indium tin oxide, and indium zinc oxide. , zinc oxide, zinc oxide doped with gallium, or other conductive oxides, or graphene. It is possible.

[0152] After forming a film of a light-transmitting conductive material on a substrate 590 by a sputtering method, By using various patterning techniques such as lithography, unnecessary parts are removed to form electrodes 59. 1 and the electrode 592 can be formed. Graphene can be obtained by a CVD method or by graphene oxide. Alternatively, the film may be formed by applying a solution in which the fluorine is dispersed and then reducing the solution.

[0153] The material used for the insulating layer 593 is, for example, a resin such as acrylic or epoxy. In addition to resins with siloxane bonds, silicon oxide, silicon oxynitride, and aluminum oxide It is also possible to use inorganic insulating materials such as the above.

[0154] An opening reaching the electrode 591 is provided in the insulating layer 593, and a wiring 594 is connected to the adjacent electrode 591 is electrically connected. The transparent conductive material increases the aperture ratio of the touch panel. Therefore, the electrode 591 and the electrode 59 can be suitably used for the wiring 594. A material having a higher electrical conductivity than 2 can be preferably used for the wiring 594 since it can reduce electrical resistance. can.

[0155] One electrode 592 extends in one direction, and multiple electrodes 592 are provided in a stripe pattern. .

[0156] The wiring 594 is provided so as to intersect with the electrodes 592 .

[0157] A pair of electrodes 591 are provided with one electrode 592 sandwiched therebetween, and wiring 594 is connected to the pair of electrodes 591 are electrically connected.

[0158] The multiple electrodes 591 do not necessarily have to be arranged in a direction perpendicular to one electrode 592. However, the angle between the first and second electrodes may be less than 90 degrees.

[0159] One of the wirings 598 is electrically connected to the electrode 591 or the electrode 592. The wiring 598 is made of, for example, aluminum, gold, platinum, silver, etc. , nickel, titanium, tungsten, chromium, molybdenum, iron, cobalt, copper, or para For example, a metal material such as zinc or an alloy material containing such a metal material can be used.

[0160] An insulating layer is provided to cover the insulating layer 593 and the wiring 594 to protect the touch sensor 595. It is possible.

[0161] Furthermore, the connection layer 599 electrically connects the wiring 598 and the FPC 509(2).

[0162] The connection layer 599 is an anisotropic conductive film (ACF). Conductive Film) and Anisotropic Conductive Paste (ACP) c Conductive Paste) can be used.

[0163] The adhesive layer 597 is transparent. For example, a thermosetting resin or an ultraviolet curing resin may be used. Specifically, the resin may have an acrylic, urethane, epoxy, or siloxane bond. Resins such as resins can be used.

[0164] <Display> The display unit 501 includes a plurality of pixels arranged in a matrix. The pixel circuit drives the display element.

[0165] In this embodiment, a white organic electroluminescence element is applied to a display element. However, the display element is not limited to this.

[0166] For example, display elements include organic electroluminescence elements, electrophoretic elements, and Display elements that display images using a liquid crystal display method (also called electronic ink), shutter-type Various display elements can be used, such as MEMS display elements and optical interference type MEMS display elements. In addition, a suitable configuration for the display element to be applied can be selected from various pixel circuits. This can be done.

[0167] The substrate 510 is a flexible substrate 510b, which prevents unintended diffusion of impurities into the light emitting element. A barrier film 510a for preventing the formation of a barrier layer 510a and an adhesive layer 51 for bonding the barrier film 510a to the substrate 510b. 0c is a laminated body.

[0168] The substrate 570 is a flexible substrate 570b, which prevents unintended diffusion of impurities into the light emitting element. and an adhesive layer 57 that bonds the barrier film 570a to the substrate 570b. It is a laminate of 0c.

[0169] The sealing material 560 bonds the substrate 570 and the substrate 510 together. In addition, when light is extracted to the sealing material 560 side, the sealing material 560 is The pixel circuit and the light emitting element (for example, the light emitting element 550R) are connected to the substrate 510. Between the substrates 570 .

[0170] 《Pixel Structure》 The pixel includes a sub-pixel 502R, which comprises a light-emitting module 580R.

[0171] The subpixel 502R provides power to the light emitting element 550R and the first light emitting element 550R. The pixel circuit includes a transistor 502t that can emit light. 0R includes a light emitting element 550R and an optical element (eg, color layer 567R).

[0172] The light-emitting element 550R includes a lower electrode, an upper electrode, and a light-emitting organic compound between the lower electrode and the upper electrode. The layer includes a compound.

[0173] The light emitting module 580R has a colored layer 567R in the direction in which light is extracted. Any material that transmits light having a certain wavelength may be used, for example, red, green, or blue. In addition, in other sub-pixels, a light-emitting element that selectively transmits light can be used. A region that transmits the light emitted by the element may be provided.

[0174] In addition, when the sealing material 560 is provided on the side from which light is extracted, the sealing material 560 is the first It contacts the light emitting element 550R and the colored layer 567R.

[0175] The colored layer 567R is located so as to overlap the light emitting element 550R. A part of the light emitted by R passes through the colored layer 567R and reaches the light emitting module in the direction of the arrow shown in the figure. It is ejected from the exterior of the 580R.

[0176] Display Configuration The display unit 501 has a light-shielding layer 567BM in the light-emitting direction. , are provided so as to surround a colored layer (for example, the colored layer 567R).

[0177] The display unit 501 includes an anti-reflection layer 567p at a position overlapping the pixel. For example, a circular polarizing plate can be used as p.

[0178] The display unit 501 includes an insulating film 521. The insulating film 521 covers the transistor 502t. The insulating film 521 is used as a layer for flattening unevenness caused by the pixel circuit. In addition, a laminated film including a layer capable of suppressing the diffusion of impurities can be applied to the insulating film 521. This can prevent the transistor 502t etc. from being damaged by unexpected diffusion of impurities. This can suppress the deterioration of reliability.

[0179] The display unit 501 has a light-emitting element (eg, a light-emitting element 550R) on an insulating film 521.

[0180] The display unit 501 has a partition wall 528 on an insulating film 521, the partition wall 528 overlapping an end of the lower electrode. A spacer for controlling the distance between the substrate 510 and the substrate 570 is provided on the partition wall 528 .

[0181] Configuration of the Scanning Line Driving Circuit The scanning line driver circuit 503g(1) includes a transistor 503t and a capacitor 503c. Note that the driver circuit and the pixel circuit can be formed over the same substrate in the same process.

[0182] Other configurations The display unit 501 includes a wiring 511 capable of supplying a signal, and a terminal 519 is connected to the wiring 511. 11. In addition, signals such as image signals and synchronization signals can be supplied. The FPC 509 ( 1 ) is electrically connected to the terminal 519 .

[0183] In addition, a printed wiring board (PWB) may be attached to the FPC509(1). stomach.

[0184] <Display section modification example 1> Various transistors can be used for the display portion 501 .

[0185] A configuration in which a bottom-gate transistor is applied to the display portion 501 is shown in FIG. and is illustrated in FIG.

[0186] For example, a semiconductor layer containing an oxide semiconductor, amorphous silicon, or the like is formed as shown in FIG. This can be applied to the transistor 502t and the transistor 503t shown.

[0187] For example, a semiconductor layer containing polycrystalline silicon or the like is formed into a transistor 5 shown in FIG. 02t and transistor 503t.

[0188] A structure in which a top-gate transistor is applied to the display portion 501 is shown in FIG. As illustrated in the figure.

[0189] For example, a semiconductor layer including polycrystalline silicon or a transferred single crystal silicon film is formed on the substrate as shown in FIG. 0(C) can be applied to the transistor 502t and the transistor 503t shown in FIG. can.

[0190] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0191] (Embodiment 4) In this embodiment, a foldable LCD panel that can be used for an electronic device according to one embodiment of the present invention will be described. The configuration of the touch panel will be described with reference to FIG.

[0192] FIG. 11 is a cross-sectional view of touch panel 500B.

[0193] The touch panel 500B described in this embodiment converts supplied image information into transistors. The display unit 501 that displays on the side where the touch sensor is provided is provided. The difference from the touch panel 500 described in the third embodiment is that the touch panel 500 is provided on the plate 510 side. Here, the different configurations are described in detail, and where similar configurations can be used, , the above explanation is incorporated herein by reference.

[0194] <Display> The display unit 501 includes a plurality of pixels arranged in a matrix. The pixel circuit drives the display element.

[0195] 《Pixel Structure》 The pixel includes a sub-pixel 502R, which comprises a light-emitting module 580R.

[0196] The subpixel 502R can supply power to the light-emitting element 550R and the light-emitting element 550R. The pixel circuit includes a transistor 502t.

[0197] The light emitting module 580R includes a light emitting element 550R and an optical element (e.g., a color layer 567R). Equipped with.

[0198] The light-emitting element 550R includes a lower electrode, an upper electrode, and a light-emitting organic compound between the lower electrode and the upper electrode. The layer includes a compound.

[0199] The light emitting module 580R has a colored layer 567R in the direction in which light is extracted. Any material that transmits light having a certain wavelength may be used, for example, red, green, or blue. In addition, in other sub-pixels, a light-emitting element that selectively transmits light can be used. A region that transmits the light emitted by the element may be provided.

[0200] The colored layer 567R is located so as to overlap the light-emitting element 550R. The optical element 550R emits light toward the side where the transistor 502t is provided. A part of the light emitted by the light emitting element 550R is transmitted through the colored layer 567R and is reflected by the arrows in the figure. The light is emitted to the outside of the light emitting module 580R in the direction of the arrow.

[0201] Display Configuration The display unit 501 has a light-shielding layer 567BM in the light-emitting direction. , are provided so as to surround a colored layer (for example, the colored layer 567R).

[0202] The display unit 501 includes an insulating film 521. The insulating film 521 covers the transistor 502t. The insulating film 521 is used as a layer for flattening unevenness caused by the pixel circuit. In addition, a laminated film including a layer capable of suppressing the diffusion of impurities can be applied to the insulating film 521. This can be used to prevent unexpected impurities from diffusing from the colored layer 567R, for example. This can suppress a decrease in reliability of the transistors 502t and the like.

[0203] <Touch sensor> The touch sensor 595 is provided on the substrate 510 side of the display unit 501 (FIG. 11(A)). reference).

[0204] The adhesive layer 597 is between the substrate 510 and the substrate 590, and the display unit 501 and the touch sensor 5 Paste 95 together.

[0205] <Display section modification example 1> Various transistors can be used for the display portion 501 .

[0206] A structure in which a bottom-gate transistor is applied to the display portion 501 is shown in FIG. and is illustrated in FIG.

[0207] For example, a semiconductor layer containing an oxide semiconductor, amorphous silicon, or the like is This can be applied to the transistor 502t and the transistor 503t shown.

[0208] For example, a semiconductor layer containing polycrystalline silicon or the like is formed into a transistor 5 shown in FIG. 02t and transistor 503t.

[0209] A structure in which a top-gate transistor is applied to the display portion 501 is shown in FIG. As illustrated in the figure.

[0210] For example, a semiconductor layer including polycrystalline silicon or a transferred single crystal silicon film is formed on the substrate as shown in FIG. This can be applied to the transistor 502t and the transistor 503t shown in FIG. can.

[0211] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0212] (Embodiment 5) In this embodiment, a semiconductor layer of a semiconductor device that can be used for a display panel of one embodiment of the present invention An oxide semiconductor that can be suitably used will be described.

[0213] Oxide semiconductors have a large energy gap of 3.0 eV or more, making them suitable for The oxide semiconductor film obtained by processing the oxide semiconductor film under suitable conditions and sufficiently reducing the carrier density is applied. In a transistor with a low resistance, the leakage current between the source and drain in the off state (off current) can be made extremely low compared to conventional silicon-based transistors. .

[0214] The applicable oxide semiconductors include at least indium (In) or zinc (Zn It is particularly preferable that the oxide semiconductor contains In and Zn. As a stabilizer to reduce the variation in the electrical characteristics of transistors using In addition to gallium (Ga), tin (Sn), hafnium (Hf), and zirconium (Zr) , titanium (Ti), scandium (Sc), yttrium (Y), lanthanides (e.g. , cerium (Ce), neodymium (Nd), gadolinium (Gd), or It is preferable that one or more kinds of the amine compound are contained.

[0215] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and In-Zn oxide. compounds, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides, Sn-Mg acids oxides, In-Mg oxides, In-Ga oxides, In-Ga-Zn oxides (IGZO (also written as In-Al-Zn oxide, In-Sn-Zn oxide, Sn-Ga- Zn-based oxide, Al-Ga-Zn-based oxide, Sn-Al-Zn-based oxide, In-Hf-Z n-based oxides, In-Zr-Zn-based oxides, In-Ti-Zn-based oxides, In-Sc-Zn In-Y-Zn oxide, In-La-Zn oxide, In-Ce-Zn oxide oxides, In-Pr-Zn oxides, In-Nd-Zn oxides, In-Sm-Zn oxides In-Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide , In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In-Lu-Zn ​​oxide, I n-Sn-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga- Zn-based oxide, In-Sn-Al-Zn-based oxide, In-Sn-Hf-Zn-based oxide, I An n-Hf-Al-Zn oxide can be used.

[0216] Here, the In-Ga-Zn oxide is an oxide having In, Ga, and Zn as the main components. The ratio of In, Ga, and Zn does not matter. The metal elements may be included.

[0217] In addition, as an oxide semiconductor, InMO3(ZnO) m (m>0 and m is not an integer In addition, M is selected from Ga, Fe, Mn, and Co. A metal element or elements, or the above-mentioned stabilizer elements. In addition, as an oxide semiconductor, In2SnO5(ZnO) n (n>0 and n is an integer) Materials represented by the formula:

[0218] For example, In:Ga:Zn=1:1:1, In:Ga:Zn=1:3:2, In:Ga :Zn=1:3:4, In:Ga:Zn=1:3:6, In:Ga:Zn=3:1:2A Or, In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=2:1:3 and its composition It is preferable to use an oxide in the vicinity of the above.

[0219] When a large amount of hydrogen is contained in the oxide semiconductor film, the hydrogen is bonded to the oxide semiconductor. Some of the elements become donors and generate electrons, which are carriers. This causes a transistor Therefore, the threshold voltage of the oxide semiconductor film is shifted in the negative direction. After that, dehydration treatment (dehydrogenation treatment) is performed to remove hydrogen or moisture from the oxide semiconductor film. It is preferable to remove the impurities to obtain a high purity so that the impurities are not included as much as possible.

[0220] Note that the oxide semiconductor film is dehydrated (dehydrogenated) to At the same time, oxygen may also decrease. A process to add oxygen to an oxide semiconductor to compensate for oxygen vacancies that have increased due to oxidation. In this specification and the like, when oxygen is supplied to an oxide semiconductor film, Alternatively, oxygen contained in an oxide semiconductor may be increased to a value lower than the stoichiometric composition. When more oxygen is added, it is sometimes referred to as hyperoxygenation treatment.

[0221] In this manner, the oxide semiconductor film is dehydrated by dehydration treatment (dehydrogenation treatment). By removing oxygen and filling the oxygen vacancies with oxygen addition treatment, the i-type (intrinsic) or The oxide semiconductor film can be an oxide semiconductor film that is nearly i-type and is substantially i-type (intrinsic). Note that the term "substantially intrinsic" means that the number of carriers derived from donors in the oxide semiconductor film is extremely small. (close to zero), carrier density is 1×10 17 / cm 3 Below, 1×10 16 / cm 3 below , 1×10 15 / cm 3 Below, 1×10 14 / cm 3 Below, 1×10 13 / cm 3 Below It says something.

[0222] In addition, a transistor including an i-type or substantially i-type oxide semiconductor film can be For example, a transistor using an oxide semiconductor film can be The drain current when the capacitor is off is 1×10 at room temperature (approximately 25°C). -18 Below A, Preferably 1 x 10 -21 A or less, more preferably 1×10 -24 A or below, or 85 1×10 at °C -15 A or less, preferably 1×10 -18 A or less, more preferably 1x 10 -21 A or less. Note that the off state of a transistor is an n-channel In the case of a transistor of this type, this refers to a state in which the gate voltage is sufficiently smaller than the threshold voltage. In general, if the gate voltage is 1V, 2V, or 3V less than the threshold voltage, , the transistor is turned off.

[0223] The structure of the oxide semiconductor film will be described below.

[0224] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Approximately parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it includes the case where the angle is between 85° and 95°. refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0225] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0226] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Examples of the oxide semiconductor include a semiconductor, a microcrystalline oxide semiconductor, and an amorphous oxide semiconductor.

[0227] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- These include OS, polycrystalline oxide semiconductors, and microcrystalline oxide semiconductors.

[0228] First, let me explain about CAAC-OS. The oxide semiconductor has Axis Aligned Nanocrystals. It is also possible.

[0229] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0230] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly confirm the presence of the CAAC-OS at the grain boundaries. It can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0231] The CAAC-OS observed by TEM is described below. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration corrector function was used. , specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0232] A Cs-corrected high-resolution TEM image of the enlarged area (1) in Figure 12(A) is shown in Figure 12(B). From FIG. 12(B), it can be confirmed that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0233] As shown in FIG. 12(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of each pellet is about 1 nm to 3 nm, and the size of each pellet is about 1 nm to 3 nm. It can be seen that the size of the gap caused by the inclination is about 0.8 nm. The pellets may also be referred to as nanocrystals (nc).

[0234] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 12(D)). Between the pellets observed in FIG. 12(C), The portion where the inclination occurs corresponds to the region 5161 shown in FIG.

[0235] FIG. 13A shows the C The s-corrected high-resolution TEM images are shown for regions (1), (2) and (3) in FIG. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 13(B), Fig. 13(C), and Fig. 13(D), respectively. As shown in Fig. 13(D), Fig. 13(B), Fig. 13(C) and Fig. 13(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0236] Next, C was analyzed by X-ray diffraction (XRD). We will explain AAC-OS. For example, CAAC-O with InGaZnO4 crystals When the structure of S is analyzed using the out-of-plane method, the result is as shown in Figure 14(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. Since this is attributed to the (009) plane of the ZnO4 crystal, it is believed that the CAAC-OS crystal has a c-axis orientation. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0237] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is a structure obtained by the out-of-plane method. The analysis shows a peak at 2θ around 31° and no peak at 2θ around 36°.

[0238] On the other hand, in-pla, X-rays are incident on CAAC-OS from a direction nearly perpendicular to the c-axis. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I It is attributed to the (110) plane of the crystal of nGaZnO4. In the case of CAAC-OS, 2θ is set to 5 The sample was fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in FIG. 14(B). On the other hand, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane, as shown in Figure 14(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and the b-axis is irregular.

[0239] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, a probe diameter of 300 nm was used parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in FIG. This diffraction pattern may appear due to the InGaZnO4 The spots due to the (009) plane of the crystal are included. Therefore, even by electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in FIG. 5(B), a ring-shaped diffraction pattern is observed. Therefore, electron diffraction also It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. In addition, the first ring in FIG. 15(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface, etc.

[0240] In addition, the CAAC-OS is an oxide semiconductor with a low density of defect states. The defects include, for example, defects caused by impurities and oxygen vacancies. AC-OS can also be considered an oxide semiconductor with a low impurity concentration. S can also be said to be an oxide semiconductor with few oxygen vacancies.

[0241] Impurities contained in oxide semiconductors can act as carrier traps or as carrier generation sources. In addition, oxygen vacancies in an oxide semiconductor may become carrier traps or By capturing hydrogen, it can become a carrier generation source.

[0242] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0243] In addition, an oxide semiconductor with a low density of defect states (few oxygen vacancies) has a low carrier density. Such an oxide semiconductor can be a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. CAAC-OS is called an oxide semiconductor. It has a low impurity concentration and a low density of defect states. Therefore, the oxide semiconductor is likely to be a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. A transistor using AC-OS has electrical characteristics in which the threshold voltage is negative (normal Also, it is rare for the product to be pure or substantially pure. Oxide semiconductors have few carrier traps. The charge that is stored in the material takes a long time to be released and behaves like a fixed charge. Therefore, a transistor using an oxide semiconductor with a high impurity concentration and a high density of defect states is required. On the other hand, transistors using CAAC-OS can have unstable electrical characteristics. The resulting transistor has small fluctuations in electrical characteristics and is highly reliable.

[0244] In addition, because the density of defect states in CAAC-OS is low, the electrons are trapped in the defect states by light irradiation. Therefore, the transistor using CAAC-OS has a high The electrical characteristics do not change much when exposed to light or ultraviolet light.

[0245] Next, a microcrystalline oxide semiconductor will be described.

[0246] Microcrystalline oxide semiconductors have regions where crystals can be confirmed in high-resolution TEM images. The microcrystalline oxide semiconductor has a crystal structure including a region in which a crystal part is not clearly observed and a region in which a crystal part is not clearly observed. The crystal part contained is 1 nm to 100 nm or 1 nm to 10 nm in size. In particular, fine crystals with sizes between 1 nm and 10 nm or between 1 nm and 3 nm are often The oxide semiconductor with nanocrystals is called nc-OS (nanocrystallin The nc-OS is called NC-Oxide Semiconductor. In some cases, the grain boundaries cannot be clearly seen in the TEM images. It is possible that the origin of the pellets in C-OS is the same as that of the pellets in C-OS. The crystalline part of the OS is sometimes called a pellet.

[0247] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, an XRD apparatus that uses X-rays with a diameter larger than that of the pellet for nc-OS may be used. When the structure was analyzed using the out-of-plane method, the crystal plane was not shown. In addition, the probe diameter ( For example, electron diffraction (also called selected area electron diffraction) is performed using an electron beam of 50 nm or more. On the other hand, for nc-OS, a halo-like diffraction pattern is observed. Nanobeam electron circuits are used that use an electron beam with a probe diameter close to the size of the pellet or smaller than the pellet. When the nc-OS is folded, spots are observed. In some cases, a bright area with a circular (ring-like) appearance may be observed. Multiple spots may be observed within a ring-like region.

[0248] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0249] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. However, the density of defect states in the nc-OS is lower than that in the amorphous oxide semiconductor. In the case of S, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS is The defect density is higher than that of AAC-OS.

[0250] Next, the amorphous oxide semiconductor will be described.

[0251] Amorphous oxide semiconductors are oxides in which the atomic arrangement in the film is irregular and does not have crystalline parts. An example is an oxide semiconductor that has an amorphous state, such as quartz.

[0252] In the case of an amorphous oxide semiconductor, no crystalline parts can be confirmed in a high-resolution TEM image.

[0253] When the structure of amorphous oxide semiconductors is analyzed using an XRD device, out-of-p In the lane analysis, no peaks indicating crystal planes were detected. When electron diffraction is performed on a conductor, a halo pattern is observed. When nanobeam electron diffraction was performed on the specimen, no spots were observed, only a halo pattern was observed. Observed.

[0254] There are various views on amorphous structures. For example, A structure that does not have this property is called a completely amorphous structure. In addition, the distance between the nearest neighboring atoms or the second nearest neighboring atoms is called the structure. A structure that has order at the interface and no long-range order is sometimes called an amorphous structure. Therefore, according to the strictest definition, an oxide semiconductor that has even a slight degree of order in its atomic arrangement is called a non-crystalline oxide semiconductor. In addition, it cannot be called an crystalline oxide semiconductor. Amorphous oxide semiconductors cannot be called amorphous oxide semiconductors. For example, CAAC-OS and nc-OS can be used as amorphous oxide semiconductors or completely amorphous It cannot be called an oxide semiconductor.

[0255] Note that an oxide semiconductor may have a structure between an nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly called an amorphous-like oxide semiconductor (alumina-like oxide semiconductor). ike OS:amorphous-like Oxide Semiconducto It is called r).

[0256] In a-like OS, voids are observed in high-resolution TEM images. In addition, crystals may be clearly visible in high-resolution TEM images. and regions where no crystalline portion can be confirmed.

[0257] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0258] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as sample B) and CAAC-OS (hereinafter referred to as sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0259] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that all the materials have crystalline parts.

[0260] The crystal part can be determined as follows. For example, the crystal of InGaZnO4 The unit cell has three In-O layers and six Ga-Zn-O layers, for a total of nine layers aligned along the c-axis. It is known that the structure of the quartz crystal is layered in the direction of the lattice. is approximately the same as the lattice spacing (also called d value) of the (009) plane, and this is confirmed by crystal structure analysis. The value of is calculated to be 0.29 nm. Therefore, if the lattice fringe spacing is 0.28 nm or more, The areas where the thickness is less than 0.30 nm can be considered as crystalline parts of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0261] Figure 16 shows an example of the average size of the crystal parts (22 to 45 parts) of each sample. However, the length of the lattice fringes is the size of the crystal part. It can be seen that the crystalline part of the ke OS grows in size according to the cumulative dose of electron irradiation. Specifically, as shown by (1) in Figure 16, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus), which was 4.2×10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in Fig. 16, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that.

[0262] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not seen as a nc-OS or CAAC-OS. It is clear that it has an unstable structure compared to the OS.

[0263] In addition, because of the porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0264] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0265] In some cases, single crystals of the same composition do not exist. In such cases, crystals of different compositions may be used in any ratio. By combining single crystals of different compositions, the density equivalent to a single crystal of any composition can be estimated. The density equivalent to a single crystal of any composition can be calculated by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate the size of the single crystal by combining different types of single crystals.

[0266] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or a microcrystalline oxide semiconductor. The layer may be a laminated film having two or more of a compound semiconductor and a CAAC-OS.

[0267] The CAAC-OS film can be formed, for example, by the following method.

[0268] The CAAC-OS film can be formed, for example, by sputtering a polycrystalline oxide semiconductor target. The film is formed by sputtering.

[0269] By increasing the substrate temperature during film formation, migration of sputtered particles after reaching the substrate is suppressed. Specifically, the substrate temperature is set to 100° C. or higher and 740° C. or lower, preferably 200° C. or lower. The film is formed at a temperature of 500°C or less. By increasing the substrate temperature during film formation, the sputtering particles When the sputtered particles reach the substrate, they migrate onto the substrate, causing the particles to flatten. At this time, the sputtering particles are positively charged, so the The ring particles repel each other while adhering to the substrate, so the sputtering particles are biased and non-uniform. Therefore, a CAAC-OS film having a uniform thickness can be formed without overlapping.

[0270] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0271] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. Expressed as volume percent.

[0272] Alternatively, the CAAC-OS film is formed by the following method.

[0273] First, a first oxide semiconductor film is formed to a thickness of 1 nm or more and less than 10 nm. The semiconductor film is formed by sputtering. Specifically, the substrate temperature is set to 100°C or higher. The temperature is set to 500° C. or less, preferably 150° C. to 450° C., and the oxygen ratio in the deposition gas is set to 30 % by volume or more, preferably 100% by volume.

[0274] Next, heat treatment is performed to convert the first oxide semiconductor film into a first CAAC-OS film having high crystallinity. The temperature of the heat treatment is 350°C or higher and 740°C or lower, preferably 450°C or higher and 650°C or lower. The heat treatment time is from 1 minute to 24 hours, preferably from 6 minutes to 4 hours. The heat treatment may be performed in an inert atmosphere or an oxidizing atmosphere. Alternatively, heat treatment is performed in an inert atmosphere, and then heat treatment is performed in an oxidizing atmosphere. By the heat treatment in the atmosphere, the impurity concentration of the first oxide semiconductor film can be reduced in a short time. On the other hand, oxygen vacancies are generated in the first oxide semiconductor film by heat treatment in an inert atmosphere. In this case, the oxygen deficiency can be reduced by heat treatment in an oxidizing atmosphere. Heat treatment can be performed at 1000 Pa or less, 100 Pa or less, 10 Pa or less, or The step of removing the oxide semiconductor film from the first oxide semiconductor film may be performed under a reduced pressure of 1 Pa or less. can be reduced in an even shorter time.

[0275] The first oxide semiconductor film has a thickness of 1 nm or more and less than 10 nm. Compared with a thickness of 0 nm or more, it can be easily crystallized by heat treatment.

[0276] Next, a second oxide semiconductor film having the same composition as the first oxide semiconductor film is formed to a thickness of 10 nm or more. The second oxide semiconductor film is formed to a thickness of 0 nm or less by a sputtering method. Specifically, the substrate temperature is set to 100° C. or higher and 500° C. or lower, preferably 150° C. or higher and 450° C. or lower. The oxygen ratio in the deposition gas is set to 30% by volume or more, preferably 100% by volume. To film.

[0277] Next, heat treatment is performed to grow a second oxide semiconductor film from the first CAAC-OS film through solid phase epitaxial growth. The second CAAC-OS film is formed with high crystallinity by the heat treatment at a temperature of 350 The temperature is from 450°C to 650°C, preferably from 450°C to 650°C. The heating time is from 1 minute to 24 hours, preferably from 6 minutes to 4 hours. The heat treatment may be performed in an inert atmosphere or an oxidizing atmosphere. Preferably, the heat treatment is performed in an inert atmosphere. After that, a heat treatment is performed in an oxidizing atmosphere. The impurity concentration of the nitride semiconductor film can be reduced in a short time. Oxygen vacancies may be generated in the second oxide semiconductor film by the heat treatment. The oxygen vacancies can be reduced by heat treatment in a reactive atmosphere. The pressure may be reduced to 000 Pa or less, 100 Pa or less, 10 Pa or less, or 1 Pa or less. Under reduced pressure, the impurity concentration in the second oxide semiconductor film can be reduced in a shorter time. Cut.

[0278] In this manner, a CAAC-OS film having a total thickness of 10 nm or more is formed. can be done.

[0279] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0280] 101 Case 102 Substrate 103 FPC 103a FPC 104 IC 105 Touch Sensor 106 FPC 110 Display Panel 111 Display area 112 Display area 113 Display area 114 Display area 115 Display area 121 Icons 122 Text information 123 Icons 124 Text information 125 Slide bar 126 fingers 131 sides 132 sides 133 sides 138 Notch 141 Drive circuit 142 Drive circuit 143 Drive circuit 145 Wiring 146 Wiring 300 Touch Panel 301 Display section 302 pixels 302B subpixel 302G subpixel 302R subpixel 302t Transistor 303c capacity 303g(1) Scanning line driver circuit 303g(2) Imaging pixel driving circuit 303s(1) Image signal line driver circuit 303s(2) Imaging signal line driver circuit 303t Transistor 308 imaging pixels 308p Photoelectric conversion element 308t transistor 309 FPC 310 Substrate 310a Barrier film 310b board 310c adhesive layer 311 Wiring 319 Terminal 321 Insulating Film 328 Bulkhead 329 Spacer 350R Light emitting element 351R lower electrode 352 Upper electrode 353 layers 353a Light Emitting Unit 353b Light Emitting Unit 354 Middle Class 360 Encapsulating material 367BM light shielding layer 367p anti-reflection layer 367R colored layer 370 Opposing Substrate 370a Barrier film 370b board 370c adhesive layer 380B Light Emitting Module 380G Light Emitting Module 380R Light Emitting Module 500 Touch Panel 500B Touch Panel 501 Display section 502R subpixel 502t transistor 503c capacity 503g(1) Scanning line driver circuit 503t Transistor 509 FPC 510 Substrate 510a Barrier film 510b Board 510c adhesive layer 511 Wiring 519 Terminal 521 Insulating film 528 Bulkhead 550R Light emitting element 560 Encapsulating material 567BM light shielding layer 567p anti-reflection layer 567R colored layer 570 Substrate 570a Barrier film 570b board 570c ​​adhesive layer 580R Light Emitting Module 590 Substrate 591 Electrode 592 Electrode 593 Insulating Layer 594 Wiring 595 Touch Sensor 597 Adhesive layer 598 Wiring 599 Connection Layer 5100 pellets 5120 PCB 5161 area

Claims

[Claim 1] A display panel including a flexible substrate, the display panel includes a first display area, a second display area, and a third display area; the first display area has a quadrilateral-shaped outline and has a first side and a second side that form a first corner of the outline; the second display area is provided in contact with the first side, and a width of the second display area in a direction parallel to the first side is equal to a length of the first side; the third display area is provided in contact with the second side, and a width of the third display area in a direction parallel to the second side is equal to a length of the second side; the substrate has a notch in a region facing the first display region across the first corner; Display panel.

Images