Semiconductor device

Abstract

To provide a semiconductor device whose size can be reduced.SOLUTION: A semiconductor device 100 includes first and second substrates 10, 20, first and second semiconductor elements 30, 40, a connection conductor 50, and a sealing part 70. The first substrate includes a first insulating substrate 12 and a first conductive layer 11 provided on a surface of the first insulating substrate. The second substrate includes a second insulating substrate 22 and a second conductive layer 21 provided on a surface of the second insulating substrate. The first semiconductor element is provided between the first substrate and the second substrate. The first semiconductor element includes a first semiconductor layer 31, first and second electrodes 33, 34, and a first control electrode 32. The second semiconductor element is provided between the second substrate and the first semiconductor element. The second semiconductor element includes a second semiconductor layer 41, third and fourth electrodes 43, 44, and a second control electrode 42. The connection conductor is provided between the first semiconductor element and the second semiconductor element. The connection conductor electrically connects the first electrode and the fourth electrode. The sealing part covers a part of the first and second substrates and the first and second semiconductor elements.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] A semiconductor device in which a plurality of power semiconductor chips are connected to each other and sealed has been developed. This semiconductor device is used, for example, as a power module that constitutes a part of a power conversion circuit. It is desirable to reduce the size of the semiconductor device. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 7172847 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a semiconductor device that can be miniaturized. [Means for solving the problem]

[0005] The semiconductor device according to the embodiment includes a first substrate, a second substrate, a first semiconductor element, a second semiconductor element, a connection conductor, and a sealing portion. The first substrate has a first surface and a second surface opposite to the first surface. The first substrate includes a first insulating substrate and a first conductive layer provided on a surface of the first insulating substrate and located on the second surface. The second substrate has a third surface and a fourth surface opposite to the third surface. The second substrate includes a second insulating substrate and a second conductive layer provided on a surface of the second insulating substrate and located on the fourth surface. In a first direction from the second substrate to the first substrate, the first conductive layer is located between the first insulating substrate and the second insulating substrate. In the first direction, the second conductive layer is located between the first substrate and the second insulating substrate. The first semiconductor element is provided between the first substrate and the second substrate in the first direction. The first semiconductor element includes a first semiconductor layer, a first electrode, a second electrode, and a first control electrode. The first electrode is located between the first semiconductor layer and the second substrate in the first direction. The second electrode is provided between the first semiconductor layer and the first substrate, and is electrically connected to a part of the first conductive layer. The first control electrode is provided between the first semiconductor layer and the first substrate, and is electrically connected to another part of the first conductive layer. The second semiconductor element is provided between the second substrate and the first semiconductor element in the first direction. The second semiconductor element includes a second semiconductor layer, a third electrode, a fourth electrode, and a second control electrode. The third electrode is located between the second semiconductor layer and the second substrate, and is electrically connected to a part of the second conductive layer. The fourth electrode is located between the second semiconductor layer and the first semiconductor element in the first direction. The second control electrode is located between the second semiconductor layer and the first semiconductor element in the first direction, and is electrically connected to another part of the second conductive layer. The connecting conductor is provided between the first semiconductor element and the second semiconductor element in the first direction. The connecting conductor electrically connects the first electrode and the fourth electrode. The sealing portion covers a part of the first substrate, a part of the second substrate, the first semiconductor element, and the second semiconductor element.The sealing portion does not cover the first surface of the first substrate and the third surface of the second substrate. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic perspective view illustrating a semiconductor device according to an embodiment. [Diagram 2] FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the embodiment. [Diagram 3] FIG. 3 is a schematic circuit diagram illustrating the circuit configuration of the semiconductor device according to the embodiment. [Figure 4] FIG. 4 is a schematic plan view illustrating a part of the semiconductor device according to the embodiment. [Diagram 5] FIG. 5 is a schematic plan view illustrating a part of the semiconductor device according to the embodiment. [Figure 6] 6(a) and 6(b) are schematic plan views illustrating a part of the semiconductor device according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios of each part may be different depending on the drawing. In this specification and each drawing, elements similar to those already explained are given the same reference numerals and detailed explanations are omitted as appropriate.

[0008] FIG. 1 is a schematic perspective view illustrating a semiconductor device according to an embodiment. FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the embodiment. FIG. 3 is a schematic circuit diagram illustrating the circuit configuration of the semiconductor device according to the embodiment. FIG. 4 is a schematic plan view illustrating a part of the semiconductor device according to the embodiment. FIG. 5 is a schematic plan view illustrating a part of the semiconductor device according to the embodiment.

[0009] Fig. 2 shows a cross section of the semiconductor device 100 shown in Fig. 1 taken along the line A1-A2. As shown in Fig. 2, the semiconductor device 100 according to the embodiment has a first substrate 10, a second substrate 20, a first semiconductor element 30, a second semiconductor element 40, a connecting conductor 50, and a sealing portion 70. Fig. 4 is a plan view of the semiconductor device 100, a portion of the semiconductor device 100 on the first substrate 10 side of the line A3-A4 shown in Fig. 2, viewed along the Z direction shown in Fig. 2. Fig. 5 is a plan view of the semiconductor device 100, a portion of the semiconductor device 100 on the second substrate 20 side of the line A5-A6 shown in Fig. 2, viewed along the opposite direction to the Z direction.

[0010] 2, the first substrate 10 has a first surface 10a and a second surface 10b opposite to the first surface 10a. The first substrate 10 includes a first conductive layer 11 located on the second surface 10b, and a first insulating substrate 12. The first conductive layer 11 is provided on a surface 12a of the first insulating substrate 12.

[0011] The second substrate 20 has a third surface 20a and a fourth surface 20b opposite to the third surface 20a. The second substrate 20 includes a second conductive layer 21 located on the fourth surface 20b, and a second insulating substrate 22. The second conductive layer 21 is provided on a surface 22a of the second insulating substrate 22.

[0012] In the description of the embodiment, the direction from the second substrate 20 to the first substrate 10 is referred to as the Z direction (first direction). The direction perpendicular to the Z direction is referred to as the X direction. The direction perpendicular to the Z direction and the X direction is referred to as the Y direction.

[0013] The first conductive layer 11 of the first substrate 10 is located between the first insulating substrate 12 and the second insulating substrate 22 in the Z direction. The second conductive layer 21 of the second substrate 20 is located between the first conductive layer 11 and the second insulating substrate 22 in the Z direction.

[0014] In addition, "the first element is between the second element and the third element in a certain direction" means, in other words, that the position of the first element in that direction is between the position of the second element in that direction and the position of the third element in that direction.

[0015] The first semiconductor element 30 is provided between the first substrate 10 and the second substrate 20. The first semiconductor element 30 is, for example, a semiconductor component including a switching element. In this example, the first semiconductor element 30 is a power semiconductor chip including a vertical MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Power semiconductors are used, for example, for controlling and converting power.

[0016] The first semiconductor element 30 includes a first semiconductor layer 31, a first control electrode 32, a first drain electrode 33 (first electrode), and a first source electrode 34 (second electrode). The first control electrode 32, the first drain electrode 33, and the first source electrode 34 are electrically connected to the gate, drain, and source of a transistor formed in the first semiconductor layer 31, respectively.

[0017] The first control electrode 32 and the first source electrode 34 are electrode pads provided on the front surface side of the first semiconductor layer 31. That is, the first source electrode 34 is located between the first semiconductor layer 31 and the first substrate 10. The first control electrode 32 is located between the first semiconductor layer 31 and the first substrate 10.

[0018] The first drain electrode 33 is an electrode pad provided on the back surface side of the first semiconductor layer 31. That is, the first drain electrode 33 is located between the first semiconductor layer 31 and the second substrate 20 in the Z direction. The first drain electrode 33 may cover substantially the entire back surface side of the first semiconductor layer 31. The area of ​​the first drain electrode 33 is larger than the area of ​​the first source electrode 34. The area of ​​the first source electrode 34 is larger than the area of ​​the first control electrode 32.

[0019] The first source electrode 34 is electrically connected to a part (first conductive region 111) of the first conductive layer 11 via a connection conductive layer 91 (e.g., solder). The connection conductive layer 91 contacts both the first source electrode 34 and the first conductive region 111.

[0020] The first control electrode 32 is electrically connected to another part (second conductive region 112) of the first conductive layer 11 through the connection conductive layer 92. The connection conductive layer 92 contacts both the first control electrode 32 and the second conductive region 112.

[0021] The second semiconductor element 40 is provided between the second substrate 20 and the first semiconductor element 30 in the Z direction. The second semiconductor element 40 includes a switching element, and may be the same semiconductor chip as the first semiconductor element 30.

[0022] The second semiconductor element 40 includes a second semiconductor layer 41, a second control electrode 42, a second drain electrode 43 (third electrode), and a second source electrode 44 (fourth electrode). The second control electrode 42, the second drain electrode 43, and the second source electrode 44 are electrically connected to the gate, drain, and source of a transistor formed in the second semiconductor layer 41, respectively.

[0023] The second control electrode 42 and the second source electrode 44 are electrode pads provided on the front surface side of the second semiconductor layer 41. That is, in the Z direction, the second source electrode 44 is located between the second semiconductor layer 41 and the first semiconductor element 30. The second control electrode 42 is located between the second semiconductor layer 41 and the first semiconductor element 30 in the Z direction.

[0024] The second drain electrode 43 is an electrode pad provided on the back surface side of the second semiconductor layer 41. That is, the second drain electrode 43 is located between the second semiconductor layer 41 and the second substrate 20 in the Z direction. The second drain electrode 43 may cover substantially the entire back surface side of the second semiconductor layer 41. The area of ​​the second drain electrode 43 is larger than the area of ​​the second source electrode 44, and the area of ​​the second source electrode 44 is larger than the area of ​​the second control electrode 42.

[0025] The second drain electrode 43 is electrically connected to a part of the second conductive layer 21 (the third conductive region 211) through a connection conductive layer 93. The connection conductive layer 93 is in contact with both the second drain electrode 43 and the third conductive region 211.

[0026] The second control electrode 42 is electrically connected to another part (the fourth conductive region 212) of the second conductive layer 21 via a conductive wire 90. The conductive wire 90 is in contact with, for example, each of the second control electrode 42 and the fourth conductive region 212.

[0027] The connecting conductor 50 is provided between the first semiconductor element 30 and the second semiconductor element 40 in the Z direction. The connecting conductor 50 electrically connects the first drain electrode 33 and the second source electrode 44 together.

[0028] Specifically, the connection conductor 50 is electrically connected to the first drain electrode 33 via a connection conductive layer 85 (first connection conductive layer). The connection conductive layer 85 is located between the first drain electrode 33 and the connection conductor 50, and is in contact with each of the first drain electrode 33 and one end 50a of the connection conductor 50.

[0029] Moreover, the connection conductor 50 is electrically connected to the second source electrode 44 via a connection conductive layer 86 (second connection conductive layer). The connection conductive layer 86 is located between the second source electrode 44 and the connection conductor 50, and contacts both the second source electrode 44 and the other end 50b of the connection conductor 50. The connection conductor 50 is an integral conductive member that is continuous from one end 50a to the other end 50b. The connection conductor 50 is made of the same material from the one end 50a to the other end 50b.

[0030] The sealing portion 70 covers a part of the first substrate 10, a part of the second substrate 20, the first semiconductor element 30, the second semiconductor element 40, and a part of the connecting conductor 50. The sealing portion 70 covers the side surface (surface along the Z direction) and the second surface 10b of the first substrate 10. The sealing portion 70 does not cover the first surface 10a of the first substrate 10. In other words, the first surface 10a is exposed from the sealing portion 70. The sealing portion 70 also covers the side surface and the fourth surface 20b of the second substrate 20. The sealing portion 70 does not cover the third surface 20a of the second substrate 20. In other words, the third surface 20a is exposed from the sealing portion 70.

[0031] 2, the first substrate 10 further includes a third conductive layer 13. The third conductive layer 13 is provided on the back surface 12b opposite to the front surface 12a of the first insulating substrate 12. The third conductive layer 13 is located on the first surface 10a of the first substrate 10. In other words, the third conductive layer 13 is exposed from the sealing portion 70.

[0032] Similarly, the second substrate 20 further includes a fourth conductive layer 23. The fourth conductive layer 23 is provided on the back surface 22b opposite to the front surface 22a of the second insulating substrate 22. The fourth conductive layer 23 is located on the third surface 20a of the second substrate 20. In other words, the fourth conductive layer 23 is exposed from the sealing portion 70.

[0033] In this example, the first semiconductor element 30 (transistor Tr1) and the second semiconductor element 40 (transistor Tr2) are MOSFETs, but the first semiconductor element 30 and the second semiconductor element 40 are not limited to MOSFETs and may be, for example, IGBTs. When an IGBT is used, the control electrode, source electrode, and drain electrode of the MOSFET described above become the gate electrode, emitter electrode, and collector electrode of the IGBT, respectively.

[0034] In this manner, the semiconductor device 100 according to the embodiment is a device in which, for example, two substrates on which semiconductor elements are mounted drain (collector) down and source (emitter) down are packaged such that one of the substrates is turned over and a metal connector is sandwiched between the two substrates to allow heat dissipation on both sides.

[0035] The semiconductor device 100 further includes a first terminal 61, a second terminal 62, a first signal terminal 81, and a second signal terminal .

[0036] The first terminal 61 is electrically connected to the first conductive layer 11 (first conductive region 111) through the connection conductive layer 97. As a result, the first terminal 61 is electrically connected to the first source electrode 34 through the first conductive layer 11. The first terminal 61 protrudes from the first side surface 70a of the sealing portion 70.

[0037] Specifically, the first terminal 61 includes a first end 61a and a first terminal portion 61b extending from the first end 61a. The first end 61a is a portion that overlaps with the first conductive layer 11 and the connection conductive layer 97 in the Z direction. The first terminal portion 61b extends from the first side surface 70a of the sealing portion 70 in a first extension direction D1.

[0038] The second terminal 62 is electrically connected to the second conductive layer 21 (third conductive region 211) through the connection conductive layer 98. As a result, the second terminal 62 is electrically connected to the second drain electrode 43 through the second conductive layer 21. The second terminal 62 protrudes from the first side surface 70a of the sealing portion 70.

[0039] Specifically, the second terminal 62 includes a second end 62a and a second terminal portion 62b extending from the second end 62a. The second end 62a is a portion that overlaps with the second conductive layer 21 and the connection conductive layer 98 in the Z direction. The second terminal portion 62b extends from the first side surface 70a of the sealing portion 70 in the first extension direction D1.

[0040] The first terminal 61 and the second terminal 62 overlap each other in the Z direction. The first terminal 61 is aligned with the first semiconductor element 30 in the X direction. The second terminal 62 is aligned with the second semiconductor element 40 in the X direction.

[0041] The first signal terminal 81 is electrically connected to the first conductive layer 11 (the second conductive region 112) through the connection conductive layer 95. As a result, the first signal terminal 81 is electrically connected to the first control electrode 32 through the first conductive layer 11. The first signal terminal 81 protrudes from the second side surface 70b of the sealing portion 70.

[0042] Specifically, the first signal terminal 81 includes an end 81a and a first signal terminal portion 81b extending from the end 81a. The end 81a is a portion that overlaps with the first conductive layer 11 and the connection conductive layer 95 in the Z direction. The first signal terminal portion 81b extends from the second side surface 70b of the sealing portion 70 in the second extension direction D2.

[0043] The second side surface 70b is the surface opposite to the first side surface 70a of the sealing portion 70. The first extension direction D1 and the second extension direction are directions in the XY plane. The first extension direction D1 and the second extension direction are directions opposite to each other. In this example, the second extension direction D2 is parallel to the X direction.

[0044] The second signal terminal 82 is electrically connected to the second conductive layer 21 (the fourth conductive region 212) via the connection conductive layer 96. As a result, the second signal terminal 82 is electrically connected to the second control electrode 42 via the fourth conductive region 212 and the conductive wire 90. The second signal terminal 82 protrudes from the second side surface 70b of the sealing portion 70.

[0045] Specifically, the second signal terminal 82 includes an end 82a and a second signal terminal portion 82b extending from the end 82a. The end 82a is a portion that overlaps with the second conductive layer 21 and the connection conductive layer 96 in the Z direction. The second signal terminal portion 82b extends from the second side surface 70b of the sealing portion 70 in the second extension direction D2.

[0046] The connecting conductor 50 also includes a connector portion 51 and a third terminal portion 53 extending from the connector portion 51. The connector portion 51 is located between the first semiconductor element 30 and the second semiconductor element 40. The connector portion 51 is in contact with each of the connection conductive layers 85 and 86. The third terminal portion 53 extends from the second side surface 70b of the sealing portion 70 in the second extension direction D2.

[0047] The connector portion 51 and the third terminal portion 53 are continuous with each other. The connector portion 51 and the third terminal portion 53 are one conductive member integrally formed. The connector portion 51 and the third terminal portion 53 are made of the same material. The third terminal portion 53 is a portion of the connection conductor 50 that is formed thinner than the connector portion 51. That is, the thickness (length along the Z direction) of the third terminal portion 53 is thinner than the thickness of the connector portion 51. In the example of FIG. 2, the third terminal portion 53 is separated from the connection conductive layer 86 and the second semiconductor element 40, and is in contact with the connection conductive layer 85.

[0048] The third terminal portion 53 is located between the first signal terminal 81 and the second signal terminal 82 in the Z direction. The third terminal portion 53 overlaps with each of the first signal terminal 81 and the second signal terminal 82 in the Z direction.

[0049] An example of the material of each element of the semiconductor device 100 will be described. Each of the first insulating substrate 12 and the second insulating substrate 22 is, for example, a ceramic substrate including an electrically insulating ceramic material. The material of each of the first insulating substrate 12 and the second insulating substrate 22 is, for example, at least one of aluminum oxide, silicon nitride, and aluminum nitride. The material of each of the first conductive layer 11, the second conductive layer 21, the third conductive layer 13, and the fourth conductive layer 23 is, for example, a metal material such as copper or aluminum. Each of the connection conductive layers (connection conductive layers 85, 86, 91, 92, 93, 95, 96, 97, 98) is, for example, a conductive bonding material or adhesive. Specifically, the connection conductive layers may be made of solder or silver paste. Each of the first semiconductor layer 31 and the second semiconductor layer 41 is, for example, a semiconductor substrate including a semiconductor material. Examples of the semiconductor material include silicon, silicon carbide, gallium nitride, and gallium arsenide. When silicon is used as the semiconductor material, arsenic, phosphorus, or antimony can be used as the n-type impurity. Boron can be used as the p-type impurity. The materials for each electrode (first drain electrode 33, first source electrode 34, first control electrode 32, second drain electrode 43, second source electrode 44, second control electrode 42) include metal materials such as aluminum, nickel, gold, silver, or copper. The first terminal 61, the second terminal 62, the first signal terminal 81, and the second signal terminal 82 are each made of a metal material such as copper or aluminum. The connection conductor 50 is made of a metal material such as copper or aluminum. The material of the sealing portion 70 is, for example, epoxy resin. The conductive wires are made of at least one metal material selected from the group consisting of gold, copper, silver, and aluminum.

[0050] An example of the operation of the semiconductor device 100 will be described. The semiconductor device 100 can be used as a part of a power conversion circuit such as an inverter circuit, a bridge circuit, etc. For example, a positive voltage is applied to the second terminal 62 with respect to the first terminal 61, and an external load (not shown) is connected to the third terminal 53.

[0051] An input signal to the first signal terminal 81, i.e., the voltage of the first signal terminal 81 with respect to the first source electrode 34, controls the on / off of the transistor Tr1 (see FIG. 3 ). When the voltage of the first signal terminal 81 with respect to the first source electrode 34 exceeds a threshold voltage, the transistor Tr1 turns on. As a result, for example, an on-current of the transistor Tr1 flows from the third terminal portion 53 to the first terminal 61 via the first drain electrode 33, the first semiconductor layer 31, the first source electrode 34, and the first conductive layer 11 (the first conductive region 111). When the voltage of the first signal terminal 81 with respect to the first source electrode 34 is equal to or lower than the threshold voltage, the transistor Tr1 turns off and the on-current does not flow.

[0052] The on / off of the transistor Tr2 (see FIG. 3) of the second semiconductor element 40 is controlled by an input signal to the second signal terminal 82, i.e., the voltage of the second signal terminal 82 with respect to the second source electrode 44. When the voltage of the second signal terminal 82 with respect to the second source electrode 44 exceeds a threshold voltage, the transistor Tr2 is turned on. As a result, for example, the on-current of the transistor Tr2 flows from the second terminal 62 to the third terminal portion 53 via the second conductive layer 21 (third conductive region 211), the second drain electrode 43, the second semiconductor layer 41, and the second source electrode 44. When the voltage of the second signal terminal 82 with respect to the second source electrode 44 is equal to or lower than the threshold voltage, the transistor Tr2 is turned off and the on-current does not flow.

[0053] For example, when the transistor Tr2 is on and the transistor Tr1 is off, the on-current of the transistor Tr2 flows from the second terminal 62 to the third terminal 53. Thereafter, for example, when the transistor Tr2 switches from on to off, the current flowing to the external load flows from the first terminal 61 to the third terminal 53 via the diode di1 (see FIG. 3). The diode di1 is, for example, a body diode formed by a pn junction provided in the first semiconductor layer 31.

[0054] Thereafter, for example, when the transistor Tr2 is switched to an off state and the transistor Tr1 is switched to an on state, the on-current of the transistor Tr1 flows from the third terminal 53 to the first terminal 61. Furthermore, when the transistor Tr1 is switched from on to off, the current flowing to the external load flows from the third terminal 53 to the second terminal 62 via the diode di2 (see FIG. 3). The diode di2 is, for example, a body diode formed by a pn junction provided in the second semiconductor layer 41.

[0055] In the semiconductor device 100, the first source electrode 34 (or emitter electrode) side of the first semiconductor element 30 is connected to the first conductive layer 11 on the surface of the first substrate 10. The second drain electrode 43 (or collector electrode) side of the second semiconductor element 40 is connected to the second conductive layer 21 on the surface of the second substrate 20. Such a first semiconductor element 30 and a second semiconductor element 40 are disposed between the first substrate 10 and the second substrate 20. Furthermore, a connection conductor 50 is provided between the first semiconductor element 30 and the second semiconductor element 40, and electrically connects the first drain electrode 33 and the second source electrode 44. In this manner, the first substrate 10, the second substrate 20, the first semiconductor element 30, the second semiconductor element 40, and the connection conductor 50 are stacked in the Z direction. This allows the semiconductor device 100 to be miniaturized. For example, compared to the configuration of the reference example in which the semiconductor elements are arranged in the XY plane (in a plane parallel to the substrate surface), the area of ​​the semiconductor device 100 in the XY plane can be reduced.

[0056] By miniaturizing the semiconductor device 100, it is possible to shorten the path through which the on-current of the first semiconductor element 30 flows between the first terminal 61 and the third terminal portion 53. It is also possible to shorten the path through which the on-current of the second semiconductor element 40 flows between the second terminal 62 and the third terminal portion 53. It is possible to reduce the on-resistance of the first semiconductor element 30 and the second semiconductor element 40.

[0057] The first surface 10a of the first substrate 10 and the third surface 20a of the second substrate 20 are not covered by the sealing portion 70. This allows heat generated by the operation of the semiconductor device 100 to be released from both the first surface 10a and the third surface 20a. For example, the heat dissipation performance per unit area in the XY plane can be improved. For example, the semiconductor device 100 can be miniaturized while suppressing deterioration of the heat dissipation performance, and electrical characteristics can be improved.

[0058] Furthermore, the first substrate 10 has a third conductive layer 13 located on the first surface 10a. The second substrate 20 has a fourth conductive layer 23 located on the third surface 20a. That is, the third conductive layer 13 and the fourth conductive layer 23 are exposed from the sealing portion 70. This can improve, for example, heat dissipation performance. In addition, for example, stress caused by the difference in thermal expansion coefficient between the first conductive layer 11 and the first insulating substrate 12 is alleviated by stress caused by the difference in thermal expansion coefficient between the third conductive layer 13 and the first insulating substrate 12. This can suppress, for example, warping of the first substrate 10. Similarly, for example, warping of the second substrate 20 can be suppressed. For example, the material of the third conductive layer 13 may be the same as the material of the first conductive layer 11. The thickness of the third conductive layer 13 may be the same as the thickness of the first conductive layer 11. The material of the fourth conductive layer 23 may be the same as the material of the second conductive layer 21. The thickness of the fourth conductive layer 23 may be the same as the thickness of the second conductive layer 21.

[0059] 2, the connection conductor 50 is an integral conductive member that is continuous from one end 50a to the other end 50b. That is, between the first semiconductor element 30 and the second semiconductor element 40, other than the connection conductor 50 (and the connection conductive layers 85, 86 for connecting the connection conductor 50), no spacer separate from the connection conductor 50 is provided. For example, no spacer is provided for adjusting the distance between the first semiconductor element 30 and the second semiconductor element 40. This makes it possible to reduce, for example, the length of the semiconductor device 100 in the Z direction, and to further miniaturize the semiconductor device 100. For example, the on-resistance and heat generation can be suppressed by shortening the path of the on-current described above.

[0060] Also, the first terminal 61 (first terminal portion 61b) and the second terminal 62 (second terminal portion 62b) extend in the first extension direction D1 from the first side surface 70a of the sealing portion 70. On the other hand, the third terminal portion 53 extends in the second extension direction D2 from the second side surface 70b of the sealing portion 70. That is, the third terminal portion 53 is disposed away from the first terminal portion 61b. This makes it possible to suppress, for example, the capacitance between the third terminal portion 53 and the first terminal portion 61b. Also, for example, when a current flows from the third terminal portion 53 to the first terminal 61, the direction of the current flowing into the third terminal portion 53 is the same as the direction of the current flowing out of the first terminal 61. For example, in the XY plane, the current flows in one direction. This makes it possible to suppress, for example, the inductance.

[0061] 2, the third terminal portion 53 is aligned with the second control electrode 42 in the Z direction. A distance L1 along the Z direction between the third terminal portion 53 and the second semiconductor element 40 is longer than a distance L2 along the Z direction between the third terminal portion 53 and the first semiconductor element 30. Since the distance L1 is relatively long, it is easy to ensure a space for arranging the conductive wire 90, for example.

[0062] As shown in FIG. 4, the first conductive layer 11 includes a first conductive region 111, a second conductive region 112, and a conductive region 113, which are arranged apart from each other. The conductive region 113 is electrically connected to an electrode 36 provided on the first semiconductor element 30. The electrode 36 is arranged in the Y direction on the surface of the first semiconductor element 30, side by side with the first control electrode 32. The electrode 36 is electrically connected to the first source electrode 34 of the first semiconductor element 30, for example, by a wiring path not shown. In addition, a signal terminal 83 extending from the conductive region 113 in the second extension direction D2 is electrically connected to the conductive region 113. The signal terminal 83 is electrically connected to the first source electrode 34 via the conductive region 113 and the electrode 36. The signal terminal 83 is, for example, a source sense terminal for detecting a current flowing through the first source electrode 34.

[0063] The length in the Y direction of the first conductive region 111 is longer than each of the length in the Y direction of the first semiconductor element 30, the length in the Y direction of the first terminal 61, and the length in the Y direction of the second conductive region 112. The length in the Y direction of the first terminal 61 is longer than each of the length in the Y direction of the first source electrode 34, the length in the Y direction of the second conductive region 112, and the length in the Y direction of the first signal terminal 81.

[0064] The first conductive region 111 includes a region 111a overlapping with the first terminal 61 in the Z direction, and a region 111b overlapping with the first source electrode 34 in the Z direction. The second conductive region 112 includes a region 112a overlapping with the first control electrode 32 in the Z direction, and a region 112b overlapping with the first signal terminal 81 in the Z direction. The regions 111a, 111b, 112a, and 112b are aligned in this order in the X direction.

[0065] In this way, the terminals such as the first terminal 61 and the first signal terminal 81 are connected to the first semiconductor element 30 via the first conductive layer 11 provided on the substrate. In this case, the first semiconductor element 30 and each terminal do not overlap in the Z direction, so that, for example, an increase in the length of the semiconductor device in the Z direction can be suppressed. If the terminals are connected by overlapping them on the electrodes of the semiconductor element, it is possible to provide a spacer between the semiconductor element and the substrate to ensure a space for arranging the terminals. In the semiconductor device 100, such a spacer does not need to be provided. Also, each signal terminal extends in the opposite direction to the wide first terminal 61 as viewed from the first semiconductor element 30. This makes it easier to ensure a space for arranging the signal terminals, for example.

[0066] As shown in FIG. 5, the second conductive layer 21 includes a third conductive region 211, a fourth conductive region 212, and a conductive region 213, which are arranged apart from each other. The conductive region 213 is electrically connected to an electrode 46 provided on the second semiconductor element 40 via a conductive wire 99. The electrode 46 is arranged in the Y direction next to the second control electrode 42 on the surface of the second semiconductor element 40. The electrode 46 is electrically connected to the second source electrode 44 of the second semiconductor element 40, for example, by a wiring path not shown. In addition, a signal terminal 84 extending from the conductive region 213 in the second extension direction D2 is electrically connected to the conductive region 213. The signal terminal 84 is electrically connected to the second source electrode 44 via the conductive region 213, the conductive wire 99, and the electrode 46. The signal terminal 84 is, for example, a source sense terminal for detecting a current flowing through the second source electrode 44.

[0067] The length in the Y direction of the third conductive region 211 is longer than each of the length in the Y direction of the second semiconductor element 40, the length in the Y direction of the second terminal 62, and the length in the Y direction of the fourth conductive region 212. The length in the Y direction of the second terminal 62 is longer than each of the length in the Y direction of the second source electrode 44, the length in the Y direction of the fourth conductive region 212, and the length in the Y direction of the second signal terminal 82.

[0068] The third conductive region 211 includes a region 211a overlapping with the second terminal 62 in the Z direction, and a region 211b overlapping with the second source electrode 44 in the Z direction. The fourth conductive region 212 includes a region 212a to which a conductive wire 90 electrically connected to the second control electrode 42 is connected, and a region 212b overlapping with the second signal terminal 82 in the Z direction. The regions 211a, 211b, 212a, and 212b are aligned in this order in the X direction.

[0069] In this manner, terminals such as the second terminal 62 and the second signal terminal 82 are connected to the second semiconductor element 40 via the second conductive layer 21 provided on the substrate. In this case, the second semiconductor element 40 and each terminal do not overlap in the Z direction, so that, for example, an increase in the length of the semiconductor device in the Z direction can be suppressed. Also, each signal terminal extends in the opposite direction to the wide second terminal 62 as viewed from the second semiconductor element 40. This makes it easier to ensure, for example, space for arranging the signal terminals.

[0070] 6(a) and 6(b) are schematic plan views illustrating a part of the semiconductor device according to the embodiment. Fig. 6(a) is a plan view of the semiconductor device 100, viewed along the Z direction, of a portion of the semiconductor device 100 on the first substrate 10 side of the A7-A8 line shown in Fig. 2. Fig. 6(b) is a plan view of the semiconductor device 100, viewed along the opposite direction to the Z direction, of a portion of the semiconductor device 100 on the second substrate 20 side of the A7-A8 line shown in Fig. 2.

[0071] 6(a), the connecting conductor 50 overlaps, for example, substantially the entire first semiconductor element 30 (first drain electrode 33) in the Z direction. The length of the connecting conductor 50 in the Y direction is, for example, equal to the length of the first semiconductor element 30 in the Y direction. Furthermore, the third terminal portion 53 of the connecting conductor 50 overlaps with a plurality of signal terminals (first signal terminal 81 and signal terminal 83) in the Z direction. The length of the third terminal portion 53 in the Y direction may be equal to the width of the first terminal 61 in the Y direction.

[0072] As shown in FIG. 6B, the end portion (other end portion 50b) of the connecting conductor 50 on the second semiconductor element 40 side overlaps, for example, substantially the entire second source electrode 44 of the second semiconductor element 40 in the Z direction. The length in the X direction of the other end portion 50b may be, for example, equal to the length in the X direction of the second source electrode 44. The length in the Y direction of the other end portion 50b may be, for example, equal to the length in the Y direction of the second source electrode 44. In other words, the surface of the connecting conductor 50 facing the second semiconductor element 40 is narrower than the surface of the connecting conductor 50 facing the first semiconductor element 30. The portion of the connecting conductor 50 on the second semiconductor element 40 side is narrower in the X direction and the Y direction than the portion of the connecting conductor 50 on the first semiconductor element 30 side.

[0073] The embodiment may include the following features. (Configuration 1) A first substrate having a first surface and a second surface opposite to the first surface, the first substrate including a first insulating substrate and a first conductive layer provided on a surface of the first insulating substrate and positioned on the second surface; a second substrate having a third surface and a fourth surface opposite to the third surface, the second substrate including a second insulating substrate and a second conductive layer provided on a surface of the second insulating substrate and positioned on the fourth surface, the first conductive layer being positioned between the first insulating substrate and the second insulating substrate in a first direction from the second substrate to the first substrate, and the second conductive layer being positioned between the first substrate and the second insulating substrate in the first direction; a first semiconductor element provided between the first substrate and the second substrate in the first direction, A first semiconductor layer; a first electrode located between the first semiconductor layer and the second substrate in the first direction; a second electrode provided between the first semiconductor layer and the first substrate and electrically connected to a portion of the first conductive layer; a first control electrode provided between the first semiconductor layer and the first substrate and electrically connected to another part of the first conductive layer; A first semiconductor element including: a second semiconductor element provided between the second substrate and the first semiconductor element in the first direction, A second semiconductor layer; a third electrode located between the second semiconductor layer and the second substrate and electrically connected to a portion of the second conductive layer; a fourth electrode located between the second semiconductor layer and the first semiconductor element in the first direction; a second control electrode located between the second semiconductor layer and the first semiconductor element in the first direction and electrically connected to another part of the second conductive layer; A second semiconductor element including: a connection conductor provided between the first semiconductor element and the second semiconductor element in the first direction, the connection conductor electrically connecting the first electrode and the fourth electrode; a sealing portion that covers a portion of the first substrate, a portion of the second substrate, the first semiconductor element, and the second semiconductor element, and does not cover the first surface of the first substrate and the third surface of the second substrate; A semiconductor device comprising: (Configuration 2) the first insulating substrate has a back surface opposite to the front surface on which the first conductive layer is provided, the first substrate has a third conductive layer provided on the back surface of the first insulating substrate and located on the first surface; the second insulating substrate has a back surface opposite to the front surface on which the second conductive layer is provided, 2. The semiconductor device of claim 1, wherein the second substrate has a fourth conductive layer provided on the back surface of the second insulating substrate and located on the third surface. (Configuration 3) a first connection conductive layer located between the connection conductor and the first electrode, in contact with the first electrode, and in contact with one end of the connection conductor; a second connection conductive layer located between the connection conductor and the fourth electrode, in contact with the fourth electrode, and in contact with the other end of the connection conductor; Further equipped with 3. The semiconductor device according to claim 1, wherein the connecting conductor is a single conductive member that is continuous from the one end to the other end. (Configuration 4) a first terminal electrically connected to the second electrode via the first conductive layer; a second terminal electrically connected to the third electrode via the second conductive layer; Further equipped with the first terminal has a first terminal portion extending in a first extending direction from a first side surface of the sealing portion, the second terminal has a second terminal portion extending in the first extension direction from the first side surface of the sealing portion, The semiconductor device according to any one of configurations 1 to 3, wherein the connecting conductor has a connector portion located between the first semiconductor element and the second semiconductor element, and a third terminal portion extending from a second side surface of the sealing portion opposite the first side surface in a second extension direction opposite to the first extension direction. (Configuration 5) a first terminal electrically connected to the second electrode via the first conductive layer; a first signal terminal electrically connected to the first control electrode via the first conductive layer; Further equipped with the first conductive layer includes a first conductive region and a second conductive region spaced apart from the first conductive region; the first conductive region includes a region overlapping with the first terminal in the first direction and a region overlapping with the second electrode in the first direction; The semiconductor device according to any one of configurations 1 to 4, wherein the second conductive region includes a region that overlaps with the first control electrode in the first direction and a region that overlaps with the first signal terminal in the first direction. (Configuration 6) a second terminal electrically connected to the third electrode via the second conductive layer; a second signal terminal electrically connected to the second control electrode via the second conductive layer; Further equipped with the second conductive layer includes a third conductive region and a fourth conductive region separated from the third conductive region and not overlapping with the second semiconductor element in the first direction; the third conductive region includes a region overlapping with the second terminal in the first direction and a region overlapping with the third electrode in the first direction; The semiconductor device according to any one of configurations 1 to 5, wherein the fourth conductive region includes a region to which a conductive wire electrically connected to the second control electrode is connected, and a region that overlaps with the second signal terminal in the first direction. (Configuration 7) the connecting conductor includes a connector portion located between the first semiconductor element and the second semiconductor element in the first direction, and a third terminal portion extending from the connector portion in a second extension direction, the third terminal portion is aligned with the second control electrode in the first direction, The semiconductor device of configuration 6, wherein a distance along the first direction between the third terminal portion and the second semiconductor element is longer than a distance along the first direction between the third terminal portion and the first semiconductor element.

[0074] According to the embodiment, a semiconductor device that can be miniaturized can be provided.

[0075] In this specification, "vertical" and "parallel" do not only mean strictly vertical and strictly parallel, but also include, for example, variations in the manufacturing process, and may mean substantially vertical and substantially parallel. In this specification, "electrically connected" includes not only a case where the connection is made by direct contact, but also a case where the connection is made via another conductive member.

[0076] Although some embodiments of the present invention have been illustrated above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, modifications, etc. can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the scope of the invention and its equivalents described in the claims. In addition, the above-mentioned embodiments can be implemented in combination with each other. [Explanation of symbols]

[0077] 10: First board 10a: 1st page 10b: 2nd side 11: First conductive layer 12: First insulating substrate 12a: Surface 12b: Back 13: Third conductive layer 20: Second board 20a: Third Side 20b:Side 4 21: Second conductive layer 22: Second insulating substrate 22a: Surface 22b: Back side 23: Fourth conductive layer 30: First semiconductor element 31: First semiconductor layer 32: First control electrode 33: First drain electrode 34: first source electrode 36: Electrode 40: Second semiconductor element 41: Second semiconductor layer 42: Second control electrode 43: Second drain electrode 44: second source electrode 46: Electrode 50:Connecting conductor 50a: One end 50b: Other end 51: Connector part 53: 3rd terminal part 61: 1st terminal 61a: First end 61b: 1st terminal part 62: 2nd terminal 62a: Second end 62b: 2nd terminal part 70: Sealing part 70a: 1st side 70b:Second side 81: 1st signal terminal 81a: End 81b: First signal terminal section 82: 2nd signal terminal 82a: End 82b: 2nd signal terminal section 83, 84: Signal terminals 85, 86: connecting conductive layers 90: Conductive wire 91 to 93, 95 to 98: connecting conductive layers 99: Conductive wire 100: Semiconductor device 111: First conductive region 111a, 111b: Area 112:Second conductive region 112a, 112b: Area 113: Conductive area 211: The third conductive area 211a, 211b: Field 212: 4th Conductive Field 212a, 212b: Field 213: Conductive Field D1: 1st extension direction D2: Second extension direction L1, L2: distance Tr1, Tr2:Torotron di1, di2:ダイオード

Claims

1. a first substrate having a first surface and a second surface opposite to the first surface, the first substrate including a first insulating substrate and a first conductive layer provided on a surface of the first insulating substrate and positioned on the second surface; a second substrate having a third surface and a fourth surface opposite to the third surface, the second substrate including a second insulating substrate and a second conductive layer provided on a surface of the second insulating substrate and positioned on the fourth surface, the first conductive layer being positioned between the first insulating substrate and the second insulating substrate in a first direction from the second substrate to the first substrate, and the second conductive layer being positioned between the first substrate and the second insulating substrate in the first direction; A first semiconductor element provided between the first substrate and the second substrate in the first direction, A first semiconductor layer; a first electrode located between the first semiconductor layer and the second substrate in the first direction; a second electrode provided between the first semiconductor layer and the first substrate and electrically connected to a portion of the first conductive layer; a first control electrode provided between the first semiconductor layer and the first substrate and electrically connected to another part of the first conductive layer; A first semiconductor device including: a second semiconductor element provided between the second substrate and the first semiconductor element in the first direction, A second semiconductor layer; a third electrode located between the second semiconductor layer and the second substrate and electrically connected to a portion of the second conductive layer; a fourth electrode located between the second semiconductor layer and the first semiconductor element in the first direction; a second control electrode located between the second semiconductor layer and the first semiconductor element in the first direction and electrically connected to another part of the second conductive layer; A second semiconductor element including: a connection conductor provided between the first semiconductor element and the second semiconductor element in the first direction, the connection conductor electrically connecting the first electrode and the fourth electrode; a sealing portion that covers a portion of the first substrate, a portion of the second substrate, the first semiconductor element, and the second semiconductor element, and does not cover the first surface of the first substrate and the third surface of the second substrate; A semiconductor device comprising:

2. the first insulating substrate has a back surface opposite to the front surface on which the first conductive layer is provided, the first substrate has a third conductive layer provided on the back surface of the first insulating substrate and located on the first surface; the second insulating substrate has a back surface opposite to the front surface on which the second conductive layer is provided, The semiconductor device according to claim 1 , wherein the second substrate has a fourth conductive layer provided on the back surface of the second insulating substrate and located on the third surface.

3. a first connection conductive layer located between the connection conductor and the first electrode, in contact with the first electrode, and in contact with one end of the connection conductor; a second connection conductive layer located between the connection conductor and the fourth electrode, in contact with the fourth electrode and in contact with the other end of the connection conductor; Further equipped with 3. The semiconductor device according to claim 1, wherein the connection conductor is a single conductive member that is continuous from the one end to the other end.

4. a first terminal electrically connected to the second electrode via the first conductive layer; a second terminal electrically connected to the third electrode via the second conductive layer; Further equipped with The first terminal has a first terminal portion extending in a first extending direction from a first side surface of the sealing portion, the second terminal has a second terminal portion extending in the first extension direction from the first side surface of the sealing portion, 3. The semiconductor device according to claim 1, wherein the connecting conductor has a connector portion located between the first semiconductor element and the second semiconductor element, and a third terminal portion extending in a second extension direction opposite to the first extension direction from a second side surface of the sealing portion opposite to the first side surface.

5. a first terminal electrically connected to the second electrode via the first conductive layer; a first signal terminal electrically connected to the first control electrode via the first conductive layer; Further equipped with the first conductive layer includes a first conductive region and a second conductive region spaced from the first conductive region; the first conductive region includes a region overlapping with the first terminal in the first direction and a region overlapping with the second electrode in the first direction; 3 . The semiconductor device according to claim 1 , wherein the second conductive region includes a region overlapping with the first control electrode in the first direction and a region overlapping with the first signal terminal in the first direction.

6. a second terminal electrically connected to the third electrode via the second conductive layer; a second signal terminal electrically connected to the second control electrode via the second conductive layer; Further equipped with the second conductive layer includes a third conductive region and a fourth conductive region separated from the third conductive region and not overlapping with the second semiconductor element in the first direction; the third conductive region includes a region overlapping with the second terminal in the first direction and a region overlapping with the third electrode in the first direction; 3 . The semiconductor device according to claim 1 , wherein the fourth conductive region includes a region to which a conductive wire electrically connected to the second control electrode is connected, and a region overlapping with the second signal terminal in the first direction.

7. the connecting conductor includes a connector portion located between the first semiconductor element and the second semiconductor element in the first direction, and a third terminal portion extending from the connector portion in a second extending direction, the third terminal portion is aligned with the second control electrode in the first direction, 7. The semiconductor device according to claim 6, wherein a distance along the first direction between the third terminal portion and the second semiconductor element is longer than a distance along the first direction between the third terminal portion and the first semiconductor element.

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