Sound reproduction microcontroller

Abstract

To provide a sound reproduction microcontroller capable of reducing communication time between a microcomputer and an external memory, in comparison with the case where sound data is subsequently acquired after acquiring address data from the external memory in a reproduction process.SOLUTION: A sound reproduction microcontroller includes: an internal memory storing address data of sound data constituting a series of phrases, among address data relating to a series of phrases constituting sound data for reproducing sound stored in the external memory and address data of at least one sound data; a control unit controlling so that the sound data based on the address data of the sound data constituting the series of phrases stored in the internal memory is acquired from the external memory when the address data of the sound data constituting the series of phases requested for reproduction is stored in the internal memory; and a reproduction processing unit.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The disclosed technology relates to sound reproduction microcontrollers. [Background technology]

[0002] Patent Document 1 discloses a recording / playback control device comprising: a reading means for reading data recorded on an information storage medium; a compression means for compressing the data read by the reading means; a recording means for recording the data read by the reading means in a first area and for recording the data compressed by the compression means in a second area; and an output means for outputting the data recorded in the first area while the recording means is recording the compressed data.

[0003] Patent document 2 discloses a voice generation control device comprising: an audio data memory for storing multiple audio data to which an end code has been added; an audio address pointer for specifying an address of the audio data memory; an audio flag that is set when audio is output and reset when audio output is stopped; an audio start address register in which data specifying an audio start address is set; means for transferring the contents of the audio start address register to the audio address pointer in response to the audio flag being set; means for starting counting up the audio address pointer in response to the audio flag being set; means for resetting the audio flag in response to reading out the end code from the audio data memory; and means for stopping counting up the audio address pointer in response to reading out the end code or resetting the audio flag.

[0004] Patent document 3 discloses an audio playback device characterized by comprising, on a single card board, a PC card interface means, a non-volatile semiconductor memory, an operation means for inputting the file name of an audio information file to be played back, a microcomputer that stores the audio information file supplied from the PC card interface means in the non-volatile semiconductor memory in accordance with a predetermined file management method supported by a personal computer and retrieves an audio information file with the file name specified by the operation means from the non-volatile semiconductor memory in accordance with the file management method, and a playback means that reproduces audio information based on the audio information file retrieved by the microcomputer.

[0005] Patent document 4 discloses a voice playback device that plays voice data useful to users of transportation facilities, characterized in that the voice playback device comprises a memory means for storing standard voice data common to each transportation facility and variable voice data that changes for each transportation facility, and a data request output means for outputting a predetermined data request to the memory means depending on the operating status of the transportation facility.

[0006] Patent document 5 discloses a voice synthesis device that comprises a memory for storing voice data, an address selection unit for reading out specific voice data from this memory, and a voice reproduction circuit for reproducing the read voice data and synthesizing voice through a speaker, and that is configured to also use this speaker to sound an alarm such as a buzzer. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2005-078690 A [Patent Document 2] Japanese Patent Application Publication No. 9-179718 [Patent Document 3] Japanese Patent Application Publication No. 10-247159 [Patent Document 4] Japanese Patent Application Publication No. 9-146600 [Patent Document 5] Publication No. 58-193599 Summary of the Invention [Problem to be solved by the invention]

[0008] Microcontrollers (hereinafter referred to as "microcomputers") are known that acquire sound data using address data indicating the location of the sound data stored in an external memory, and perform playback processing to play sound based on the acquired sound data.

[0009] In such a microcontroller, when playing multiple sounds consecutively, the microcontroller must first access the external memory to obtain address data, and then sequentially perform the process of obtaining the sound data, which takes time to communicate with the external memory.

[0010] According to the present disclosure, an object of the present disclosure is to provide a sound playback microcontroller that can reduce the communication time between a microcontroller and an external memory during playback processing, compared to a case in which the process of acquiring address data from an external memory and then acquiring sound data is performed sequentially. [Means for solving the problem]

[0011] The sound playback microcontroller of the first aspect includes an internal memory that stores address data for sound data constituting a series of phrases, the address data being stored in an external memory, and address data relating to a series of phrases consisting of address data for at least one piece of sound data; a control unit that, when the address data of sound data constituting a series of phrases requested to be played back is stored in the internal memory, controls the internal memory to retrieve sound data based on the address data of the sound data constituting the series of phrases stored in the internal memory; and a playback processing unit that performs processing on the sound data retrieved from the external memory to reproduce the sound. Effect of the Invention

[0012] According to the disclosed technology, in sound playback processing, it is possible to reduce the communication time between the microcontroller and the external memory compared to a case where the process of obtaining address data from an external memory and then obtaining sound data is performed sequentially. [Brief description of the drawings]

[0013] [Figure 1] 1 is a diagram showing an example of a schematic of a sound reproduction device including a sound reproduction microcontroller according to an embodiment of the present invention; [Diagram 2] FIG. 2 is a diagram showing an example of a schematic memory map of an external storage device according to the embodiment; [Diagram 3] 3 is a diagram for explaining in detail a memory map of the external storage device 20 shown in FIG. 2. FIG. [Figure 4] FIG. 2 is a block diagram showing a hardware configuration of a microcomputer according to the embodiment. [Diagram 5] 13 is a flowchart showing a process performed by a sound reproduction process program. [Figure 6] FIG. 2 is a schematic diagram illustrating an example of a memory map of an internal memory. [Figure 7] FIG. 2 is a schematic diagram illustrating an example of a memory map of an internal memory. [Figure 8] FIG. 2 is a schematic diagram illustrating an example of a memory map of an internal memory. [Figure 9] 10 is a flowchart showing an example of another operation of the reproduction processing program. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] The technology of the present disclosure will be described below with reference to the drawings. In each drawing, the same or equivalent components are given the same reference symbols. In addition, the dimensional ratios of the drawings may be exaggerated for the convenience of explanation and may differ from the actual ratios.

[0015] FIG. 1 is a diagram showing an example of a schematic configuration of a sound reproducing device 50 including a sound reproducing microcontroller (hereinafter simply referred to as a "microcomputer") 10 according to this embodiment.

[0016] 1 includes a microcomputer 10 according to the present embodiment, an external storage device 20, and a speaker 30. The microcomputer 10, the external storage device 20, and the speaker 30 are communicatively connected. The external storage device 20 is an example of an "external memory." The speaker 30 may be integrated with the microcomputer 10, for example.

[0017] The microcomputer 10 acquires the sound data stored in the external storage device 20, executes a playback process on the sound data, and then controls the output of the processed sound data to the speaker 30. As a result, sound is output from the speaker 30.

[0018] The sound reproducing device 50 functions as a device that emits sound, for example, as a device that announces the time. As an example, the sound reproducing device 50 can emit a voice such as "It is now xx o'clock" on the hour or at a fixed time such as 1 o'clock, 2 o'clock, ..., 24 o'clock. In this case, the microcomputer 10 controls the sound reproducing device 50 to announce the time on the hour or at a fixed time.

[0019] FIG. 2 is a diagram showing an example of a schematic memory map of the external storage device 20 according to this embodiment.

[0020] The external storage device 20 is made up of areas including an address data management area 22, a sound data management area 24, and a series of phrases management area .

[0021] The sound data management area 24 stores a plurality of pieces of sound data of sounds that can be output by the sound reproducing device 50. For example, if the sound reproducing device 50 can output a voice saying "It is now xx o'clock", the sound data management area 24 stores each piece of sound data indicating, for example, "now", "of", "the time is", "xx o'clock", and "is".

[0022] A series of phrases is stored in the series of phrases management area 26. Here, a series of phrases is information that allows the sound reproduction device 50 to output one or more sounds, for example, a plurality of sounds, as a series of sounds. Also, a series of phrases is composed of a start address and an end address of the sound data stored in the sound data management area 24.

[0023] A series of phrases will be specifically described. For example, assume that the sound reproducing device 50 can output a voice saying "It is now xx o'clock." In this case, the series of phrases management area 26 stores one series of phrases configured by sequentially arranging the start addresses and end addresses of each piece of sound data indicating "now," "of," "the time is," "xx o'clock," and "is." The start address of the sound data is address data indicating the start position of the position where the sound data is stored in the sound data management area 24. The end address of the sound data is address data indicating the end position of the position where the sound data is stored in the sound data management area 24. The start address and end address of the sound data are examples of "address data of sound data."

[0024] The address data management area 22 stores address data indicating the start address and end address of each of a plurality of series of phrases stored in the series of phrases management area 26. The start address of a series of phrases is address data indicating the start position of the position where the series of phrases is stored in the series of phrases management area 26. The end address of a series of phrases is address data indicating the end position of the position where the series of phrases is stored in the series of phrases management area 26. The start address and end address of a series of phrases are an example of "address data of a series of phrases."

[0025] The data stored in each area of ​​the external storage device 20 may be updated as needed.

[0026] The data stored in each area of ​​the external storage device 20 will be described in detail with reference to FIG.

[0027] FIG. 3 is a diagram for explaining in detail the memory map of the external storage device 20 shown in FIG.

[0028] According to the example shown in FIG. 3, the sound data management area 24 stores n pieces of sound data (n is an integer equal to or greater than 1).

[0029] In the example shown in FIG. 3, series of phrases A stored in series of phrases management area 26 is composed of the start address and end address of sound data 1 and the start address and end address of sound data 2. Sound data 1 is the first sound data of series of phrases A. Sound data 2 is the last sound data of series of phrases A. Series of phrases B is composed of the start address and end address of sound data 4, the start address and end address of sound data not shown, and the start address and end address of sound data 9. Sound data 4 is the first sound data of series of phrases B. Sound data 4 is the last sound data of series of phrases B.

[0030] According to the example shown in FIG. 3, the address data management area 22 stores the start address and end address of each series of phrases stored in the series of phrases management area 26. The start address of series of phrases A shown in FIG. 3 is information indicating the position of the start address of sound data 1 of series of phrases A stored in the series of phrases management area 26. The end address of series of phrases A is information indicating the position of the end address of sound data 2 of series of phrases A stored in the series of phrases management area 26. The start address of series of phrases B shown in FIG. 3 is information indicating the position of the start address of sound data 4 stored in the series of phrases management area 26. The end address of series of phrases B is information indicating the position of the end address of sound data 9 stored in the series of phrases management area 26. The address data of a series of phrases and the address data of the sound data constituting a series of phrases are examples of "address data related to a series of phrases".

[0031] Next, the configuration of the microcomputer 10 according to the present embodiment will be described with reference to FIG.

[0032] Fig. 4 is a block diagram showing a hardware configuration of the microcomputer 10 according to this embodiment. As shown in Fig. 4, the microcomputer 10 includes a CPU (Central Processing Unit) 11A, a ROM (Read Only Memory) 11B, a RAM (Random Access Memory) 11C, a communication unit (I / O) 11D, a memory 11E, and a sound reproducing circuit 11F. The CPU 11A, the ROM 11B, the RAM 11C, the communication unit 11D, the memory 11E, and the sound reproducing circuit 11F are connected to each other via a bus 11G. The memory 11E is also connected to, for example, the CPU 11A.

[0033] The CPU 11A is a central processing unit, and reads out a sound reproduction processing program 100 and various other programs stored in the ROM 11B and the like. Details of the sound reproduction processing program 100 will be described later (see FIGS. 5 and 9). The CPU 11A uses the RAM 11C as a working area and executes the read-out programs to control the microcomputer 10. The CPU 11A is an example of a "control unit."

[0034] The communication unit 11D is an interface for communication between the microcomputer 10 and the external storage device 20, the speaker 30, and the like.

[0035] The memory 11E is, for example, a volatile or non-volatile storage device having a cache function. In the memory 11E, data in the memory 11E is managed using, for example, an LFU (Least Frequently Used) method. Details of data management in the memory 11E using the LFU method according to this embodiment will be described later (see FIGS. 6 to 8). Note that the memory 11E is an example of an "internal memory."

[0036] The sound reproducing circuit 11F performs a reproducing process for the sound data acquired from the external storage device 20 based on the series of phrases so that the sound reproducing device 50 can reproduce the sound, and outputs the processed sound data to the speaker 30.

[0037] Here, the sound reproducing circuit 11F includes a setting register 12A, a memory 12B, and a filter circuit 12C. For example, a FIFO (First In First Out) method is applied to the memory 12B. The CPU 11A sequentially stores the acquired sound data in the memory 12B. The sound data stored in the memory 12B is sequentially output to the filter circuit 12C by, for example, a FIFO method. The CPU 11A controls the filter circuit 12C to, for example, voltage convert the sound data output from the memory 12B according to the setting stored in the setting register 12A. The CPU 11A controls the filter circuit 12C to output the sound data voltage-converted to the speaker 30. The sound reproducing circuit 11F is an example of a "reproducing processing unit".

[0038] Next, the operation of the microcomputer 10 in accordance with the sound reproduction processing program 100 executed by the CPU 11A will be described with reference to FIG.

[0039] Fig. 5 is a flowchart showing the processing by the sound reproduction processing program 100. The processing shown in Fig. 5 is started, for example, when the microcomputer 10 is started.

[0040] In step S100, the CPU 11A acquires an arbitrary number of pieces of address data of sound data constituting a series of phrases from, for example, the series of phrases management area 26 of the external storage device 20, and stores the pieces of address data in the memory 11E. Note that the CPU 11A may acquire the address data of the sound data after, for example, referring to the start address and end address of an arbitrary series of phrases stored in the address data management area 22. In this case, the start address and end address of the sound data constituting the arbitrary series of phrases referenced in the address data management area 22 may be acquired and stored.

[0041] Specifically, it is assumed that the CPU 11A refers to address data of, for example, a series of phrases A, a series of phrases B, and a series of phrases C from the address data management area 22. In this case, the CPU 11A stores, for example, the start address and end address of sound data 1 of the series of phrases A in the memory 11E. Alternatively, the memory 11E may store the start address and end address of sound data 1 and the start address and end address of sound data 2. The CPU 11A also stores, for example, the start address and end address of sound data 4 of the series of phrases B in the memory 11E. Alternatively, the memory 11E may store the start address and end address of sound data 4 of the series of phrases B, the start address and end address of sound data not shown, and the start address and end address of sound data 9. The CPU 11A also stores, for example, the start address and end address of the first sound data of the series of phrases C in the memory 11E. Alternatively, the start address and end address of each piece of sound data constituting the series of phrases C may all be stored in the memory 11E.

[0042] In step S102, the CPU 11A determines whether or not a request to play back sound (hereinafter simply referred to as a "playback request") has been received. The playback request can be received, for example, via the communication unit 11D in response to an instruction from outside. The playback request includes, for example, an instruction to specify address data of a series of phrases required for playback. Alternatively, the playback request can include information indicating the position in the address data management area 22 where the address data of the series of phrases is stored.

[0043] If a playback request is accepted in step S102, the CPU 11A makes an affirmative determination and executes the process of step S104. If a playback request is not accepted, the CPU 11A executes the process of step S102.

[0044] In step S104, CPU 11A identifies a series of phrases for playing back sounds based on the playback request. Hereinafter, the series of phrases identified by the playback request will be referred to as "playback phrases."

[0045] In detail, for example, if the reproduction request includes a start address and an end address of a series of phrases, the CPU 11A identifies the corresponding series of phrases in the series of phrases management area 26. Also, for example, if the reproduction request includes information indicating a position where the address data of the series of phrases is stored in the address data management area 22, the CPU 11A obtains the address data of the corresponding series of phrases, for example, in the address data management area 22. Then, the CPU 11A identifies the corresponding series of phrases in the series of phrases management area 26.

[0046] In step S106, CPU 11A searches for address data of sound data stored in memory 11E. Details of the search for address data of sound data in memory 11E will be described later (see FIGS. 6 to 8).

[0047] In step S108, CPU 11A judges whether or not address data of sound data constituting the reproduced phrase has been stored in memory 11E. In detail, at the time when the process of step S106 is executed, CPU 11A judges whether or not address data of sound data of the reproduced phrase to be processed is stored in memory 11E. Note that the address data of the sound data of the reproduced phrase to be processed indicates, for example, the address data of sound data 1 when the process of step S106 is executed for the first time and the reproduced phrase is a series of phrases A. Also, when the reproduced phrase is a series of phrases A and the process of step S106 is executed for the second time, it indicates the address data of sound data 2.

[0048] If the address data of the sound data of the target reproduced phrase can be acquired from the memory 11E, the determination is affirmative, and the CPU 11A executes the process of step S114. If the address data of the sound data of the target reproduced phrase is not stored in the memory 11E, the determination is negative, and the CPU 11A executes the process of step S110.

[0049] In step S110, CPU 11A searches external storage device 20 to obtain address data of the sound data of the target reproduction phrase. Note that here, for example, all of the address data of the sound data constituting the reproduction phrase may be obtained.

[0050] In step S112, the CPU 11A stores the address data of the acquired sound data in the memory 11E.

[0051] In step S114, the CPU 11A acquires sound data from the sound data management area 24 based on the address data of the sound data constituting the playback phrase stored in the memory 11E. The acquired sound data is stored in the memory 12B of the sound playback circuit 11F. The CPU 11A controls the sound data stored in the memory 12B to be output to the filter circuit 12C.

[0052] In step S116, the CPU 11A executes processing by the filter circuit 12C. In detail, the CPU 11A controls the sound data output from the memory 12B to be output to the filter circuit 12C, and also controls the sound data to be converted into voltage, for example, in accordance with the settings stored in the setting register 12A.

[0053] In step S118, the CPU 11A controls the filter circuit 12C to output to the speaker 30 the sound data converted therein.

[0054] In step S120, the CPU 11A judges whether or not sound data based on the end address of the reproduced phrase, in other words, the final sound data of the reproduced phrase, has been output to the speaker 30. If the final sound data of the reproduced phrase has been output to the speaker 30, the CPU 11A judges yes and executes the process of step S122. If the final sound data of the reproduced phrase has not been output to the speaker 30, the CPU 11A judges no and executes the process of step S106. Note that a case where the final sound data of the reproduced phrase has not been output to the speaker 30 refers to a case where, for example, the process for the final sound data of the reproduced phrase has not been completed.

[0055] In step S122, the CPU 11A determines whether or not to end the processing by the sound reproduction processing program 100. The processing by the sound reproduction processing program 100 ends, for example, when the power of the microcomputer 10 is turned off. If the power of the microcomputer 10 is turned off, the determination in step S122 is positive, and the CPU 11A ends the processing by the sound reproduction processing program 100. On the other hand, if the power of the microcomputer 10 remains on, for example, the determination in step S122 is negative, and the CPU 11A executes the processing of step S102.

[0056] Next, an overview of a method for managing data stored in the internal memory will be described with reference to Figures 6 to 8. The address data of the sound data acquired from the external storage device 20 and stored in the internal memory including the memory 11E by the processes of steps S100 and S112 in Figure 5 is managed, for example, by the method shown below.

[0057] 6, 7, and 8 are schematic diagrams showing examples of memory maps of the internal memory.

[0058] As shown in FIG. 6, address data of a plurality of pieces of sound data is stored in the internal memory by the processes of steps S100 and S112, for example.

[0059] Specifically, assume that the start address and end address of each piece of sound data constituting a series of phrases A are obtained from the external storage device 20. In this case, for example, the start address of sound data 1 is stored at the position of address data 1 shown in FIG. 6. The end address of sound data 1 is stored at the position of address data 2. The start address of sound data 2 is stored at the position of address data 3, and the end address of sound data 2 is stored at the position of address data 4. Alternatively, the start address and end address of sound data 1 may be stored at the position of address data 1, and the start address and end address of sound data 2 may be stored at the position of address data 2.

[0060] Then, assume that the start address and end address of each piece of sound data constituting the series of phrases B are obtained, for example, from the external storage device 20. In this case, for example, the start address of sound data 4 is stored at the position of address data 5 shown in FIG. 6. Also, the end address of sound data 4 is stored at the position of address data 6. Also, the start addresses and end addresses of sound data included in the series of phrases B, not shown in FIG. 3, are stored in order at positions after address data 7. In this way, when the start addresses and end addresses of the sound data of the series of phrases are stored in memory 11E sequentially from the start address of the first sound data, the start address and end address of the last sound data 9 of the series of phrases B are stored, for example, at the positions of address data 13 and address data 14 shown in FIG. 6.

[0061] For example, in the first processing of step S106, when searching for address data of sound data stored in memory 11E, CPU 11A starts the search from the top position of memory 11E, specifically, from the position of address data 1 shown in Fig. 6. Also, when the determination in step S108 is positive, for example, when address data of sound data at the position of address data 3 shown in Fig. 6 is acquired, CPU 11A starts the search from the position of address data 4 in the second processing of step S106.

[0062] Furthermore, when the determination in step S108 is positive, CPU 11A counts the rows in the internal memory including the position where the address data of the acquired sound data is stored. In the example shown in FIG. 6, the rows in memory 11E including the position of address data 3 are counted. CPU 11A stores the count number in memory 11E etc. as the number of references. The number of references for each row in memory 11E is incremented each time it is referenced. The example shown in FIG. 6 indicates that the first row is referenced "1" time, and the other rows are not referenced.

[0063] 7. Also, for example, in the second process of step S106, when address data of the sound data at the position of the address data 10 shown in FIG.

[0064] Here, the address data of the sound data to be stored is accumulated in the internal memory, for example, depending on the number of times the process of step S112 is performed. The amount of address data of the sound data that can be accumulated is limited depending on the capacity of the internal memory. When new address data of sound data is stored in the internal memory, if the capacity of the internal memory is insufficient, the CPU 11A can overwrite the address data of the sound data stored in the internal memory to store the new address data. When overwriting, the CPU 11A can preferentially overwrite the address data of the sound data in the row with the least number of references. For example, as shown in FIG. 8, if the second row of the memory 11E has the least number of references, the CPU 11A preferentially overwrites the address data stored in the second row.

[0065] According to the present embodiment described above, when the determination in step S108 is positive, that is, when the address data of the sound data can be acquired from the internal memory, the number of times that the CPU 11A communicates with the external memory is reduced. This reduces the communication time between the CPU 11A and the external memory, and improves the processing efficiency of the CPU 11A.

[0066] Next, another operation of the sound reproduction processing program 100 will be described with reference to Fig. 9. The CPU 11A may execute the process shown in Fig. 9 according to the usage status, configuration status, etc. of the microcomputer 10.

[0067] Fig. 9 is a flowchart showing an example of another operation of the sound reproduction processing program 100. Note that the same processes as those shown in Fig. 5 are denoted by the same reference numerals and the description thereof will be omitted. Note that the difference from the process shown in Fig. 5 is the process of step S200 and the process of step S202.

[0068] 9, when the determination in the process of step S102 is affirmative, the CPU 11A specifies the playback phrase in the process of step S104. Then, in step S106, the CPU 11A searches for address data of the sound data stored in the memory 11E.

[0069] Here, CPU 11A executes the process of step S200 simultaneously with the process of step S106, for example.

[0070] In step S200, the CPU 11A searches for address data stored in the external storage device 20, for example, in the address data management area 22 and / or the series of phrases management area 26.

[0071] In step S202, the CPU 11A determines whether or not the address data of the sound data of the reproduction phrase to be processed has been obtained from the memory 11E before the external storage device 20. For example, if the address data of the sound data to be processed is not stored in the memory 11E, the address data is obtained from the external storage device 20 before the memory 11E, and the determination in step S202 is negative. On the other hand, if the address data of the sound data to be processed is stored in the memory 11E and the address data is obtained from the memory 11E before the external storage device 20, the determination in step S202 is positive.

[0072] 9, the internal memory and the external memory are searched simultaneously, so the time required to obtain address data of the sound data is reduced compared to a process in which the internal memory is searched first and then the external memory is searched if no hit is found. Also, if the address data of the sound data can be obtained from the internal memory before the external memory, the number of communications between the CPU 11A and the external memory is reduced.

[0073] In the description of FIGS. 4 to 9, the internal memory has been described as an example of the "memory 11E", but the function of the memory 11E may be provided in, for example, the RAM 11C. For example, the cache function of the memory 11E may be configured to be provided in the RAM 11C. In this case, the RAM 11C functions as the internal memory. When the RAM 11C functions as the internal memory, the microcomputer 10 does not include the memory 11E, and is configured from the CPU 11A, the ROM 11B, the RAM 11C, the communication unit 11D, and the sound reproducing circuit 11F. In addition, when the memory 11E is provided in the microcomputer 10, a memory that requires less time for communication than the time required for communication between the RAM 11C and the CPU 11A is used. In other words, the communication time between the memory 11E and the CPU 11A may be configured to be less than the communication time between the CPU 11A and the RAM 11C.

[0074] As described above, according to the microcomputer 10 of this embodiment described with reference to Figs. 1 to 9, the number of communications between the CPU 11A and the external memory can be reduced. This reduces the communication time between the microcomputer 10 and the external memory. In particular, when a series of phrases that has been reproduced once is reproduced again, the address data of the sound data constituting the series of phrases that has been reproduced once is stored in the internal memory. Therefore, when a series of phrases is reproduced again, the time required for the CPU 11A to communicate with the external memory is reduced compared to when the series of phrases is reproduced for the first time.

[0075] 5 and 9, the sound reproduction processing program 100 may be configured to execute a process in which the CPU 11A determines whether address data of sound data or address data of a series of phrases can be acquired from an external device. By performing such a process, for example, when the microcomputer 10 is started, the CPU 11A ends the process by the sound reproduction processing program 100 when an external storage device that stores only sound data is connected to the microcomputer 10.

[0076] As described above, according to the process of storing only address data in the internal memory, it is possible to provide an internal memory with a smaller capacity in the microcomputer 10 than the internal memory for storing sound data. Also, by storing address data in the internal memory, more information can be stored in the internal memory compared to the case where sound data is stored in the internal memory, so that, for example, a positive determination is more likely to be obtained in the process of step S108. This can improve the efficiency of the process of the CPU 11A compared to the case where sound data is stored in the internal memory.

[0077] (Appendix 1) an internal memory for storing address data for a series of phrases, the series of phrases being composed of sound data for reproducing sounds and address data for at least one piece of sound data, the address data being stored in an external memory; and a control unit that, when address data of sound data constituting a series of phrases requested to be reproduced is stored in the internal memory, controls to acquire sound data based on the address data of the sound data constituting the series of phrases stored in the internal memory from the external memory; a playback processing unit that performs processing for playing back the sound on the sound data acquired from the external memory; Equipped with Sound playback microcontroller. (Appendix 2) The control unit is storing, in the internal memory, as address data of the sound data constituting the series of phrases, a start address of the sound data constituting the series of phrases, an end address of the sound data constituting the series of phrases, or both of them; 2. The sound playing microcontroller of claim 1. (Appendix 3) The control unit is storing address data of the sound data constituting the series of phrases in the internal memory at the time of startup; 3. The sound reproducing microcontroller of claim 1 or 2. (Appendix 4) The control unit is searching for address data of the sound data constituting the series of phrases requested to be reproduced in the internal memory and the external memory simultaneously; when address data of the series of phrases requested to be reproduced is acquired from the internal memory prior to acquisition from the external memory, control is performed so that sound data based on the address data of the series of phrases requested to be reproduced acquired from the internal memory is acquired from the external memory. 4. The sound reproducing microcontroller of claim 1. (Appendix 5) The internal memory is a storage device different from the pre-installed RAM. 5. The sound reproducing microcontroller of claim 1. [Explanation of symbols]

[0078] 10...microcomputer, 11E...memory, 11F...sound playback circuit, 20...external storage device, 30...speaker, 50...sound playback device, 100...sound playback processing program,

Claims

1. an internal memory for storing address data for a series of phrases, the series of phrases being composed of sound data for reproducing sounds and address data for at least one piece of sound data, the address data being stored in an external memory; a control unit that, when address data of sound data constituting a series of phrases requested to be reproduced is stored in the internal memory, controls to acquire sound data based on the address data of the sound data constituting the series of phrases stored in the internal memory from the external memory; a playback processing unit that performs processing for playing back the sound on the sound data acquired from the external memory; Equipped with Sound playback microcontroller.

2. The control unit is storing at least one of a start address of the sound data constituting the series of phrases and an end address of the sound data constituting the series of phrases in the internal memory as address data of the sound data constituting the series of phrases; 2. The sound reproducing microcontroller of claim 1.

3. The control unit is storing address data of the sound data constituting the series of phrases in the internal memory at the time of startup; 2. The sound reproducing microcontroller of claim 1.

4. The control unit is searching for address data of the sound data constituting the series of phrases requested to be reproduced in the internal memory and the external memory simultaneously; when address data of the series of phrases requested to be reproduced is acquired from the internal memory prior to acquisition from the external memory, control is performed so that sound data based on the address data of the series of phrases requested to be reproduced acquired from the internal memory is acquired from the external memory; A sound reproducing microcontroller according to any one of claims 1 to 3.

5. The internal memory is a storage device different from a pre-installed RAM.

5. A sound reproducing microcontroller as claimed in claim 4.

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