Quantum operation system and method for controlling inter-device synchronization in quantum operation

Abstract

To provide a quantum operation system and an inter-device synchronization control method for supplying a synchronization signal with high accuracy for controlling quantum operation at high speed.SOLUTION: The quantum operation system is provided with a quantum device for executing a quantum operation, a plurality of instrumentation devices for transmitting a control signal for executing the quantum operation to the quantum device, and a synchronous trigger distribution device for transmitting a second trigger signal instructing transmission of the control signal to at least one of the plurality of instrumentation devices on the basis of a first trigger signal indicating timing. The synchronous trigger distribution device is provided with a control sequence table for specifying a predetermined instrumentation device to output the second trigger signal among the plurality of instrumentation devices on the basis of the first trigger signal, and a delay time table for specifying a delay time corresponding to each of the plurality of instrumentation devices, and outputs a second trigger signal to the instrumentation device specified based on the control sequence table at a timing based on the delay time specified based on the delay time table.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a gate-type quantum computer system, and in particular to an inter-device synchronization control method when a system is configured with multiple instrumentation devices (including semiconductor chips) that operate in conjunction with each other with high timing precision as a means for manipulating the electron spin of a quantum computing device in which multiple single-electron spin quantum dots are arranged, and for generating the control signals required to read out the electron spin state. [Background technology]

[0002] The performance improvement by miniaturization of semiconductor elements, which has supported the progress of computers for more than half a century, is expected to reach its limit in the near future due to the comparison between the process rule and the atomic distance of silicon. Quantum computers are an attempt to overcome this limit by new calculation principles and devices, and quantum operation devices and operation methods using superconducting circuits, ion traps, photons, silicon quantum dots, etc. have been proposed. In addition, as a preliminary step to the future concept of running large-scale practical applications on an error-tolerant general-purpose quantum computer system, at present, proof-of-principle demonstration and algorithm exploration of a system called NISQ (Noisy Intermediate-Scale Quantum Device) is underway, which is based on the concept that the number of qubits is small (about 100) and error correction is not possible.

[0003] To realize a quantum computer system that applies quantum computing devices that use quantum effects manifested at extremely low temperatures as the computing principle, such as the spin of a single electron in a silicon quantum dot, it is customary to choose a dilution refrigerator as the device to incorporate it into. In this case, the quantum computing device is fixed in thermal contact with the mixing chamber, which has the lowest temperature in the dilution refrigerator, and the signals required to control the operation of the quantum computing device are applied from a signal generator placed outside the dilution refrigerator, and the computation results (quantum dot state) are read out by a measuring device also outside the dilution refrigerator, in a configuration similar to that of an experimental device.

[0004] US Pat. No. 5,999,333 discloses a system including at least two sets of superconducting logic devices, a cooling apparatus adapted to cool the logic devices to a first operating temperature, and an interconnect coupling the superconducting logic devices.

[0005] Patent Document 3 discloses a quantum bit array comprising a semiconductor layer, an insulating layer disposed on the semiconductor layer, and a plurality of first gate electrodes disposed on the insulating layer and configured to trap electrons of a predetermined spin state in the semiconductor layer by application of a voltage, the quantum bit array being characterized in that, when changing the spin state of the electrons, a current for forming a magnetic field acting on the electrons is passed through at least one of the first gate electrodes in the extension direction of the first gate electrode. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2013-090358 A [Patent Document 2] Special Publication No. 2021-523572 [Patent Document 3] JP 2022-130893 A Summary of the Invention [Problem to be solved by the invention]

[0007] For example, in order to place the quantum bit array described in Patent Document 3 in the coldest part of a dilution refrigerator (cryogenic environment) and control quantum operations at high speed, it is necessary to supply a highly accurate synchronization signal. Because the space in the area maintained in the cryogenic environment is limited, it is preferable to supply the synchronization signal from outside the cryogenic environment, but this makes it difficult to shorten the wiring length and to improve synchronization accuracy.

[0008] Patent Document 1 relates to system voltage detection and phase synchronization control in a series multiple inverter device that operates in conjunction with a system, and discloses a technology for improving the synchronization accuracy of multiple slave control devices controlled by a phase synchronization signal with the system by correcting (advancing) the phase synchronization signal on the master control device side by the time required for the signal. By using this technology, it is expected that the operation of all slave control devices can be efficiently synchronized with the system when the synchronization target that is the reference for device operation has a repetitive waveform such as the system voltage and multiple slave control devices perform the same operation.

[0009] A quantum computer with a quantum operation device at its core is in fact an analog computer with analog information added to quantum dots. In order to achieve the desired fidelity of quantum operations, which determines the final operation accuracy of a quantum computer, it is not enough to simply introduce instrumentation devices with sufficient accuracy and characteristics, such as bias voltage generators, high-frequency generators, and micro-voltage / current amplifiers used to read the state of quantum dots such as electron spin, and connect them to a quantum operation device; it is also necessary to control the operation timing of each instrumentation device according to the control sequence of the quantum operation to be executed, and to match (synchronize) the relative operation timing between the devices with high time accuracy (for example, 10 nanoseconds).

[0010] Usually, the vendor of the instrumentation equipment is not the same, and the response delay time of the instrumentation equipment, that is, the time from when the equipment that controls the instrumentation equipment issues a specific operation request to when the requested operation actually starts on the instrumentation equipment side (including the propagation delay of the medium that transmits the operation request and the delay due to the protocol), differs for each instrumentation equipment. This characteristic is also common when introducing modular measurement systems such as PXI (trademark), and it goes without saying that control synchronization between modules that takes the response delay time into consideration is necessary.

[0011] Therefore, an object of the present invention is to provide a highly accurate synchronization signal for controlling quantum operations at high speed. [Means for solving the problem]

[0012] A preferred aspect of the present invention is a quantum computing system comprising: a quantum device that performs quantum operations; a plurality of instrumentation devices that transmit a control signal for performing the quantum operations to the quantum device; and a synchronous trigger distribution device that transmits a second trigger signal instructing the transmission of the control signal to at least one of the plurality of instrumentation devices based on a first trigger signal indicating timing, wherein the synchronous trigger distribution device comprises: a control sequence table that identifies a specific instrumentation device among the plurality of instrumentation devices that should output the second trigger signal based on the first trigger signal; and a delay time table that identifies a delay time corresponding to each of the plurality of instrumentation devices, and outputs the second trigger signal to the instrumentation device identified based on the control sequence table, at a timing based on the delay time identified based on the delay time table.

[0013] Another preferred aspect of the present invention is an inter-device synchronization control method for quantum computing, which uses a quantum device that performs a quantum operation, a plurality of instrumentation devices that transmit a control signal for performing the quantum operation to the quantum device, and a synchronization trigger distribution device that transmits a second trigger signal instructing transmission of the control signal to at least one of the plurality of instrumentation devices based on a first trigger signal indicating timing, wherein the synchronization trigger distribution device executes the following steps: a first step of identifying a specific instrumentation device among the plurality of instrumentation devices that should output the second trigger signal based on the first trigger signal; a second step of identifying a delay time corresponding to each of the plurality of instrumentation devices; and a third step of outputting the second trigger signal to the instrumentation device identified based on the first step, at a timing based on the delay time identified based on the second step. Effect of the Invention

[0014] It is possible to supply a highly accurate synchronization signal for controlling quantum operations at high speed. [Brief description of the drawings]

[0015] [Figure 1] 1 is a block diagram showing a configuration of a quantum computing system 1 according to a first embodiment. [Diagram 2] FIG. 2 is a block diagram showing a configuration of a synchronization trigger distribution device 200. [Diagram 3] 13 is a table diagram showing an example of settings in a control sequence table 230. FIG. [Figure 4] 10 is a table diagram showing an example of settings in a response delay time table 240. FIG. [Diagram 5] 13 is a table showing an example of a definition of a command format of the master trigger signal 303. FIG. [Figure 6] 2 is a timing chart of a control sequence of quantum operations in the quantum computing system 1. [Figure 7] 11 is a detailed timing chart relating to sequence switching in the synchronization trigger distribution device 200. [Figure 8] FIG. 11 is a block diagram showing a configuration of a quantum computing system 1A according to a second embodiment. [Figure 9] FIG. 2 is a block diagram showing a configuration of a synchronization trigger distribution device 200A. [Figure 10] FIG. 13 is a table diagram showing an example of settings in a control sequence table 230A. [Figure 11] FIG. 13 is a table diagram showing an example of settings in a response delay time table 240A. [Figure 12] 1 is a timing chart of a control sequence of quantum operations in the quantum computing system 1A. [Figure 13] Fig. 11 is a block diagram showing a configuration of a quantum computing system 1B according to a third embodiment Fig. 12 is a block diagram showing a configuration of a quantum computing system 1B according to a third embodiment. [Figure 14] FIG. 2 is a block diagram showing a configuration of a synchronization trigger distribution device 200B. [Figure 15] FIG. 13 is a table diagram showing an example of settings in a control sequence table 230B. [Figure 16]13 is a timing chart of a control sequence of quantum operations in the quantum computing system 1B. [Figure 17] FIG. 1 is a conceptual diagram illustrating a quantum computing system according to an embodiment implemented in a dilution refrigerator. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, the present embodiment will be described with reference to the accompanying drawings. In the accompanying drawings, functionally identical elements may be indicated by the same or corresponding numbers. Note that the accompanying drawings show embodiments and examples according to the principles of the present disclosure, but these are for understanding the present disclosure and are not to be used to interpret the present disclosure in a limiting manner. The description in this specification is merely a typical example and does not limit the scope or application of the present disclosure in any sense.

[0017] In the present embodiment, the description is given in sufficient detail for a person skilled in the art to implement the present disclosure, but it should be understood that other implementations and forms are possible, and that changes in configuration and structure and replacement of various elements are possible without departing from the scope and spirit of the technical ideas of the present disclosure. Therefore, the following description should not be interpreted as being limited thereto.

[0018] In the configurations of the embodiments described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and duplicated explanations may be omitted.

[0019] When there are multiple elements having the same or similar functions, they may be described by using the same reference numerals with different subscripts. However, when there is no need to distinguish between multiple elements, the subscripts may be omitted.

[0020] The designations "first," "second," "third," and the like in this specification are given to identify components, and do not necessarily limit the number, order, or content. Furthermore, numbers for identifying components are used in different contexts, and a number used in one context does not necessarily indicate the same configuration in another context. Furthermore, a component identified by a certain number does not prevent the component from also having the function of a component identified by another number.

[0021] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings, etc. may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings, etc.

[0022] All publications, patents, and patent applications cited herein are hereby incorporated by reference in their entirety.

[0023] As used herein, elements referred to in the singular are intended to include the plural unless the context clearly indicates otherwise.

[0024] In the embodiments, a quantum computer system constructed by combining multiple instrumentation devices with different response delay times is described, which provides an inter-device synchronization control method required to realize a desired control sequence for quantum operations and to meet fidelity requirements, a synchronization trigger distribution device that generates a trigger signal specific to the instrumentation device with the response delay time corrected according to a preset control sequence, and a quantum computer system including the synchronization trigger distribution device.

[0025] A quantum computing system according to one embodiment of the present invention comprises a plurality of instrumentation devices that execute quantum operations of at least a part of a control sequence of a quantum operation, and a synchronization trigger distribution device that outputs a synchronization signal to the plurality of instrumentation devices. The synchronization trigger distribution device receives a trigger signal from a first instrumentation device, and outputs a corrected synchronization signal whose timing is corrected to correct the inherent processing delay time to an instrumentation device at the timing for outputting the synchronization signal based on a control sequence table that identifies whether or not it is the timing to output the synchronization signal to the plurality of instrumentation devices (including the first instrumentation device) and a delay time table that defines the processing delay time starting from the synchronization signal possessed by the plurality of instrumentation devices.

[0026] Furthermore, a variation of the synchronous trigger distribution device is characterized in that it includes an execution time control unit that internally generates a signal to replace the trigger signal received from the first instrumentation device, thereby enabling the realization of an autonomous control sequence that is not dependent on the trigger signal.

[0027] According to the inter-device synchronization control method and instrumentation device synchronization trigger distribution device of the embodiment, a highly practical quantum computing system is realized that synchronizes the operation of multiple instrumentation devices, each of which has a different processing delay time, with high timing accuracy and enables autonomous execution of a control sequence for a desired quantum operation. EXAMPLES

[0028] 1 shows the configuration of a quantum computing system 1 according to a first embodiment of the present invention. This embodiment is a system formed by combining a quantum device 500 that performs quantum operations, a host PC 100 having a system setting function 1001 that sets and manages the entire system, a plurality of instrumentation devices 300, 400, 410, and 420 that each perform at least a part of the quantum operation of the control sequence of the quantum operation, and a synchronization trigger distribution device 200 that outputs a unique synchronization signal to each of the instrumentation devices 300, 400, 410, and 420 based on a control sequence table and a response delay time table set by the host PC 100.

[0029] In this embodiment, the instrumentation device 300 and the synchronous trigger distribution device 200 have mutually compatible sequence control functions 3001 and 2001, and the instrumentation device 300 serves as a sequence control master device, and they cooperate with each other to perform sequence control.

[0030] The host PC 100 is usually installed in a room temperature environment (e.g., 20°C). On the other hand, the semiconductor chip constituting the quantum device 500 is placed in an extremely low temperature environment (e.g., minus 272°C) realized by a mixing chamber that has the lowest temperature in a cooling device such as a dilution refrigerator, enabling the manipulation of quantum dots. The quantum device 500 is configured to include a quantum bit array as described in, for example, Patent Document 3.

[0031] Other components are generally placed in a room temperature environment, but among the instrumentation devices 300, 400, 410, and 420, the instrumentation devices having the form of a semiconductor chip may be placed in an environment lower than the room temperature environment in the dilution refrigerator (but not in the cryogenic environment in which quantum dots operate). If the cooling capacity of the mixing chamber is sufficiently high, the instrumentation device having the form of a semiconductor chip and the quantum device 500 may be composed of the same semiconductor chip, and the entire device may be placed in a cryogenic environment.

[0032] The host PC 100 is a general information processing device equipped with a microprocessor, memory, storage device, input device, output device, etc. (not shown). The host PC 100 has a system setting function 1001 that performs device-specific settings for the synchronization trigger distribution device 200 and the instrumentation devices 300, 400, 410, 420. In addition, the system setting function 1001 operates a system control application that transfers quantum dot states read out by a predetermined measurement process as part of a control sequence to the host PC 100 and monitors the state and manages the operation of the quantum computing system 1 in at least a part of the instrumentation devices 300, 400, 410, 420.

[0033] The system control application interprets the control sequence of the quantum operation designated by the user as the execution target, and performs predetermined communication such as supplying device-specific setting information required for the quantum operation to the instrumentation devices 400, 410, 420, 300 and the synchronization trigger distribution device 200 via the communication means 101, 102, 103, 104, 105, respectively, and transferring the quantum dot state read by the instrumentation device. Here, the communication means 101, 102, 103, 104, 105 may be an interface based on a standard communication specification such as USB (trademark), SPI (trademark), I2C (trademark), RS-232C, GP-IB, PCI Express (trademark), Ethernet (trademark), or an original specification based on a general-purpose input / output port.

[0034] The synchronization trigger distribution device 200 refers to setting information (a control sequence table and a response delay time table described later) transferred in advance from the host PC 100 via the communication means 105, updates its own internal state according to the contents of the operation request indicated by the master trigger signal 303 input from the instrumentation device 300 in accordance with the progress of the control sequence being executed, and independently outputs distribution trigger signals 201-1, 201-2, 201-3, and 201-4 that instruct the operation timings of the instrumentation devices 300, 400, 410, and 420, respectively. Details of the configuration and operation will be described later with reference to other drawings.

[0035] The instrumentation device 300 includes a bias voltage generation function 4001, a high-frequency signal generation function 4101, and a quantum dot state readout function 4201, which are directly involved in controlling quantum operations in the quantum device 500. In addition, the instrumentation device 300 includes an integrated sequence control function 3001 that unifies, with one command sequence, both local sequence control (in the sense of being closed to the device itself) that specifies whether or not these built-in functions need to operate, their operating parameters, and their operating timing and order, and global sequence control (in the sense of controlling other devices) that realizes inter-device synchronization between the instrumentation devices 400, 410, and 420 by transmitting and receiving trigger signals via the synchronization trigger distribution device 200.

[0036] Although not particularly limited, the command set supported by the sequence control function 3001 may include a master trigger output command for controlling the output contents to the master trigger signal 303, and a distributed trigger standby command for waiting for a distributed trigger signal input to the device itself via the distributed trigger signal 201-1, in order to realize global sequence control.

[0037] The master trigger output command includes commands to output each of the four types of master trigger signals shown in FIG. 5. When the instrumentation device 300 executes a command for outputting a master trigger signal, the master trigger signal corresponding to the command is transmitted to the synchronization trigger distribution device 200.

[0038] Furthermore, in order to recover from a stuck state of the control sequence processing, it is preferable to set a timeout time for canceling the waiting for the input of the distribution trigger signal by executing the distribution trigger wait command. The distribution trigger wait command is a command for waiting for the return of a trigger signal from the synchronous trigger distribution device 200, and the timeout time can be specified as an execution parameter. The instrumentation device 300 has a timeout detection function that detects whether the trigger signal input waiting state continues for the specified timeout time or longer after executing the distribution trigger wait command.

[0039] Here, the global sequence control is based on event-driven operation. That is, a sequence control master device (instrumentation device 300 in this embodiment) that manages the entire sequence control of quantum operations generates the master trigger signal 303 that indicates the timing of various events such as the start and end of a control sequence, a change in the operation state (operating or paused) of the instrumentation device, a change in the output state of the instrumentation devices 400 and 410 that are responsible for outputting control signals, and the timing of measurement processing in the instrumentation device 420 that reads out the quantum dot state.

[0040] The synchronous trigger distribution device 200 that has received the master trigger signal 303 outputs a trigger signal that enables operation of only the instrumentation device that should operate next in response to the event among the distribution trigger signals 201-1, 201-2, 201-3, and 201-4.

[0041] Although not particularly limited, the instrumentation device 300 may not have the bias voltage generation function 4001-1, the high frequency signal generation function 4101-1, and the operation result readout function 4201-1, which are directly related to the control of the quantum operation. In that case, it may be treated as a dedicated sequence control device having only the sequence control function 3001 corresponding to the global sequence control.

[0042] Hereinafter, in the control sequence of a quantum operation, a section between two events adjacent in time is called a subsequence, and the entire control sequence is composed of one or more subsequences. The sequence control function of the sequence control master device (instrumentation device 300 in this embodiment) is required to control explicitly to secure processing time for instrumentation devices other than itself, even for a subsequence that is not involved in input / output between the device itself and the quantum device 500. For this reason, it is preferable to define a command that can describe a "waiting for processing" subsequence by a "no operation" operation that can specify the execution time.

[0043] The global and local sequence control operations in the instrumentation device 300 are based on the following flow: A command sequence required for control is transferred in advance from the host PC 100 via the communication means 104, and the sequence control function 3001 of the instrumentation device 300 holds pointer information that identifies the next command to be processed in the command sequence or the beginning of a subsequence, and waits for the input of a distribution trigger signal 201-1 before executing the command sequence.

[0044] When the sequence control function 3001 receives the distribution trigger signal 201-1 from the synchronization trigger distribution device 200, it refers to the pointer information and sequentially processes the command string included in the subsequence. Specifically, if the control target of the command is the bias voltage generation function 4001-1, it generates the bias voltage control output signal 301 according to the specified operation parameters, and if the control target is the radio frequency signal generation function 4101-1, it generates the radio frequency output signal 302. If the control target is the operation result readout function 4201-1, it measures at least one signal state included in the quantum operation unit output signal 521 output by the quantum device 500 by a predetermined means to obtain the quantum dot state, thereby realizing local sequence control.

[0045] At the end of the subsequence, the master trigger output command and the distribution trigger wait command are placed in succession, and by executing these commands, global sequence control, i.e., the master trigger signal 303 having a format equivalent to a command requesting execution of the next subsequence, is output, the pointer information is updated, and then a series of processes are performed until transitioning to an input wait state for the distribution trigger signal 201-1.

[0046] The instrumentation device 400 is responsible for only a bias voltage generation function 4001-2 for controlling a potential barrier as part of a control sequence of a quantum operation, and generates a bias voltage control output signal 401 at the timing of receiving the distribution trigger signal 201-2 based on operation parameters set in advance from the host PC 100 via the communication means 101. After completing the operation, the instrumentation device 400 waits until the next distribution trigger signal is received.

[0047] The instrumentation device 410 is responsible for only a radio frequency signal generation function 4101-2 for controlling the state of electron spin as part of the control sequence of quantum operations, and generates a radio frequency output signal 411 at the timing of receiving the distribution trigger signal 201-3 based on the operation parameters set in advance from the host PC 100 via the communication means 102. After completing the operation, the instrumentation device 410 waits until the next distribution trigger signal is received.

[0048] The instrumentation device 420, as a part of the control sequence of the quantum operation, is in charge of, for example, only the operation result read function 4201-2, and measures at least one signal included in the quantum operation unit output signal 521 by a predetermined means at the timing of receiving the distribution trigger signal 201-4 based on the operation parameters previously set from the host PC 100 via the communication means 103, and acquires it as a quantum dot state. After completing the operation, it waits until the next distribution trigger signal is received.

[0049] In a case where the instrumentation device 300 has a bias voltage generation function 4001-1, a radio frequency signal generation function 4101-1, and a quantum dot state readout function 4201-1, and the instrumentation devices 400, 410, and 420 also have a bias voltage generation function 4001-2, a radio frequency signal generation function 4101-2, and a quantum dot state readout function 4201-2, the functions of which instrumentation device are to be used may be selected based on the required specifications.

[0050] The quantum device 500 includes a quantum operation control unit 510 and a quantum operation unit 520 .

[0051] The quantum operation control unit 510 is connected to at least one of the bias voltage control output signal 301 or the bias voltage control output signal 401, and temporarily stores at least a portion of the control information input from the bias voltage control output signal. Based on the stored control information and the strobe signal included in the bias voltage control output signal, the quantum operation control unit 510 switches the bias voltage application state of the quantum operation unit control signal 511, which includes a bias voltage control line and serves as a direct control signal for each quantum dot of the quantum operation unit 520, and outputs the bias voltage application state to the quantum operation unit 520.

[0052] The quantum operation unit 520 is a quantum dot array in which quantum dots whose characteristics can be changed by an applied bias voltage are connected in a one-dimensional or two-dimensional shape via transfer gates that control the degree of electron transfer and interaction between quantum dots by a bias voltage in the same manner, and in order to realize a desired quantum operation, at least one of the high-frequency output signal 302 or the high-frequency output signal 411 is connected in addition to the quantum operation unit control signal 511. A quantum operation based on the bias voltage of the quantum operation unit control signal 511 and the application state of the high-frequency output signal is executed, and the quantum operation unit output signal 521 including the quantum dot state is output.

[0053] Fig. 2 is a block diagram showing a detailed configuration of the synchronization trigger distribution device 200. The synchronization trigger distribution device 200 includes a communication interface unit 210, a table read control unit 220, a control sequence table 230, a response delay time table 240, and delay correction units 250-1, 250-2, 250-3, and 250-4, the number of which is equal to the number of the distribution trigger signals 201-1, 201-2, 201-3, and 201-4. Of these, the details of the control sequence table 230 will be described later with reference to Fig. 3, and the response delay time table 240 will be described later with reference to Fig. 4.

[0054] The communication interface unit 210 controls communication with the host PC 100 connected via the communication means 105, and converts various control signals between an internal communication means 211 that controls access to the table reading control unit 220, an internal communication means 212 that controls access to the control sequence table 230, and an internal communication means 213 that controls access to the response delay time table 240.

[0055] The table read control unit 220 counts the number of times the master trigger signal 303 (MREQ) is received by an internal trigger number counter 2201, and identifies the subsequence being executed in the control sequence of the quantum operation based on the count value. In addition, in synchronization with the reception timing of the master trigger signal 303, it outputs a read control signal 221 including read entry position information in the control sequence table 230 and a read request to the control sequence table 230, and a timer start request signal 222 for the timer function for time measurement provided in each of the delay correction units 250-1, 250-2, 250-3, and 250-4. The trigger number counter 2201 is designed to be able to update the setting from the host PC 100 via the communication means 105 and the internal communication means 211. Although not particularly limited, the timer start request signal 222 may include an initial value that is set commonly to the timer functions of all delay correction units at the time of a timer start request.

[0056] Moreover, the table read control unit 220 receives an auxiliary operation control signal 232 from the control sequence table 230 in response to the read control signal 221, and executes processing based on the requested content.

[0057] The control sequence table 230 reads out subsequence setting information from an entry position in the table designated by the read control signal 221 based on a read request from the read control signal 221. Of the read out subsequence setting information, a timer enable signal 231-1 indicating enable / disable of a timer function of the delay correction unit 250-1 responsible for correcting the output timing of the distribution trigger signal 201-1 (DREQ0) is sent to the delay correction unit 250-1, a timer enable signal 231-2 indicating enable / disable of a timer function of the delay correction unit 250-2 responsible for correcting the output timing of the distribution trigger signal 201-2 (DREQ1) is sent to the delay correction unit 250-2, and a timer enable signal 231-3 indicating enable / disable of a timer function of the delay correction unit 250-3 responsible for correcting the output timing of the distribution trigger signal 201-3 (DREQ2) is sent to the delay correction unit 250-3. The delay correction unit 250-3 outputs a timer enable signal 231-3 indicating whether the timer function of the delay correction unit 250-3 is enabled / disabled to the delay correction unit 250-3, a timer enable signal 231-4 indicating whether the timer function of the delay correction unit 250-4, which is responsible for correcting the output timing of the distribution trigger signal 201-4 (DREQ3), is enabled / disabled to the delay correction unit 250-4, and the auxiliary operation control signal 232, which instructs the processing to be executed by the table read control unit 220 in synchronization with the reception timing of the master trigger signal 303, to the table read control unit 220.

[0058] It is assumed that setting information required for the control sequence of a quantum operation to be realized is set in the control sequence table 230 from the host PC 100 via the communication means 105 and the internal communication means 212 before the start of execution of the control sequence. Also, it is the responsibility of the system control application operating on the host PC 100 to ensure that there is no inconsistency with the sequence control setting information on the instrumentation device 300 side.

[0059] The response delay time table 240 holds information on the response delay times of the instrumentation devices 300, 400, 410, 420 measured in advance, i.e., the time from when a device controlling the instrumentation devices issues a specific operation request to when the requested operation is actually started on the instrumentation device side, and outputs these as delay correction values ​​241-1, 241-2, 241-3, 241-4 to the delay correction units 250-1, 250-2, 250-3, 250-4, respectively.

[0060] It is assumed that the response delay time of each instrumentation device is set in the response delay time table 240 from the host PC 100 via the communication means 105 and the internal communication means 213 before the start of execution of the control sequence.

[0061] It is preferable to measure the response delay times of the instrumentation devices 300, 400, 410, and 420 when the entire system including the wiring between the devices is installed. As an example of a measurement method, each instrumentation device is set to change in a stepwise manner, such as ON or OFF, assert or negate, high level or low level, in response to the input of a distributed trigger signal, and subsequence switching is performed with the response delay times of all the instrumentation devices set to zero in the response delay time table 240. The response delay times of each instrumentation device can be obtained collectively by measuring the time lapse until the point of change in the output state of each instrumentation device based on the timing of the subsequence switching request by the master trigger signal 303. The response delay time in this case corresponds to the delay time starting from the distributed trigger signal. The above procedure may be performed manually or automatically as part of the functions of the system control application running on the host PC 100.

[0062] The delay correction unit 250-1, which is responsible for correcting the output timing of the distribution trigger signal 201-1 (DREQ0), has a timer function including a time measurement counter. When the timer enable signal 231-1 is in an enable state and the timer start request signal 222 indicates that the start request is valid, the time measurement counter performs a continuous decrement operation based on a clock signal input (not shown) with a predetermined value, such as an initial value included in the timer start request signal 222, as a count start value when the timer enable signal 231-1 is in an enable state and the timer start request signal 222 indicates that the start request is valid. When it detects that the time indicated by the count value of the time measurement counter matches the time indicated by the delay correction value 241-1, that is, that the correction of the response delay time is completed, it outputs a pulse signal with a fixed assertion time width as the distribution trigger signal 201-1 (DREQ0) to the instrumentation device 300 and stops the decrement operation.

[0063] The delay correction unit 250-2, which is responsible for correcting the output timing of the distribution trigger signal 201-2 (DREQ1), has a timer function including a time measurement counter. When the timer enable signal 231-2 is in an enable state and the timer start request signal 222 indicates that the start request is valid, the time measurement counter performs a continuous decrement operation based on a clock signal input (not shown) with a predetermined value, such as an initial value included in the timer start request signal 222, as a count start value when the timer enable signal 231-2 is in an enable state and the timer start request signal 222 indicates that the start request is valid. When it detects that the time indicated by the count value of the time measurement counter matches the time indicated by the delay correction value 241-2, that is, that the correction of the response delay time is completed, it outputs a pulse signal with a fixed assertion time width as the distribution trigger signal 201-2 (DREQ1) to the instrumentation device 400 and stops the decrement operation.

[0064] The delay correction unit 250-3, which is responsible for correcting the output timing of the distribution trigger signal 201-3 (DREQ2), has a timer function including a time measurement counter. When the timer enable signal 231-3 is in an enable state and the timer start request signal 222 indicates that the start request is valid, the time measurement counter performs a continuous decrement operation based on a clock signal input (not shown) using a predetermined value, such as an initial value included in the timer start request signal 222, as a count start value when the timer enable signal 231-3 is in an enable state and the timer start request signal 222 indicates that the start request is valid. When it detects that the time indicated by the count value of the time measurement counter matches the time indicated by the delay correction value 241-3, that is, that the correction of the response delay time is completed, it outputs a pulse signal with a fixed assertion time width as the distribution trigger signal 201-3 (DREQ2) to the instrumentation device 410 and stops the decrement operation.

[0065] The delay correction unit 250-4, which is responsible for correcting the output timing of the distribution trigger signal 201-4 (DREQ3), has a timer function including a time measurement counter. When the timer enable signal 231-4 is in an enable state and the timer start request signal 222 indicates that the start request is valid, the time measurement counter performs a continuous decrement operation based on a clock signal input (not shown) with a predetermined value, such as an initial value included in the timer start request signal 222, as a count start value. When it detects that the time indicated by the count value of the time measurement counter matches the time indicated by the delay correction value 241-4, that is, that the correction of the response delay time is completed, it outputs a pulse signal with a fixed assertion time width as the distribution trigger signal 201-4 (DREQ3) to the instrumentation device 420 and stops the decrement operation.

[0066] Here, the time measurement counters included in the delay correction units 250-1, 250-2, 250-3, and 250-4 start decrementing from a common count start value, and independently stop decrementing when the correction of the response delay time is completed. By changing the condition for stopping the decrementing to a count value of zero, the operation of all the time measurement counters becomes common, and therefore multiple time measurement counters can be consolidated into one, thereby reducing the hardware scale.

[0067] In addition, the count start value set in the time measurement counter included in the delay correction units 250-1, 250-2, 250-3, and 250-4 is a main factor that determines the time overhead associated with subsequence switching, and so care must be taken when selecting the value. Although not particularly limited, it may be any of the following (1) to (3).

[0068] (1) Fix it to the maximum value allowed as a specification of the quantum computing system: While this can reduce the hardware scale related to sequence control, if the switching time overhead cannot be ignored compared to the time that the quantum dot can maintain its quantum nature (coherence time), the computing performance of the system will be drastically reduced.

[0069] (2) Among the instrumentation devices that are involved in a control operation at least once in the control sequence of the quantum operation to be executed, match the response delay time to that of the instrumentation device with the longest response delay time: Since a single count start value can be statically determined for the entire control sequence, it is easy to balance the increase in hardware scale and the switching time overhead.

[0070] (3) Match the response delay time to that of the instrumentation device having the longest response delay time among one or more instrumentation devices involved in the control operation in the subsequence being executed: By changing the count start value for each subsequence, the time overhead associated with switching can be minimized. However, it becomes necessary to have a means for specifying the count start value for each subsequence, for example, an extension of the response delay time table 240.

[0071] In addition, when determining the count start value in (2) or (3) above, it is necessary to consider the case where the response delay time of a specific instrumentation device is extremely long compared to other instrumentation devices. In this case, it is advisable to set an upper limit on the value that can be set as the count start value, and for instrumentation devices with response delay times that exceed the upper limit, to separate and treat the differential response delay time obtained by subtracting the upper limit of the count start value from the response delay time of the instrumentation device. Specifically, an empty subsequence with an execution time equivalent to the differential response delay time and which only outputs a distributed trigger signal to the instrumentation device is inserted immediately before the subsequence in which the instrumentation device is originally operating, thereby advancing the output timing of the distributed trigger signal by the differential response delay time.

[0072] The empty subsequence may be further divided into two or more subsequences whose sum of execution time and time overhead associated with switching is equal to the differential response delay time. In the empty subsequence or in a subsequence divided from the empty subsequence, an operation other than bringing forward the output of a distribution trigger signal may be requested of instrumentation devices other than the instrumentation device.

[0073] 3 shows an example of settings in the control sequence table 230. The control sequence table includes multiple entries. Each entry, identified by an entry number 2301 (corresponding to the count value of the trigger number counter 2201), is associated with a specific subsequence.

[0074] One entry has distribution trigger signal output request fields 2302-1, 2302-2, 2302-3, 2302-4 which specify whether the instrumentation devices 300, 400, 410, 420 should operate in the subsequence, i.e., whether a distribution trigger signal needs to be output to a specific instrumentation device 300. Also, an auxiliary operation request field 2303 is included which specifies the content of the auxiliary operation which the table read control unit 220 should process in parallel with the execution of the subsequence.

[0075] When a read request is received from the table read control unit 220 via the read control signal 221, the control sequence table 230 reads out setting information for the subsequence from the specified entry position, and outputs the contents of the distribution trigger signal output request fields 2302-1, 2302-2, 2302-3, and 2302-4 as the timer enable signals 231-1, 231-2, 231-3, and 231-4, respectively, and the contents of the auxiliary operation request field 2303 as the auxiliary operation control signal 232.

[0076] The control sequence table 230 specifies the distribution trigger signal to be output. Since the distribution trigger signal corresponds to an instrumentation device, the control sequence table 230 is equivalent to identifying the instrumentation device corresponding to the count value of the trigger number counter 2201.

[0077] 4 shows an example of settings in the response delay time table 240. This response delay time table includes entries for only the number of trigger signal types 2401, i.e., the number of the instrumentation devices 300, 400, 410, 420, and each entry has a response delay time field 2402 that specifies the response delay time measured in advance for the instrumentation devices 300, 400, 410, 420 to which the distributed trigger signals 201-1, 201-2, 201-3, 201-4 are connected, respectively.

[0078] The response delay time table 240 associates a delay response time with a distributed trigger signal. Since the distributed trigger signal corresponds to an instrumentation device, the response delay time table 240 is equivalent to specifying a response delay time corresponding to each of a plurality of instrumentation devices.

[0079] The response delay time is, for example, a value actually measured in advance, and reflects at least one of the propagation delay of the transmission medium connecting multiple instrumentation devices and the delay based on the communication protocol. As mentioned above, when each block of the device (for example, the configuration in Figure 1) is placed in the cooling device, and the wiring between the blocks is, for example, several meters long, it is necessary to fully consider the effect of the response delay time.

[0080] 5 is a diagram showing an example of a definition of the command format of the master trigger signal 303. In order to execute a control sequence of a consistent quantum operation in the quantum computing system 1, in addition to there being no defect in the pre-set control information, the operation of the sequence control function 3001 of the instrumentation device 300 and the operation of the table read control unit 220 of the synchronization trigger distribution device 200 are premised on the fact that the subsequences recognized as being executed by each other match through a request / response protocol via the master trigger signal 303 and the distribution trigger signal 201-1, that is, sequence control synchronization is established.

[0081] For example, when the synchronization trigger distribution device 200 is placed in a room temperature environment outside the dilution refrigerator and the instrumentation device 300 is placed in a low temperature environment inside the dilution refrigerator, the wiring length of the media transmitting each trigger signal increases, and the level of electromagnetic interference received by the media worsens. Even under such conditions, it is desirable to design a protocol that can ensure a certain level of reliability, for example by defining a command format that is not a simple single pulse, particularly for the request side (master trigger signal), and by providing a means for detecting that at least sequence control synchronization has not been established.

[0082] Four types of master trigger output commands are defined, and the operation of each command is outlined below. In the sequence control function 3001 of the instrumentation device 300, the master trigger signal 303 is seamlessly interpreted and processed together with commands that control built-in functions, and the master trigger signal 303 in a format defined for each command is output from the instrumentation device 300.

[0083] SETCNTR: The table read control unit 220 is requested to update the count value of the trigger number counter 2201, which is linked to the subsequence to be executed next and corresponds to the entry number 2301 in the control sequence table 230, to a specified value. Usually, before the execution of a control sequence starts, that is, when the operation state of the table read control unit 220 is in a sequence non-execution state, this command is executed as part of pre-processing of a quantum operation in order to identify the first subsequence of a control sequence to be executed. When a response from the synchronization trigger distribution device 200 is required or not required after the execution of this command, the setting of the distribution trigger signal output request field 2302-1 of the entry in the control sequence table 230 specified by this command is set to "valid" or "invalid", respectively.

[0084] The table read control unit 220, which has received the master trigger signal 303 corresponding to this command, updates the count value of the built-in trigger number counter 2201 to the count value notified by this command.

[0085] CHKCNTR: This command is used by the instrumentation device 300 to notify the synchronization trigger distribution device 200 of information indicating its own processing state, i.e., information specifying which subsequence is currently being executed, for the purpose of checking whether or not a synchronization error has occurred in the processing. The sequence control function of the instrumentation device 300 is linked to the subsequence that it recognizes as being executed at the time of executing this command, and notifies the table read control unit 220 of the count value of the trigger number counter 2201 that corresponds to the entry number 2301 in the control sequence table 230.

[0086] Normally, while a control sequence is being executed, that is, when the operation state of the table read control unit 220 is in a sequence execution state, this command is inserted irregularly into the control sequence for the purpose of checking that there is no synchronization deviation in the sequence control between the instrumentation device 300 and the synchronous trigger distribution device 200. The setting regarding whether or not a response is required after execution of this command is the same as that of the SETCNTR command.

[0087] The table read control unit 220, which has received the master trigger signal 303 corresponding to this command, checks whether the count value of the built-in trigger number counter 2201 matches the count value notified by this command. If they do not match, it notifies the host PC 100 via the internal communication means 211 and the communication means 105 that sequence control synchronization has not been established.

[0088] NEXT: This command is linked to the subsequence to be executed next and requests the table read control unit 220 to increment the count value of the trigger number counter 2201 corresponding to the entry number 2301 in the control sequence table 230, that is, to execute the subsequent subsequence. The setting regarding whether or not a response is required after execution of this command is the same as that of the SETCNTR command, but should be set to "response required" in order to maintain the sequence control synchronization state.

[0089] The table read control unit 220, which has received the master trigger signal 303 corresponding to this command, increments the count value of the built-in trigger number counter 2201, and sets the operating state to a sequence execution state if the operating state is a sequence non-execution state.

[0090] END: Like the NEXT command, this command requests the table read control unit 220 to increment the count value of the trigger number counter 2201. This command is usually used to request the execution of post-processing following a quantum operation. The setting regarding whether or not a response is required after this command is executed is the same as that of the SETCNTR command, but it should be set to "response required" in order to maintain the sequence control synchronization state.

[0091] The table read control unit 220, which has received the master trigger signal 303 corresponding to this command, increments the count value of the built-in trigger number counter 2201, and sets the operating state to a sequence non-execution state if the operating state is a sequence execution state.

[0092] The above command configuration is just an example, and it is also possible to omit the NEXT command and count it as a simple timing pulse on the receiving side counter. In this case, commands to instruct the counter to start and end counting are required.

[0093] In addition, the CHKCNTR command may be configured to not only notify the instrumentation device 300, but also the other instrumentation devices 400, 410, and 42 of information indicating their own processing status, i.e., information identifying which subsequence is currently being executed, to the synchronization trigger distribution device 200.

[0094] FIG. 6 is a time chart that shows an outline of the processing flow when executing a control sequence of a quantum operation based on the settings of the control sequence table 230 illustrated in FIG. 3 in the quantum computing system 1 according to the first embodiment.

[0095] The symbols "S", "N", and "E" written together with the master trigger signal 303 in the figure indicate that they are outputs by the SETCNTR command, the NEXT command, and the END command, respectively. Also, in the operation of the instrumentation device 300, a subsequence marked with (Wait) indicates that it is in a "waiting state" that does not perform a direct control output to the quantum device 500, but only manages the execution time of the subsequence.

[0096] The entire control sequence is composed of seven subsequences, namely pre-processing (trigger number counter=0), SEQ1 (same as 1), SEQ2 (same as 2), SEQ3 (same as 3), SEQ4 (same as 4), SEQ5 (same as 5), and post-processing (same as 6). Prior to the start of execution of the control sequence, the contents of the control sequence table 230 and the response delay time table 240 are assumed to have been properly initialized by the system control application running on the host PC 100 via the internal communication means 212 and 213, respectively.

[0097] When the initial setting is completed, the host PC 100 sets the trigger number counter 2201 in the table read control unit 220 to zero via the communication means 105 and the internal communication means 211 (however, this is not a required process in this example).

[0098] Next, the host PC 100 instructs the sequence control function 3001 in the instrumentation device 300 to start execution from the head of the control sequence, i.e., the pre-processing subsequence, via the communication means 104. The sequence control function 3001 in the instrumentation device 300 that receives the instruction executes a SETCNTR command (set so as not to wait for a response by the distribution trigger signal 201-1) as the first process in the pre-processing subsequence, and requests, via the master trigger signal 303, that the trigger number counter 2201 in the table read control unit 220 be updated to zero. Furthermore, at the end of the pre-processing subsequence, it executes a NEXT command (set so as to wait for a response by the distribution trigger signal 201-1) as the second process, requests execution of the subsequent SEQ1 subsequence via the master trigger signal 303, and waits for a response from the synchronization trigger distribution device 200 by the distribution trigger wait command (not shown).

[0099] The table read control unit 220, which has received a request to execute the next subsequence from the master trigger signal 303, transitions the operation state to a sequence execution state and increments the trigger number counter 2201. Furthermore, it requests the control sequence table 230 to read setting information for the SEQ1 subsequence, and requests the delay correction unit 250-1 via the timer start request signal 222 to refer to the delay correction value 241-1 for the instrumentation device 300 output from the response delay time table 240 and perform delay correction processing required for outputting a distribution trigger signal when the timer enable signal 231-1 indicating whether the timer function in the SEQ1 subsequence read from the control sequence table 230 is enabled / disabled.

[0100] Upon receiving the request, the delay correction unit 250-1 outputs the distribution trigger signal 201-1, whose output timing has been corrected based on the response delay time of the instrumentation device 300, to the instrumentation device 300, whereby the instrumentation device 300 starts executing the SEQ1 subsequence. At the end of the SEQ1 subsequence, a NEXT command is executed again (set to wait for a response by the distribution trigger signal 201-1), a request is made to execute the subsequent SEQ2 subsequence, and a response from the synchronization trigger distribution device 200 is waited for by the distribution trigger wait command (not shown).

[0101] Through the above procedure, switching of the subsequence to be executed is completed in cooperation between the synchronization trigger distribution device 200 and the instrumentation device 300. This switching is repeated up to the SEQ5 subsequence. The operation control of the instrumentation devices 400, 410, and 420 is basically the same as that of the instrumentation device 300, but these instrumentation devices only execute preset operations in synchronization with the distribution trigger signals 201-2, 201-3, and 201-4, and are not involved in sequence switching control.

[0102] At the end of the SEQ5 subsequence, an END command is executed (set to wait for a response via the distribution trigger signal 201-1), and execution of the subsequent post-processing subsequence is requested via the master trigger signal 303, and a response from the synchronization trigger distribution device 200 is waited for via the distribution trigger wait command (not shown).

[0103] The table read control unit 220, which has received a request to execute the next subsequence from the master trigger signal 303, transitions the operation state to a sequence non-execution state and increments the trigger number counter 2201. Furthermore, it requests the control sequence table 230 to read setting information for a post-processing subsequence, and requests the delay correction unit 250-1 via the timer start request signal 222 to refer to the delay correction value 241-1 for the instrumentation device 300 output from the response delay time table 240 and perform delay correction processing required for outputting a distribution trigger signal when the timer enable signal 231-1 indicating whether the timer function in the post-processing subsequence read from the control sequence table 230 is enabled / disabled.

[0104] Furthermore, based on the request of the auxiliary operation control signal 232, the table read control unit 220 notifies the host PC 100 of the completion of execution of the control sequence via the communication means 105 in parallel with switching to the post-processing subsequence.

[0105] Upon receiving the request, the delay correction unit 250-1 outputs the distribution trigger signal 201-1, the output timing of which has been corrected based on the response delay time of the instrumentation device 300, to the instrumentation device 300, causing the instrumentation device 300 to start execution of the post-processing subsequence. After completing execution of the post-processing subsequence, the instrumentation device 300 goes into a pause state until it receives a new operation request from the host PC 100.

[0106] FIG. 7 is a timing chart showing detailed processing within the synchronization trigger distribution device 200 with respect to switching of execution from the SEQ2 subsequence to the SEQ3 subsequence as an example of the timing chart outline of the quantum operation sequence explained in conjunction with FIG.

[0107] The table read control unit 220, which has received a request to execute the SEQ3 subsequence from the master trigger signal 303, increments the trigger number counter 2201. Also, the read control signal 221, which specifies the incremented count value (=3) as entry position information, requests the control sequence table 230 to read setting information for the SEQ3 subsequence of entry number 2301 (=3).

[0108] Furthermore, when the table read control unit 220 completes reading the setting information from the control sequence table 230, if the timer enable signal 231-1 indicating whether the timer function in the SEQ3 subsequence read from the control sequence table 230 is enabled, the table read control unit 220 requests the delay correction unit 250-1 via the timer start request signal 222 to refer to the delay correction value 241-1 for the instrumentation device 300 output from the response delay time table 240 and perform the delay correction processing required for the distribution trigger signal output.

[0109] The delay correction unit 250-1 that has received the request enables a timer function for measuring time that is built in the unit, sets the timer initial value included in the timer start request signal 222 as the initial count value in a time measurement counter that is an element that constitutes the timer function, and then continuously performs a decrement operation of the timer in synchronization with a predetermined clock input signal. When it detects that the time indicated by the count value of the time measurement counter matches the time indicated by the delay correction value 241-1, that is, that the correction of the response delay time is completed, it outputs a pulse signal with a fixed assert time width as the distribution trigger signal 201-1 to the instrumentation device 300 as a trigger signal after the response delay time correction, stops the decrement operation, and disables the timer function. This series of procedures is also performed simultaneously for the delay correction units 250-2, 250-3 (not shown), and 250-4 (not shown).

[0110] According to the first embodiment described above in detail with reference to the drawings, when the quantum computing system 1 including the multiple instrumentation devices 300, 400, 410, 420 executes a control sequence of quantum operations, by introducing the synchronization trigger distribution device 200 having a function of treating a subsequence as a control unit and individually correcting the response delay time of each instrumentation device, it is possible to synchronize the operations between the instrumentation devices with high time accuracy with a relatively simple configuration and satisfy the requirements regarding the fidelity of the quantum operations.

[0111] Furthermore, with regard to the instrumentation device 300, which is the master device for sequence control in the quantum computing system 1, in addition to local sequence control commands that control built-in functions, commands for supporting synchronization between instrumentation devices and realizing global sequence control can be defined, and by making it possible to handle them seamlessly within a single command string, a sequence control function with high controllability can be realized, thereby improving the practicality of the quantum computing system 1. EXAMPLES

[0112] A quantum computing system 1A according to a second embodiment of the present invention will be described with reference to Fig. 8. The system configuration of the second embodiment is substantially the same as that of the first embodiment, and therefore a duplicated description will be omitted.

[0113] The configuration of the quantum operation system 1A is different from that of the quantum operation system 1 (FIG. 1) in the following points. That is, the synchronization trigger distribution device 200 is replaced with a synchronization trigger distribution device 200A, the master trigger signal 303 output by the sequence control function 3001 of the instrumentation device 300 is deleted, and a master trigger signal 110 and a distributed trigger signal 202 are newly added between the instrumentation device 300 and the host PC 100. With this configuration change, the role of the master device in the control sequence of the quantum operation is transferred from the instrumentation device 300 to the host PC 100, and the host PC 100 has a sequence control function 3001A. On the other hand, the instrumentation device 300, like the instrumentation devices 400, 410, and 420, executes only the bias voltage generation function 4001-1, the high frequency signal generation function 4101-1, and the quantum dot state readout function 4201-1, which are pre-set local sequence controls based on the distributed trigger signal 201-1.

[0114] 9 is a block diagram showing a detailed configuration of the synchronization trigger distribution device 200 A. The configuration of the synchronization trigger distribution device 200 A is substantially the same as the configuration of the synchronization trigger distribution device 200, so a duplicated description will be omitted.

[0115] The configuration of the synchronization trigger distribution device 200A is different from that of the synchronization trigger distribution device 200 in the following respects. That is, the table read control unit 220 receives the master trigger signal 110 instead of the master trigger signal 303, and outputs a trigger signal whose response delay time has been corrected by a newly added delay correction unit 250-5 to the host PC 100 as the distribution trigger signal 202. The function of the delay correction unit 250-5 is common to the delay correction units 250-1, 250-2, 250-3, and 250-4.

[0116] Here, the host PC 100 manages at least the execution time of the subsequence (the time elapsed from the start of execution), and may also perform processing (pre-processing and post-processing) during the period when each instrumentation device is in a quiescent state, that is, when the operation state of the table read control unit 220 indicates a sequence non-execution state. In any case, it is the instrumentation devices 300, 400, 410, 420 that perform the control operation to operate the quantum device 500.

[0117] In order to enable a timer enable signal 233 indicating whether the timer function of the delay correction unit 250-5 is enabled or disabled to be output to the delay correction unit 250-5, the control sequence table 230 is replaced with a control sequence table 230A, which will be described later with reference to FIG. 10, and in order to enable a delay correction value 241-5 indicating the response delay time of the host PC 100 to be output to the delay correction unit 250-5, the response delay time table 240 is replaced with a response delay time table 240A, which will be described later with reference to FIG. 11.

[0118] 10 shows an example of settings in the control sequence table 230A. This control sequence table includes multiple entries, and each entry identified by an entry number 2301 (corresponding to the count value of the trigger number counter 2201) is linked to a specific subsequence. One entry includes distribution trigger signal output request fields 2302-1, 2302-2, 2302-3, 2302-4, and 2302-5 that specify whether the instrumentation devices 300, 400, 410, and 420 and the host PC 100 should operate in the subsequence, i.e., whether a distribution trigger signal needs to be output, and an auxiliary operation request field 2303 that specifies the content of the auxiliary operation that the table read control unit 220 should process in parallel with the execution of the subsequence.

[0119] When a read request is received from the table read control unit 220 via the read control signal 221, the control sequence table 230A reads out setting information for the subsequence from the specified entry position, and outputs the contents of the distribution trigger signal output request fields 2302-1, 2302-2, 2302-3, 2302-4, and 2302-5 as the timer enable signals 231-1, 231-2, 231-3, 231-4, and 233, respectively, and the content of the auxiliary operation request field 2303 as the auxiliary operation control signal 232.

[0120] 11 shows an example of settings in the response delay time table 240A. This response delay time table includes entries for only the trigger signal types 2401, i.e., the number of entries is equal to the number of the instrumentation devices 300, 400, 410, 420 and the host PC 100, and each entry has a response delay time field 2402 that specifies the response delay time measured in advance for the instrumentation devices 300, 400, 410, 420 and the host PC 100 to which the distributed trigger signals 201-1, 201-2, 201-3, 201-4, 202 are connected, respectively.

[0121] Fig. 12 is a time chart that shows an outline of a process flow when the quantum operation control sequence based on the settings of the control sequence table 230A exemplified in Fig. 10 is executed in the quantum computing system 1A according to the second embodiment. The main difference from the time chart in the first embodiment is that the host PC 100 manages the execution time of pre-processing, post-processing, and each sub-sequence via the master trigger signal 110 and the distribution trigger signal 202.

[0122] When the initial setting (not shown) of the control sequence table 230A and the response delay time table 240A is completed, the host PC 100 sets the trigger number counter 2201 in the table read control unit 220 to zero via the communication means 105 and the internal communication means 211.

[0123] Next, the host PC 100 executes a predetermined pre-processing subsequence, and at the end of the pre-processing subsequence, executes a NEXT command (set to wait for a response via the distribution trigger signal 202), requests execution of the subsequent SEQ1 subsequence via the master trigger signal 110, and waits for a response from the synchronization trigger distribution device 200.

[0124] The table read control unit 220, which has received a request to execute the next subsequence from the master trigger signal 110, transitions the operation state to a sequence execution state and increments the trigger number counter 2201. Furthermore, it requests the control sequence table 230A to read setting information for the SEQ1 subsequence, and requests the delay correction unit 250-5 via the timer start request signal 222 to refer to the delay correction value 241-5 for the host PC 100 output from the response delay time table 240A and perform delay correction processing required for outputting a distribution trigger signal when the timer enable signal 233 indicating whether the timer function in the SEQ1 subsequence read from the control sequence table 230A is enabled / disabled.

[0125] Upon receiving the request, the delay correction unit 250-5 outputs the distribution trigger signal 202, whose output timing has been corrected based on the response delay time of the host PC 100, to the host PC 100, whereby the host PC 100 starts executing the process included in the SEQ1 subsequence and managing the execution time of the subsequence. At the end of the SEQ1 subsequence process, the NEXT command is executed again (set to wait for a response by the distribution trigger signal 202), a request is made to execute the subsequent SEQ2 subsequence, and a response from the synchronization trigger distribution device 200 is waited for again.

[0126] The above procedure completes the switching of the subsequence to be executed in cooperation with the synchronization trigger distribution device 200 and the host PC 100. This switching is repeated up to the SEQ5 subsequence.

[0127] The host PC 100 executes an END command at the end of the SEQ5 subsequence processing (set to wait for a response via the distribution trigger signal 202), requests execution of the subsequent post-processing subsequence via the master trigger signal 110, and waits for a response from the synchronization trigger distribution device 200.

[0128] The table read control unit 220, which has received a request to execute the next subsequence from the master trigger signal 110, transitions the operation state to a sequence non-execution state and increments the trigger number counter 2201. Furthermore, it requests the control sequence table 230A to read setting information for the post-processing subsequence, and requests the delay correction unit 250-5 via the timer start request signal 222 to refer to the delay correction value 241-5 for the host PC 100 output from the response delay time table 240A and perform delay correction processing required for outputting a distribution trigger signal when the timer enable signal 233 indicating whether the timer function in the post-processing subsequence read from the control sequence table 230A is enabled / disabled.

[0129] Upon receiving the request, the delay correction unit 250-5 outputs the distribution trigger signal 202, whose output timing has been corrected based on the response delay time of the host PC 100, to the host PC 100, whereby the host PC 100 starts execution of the post-processing subsequence. As one process of the post-processing subsequence, the host PC 100 notifies a system control application (not shown) that the control sequence of a quantum operation, for example, has been completed, and waits in a paused state until the next processing request.

[0130] In the second embodiment, if the time resolution required for measuring the execution time of a subsequence is at a level that can be realized by the timer function of the operating system running on the host PC 100, the execution time management can be transferred to the host PC 100. As a result, the instrumentation device does not need a master trigger signal output function, and it can be replaced with a cheaper instrumentation device. EXAMPLES

[0131] A quantum computing system 1B according to a third embodiment of the present invention will be described with reference to Fig. 13. The system configuration of the third embodiment is substantially the same as that of the first and second embodiments, and therefore a duplicated description will be omitted.

[0132] The configuration of the quantum computing system 1B is different from that of the quantum computing system 1A (FIG. 8) in the following respects. That is, for the synchronization trigger distribution device 200, the sequence control function 3001A that was handled by the host PC 100 in the second embodiment is replaced by a synchronization trigger distribution device 200B to which an execution time management function is added, and the master trigger signal 303 output by the instrumentation device 300 is deleted. With this configuration change, the role of the master device in the control sequence of the quantum operation is transferred from the instrumentation device 300 to the synchronization trigger distribution device 200B, and the instrumentation device 300 executes only the local sequence control set in advance based on the distribution trigger signal 201-1, similar to the instrumentation devices 400, 410, and 420. Note that only the start of sequence control is requested from the host PC 100.

[0133] 14 is a block diagram showing a detailed configuration of the synchronization trigger distribution device 200 B. The configuration of the synchronization trigger distribution device 200 B is substantially the same as the configuration of the synchronization trigger distribution device 200, so a duplicated description will be omitted.

[0134] The configuration of the synchronization trigger distribution device 200B differs from that of the synchronization trigger distribution device 200 in the following points. That is, the table read control unit 220 is replaced with a table read control unit 220B that is modified so that a sequence control start request received from the master PC 100 via the communication means 105 and the internal communication means 211 can be treated as a kind of master trigger signal. Also, in order to manage the execution time of a subsequence, an execution time control unit 260 is newly added, and the table read control unit 220B receives an internal master trigger signal 261 output by the execution time control unit 260 instead of the master trigger signal 303.

[0135] The execution time control unit 260, which measures the elapsed time from the beginning of the subsequence, has a timer function including a counter for time measurement and operates similarly to the delay correction unit. Specifically, when the timer enable signal 234 indicating whether the timer function is enabled or disabled is in an enabled state and the timer start request signal 222 indicates a start request, a value corresponding to the execution time indicated by the execution time setting value 235 is set as an initial value in the time measurement counter, and a decrement operation is performed based on a clock signal input (not shown). When the execution time control unit 260 detects that the count value of the time measurement counter is zero, it stops the decrement operation and outputs a pulse signal with a fixed assertion time width as the internal master trigger signal 261 to the table read control unit 220B. Note that the internal master trigger signal 261 is a signal inside the synchronization trigger distribution device 200B, and there is no distribution trigger signal as a response signal to the internal master trigger signal 261, which is a request signal from the execution time control unit 260.

[0136] In order to enable the timer enable signal 234 and the execution time setting value 235 to be outputted to the execution time control unit 260, the control sequence table 230 is replaced with a control sequence table 230B, which will be described later with reference to Fig. 15. It should be noted that there is no need to change the response delay time table 240.

[0137] 15 shows an example of the settings in the control sequence table 230B. This control sequence table includes a plurality of entries, and each entry identified by an entry number 2301 (corresponding to the count value of the trigger number counter 2201) is linked to a specific subsequence. In one entry, in addition to distribution trigger signal output request fields 2302-1, 2302-2, 2302-3, and 2302-4 that specify whether the instrumentation devices 300, 400, 410, and 420 should operate in the subsequence, i.e., whether a distribution trigger signal output is required, and an auxiliary operation request field 2303 that specifies the auxiliary operation content that the table read control unit 220B should process in parallel with the execution of the subsequence, a master trigger signal output request field 2304 that specifies whether or not the execution of the subsequent subsequence is requested after the execution time of the subsequence specified by the entry number 2301 has elapsed, i.e., whether or not the internal master trigger signal 261 needs to be output, and an execution time setting value field 2305 that specifies the execution time of the subsequence.

[0138] When a read request is received from the table read control unit 220B via the read control signal 221, the control sequence table 230B reads out setting information for the subsequence from the specified entry position, and outputs the contents of the distribution trigger signal output request fields 2302-1, 2302-2, 2302-3, and 2302-4 as the timer enable signals 231-1, 231-2, 231-3, and 231-4, respectively, the content of the auxiliary operation request field 2303 as the auxiliary operation control signal 232, the content of the master trigger signal output request field 2304 as the timer enable signal 234, and the content of the execution time setting value field 2305 as the execution time setting value 235.

[0139] 16 is a time chart that shows a process flow when the quantum operation control sequence based on the setting of the control sequence table 230B shown in FIG. 15 is executed in the quantum computing system 1B according to the third embodiment. The main difference from the time chart in the first embodiment is that the synchronization trigger distribution device 200B is introduced to which an execution time management function is added, and which can internally generate the internal master trigger signal 261 that replaces the master trigger signal 303 output by the instrumentation device 300, so that the device centrally manages the entire sequence control after the start request as a sequence control master device. However, if there are processes to be executed as pre-processing and post-processing subsequences, they are executed on the host PC 100, not on the instrumentation device 300.

[0140] When the initial settings (not shown) of the control sequence table 230B and the response delay time table 240 are completed, the host PC 100 sets the trigger number counter 2201 in the table read control unit 220B to zero via the communication means 105 and the internal communication means 211.

[0141] Next, as the final process in the pre-processing subsequence, the host PC 100 requests the table read control unit 220B via the communication means 105 and the internal communication means 211 to start sequence control.

[0142] The table read control unit 220B, which has received the sequence control start request that is logically equivalent to the master trigger signal, transitions the operation state to a sequence execution state and increments the trigger number counter. Furthermore, it requests the control sequence table 230B to read setting information for the SEQ1 subsequence via the read control signal 221, and requests the execution time control unit 260 to start measuring the execution time of the SEQ1 subsequence via the timer start request signal 222.

[0143] When the timer enable signal 234 indicating whether the timer function in the SEQ1 subsequence output from the control sequence table 230B is enabled, the execution time control unit 260 that has received the request starts measuring the execution time, i.e., decrementing the time measurement counter, with the execution time setting value 235 for the SEQ1 subsequence as an initial value. When the execution time control unit 260 detects that the count value of the time measurement counter is zero, it requests the table read control unit 220B to execute the subsequent SEQ2 subsequence via the internal master trigger signal 261.

[0144] The table read control unit 220B, which receives a request to execute the SEQ2 subsequence from the internal master trigger signal 261, increments the trigger number counter 2201, requests the control sequence table 230B to read setting information for the SEQ2 subsequence, and requests the execution time control unit 260 to start measuring the execution time of the SEQ2 subsequence.

[0145] The above procedure completes the sequence control start process based on a request from the host PC 100 and the switching of the first subsequence to be executed by the synchronization trigger distribution device 200B alone after the start of sequence control. This subsequence switching is repeated up to the SEQ5 subsequence, and in synchronization with the switching to the SEQ6 subsequence, the host PC 100 is notified of the completion of execution of the control sequence via the communication means 105 based on the contents of the auxiliary operation control signal 232.

[0146] In the third embodiment, although it depends on the setting of the clock frequency that updates the time measurement counter of the execution time control unit 260, it is possible to realize execution time measurement with a time resolution several orders of magnitude higher than the timer function of a normal operating system. In addition, as in the second embodiment, the instrumentation device does not require a master trigger signal output function, so it is possible to achieve both low cost instrumentation devices and highly accurate execution time management.

[0147] 17 is an internal implementation diagram of a quantum computer system showing an implementation method using a quantum device 500 configured with the quantum semiconductor according to the first embodiment, an instrumentation device 300 configured with an analog chip, a host PC 100, and a dilution refrigerator 1700. Although not shown, a synchronization trigger distribution device 200 and instrumentation devices 400, 410, 420 are placed in the dilution refrigerator 1700, for example, near the instrumentation device 300.

[0148] Dilution refrigerator 1700 separates the air atmosphere outside dilution refrigerator 1700 from the vacuum atmosphere inside dilution refrigerator 1700 with housing 1701 and room temperature plate 1702. The degree of vacuum inside housing 1701 of dilution refrigerator 1700 is controlled by discharging air through vacuum tube VC using a pump device installed outside dilution refrigerator 1700. Temperature control inside dilution refrigerator 1700 is achieved by circulating diluted liquid helium in pulse tube 1703 shown in Figure 17. Figure 17 shows an example where two pulse tubes 1703 are connected. The diluted liquid helium is a mixture of two isotopes of helium, 3 He and 4 He was liquefied, 3 He phase 4 It was poured into the He phase and diluted.

[0149] In the example of the dilution refrigerator 1700 in FIG. 17, a plurality of metal (mainly oxygen-free copper) plates are installed and stored inside the housing 1701 of the dilution refrigerator 1700. In this example, 50K-PL (set to −223° C.), 4K-PL (set to −269° C.), PLA, PLB, and mKPL (set to approximately −273° C.) are installed as metal plates. The metal plates PLA and PLB are controlled at temperatures between 4K (−269° C.) and mK (approximately −273° C.). The temperature is controlled and maintained in thermal equilibrium using temperature control heaters (not shown) mounted on each metal plate (50K-PL, 4K-PL, PLA, PLB, and mKPL) and a temperature controller (not shown) installed outside the dilution refrigerator 1700 that controls the amount of power input to the temperature control heaters.

[0150] In the example of Fig. 17, diluted liquid helium is circulated from pulse tube 1703 to heat sink 1704. As a result, metal plate 4K-PL and metal plate mKPL, to which heat sink 1704 is connected, are brought to an extremely low temperature via heat sink 1704 through which diluted liquid helium is circulated. Therefore, the metal plates 4K-PL and mKPL can be realized in an extremely low temperature atmosphere of 10 mK to 100 mK. The heat sink 1704 can be called the first refrigerating tube, and the pulse tube 1703 can be called the second refrigerating tube. Moreover, the metal plate mKPL can be called the first metal plate, and the metal plate 4K-PL can be called the second metal plate.

[0151] The quantum device 500 is mounted on the first cooling plate FGNDPLT, which is disposed below the metal plate mKPL. The cooling plate FGNDPLT is thermally connected to the metal plate mKPL via the cooling rods C0 to C3 (the even-numbered cooling rods C0 and C2 are not shown). In other words, the heat sink 1704 is a refrigerating tube that cools the cooling plate FGNDPLT, which is a metal body, using diluted liquid helium. The cooling plate FGNDPLT, which is a metal body, is thermally connected to the metal plate mKPL via the cooling rods C0 to C3.

[0152] In this embodiment, the quantum device 500 is not directly mounted on the metal plate mKPL but is placed below the metal plate mKPL because quantum operation is performed while applying a static magnetic field to the quantum device 500. Due to space limitations for placing magnet 1705 for generating a static magnetic field in the lowest layer of dilution refrigerator 1700, the quantum device 500 is placed as shown in Fig. 17 in the configuration example of dilution refrigerator 1700 in this embodiment. Note that control signals (301, 302, 401, 411, 521) required for quantum operation of quantum device 500 are output from at least one of instrumentation devices 300, 400, 410, 420, and the control signals are electrically connected to quantum device 500 via coaxial wiring CXE and CXO.

[0153] As described above, the quantum device 500, the instrumentation unit 300, the host PC 100, and the instrumentation units 400, 410, and 420 are distributed and arranged inside the dilution refrigerator 1700 having a predetermined volume, and the wiring connecting them is several tens of centimeters to several meters long, making it complicated to adjust the signal delay time.

[0154] Although the embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the gist of the invention. These embodiments and their modifications are included within the scope and gist of the invention, and are included in the scope of the invention and its equivalents described in the claims. The components described in the embodiments may be realized by specially designed hardware such as an ASIC (Application Specific Integrated Circuit), or by programmable hardware such as an FPGA (Field-Programmable Gate Array). At least some of the functions may be performed by software running on a host PC.

[0155] According to the above embodiment, a practical quantum computer can be realized, which consumes less energy, reduces carbon emissions, prevents global warming, and contributes to the realization of a sustainable society. [Explanation of symbols]

[0156] 1, 1A, 1B: Quantum computing system 100: Host PC 101, 102, 103, 104, 105: Means of communication 110: Master trigger signal 200, 200A, 200B: Synchronous trigger distribution device 201-1, 201-2, 201-3, 201-4: Distributed trigger signal 202: Distributed trigger signal 210: Communication interface unit 211, 212, 213: Internal communication means 220, 220B: Table read control unit 221: Read control signal 222: Timer start request signal 230, 230A, 230B: Control sequence table 231-1, 231-2, 231-3, 231-4: Timer enable signals 232: Auxiliary operation control signal 233: Timer enable signal 234: Timer enable signal 235: Execution time setting value 240, 240A: Response delay time table 241-1, 241-2, 241-3, 241-4, 241-5: Delay correction value 250-1, 250-2, 250-3, 250-4, 250-5: Delay compensation section 260: Execution time control section 261: Internal master trigger signal 300, 400, 410, 420: Instrumentation equipment 301, 401: Bias voltage control output signal 302, 411: High frequency output signal 303: Master trigger signal 500:Quantum Devices 510: Quantum operation control unit 511: Quantum operation unit control signal 520: Quantum operation section 521: Quantum operation unit output signal 2301: Entry number 2302-1, 2302-2, 2302-3, 2302-4, 2302-5: Distribution trigger signal output request field 2303: Auxiliary action request field 2304: Master trigger signal output request field 2305: Execution time setting value field 2401: Trigger signal type 2402: Response delay time field

Claims

1. A quantum device for performing quantum operations; a plurality of instrumentation units configured to transmit control signals to the quantum device to perform the quantum operations; a synchronization trigger distribution device that transmits a second trigger signal instructing transmission of the control signal to at least one of the plurality of instrumentation devices based on a first trigger signal indicating timing, The synchronization trigger distribution device includes: a control sequence table for identifying a predetermined instrumentation device, among the plurality of instrumentation devices, which is to output the second trigger signal based on the first trigger signal; a delay time table that specifies a delay time corresponding to each of the plurality of instrumentation devices; outputting the second trigger signal to an instrumentation device identified based on the control sequence table at a timing based on the delay time identified based on the delay time table; Quantum computing system.

2. The synchronization trigger distribution device includes a table read control unit, The table read control unit is a trigger number counter that counts the first trigger signal; The control sequence table includes: identifying a predetermined instrumentation device that is to output the second trigger signal from among the plurality of instrumentation devices based on the count number counted by the trigger number counter; The quantum computing system of claim 1 .

3. The synchronization trigger distribution device includes: receiving a command requesting the table read control unit to update the count value of the trigger number counter to a specified value; The quantum computing system according to claim 2 .

4. The synchronization trigger distribution device includes: receiving information from at least one of the plurality of instrumentation devices identifying a process state of the instrumentation device; The quantum computing system according to claim 2 .

5. the synchronous trigger distribution device includes a delay correction unit corresponding to each of the plurality of instrumentation devices; The delay correction unit is when the control sequence table identifies the corresponding instrumentation device, the timing is corrected based on the delay time of the corresponding instrumentation device identified in the delay time table, and the second trigger signal is output. The quantum computing system of claim 1 .

6. The delay time is a delay time starting from the second trigger signal. The quantum computing system of claim 1 .

7. The delay time includes at least one of a propagation delay of a transmission medium and a delay based on a communication protocol. The quantum computing system of claim 1 .

8. Equipped with a cooling device, the quantum device is disposed at the coldest portion of the cooling apparatus; At least one of the plurality of instrumentation devices and the synchronous trigger distribution device is disposed in a region having a temperature different from a region in which the quantum device is disposed. The quantum computing system of claim 1 .

9. the first trigger signal is generated by at least one of the plurality of instrumentation devices; The quantum computing system according to claim 8.

10. the first trigger signal is generated by an apparatus that is specialized for a function related to the first trigger signal and does not have a function related to the control signal, and that is disposed in a location having a temperature different from a location in which the quantum device is disposed; The quantum computing system of claim 8.

11. a host device disposed at a location in the system closest to room temperature; The host device generates the first trigger signal. The quantum computing system according to claim 8.

12. The first trigger signal is generated within the synchronous trigger distribution device. The quantum computing system according to claim 8.

13. A method for controlling synchronization between devices in quantum computing, comprising: A quantum device for performing quantum operations; a plurality of instrumentation units configured to transmit control signals to the quantum device to perform the quantum operations; a synchronous trigger distribution device that transmits a second trigger signal instructing transmission of the control signal to at least one of the plurality of instrumentation devices based on a first trigger signal indicating timing; The synchronization trigger distribution device includes: a first step of identifying a predetermined instrumentation device, among the plurality of instrumentation devices, which is to output the second trigger signal based on the first trigger signal; A second step of identifying a delay time corresponding to each of the plurality of instrumentation devices; a third step of outputting the second trigger signal to the instrumentation device identified based on the first step, at a timing based on the delay time identified based on the second step; A method for controlling synchronization between devices in quantum computing.

14. In the first step, Counting the first trigger signal; identifying a predetermined instrumentation device, among the plurality of instrumentation devices, which is to output the second trigger signal in response to a count value of the first trigger signal; The method for controlling synchronization between devices in quantum computing according to claim 13.

15. disposing said quantum device, instrumentation and synchronization trigger distribution apparatus within a cooling apparatus; the first trigger signal is generated by at least one of the instrumentation devices, the synchronous trigger distribution device, another device within the cooling device, and another device external to the cooling device; The method for controlling synchronization between devices in quantum computing according to claim 13.

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