Control system

Abstract

To easily assign identification information to a plurality of boards collectively in a control system with a simple configuration.SOLUTION: A control system 1 includes a host substrate 10 and a plurality of slave substrates 20 connected in a daisy chain to the host substrate 10 by a first transmission portion 31. Each of the plurality of slave substrates 20 includes a serial-parallel conversion circuit 22 having a shift register portion 22a. The host substrate 10 transmits identification information assigned to each of the plurality of host substrates 20 to the first transmission portion 31 as serial data.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a control system that assigns identification information to multiple daughter boards. [Background technology]

[0002] Conventionally, in a system in which a parent device and multiple terminal devices are connected by a transmission line, a method has been proposed in which each terminal device has a switch in series with this transmission line, receives a setting address from the parent device with the switch in an open state, and closes the switch after writing the setting address (see, for example, Patent Document 1). By closing the switch in this way, the next terminal device can receive and write the setting address, and by repeating this process, all terminal devices can receive and write the setting address.

[0003] Also, in a method of assigning IDs (identifiers) to multiple circuit boards mounted on a backboard, a method has been proposed in which an adder is provided on each circuit board to create a board ID for the subsequent circuit board, the board ID assigned by the previous circuit board is used as the board ID of the circuit board, and the board ID created by the adder is assigned as the board ID of the subsequent circuit board (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 6-3906 [Patent Document 2] Japanese Patent Application Publication No. 62-171061 Summary of the Invention [Problem to be solved by the invention]

[0005] As described above, when using a switch provided in series on the transmission line in each terminal, it takes time to complete the assignment of setting addresses to all terminals because the setting addresses are assigned to each terminal one by one. Therefore, the system cannot start operating until the assignment of setting addresses is completed. Furthermore, the parent device is dedicated to the task of assignment until the assignment of setting addresses is completed. Furthermore, with regard to the switch on the transmission line, the communication speed is improving year by year, and the demand for its waveform quality is increasing. Therefore, the quality of the switch is particularly important for a high-speed bus such as CAN (Controller Area Network), which is faster than a low-speed bus such as UART (Universal Asynchronous Receiver / Transmitter), but putting a switch on the transmission line affects the waveform quality to a certain extent. For example, when there are 10 terminals, the impact on the quality of the switch and the increase in cost are 10 times.

[0006] In addition, the above-mentioned ID assignment method uses an adder, so it is difficult to expand when the number of bits increases. For example, if the number of bits is 2, a circuit can be configured with only logic gates, but if the number of bits is 4, a dedicated adder is required. If the number of bits exceeds 4, the circuit becomes even larger and more complex. Also, the number of signal lines for ID assignment is equal to the number of bits. For example, in the case of 8 bits, a total of 16 lines are required for input and output of each circuit board. In addition, when considering application to products, for example, when preparing one circuit board for each paper feed tray, when you want to create a lineup of derivative products with functional differences based on a product with three paper feed trays (such as a product with two paper feed trays to reduce cost and a product with four paper feed trays to increase functionality), if the board IDs are consecutive due to the addition, for example, if the board IDs of the three paper feed trays are 1, 2, and 3, respectively, and the board ID of the internal paper feed unit connected downstream of the paper feed trays is 4, the board ID of the internal paper feed unit will become 3 or 5 depending on the increase or decrease in the number of paper feed trays. This makes software control difficult and increases the number of management steps.

[0007] An object of the present invention is to provide a control system that can collectively and easily assign identification information to a plurality of boards with a simple configuration. [Means for solving the problem]

[0008] In one embodiment, a control system includes a host board and a plurality of daughter boards connected to the host board in a daisy chain by a first transmission section. Each of the plurality of daughter boards has a serial-parallel conversion circuit having a shift register section. The host board transmits identification information assigned to each of the plurality of daughter boards to the first transmission section as serial data. Effect of the Invention

[0009] According to this aspect, it is possible to collectively and easily assign identification information to a plurality of boards with a simple configuration. [Brief description of the drawings]

[0010] [Figure 1] 1 is a block diagram showing a configuration of a control system according to an embodiment; [Diagram 2] 1 is a block diagram showing a microcontroller and a serial-parallel conversion circuit according to an embodiment of the present invention; [Diagram 3] FIG. 2 is a block diagram showing a microcomputer on a host board and a daughter board in one embodiment. [Figure 4] 1 is a circuit diagram illustrating an example of a serial-parallel conversion circuit according to an embodiment. [Diagram 5] FIG. 4 is an explanatory diagram for explaining a method of transmitting a board ID in one embodiment. [Figure 6] 1 is a block diagram showing a configuration of a printing device including a control system according to an embodiment. [Figure 7] FIG. 4 is an explanatory diagram for explaining a transmission order of board IDs in one embodiment. [Figure 8] 10 is a flowchart for explaining a method of assigning a board ID in one embodiment. [Figure 9] 13 is a flowchart for explaining the processing of each child board after the assignment of a board ID in one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] First, before describing a control system 1 according to an embodiment of the present invention, the necessity for a board ID will be described.

[0012] In CAN communication, all communications are shared among all boards, and each board obtains only the information it requires according to predefined rules. For example, when there is a change in the sensor connected to sub-board (2), sub-board (2) transmits the sensor information to the CAN bus, and the host board and sub-board (5) receive this sensor information, while the other boards ignore the sensor information. Below, we will discuss three perspectives: "Software reusability," "Consistency between software and boards," and "Production and maintenance."

[0013] <Software diversion> As mentioned above, each board judges whether it needs information or not, so in principle it runs on its own dedicated software. However, if the slave board (1) and the slave board (2) have almost the same functions, for example, when the slave board (1) controls the paper feed tray (1) and the slave board (2) controls the paper feed tray (2), the software for both boards is also almost the same, such as notifying the presence or absence of paper in the paper feed tray and feeding paper from the paper feed tray. When the host board requests paper feed from the paper feed tray (1), it sends a request for "Feed tray (1) start feeding" to the CAN bus, and the slave board (1) responds to this request by performing the paper feed operation, but the slave board (2) must ignore the request. In this case, by adding a parameter to the common request to distinguish it, such as "Feed tray start feeding: Paper feed tray (2)", the software for the slave boards (1) and (2) can be made common, which reduces the development and management man-hours, and also reduces the amount of downloaded data and the download time required for software updates. In this case, the child boards (1) and (2) need to know which tray they are responsible for controlling, and need a board ID (identifier) ​​to identify them.

[0014] <Compatibility between software and substrate> In CAN communication, the bus is shared, so the physical positional relationship does not affect communication. For example, even if there is no daughter board (2) next to daughter board (1) and daughter board (10) is placed, communication can be performed normally. However, in an actual product, the physical arrangement is also important. For example, a board that controls the paper feed tray (1) is used for the paper feed tray (1), and the software that controls the paper feed tray (1) must be stored on this board. This is particularly important when the same daughter board is used in multiple places. For example, if a common daughter board A is used for the paper feed tray and external paper feed, when a DC motor controlled by the daughter board A is operated, when a command to operate the paper feed motor of the paper feed tray is received, the external paper feed motor will operate. Thus, it is necessary to check whether the units are placed in the appropriate positions with respect to the physical arrangement and whether the appropriate software to control the units is stored before the system is operated.

[0015] <Production and maintenance> When a board is manufactured, no software (programs) are stored in the microcontroller (embedded in the flash memory) of the board, and only a bootstrap loader that performs minimum communication operations and rewrites its own flash memory is written to the microcontroller. When a product is manufactured, it is necessary to write software that enables the product to operate, but in relation to the above-mentioned consistency, it is necessary to write software that is suitable for the unit to be controlled and the physical layout. In addition, after the product is shipped, service parts (replacement parts) are prepared to deal with board failures in the market, but preparing service parts for the number of units is not a good idea because it increases inventory and management labor, and it is desirable that if the boards are common, the service parts are also common. In addition, when a malfunction occurs in the market, the board may be temporarily replaced to identify the faulty part. For example, the boards of paper feed tray (1) and paper feed tray (2) may be replaced, or the board of paper feed tray (1) may be replaced with the board of the internal paper feed part of another product. Even in such cases, it is necessary to check before starting the system that the appropriate software is stored in the appropriate location, and if it is inappropriate, the software must be updated. In order to realize this control, it is essential to assign a board ID that corresponds to the physical part of the board.

[0016] A control system 1 according to an embodiment of the present invention will now be described with reference to the drawings.

[0017] FIG. 1 is a block diagram showing the configuration of the control system 1.

[0018] FIG. 2 is a block diagram showing the microcomputers 11 and 21 and the serial-parallel conversion circuit 22. As shown in FIG.

[0019] The control system 1 shown in FIG. 1 includes a host substrate 10 and, for example, fifteen slave substrates 20(1), 20(2), ..., 20(15). The number of slave substrates 20 can be any number equal to or greater than two. Each substrate (host substrate 10 and multiple slave substrates 20) may be the same substrate or multiple types of substrates. A slave substrate 20 performs a predetermined operation in response to an instruction from the host substrate 10 or another slave substrate 20. A slave substrate 20 can also operate autonomously using information from sensors connected to it and a timing means.

[0020] The host substrate 10 and the multiple daughter substrates 20 are connected in a daisy chain by the first transmission unit 31. That is, starting from the host substrate 10, as if drawing a single line, the host substrate 10 and daughter substrate 20(1) are connected, daughter substrates 20(1) and 20(2) are connected, and similarly, until daughter substrate 20(14) and daughter substrate 20(15) are connected. The first transmission unit 31 has a signal line for a clock signal (CLK), a signal line for a latch signal (LAT), and a signal line for a data signal (DAT).

[0021] The host board 10 and the multiple child boards 20 are also connected in a daisy chain through the same path as the first transmission unit 31 by a second transmission unit 32 that is different from the first transmission unit 31. This second transmission unit 32 has, for example, a CAN-H signal line and a CAN-L signal line. CAN communication by the second transmission unit 32 transmits a signal depending on the presence or absence of a potential difference between the CAN-H signal line and the CAN-L signal line. The second transmission unit 32 is used to communicate and exchange control information between the boards, for example, to share the state of a sensor connected to each board with other boards, or to operate an actuator such as a DC motor connected to each board.

[0022] 2, the host board 10 has a microcomputer 11. In addition, the daughter board 20 has a microcomputer 21 and a serial-parallel conversion circuit 22.

[0023] As shown in FIG. 3, the microcomputer 21 of the daughter board 20 (similar to the microcomputer 11 of the host board 10) has a CPU (Central Processing Unit) 21a (11a), a memory unit 21b (11b), and an input / output unit 21c (11c).

[0024] The CPU 21a (11a) is an example of one or more processors that function as an arithmetic processing device, and reads and executes a predetermined program from the storage unit 21b (11b).

[0025] The storage unit 21b (11b) has, for example, a memory such as a flash memory that stores information such as programs executed by the CPU 21a (11a) and control data in a rewritable, non-volatile manner, and a RAM (Random Access Memory) that can be written to and read at any time and is used as a working storage area.

[0026] The input / output unit 21c (11c) transmits and receives various information to and from peripheral devices. For example, the input / output unit 11c of the host board 10 has an SPI (Serial Peripheral Interface) function that transmits a clock signal, a latch signal, and a data signal to the child board 20, and transmits a board ID, which is an example of identification information. Specifically, the input / output unit 11c of the host board 10 outputs serial data of 8 bits of the board ID one bit at a time in synchronization with a clock signal. The input / output unit 21c of the child board 20 acquires the board ID via the serial-parallel conversion circuit 22.

[0027] The board ID data transmitted by the host board 10 shown in Figure 2 is input to the daughter board 20(1) which is directly connected by a cable. This data is then input to the next stage daughter board 20(2), and at the same time, new data is input from the host board 10 to the daughter board 20(1). With this configuration, the order in which data is received is determined only by the connection path of the first transmission part 31 between the boards, and the host board 10 can set any data (board ID) to any daughter board 20 depending on the data transmission order. As will be described later, if the host board 10 transmits a latch signal after transmitting data to all the daughter boards 20, the data in the shift register section 22a shown in Figure 4 in each daughter board 20 will be held in the latch section 22b in a batch, and the board ID will become readable by the microcomputer 21 of the daughter board 20.

[0028] As shown in FIG. 4, the serial-parallel conversion circuit 22 has a shift register section 22a that temporarily holds data, a latch section 22b that holds the data in the shift register section 22a using a latch signal, which is a data holding signal, from the host substrate 10, and a data output enable section 22c.

[0029] In the serial-parallel conversion circuit 22 of each daughter board 20 shown in FIG. 4, the flip-flops have indefinite initial values, so they are initialized to "0" (L level) by a reset circuit mounted on the daughter board 20 when power is turned on. "0" is an example of a reset value by a reset circuit. The shift register section 22a inputs the data output from the host board 10 to the flip-flops, and holds the data at the rising edge of the clock signal. At this time, the data input to the second-stage flip-flop becomes the output of the first-stage flip-flop. When the next clock is supplied from the host board 10, the first-stage flip-flop holds the data output by the host board 10, and the second-stage flip-flop holds the data output by the first-stage flip-flop.

[0030] Each of the shift register section 22a and latch section 22b is composed of, for example, eight flip-flops, A to H. The data in the shift register section 22a is sequentially sent to downstream circuits, and then sent to the downstream daughter board 20.

[0031] 4, the flip-flops in the shift register section 22a are configured in eight stages (A to H), meaning that 8-bit data from the host substrate 10 can be set in the shift register section 22a with eight clocks. When the ninth clock is supplied, each piece of data held in the shift register section 22a is pushed out as is and passed to the data input of the daughter substrate 20 in the next stage.

[0032] The latch section 22b holds the data held by the shift register section 22a in response to the rising edge of a latch signal from the host substrate 10. This allows the data held by the latch section 22b to continue to hold the data at the time of latching, regardless of the clock signal or data signal of the host substrate 10. The data output enable section 22c controls whether or not the data held by the latch section 22b is output. The data output enable section 22c is controlled by the microcomputer 21 of each child substrate 20 via an OE signal line, and outputs the held data to the microcomputer 21.

[0033] As shown in FIG. 5, the data transmitted first by the host board 10 corresponds to the data of the child board 20 connected furthest (most downstream) to the first transmission section 31. In the case where the child boards 20 are made up of 15 boards (N=15 in FIG. 5), the host board 10 transmits data for the 15th board (Nth ID), data for the 14th board (N-1th ID), and so on, and after transmitting data (first ID) of the child board 20(1) directly connected to the host board 10 by the first transmission section 31, the host board 10 controls (transmits) the latch signal. At this timing, the data temporarily held in the shift register section 22a of each child board 20 is simultaneously moved to the flip-flop of the latch section 22b. The child board 20 (microcomputer 21) simply permits the data output enable section 22c to output and confirms the setting of the board ID. In addition, since the flip-flop is initialized to "0" when the power is turned on, the microcomputer 21 can detect that the board ID has been set by the host board 10 if it confirms that ID≠0.

[0034] In this way, the host board 10 can send first the data of the child board 20 connected furthest (furthest downstream) in the daisy chain of the first transmission section 31, and last the data of the child board 20 connected closest (furthest upstream). This means that the order (location) can be specified only by the connection order of the communication path, and since the board ID is data, any ID can be assigned.

[0035] In the example of Figure 6, the printing device 100 includes a printing unit 110, an external paper feed unit 121, an internal paper feed unit 122, paper feed tray (3) 123, paper feed tray (2) 124, paper feed tray (1) 125, an upward conveying unit 126, a horizontal conveying unit 127, a paper discharge unit 128, and an operation panel 129.

[0036] Printing unit 110 has a host board 10. In addition, external paper feed unit 121 has a daughter board 20(1), internal paper feed unit 122 has a daughter board 20(2), paper feed tray (3) 123 has a daughter board 20(3), paper feed tray (2) 124 has a daughter board 20(4), paper feed tray (1) 125 has a daughter board 20(5), ascending transport unit 126 has a daughter board 20(6), horizontal transport unit 127 has a daughter board 20(7), paper discharge unit 128 has a daughter board 20(8), and operation panel 129 has a daughter board 20(9). For example, external paper feed unit 121, internal paper feed unit 122, paper feed tray (3) 123, paper feed tray (2) 124, and paper feed tray (1) 125 have the same daughter board 20. Moreover, the upward transport section 126, the horizontal transport section 127, and the paper discharge section 128 also have the same child board 20 (different from the child board 20 of the external paper feed section 121, etc.).

[0037] The printing device 100 is an example of a system (controlled system) equipped with a control system 1 that includes a host board 10 and multiple child boards 20. A system equipped with the control system 1 can easily be used in factory production equipment (factory automation), distributed robot control, vending machines, etc. In particular, it is ideal for applications in which the same boards are used and each board is made to perform a different operation, or for applications in which the child boards 20 are replaced or exchanged.

[0038] When the board IDs of daughter boards 20(1) to 20(9) are assigned the numbers "1" to "9" in order, host board 10 only needs to transmit nine pieces of data (board IDs) in the order of board ID "9" of daughter board 20(9) of operation panel 129, board ID "8" of daughter board 20(8) of paper discharge section 128, ..., board ID "1" of daughter board 20(1) of external paper feed section 121, as shown in FIG.

[0039] This allows any data to be assigned to any location, and for example, for a printing device 100 that does not have paper feed tray (3) 123, paper feed tray (2) 124 can be connected immediately after the internal paper feed unit 122, and the board ID "4" of paper feed tray (2) 124 can be sent as the sixth, and then the board ID "2" of the internal paper feed unit 122 can be sent as the seventh. Also, when a new paper feed tray (4) is added between the internal paper feed unit 122 and paper feed tray (3) 123, the paper feed tray (4) can be connected between the internal paper feed unit 122 and paper feed tray (3) 123 by the first transmission unit 31 (second transmission unit 32), and the board ID "10" of the paper feed tray (4) can be sent as the eighth, and the ID "2" of the internal paper feed unit 122 can be sent as the ninth.

[0040] In this embodiment, after power is turned on, both the host board 10 and the slave board 20 are power-on reset, and in particular, the serial-parallel conversion circuit 22 in the slave board 20 is initialized to "0". At this time, the serial-parallel conversion circuit 22 in the slave board 20 is not directly related to the operation of the microcomputer 21 in the slave board 20. In other words, the serial-parallel conversion circuit 22 is in a state where it can receive data from the host board 10 immediately after power is turned on, and the host board 10 can transmit data at a timing convenient for the host board 10. After the slave board 20 is ready, it permits the serial-parallel conversion circuit 22 to output data, and as described above, it confirms that ID ≠ 0. This means that data setting can be performed asynchronously, and the host board 10 can transmit data immediately when it is ready to transmit data, and then proceed with the initialization process required for itself. In addition, the board ID is set simultaneously on each slave board 20 by the latch signal, so that each slave board 20 does not need to wait for the initialization or ID setting of the other slave boards 20, which contributes to shortening the startup time of the control system 1.

[0041] FIG. 8 is a flowchart for explaining a method of assigning a board ID.

[0042] The process shown in Fig. 8 is first performed after the control system 1 (printing device 100) is powered on (step S11). Since the integrity of the board and software is confirmed before the printing device 100 operates, the board ID is set immediately after powering on. Although not shown in Fig. 8, initialization processes of the microcomputers 11 and 21, such as setting the port for reading the board ID, are performed at this time.

[0043] Next, the host board 10 sets (transmits data) the board ID (setting value) in the serial-parallel conversion circuit 22 of the daughter board 20 according to a predetermined location (the connection order of the bundled wires of the first transmission section 31) as described above (step S12). Note that this setting timing does not need to be synchronized with the daughter board 20, and the setting is performed after the serial-parallel conversion circuit 22 of the daughter board 20 is reset. Specifically, it may be performed a few msec after the power is turned on for the daughter board 20. Conversely, the daughter board 20 may start the ID confirmation process of steps S13 and S14 described below before the host board 10 transmits the data.

[0044] After the power is turned on (step S11), the data output enable unit 22c is prohibited from outputting the board ID, and the microcomputer 21 enables the data output enable unit 22c of the serial-parallel conversion circuit 22 so that the board ID is output (step S13).

[0045] Then, the microcomputer 21 of the daughter board 20 polls (verifies) the output of the serial-parallel conversion circuit 22 (step S14).

[0046] Then, the microcomputer 21 determines whether the polled board ID is other than 0 (step S15).

[0047] If the board ID is other than 0 (step S15: YES), the microcomputer 21 assumes that setting of the board ID is completed, and stores the board ID in the storage unit 21b (such as a RAM) (step S16), and the process shown in FIG. 8 ends.

[0048] If the board ID is 0 (step S15: NO), the microcomputer 21 judges whether a specified time (e.g., 100 msec) has elapsed (step S17). If the specified time has not elapsed (step S17: NO), the microcomputer 21 again performs the process of judging whether the board ID is other than 0 (step S15).

[0049] Since the board ID (output of the serial-parallel conversion circuit 22) is initialized to 0 after power-on (step S11), the board ID remaining at 0 means that a failure has occurred in the host board 10, the slave board 20, the communication bundle (first transmission unit 31), etc. Therefore, if a specified time has elapsed (step S17: YES), the microcomputer 21 determines that an error (failure such as a broken wire) has occurred and stops operation (step S18), and ends the process shown in FIG. 8. The cause of the error can be determined by exchanging information between the host board 10 and the slave board 20, including the second transmission unit 32. If negotiation cannot be performed in the initial communication, such as when there is no communication from the host board 10 or no communication response from the slave board 20, it is advisable to prohibit the product operation (operation of the printing device 100).

[0050] FIG. 9 is a flow chart for explaining the processing of each child board 20 after the board ID is assigned.

[0051] The process shown in FIG. 9 is carried out after the process of saving the board ID of the child board 20 (step S21 and step S16 in FIG. 8).

[0052] The daughter board 20 determines whether software such as firmware that controls each part of the printing device 100, such as the external paper feed unit 121, is stored in the memory unit 21b of the microcomputer 21 (step S22). Note that these processes are executed by a bootstrap loader.

[0053] If the software is stored (step S22: YES), the microcomputer 21 determines whether the software (the board ID assumed in the software) is consistent with the set (saved) board ID (step S23). For example, the software for controlling the paper feed tray is programmed to determine whether the board ID is 3, 4, or 5.

[0054] If the software matches the set board ID (step 23: YES), the microcomputer 21 performs initialization processing required for controlling each part of the printing device 100 (step S24), and ends the processing shown in FIG.

[0055] If the software is not stored (step S22: NO) or if the software does not match the set board ID (step S23: NO), the microcomputer 21 requests the host board (parent board) 10 to download the software (transmit to the child board 20 for downloading to the child board 20) (step S25). After this, the host board 10 transmits the software (program data) corresponding to the board ID to the corresponding child board 20, and the child board 20 receives the software and stores it in the storage unit 21b (step S26). When the download is completed, the child board 20 (microcomputer 21) may restart and repeat the process from the process of step S23 described above. Then, the process shown in FIG. 9 ends. If the host board 10 does not hold the program data, it may obtain it, for example, from a device connected to the host board 10 (for example, a hard disk, a USB (Universal Serial Bus) memory, an SD memory card, etc.) or via a network.

[0056] The first transmission unit 31 may communicate for other purposes in addition to the above-mentioned communication for assigning board IDs to the multiple child boards 20. Simple two-way communication can be achieved by using a common clock signal and latch signal, adding data input from the child board 20 in addition to data output from the host board 10, and mounting a parallel-serial conversion circuit on the host board 10. For example, the first transmission unit 31 may communicate instead when the communication line of the second transmission unit 32 is shorted, or may communicate for other purposes such as determining whether power is being supplied to each unit of the control system 1 (printing device 100).

[0057] Furthermore, in this embodiment, the assignment of the board ID is performed after the control system 1 (printing device 100) is powered on (step S11 in FIG. 8), but may be performed based on an arbitrary operation by a service technician during maintenance.

[0058] In addition, it is desirable to assign an arbitrary and unique board ID to each of the multiple child boards 20, but in cases where two or more child boards 20 are arranged to perform completely identical control, the same board ID may be assigned.

[0059] In addition, in this embodiment, the host board 10 transmits identification information to the first transmission section 31 as serial data in order of connection starting with the child board 20 connected furthest downstream by the first transmission section 31 among the multiple child boards 20, so that board IDs can be assigned to all child boards 20 at once, but for example, board IDs may also be assigned to only some of the child boards 20.

[0060] In addition, it is desirable that the first transmission section 31 and the second transmission section 32 are arranged in a daisy chain with the same path, but the second transmission section 32 may be a star type that directly connects the host board 10 and multiple child boards 20, or the first transmission section 31 and the second transmission section 32 may be daisy chains with different paths.

[0061] In the present embodiment described above, control system 1 includes host board 10 and a plurality of daughter boards 20 connected in a daisy chain to host board 10 by first transmission section 31. Each of the plurality of daughter boards 20 has a serial-parallel conversion circuit 22 having a shift register section 22a, and host board 10 transmits identification information (board ID) assigned to each of the plurality of daughter boards 20 to first transmission section 31 as serial data.

[0062] In this way, by the host board 10 transmitting the board IDs of the multiple child boards 20 as serial data, any board ID can be assigned to any location (child board 20) in a short time. Also, the logical position of the child board 20 is determined only by the connection path of the communication line of the first transmission unit 31, and the control system 1 can recognize this path in advance. And, since the board ID to be assigned is determined by the data transmitted by the host board 10, any board ID can be flexibly assigned, such as consecutive, reverse order, or skipping numbers. Also, when assigning board IDs, the host board 10 can set board IDs to all the child boards 20 at the same time in a lump without communicating with each child board 20. This eliminates the need for communication time or time for selecting a communication partner, contributing to a high-speed startup of the control system 1. Also, the ID setting of the host board 10 and the board ID confirmation of the child board 20 can be performed asynchronously and independently. In this case, the host board 10 can set board IDs regardless of the status of the child board 20. Therefore, for example, the startup time of the entire control system 1 (printing device 100) is not prolonged due to the influence of a child board 20 that has a long startup time. Also, for example, even if a certain child board 20 fails and does not respond to the setting of the board ID, the other child boards 20 can operate independently, and downstream operation of the first transmission section 31 of the failed child board 20 is not hindered. Also, the child board 20 can check whether the board ID is set at its own timing, and can operate in parallel with other child boards 20 regardless of the other child boards 20. This is particularly effective when the number of child boards 20 increases, and contributes to high-speed startup of the control system 1 and identification of the failure location. As described above, according to this embodiment, it is possible to easily assign identification information (board ID) to multiple boards (child boards 20) at once with a simple configuration.

[0063] In addition, in this embodiment, the host board 10 transmits the board ID to the first transmission section 31 as serial data in connection order starting with the child board 20 connected most downstream by the first transmission section 31 among the multiple child boards 20, and transmits a latch signal to the first transmission section 31 when the board ID is input to the shift register section 22a of each of the multiple child boards 20.

[0064] This makes it possible to transmit board IDs collectively to all of the child boards 20. This makes it possible to assign board IDs in a short time. Therefore, board IDs can be assigned to multiple child boards 20 more easily.

[0065] In this embodiment, the control system 1 further includes a second transmission section 32 that connects the host board 10 and the multiple child boards 20 in a daisy chain using the same route as the first transmission section 31.

[0066] In other words, the first transmission unit 31 is connected to the same path as existing transmission units such as the second transmission unit 32 that are daisy-chained for CAN communication. Therefore, board IDs can be assigned to multiple child boards 20 with an even simpler configuration.

[0067] From the viewpoint of the identification information assignment method, the identification information assignment method in control system 1 includes host substrate 10 and a plurality of daughter substrates 20 connected to host substrate 10 in a daisy chain by first transmission unit 31, each of the plurality of daughter substrates 20 having serial-parallel conversion circuit 22 having shift register unit 22a, and includes a transmission step of host substrate 10 transmitting identification information assigned to each of the plurality of daughter substrates 20 to first transmission unit 31 as serial data. In the transmission step, the identification information assignment method transmits the substrate IDs by host substrate 10 as serial data in connection order starting from the substrate 20 connected most downstream by first transmission unit 31 among the plurality of daughter substrates 20, and transmits a latch signal to first transmission unit 31 by host substrate 10 with the substrate IDs input to the shift register unit 22a of each of the plurality of daughter substrates 20.

[0068] Also, from the viewpoint of the program, the program is executed by host board 10 (CPU 11a and memory of storage unit 11b) of control system 1, which includes host board 10 and a plurality of daughter boards 20 connected to host board 10 in a daisy chain by first transmission unit 31, each of the plurality of daughter boards 20 having a serial-parallel conversion circuit 22 having a shift register unit 22a, and causes host board 10 to realize a function of transmitting identification information assigned to each of the plurality of daughter boards 20 as serial data to first transmission unit 31. Also, in this transmission function, the program causes board IDs to be transmitted as serial data in connection order starting from the daughter board 20 connected most downstream by first transmission unit 31 among the plurality of daughter boards 20, and causes first transmission unit 31 to transmit a latch signal when the board IDs are input to the shift register units 22a of each of the plurality of daughter boards 20.

[0069] The present invention is not limited to the above-described embodiment as it is, and the components can be modified and embodied without departing from the gist of the invention in the implementation stage. In addition, various inventions can be formed by appropriate combinations of the multiple components disclosed in the above-described embodiment. For example, all the components shown in the embodiment may be appropriately combined. Of course, various modifications and applications are possible without departing from the spirit of the invention. The invention described in the claims at the time of filing of this application is appended below.

[0070] [Appendix 1] A host substrate; a plurality of daughter boards connected to the host board in a daisy chain by a first transmission unit; each of the plurality of daughter boards has a serial-parallel conversion circuit having a shift register section; The host board transmits identification information assigned to each of the plurality of child boards to the first transmission unit as serial data. A control system comprising:

[0071] [Appendix 2] the host board transmits the identification information to the first transmission section as serial data in connection order starting from the slave board connected most downstream by the first transmission section among the plurality of slave boards, and transmits a latch signal to the first transmission section with the identification information input to the shift register section of each of the plurality of slave boards. 2. The control system according to claim 1 .

[0072] [Appendix 3] a second transmission section that connects the host board and the plurality of child boards in a daisy chain using the same route as the first transmission section. 3. The control system according to claim 1 or 2. [Explanation of symbols]

[0073] 1. Control System 10 Host Board 11 Microcomputer 11a CPU 11b Storage section 11c Input / output section 20 Sub-board 21 Microcomputer 21a CPU 21b Storage section 21c Input / output section 22 Serial-parallel conversion circuit 22a Shift register section 22b Latch section 22c Data output enable section 31 First Transmission Section 32 Second Transmission Section 100 Printing device 110 Printing Department 121 External paper feed section 122 Internal paper feed section 123 Paper feed tray (3) 124 Paper feed tray (2) 125 Paper feed tray (1) 126 Lifting conveyor section 127 Horizontal conveyor 128 Paper output section 129 Operation Panel

Claims

1. A host substrate; a plurality of child boards connected to the host board in a daisy chain by a first transmission unit; each of the plurality of daughter boards has a serial-parallel conversion circuit having a shift register section; The host board transmits identification information assigned to each of the plurality of child boards to the first transmission section as serial data. A control system comprising:

2. the host board transmits the identification information to the first transmission section as serial data in connection order starting from the slave board connected most downstream by the first transmission section among the plurality of slave boards, and transmits a latch signal to the first transmission section with the identification information input to the shift register section of each of the plurality of slave boards 2. The control system of claim 1.

3. a second transmission section that connects the host board and the plurality of child boards in a daisy chain using the same route as the first transmission section.

3. The control system according to claim 1 or 2.

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