Chip adhesive film, semiconductor package including the same, and method for manufacturing semiconductor package

Abstract

To provide a chip adhesive film that is relatively thin and has improved thickness uniformity, and a semiconductor package that is reduced in size and has improved structural reliability.SOLUTION: A chip adhesive film according to the present invention includes an adhesive layer and a filler containing an organic substance dispersed within the adhesive layer, the thickness of the chip adhesive film is 0.5 μm to 3 μm, and the average particle size of the filler is 0.8 times or more the thickness of the chip adhesive film and less than 1 time the thickness of the chip adhesive film.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a chip adhesive film containing an organic filler, a semiconductor package containing the same, and a method for manufacturing the semiconductor package. In particular, the present invention relates to a chip adhesive film containing an organic filler, a semiconductor package containing the same, and a method for manufacturing the semiconductor package. [Background technology]

[0002] 2. Description of the Related Art With the development of the electronics industry and the demands of users, electronic devices are becoming smaller and lighter. As a result, semiconductor packages used in electronic devices are required to have larger capacities and higher integration. In response to such demands, semiconductor packages are being implemented with a structure in which a plurality of semiconductor chips are stacked.

[0003] In such a semiconductor package structure, a semiconductor chip is adhesively fixed onto a package substrate or another semiconductor chip through a chip adhesive film. In recent years, for process convenience, a chip adhesive film is attached to the back surface of a wafer before the wafer sawing process, and after the wafer sawing, the semiconductor chip with the chip adhesive film attached thereto is stacked on a package substrate or another semiconductor chip to manufacture a semiconductor package. Therefore, the laminate is required to be thin and have a uniform thickness. Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in consideration of the above-mentioned problems in conventional semiconductor packages, and an object of the present invention is to provide a chip adhesive film which is relatively thin and has improved thickness uniformity. It is another object of the present invention to provide a semiconductor package having reduced size and improved structural reliability. [Means for solving the problem]

[0005] The chip adhesive film of the present invention, made to achieve the above-mentioned object, is a chip adhesive film having an adhesive layer and a filler containing an organic substance dispersed within the adhesive layer, wherein the thickness of the chip adhesive film is 0.5 μm to 3 μm, and the average particle size of the filler is 0.8 times or more the thickness of the chip adhesive film and less than 1 time the thickness of the chip adhesive film.

[0006] In order to achieve the above object, a semiconductor package according to the present invention has a substrate, a first semiconductor chip arranged on the substrate, a chip stack including a plurality of second semiconductor chips arranged on the substrate and stacked vertically, the chip stack being horizontally spaced from the first semiconductor chip, and bonding wires connected to the chip stack and the substrate, the chip stack further including a chip adhesive film provided between the plurality of stacked second semiconductor chips, the chip adhesive film including an adhesive layer and a filler including an organic substance dispersed in the adhesive layer, the chip adhesive film having a thickness of 0.5 μm to 3 μm, and an average particle size of the filler being 0.8 times or more and less than 1 time the thickness of the chip adhesive film.

[0007] In order to achieve the above object, a method for manufacturing a semiconductor package according to the present invention includes the steps of mounting a first semiconductor chip on a substrate, forming a chip stack on the substrate, the chip stack being horizontally spaced from the first semiconductor chip, forming bonding wires connected to the chip stack and the substrate, and forming a molding layer covering the first semiconductor chip, the chip stack, and the bonding wires. The step of forming the chip stack includes the steps of providing a plurality of second semiconductor chips having a chip adhesive film formed on one surface thereof, and stacking the plurality of second semiconductor chips in a vertical direction. The chip adhesive film includes an adhesive layer and a filler dispersed in the adhesive layer and containing an organic material. The chip adhesive film has a thickness of 0.5 μm to 3 μm, and an average particle size of the filler is 0.8 times or more and less than about 1 time the thickness of the chip adhesive film. Effect of the Invention

[0008] According to the chip adhesive film and the semiconductor package including the same, and the method for manufacturing the semiconductor package according to the present invention, even when the chip adhesive film is compressed by stacking the semiconductor chip during the manufacture of the semiconductor package, the filler supports the adhesive layer, so that the thickness of the chip adhesive film does not decrease excessively and can be maintained at a constant level, due to the presence of the filler. Also, since the filler is dispersed throughout the entire area of ​​the chip adhesive film, even when the adhesive film is compressed by stacking the semiconductor chip during the manufacture of the semiconductor package, the thickness of the adhesive film is relatively uniform throughout the entire area of ​​the chip adhesive film in which the filler is dispersed. This allows a plurality of semiconductor chips to be stacked without being tilted, improving the structural reliability of the semiconductor package. In addition, since the chip adhesive film contains a relatively small amount of filler, it has a relatively thin thickness, so that the size of a semiconductor package in which a plurality of semiconductor chips are adhered and fixed using the chip adhesive film can be reduced. [Brief description of the drawings]

[0009] [Figure 1] 1 is a cross-sectional view showing a schematic configuration of a chip adhesive film according to an embodiment of the present invention. [Diagram 2] 2 is a conceptual diagram illustrating materials contained in a chip adhesive film according to an embodiment of the present invention. [Diagram 3] 1 is a cross-sectional view showing a schematic configuration of a semiconductor package according to an embodiment of the present invention. [Figure 4] FIG. 4 is an enlarged cross-sectional view of a portion EX1 in FIG. [Diagram 5] 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention. [Figure 6A] 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention. [Figure 6B] 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention. [Figure 7A] 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention. [Figure 7B] 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention. [Figure 8] 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention. [Figure 9] 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Next, specific examples of embodiments for carrying out the chip adhesive film, the semiconductor package including the same, and the method for manufacturing the semiconductor package according to the present invention will be described with reference to the drawings. The same reference numerals are used for the same components in the drawings, and duplicated descriptions thereof will be omitted.

[0011] FIG. 1 is a cross-sectional view showing a schematic configuration of a chip adhesive film 10 according to an embodiment of the present invention, and FIG. 2 is a conceptual diagram illustrating materials contained in the chip adhesive film 10 according to an embodiment of the present invention. Referring to FIGS. 1 and 2, a chip adhesive film 10 includes an adhesive layer 11 and a filler 13 . The chip adhesive film 10 is used as a film for bonding and joining stacked semiconductor chips together when manufacturing a semiconductor package.

[0012] In one embodiment, the thickness 10H of the chip adhesive film 10 is about 0.5 μm to 3 μm. For example, the thickness 10H of the chip adhesive film 10 is about 1 μm. Here, the thickness 10H of the chip adhesive film 10 means the length of the chip adhesive film 10 in the vertical direction. If the thickness 10H of the chip adhesive film 10 is excessively large, it is difficult to thin the electronic device to which the chip adhesive film 10 is applied.

[0013] The adhesive layer 11 has a film shape. Since the adhesive layer 11 has a film shape, the thickness 10H of the chip adhesive film 10 is substantially the same as the thickness of the adhesive layer 11. The adhesive layer 11 includes a thermosetting polymer TSR and a binder polymer TPR. In FIG. 2, the thermosetting polymer TSR is illustrated as ovals and the binder polymer TPR is illustrated as solid strands. The thermosetting polymer TSR and the binder polymer TPR are bonded together through a curing process to form a polymer matrix that forms the adhesive layer 11 . The hardening step may be, for example, but is not limited to, a heat treatment.

[0014] In one embodiment, the thermosetting polymer TSR is, for example, one or more selected from the group consisting of epoxy-based polymers and bismaleimide-based polymers. Examples of epoxy polymers include, but are not limited to, bisphenol A type epoxy resins, bisphenol F type epoxy resins, naphthalene type epoxy resins, aminophenol type epoxy resins, hydrogenated bisphenol type epoxy resins, alicyclic epoxy resins, alcohol ether type epoxy resins, cyclic aliphatic epoxy resins, fluorene type epoxy resins, and siloxane type epoxy resins. They may be used alone or in combination of two or more.

[0015] A bismaleimide polymer is a polymer obtained by polymerization of a maleimide monomer containing one or more maleimide groups. Examples of the maleimide monomer include N-phenylmaleimide, N-(2-methylphenyl)maleimide, N-(4-methylphenyl)maleimide, N-(2,6-dimethylphenyl)maleimide, bis(4-maleimidophenyl)methane, 2,2-bis(4-(4-maleimidophenoxy)-phenyl)propane, bis(3,5-dimethyl-4-maleimidophenyl)methane, bis(3-ethyl-5-methyl-4-maleimidophenyl)methane, bis(3,5-diethyl-4-maleimidophenyl)methane, polyphenylmethanebismaleimide, and other maleimides containing a biphenyl structure, but the present invention is not limited thereto.

[0016] In addition, bismaleimide polymers can be obtained from prepolymers containing maleimide groups. Examples of the prepolymers include N-phenylmaleimide prepolymers, N-(2-methylphenyl)maleimide prepolymers, N-(4-methylphenyl)maleimide prepolymers, N-(2,6-dimethylphenyl)maleimide prepolymers, bis(4-maleimidophenyl)methane prepolymers, 2,2-bis(4-(4-maleimidophenoxy)-phenyl)propane prepolymers, bis(3,5-dimethyl-4-maleimidophenyl)methane prepolymers, bis(3-ethyl-5-methyl-4-maleimidophenyl)methane prepolymers, bis(3,5-diethyl-4-maleimidophenyl)methane prepolymers, polyphenylmethane bismaleimide prepolymers, maleimide prepolymers containing a biphenyl structure, prepolymers of N-phenylmaleimide and amine compounds, and N-(2-methylphenyl)maleimide and amine compounds. prepolymers of amine-based compounds, prepolymers of N-(4-methylphenyl)maleimide and amine-based compounds, prepolymers of N-(2,6-dimethylphenyl)maleimide and amine-based compounds, prepolymers of bis(4-maleimidophenyl)methane and amine-based compounds, prepolymers of 2,2-bis(4-(4-maleimidophenoxy)-phenyl)propane and amine-based compounds, prepolymers of bis(3,5-dimethyl-4-maleimidophenyl)methane and amine-based compounds, prepolymers of bis(3-ethyl-5-methyl-4-maleimidophenyl)methane and amine-based compounds, prepolymers of bis(3,5-diethyl-4-maleimidophenyl)methane and amine-based compounds, prepolymers of maleimide containing a biphenyl structure and amine-based compounds, and mixtures of any one or at least two of the above prepolymers of polyphenylmethane bismaleimide and amine-based compounds, but the present invention is not limited thereto.

[0017] In one embodiment, the content of the thermosetting polymer TSR is about 20 parts by weight to 60 parts by weight per 100 parts by weight of the chip adhesive film 10 . For example, the content of the thermosetting polymer TSR is about 20 parts by weight to 60 parts by weight, about 20 parts by weight to 50 parts by weight, or about 30 parts by weight to 50 parts by weight, per 100 parts by weight of chip adhesive film 10 . In one embodiment, the binder polymer TPR comprises a thermoplastic polymer. The thermoplastic polymer is, for example, one or more selected from the group consisting of acrylic-based polymers and phenoxy-based polymers. The acrylic polymer is an acrylic polymer obtained by radical polymerization using an acrylic monomer as a raw material.

[0018] In one embodiment, the acrylic monomer may be, for example, methyl(meth)acrylate, ethyl(meth)acrylate, propyl(meth)acrylate, isopropyl(meth)acrylate, butyl(meth)acrylate, isobutyl(meth)acrylate, hexyl(meth)acrylate, 2-ethylhexyl(meth)acrylate, n-octyl(meth)acrylate, isooctyl(meth)acrylate, n-nonyl(meth)acrylate, isononyl(meth)acrylate, n-decyl(meth)acrylate, isodecyl(meth)acrylate, n-dodecyl(meth)acrylate, n-tridecyl(meth)acrylate, n-tetradecyl(meth)acrylate, 2-hydroxyethyl(meth)acrylate, 2-hydroxypropyl(meth)acrylate, 4-hydroxybutyl(meth)acrylate, 6-hydroxypropyl(meth)acrylate, 8-hydroxypropyl(meth)acrylate, 9-hydroxypropyl(meth)acrylate, 10-hydroxypropyl(meth)acrylate, 11-hydroxypropyl(meth)acrylate, 12-hydroxypropyl(meth)acrylate, 13-hydroxypropyl(meth)acrylate, 14-hydroxypropyl(meth)acrylate, 15-hydroxypropyl(meth)acrylate, 16-hydroxypropyl(meth)acrylate, 17-hydroxypropyl(meth)acrylate, 18-hydroxypropyl(meth)acrylate, 19-hydroxypropyl(meth)acrylate, 20-hydroxypropyl(meth)acrylate, 21-hydroxypropyl(meth)acrylate, 22-hydroxypropyl(meth)acrylate, 23-hydroxypropyl(meth)acrylate, 24-hydroxypropyl(meth)acrylate, 25-hydroxypropyl(meth)acrylate, 26-hydroxypropyl(meth)acrylate, 27-hydroxypropyl(meth)acrylate, 28-hydroxypropyl(meth)acrylate, 29-hydroxypropyl(meth)acrylate, 30-hydroxypropyl(meth)acrylate, 31-hydroxypropyl(meth)acrylate, 32-hydroxypropyl(meth)acrylate, 33-hydroxypropyl(meth)acrylate, 34-hydroxypropyl(meth)acrylate, 35-hydroxypropyl(meth)acrylate, 36 Examples of suitable acrylates include, but are not limited to, cyclohexyl(meth)acrylate, 8-hydroxyoctyl(meth)acrylate, 10-hydroxydecyl(meth)acrylate, 12-hydroxylauryl(meth)acrylate, (4-hydroxymethylcyclohexyl)methylacrylate, N-methylol(meth)acrylamide, ethylene glycol di(meth)acrylate, diethylene glycol di(meth)acrylate, tetraethylene glycol di(meth)acrylate, neopentyl glycol di(meth)acrylate, 1,6-hexanediol di(meth)acrylate, trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, dipentaerythritol hexa(meth)acrylate, divinylbenzene, and N,N'-methylenebisacrylamide.

[0019] The phenoxy-based polymer is a polymer obtained by polymerizing monomers such as phenoxyethyl acrylate, phenoxydiethylene glycol acrylate, phenoxypolyethylene glycol acrylate, nonylphenoxypolyethylene glycol acrylate, nonylphenoxypolypropylene glycol acrylate, nonylphenoxyethylene glycol acrylate, and 2-hydroxy-3-phenoxypropyl (meth)acrylate. In one embodiment, the phenoxy-based polymer is poly(2,6-dilauryl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2-methyl-6-phenyl-1,4-phenylene) ether, poly(2,6-dibenzyl-1,4-phenylene) ether, poly(2,6-dimethyl-1,4-phenylene) ether, poly(2,6-diethyl-1,4-phenylene) ether, poly(2-methyl-6-ethyl-1,4-phenylene) ether, poly(2,6-dipropyl-1,4-phenylene) ether, poly(2,6-diphenyl ...phenyl-1,4-phenylene) ether, poly(2,6-dipropyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2,6-dipropyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, poly(2,6-diphenyl-1,4-phenylene) ether, -phenylene) ether, poly(2-ethyl-6-propyl-1,4-phenylene) ether, poly(2-methyl-1,4-phenylene) ether, poly(3-methyl-1,4-phenylene) ether, poly(2-methyl-6-allyl-1,4-phenylene) ether, poly(2,3,6-trimethyl-1,4-phenylene) ether, poly(2,3,5,6-tetramethyl-1,4-phenylene) ether, poly(2,5-dimethyl-1,4-phenylene) ether, and the like, but the present invention is not limited thereto.

[0020] In one embodiment, the content of the binder polymer TPR is about 10 parts by weight to 40 parts by weight per 100 parts by weight of chip adhesive film 10 . For example, the content of the thermosetting polymer TSR is about 10 parts by weight to 40 parts by weight, about 20 parts by weight to 40 parts by weight, or about 30 parts by weight to 100 parts by weight of the chip adhesive film 10 . The filler 13 is dispersed within the adhesive layer 11 . For example, the filler 13 is dispersed throughout the entire area of ​​the adhesive layer 11 . In FIG. 2, the filler 13 is illustrated as being circular.

[0021] Due to the presence of the filler 13, even when the chip adhesive film 10 is compressed by stacking semiconductor chips during the manufacture of a semiconductor package, the filler 13 supports the adhesive layer 11, so that the thickness 10H of the chip adhesive film 10 does not decrease excessively but can be maintained at a constant level. In addition, since the filler 13 is dispersed throughout the entire area of ​​the chip adhesive film 10, even when the semiconductor chips are stacked and the adhesive film 10 is pressed during the manufacture of a semiconductor package, the thickness 10H of the adhesive film 10 is maintained relatively uniform throughout the entire area of ​​the chip adhesive film 10 in which the filler 13 is dispersed. For example, when semiconductor chips are stacked and the adhesive film 10 is pressed during the manufacture of a semiconductor package, the total thickness variance of the chip adhesive film 10 over the entire area is about 0.1 μm or less.

[0022] The filler 13 has a spherical shape. In one embodiment, the filler 13 is a spherical monodisperse filler. For example, the filler 13 is a spherical, monodisperse filler having an average particle size 13H of about 1 μm. In one embodiment, the filler 13 comprises an organic material. In one embodiment, the filler 13 comprises an organic material having a glass transition temperature of about 120° C. or less. For example, the filler 13 includes an organic material having a glass transition temperature of about 80°C to 120°C or less. In one embodiment, the filler 13 is composed of a thermoplastic polymer. The thermoplastic polymer is, for example, at least one selected from the group consisting of polystyrene, polymethyl methacrylate, and polyurethane.

[0023] In one embodiment, the average particle size 13H of the filler 13 is about 0.8 times or more the thickness 10H of the chip adhesive film 10 and is less than about 1 time the thickness 10H of the chip adhesive film 10. For example, the average particle size 13H of the filler 13 is about 0.9 times the thickness 10H of the chip adhesive film 10. If average particle size 13H of filler 13 is excessively large, there will be limitations on how thin chip adhesive film 10 can be made. On the other hand, if the average particle size 13H of the filler 13 is too small, when the semiconductor chips are stacked and the chip adhesive film 10 is pressed during the manufacture of the semiconductor package, the filler 13 cannot support the adhesive layer 11, and the thickness of the adhesive film 10 is excessively reduced.

[0024] In one embodiment, the content of filler 13 is about 0.01 parts by weight to 2 parts by weight with respect to 100 parts by weight of chip adhesive film 10 . For example, the content of filler 13 is about 0.01 to 2 parts by weight, about 0.1 to 2 parts by weight, about 0.5 to 2 parts by weight, or about 1 to 2 parts by weight per 100 parts by weight of chip adhesive film 10. If the content of the filler 13 is too high, the content of the adhesive layer 11 will be relatively low, the mechanical properties of the chip adhesive film 10 will decrease, and the thermal expansion coefficient of the chip adhesive film 10 will increase. Furthermore, if the content of the filler 13 exceeds 2 parts by weight, it is difficult to make the chip adhesive film 10 thinner.

[0025] In one embodiment, chip attach film 10 further includes a cross-linking agent. The curing agent can accelerate the curing of the adhesive layer 11 or switch the curing reaction in the adhesive layer 11 to room temperature. Examples of the hardener include acid anhydride hardeners such as tetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, hexahydrophthalic anhydride, trialkyltetrahydrophthalic anhydride, methylcyclohexene dicarboxylic anhydride, phthalic anhydride, maleic anhydride, and pyromellitic anhydride; aromatic amine hardeners such as metaphenylenediamine, diaminophenylmethane, and diaminophenylsulfone; aliphatic amine hardeners such as diethylenetriamine and triethylenetetraamine; phenol aralkyl type phenolic resins, phenol novolac type phenolic resins, xyloc type phenolic resins, cresol novolac type phenolic resins, naphthol type phenolic resins, terpene type phenolic resins, polyfunctional phenolic resins, dicyclopentadiene type phenolic resins, naphthalene type phenolic resins, and novolac type phenolic resins synthesized from bisphenol A and resol; and latent hardeners such as dicyandiamide, but are not limited thereto. They may be used alone or in combination of two or more.

[0026] In one embodiment, chip attach film 10 further comprises a rate modifier. Rate moderators include, for example, 1-methylimidazole, 2-methylimidazole, dimethylbenzylimidazole, 1-decyl-2-methylimidazole, benzyldimethylamine, trimethylamine, triethylamine, diethylamino-propylamine, pyridine, 1,8-diazabicyclo[5.4.0]undec-7-ene, 2-heptadecylimidazole, boron trifluoride monoethylamine, and 1-[3(2-hydroxyphenyl)prop-2-enyl]imidazole. However, the present invention is not limited thereto.

[0027] A chip adhesive film 10 according to an embodiment of the present invention includes an adhesive layer 11 and a filler 13 dispersed within the adhesive layer 11, and the average particle size 13H of the filler 13 is greater than or equal to about 0.8 times the thickness 10H of the chip adhesive film 10 and less than about 1 time the thickness 10H of the chip adhesive film 10. As a result, even when semiconductor chips are stacked and the chip adhesive film 10 is compressed during the manufacture of a semiconductor package, the filler 13 supports the adhesive layer 11, so that the thickness of the chip adhesive film 10 does not decrease excessively but remains at a constant level. In addition, since the filler 13 is dispersed over the entire area of ​​the chip adhesive film 10, the thickness of the chip adhesive film 10 is maintained relatively uniform over the entire area. Also, the chip adhesive film 10 contains a relatively small amount of filler (eg, about 0.01 to 2 parts by weight per 100 parts by weight of the chip adhesive film 10), and is therefore formed to have a relatively thin thickness.

[0028] FIG. 3 is a cross-sectional view showing a schematic configuration of a semiconductor package 100 according to an embodiment of the present invention, and FIG. 4 is an enlarged cross-sectional view of a portion EX1 in FIG. 3 and 4, the semiconductor package 100 includes a substrate 110, a first semiconductor chip 120, a chip stack CS, and a molding layer 160.

[0029] The substrate 110 may be a printed circuit board (PCB), a flexible substrate, a tape substrate, or the like. The substrate 110 may be made of at least one material selected from the group consisting of phenolic resin, epoxy resin, and polyimide. For example, the substrate 110 may include FR4, tetrafunctional epoxy, polyphenylene ether, epoxy / polyphenylene oxide, bismaleimidetriazine (BT), thermomount, cyanate ester, polyimide, or liquid crystal polymer.

[0030] The substrate 110 includes a plurality of lower pads 111 and a plurality of upper pads 113 . A plurality of lower pads 111 are provided on a lower surface of the substrate 110 and a plurality of upper pads 113 are provided on an upper surface of the substrate 110 . The lower pads 111 and the upper pads 113 are electrically connected to each other through a conductive pattern (not shown) provided inside the substrate 110 . The plurality of lower pads 111, the plurality of upper pads 113, and the conductive pattern each comprise a metal such as aluminum, copper, tungsten, and / or titanium. A plurality of external connection terminals 171 are arranged on the lower surface of each of the plurality of lower pads 111 . The external connection terminals 171 are connected to the lower pads 111, respectively. The external connection terminals 171 are, for example, solder balls. The external connection terminals 171 include a solder material such as, for example, tin (Sn), silver (Ag), zinc (Zn), and / or an alloy thereof.

[0031] The first semiconductor chip 120 is disposed on the top surface of the substrate 110 . The first semiconductor chip 120 is disposed on the upper surface of the substrate 110 in a relatively central region. The first semiconductor chip 120 includes a first semiconductor substrate 121 . The first semiconductor substrate 121 may include a semiconductor material such as silicon (Si) or germanium (Ge), or a compound semiconductor material such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), and indium phosphide (InP). The first semiconductor substrate 121 includes a conductive region, for example a well doped with impurities. The first semiconductor substrate 121 has various isolation structures such as a shallow trench isolation (STI) structure.

[0032] The first semiconductor substrate 121 includes a first active surface and a first non-active surface opposite the first active surface. The first active surface includes a plurality of individual devices of various types. The plurality of individual elements include various micro electronic devices, for example, metal-oxide-semiconductor field effect transistors (MOSFETs) such as complementary metal-oxide semiconductor transistors (CMOS transistors), system large scale integration (LSIs), image sensors such as CMOS imaging sensors (CISs), micro-electro-mechanical systems (MEMSs), active elements, passive elements, and logic elements such as central processing units (CPUs), micro-processor units (MPUs), graphic processing units (GPUs), application processors (APs), microcontrollers, and application-specific integrated chips (ASICs).

[0033] First connection terminals 123 are disposed on the lower surface of first semiconductor chip 120. The first connection terminal 123 electrically connects the first semiconductor chip 120 and the substrate 110 . The first connection terminals 123 are, for example, solder balls or solder bumps. The first connection terminal 123 includes a solder material such as, for example, tin (Sn), silver (Ag), zinc (Zn), and / or alloys thereof. Underfill layer 125 fills the area between the bottom surface of first semiconductor chip 120 and the top surface of substrate 110 . The underfill layer 125 surrounds the first connection terminals 123 provided on the lower surface of the first semiconductor chip 120 . The underfill layer 125 is, for example, but not limited to, an insulating material layer.

[0034] The chip stack CS is disposed on the top surface of the substrate 110 . The chip stack CS is spaced apart from the first semiconductor chip 120 in the horizontal direction on the substrate 110 . For example, the chip stack CS is disposed on the substrate 110 in an edge region thereof, horizontally spaced apart from the first semiconductor chip 120 . The chip stack CS includes a plurality of second semiconductor chips 130 stacked vertically on the substrate 110 . A plurality of second semiconductor chips 130 included in the chip stack CS are stacked in a staircase or cascade structure along the horizontal direction.

[0035] In one embodiment, unlike the illustration of FIG. 3, the chip stack CS is disposed on the first semiconductor chip 120 . In this case, the multiple second semiconductor chips 130 of the chip stack CS are stacked vertically on the first semiconductor chip 120, and the second semiconductor chip 130 located at the bottom among the multiple second semiconductor chips 130 and the first semiconductor chip 120 are adhered and fixed to each other by a chip adhesive film 140 formed on the inactive surface 131S of the second semiconductor chip 130 located at the bottom. Each of the multiple second semiconductor chips 130 includes a second semiconductor substrate 131 . The second semiconductor substrate 131 is made of substantially the same material as the first semiconductor substrate 121 of the first semiconductor chip 120 . The second semiconductor substrate 131 includes a conductive region, for example a well doped with impurities. The second semiconductor substrate 131 has various isolation structures such as a shallow trench isolation (STI) structure.

[0036] The second semiconductor substrate 131 includes a second active surface 131F and a non-active surface 131S facing the second active surface 131F. A variety of individual devices are formed on the second active surface 131F of the second semiconductor substrate 131. A chip pad 133 is provided on a second active surface 131F of the second semiconductor substrate 131. Chip pad 133 is disposed adjacent to one of both side surfaces of second semiconductor substrate 131 that is relatively far from first semiconductor chip 120 in a plan view. Chip pads 133 include a metal such as, for example, aluminum, copper, and / or titanium.

[0037] A chip adhesive film 140 is provided on the inactive surface 131S of each of the second semiconductor chips 130. The chip adhesive film 140 adheres and fixes the chip stack CS to the substrate 110 and each of the second semiconductor chips 130 included in the chip stack CS. Since the second semiconductor chips 130 are stacked in a staircase or cascade structure along the horizontal direction, the chip adhesive film 140 may not cover the chip pads 133 of each of the second semiconductor chips 130 . The chip adhesive film 140 extends laterally from the side surface of each of the second semiconductor chips 130 and protrudes laterally. The chip adhesive film 140 includes an adhesive layer 141 and a filler 143 . The adhesive layer 141 and the filler 143 of the chip adhesive film 140 are substantially the same as the adhesive layer 11 and the filler 13 of the adhesive film 10 described with reference to FIGS. 1 and 2, respectively.

[0038] The first semiconductor chip 120 and the second semiconductor chip 130 are memory chips or logic chips. For example, the first semiconductor chip 120 is a logic chip, and the second semiconductor chip 130 is a memory chip. The memory chip may be, for example, a volatile memory chip such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), or a non-volatile memory chip such as a phase-change random access memory (PRAM), a magnetoresistive random access memory (MRAM), a ferroelectric random access memory (FeRAM), or a resistive random access memory (RRAM). Moreover, the logic chip may be, for example, a microprocessor, an analog element, or a digital signal processor.

[0039] In one embodiment, first semiconductor chip 120 and second semiconductor chip 130 are the same type of semiconductor chip. For example, the first semiconductor chip 120 and the second semiconductor chip 130 are memory chips. In one embodiment, first semiconductor chip 120 and second semiconductor chip 130 are also dissimilar semiconductor chips. For example, the first semiconductor chip 120 is a logic chip, and the second semiconductor chip 130 is a memory chip. A bonding wire 150 is provided to each of the chip pads 133 of the second semiconductor chips 130 .

[0040] The bonding wires 150 connect the chip pads 133 of the second semiconductor chip 130 to the upper pads 113 of the substrate 110, or connect the chip pads 133 of the second semiconductor chips 130 to each other. As a result, the plurality of second semiconductor chips 130 and the substrate 110 or each of the plurality of second semiconductor chips 130 are electrically connected to each other through the bonding wires 150. The bonding wire 150 includes a metal such as, for example, gold (Au) or a gold alloy. A molding layer 160 is disposed over the substrate 110 . The molding layer 160 covers the first semiconductor chip 120 , the plurality of second semiconductor chips 130 , and the bonding wires 150 . The molding layer 160 includes, for example, an epoxy molding compound (EMC).

[0041] The semiconductor package 100 according to an embodiment of the present invention includes a chip stack CS including a plurality of second semiconductor chips 130, and a chip adhesive film 140 including an adhesive layer 141 and a filler 143 dispersed within the adhesive layer 141 is provided between each of the plurality of second semiconductor chips 130. In this case, the average particle size of the filler 143 is about 0.8 times or more the thickness of the chip adhesive film 140 and is less than about 1 time the thickness of the chip adhesive film 140 .

[0042] As a result, even when the second semiconductor chip 130 is stacked and the chip adhesive film 140 is pressed during the manufacture of the semiconductor package 100, the filler 143 supports the adhesive layer 141 so that the thickness of the chip adhesive film 140 is not excessively reduced but maintained at a constant level, and the thickness of the chip adhesive film 140 is maintained relatively uniform over the entire area of ​​the chip adhesive film 140 in which the filler 143 is dispersed. This allows the multiple second semiconductor chips 130 to be stacked without being tilted, improving the structural reliability of the semiconductor package 100. Furthermore, the chip adhesive film 140 has a relatively small content of the filler 143 (for example, about 0.01 to 2 parts by weight per 100 parts by weight of the chip adhesive film 140), and thus has a relatively thin thickness. This reduces the size of the semiconductor package 100 in which the plurality of second semiconductor chips 130 are adhered and fixed using the chip adhesive film 140.

[0043] 5 to 9 are cross-sectional views illustrating a method for manufacturing the semiconductor package 100 according to the embodiment of the present invention. Specifically, Figures 5, 6A, 7A, 8, and 9 are cross-sectional views for explaining each stage of the manufacturing method of the semiconductor package 100, and Figures 6B and 7B are enlarged cross-sectional views of the EX1 region of Figures 6A and 6B, respectively.

[0044] Referring to FIG. 5, first, a first semiconductor chip 120 is mounted on a substrate 110 . First, first semiconductor chip 120 having first connection terminals 123 formed on the lower surface thereof is mounted on the central region of substrate 110 . The space between the bottom surface of first semiconductor chip 120 and the top surface of substrate 110 is then filled with an underfill layer 125 .

[0045] Next, referring to Figures 6A, 6B, 7A, and 7B, a plurality of second semiconductor chips 130 are vertically stacked on the substrate 110 to form a chip stack CS horizontally separated from the first semiconductor chip 120. Specifically, first, a chip adhesive film 140 is formed on one surface of a wafer including a plurality of second semiconductor chips 130 . One surface of the wafer is a ground surface, which corresponds to the non-active surface 131S of each of the plurality of second semiconductor chips 130. The chip adhesive film 140 is formed by mixing the thermosetting polymer TSR (see FIG. 2) and binder polymer TPR (see FIG. 2) that constitute the adhesive layer 141 with a filler 143, etc. to form an adhesive composition, and laminating the adhesive composition on one side of the wafer.

[0046] Then, the wafer having the chip adhesive film 140 formed on one surface thereof is singulated to provide a plurality of second semiconductor chips 130 having the chip adhesive film 140 formed on the non-active surface 131S. The chip adhesive film 140 formed on the inactive surface 131S of the second semiconductor chip 130 has a first thickness H1 in the vertical direction as illustrated in FIG. 6B, does not extend laterally from the side of the second semiconductor chip 130, and has the same horizontal area as the second semiconductor chip 130. Next, the second semiconductor chips 130 having the chip adhesive films 140 formed on the non-active surfaces 131S are stacked vertically to form a chip stack CS. Specifically, first, a second semiconductor chip 130 is disposed on an edge region of the substrate 110 spaced apart from the first semiconductor chip 120 in the horizontal direction. Then, a thermocompression process is performed to bond and fix the second semiconductor chip 130 and the substrate 110 via the chip adhesive film 140 .

[0047] Next, another second semiconductor chip 130 is placed on one of the second semiconductor chips 130 placed on the edge region of the substrate 110 . In this case, the other second semiconductor chips 130 are arranged on one second semiconductor chip 130 so as to form a stepped or cascade structure with the one second semiconductor chip 130 along the horizontal direction. Then, a thermocompression process is performed to bond and fix one second semiconductor chip 130 to another second semiconductor chip 130 through the chip adhesive film 140 . Thereafter, the above-mentioned stacking process is repeatedly performed to form a chip stack CS including a plurality of second semiconductor chips 130.

[0048] In one embodiment, the thermocompression process is performed at a temperature equal to or higher than the glass transition temperature of the filler 143 contained in the chip attach film 140 . For example, the glass transition temperature of the organic material contained in the filler 143 is about 120° C., and the thermocompression process is performed at a temperature of about 120° C. or higher. Meanwhile, in the process of stacking the second semiconductor chips 130, the chip adhesive film 140 is pressure-bonded by carrying out a thermocompression bonding process. As a result, the chip adhesive film 140 in the chip stack CS extends laterally and protrudes from the side surface of the second semiconductor chip 130, as illustrated in FIG. 7B. Furthermore, the chip adhesive film 140 has a second thickness H3 that is thinner than the first thickness H1 illustrated in FIG. 6B due to compression.

[0049] For example, the second thickness H3 illustrated in FIG. 7B has a value that is approximately 10% to 20% smaller than the first thickness H1 illustrated in FIG. 6B. For example, the second thickness H3 illustrated in FIG. 7B is about 0.5 μm to 3 μm. In this case, the second thickness H3 is thicker than the average particle diameter H2 of the filler 143 or is substantially the same as the average particle diameter H2 of the filler 143. This is because the filler 143 supports the adhesive layer 141 and the thickness of the chip adhesive film 140 is maintained at or above the average particle size H2 of the filler 143 even when the chip adhesive film 140 is compressed by a thermocompression bonding process. Therefore, the thickness of the chip adhesive film 140 does not decrease excessively despite the thermocompression process, and the thickness is maintained at a constant level.

[0050] Next, referring to FIG. 8, bonding wires 150 are formed on the chip pads 133 of the second semiconductor chips 130 and the upper pads 113 of the substrate 110 . The bonding wires 150 are formed using, for example but not limited to, thermocompression or ultrasonic bonding. Next, referring to FIG. 9, a molding layer 160 covering the first semiconductor chip 120, the plurality of second semiconductor chips 130, and the bonding wires 150 is formed. 9, external connection terminals 171 are formed on the lower pads 111 of the substrate 110, thereby completing the semiconductor package 100 illustrated in FIG.

[0051] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the technical scope of the present invention. [Explanation of symbols]

[0052] 10 Chip adhesive film 10H Chip Adhesive Film Thickness 11, 141 Adhesive layer 13, 143 Filler 13H Average particle size of filler 100 Semiconductor Packages 110 Substrate 111 Multiple Lower Pads 113 Multiple Top Pads 120 First semiconductor chip 121 First semiconductor substrate 123 First connection terminal 125 Underfill layer 130 Second semiconductor chip 131 Second semiconductor substrate 133 Chip Pad 140 Chip adhesive film 150 Bonding Wire 160 Molding Layer 171 External connection terminal

Claims

1. A chip attachment film comprising: An adhesive layer; A filler dispersed in the adhesive layer, the filler comprising an organic material; The thickness of the chip adhesive film is 0.5 μm to 3 μm; A chip adhesive film, characterized in that the average particle size of the filler is 0.8 times or more and less than 1 time the thickness of the chip adhesive film.

2. 2. The chip adhesive film of claim 1, wherein the content of the filler is 0.01 to 2 parts by weight based on 100 parts by weight of the adhesive film.

3. 2. The chip adhesive film of claim 1, wherein the filler is a spherical monodisperse filler.

4. The chip adhesive film of claim 1 , wherein the filler is made of a thermoplastic polymer.

5. 5. The chip adhesive film of claim 4, wherein the thermoplastic polymer comprises at least one selected from the group consisting of polystyrene, polyurethane, and polymethyl methacrylate.

6. The chip adhesive film of claim 1 , wherein the adhesive layer comprises a binder polymer and a thermosetting polymer.

7. 7. The chip adhesive film of claim 6, wherein the content of the binder polymer is 10 parts by weight to 40 parts by weight based on 100 parts by weight of the adhesive film.

8. 7. The chip adhesive film of claim 6, wherein the content of the thermosetting polymer is 20 to 60 parts by weight based on 100 parts by weight of the adhesive film.

9. A substrate; a first semiconductor chip disposed on the substrate; a chip stack including a plurality of second semiconductor chips vertically stacked on the substrate and horizontally spaced apart from the first semiconductor chips; and bonding wires connected to the chip stack and the substrate; The chip stack further includes a chip adhesive film provided between the stacked second semiconductor chips; The chip adhesive film is An adhesive layer; a filler dispersed within the adhesive layer, the filler comprising an organic material; The thickness of the chip adhesive film is 0.5 μm to 3 μm; A semiconductor package, characterized in that the average particle size of the filler is 0.8 times or more and less than 1 time the thickness of the chip adhesive film.

10. 10. The semiconductor package of claim 9, wherein the content of the filler is 0.01 to 2 parts by weight based on 100 parts by weight of the adhesive film.

11. 10. The semiconductor package according to claim 9, wherein the filler is a spherical monodisperse filler.

12. The filler is made of a thermoplastic polymer; 10. The semiconductor package of claim 9, wherein the thermoplastic polymer comprises at least one selected from the group consisting of polystyrene, polyurethane, and polymethyl methacrylate.

13. 10. The semiconductor package according to claim 9, wherein the organic material contained in the filler has a glass transition temperature of 120[deg.] C. or less.

14. the adhesive layer includes a binder polymer and a thermosetting polymer; The content of the binder polymer is 10 parts by weight to 40 parts by weight based on 100 parts by weight of the adhesive film, 10. The semiconductor package of claim 9, wherein the content of the thermosetting polymer is 20 to 60 parts by weight based on 100 parts by weight of the adhesive film.

15. the binder polymer comprises a thermoplastic polymer; The semiconductor package of claim 14 , wherein the thermoplastic polymer comprises at least one selected from the group consisting of an acrylic polymer and a phenoxy polymer.

16. The semiconductor package of claim 14 , wherein the thermosetting polymer comprises an epoxy-based polymer.

17. Mounting a first semiconductor chip on a substrate; forming a chip stack on the substrate, the chip stack being horizontally spaced apart from the first semiconductor chip; forming bond wires connected to the chip stack and the substrate; forming a molding layer covering the first semiconductor chip, the chip stack, and the bonding wires; The step of forming the chip stack comprises: providing a plurality of second semiconductor chips having a chip adhesive film formed on one surface thereof; stacking the plurality of second semiconductor chips vertically; The chip adhesive film is An adhesive layer; a filler dispersed within the adhesive layer, the filler comprising an organic material; The thickness of the chip adhesive film is 0.5 μm to 3 μm; A method for manufacturing a semiconductor package, wherein an average particle size of the filler is 0.8 times or more the thickness of the chip adhesive film and is less than approximately 1 time the thickness of the chip adhesive film.

18. The step of vertically stacking the second semiconductor chips includes performing a thermocompression process; 18. The method of claim 17, wherein the thermocompression process is performed at a temperature equal to or higher than the glass transition temperature of the filler.

19. 18. The method of claim 17, wherein the content of the filler is 0.01 to 2 parts by weight based on 100 parts by weight of the adhesive film.

20. 20. The method of claim 17, wherein the filler is a spherical monodisperse filler.

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