Integrated antenna array and beamformer IC chip that perform interstage amplification

By integrating RFIC and multi-stage amplifiers in the antenna array, the problem of difficult to balance between low cost and high efficiency in the prior art is solved, and an efficient and reliable antenna array design is achieved.

JP2025072628APending Publication Date: 2025-05-09VIASAT INC
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Patent Information

Application Number
JP2025021841
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2020-06-11
Filing Date
2025-02-13
Publication Date
2025-05-09

AI Technical Summary

Technical Problem

Existing antenna arrays and phased circuits are difficult to balance between low cost and high efficiency, especially in UAV, microwave and millimeter wave frequency applications.

Method used

Embedded antenna array design, in which antenna elements are integrated into a compact structure with RFICs (radio frequency integrated circuits), the RFIC includes multi-stage amplifiers and low-noise amplifiers distributed in adjacent parallel assembly layers of the antenna effective aperture for efficient transmission and reception.

Benefits of technology

A balance between low cost and high efficiency is achieved, the reliability and performance of antenna arrays are improved, and the high performance phase control function can be provided in miniaturized devices.

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Abstract

To provide an antenna array integrated with a distribution type beamformer integrated circuit (IC) chip.SOLUTION: In an antenna device 10, a first configuration layer has a plurality of antenna elements 22_1 to 22_16 forming an antenna array. A second configuration layer includes: a plurality of RFICs 32 each of which includes an active beam forming circuit for adjusting signals with which each RFIC of a plurality of RFICs connected to the antenna elements communicate with one or more of the antenna elements, and a part of a first stage 40a of a beam forming network (BFN) 50; and additional and further stages 40c to 40e of BFN, each of which is disposed outside the RFIC. At least some of the RFICs include a level 2 amplifier (intermediate amplifier) 37 connected between the additional and further stages of the BFN.SELECTED DRAWING: Figure 3
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Description

[Technical field]

[0001] (Related Applications) This patent application claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 038,091, filed June 11, 2020, entitled “Integrated Antenna Array and Beamformer IC Chips with Inter-Stage Amplification,” the entirety of which is incorporated herein by reference.

[0002] FIELD OF THEINVENTION The present disclosure relates generally to antenna arrays integrated with distributed beamformer integrated circuit (IC) chips. [Background technology]

[0003] Antenna arrays are currently used in a variety of applications at microwave and millimeter wave frequencies, such as in aircraft, satellites, vehicles, and base stations for general land communications. Such antenna arrays typically include microstrip radiating elements driven with phase-shifting beamforming circuits to form a phased array for steering the beam. It is desirable for the entire antenna system, including the antenna array and beamforming circuits, to occupy minimal space with a low profile while meeting required performance metrics. In commercial environments, low-cost designs are desirable for antenna arrays / phased arrays. Low-cost phased arrays are highly sought after in markets such as unmanned aerial vehicles (UAVs), small manned aircraft, such as regional and business aircraft, autonomous vehicles, and marine vessels.

[0004] An embedded antenna array can be defined as an antenna array composed of antenna elements integrated with a radio frequency (RF) integrated circuit chip (RFIC) (sometimes called a "beamformer IC" (BFIC)) in a compact structure. The embedded array can have a sandwich-type configuration with the antenna elements located in an externally facing construction layer and the RFIC (radio frequency integrated circuit chip) distributed across the effective antenna aperture in an adjacent parallel construction layer behind the antenna element layer. The RFIC can include RF power amplifiers (PA) for transmission and / or low noise amplifiers (LNA) for reception and / or phase shifters for steering the beam. By distributing the PA (power amplifier) / LNA (low noise amplifier) ​​in this way, higher efficiency in transmission and / or improved noise performance in reception can be achieved. The reliability of the antenna array can also be improved because even if a small number of amplifiers malfunction, the overall antenna performance is still acceptable. The RFIC typically includes other beamforming circuitry such as filters, impedance matching elements, RF couplers, transmit / receive (T / R) switches and control lines. Summary of the Invention

[0005] In one aspect of the disclosure, an antenna apparatus includes a first configuration layer having a plurality of antenna elements forming an antenna array. A second configuration layer includes (i) a plurality of RFICs connected to the antenna elements, each RFIC including active beam forming circuitry for conditioning signals communicated to one or more of the antenna elements and a portion of a first stage of a beam forming network (BFN), and (ii) additional and further stages of the BFN, each disposed external to the RFIC. At least some of the RFICs include intermediate amplifiers connected between the additional and further stages of the BFN. [Brief description of the drawings]

[0006] The above and other aspects and features of the disclosed technology will become more apparent from the following detailed description in conjunction with the accompanying drawings in which like reference numbers indicate like elements or features. Various elements of the same or similar type may be distinguished by appending an underscore / dash to the reference label and a second label that distinguishes between the same / similar elements (e.g., _1, _2), or by appending the second label directly to the reference label. However, if a given description uses only the first reference label, it is applicable to any one of the same / similar elements having the same first reference label, regardless of the second label. Elements and features may not be drawn to scale in the drawings. [Figure 1] FIG. 2 is an exploded perspective view of an exemplary antenna apparatus, according to one embodiment. [Diagram 2] 2 is a plan view showing an example of the layout of component layers in the antenna device of FIG. 1. [Diagram 3] 3 is a schematic diagram of an exemplary beam forming circuit in the antenna device corresponding to the configuration of FIG. 2; [Figure 4] 1 is a cross-sectional view of a portion of an antenna device illustrating an exemplary connection structure between constituent layers. [Diagram 5] 1. FIG. 4 is a plan view showing another example of the layout of component layers in the antenna device of FIG. [Figure 6] FIG. 2 is an exploded perspective view of another exemplary antenna apparatus, according to one embodiment. [Figure 7A] 7 is a cross-sectional view showing a configuration example of a portion of the antenna device of FIG. 6. [Figure 7B] FIG. 7B is a cross-sectional view taken along line 7B-7B in FIG. 7A. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] The following description is provided for illustrative purposes with reference to the accompanying drawings to assist in the comprehensive understanding of certain exemplary embodiments of the technology disclosed herein. Although the present specification includes various specific details to assist those skilled in the art in understanding the technology, these details should be considered as merely exemplary. For the sake of brevity and clarity, the description of well-known functions and structures may be omitted if it may make it unclear for those skilled in the art to understand the technology.

[0008] FIG. 1 is an exploded perspective view of an exemplary antenna device according to one embodiment. The antenna device 10 ("antenna 10") includes first and second configuration layers 20, 30 arranged in a laminated structure. The first configuration layer 20 is an antenna configuration layer including a plurality of antenna elements 22_1-22_N forming a planar antenna array 24. The antenna elements 22 may be microwave or millimeter wave patch antenna elements formed on the upper surface of a plate-shaped antenna substrate 25. The second configuration layer 30 is a beamforming configuration layer that may include a plurality of RFICs 32_1-32_M arranged and distributed coplanarly across the effective aperture of the antenna array 24, with each RFIC 32 connected to at least one antenna element 22. In the embodiment described below, each RFIC 32 is connected to a plurality of antenna elements 22. Note that any RFIC 32 may be interchangeably referred to as a "beamformer IC" (BFIC) since it includes a beamforming circuit therein.

[0009] Each RFIC 32 may include active beamforming circuitry, e.g., amplifiers and / or phase shifters, used to condition one or more signals communicated with its respective antenna element 22. Each RFIC 32 may further include a first portion of a beamforming network (BFN). The BFN has multiple combining / splitting stages, the first portion of the BFN being at least one of the combining / splitting stages (hereinafter simply the "stages" of the BFN). The second portion of the BFN may be disposed on a printed circuit board (PCB) (dielectric substrate), such as PCB sections 34_1, 34_2, and may include the remaining stages of the BFN. Thus, the first and second portions of the BFN provided on-chip and off-chip, respectively, form a hybrid beamformer. The hybrid beamformer may provide higher performance and lower cost compared to implementing the entire BFN on only ICs or only PCBs. The hybrid beamformer may enable flexibility and lower development costs by enabling the use of common RFICs in conjunction with PCB circuitry. Additionally, the hybrid beamformer avoids the mechanical challenges and problems that may be associated with implementing the entire beamformer solely on a PCB or solely on an RFIC.

[0010] In connection with the hybrid approach, an intermediate amplifier is included within the RFIC 32 to provide inter-stage amplification between the different PCB stages of the BFN. (As used herein, any "amplifier," such as an intermediate amplifier or an RF front-end amplifier, may be configured as a single stage amplifier or a multi-stage amplifier. Thus, an individual RFIC 32 may include both a "Level 1" amplifier for amplifying element signals routed directly to the antenna elements, and a "Level 2" amplifier (an intermediate amplifier) ​​for amplifying signals between the PCB stages. Yet another RFIC 32 may include a "Level 3" amplifier for amplifying signals further downstream (from / to a different PCB stage) of the BFN. The use of RFICs 32 to provide multiple inter-stage amplification may reduce the total number of RFICs 32 required for the antenna 10, thereby reducing manufacturing costs and complexity. This may also result in a more compact beamformer compared to using dedicated RFICs for each Level 1 and Level 2 amplification function, since the dedicated RFICs are placed according to minimum spacing requirements.

[0011] In the antenna 10, the RFICs 32_1-32_M collectively include combiners / dividers that together form at least one stage of a BFN. The BFN is a combiner / divider network that splits an input RF transmit signal into N split "element signals" for transmission by the antenna array 24 and / or combines the N receive path element signals received by the N antenna elements 22_1-22_n into a final composite receive signal. The receive paths and associated components / signals are described below as an example, but embodiments including alternative or additional transmit path capabilities may function similarly. Each "stage" of the BFN includes at least one combiner that combines K input signals of K first receive paths, respectively, into K / Q (Q≧2) combined output signals of K / Q second receive paths, respectively. In the example BFN "stages" described below, Q=2 for ease of understanding, but "Q" can be considered to be variable throughout the BFN. For example, some portions of the BFN may have 2:1 combiners as "stages," while other portions of the BFN may have 4:1 combiners as another stage, and so on. Each stage of the BFN also includes a transmission line that is the receive path itself, connecting the combiners of adjacent stages. Here, the first stage of the BFN comprises the set of combiners / dividers closest to the antenna elements, and the front-end active beamforming circuitry of the RFIC 32 is located between the combiners / dividers of the first stage and the antenna elements. It should be noted that in some embodiments, additional combiners / dividers may be included between the front-end beamforming circuitry and the antenna elements 22, e.g., on another layer of the antenna substrate 25. However, such additional combiners / dividers are not considered to form part of any stage of the BFN described herein.

[0012] The second construction layer 30 includes a second portion of the BFN disposed outside the RFICs 32, the second portion may include at least an additional stage and a further stage of the BFN. (Note that labels such as "additional" and "further" may be used herein to distinguish other numerical labels. For example, if the RFICs 32 collectively include the first and second stages of the BFN as a first portion of the BFN, and the second portion of the BFN includes a third, fourth, and fifth stage, any of the third, fourth, or fifth stages may be considered an additional or further stage of the BFN.) At least some of the RFICs 32 include intermediate amplifiers connected between the additional and further stages of the BFN. The placement of the intermediate amplifiers provides great design flexibility for other amplifiers and circuit components of the antenna device 10. In the embodiment shown in FIG. 1, the second portion of the BFN is disposed on a PCB 34 collectively formed by at least one PCB section 34_i (e.g., PCB sections 34_1 and 34_2) located flush between the RFICs 32. In this case, the RFICs 32 and the PCB 34 may each be attached to a bottom surface 27 of the construction layer 20, and signal lines in the RFICs 32 may be wire bonded to signal lines printed on the PCB 34. A large portion of the bottom surface 27 may be plated with a metal layer to form a ground plane for reflecting signal energy radiated to / from the antenna elements 22. Openings may be formed in the ground plane to allow electrical connections between the signal connection points of the RFICs 32 and through substrate vias (TSVs, hereafter simply "vias") in the antenna substrate 25 that form the antenna feed for the antenna elements 22.

[0013] In another embodiment described below (see Figures 6, 7A and 7B), the PCB sections 34_i between the RFICs 32 are omitted and a multi-layer PCB coextensive with the first construction layer 20 is provided between the antenna element 22 and the RFIC 32 (the antenna substrate 25 may form one layer of the multi-layer PCB). In this case, the RFIC 32 may be attached to the multi-layer PCB and a second portion of the BFN is formed within the multi-layer PCB.

[0014] In embodiments in which the RFICs 32 include dynamically controlled phase shifters, the antenna 10 can operate as a phased array for transmit and / or receive operations. In phased array embodiments, the beams formed by the antenna 10 are steered to a desired beam pointing angle set primarily according to the phase shift of the phase shifters. (Additional amplitude adjustments may also be included in the RFICs 32 to adjust the beam pointing angle.) When RF front-end amplifiers and / or phase shifters are distributed across the effective aperture of the antenna array 24, the antenna 10 may be referred to as an active antenna array. In some embodiments, the antenna 10 operates as both a transmit antenna system and a receive antenna system, with each RFIC 32 including receive circuitry with at least one low noise amplifier (LNA) for amplifying receive signals and at least one power amplifier (PA) for amplifying transmit signals. In this case, each RFIC may include appropriate transmit / receive (T / R) switching / filtering circuitry to enable bidirectional signal flow over a shared resource. The antenna 10 may alternatively be configured to operate only as a receive antenna system or only as a transmit antenna system, in which case each RFIC 32 includes an LNA but no PA, or vice versa.

[0015] The antenna elements 22 may each be a microstrip patch antenna element printed on the antenna substrate 25 and electrically or electromagnetically coupled ("fed") to the RFIC 32 at a respective feed point. Other types of antenna elements, such as dipoles or monopoles, may be substituted. The RFIC 32 may be mechanically connected to the antenna substrate 25, such as by solder bump connections to ground planes and other connection pads located on the antenna substrate 25.

[0016] In one embodiment, the antenna array device 10 is configured for operation over the millimeter (mm) wave frequency band, commonly defined as the band ranging from 30 GHz to 300 GHz. In other examples, the antenna device 10 operates in the microwave range of approximately 1 GHz to 30 GHz, or in the sub-microwave range below 1 GHz. As used herein, radio frequency (RF) signals refer to signals having frequencies between 1 GHz and below 300 GHz. It should be noted that RFICs configured to operate at microwave or mm-wave frequencies are often referred to as monolithic microwave integrated circuits (MMICs) and are typically fabricated from III-V semiconductor materials.

[0017] When realized as microstrip patches, the antenna elements 22 may have any suitable shape, such as square, rectangular, circular, elliptical, or variations thereof, and may be provided and configured in a manner sufficient to achieve a desired polarization, e.g., circular, linear, or elliptical. The number of antenna elements 22, their type, size, shape, inter-element spacing, and the manner in which they are provided may be varied by design to achieve targeted performance metrics. An example of an antenna arrangement 10 is described below with 64 or 60 antenna elements 22, but in typical embodiments, the antenna arrangement 10 includes hundreds or thousands of antenna elements 22. In the embodiments described below, each antenna element 22 is a microstrip patch that is fed by a probe feed. The probe feed may be implemented as a via that electrically connects to an input / output (I / O) pad of the RFIC 32. The I / O pad is an interface that allows signals to enter and exit the RFIC 32. In other examples, an electromagnetic feed mechanism is used instead of vias, and each antenna element 22 is excited by near-field energy from a respective feed point.

[0018] 1 with integrated antenna elements 22 and RFICs 32, the antenna device 10 may be referred to as an embedded antenna array. In the following description, for convenience of explanation, horizontal planes / directions generally refer to planes / directions parallel to the major surfaces of the antenna device 10 (parallel to the xy plane as shown), and vertical directions refer to the orthogonal direction, i.e., the thickness direction of the antenna device 10.

[0019] FIG. 2 is a plan view of an exemplary second configuration layer 30a of the antenna device 10. As an example for illustrating the concept of the disclosed technology, the second configuration layer 30a is shown to include 16 RFICs 32_1 to 32_16 (M=16) and five PCB sections 34_1, 34_2, 34_3, 34_4, and 34_5. In one example, each PCB section 34_i is formed of an alumina substrate and a microstrip structure having a signal line 43 on one major surface and a ground plane (not shown) on the opposite surface. Alternatively, each PCB section 34_i may embody other types of transmission lines, such as coplanar waveguides or striplines. In either case, electrical connection between each signal line 43 in the RFIC 32 and the adjacent signal line 44 may be made via wire bonds 41 or other suitable connection schemes, such as edge connections. The beam forming network (BFN) 50 in this example has six stages of combiners 40a, 40b, 40c, 40d, 40e and 40f.

[0020] Each RFIC 32 may have the same circuit configuration and layout, which is advantageous for manufacturing. Each RFIC 32 may include multiple active circuit units (AUs) 35, where the AUs 35 include amplifiers and / or phase shifters and are connected to at least one antenna element 22. In the example of FIG. 2, each RFIC 32 has four AUs, AUs 35a, 35b, 35c, and 35d, each connected to a single respective antenna element 22, whereby each RFIC 32 is connected to four antenna elements 22. Thus, in this design, 16 RFICs 32_1-32_16 are connected to 64 antenna elements 22_1-22_64. In any given RFIC, such as 32_1, the "element signals" received by two antenna elements 22 are provided to two AUs 35a and 35b, respectively. These two element signals are conditioned (amplified and / or phase shifted and optionally filtered) by AUs 35a and 35b, and the conditioned receive signal is combined by 2:1 combiner 40a1. Similarly, the two element signals from the two respective antenna elements 22 are conditioned and output by AUs 35c and 35d, and these conditioned signals are combined by 2:1 combiner 40a2. The combiners 40a1, 40a2 of RFIC 32_1 are combiners of the first stage 40a of BFN 50. Thus, if there are 16 RFICs 32_1-32_16 in the second configuration layer 30a, there may be 32 first stage combiners 40a1-40a32. Each RFIC 32 may also have one 2:1 combiner of the second stage of BFN 50 that combines the outputs of the first stage combiners. For example, RFIC 32_1 is shown to include a combiner 40b1 that combines the combined signals from combiners 40a1 and 40a2.

[0021] In addition, RFICs 32_1 to 32_16 can each include intermediate amplifiers 37_1 to 37_16 located in the corner regions 46 of their respective RFICs. In this exemplary layout, RFICs 32_1 to 32_16 are arranged in rows and columns, and the corner regions 46 of the intermediate amplifiers 37 alternate diagonally column by column in each row. In other words, the RFICs 32 are arranged in rows and columns along a two-dimensional (2D) surface, and in each row, the RFICs 32 are sequentially rotated by 180° column by column within the plane of the 2D surface. Only K < M intermediate amplifiers 37_1 to 37_16 can be electrically connected (by wire bonds 41) between different stages of the BFN50, each being between the i-th stage and the (i + 1)-th stage of the BFN50. For example, in the exemplary design of the constituent layer 30a, it can be seen that K = 4 and i = 4. Intermediate amplifiers 37_2, 37_6, 37_9, and 37_13 are connected to the BFN50 between the combiner 40d of the 4th stage and the combiner 40e of the 5th stage of the BFN50. Another amplifier 37_14 at the end of the BFN50 can be provided to amplify the final composite signal, which is the output signal of the combiner 40f of the 6th stage in this design. The amplified final output signal is sent to the output RF connector 59 as the final composite received signal. The remaining amplifiers 37_1, 37_3, etc. are not connected to the BFN50.

[0022] By arranging the RFICs 32 in each row in alternating orientations column by column (the corner positions of the amplifiers 37 alternating column by column), a progressive layout is realized that allows each BFN stage to be closer to the center of the layout than the preceding BFN stage. This approach facilitates the use of the same RFICs 32_1 to 32_16, thereby reducing the cost of the antenna 10.

[0023] The selection of alumina as the substrate for PCB section 34 provides certain advantages. Due to the high dielectric constant of alumina, the power divider 34 can be made smaller compared to lower dielectric constant substrates. Also, finer resolution can be obtained with alumina using thin film processes compared to other substrates. Furthermore, by using sections of alumina as shown in FIG. 2 rather than a single large piece with a cutout for the RFIC, the resulting integrated structure is mechanically robust.

[0024] Any suitable type of combiner / divider may be used for combiners / dividers 40c, 40d, etc. of BFN 50. Examples include Wilkinson dividers (e.g., with resistors printed between the split output lines), hybrid ring ("rat race") couplers, and 90° branch line couplers. When three or more signals are combined without additional conditioning, such as portions of stage 1 and stage 2 within a single RFIC 32, a single P:1 combiner is formed, where P=3 or more. For example, combiners 40a1, 40a2, and 40b1 may be integrated as part of a single 4:1 combiner.

[0025] By configuring some of the RFICs 32 with both "first stage" amplifiers (in AU 35) and "later stage" intermediate amplifiers 37, thereby providing multiple levels of amplification at different points in the BFN, the total number of ICs required for the antenna 10 can be reduced. As a result, the manufacturing cost of the antenna 10 can be reduced and / or the area of ​​the antenna 10 can be freed up for other components. In the example of FIG. 2, the front-end amplifier is placed before "stage 1" and the intermediate amplifier 37 is placed after stage 4, but these locations can be changed in other embodiments. In a receive antenna system such as that shown in FIG. 2, the location of the amplifier at a point in the BFN 50 can be a trade-off between DC power consumption and noise figure performance. Generally, in a receive antenna system, it is desirable to place the "front-end" amplifier forward, i.e., close to the antenna element, to lower the noise figure in the system. It is also desirable that the signal level across the BFN 50 be above a certain threshold, and therefore a design with a large percentage of the total gain allocated forward can result in good signal-to-noise performance, but it increases DC power consumption. Providing intermediate amplifier gain in a later stage location (e.g., after stage 4) can reduce DC power consumption compared to providing this gain in a previous stage. For example, if no intermediate amplification is provided, all gain is provided in the front-end amplifier in AU35. However, this requires the front-end amplifier to be larger, resulting in more DC power consumption. On the other hand, if no front-end amplifier is used, all the required gain could be achieved by a single output amplifier such as 37_14, but such a design would result in poor noise figure performance due to signal loss across the BFN. Thus, the number of amplifiers, their location, and their size / gain present design trade-offs.

[0026] In a transmit antenna system, the location of the amplifiers in the BFN can also be a design trade-off based on optimizing DC power efficiency. A front-end power amplifier (PA) can be placed in each of the AUs 35. The intermediate amplifiers 37 shown in FIG. 2 can be in the same corner location, but with the input and output terminal locations reversed. By using amplifiers 37, a portion of the required gain can be realized by the front-end amplifiers and the remaining gain can be realized by amplifiers 37. In this way, DC power and efficiency are optimized for the transmit antenna system.

[0027] Figure 3 is a schematic diagram of an example portion of beamforming circuitry in antenna 10, corresponding to a portion of second component layer 30a of Figure 2. With reference to Figures 2 and 3, BFN 50 may have six stages of combiners, designated 40a-40f, where combiners 40a and 40b (stages 1 and 2) are a first portion of BFN 50 and are formed within RFICs 31_1-32_16. Combiners 40c-40f (stages 3-6) are a second portion of BFN 50 and are formed within PCB sections 34_1-34_5.

[0028] FIG. 3 shows that a single RFIC, for example 32_2, may include at least one combining / splitting stage of the BFN 50, as well as an intermediate amplifier 37_2 connected between other BFN 50 stages. Each of the RFICs 32_1-32_16 has the same configuration and each has an intermediate amplifier 37, but only some of the intermediate amplifiers 37 may be connected to the BFN 50. The amplifier 37_2 amplifies the partially combined receive signal / partially split transmit signal. As described above, the receive path is taken as an example. If there are four AUs 35a-35d for each RFIC 32, two combining stages of the BFN 50 are provided in each RFIC 32. Each AU 35a-35d may include a low noise amplifier (LNA) 91 and / or a phase shifter 92 to condition (amplify and / or phase shift) the element signal received from the respective antenna element 22. In the example of FIG. 3, each of the AUs in the second configuration layer 30a includes an on-chip LNA 91, which is considered as a level 1 amplifier. Intermediate amplifiers such as 37_2 are considered level 2 amplifiers.

[0029] The conditioned element signals are output to 2:1 combiners 40a3 and 40a4 and combined to provide respective first stage output signals. The first stage output signals are again combined by 2:1 combiner 40b2, thereby outputting a second stage output signal to a third stage combiner 40c1 in PCB section 34_1. The third stage combiner 40c1 combines the second stage output signals from RFICs 32_1 and 32_2 to provide a third stage output signal to a fourth stage 2:1 combiner 40d1. Combiner 40d1 combines the third stage signals from combiners 40c1 and 40c2 to provide a fourth stage output signal, which is applied to intermediate amplifier 37_2. That amplified output is then provided to a fifth stage 2:1 combiner 40e2, which combines a similarly amplified output from the intermediate amplifier 37_13, thereby outputting a sixth stage combined signal. This combined signal is applied to an output amplifier 37_14, the amplified output of which is provided as the final combined receive signal to an RF connector 59. The RF connector 59 may be, for example, a vertically oriented coaxial connector (as shown in FIG. 2) or a horizontally oriented side-mount connector.

[0030] FIG. 4 is a cross-sectional view of a portion of the antenna 10, illustrating an exemplary connection structure between the first and second construction layers 20 and 30. In this embodiment, the RFICs 32 and PCB sections 34_i are attached at their backsides (facing up in FIG. 4) to the bottom surface 27 of the antenna substrate 25. The mechanical and electrical attachment can be via electrical connection joints 53, e.g., solder joints, bumps, or pillars. A majority of the bottom surface 27 may be a ground plane 47 for reflecting signal energy radiated to / from the antenna elements 22. An opening 54 may be formed in the ground plane 47 to allow electrical connection between the signal connection points of the RFICs 32 and the vias 52 via the connection joints 53. The vias 52 formed in the antenna substrate 25 serve as antenna feeds (e.g., probe feeds) for the antenna elements 22. Electrical connection joints 53 may also be present between the ground plane 47 and the ground connection points on the RFICs 32, and between the ground plane 47 and the backside of the PCB section 34.

[0031] FIG. 4 shows adjacent RFICs 32_1 and 32_2 connected to PCB section 34_1 as an example. Signal lines (conductive traces) 43 on the front side of PCB section 34_1 are connected to signal lines 44 on the front sides of RFICs 32_1 and 32_2 via wire bonds 41. (Note that a "ribbon bond" is considered a type of wire bond here. Other types of connections, such as edge connections, may be used in place of wire bonds 41. PCB section 34_1 may have a metal layer on its back side that serves as a ground plane for the microstrip transmission line medium. Alternatively, a ground plane 47 on antenna substrate 25 may serve as the microstrip ground plane. In FIG. 4, antenna substrate 25 is shown as a single layer substrate, but it should be noted that additional thin redistribution layers (RDLs) may be present for DC routing between RFICs 32 and / or within individual RFICs 32. It should be noted that "single layer" in this context therefore refers to a single RF layer. In an alternative embodiment, the antenna substrate 25 is configured as a multi-layer substrate, i.e., a multi-RF layer substrate. In this case, the additional layers of the antenna substrate 25 are used to form RF transmission lines for connecting the RFIC 32 to the PCB 34, instead of wire bonds. The RF transmission lines may be, for example, microstrip, stripline, or coplanar waveguide. It should be further noted that, although not shown in FIG. 4, an RF connector 59 may be attached to the bottom surface 27 of the antenna substrate 25.

[0032] 5 is a plan view of another exemplary second configuration layer 30b layout that may be employed in the antenna 10. The second configuration layer 30b differs from the configuration layer 30a in that it omits the RFIC 32_16 and replaces the 2:1 combiner 40c8 with only a single signal line 97 such that the BFN 50 is a 60:1 combiner. The RF connector 59 is moved to the space previously occupied by the RFIC 32_16 and is connected to the output of the amplifier 37_14 via a signal line 93 in the additional PCB section 34_6. One or more additional ICs 94, 96 having any desired functionality may also be placed in the new unoccupied space adjacent to the RF connector 59. In other respects, the configuration and operation of the second configuration layer 30b may be the same as that described for the configuration layer 30a.

[0033] FIG. 6 is an exploded perspective view of an antenna 10', according to one embodiment. The antenna 10' may have the same general functionality and many of the advantages of the antenna 10 described above, but has a different structure. The antenna 10' omits the coplanar PCB 34 of the antenna 10, and instead provides a PCB BFN stage (e.g., with combiners 40c1, 40c8, etc., as shown) in a multi-layer PCB 60. The PCB 60 may be comprised of an antenna substrate 25, a multi-layer substrate 67, and a metal layer forming a ground plane 47 therebetween. The RFICs 32_1-32_M are attached to the bottom surface of the PCB 60. The antenna elements 22_1-22_N thus form a first constituent layer 20' of the antenna 10'. The RFICs 32_1-32_M form a second constituent layer 30' of the antenna 10'. The PCB 60 is disposed between the first constituent layer 20' and the second constituent layer 30'. A first plurality of vias that extend partially into the substrate 67 electrically connect the BFN stage in the PCB 60 to the RFIC 32. A second plurality of vias that extend completely through the substrate 67 and the antenna substrate 25 electrically connect signal connection points on the RFIC 32 to the antenna element 22.

[0034] 7A is a cross-sectional view showing an example structure of a portion of the antenna 10' of FIG. 6. A first configuration layer 20' may include antenna elements such as 22_i, 22_j, and a second configuration layer 30' may include RFICs such as 32_14 and 32_j, and an RF connector 71. The PCB 60 in this example is comprised of an antenna substrate 25, an antenna ground plane 47, and a multi-layer substrate 67. The multi-layer substrate 67 may include a lower substrate portion 67a, an upper substrate portion 67b, a first metal layer 65 in the upper substrate portion 67b, and a second metal layer 75 between the lower substrate portion 67a and the upper substrate portion 67b. The first metal layer 65 is patterned to form signal lines and combiners for the PCB stage of the BFN 50. The signal lines of the PCB stage of the BFN 50 may be microstrip, stripline, or coplanar waveguide (CPW) transmission line signal lines. The second metal layer 75 can be patterned to form a microstrip or stripline ground plane for the signal lines of the first metal layer 65. Other portions of the second metal layer 75 can be patterned to form DC signal lines that connect between different RFICs 32 and / or to different connection points within individual RFICs 32.

[0035] The second vias 72 connect the signal connection points on the RFIC 32 to the respective antenna elements 22 by extending through both the multi-layer substrate 67 and the antenna substrate 25. The ground plane 47 has an opening 54 therein, and the second metal layer has an opening 104 that allows the second vias 72 to traverse the substrate without shorting. The first vias, such as 82, 92, 102, and 112, extend from the connection points on the RFIC 32 to the first metal layer 65 to connect the on-chip BFN stages to the PCB BFN stages. For example, the first metal layer 65 can be patterned to form a BFN layout similar to either of those shown in FIG. 2 or FIG. 5 of the coplanar design of the second component layer 30. FIG. 7A shows an example in which the first metal layer 65 includes a third stage combiner 40c7 connected to a first via 82 and a sixth stage combiner 40f connected to a first via 92. It should be noted that if the PCB BFN is constructed with CPW, one or more additional vias adjacent the illustrated vias 82, 92, etc., are provided to make ground-signal-ground (GSG) or ground-signal (GS) connections to the CPW lines. That is, the illustrated vias 82, 92, etc. may be "signal vias" for GSG or GS connections, and one or more adjacent vias are provided for "ground vias" that each connect a ground contact on the RFIC 32 to the ground of the CPW transmission line.

[0036] FIG. 7B is a cross-sectional view along line 7B-7B of FIG. 7A, with metal layer 75 removed for clarity. This view shows an example circuit configuration of RFIC 32_14, which may be the same for all RFICs 32_1-32_M of antenna 10'. For example, RFICs 32_1-32_M may all be identical and have substantially the same relative orientation to each other, column by column and row by row, in second configuration layer 30', as in configuration layer 30a or 30b of FIG. 2 or FIG. 5. However, since no space is required between adjacent RFICs 32 in antenna 10' for coplanar PCB section 34, more flexibility is available in the layout of RFICs 32 and / or PCB BFN 50 portions within multi-layer substrate 60. The RFIC 32 of the second construction layer 30' may have the same or similar internal layout as that of the construction layer 30a / 30b, except that the connection of the on-chip BFN stage to the PCB BFN stage is made through first vias 82, 92, etc., rather than through wirebonds or edge connections. For example, the RFIC 32_14 may include four active circuit units (AUs) 35a-35d, each of which may include a conditioning circuit 78 having an LNA 76 and a phase shifter 73. The RFIC 32_14 may further include first stage combiners 40a27 and 40a28, a second stage combiner 40b14, and an intermediate amplifier 37_14 that amplifies the final combined signal in the same manner as described above for the second construction layers 30a and 30b.

[0037] In operation of the receive antenna system, element signals s1a, s1b, s1c, and s1c may be provided from four antenna elements 22 (only one element 22_i is shown) to AUs 35a, 35b, 35c, and 354d, respectively, through second vias 72 connected to the four antenna elements 22. Each of these element signals may be conditioned in conditioning circuits 78 of AUs 35a-35d, thereby outputting conditioned element signals s1a', s1b', s1c', and s1d', respectively. (Although only signal s1a is shown in FIG. 7A, the other three element signals may be similarly provided from the other three antenna elements 22.) The conditioned element signals s1a'-s1d' are combined by combiners 40a27, 40a28, 40b14 to generate second stage output signal s2. Signal s2 is routed to a first via 82 and provided to a PCB BFN in the multi-layer substrate 60. A connection point of the third stage combiner 40c7 may be connected to the first via 82 providing signal s2. The combiner 40c7 may combine signal s2 with another second stage signal from an adjacent RFIC 37_13 (not shown in FIGS. 7A-7B), similar to the layout shown in FIG. 2. Similar to the layout of FIG. 2, the combined output of the combiner 40c7 may be combined at a fourth stage combiner 40d4, and the fourth stage output signal is amplified by the intermediate amplifier 37_13 of the RFIC 37_13. The sixth stage combined signal s3 from sixth stage combiner 40f (connected to combiner 40c7 as in FIG. 2) may then be returned through first via 92 to RFIC 32_14 where it is applied as an input signal to amplifier 37_14 for further amplification, resulting in signal s4. Signal s4 is sent through another first via 102 to signal line 87 of BFN 50 and then through another first via 112 to become output signal s5. Output signal s5 is provided to RF connector 71 as the final combined signal.

[0038] When the antenna 10' is configured as a transmitting antenna system, mutual operation can be realized. In this case, the intermediate amplifier 37 may be inverted, and the power amplifier may be replaced with the LNA 76. The intermediate amplifier 37_14 can amplify the RF signal input from the RF connector 71, and output it to the sixth stage combiner / divider 40f that operates as a divider to divide the transmission signal s3 flowing in the opposite direction, as in Figures 7A and 7B.

[0039] Thus, the antenna 10' including individual RFICs capable of providing multi-level amplification exhibits many of the same advantages as described above for the antenna 10 of FIG. 1. As with the antenna 10, the antenna 10' includes a hybrid beamformer that can provide higher performance and lower cost compared to antennas that implement the entire BFN only on the RFIC or only on the PCB. The hybrid beamformer can allow flexibility and lower development costs by enabling the use of more common RFICs with PCB circuitry. In addition, the hybrid beamformer can avoid mechanical challenges and problems associated with implementing the entire beamformer only on the PCB or only on the RFIC. Furthermore, the advantages of intermediate amplification in the antenna 10' with respect to design flexibility and optimization of the trade-off of noise figure versus DC power consumption are the same as those described for the antenna 10.

[0040] While the technology described herein has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details can be made therein without departing from the spirit and scope of the claimed subject matter as defined by the following claims and their equivalents.

Claims

1. An antenna device (10, 10'), a first component layer (20) comprising a plurality of antenna elements (22) forming an antenna array (24); A second component layer (30), a plurality of radio frequency integrated circuit chips (RFICs) (32) connected to the antenna elements, each RFIC comprising active beam forming circuitry (22) for conditioning signals communicated to one or more of the antenna elements and a portion (40a3, 40a4) of a first combining / splitting stage (40a) of a beam forming network (BFN) (50); a second construction layer (30) comprising at least an additional combining / splitting stage (40d) and further combining / splitting stages (40e, 40f) of the BFN, each disposed external to the RFIC; At least some of the RFICs include an intermediate amplifier (37) connected between the additional combining / splitting stage and the further combining / splitting stage of the BFN.

2. The active beamforming circuitry of the RFIC comprises at least one front-end amplifier (76); 2. The antenna arrangement (10, 10') according to claim 1, wherein the at least one front-end amplifier is at least one of a transmitting amplifier for amplifying a signal for transmission by at least one antenna element and a receiving amplifier for amplifying a signal received by the at least one antenna element.

3. 2. The antenna arrangement (10, 10') according to claim 1, wherein the active beam forming circuitry comprises at least one phase shifter (73) for steering the beam.

4. 2. The antenna device (10) of claim 1, wherein the multiple RFICs are disposed on a same plane, the additional combining / splitting stage and the further combining / splitting stage of the BFN are disposed on at least one dielectric substrate (34) located on the same plane between the RFICs, and the additional combining / splitting stage and the further combining / splitting stage of the BFN are wire bonded to connection points of the RFICs.

5. The antenna arrangement (10, 10') of claim 4, wherein said at least one dielectric substrate (34) comprises a plurality of sections of alumina.

6. The first component layer (20) comprises an antenna substrate having a front surface for interfacing with the antenna element, a back surface (27) having a ground plane (47) formed thereon, and a number of vias formed through the antenna substrate (25) for connecting the antenna element to the RFIC; The antenna device (10, 10') of claim 1, wherein the RFIC faces the back side of the antenna substrate.

7. The antenna arrangement (10, 10') according to claim 6, wherein the RFIC is attached to the back surface (27) of the antenna substrate.

8. The first component layer (20) is disposed in an upper stage of the antenna device, and the plurality of RFICs are disposed in a lower stage of the antenna device in the same plane; 7. The antenna device (10') of claim 6, wherein the second construction layer comprises a multi-layer printed circuit board (PCB) (60) between the plurality of RFICs and the antenna elements, the antenna substrate being one layer of the multi-layer PCB, the multi-layer PCB comprising the additional combining / splitting stage and the further combining / splitting stage of the BFN.

9. 9. The antenna device (10') of claim 8, wherein the multi-layer PCB includes an upper dielectric layer adjacent to the antenna substrate, a lower dielectric layer adjacent to the RFIC, and a patterned metal layer between the upper and lower dielectric layers to form the additional and further coupling / splitting stages of the BFN, each of the additional and further coupling / splitting stages of the multi-layer PCB being connected to a connection point of the RFIC through a respective via formed through the lower dielectric layer.

10. A total of M intermediate amplifiers are included in the total of M RFICs; 2. The antenna arrangement (10, 10') according to claim 1, wherein K<M of the intermediate amplifiers are connected between the additional combining / splitting stage and the further combining / splitting stage.

11. The antenna arrangement (10, 10') according to claim 10, wherein each of said RFICs has the same design configuration.

12. each of said RFICs having an identical design configuration and rectangular profile; the RFICs are arranged in rows and columns along a two-dimensional (2D) surface; The antenna arrangement (10, 10') according to claim 1, wherein the RFICs are sequentially rotated by 180° in the plane of the 2D surface in each row by column.

13. The antenna arrangement (10, 10') of claim 1, wherein the RFIC and the antenna element are configured for mm-wave operation.

14. A total of M intermediate amplifiers (37_1 to 37_14) are included in a total of M RFICs (32_1 to 32_14); the RFICs each have a rectangular profile and are arranged in rows and columns along a two-dimensional (2D) surface to form a 2D profile along the 2D surface; The antenna arrangement (10, 10') according to claim 1, wherein each of the M intermediate amplifiers is disposed at a corner position of a respective one of the RFICs.

15. 15. The antenna apparatus (10) of claim 14, wherein the additional (40d) and further (40f) combining / splitting stages of the BFN are disposed on at least one dielectric substrate (34) located between the RFICs, the additional and further combining / splitting stages of the BFN are wire bonded to connection points at the corner locations of the RFICs, and K of the M intermediate amplifiers are disposed on the RFICs, where K<M.

16. 16. The antenna arrangement (10) of claim 15, wherein the further combining / splitting stage (4f) of the BFN is disposed in a central region of the 2D profile and the additional combining / splitting stage of the BFN is disposed in a region between the RFICs outside the central region.

17. 17. The antenna apparatus (10) of claim 16, wherein the locations of the intermediate amplifiers within the RFIC alternate sequentially in the row from a first corner location to a diagonally opposite second corner location.

18. the active beam forming circuitry of each RFIC includes at least one phase shifter for steering an antenna beam and at least one front-end amplifier; the plurality of antenna elements is N antenna elements, The antenna arrangement (10, 10') of claim 1, wherein the plurality of RFICs is M RFICs, M<N, each RFIC being connected to (N / M) of the antenna elements.

19. the first component layer (20) comprises an antenna substrate (25) having a front surface for interfacing with the antenna element, a back surface formed with a ground plane having an opening (54) for connecting to an antenna feed (52, 72), and a plurality of vias formed through the antenna substrate forming the antenna feed, the antenna feed being connected to the RFIC through the opening; The antenna device (10, 10') of claim 1, wherein the RFIC is attached to the back surface of the antenna substrate.

20. the active beamforming circuitry of each RFIC conditions signals communicated to four antenna elements; each of the RFICs further comprising a portion of a second combiner / split stage (40b) of the BFN; At least a third (40c), fourth (40d), and fifth (40e) combining / splitting stages of the BFN are formed in the second fabrication layer external to the RFIC; the additional combine / split stage (40d) being the fourth combine / split stage of the BFN; 2. The antenna arrangement (10, 10') according to claim 1, wherein the further combining / splitting stage (40e) is the fifth combining / splitting stage of the BFN.

Citation Information

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