Power selection circuit, display panel, and display apparatus

Abstract

To provide a power selection circuit, display panel, and display apparatus.SOLUTION: A power selection circuit disclosed herein includes a voltage signal line configured to transmit a voltage signal to a first electrode of a light-emitting sub-pixel, and control at least two groups of light-emitting sub-pixels to emit light group by group. One group of light-emitting sub-pixels includes at least one row of light-emitting sub-pixels or at least one row of light-emitting sub-pixel units, and one of the light-emitting sub-pixel units includes at least two different light-emitting sub-pixels. According to an embodiment of the present disclosure, independent light-emitting control over each group of light-emitting sub-pixels can be enabled, thereby realizing row-by-row lighting or group-by-group lighting of respective rows of light-emitting sub-pixels.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This application belongs to the field of display technologies, and particularly relates to a power supply selection circuit, a display panel, and a display device.

Background Art

[0002] Flat panel display devices based on technologies such as Organic Light Emitting Diode (OLED) and Light Emitting Diode (LED) have advantages such as high image quality, low power consumption, thin body, and wide application range. Therefore, they are widely applied to various consumer electronic products such as mobile phones, televisions, notebook computers, and desktop computers, and have become the mainstream in display devices.

[0003] However, it is necessary to improve the usage performance of current OLED display products.

Summary of the Invention

[0004] Embodiments of this application provide a power supply selection circuit, a display panel, and a display device that can solve the technical problem in the prior art that different refresh frequencies cannot be used to drive different regions during screen split display.

[0005] In a first aspect, embodiments of this application include a voltage signal line that transmits a voltage signal to a first electrode of a light-emitting sub-pixel and controls at least two sets of light-emitting sub-pixels to emit light in groups. One set of light-emitting sub-pixels includes at least one row of light-emitting sub-pixels or at least one row of light-emitting sub-pixel units, and one light-emitting sub-pixel unit includes at least two different types of light-emitting sub-pixels. A power supply selection circuit is provided.

[0006] In some embodiments, the voltage signal line intermittently transmits a voltage signal that is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel and the lighting voltage of the light-emitting sub-pixel.

[0007] In some embodiments, the voltage signal line transmits a voltage signal smaller than the difference between the second electrode voltage of the light-emitting subpixel and the lighting voltage of the light-emitting subpixel, and a voltage signal larger than the difference between the second electrode voltage of the light-emitting subpixel and the lighting voltage of the light-emitting subpixel, in a time-division manner.

[0008] In some embodiments, at least some of the at least two different light-emitting subpixels are located in different rows.

[0009] In some embodiments, the power supply selection circuit further includes a first signal module, and the voltage signal line includes a first voltage signal line; A first end of the first signal module is connected to a first voltage signal line, a second end of the first signal module is connected to a first electrode of a set of light-emitting sub-pixels, and a control end of the first signal module is connected to a first control signal line; In the light emitting stage, the voltage signal transmitted to the first voltage signal line is smaller than the difference between the second electrode voltage of the light emitting sub-pixel and the lighting voltage of the light emitting sub-pixel.

[0010] In some embodiments, the power supply selection circuit further includes a second signal module, and the voltage signal line further includes a second voltage signal line; The first end of the second signal module is connected to the second voltage signal line, the second end of the second signal module is connected to the second end of the first signal module, and the control end of the second signal module is connected to the second control signal line; In the non-light-emitting stage, the voltage signal transmitted to the second voltage signal line is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the lighting voltage of the light-emitting sub-pixel.

[0011] In some embodiments, the first signal module includes a first transistor, a first pole of the first transistor is connected to a first voltage signal line, a second pole of the first transistor is connected to a first electrode of a set of light-emitting sub-pixels, and a gate of the first transistor is connected to a first control signal line; The second signal module includes a second transistor, a first pole of the second transistor is connected to the second voltage signal line, a second pole of the second transistor is connected to the second pole of the first transistor, and a gate of the second transistor is connected to the second control signal line.

[0012] In some embodiments, the first transistor type and the second transistor type are opposite, and the signal on the first control signal line and the signal on the second control signal line are the same signal.

[0013] In some embodiments, the first control signal line and the second control signal line are the same signal line.

[0014] In some embodiments, the first transistor type and the second transistor type are the same, and the signal on the first control signal line and the signal on the second control signal line are inverse signals.

[0015] In some embodiments, the signal on the first control signal line and the signal on the second control signal line are both step transition signals.

[0016] In some embodiments, the signal duty ratio on the first control signal line and the signal duty ratio on the second control signal line are both adjustable.

[0017] In a second aspect, an embodiment of the present application provides a display panel including a power supply selection circuit according to the first aspect and multiple sets of light-emitting subpixels arranged in an array, each set of light-emitting subpixels including at least one row of light-emitting subpixels or at least one row of light-emitting subpixel units, each light-emitting subpixel unit including at least two different light-emitting subpixels, the first electrodes of the light-emitting subpixels in the same set are electrically connected and the first electrodes of the light-emitting subpixels in different sets are insulated from each other, and one power supply selection circuit is connected to the first electrodes of the set of light-emitting subpixels.

[0018] In some embodiments, the first electrodes of the light-emitting sub-pixels in adjacent rows within the same group or the light-emitting sub-pixels in a light-emitting sub-pixel unit are electrically connected via isolation pillars.

[0019] In some embodiments, a cutoff groove for separating an isolation pillar into a first sub-isolation pillar and a second sub-isolation pillar is provided in the isolation pillar between the light-emitting sub-pixels in different groups and adjacent rows or the light-emitting sub-pixels in a light-emitting sub-pixel unit. The first sub-isolation pillar and the second sub-isolation pillar are insulated from each other. The light-emitting sub-pixels in one row of the light-emitting sub-pixels or the light-emitting sub-pixel unit located in different groups and adjacent rows are electrically connected to the first sub-isolation pillar, and the light-emitting sub-pixels in another row of the light-emitting sub-pixels or the light-emitting sub-pixel unit located in different groups and adjacent rows are electrically connected to the second sub-isolation pillar.

[0020] In some embodiments, the power supply selection circuit is electrically connected to the isolation pillar.

[0021] In some embodiments, the isolation pillar includes a metal isolation pillar.

[0022] In some embodiments, in a direction perpendicular to the extending direction of a single group of the light-emitting sub-pixels, the cross-sectional shape of the conductive portion of the isolation pillar includes a T shape or an inverted trapezoid.

[0023] In some embodiments, the display panel includes a display area and a non-display area. The light-emitting sub-pixels are located in the display area, and the power supply selection circuit is located in the non-display area.

[0024] In some embodiments, the non-display area is located on at least one side of the display area.

[0025] In some embodiments, the non-display area is located on both opposite sides of the display area, and each non-display area on each side includes a power supply selection circuit.

[0026] In some embodiments, the first electrode of the light-emitting sub-pixel in the same row of light-emitting sub-pixels or the light-emitting sub-pixel unit is connected to a plurality of power selection circuits.

[0027] In some embodiments, the first electrode of the light-emitting sub-pixel in the same row of light-emitting sub-pixels or the light-emitting sub-pixel unit is connected to two power selection circuits. Among the two power selection circuits connected to the first electrode of the light-emitting sub-pixel in the same row of light-emitting sub-pixels or the light-emitting sub-pixel unit, one power selection circuit is located in the non-display area on the display area side, and the other power selection circuit is located in the non-display area on the opposite side of the display area.

[0028] In a third aspect, an embodiment of the present application provides a display device including the display panel according to the second aspect.

[0029] Compared with the prior art, the power selection circuit, the display panel, and the display device according to the embodiments of the present application realize the transmission of the voltage signal to the first electrode of the light-emitting sub-pixel by providing the voltage signal line, and can transmit the voltage signal to the light-emitting sub-pixels in the same group. By controlling the time intervals during which different groups of light-emitting sub-pixels receive the voltage signal, the light emission of each group of light-emitting sub-pixels can be realized. In the display panel, when the voltage signal line is provided, independent light emission control of each group of light-emitting sub-pixels can be realized by the voltage signal line, and the lighting of each row or each group of the light-emitting sub-pixel rows can be realized.

Brief Description of the Drawings

[0030] To more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that need to be used in the embodiments of the present application are briefly described below. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can also obtain other drawings based on these drawings without creative labor.

[0031] [Figure 1] It is a module structure schematic diagram of a power selection circuit according to an embodiment of the present application. [Diagram 2]FIG. 2 is a schematic diagram of a module structure of a power supply selection circuit according to another embodiment of the present application. [Diagram 3] 2 is a signal timing chart of the power supply selection circuit of FIG. 1. [Figure 4] 3 is a signal timing chart of the power supply selection circuit of FIG. 2. [Diagram 5] FIG. 2 is a schematic diagram of a module structure of a power supply selection circuit according to another embodiment of the present application. [Figure 6] FIG. 2 is a schematic diagram of a circuit structure of a light-emitting sub-pixel according to an embodiment of the present application; [Figure 7] 1 is a structural schematic diagram in which first electrodes of two adjacent light-emitting sub-pixel rows are spaced apart from each other according to an embodiment of the present application; [Figure 8] FIG. 2 is a schematic diagram of a layer structure of a portion of a light-emitting sub-pixel according to an embodiment of the present application; [Figure 9] FIG. 2 is a schematic diagram of a circuit structure of a power supply selection circuit according to an embodiment of the present application; [Figure 10] 10 is a signal timing chart of the power supply selection circuit of FIG. [Figure 11] FIG. 13 is a schematic diagram of a module structure of a power supply selection circuit according to yet another embodiment of the present application. [Figure 12] FIG. 2 is a circuit structure schematic diagram of a power supply selection circuit according to another embodiment of the present application; [Figure 13] 13 is a signal timing chart of the power supply selection circuit of FIG. 12. [Figure 14] FIG. 2 is a circuit structure schematic diagram of a power supply selection circuit according to another embodiment of the present application; [Figure 15] 15 is a signal timing chart of the power supply selection circuit of FIG. 14. [Figure 16] FIG. 2 is a schematic diagram of a circuit structure of a display panel according to an embodiment of the present application; [Figure 17] 17 is a signal timing chart corresponding to FIG. 16. [Figure 18] FIG. 4 is a schematic diagram of a circuit structure of a display panel according to another embodiment of the present application. [Figure 19] 16 is a signal timing chart corresponding to FIG. 15. [Figure 20]It is a schematic diagram of the circuit structure of a display panel according to another embodiment of the present application. [Figure 21] It is a signal timing chart corresponding to FIG. 20. [Figure 22] It is a schematic diagram showing the signal timing of a single light-emitting frame in the related art. [Figure 23] It is a schematic diagram showing the light-emitting states of the light-emitting sub-pixels in each row in the embodiment of FIG. 22. [Figure 24] It is a schematic diagram showing the signal timing of a single light-emitting frame in an embodiment of the present application. [Diagram 25] It is a schematic diagram showing the light-emitting states of the light-emitting sub-pixels in each row in the embodiment of FIG. 24. [Figure 26] It is a schematic diagram showing the signal timing of a single light-emitting frame in another embodiment of the present application. [Figure 27] It is a schematic diagram showing the light-emitting states of the light-emitting sub-pixels in each row in the embodiment of FIG. 26. [Figure 28] It is a schematic diagram showing a simulation waveform according to an embodiment of the present application. [Figure 29] It is a schematic diagram of the structure of a display device according to an embodiment of the present application.

Explanation of Reference Numerals

[0032] 1 Power supply selection module 11 First signal module 12 Second signal module 20 Light-emitting sub-pixel 21 Pixel driving circuit L Light-emitting element ELVSS First voltage signal line EM First control signal line T1 First transistor T2 Second transistor

Modes for Carrying Out the Invention

[0033] The features and exemplary embodiments of each aspect of the present application are described in detail below. In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is described in more detail below with reference to the drawings and specific embodiments. It should be understood that the specific embodiments described herein are intended only to interpret the present application, and are not intended to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is merely provided to illustrate the present application and to better understand the present application.

[0034] It should be noted that in this specification, relational terms such as first and second are merely intended to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that such an actual relationship or sequence exists between these entities or operations. Also, the terms "comprises," "has," or any other variations thereof are intended to cover a non-exclusive inclusion, and a process, method, article, or device that includes a set of elements not only includes those elements, but also includes other elements not expressly listed, or includes elements inherent to such process, method, article, or device. In the absence of more limitations, an element limited by the phrase "comprises" does not exclude the presence of other identical elements in the process, method, article, or equipment that includes the element.

[0035] In addition, the embodiments and features of the embodiments of the present application may be combined with each other unless there is a contradiction.

[0036] Flat display devices based on technologies such as organic light emitting diode (OLED) and light emitting diode (LED) have advantages such as high image quality, power saving, thin body and wide range of applications, and are widely applied to various consumer electronic products such as mobile phones, televisions, notebook computers, desktop computers, etc., and have become the mainstream in display devices. However, the usage performance of current OLED display products needs to be improved.

[0037] With the continuous development of the display technology field, the PPI (Pixels Per Inch) demand for UI and display devices is also gradually increasing. To achieve a higher PPI within the same size of display screen, the area of ​​a single light-emitting subpixel needs to be reduced. Since a single light-emitting subpixel is usually composed of a pixel driving circuit and a light-emitting element, in order to reduce the area of ​​the light-emitting subpixel, it is usually necessary to reduce the number of transistors accommodated in the pixel driving circuit. That is, in display panel products with high PPI, the number of transistors included in the pixel driving circuit is usually less than the number of transistors in current ordinary pixel driving circuits.

[0038] However, the reduction in the number of transistors in the pixel driving circuit results in a corresponding loss of function, where after the transistors for realizing the light emission of each pixel row in the normal pixel driving circuit are removed, each pixel row in the display panel can no longer realize the light emission of each pixel row.

[0039] In order to solve the above technical problems, the embodiments of the present application provide a power supply selection circuit, a display panel and a display device.

[0040] 1 is a schematic diagram showing the structure of a power supply selection circuit according to an embodiment of the present application. The power supply selection circuit includes a voltage signal line, which can transmit a voltage signal to the first electrode of the light-emitting sub-pixel 20.

[0041] In the array of light-emitting subpixels 20 arranged on a display panel, the light-emitting subpixels 20 may be divided into light-emitting subpixel sets, where each set of light-emitting subpixels 20 includes at least one row of light-emitting subpixels 20 or at least one row of light-emitting subpixel units, where one light-emitting subpixel unit may include at least two different light-emitting subpixels, and a voltage signal line may control at least two sets of light-emitting subpixels 20 to emit light for each set.

[0042] When the voltage signal line does not transmit a voltage signal to the first electrode of the light-emitting subpixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 is smaller than the lighting voltage of the light-emitting subpixel 20, and at this time, the light-emitting subpixel 20 does not emit light.

[0043] For example, as shown in FIG. 1, the Signal Line is a voltage signal line, the n4 node is the first electrode of the light-emitting subpixel 20, and the n3 node is the second electrode of the light-emitting subpixel 20. When the voltage signal line transmits a voltage signal to the first electrode of the light-emitting subpixel 20, and the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 is greater than the lighting voltage of the light-emitting subpixel 20, i.e., (Vn3-Vn4)>Von, the light-emitting subpixel 20 emits light.

[0044] When a voltage signal line supplies a voltage signal to the same set of light-emitting subpixels 20, the same set of light-emitting subpixels 20 can synchronously emit light or turn off light. The voltage signal line can shift the emission times of the light-emitting subpixels 20 of different sets by adjusting the time at which the voltage signal line transmits the voltage signal to the light-emitting subpixels 20 of different sets, thereby realizing emission of light for each set of light-emitting subpixels 20.

[0045] As can be appreciated, a set of light-emitting subpixels 20 may include at least one row of light-emitting subpixels 20. When each set of light-emitting subpixels 20 includes one row of light-emitting subpixels 20, row-by-row emission of each row of light-emitting subpixels 20 can be achieved, and when each set of light-emitting subpixels 20 includes two or more rows of light-emitting subpixels 20, emission of every two or more rows of light-emitting subpixels 20 can be achieved.

[0046] In order to achieve a higher PPI, the number of transistors in the pixel driving circuit 21 is reduced, and for light-emitting subpixels 20 that cannot be lit row by row or for multiple rows, a voltage signal can be supplied independently to one or multiple rows of light-emitting subpixels 20 in the same group via a voltage signal line. When the light-emitting subpixels 20 are in a non-light-emitting stage, steps such as writing data to the light-emitting subpixels 20 and initialization are performed.

[0047] In this embodiment, by providing a voltage signal line, a voltage signal can be transmitted to the first electrodes of the light-emitting subpixels 20, and light emission control of the light-emitting subpixels 20 can be achieved so that the light-emitting subpixels 20 can be switched between a light-emitting stage and a non-light-emitting stage. By controlling the light-emitting stages of different sets of light-emitting subpixels 20 to be shifted from each other, light emission can be achieved for each set of light-emitting subpixels 20. By providing a voltage signal line in the display panel, independent light emission control of each set of light-emitting subpixels 20 can be achieved by the voltage signal line, and lighting of each row or each set of light-emitting subpixels can be achieved.

[0048] In some embodiments, the voltage signal line can intermittently carry a voltage signal that is less than the difference between the second electrode voltage of the light-emitting subpixel 20 and the light-on voltage of the light-emitting subpixel 20 .

[0049] When the voltage signal line transmits the voltage signal to the first electrode of the light-emitting subpixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 is greater than the lighting voltage of the light-emitting subpixel 20, so that the light-emitting subpixel 20 can emit light.

[0050] When a parasitic capacitance exists between the first electrode and the second electrode of the light-emitting subpixel 20 and the voltage signal line stops transmitting the voltage signal to the first electrode of the light-emitting subpixel 20, due to the characteristic that the voltage across the parasitic capacitance cannot change suddenly, the potential of the first electrode corresponding to each light-emitting subpixel 20 is still the signal voltage of the voltage signal, but as the electrons stored in the parasitic capacitance continue to combine with holes to emit light, the voltage difference across the parasitic capacitance gradually decreases, and thus the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 gradually decreases. That is, when the voltage signal line stops transmitting the voltage signal to the first electrode of the light-emitting subpixel 20, the light-emitting subpixel 20 gradually turns off.

[0051] The voltage signal line can transmit a voltage signal intermittently, thereby causing the light-emitting subpixel 20 to emit light when the voltage signal is transmitted normally, and causing the light-emitting subpixel 20 to turn off when the transmission of the voltage signal is stopped.

[0052] In some embodiments, the voltage signal line can transmit a voltage signal smaller than the difference between the second electrode voltage of the light-emitting subpixel 20 and the lighting voltage of the light-emitting subpixel 20, and a voltage signal larger than the difference between the second electrode voltage of the light-emitting subpixel 20 and the lighting voltage of the light-emitting subpixel 20 in a time-division manner.

[0053] When the voltage signal transmitted by the voltage signal line is smaller than the difference between the second electrode voltage of the light-emitting subpixel 20 and the lighting voltage of the light-emitting subpixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 is larger than the lighting voltage of the light-emitting subpixel 20, and the light-emitting subpixel 20 can emit light.

[0054] When the signal amplitude of the voltage signal transmitted by the voltage signal line is greater than the difference between the second electrode voltage of the light-emitting subpixel 20 and the lighting voltage of the light-emitting subpixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 becomes smaller than the lighting voltage of the light-emitting subpixel 20. At this time, the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 cannot drive the light-emitting subpixel 20 to emit light, and the light-emitting subpixel is turned off.

[0055] As shown in FIG. 2, Signal Line is a voltage signal line, n4 node is the first electrode of the light-emitting subpixel 20, and n3 node is the second electrode of the light-emitting subpixel 20. The two types of voltage signals transmitted in a time-division manner in the voltage signal line may be ELVSS and ELVDD, respectively. When the voltage signal line transmits ELVSS to the first electrode of the light-emitting subpixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 is greater than the lighting voltage of the light-emitting subpixel 20, i.e., (Vn3-Vn4)>Von, and the light-emitting subpixel 20 emits light. When the voltage signal line transmits ELVDD to the first electrode of the light-emitting subpixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 is less than the lighting voltage of the light-emitting subpixel 20, and the light-emitting subpixel 20 is turned off.

[0056] Compared with the embodiment in which the voltage signal line intermittently transmits the voltage signal, in this embodiment, the voltage signal line does not realize the turning off of the light-emitting subpixel 20 when the transmission of the voltage signal is stopped, but transmits a voltage signal that is greater than the difference between the second electrode voltage of the light-emitting subpixel and the on voltage of the light-emitting subpixel, so that the voltage signal can quickly raise the potential of the first electrode of the light-emitting subpixel 20 so as to more quickly reduce the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 to below the on voltage, i.e., the turn-off speed of the light-emitting subpixel 20 is improved.

[0057] In some embodiments, a set of light-emitting subpixels includes at least one row of light-emitting subpixel units, and each light-emitting subpixel unit includes at least two different light-emitting subpixels, where at least some of the at least two different light-emitting subpixels are located in different rows. For example, when a single light-emitting subpixel unit includes two different light-emitting subpixels, the two different light-emitting subpixels may be located in different rows, and when a single light-emitting subpixel unit includes three or more light-emitting subpixels, the at least two different light-emitting subpixels may be located in different rows.

[0058] 3, which shows a signal timing chart of the power supply selection circuit in an embodiment in which the voltage signal line transmits a voltage signal intermittently. Taking the voltage signal transmitted by the voltage signal line as an example, ELVSS, in the P1 period, the voltage signal line stops transmitting the voltage signal, and at this time, the potential of the N4 node, i.e., the potential of the first electrode of the light-emitting subpixel 20, gradually increases until the light-emitting subpixel 20 is turned off. In the P1 period, the scan signal Scan can provide a high-level pulse as an enable enable signal, so as to realize writing of a data signal in a non-light-emitting stage in the enable enable period.

[0059] In the P2 section, the voltage signal line transmits a voltage signal, and at this time, the potential of the N4 node is pulled down to ELVSS, causing the light-emitting sub-pixel 20 to emit light.

[0060] 4 shows a signal timing chart of the power supply selection circuit in an embodiment in which the voltage signal line can transmit two kinds of voltage signals in a time-division manner. Taking as an example that the two kinds of voltage signals transmitted by the voltage signal line in a time-division manner are ELVSS and ELVDD, respectively, in the P1 period, the voltage signal line transmits ELVDD, and at this time, the potential of the N4 node, i.e., the potential of the first electrode of the light-emitting subpixel 20, is rapidly raised to ELVDD, reducing the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 to be smaller than the lighting voltage, and the light-emitting subpixel 20 is turned off. In the P1 period, the scan signal Scan can supply a high-level pulse as an enable enable signal, so as to realize writing of a data signal in a non-light-emitting stage in the enable enable period.

[0061] During the P2 section, the voltage signal line carries ELVSS, and at this time, the potential of the N4 node is pulled down to ELVSS, causing the light-emitting sub-pixel 20 to emit light.

[0062] Referring to FIG. 5, in some embodiments, the power supply selection circuit may include a first signal module 11, and the voltage signal line may include a first voltage signal line ELVSS.

[0063] 9, the first signal module 11 includes a first end, a second end and a control end, the first end of the first signal module 11 is connected to the first voltage signal line ELVSS, the second end of the first signal module 11 is connected to the first electrodes corresponding to a set of light-emitting sub-pixels 20, and the control end of the first signal module 11 is connected to the first control signal line EM.

[0064] In the light-emitting stage, the voltage signal provided by the first voltage signal line ELVSS is smaller than the difference between the second electrode voltage of the light-emitting subpixel 20 and the lighting voltage of the light-emitting subpixel 20. That is, the second electrode of the light-emitting subpixel 20 is an anode, and the first electrode is a cathode. At this time, the light-emitting subpixel 20 can emit light.

[0065] 9, the potential of N4 is the potential of the first electrode corresponding to the light-emitting subpixel 20. The first signal module 11 may be connected to the first electrodes corresponding to a set of light-emitting subpixels 20, which may be a row of light-emitting subpixels 20 or a number of consecutive rows of light-emitting subpixels 20.

[0066] For example, taking a display panel including n rows of light-emitting subpixels 20, when each first signal module 11 is connected to a first electrode corresponding to a row of light-emitting subpixels 20, the n rows of light-emitting subpixels 20 respectively correspond to n first signal modules 11, and when each first signal module 11 is connected to a first electrode corresponding to x rows of light-emitting subpixels 20, where x is a positive integer greater than or equal to 2, a single first signal module 11 corresponds to x rows of light-emitting subpixels 20, so that the n rows of light-emitting subpixels 20 correspond to (n / x) first signal modules 11.

[0067] The first electrodes corresponding to the light-emitting sub-pixels 20 connected to one first signal module 11 are insulated from the first electrodes corresponding to the light-emitting sub-pixels 20 connected to other first signal modules 11 .

[0068] For example, when the first signal module 11 is connected to a first electrode corresponding to a set of light-emitting subpixels 20, the first electrode corresponding to the set of light-emitting subpixels 20 is insulated from the first electrode corresponding to the previous set of light-emitting subpixels 20, and the first electrode corresponding to the set of light-emitting subpixels 20 is insulated from the first electrode corresponding to the next set of light-emitting subpixels 20.

[0069] When the first signal module 11 is connected to the first electrodes corresponding to the x rows of light-emitting subpixels 20, the first electrodes corresponding to the light-emitting subpixels 20 of each row in the x rows of light-emitting subpixels 20 are all electrically connected to each other, the first electrodes corresponding to the first row of light-emitting subpixels 20 in the x rows are isolated from the first electrodes corresponding to the light-emitting subpixels 20 of the previous row, and the first electrodes corresponding to the last row of light-emitting subpixels 20 in the x rows are isolated from the first electrodes corresponding to the light-emitting subpixels 20 of the next row.

[0070] For example, when a set of light-emitting subpixels 20 includes three consecutive rows of light-emitting subpixels 20, when a first signal module 11 is connected to the first electrodes corresponding to the light-emitting subpixels 20 in the 101st to 103rd rows, the first electrodes corresponding to the light-emitting subpixels 20 in the 101st to 103rd rows are all electrically connected to each other, the first electrodes corresponding to the light-emitting subpixels 20 in the 101st row are insulated and isolated from the first electrodes corresponding to the light-emitting subpixels 20 in the 100th row, and the first electrodes corresponding to the light-emitting subpixels 20 in the 103rd row are insulated and isolated from the first electrodes corresponding to the light-emitting subpixels 20 in the 104th row.

[0071] When the first signal module 11 is turned on, the first voltage signal line ELVSS is connected to the first electrodes of one or more corresponding rows of light-emitting sub-pixels 20 via the first signal module 11. At this time, the first electrodes of the one or more rows of light-emitting sub-pixels 20 can receive the voltage signal supplied by the first voltage signal line ELVSS. The second electrodes of the one or more rows of light-emitting sub-pixels 20 can receive the second power signal supplied by the second voltage signal line, and when the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the lighting voltage of the light-emitting sub-pixel 20, that is, (Vn3 - Vn4) > Von, the light-emitting sub-pixel 20 can emit light under the drive of the voltage signal and the second power signal.

[0072] As an alternative embodiment, as shown in FIG. 6, the light-emitting sub-pixel 20 may include a pixel driving circuit 21 and a light-emitting element L. The first electrode of the light-emitting sub-pixel 20 may be the cathode of the light-emitting element L, and the second electrode of the light-emitting sub-pixel 20 may be the anode of the light-emitting element L. The voltage signal received by the first electrode of the light-emitting sub-pixel 20 may be the negative power signal ELVSS. The second electrode of the light-emitting sub-pixel 20 receives a driving current, and the magnitude of the current of the driving current may be controlled by a driving transistor in the pixel driving circuit 21.

[0073] The anode of the light-emitting element L can receive a driving current via the pixel driving circuit 21, and the first electrode (e.g., cathode) of the light-emitting element L can receive the negative power signal ELVSS via the first voltage signal line ELVSS. The pixel driving circuit 21 may be connected between the positive power signal ELVDD and the anode of the light-emitting element L. The driving transistor in the pixel driving circuit 21 may generate a driving current based on the voltage difference between its gate and source, and drive the light-emitting element L to emit light.

[0074] As can be understood, in FIG. 6, only the case where the pixel driving circuit 21 is 2T1C is taken as an example for explanation, but the pixel driving circuit 21 may have a circuit structure such as 3T1C, 4T2C, 5T1C, 7T1C, 8T1C, etc., and is not limited here.

[0075] In the related art, the first electrodes (e.g., cathodes) of the light-emitting elements L in the light-emitting subpixels 20 are entirely covered by the display panel. In an optional embodiment of the present application, an isolation structure is provided between the first electrodes (e.g., cathodes) of the light-emitting elements L, and the isolation structure can block the first electrodes (e.g., cathodes) between adjacent light-emitting elements L to provide isolation and insulation, and can also communicate and electrically connect the first electrodes (e.g., cathodes) between adjacent light-emitting elements L.

[0076] When the isolation structure between the first electrodes (e.g., cathodes) of two adjacent light-emitting subpixels 20 is a conductive material, the first electrodes (e.g., cathodes) of the two adjacent light-emitting subpixels 20 are electrically connected by the isolation structure, and when the first voltage signal line ELVSS is electrically connected to the first electrode (e.g., cathode) of one of them, the same power supply signal can be supplied to the two first electrodes (e.g., cathodes).

[0077] If the isolation structure between the first electrodes (e.g., cathodes) corresponding to two adjacent light-emitting subpixels 20 can perform an insulating function, the isolation structure can insulate the first electrodes (e.g., cathodes) corresponding to two adjacent light-emitting subpixels 20, and when the first voltage signal line ELVSS is electrically connected to one of the first electrodes (e.g., cathode), the other first electrode (e.g., cathode) does not receive the power signal supplied by the voltage signal line.

[0078] 7, taking the first electrodes (e.g., cathodes) corresponding to two adjacent rows of light-emitting subpixels 20 as an example, in this embodiment, each set of light-emitting subpixels 20 only includes one row of light-emitting subpixels 20, AP is the pixel aperture area corresponding to each light-emitting subpixel 20, IS is the isolation structure of the light-emitting subpixels, and Area is the isolation area in the isolation structure between the two rows of light-emitting subpixels. The potentials of the first electrodes corresponding to the light-emitting subpixels 20 in the same row are consistent, and there is an insulation isolation between the first electrodes corresponding to the light-emitting subpixels 20 in different rows, so there may be a potential difference.

[0079] 8 shows a layer structure schematic diagram in which two rows of light-emitting sub-pixels 20 located in two adjacent sets are isolated and insulated by an isolation pillar, in which the cathodes of the two light-emitting sub-pixels 20 are connected to the same isolation pillar IS, and an interruption groove Area is provided in the isolation pillar IS, and the orthogonal projection of the interruption groove Area on the substrate is located between the orthogonal projections on the substrate of the two adjacent sets of light-emitting sub-pixels 20. The interruption groove Area interrupts the isolation pillar IS to form two sub-isolation pillars IS1, thereby realizing insulation between the two sub-isolation pillars IS1 and isolating the cathodes of the two light-emitting sub-pixels 20 from each other.

[0080] The manner in which the first electrodes corresponding to the light-emitting subpixels 20 in each row are isolated from each other may be to use the isolation structure to isolate the first electrodes corresponding to the light-emitting subpixels 20 in each row. For example, when the first signal module 11 is connected to the first electrodes corresponding to a row of light-emitting subpixels 20, the isolation structure can be provided to isolate the first electrodes of the light-emitting subpixels 20 in the row from the first electrodes of the light-emitting subpixels 20 in the adjacent row, and electrically connect the first electrodes corresponding to the light-emitting subpixels 20 in the row to each other.

[0081] Similarly, when the first signal module 11 is connected to first electrodes corresponding to multiple rows of light-emitting sub-pixels 20, the above-mentioned isolation structure can be provided to electrically connect the first electrodes of the multiple rows of light-emitting sub-pixels 20 to each other.

[0082] When the first voltage signal line ELVSS is connected to the first electrode corresponding to one or more rows of light-emitting subpixels 20 via the first signal module 11, the first voltage signal line ELVSS can supply the same voltage signal to all the light-emitting elements L in one or more rows of light-emitting subpixels 20, and the light-emitting elements L in the remaining rows of light-emitting subpixels 20 that are not connected to the first signal module 11 cannot receive a voltage signal via the first signal module 11.

[0083] In addition to the above-mentioned isolation structure, insulation and isolation between the light-emitting subpixels 20 in each row can be achieved in other ways. For example, the first electrodes (e.g., cathodes) of the light-emitting elements L in the light-emitting subpixels 20 are not entirely covered by the display panel, but the first electrodes of the light-emitting subpixels 20 in each row are arranged in order, and the first electrodes of the light-emitting subpixels 20 in adjacent rows are insulated from each other.

[0084] In the light-emitting element L of the light-emitting subpixel 20, a parasitic capacitance exists between the anode and cathode of the light-emitting element L. When the first signal module 11 is turned on, the light-emitting element L emits light with the driving current supplied by the pixel driving circuit 21. At this time, the parasitic capacitance can accumulate a certain charge. When the first signal module 11 is turned off, due to the characteristic that the voltage across the parasitic capacitance cannot change suddenly, the potential of the first electrode corresponding to each light-emitting subpixel 20 is still the signal voltage of the voltage signal, but as the electrons accumulated in the parasitic capacitance are continuously combined with holes in the light-emitting element L to emit light, the voltage across the parasitic capacitance gradually decreases, so that the potential of the first electrode of the light-emitting element L gradually approaches the potential of the second electrode, and at this time, the luminance of the light-emitting element L also gradually decreases. When the potential difference between the second electrode and the first electrode of the light-emitting element L, i.e., the voltage difference (Vn3-Vn4) between the N3 node and the N4 node, is reduced to be lower than the lighting voltage Von of the light-emitting element L, the light-emitting element L is turned off. That is, after the first signal module 11 is turned off, the potential of the first electrode corresponding to the light-emitting sub-pixel 20 connected to the first signal module 11 gradually approaches the potential of the second electrode, and the brightness of the light-emitting element L gradually decreases until it is turned off.

[0085] When the light-emitting element L of the light-emitting subpixel 20 is turned off, it corresponds to the light-emitting subpixel 20 being in a non-emitting stage. At this time, steps such as writing data voltages and initialization can be performed on one or more rows of light-emitting subpixels 20 in the non-emitting stage, so that when the light-emitting subpixels 20 enter the emitting stage again, they can display a target brightness corresponding to the data voltage.

[0086] In this embodiment, by providing a first signal module 11, one or more rows of light-emitting subpixels 20 can be connected to the first voltage signal line ELVSS through the first signal module 11. When the first signal module 11 is turned on, the first electrodes of the light-emitting subpixels 20 can receive the voltage signal provided by the first voltage signal line ELVSS and are in the light-emitting stage, but when the first signal module 11 is turned off, the first electrodes of the light-emitting subpixels 20 cannot receive the voltage signal and are in the non-light-emitting stage. By controlling the on / off of the first signal module 11, the light-emitting subpixels 20 can be switched between the light-emitting stage and the non-light-emitting stage, and each set of light-emitting subpixels 20 can be independently controlled. When a display panel is provided with a plurality of first signal modules 11, each set of light-emitting subpixels 20 can be independently controlled by the plurality of first signal modules 11, and each set of light-emitting subpixels 20 can be turned on.

[0087] Referring to FIG. 9, in some embodiments, the first signal module 11 may include a first transistor T1, a first pole of the first transistor T1 is connected to a first voltage signal line ELVSS, a second pole of the first transistor T1 is connected to a first electrode of a set of light-emitting sub-pixels 20, and a gate of the first transistor T1 is connected to a first control signal line EM.

[0088] The first control signal line EM may supply an emission signal and a non-emission signal, and the first transistor T1 is turned on by the emission signal and turned off by the non-emission signal.

[0089] Referring to FIG. 10, the high-level signal on the first control signal line EM is a non-light-emitting signal, and the low-level signal is a light-emitting signal. In the case of the high-level signal supplied by the first control signal line EM, the first signal module 11 is turned off. At this time, the potential of the N4 node, that is, the potential of the first electrode, gradually rises until the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 becomes lower than the lighting voltage. During the time interval of the high-level signal supplied by the first control signal line EM, the scanning signal supplies a high-level pulse as an enable signal to turn on the data writing transistor in the pixel driving circuit 21. At this time, the data signal Vdata can be written into the light-emitting sub-pixel 20, and the writing of the data signal in the non-light-emitting stage can be realized.

[0090] Referring to FIG. 11, in some embodiments, the power supply selection circuit may further include a second signal module 12, and the voltage signal line may further include a second voltage signal line. Exemplarily, in FIG. 11, the second voltage signal line is REF, but it is not limited thereto.

[0091] The second signal module 12 includes a first end, a second end, and a control end. The first end of the second signal module 12 is connected to the second voltage signal line, the second end of the second signal module 12 is connected to the second end of the first signal module 11, and the control end of the second signal module 12 is connected to the second control signal line. In FIG. 11, the second control signal line is Ex.

[0092] In the non-light-emitting stage, the voltage signal on the second voltage signal line is greater than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the lighting voltage of the light-emitting sub-pixel 20. That is, when the second voltage signal line supplies a voltage signal to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is smaller than the lighting voltage of the light-emitting sub-pixel 20. At this time, the light-emitting sub-pixel 20 does not emit light.

[0093] When the second signal module 12 is turned on, the first electrode corresponding to the light-emitting subpixel 20 can receive the voltage signal provided by the second voltage signal line through the second signal module 12, and the potential of the first electrode corresponding to the light-emitting subpixel 20 becomes the signal voltage of the second voltage signal line. At this time, the voltage difference between the second electrode and the first electrode corresponding to the light-emitting subpixel 20 is lower than the lighting voltage of the light-emitting subpixel 20. That is, when the second signal module 12 is turned on, the second voltage signal line can adjust the potential of the first electrode corresponding to the light-emitting subpixel 20, so that the light-emitting element L in the light-emitting subpixel 20 is turned off because the voltage difference between both ends is lower than the lighting voltage.

[0094] Take the first electrode as an example, in order to make the voltage across the light-emitting element L lower than the lighting voltage, the voltage signal needs to raise the potential of the first electrode, that is, the signal voltage of the voltage signal needs to be higher than the signal voltage of the voltage signal. When the first signal module 11 is turned on, the voltage signal cannot raise the potential of the first electrode. Therefore, when the second signal module 12 is turned on, the first signal module 11 is in a cut-off state, so as to effectively adjust the potential of the first electrode.

[0095] Referring to FIG. 12, the first signal module 11 may include a first transistor T1, a first electrode of the first transistor T1 is connected to a first voltage signal line ELVSS, a second electrode of the first transistor T1 is connected to a first electrode of a set of light-emitting sub-pixels 20, and a gate of the first transistor T1 is connected to a first control signal line EM.

[0096] The second signal module 12 may include a second transistor T2 having a first terminal connected to the initialization signal line, a first terminal connected to the second voltage signal line, a second terminal connected to the second terminal of the first transistor T1, and a gate connected to the second control signal line.

[0097] In some embodiments, the type of the first transistor T1 may be opposite to the type of the second transistor T2, and the signal on the first control signal line EM and the signal on the second control signal line may be the same signal.

[0098] In some embodiments, the first control signal line EM and the second control signal line may be the same signal line, i.e., the same signal line is connected to the gate of the first transistor T1 and the gate of the second transistor T2, respectively.

[0099] As can be seen, for the same control signal, the conduction states of different types of transistors are opposite, i.e. when one transistor is conducting, the other transistor is in a cut-off state.

[0100] As an alternative embodiment, one of the first transistor T1 and the second transistor T2 may be an N-type transistor, and the other may be a P-type transistor. When the first transistor T1 and the second transistor T2 are N-type and P-type, respectively, the same control signal can make both transistors in opposite states, that is, only one of the first transistor T1 and the second transistor T2 is in a conductive state. When the first transistor T1 is conductive, the light-emitting sub-pixel 20 is in a light-emitting state, and when the second transistor T2 is conductive, the light-emitting sub-pixel 20 is in a non-light-emitting state.

[0101] In some embodiments, the type of the first transistor T1 may be the same as the type of the second transistor T2, and the signal on the first control signal line EM and the signal on the second control signal line may be inverse signals.

[0102] The signal on the first control signal line EM and the signal on the second control signal line are opposite signals, meaning that when the first control signal line EM supplies a conducting signal to drive the first transistor T1 to be conductive, the second control signal line supplies a blocking signal to drive the second transistor T2 to be blocked, or when the second control signal line supplies a conducting signal to drive the second transistor T2 to be conductive, the first control signal line EM supplies a blocking signal to drive the first transistor T1 to be blocked.

[0103] In some embodiments, the signal on the first control signal line EM and the signal on the second control signal line are both step transition signals.

[0104] Taking the first control signal line EM as an example, when each first control signal line EM supplies a gradually changing effective signal to each first signal module 11, each first signal module 11 sequentially disconnects the first electrode of the corresponding light-emitting sub-pixel and the first voltage signal line one by one.

[0105] Similarly, when each second control signal line respectively supplies a stepwise varying effective signal to each second signal module 12, each second signal module 12 sequentially communicates the first electrode of the corresponding light-emitting subpixel with the second voltage signal line one by one. For a certain set of light-emitting subpixels 20, when it communicates with the first voltage signal line, it is in the light-emitting stage, and the light-emitting subpixel 20 can emit light when it receives a driving current; when it cuts off the first voltage signal line and communicates with the second voltage signal line, thereby reducing the voltage (Vn3-Vn4) between the second electrode and the first electrode of the light-emitting element L to be lower than the lighting voltage Von of the light-emitting element L, it is in the non-light-emitting stage, and the light-emitting subpixel 20 does not emit light.

[0106] In some embodiments, the signal duty ratio of the first control signal line EM and the signal duty ratio of the second control signal line can both be adjusted.

[0107] When the first control signal line EM supplies a conducting signal, the first transistor T1 is in a conducting state, and at this time the light-emitting sub-pixel 20 connected to the first transistor T1 can emit light. When the first control signal line EM supplies a blocking signal, the first transistor T1 is in a blocking state, and at this time the light-emitting sub-pixel 20 connected to the first transistor T1 does not emit light. By adjusting the duty ratio of the first control signal line EM, the actual light-emitting time of the light-emitting sub-pixel 20 in the light-emitting stage of a single light-emitting frame can be further adjusted, and the light-emitting brightness can be adjusted in a PWM driving manner.

[0108] Referring to FIG. 13, in some embodiments, the second voltage signal line may be an initialization signal line, and the second control signal line may be a row driving signal line.

[0109] Taking a single first signal module 11 as an example in a single light-emitting frame, the first control signal line EM can supply a non-light-emitting signal within a first time period, and the first signal module 11 receives the non-light-emitting signal within the first time period and turns off, at this time, the light-emitting sub-pixel 20 connected to the first signal module 11 is in a non-light-emitting stage.

[0110] The row driving signal line can provide the initialization control signal within the second time period, and the second signal module 12 can receive the initialization control signal within the second time period and turn on. When the second signal module 12 is turned on, the initialization signal provided by the initialization signal line can raise the potential of the first electrode, so that the voltage across the light-emitting element L can be reduced to below the lighting voltage more quickly, and the light-emitting subpixel 20 can be quickly turned off. At this time, in order to raise the potential of the first electrode, it is necessary to avoid communication between the first voltage signal line ELVSS and the first electrode, that is, the first signal module 11 should always maintain a cut-off state within the second time period in which the second signal module 12 is turned on. Therefore, the first time period in which the first control signal line EM provides a non-emitting signal includes the second time period of the initialization control signal provided by the row driving signal line, so that when the second signal module 12 is turned on, the first signal module 11 is in a stable cut-off state.

[0111] 14, a high level signal of the first control signal line EM is a non-emitting signal, and a low level signal is an emitting signal. When the first control signal line EM provides a high level signal, the first signal module 11 is turned off. In the initialization control signal provided by the row driving signal line, a low level is an enabling signal, and when the row driving signal line is a low level signal, the second signal module 12 is turned on. At this time, the potential of the N4 node, i.e., the potential of the first electrode, rises rapidly to the initialization voltage Vref, so that the voltage difference between the second electrode and the first electrode of the light-emitting subpixel 20 is lower than the lighting voltage.

[0112] During the time period when the first signal module 11 is turned off and the second signal module 12 is turned on, the scanning signal Scan2 provides a high-level pulse as an enable signal to turn on the data writing transistor in the pixel driving circuit 21, and at this time, the data signal Vdata can be written to the light-emitting sub-pixel 20, so as to realize data signal writing in the non-light-emitting stage.

[0113] The first transistor T1 and the second transistor T2 may be P-type transistors. In the related art, the transistors provided in the display panel are usually TFTs (Thin Film Transistors), and the TFTs include N-type TFTs and P-type TFTs. The P-type TFTs are usually LTPS (Low Temperature Poly-Silicon) TFTs, and the N-type TFTs are usually oxide transistors such as IGZO (Indium Gallium Zinc Oxide) TFTs. The LTPS TFTs have features such as a smaller area and higher mobility than the IGZO TFTs, so that the first electrode and the signal line are connected using the P-type transistors, which can improve the charging efficiency of the first electrode and reduce the overall area of ​​the power supply selection circuit.

[0114] In some embodiments, the second voltage signal line may be a positive power supply signal line.

[0115] The positive power signal line can supply a positive power signal ELVDD to the light-emitting subpixel 20. When the second signal module 12 is turned on, the first electrode corresponding to the light-emitting subpixel 20 is connected to the second voltage signal line, and the voltage difference between the second electrode and the first electrode corresponding to the light-emitting subpixel 20 is lower than the lighting voltage, and the light-emitting element L is in an off state.

[0116] Since the positive power supply signal line is a power supply signal line necessary for the light-emitting subpixel 20 to emit light, by using the positive power supply signal line as the second voltage signal line as it is, the potential difference between the second electrode and the first electrode of the light-emitting subpixel 20 can be made lower than the lighting voltage, and the light-emitting subpixel 20 can be put into a non-light-emitting stage. Compared to adopting a second voltage signal line that supplies another voltage signal and directly multiplexing the second voltage signal line to form the second voltage signal line, the number of signal wirings in the display panel can be reduced, and the difficulty of wiring can be reduced.

[0117] 15, a high-level signal of the first control signal line EM is a non-emitting signal, and a low-level signal is an emitting signal. When the first control signal line EM provides a high-level signal, the first signal module 11 is turned off and the second signal module 12 is turned on. At this time, the potential of the N4 node, i.e., the potential of the first electrode, rises rapidly to the second power signal ELVDD, so that the voltage difference between the second electrode and the first electrode of the emitting sub-pixel 20 becomes lower than the lighting voltage.

[0118] During the time period when the first signal module 11 is turned off and the second signal module 12 is turned on, the scanning signal Scan provides a high-level pulse as an enable signal to turn on the data writing transistor in the pixel driving circuit 21. At this time, the data signal Vdata can be written into the light-emitting sub-pixel 20, and the data signal writing can be realized in the non-light-emitting stage.

[0119] An embodiment of the present application further provides a display panel, which may include a plurality of sets of light-emitting sub-pixels 20 arranged in an array and a power supply selection module 1. The power supply selection module 1 may be the power supply selection module 1 in the above embodiment.

[0120] Taking as an example that the number of rows of the light-emitting sub-pixels in a plurality of sets of light-emitting sub-pixels 20 arranged in an array is n, each set of light-emitting sub-pixels 20 may include x consecutive rows of light-emitting sub-pixels 20 or x rows of light-emitting sub-pixel units. One light-emitting sub-pixel unit includes at least two different light-emitting sub-pixels 20, x < n, and x is a positive integer.

[0121] Note that among the two sets of light-emitting sub-pixels shown in FIG. 7, one set of light-emitting sub-pixels may be configured such that the light-emitting sub-pixel units and the light-emitting sub-pixels 20 are arranged at intervals.

[0122] When x = 1, the number of sets of the plurality of sets of light-emitting sub-pixels 20 is the number of rows of the light-emitting sub-pixels 20 in the display panel. When x > 1, the number of sets of the plurality of sets of light-emitting sub-pixels 20 is the number of rows of the light-emitting sub-pixels 20 in the display panel divided by the number of rows of the light-emitting sub-pixels x in each set of light-emitting sub-pixels 20, that is, (n / x).

[0123] In the same set of light-emitting sub-pixels 20, the first electrodes corresponding to any two light-emitting sub-pixels 20 are electrically connected. That is, in the same set of light-emitting sub-pixels 20, the potentials of the first electrodes corresponding to all the light-emitting sub-pixels 20 are the same.

[0124] In different sets of light-emitting sub-pixels 20, the first electrodes corresponding to any two light-emitting sub-pixels 20 are isolated and insulated from each other. That is, for two light-emitting sub-pixels 20 located in different sets of light-emitting sub-pixels 20, the corresponding first electrodes may be the same or different.

[0125] One power supply selection circuit is connected to the first electrodes of one set of light-emitting sub-pixels 20. When the display panel includes a plurality of sets of light-emitting sub-pixels 20, a plurality of power supply selection modules 1 can be installed so as to be connected to the plurality of sets of light-emitting sub-pixels 20 in a one-to-one correspondence. The first end of each power supply selection module 1 is connected to the voltage signal line, the first end of each power supply selection module 1 is connected to the first electrode corresponding to one set of light-emitting sub-pixels 20, and the control end of each power supply selection module 1 is connected to the first control signal line EM.

[0126] In this embodiment, a plurality of power selection modules 1 are respectively connected to the first electrodes of the light-emitting subpixels 20 of each set, so that the light-emitting states of the light-emitting subpixels 20 of each set can be respectively controlled by the power selection modules 1. By sequentially controlling each power selection module 1 to be off, the light-emitting subpixels 20 of each set of light-emitting subpixels 20 can be sequentially put into a non-emitting stage, and by sequentially controlling each power selection module 1 to be on, the light-emitting subpixels 20 of each set of light-emitting subpixels 20 can be sequentially put into a light-emitting stage. The light-emitting stage and non-emitting stage of each set of light-emitting subpixels 20 can be independently adjusted, so that lighting of each set of light-emitting subpixels 20 can be realized.

[0127] In some embodiments, the first electrodes of light-emitting subpixels 20 in adjacent rows in the same set or in light-emitting subpixel units in adjacent rows are electrically connected via isolation pillars.

[0128] When a set of light-emitting subpixels 20 includes at least two rows of light-emitting subpixels 20, the first electrodes of the light-emitting subpixels 20 in adjacent rows may be electrically connected via isolation pillars, and when the first electrodes of the light-emitting subpixels 20 in any row are connected to a voltage signal line via a power selection circuit, this corresponds to the light-emitting subpixels 20 in the adjacent row that are electrically connected to the light-emitting subpixels 20 in that row via the isolation pillars being also connected to the voltage signal line.

[0129] 8, in some embodiments, an isolation pillar IS between light-emitting subpixels 20 in different sets and adjacent rows or light-emitting subpixels 20 in light-emitting subpixel units in different sets and adjacent rows is provided with a blocking groove Area, which can separate the isolation pillar IS into two sub-isolation pillars IS1, and the two sub-isolation pillars IS1 are respectively a first sub-isolation pillar and a second sub-isolation pillar. The first sub-isolation pillar and the second sub-isolation pillar are insulated from each other.

[0130] In two adjacent pixel rows located in different sets, the light-emitting subpixels 20 in one row or the light-emitting subpixels 20 in one row of light-emitting subpixel units are electrically connected to the first sub-isolation pillars, and the light-emitting subpixels 20 in the other row or the light-emitting subpixels 20 in the other row of light-emitting subpixel units are electrically connected to the second sub-isolation pillars, that is, the first electrodes of the two adjacent pixel rows located in different sets are insulated from each other.

[0131] In some embodiments, the isolation posts may include metal isolation posts.

[0132] In some embodiments, in a direction perpendicular to the extension direction of a single set of light-emitting subpixels 20, the cross-sectional shape of the isolated pillar conductive portion may include, but is not limited to, a T-shape or an inverted trapezoid.

[0133] As an optional embodiment, the power supply selection circuit may be connected to the isolation pillar. The isolation pillar may communicate with the light-emitting subpixels 20 of two adjacent rows of the same set of light-emitting subpixels 20, so that when the power supply selection circuit is turned on, the voltage signal of the voltage signal line may be transmitted to the isolation pillar, which may supply the voltage signal to the first electrodes of the light-emitting subpixels 20 of the two adjacent rows. At the same time, the light-emitting subpixels 20 of other rows in the same set that are directly or indirectly electrically connected to the light-emitting subpixels 20 of the two adjacent rows may also receive the voltage signal.

[0134] 16, taking as an example a single set of light-emitting subpixels 20 including x rows of consecutive light-emitting subpixels 20 in FIG. 16, n / 2 power selection modules 1 are installed corresponding to n rows and m columns of light-emitting subpixels 20. As shown in FIG. 12, the n / 2 power selection modules 1 are respectively connected to first control signal lines EM_1, EM_2, ..., EM_n / 2. By outputting light-emitting control signals for each row via the multiple first control signal lines EM, it is possible to realize conduction of each of the n / 2 power selection modules 1.

[0135] 17, when a single set of light-emitting subpixels 20 includes x consecutive rows of light-emitting subpixels 20, taking the first control signal line EM_1 as an example, when the first control signal line EM_1 supplies a high level signal, the light-emitting subpixels 20 in the first and second rows are all in a non-emitting state, and at this time, the data signals can be sequentially written to the light-emitting subpixels 20 in the first and second rows by sequentially supplying the scan signals Scan_1 and Scan_2. Similarly, when the first control signal line EM_n / 2 supplies a high level signal, the light-emitting subpixels 20 in the n-1th and nth rows are all in a non-emitting state, and at this time, the data signals can be sequentially written to the light-emitting subpixels 20 in the n-1th and nth rows by sequentially supplying the scan signals Scan_1 and Scan_2.

[0136] Similarly, Figures 18 and 20 respectively show circuit structure schematic diagrams of display panels in other two embodiments of the power selection module 1. Figures 18 and 20 both take as an example that a single set of light-emitting sub-pixels 20 includes x rows of consecutive light-emitting sub-pixels 20. Figure 19 is a signal timing chart corresponding to the circuit architecture of Figure 18, and Figure 21 is a signal timing chart corresponding to the circuit architecture of Figure 20.

[0137] In some embodiments, the display panel may further include a plurality of scanning signal lines, each of which is electrically connected to a corresponding row of light-emitting sub-pixels 20. The plurality of scanning signal lines can output enable levels of the scanning signals row by row, so that the light-emitting sub-pixels 20 in each row can be written with data voltage signals row by row.

[0138] When each set of light-emitting subpixels 20 includes one row of light-emitting subpixels 20, the light-emitting subpixels 20 in each row are connected to one power selection module 1 and one scanning signal line. When the power selection module 1 corresponding to the light-emitting subpixels 20 in the row is in an off state, the light-emitting subpixels 20 in the row are in a non-emitting stage, at this time, the scanning signal line provides an enable valid level to the light-emitting subpixels 20 in the row to make the data-writing transistors in the pixel driving circuits 21 conductive, and the data voltage can be written to the light-emitting subpixels 20 through the data-writing transistors.

[0139] When the power selection module 1 is in an on state, the light-emitting sub-pixel 20 in the row is in a light-emitting stage, and the data voltage signal written in the non-light-emitting stage can cause the driving transistor in the pixel driving circuit 21 to generate a corresponding driving current, so as to display the target brightness corresponding to the light-emitting sub-pixel 20.

[0140] When each set of light-emitting subpixels 20 includes at least two rows of light-emitting subpixels 20, the number of corresponding scan signal lines for a single set of light-emitting subpixels 20 is the number of rows of light-emitting subpixels 20. For example, when a single set of light-emitting subpixels 20 includes three rows of light-emitting subpixels 20, the single set of light-emitting subpixels 20 corresponds to three scan signal lines.

[0141] It can be understood that multiple light-emitting subpixel rows in the same set of light-emitting subpixels 20 have the feature of state synchronization. Take a single set of light-emitting subpixels 20 as an example, where the set of light-emitting subpixels 20 includes three rows of light-emitting subpixels 20, when the power selection module 1 is turned on, the three light-emitting subpixel rows are all in the light-emitting stage, and when the power selection module 1 is turned off, the three light-emitting subpixel rows are all in the non-light-emitting stage.

[0142] In a single light-emitting frame, the first control signal line EM may provide a non-light-emitting signal within a first time period, when the first signal module 11 is in a cut-off state within the first time period, and the three light-emitting subpixel rows are all in a non-light-emitting stage, in which the three scanning signal lines corresponding to the set of light-emitting subpixels 20 sequentially output the enable active levels of the three scanning signals row by row, so that the three light-emitting subpixel rows complete the writing of the data signals row by row.

[0143] In some embodiments, in a single image frame, the time length of the first time interval of the first signal module 11 is t1, and the time length of the time interval of the enable active level of the scanning signal is t2.

[0144] TIFF2025079797000002.tif21170

[0145] That is, the time length during which the x rows of light-emitting sub-pixels 20 sequentially complete x data signal writings should be in the off state of the first signal module 11. That is, the turn-off time of the first signal module 11 should include the enable active levels of at least x scanning signals.

[0146] In some embodiments, the display panel may include a display area and a non-display area, with the light-emitting sub-pixels 20 located in the display area and the power selection circuitry located in the non-display area.

[0147] The power supply selection module 1 is provided in the non-display area, and can connect the first electrodes corresponding to the light-emitting subpixels 20 to the boundary area between the display area and the non-display area via signal wiring. The display area includes only the light-emitting subpixels 20, which can realize the lighting function for each row of light-emitting subpixels, and can effectively reduce the number of transistors in the pixel driving circuit 21 in the light-emitting subpixels 20, reduce the area of ​​a single light-emitting subpixel 20, and improve the PPI of the display panel. The power supply selection module 1 is provided in the non-display area, which can avoid occupying the area of ​​the display area, and can also improve the PPI of the display panel.

[0148] In some embodiments, the non-display area may be located on at least one side of the display area, and the power selection circuit in the non-display area may connect the first electrodes corresponding to the light-emitting subpixels 20 to the boundary area between the display area and the non-display area via signal lines.

[0149] In some embodiments, the non-display area is located on opposite sides of the display area, i.e., the non-display area may include a first non-display area and a second non-display area, the first non-display area being located on one side of the display area along a first direction, and the second non-display area being located on the other side of the display area along the first direction, where both the first non-display area and the second non-display area include a power selection circuit.

[0150] For one of the multiple sets of light-emitting subpixels 20, the light-emitting subpixels 20 of that set may be connected to the power supply selection circuit in the first non-display region, or may be connected to the power supply selection circuit in the second non-display region.

[0151] In some embodiments, the first electrodes of the light-emitting subpixels 20 in the same row or the light-emitting subpixels 20 in the same row of light-emitting subpixel units are respectively connected to the power supply selection circuits in multiple non-display areas.

[0152] Multiple power supply selection circuits may be connected to a set of light-emitting subpixels 20. The multiple power supply selection circuits may be controlled by the same control signal. Compared with connecting a single power supply selection module 1 to a set of light-emitting subpixels 20, multiple power supply selection modules 1 and a set of light-emitting subpixels 20 can effectively reduce the number of light-emitting subpixels 20 that need to be driven by a single power supply selection module 1, and improve the driving capability of the power supply selection module 1.

[0153] In some embodiments, the first electrodes of the light-emitting subpixels 20 in the same row or the light-emitting subpixels 20 in the light-emitting subpixel units in the same row are connected to two power supply selection circuits, and of the two power supply selection circuits connected to the first electrodes of the light-emitting subpixels 20 in the same row or the light-emitting subpixels 20 in the light-emitting subpixel units in the same row, one power supply selection circuit is located in the non-display area on the display area side, and the other power supply selection circuit is located in the non-display area on the opposite side of the display area.

[0154] Of the two power supply selection modules 1 connected to the light-emitting subpixels 20 in the same row, one is connected to the first electrode corresponding to the light-emitting subpixel 20 from the first non-display region via a signal wiring, and the other is connected to the first electrode corresponding to the light-emitting subpixel 20 from the second non-display region via a signal wiring. The light-emitting subpixels 20 in the same row may be connected to two power supply selection modules 1 on both sides of the display region, respectively.

[0155] Compared with connecting a single power supply selection module 1 to a set of light-emitting subpixels 20, providing two power supply selection modules 1 on both sides of the display area can effectively reduce the number of light-emitting subpixels 20 that need to be driven by a single power supply selection module 1 and improve the driving capability of the power supply selection module 1. In addition, providing two power supply selection modules 1 separately on both sides of the display area can prevent luminance unevenness between light-emitting subpixels 20 that are far away and light-emitting subpixels 20 that are close to each other in the same row in a single power supply module, thereby improving the luminance uniformity of the display panel.

[0156] In addition, the installation method of the multiple power source selection modules 1 may be such that all of the power source selection modules 1 are installed in the first non-display area, all of the power source selection modules 1 are installed in the second non-display area, or some of the power source selection modules 1 are installed in the first non-display area and some other power source selection modules 1 are installed in the second non-display area.

[0157] In some embodiments, two power selection modules 1 corresponding to any two adjacent sets of light-emitting sub-pixels 20 are respectively located in a first non-display area and a second non-display area. That is, the plurality of power selection modules 1 are alternately provided in the first non-display area and the second non-display area.

[0158] By alternately installing the plurality of power selection modules 1 in the first non-display area and the second non-display area respectively, it is possible to avoid having too many power selection modules 1 included in one of the first non-display area and the second non-display area, avoid the frame area from being too large, and achieve the effect of a narrow frame.

[0159] In some embodiments, the display panel may further include a plurality of shift register units.

[0160] The plurality of shift register units are provided in the non-display area, and each shift register unit is connected to a corresponding first control signal line EM. That is, the plurality of shift register units generate a light-emitting control signal for each row. The first control signal line EM may extend into the non-display area and be connected to the power selection module 1.

[0161] Both the shift register unit and the first control signal line EM are located in the non-display area. By significantly reducing the length of the signal wiring, it is possible to avoid the impedance in the signal wiring from affecting the light-emitting control signal, and it is also possible to reduce the number of signal wirings in the display area.

[0162] 22 to 27 show signal timing charts of a single light-emitting frame and schematic diagrams of the light-emitting states of the light-emitting subpixels 20 in each row in three driving methods, respectively. Here, FIG. 22 shows a signal timing chart of the light-emitting subpixels 20 in the related art, which cannot realize light emission for each row or each group by reducing the number of transistors in the pixel driving circuit 21. FIG. 23 shows a schematic diagram of the light-emitting states of the light-emitting subpixels 20 in each row in the signal timing chart of FIG. 22. In FIG. 23, the horizontal direction indicates each step number in a single light-emitting frame, and the vertical direction indicates the row number of the light-emitting subpixels 20 in each row. That is, the first frame includes n data write steps and one light-emitting step L. The first data write step writes data to the light-emitting subpixels in the first row, and the nth data write step writes data to the light-emitting subpixels in the nth row. Because all the light-emitting sub-pixels 10 need to enter the non-light-emitting stage synchronously and the data voltage Vdata needs to be written row by row in the non-light-emitting stage, the duration of the non-light-emitting stage is at least the sum of the duration of n data writing stages, and therefore the duration of the light-emitting stage is significantly reduced. In this case, the time during which none of the light-emitting sub-pixels 10 emits light in a single light-emitting frame will be significantly increased, and the probability that all pixels will be off at any given time will be significantly increased, causing a visually serious flickering phenomenon.

[0163] 24 is a signal timing chart of each row of the light-emitting sub-pixels 20 in the driving method adopted in the embodiment of the present application. As shown in FIG. 24, taking an example in which each set of light-emitting sub-pixels 20 includes one row, the non-emitting stages of each set of light-emitting sub-pixels 20 are offset from each other, so that only some of the light-emitting sub-pixels 20 do not emit light at any time, and the blinking phenomenon can be effectively improved.

[0164] Fig. 25 is a schematic diagram showing the light emitting state of each row of light emitting subpixels 20 according to the signal timing control of Fig. 24. As can be seen, the light emitting subpixels in the first row perform data writing in the first stage, the light emitting subpixels in the second row perform data writing in the second stage, and the light emitting subpixels in the nth row perform data writing in the nth stage. The light emitting subpixels 20 in each row can perform data writing independently, which can greatly increase the proportion of the time length of the light emitting stage in a single light emitting frame.

[0165] In an alternative embodiment, when the shift register unit provides EM signals to the light-emitting subpixels 20 in each row as shown in FIG. 26, the shift register unit can also adjust the duty ratio of the light-emitting control signal. FIG. 27 is a schematic diagram showing the light-emitting states of the light-emitting subpixels 20 in each row under the signal timing control of FIG. 26. As shown in FIG. 27, by controlling the duty ratio of the EM signal in the light-emitting stage, the light-emitting subpixels can be put into a non-emitting state when the EM signal is a non-enabling signal in the light-emitting stage. By adjusting the duty ratio of the light-emitting control signal, the total time length that the light-emitting subpixels 20 actually emit light in the light-emitting stage of a single light-emitting frame can be adjusted and controlled, thereby realizing a PWM (Pulse Width Modulation) dimming function.

[0166] 28 shows a schematic diagram of the voltage and current waveforms in the driving light emitting method in the above embodiment. Taking the voltage signal on the voltage signal line as an example, ELVDD, when the EM signal transitions from low level to high level, the voltage at the N4 node gradually rises to ELVDD, at this time, the voltage difference between the second electrode and the first electrode of the light emitting subpixel 20 is smaller than the lighting voltage Von, the light emitting subpixel does not emit light, and the light emitting current flowing through the light emitting subpixel 20 is approximately 0. When the EM signal transitions from high level to low level, the potential of the first electrode of the light emitting subpixel 20 gradually decreases to ELVSS, at this time, the light emitting subpixel 20 emits light normally, and the light emitting current flowing through the light emitting subpixel 20 is related to the data voltage written to the pixel driving circuit 21.

[0167] An embodiment of the present application further provides a display device, and referring to FIG. 29, the display device may be a PC, a television, a display, a mobile terminal, a tablet computer, a wearable device, etc., and the display device may include a display panel according to an embodiment of the present application.

[0168] The functional blocks shown in the above structural block diagram may be realized by hardware, software, firmware, or a combination thereof. When realized by hardware, it may be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When realized by software, the elements of the present application are programs or code segments for performing the necessary tasks. The programs or code segments may be stored in a machine-readable medium, or may be transmitted by a data signal contained in a carrier wave over a transmission medium or a communication link. The "machine-readable medium" may include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROMs, flash memories, erasable ROMs (EROMs), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. The code segments may be downloaded over a computer network, such as the Internet, an intranet, etc.

[0169] It should be noted that, as used herein, the terms "comprises," "comprises," or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or device comprising a set of elements not only includes those elements, but also includes other elements not expressly listed or that are inherent to such process, method, article, or device.

[0170] In this specification, the principles and embodiments of the present application are described using specific examples, but the description of the above examples is only to facilitate understanding of the method and central idea of ​​the present application. It should be noted that the above is only a preferred embodiment of the present application, and due to the finiteness of the written expression, there are objectively infinite specific structures, and those skilled in the art may make some improvements, modifications or changes without departing from the principles of the present application, and may combine the above technical features in an appropriate manner. These improvements, modifications, changes, or combinations, or the direct application of the concepts and technical solutions of the present application to other cases without improvements, shall all be considered as the protection scope of the present application.

Claims

1. a voltage signal line for transmitting a voltage signal to a first electrode of the light-emitting subpixel and controlling at least two sets of the light-emitting subpixels to emit light for each set; A power supply selection circuit, wherein a set of the light-emitting subpixels includes at least one row of the light-emitting subpixels or at least one row of light-emitting subpixel units, and a light-emitting subpixel unit includes at least two different types of the light-emitting subpixels.

2. the voltage signal line intermittently transmits a voltage signal that is smaller than a difference between a second electrode voltage of the light-emitting subpixel and a lighting voltage of the light-emitting subpixel; the voltage signal line transmits, in a time division manner, a voltage signal smaller than a difference between a second electrode voltage of the light emitting subpixel and a lighting voltage of the light emitting subpixel, and a voltage signal larger than a difference between the second electrode voltage of the light emitting subpixel and a lighting voltage of the light emitting subpixel; The power supply selection circuit according to claim 1 , wherein among the at least two different types of light-emitting sub-pixels, the light-emitting sub-pixels at least partially different from each other are located in different rows.

3. Further comprising a first signal module, the voltage signal line comprising a first voltage signal line; A first end of the first signal module is connected to the first voltage signal line, a second end of the first signal module is connected to a first electrode of a set of the light-emitting sub-pixels, and a control end of the first signal module is connected to a first control signal line; 2 . The power supply selection circuit of claim 1 , wherein in the light emitting step, the voltage signal transmitted to the first voltage signal line is smaller than a difference between a second electrode voltage of the light emitting sub-pixel and a lighting voltage of the light emitting sub-pixel.

4. Further comprising a second signal module, the voltage signal line further comprising a second voltage signal line; A first end of the second signal module is connected to the second voltage signal line, a second end of the second signal module is connected to the second end of the first signal module, and a control end of the second signal module is connected to a second control signal line; In a non-light emitting step, the voltage signal transmitted to the second voltage signal line is greater than a difference between the second electrode voltage of the light emitting sub-pixel and the lighting voltage of the light emitting sub-pixel; The first signal module includes a first transistor, a first pole of the first transistor is connected to the first voltage signal line, a second pole of the first transistor is connected to a first electrode of a set of the light-emitting sub-pixels, and a gate of the first transistor is connected to the first control signal line; 4. The power supply selection circuit of claim 3, wherein the second signal module includes a second transistor, a first pole of the second transistor is connected to the second voltage signal line, a second pole of the second transistor is connected to the second pole of the first transistor, and a gate of the second transistor is connected to the second control signal line.

5. the first transistor type and the second transistor type are opposite, and the signal on the first control signal line and the signal on the second control signal line are the same signal; the first control signal line and the second control signal line are the same signal line, 5. The power supply selection circuit according to claim 4, wherein the first transistor type and the second transistor type are the same, and the signal on the first control signal line and the signal on the second control signal line are opposite signals.

6. the signal on the first control signal line and the signal on the second control signal line are both stepwise change signals, 6. The power supply selection circuit according to claim 4, wherein a signal duty ratio in the first control signal line and a signal duty ratio in the second control signal line are both adjustable.

7. A power supply selection circuit according to any one of claims 1 to 6, and a plurality of sets of light-emitting sub-pixels arranged in an array, Each of the light-emitting subpixels in each set includes at least one row of the light-emitting subpixels or at least one row of light-emitting subpixel units, and each of the light-emitting subpixel units includes at least two different light-emitting subpixels, and the first electrodes of the light-emitting subpixels in the same set are electrically connected to each other, and the first electrodes of the light-emitting subpixels in different sets are insulated from each other; A display panel, comprising: a power supply selection circuit connected to the first electrodes of a set of the light-emitting sub-pixels.

8. The first electrodes of the light-emitting subpixels in adjacent rows in the same set or the light-emitting subpixel units are electrically connected via isolation pillars; the isolation pillar between the light-emitting subpixels or the light-emitting subpixels in the light-emitting subpixel units located in different sets and adjacent rows is provided with a blocking groove for dividing the isolation pillar into a first sub-isolation pillar and a second sub-isolation pillar, the first sub-isolation pillar and the second sub-isolation pillar are insulated from each other, the light-emitting subpixels or the light-emitting subpixels in the light-emitting subpixel units of one row located in different sets and adjacent rows are electrically connected to the first sub-isolation pillar, and the light-emitting subpixels or the light-emitting subpixels in the light-emitting subpixel units of another row located in different sets and adjacent rows are electrically connected to the second sub-isolation pillar; the power source selection circuit is electrically connected to the isolation posts; the isolation posts include metal isolation posts; 8. The display panel of claim 7, wherein in a direction perpendicular to an extension direction of the single set of light-emitting sub-pixels, a cross-sectional shape of the conductive portion of the isolation pillar comprises a T-shape or an inverted trapezoid.

9. the display panel includes a display area and a non-display area, the light-emitting sub-pixels are located in the display area, and the power supply selection circuit is located in the non-display area; the non-display area is located on at least one side of the display area, the non-display areas are located on opposite sides of the display area, and each of the non-display areas includes the power supply selection circuit; The first electrodes of the light-emitting subpixels or the light-emitting subpixels in the light-emitting subpixel unit in the same row are connected to a plurality of the power supply selection circuits; 9. The display panel of claim 8, wherein first electrodes of the light-emitting subpixels in the same row or the light-emitting subpixels in the light-emitting subpixel unit are connected to two of the power supply selection circuits, and of the two power supply selection circuits connected to the first electrodes of the light-emitting subpixels in the same row or the light-emitting subpixels in the light-emitting subpixel unit, one of the power supply selection circuits is located in the non-display area on the display area side, and the other of the power supply selection circuits is located in the non-display area on the opposite side of the display area.

10. A display device comprising the display panel according to any one of claims 7 to 9.

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