Memory driving device, optical transmission system, and memory driving method

The memory driving device addresses the challenge of high-speed memory access using CXL by aggregating data from consecutive addresses and notifying memory devices with incompatible standards, thereby improving communication speed and system performance.

JP2025079967APending Publication Date: 2025-05-23FUJITSU LTD
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Patent Information

Application Number
JP2023192880
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-11-13
Publication Date
2025-05-23

AI Technical Summary

Technical Problem

The existing technologies face challenges in achieving high-speed memory access using CXL, as optical transmission devices cannot access memory devices with incompatible communication standards, leading to limited communication speed.

Method used

A memory driving device that receives CXL packets, stores data in a buffer, determines if addresses are consecutive, and generates aggregated information to notify a memory device incompatible with CXL, allowing for efficient data writing.

Benefits of technology

This solution improves the communication speed of memory access using CXL by enabling efficient data transfer to memory devices with incompatible standards, thereby enhancing overall system performance.

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Abstract

To provide a memory driving device, an optical transmission system, and a memory driving method for enhancing communication speed of memory access using a CXL (Compute eXpress Link).SOLUTION: A memory driving device includes: a generation unit which, when receiving a specified packet according to connection standard specified by the CXL, stores data contained as a part of the specified packet in a buffer, determines whether an address contained as a part of the specified packet together with the data continues or not, and, when the address continues, generates first information obtained by integrating the continuing address information and the data information associated with the continuing address; and a notification unit which notifies a memory device of a write request of the data to the memory device on the basis of the first information and the communication standard, when writing the data stored in the buffer to the memory device specified with a communication standard which cannot be dealt by the CXL.SELECTED DRAWING: Figure 7
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Description

[Technical field]

[0001] The present invention relates to a memory driving device, an optical transmission system, and a memory driving method. [Background technology]

[0002] An interconnect standard called CXL (Compute eXpress Link) is known (see, for example, Patent Documents 1 to 4). CXL utilizes the specifications of PCIe (Peripheral Component Interconnect express), which is the mainstream interconnect standard, and aims to optimize computing resources. Note that interconnect standards are sometimes called interconnection protocols. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-087216 [Patent Document 2] US Patent Application Publication No. 2020 / 0379930 [Patent Document 3] U.S. Patent No. 11375050 [Patent Document 4] U.S. Pat. No. 1,160,1377 Summary of the Invention [Problem to be solved by the invention]

[0004] Incidentally, multiple servers may be installed in one data center and data communication may take place between the servers. Data communication may also take place between servers installed in different data centers. When data communication takes place between servers, the processor of the server is used for data communication. If, for example, application software of the server is executed while the processor is being used for data communication, the load on the processor increases.

[0005] Smart NICs (Network Interface Cards) have been attracting attention in order to reduce such an increase in the processor load. Smart NICs are equipped with a processor, and are used by being attached to, for example, a PCIe slot of a server. Smart NICs extract transaction layer packets called PCIe TLPs (PCIe Transaction Layer Packets) from PCIe frames (or PCIe physical packets) received as client signals from the server. After extracting the packets, the smart NICs accommodate the packets in Ethernet frames and transmit them. Smart NICs share the processing related to data communication separately from the server, thereby reducing the increase in the processor load of the server.

[0006] Furthermore, in order to achieve low latency and low power consumption in data communication, it is assumed that the smart NIC will be equipped with an optical transmission function. In this case, the smart NIC equipped with the optical transmission function (hereinafter referred to as the optical transmission device) accommodates Ethernet (registered trademark) frames in OTN (Optical Transport Network) frames and transmits them to the optical transmission network. The optical transmission network is often installed between two different stations that are far apart, for example, tens to hundreds of kilometers. The optical transmission device can perform such long-distance optical transmission by using transmission frames for optical transmission such as OTN frames.

[0007] However, with the emergence of the above-mentioned CXL, a client signal containing a CXL packet may be input to an optical transmission device. A CXL packet corresponds to MemWr in M2S RwD (Master to Subordinate Request with Data), for example. A CXL packet contains a transaction layer packet according to a protocol called CXL.mem as CXL information.

[0008] When a client signal includes a CXL packet, the optical transmission device extracts the CXL packet from the client signal, places the CXL packet in a transmission frame, and transmits the frame from the source station to the destination station. However, if the destination station does not have a memory device that supports a communication standard compatible with CXL, the optical transmission device cannot access this memory device and cannot write the CXL information included in the CXL packet to the memory device. Even if this memory device is located in the source station, the optical transmission device cannot access this memory device.

[0009] For example, if CXL is compatible with the communication standard of a memory device, the optical transmission device can access the memory device and write CXL information to the memory device. However, in this case, the communication speed between the optical transmission device and the memory device is limited to the communication speed according to the communication standard of the memory device, and high-speed memory access may not be realized.

[0010] Therefore, in one aspect, an object of the present invention is to provide a memory drive device, an optical transmission system, and a memory drive method that improve the communication speed of memory access using CXL. [Means for solving the problem]

[0011] In one embodiment, when a memory driving device receives a specific packet corresponding to a connection standard defined in CXL, the memory driving device stores data included as part of the specific packet in a buffer, and determines whether addresses included together with the data as part of the specific packet are consecutive, and if the addresses are consecutive, generates first information that aggregates information on the consecutive addresses and information on the data associated with the consecutive addresses; and when writing the data stored in the buffer to a memory device defined in a communication standard incompatible with CXL, a notification unit notifies the memory device of a request to write the data to the memory device based on the first information and the communication standard. Effect of the Invention

[0012] The communication speed of memory access using CXL can be improved. [Brief description of the drawings]

[0013] [Figure 1] 1 is an example of an optical transmission system. [Diagram 2] FIG. 13 is a diagram illustrating an example of direct accommodation. [Diagram 3] 1A is a block diagram illustrating an example of a hardware configuration of an optical transmission device, and FIG. 1B is a block diagram illustrating an example of a functional configuration of the optical transmission device. [Figure 4A] 4 is a block diagram showing an example of a functional configuration of a signal processing unit. FIG. [Figure 4B] 13 is a block diagram showing another example of the functional configuration of the signal processing unit. FIG. [Diagram 5] 1 is an example of the format of a message area in a CXL packet. [Figure 6] 11A and 11B are diagrams illustrating an example of a process executed by a framer unit. [Figure 7] 11A and 11B are diagrams illustrating an example of message information generation and an example of entry into a first queue. [Figure 8] 13A and 13B are diagrams illustrating an example of message information transfer and an example of entry of completion notification information into a second queue. [Figure 9] 11 is a flowchart illustrating an example of an operation of the optical transmission device during transmission. [Figure 10] 11 is a flowchart illustrating an example of an operation of the optical transmission device during reception. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0015] 1, the optical transmission system ST includes optical transmission devices 100 and 200. The optical transmission devices 100 and 200 are connected to each other by an optical transmission network NW. The optical transmission network NW includes an optical transmission path 300. The optical transmission path 300 includes, for example, an optical fiber and an optical amplifier.

[0016] The optical transmission device 100 is connected to the server 10 via a PCIe connection unit 15. The PCIe connection unit 15 includes a PCIe slot of the server 10 and a connector of the optical transmission device 100. The optical transmission device 100 is connected to the server 10 by mounting the connector in the PCIe slot. The optical transmission device 100 is also electrically connected to a memory device 16. The memory device 16 is an external storage device (i.e., an extended storage device) that complies with a communication standard called NVMe (Non-Volatile Memory express). This storage device includes an SSD (Solid State Drive), a non-volatile memory, and the like.

[0017] The optical transmission device 200 is electrically connected to a CXL device 20. The CXL device 20 is an external storage device (i.e., an extended storage device) that supports a connection standard called CXL. This storage device includes an SSD, a non-volatile memory, and the like. The optical transmission device 200 is electrically connected to a memory device 26. The memory device 26 is basically the same as the memory device 16, so a detailed description thereof will be omitted.

[0018] The optical transmission device 100 receives a client signal, which is an electrical digital signal, from the server 10. The optical transmission device 100 converts the received client signal into a transmission frame for optical transmission.

[0019] For example, as shown in Fig. 2, an electrical client signal in which a CXL packet is stored may be input to the optical transmission device 100. The CXL packet is an example of a specific packet, and corresponds to MemWr in M2S RwD. Note that, as will be described in detail later, the CXL packet includes a transaction layer packet according to a protocol called CXL.mem as CXL information. The transaction layer is different from the physical layer.

[0020] The optical transmission device 100 extracts a CXL packet from the input client signal. Here, CXL as a connection standard cannot support NVMe as a communication standard due to standard compatibility. NVMe as a communication standard can support PCIe as a connection standard due to standard compatibility. In other words, NVMe can communicate over PCIe, but cannot communicate over CXL.

[0021] When the optical transmission device 100 extracts a CXL packet, it compresses the CXL packet and directly accommodates the new compressed CXL packet as a local packet in an OTN frame, which is an electrical digital signal. This type of direct accommodation is sometimes called direct mapping. If there is room in the OTN frame, the optical transmission device 100 accommodates some or all of the subsequent local packets in the OTN frame in sequence. As a result, multiple compressed CXL packets are accommodated in the OTN frame as local packets.

[0022] 1, when the optical transmission device 100 accommodates multiple local packets, which are multiple compressed CXL packets, in an OTN frame, it generates an FEC (forward error correction) which is an error correction code, and adds the FEC to the OTN frame. After adding the FEC to the OTN frame, the optical transmission device 100 converts the OTN frame into an optical signal, and transmits the optical signal to the optical transmission path 300. In this manner, the optical transmission device 100 transmits the optical signal toward the optical transmission device 200.

[0023] The optical transmission device 200 receives an optical signal from the optical transmission path 300. That is, the optical transmission device 200 receives the optical signal transmitted from the optical transmission device 100 and transmitted via the optical transmission path 300. Upon receiving the optical signal, the optical transmission device 200 converts the optical signal into an OTN frame, extracts FEC from the OTN frame, and performs error correction. After performing error correction, the optical transmission device 200 extracts (demapping) local packets from the OTN frame, restores CXL packets from the local packets, and transfers the packets to the CXL device 20.

[0024] The configuration of the optical transmission device 100 will be described in detail with reference to Fig. 3. Note that the optical transmission device 200 basically has the same configuration as the optical transmission device 100, and therefore a detailed description thereof will be omitted.

[0025] First, as shown in FIG. 3(a), the optical transmission device 100 includes a field programmable gate array (FPGA) 100A, a central processing unit (CPU) 100B, and a general purpose computing with graphic processing unit (GPGPU) 100C. The FPGA 100A, the CPU 100B, and the GPGPU 100C are all hardware circuits including processors. The optical transmission device 100 also includes a random access memory (RAM) 100D as a hardware circuit, and a quad small form factor pluggable (QSFP) 100G as an optical transceiver. For example, a double-data-rate synchronous dynamic random access memory (DDR SDRAM) is used as the RAM.

[0026] The FPGA 100A executes the processing of the optical transmission layer, and the GPGPU 100C executes the processing of the IP (Internet Protocol) layer. The CPU 100B controls the overall processing of the optical transmission device 100, including digital signal processing. Instead of the FPGA 100A, a hardware circuit such as a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), or an LSI (Large-Scale Integration) may be used.

[0027] The FPGA 100A is connected to the CPU 100B and the GPGPU 100C via an internal bus 100E. The CPU 100B and the GPGPU 100C are connected to the RAM 100D via an internal bus 100F. The FPGA 100A is connected to the QSFP 100G via an internal bus 100H. The QSFP 100G is disposed at the rear stage of the FPGA 100A. The FPGA 100A realizes functions to be described later, and also executes various processes according to flowcharts to be described later. For example, the FPGA 100A realizes various functions and executes various processes by programs stored in itself. The memory device 16 is connected to the FPGA 100A.

[0028] As shown in FIG. 3(b), the optical transmission device 100 includes a signal processing unit 110, a transmission control unit 120, a main storage unit 130, and a transmission / reception unit 140. The signal processing unit 110 can be realized by the above-mentioned FPGA 100A. The transmission control unit 120 can be realized by the above-mentioned CPU 100B and GPGPU 100C. The main storage unit 130 can be realized by the above-mentioned RAM 100D. The transmission / reception unit 140 can be realized by the above-mentioned QSFP 100G. Therefore, the signal processing unit 110 is connected to the transmission control unit 120 and the transmission / reception unit 140, and the transmission control unit 120 is connected to the main storage unit 130. The memory device 16 is connected to the signal processing unit 110.

[0029] The memory devices 16 and 26, the signal processing unit 110, and the signal processing unit 210 included in the optical transmission device 200 will be described in detail with reference to FIGS. 4A to 8. FIG.

[0030] 4A, the memory device 16 includes a memory control unit 16A and a data storage unit 16B. The signal processing unit 110 includes a first input / output unit 111, a conversion determination unit 112, a frame processing unit 113, and a second input / output unit 114. The signal processing unit 110 also includes a generation unit 115, a data buffer 116, and a command management unit 117. The data buffer 116 is associated with the generation unit 115.

[0031] Here, the conversion determination unit 112 includes a compression unit 150 and a first determination unit 151. The frame processing unit 113 includes a framer unit 160. The command management unit 117 includes a driver 190. The driver 190 is an example of a notification unit. The command management unit 117 also includes two types of queues that store information, as will be described in detail later. A memory drive device MD can be realized by at least the generator 115 and the driver 190. The memory drive device MD may include a data buffer 116 and the above-mentioned queues.

[0032] The client signals output from the server 10 are input in sequence to the first input / output unit 111. When the client signals are input to the first input / output unit 111, the first input / output unit 111 extracts CXL packets contained in the client signals (see also FIG. 2), and outputs them to the compression unit 150 in sequence.

[0033] The compression unit 150 compresses the CXL packet. The compression unit 150 compresses the CXL packet to generate a new local packet by compressing the CXL packet. More specifically, as shown in FIG. 5, the compression unit 150 first extracts a part of the message data stored in the message area 80 of the CXL packet. For example, the compression unit 150 extracts 16-bit flag data stored in the tag area 81 in the message area 80. The flag data is an example of flag information. The compression unit 150 also extracts 46-bit address data stored in the address area 82 in the message area 80.

[0034] After extracting the flag data and address data, the compression unit 150 generates a new local packet with the extracted flag data, address data, and a predetermined delimiter expressed in 2 bits as new message data. The new message data is 64 bits (8 bytes). The predetermined delimiter is data for identifying an IDLE pattern. The local packet contains, together with the new message data, the data to be written that was stored as the data body in the data area (or payload area) of the original CXL packet in its original state.

[0035] In this way, the compressor 150 compresses the original CXL packet and generates a local packet by limiting the data to the flag data, address data, a predetermined delimiter, and the data to be written. By compressing the original CXL packet into a local packet, it is possible to accommodate more data to be written in one OTN frame.

[0036] The first determination unit 151 determines, based on the local packet output from the compression unit 150, whether or not to convert the processing format of the local packet from a first processing format that is not compatible with NVMe to a second processing format that is compatible with NVMe.

[0037] For example, if the processing format is not converted when the write target data of the local packet is written to the data storage unit 16B of the memory device 16, the write target data is not written to the data storage unit 16B. As described above, the memory device 16 supports NVMe as a communication standard, and therefore cannot support a local packet in which a CXL packet defined by CXL as a connection standard is compressed.

[0038] On the other hand, when the write target data of the local packet is written to the data storage unit 26B (see FIG. 4B) of the memory device 26, even if the processing format is not converted, the local packet is accommodated in an OTN frame and propagates as an optical signal through the optical transmission path 300. In this case, since the memory device 26 connected to the optical transmission device 200 supports NVMe as a communication standard, it cannot support a compressed local packet that is a CXL packet defined by CXL as a connection standard.

[0039] Therefore, the first determination unit 151 determines whether or not to convert the processing format of the local packet from a first processing format that is not compatible with NVMe to a second processing format that is compatible with NVMe, based on the flag data stored in the local packet. The flag data can be defined in advance between the server 10 and the CPU of the server 10, and it is sufficient for the CPU of the server 10 to determine whether or not to store the flag data in the CXL packet.

[0040] Although details will be described later, there are two types of flag data: first flag data and second flag data. The first flag data is used in the optical transmission device 100 to determine whether or not the processing format of the local packet is converted from the first processing format to the second processing format. In other words, the first flag data is used to determine whether or not the local packet is accommodated in an OTN frame. The second flag data is used in the optical transmission device 200 to determine whether or not the processing format of the local packet is converted from the first processing format to the second processing format. In other words, the second flag data is used to determine whether or not the local packet is restored to the original uncompressed CXL packet.

[0041] When the first determination unit 151 does not convert the processing format of the local packet from the first processing format to the second processing format, the first determination unit 151 outputs the local packet to the frame unit 160. When the first determination unit 151 converts the processing format of the local packet from the first processing format to the second processing format, the first determination unit 151 outputs the local packet to the generation unit 115.

[0042] The frame unit 160 acquires message data for one storage cycle and write target data held by the local packet as a data block, and accommodates the data in the OTN frame as CXL information. For example, as shown in FIG. 6, the frame unit 160 accommodates a data block for one storage cycle in the payload part located behind the overhead (denoted as OH in FIG. 6) of the OTN frame. That is, the frame unit 160 accommodates the message data and the write target data (denoted as DT in FIG. 6) in the payload part as CXL information.

[0043] When the frame unit 160 accommodates the data block in the OTN frame, the frame unit 160 outputs the OTN frame to the second input / output unit 114. The second input / output unit 114 transfers the OTN frame output from the frame unit 160 to the transmission / reception unit 140 (see FIG. 3(b)). The transmission / reception unit 140 converts the OTN frame into an optical signal and transmits the optical signal toward the optical transmission device 200.

[0044] Although not shown, the transmitting / receiving unit 140 includes an FEC encoder that adds FEC to the OTN frame, a DAC (Digital Analogue Converter) that converts the OTN frame from digital to analog format, etc. The transmitting / receiving unit 140 also includes an optical modulator that converts an analog format OTN frame into an optical signal by local light and transmits it, and a coherent receiver that converts an optical signal received from the optical transmission path 310 into an analog format OTN frame by local light. In addition, the transmitting / receiving unit 140 includes an ADC (Analogue Digital Converter) that converts an analog format OTN frame into a digital format OTN frame, an FEC decoder that performs error correction on the OTN frame based on the FEC added to the OTN frame, and outputs the OTN frame to the second input / output unit 114, etc.

[0045] 4B, the memory device 26 includes a memory control unit 26A and a data storage unit 26B. The signal processing unit 210 includes a conversion determination unit 212, a frame processing unit 213, and a second input / output unit 214. The signal processing unit 210 also includes a generation unit 215, a data buffer 216, and a command management unit 217. The data buffer 216 is associated with the generation unit 215.

[0046] Here, the conversion determination unit 212 includes a second determination unit 280 and a restoration unit 281. The frame processing unit 213 includes a deframer unit 270. The command management unit 217 includes a drive unit 290. The drive unit 290 is an example of a notification unit. The command management unit 217 also includes two types of queues, similar to the command management unit 117. The memory drive device MD can be realized by at least the generation unit 215 and the drive unit 290. The memory drive device MD may include a data buffer 216 and the above-mentioned queues.

[0047] When an OTN frame output from a transmitting / receiving unit (not shown) of the optical transmission device 200 is input to the second input / output unit 214, the second input / output unit 214 transfers the OTN frame to the deframer unit 270. The deframer unit 270 extracts a local packet from the OTN frame transferred from the second input / output unit 214 and outputs the local packet to the second determination unit 280. Note that the local packet extracted by the deframer unit 270 from the OTN frame does not include a portion of the message data that was excluded during compression by the compression unit 150. This is because the deframer unit 270 does not extract a CXL packet from the OTN frame. When the deframer unit 270 extracts the local packet, it outputs the local packet to the second determination unit 280.

[0048] The second determination unit 280 determines whether or not to convert the processing format of the local packet from a first processing format that does not support NVMe to a second processing format that supports NVMe, based on the local packet output from the deframer unit 270. More specifically, the second determination unit 280 determines whether or not to convert the processing format of the local packet from the first processing format to the second processing format, based on the second flag data stored in the local packet. When the second determination unit 280 does not convert the processing format of the local packet from the first processing format to the second processing format, it outputs the local packet to the restoration unit 281. When the second determination unit 280 converts the processing format of the local packet from the first processing format to the second processing format, it outputs the local packet to the generation unit 215. Note that the second determination unit 280 basically executes the same processing as the first determination unit 151, and therefore a detailed description thereof will be omitted.

[0049] The restoration unit 281 restores a CXL packet from the local packet. For example, the restoration unit 281 restores the original CXL packet by adding restoration data of a fixed value (i.e., 64 bits) equivalent to the number of bits of the message data excluded from the extraction target by the compression unit 150 to the local packet. After restoring the original CXL packet, the restoration unit 281 outputs this CXL packet to the CXL device 20. As a result, the CXL packet output from the restoration unit 281 is input to the CXL device 20.

[0050] As shown in FIG. 4A, the generating unit 115 receives a local packet output from the first determining unit 151. Also, as shown in FIG. 4B, the generating unit 215 receives a local packet output from the second determining unit 280. The local packet received by the generating units 115 and 215 includes message data and data to be written. This message data includes flag data, address data, and a predetermined delimiter. When the generating unit 115 receives a local packet, it removes the flag data and the delimiter, and stores entry information in which the address data and the data to be written are associated in the data buffer 116. This is for the purpose of efficiently using a queue, which will be described later, when the driving unit 190 accesses the memory device 16. Similarly, when the generating unit 215 receives a local packet, it removes the flag data and the delimiter, and stores entry information in which the address data and the data to be written are associated in the data buffer 216. This is for the purpose of efficiently using a queue, which will be described later, when the driving unit 290 accesses the memory device 26.

[0051] For example, when the generating unit 115 stores the entry information in the data buffer 116, the data buffer 116 stores the entry information E1, E2, and E3 that associates the address data with the write target data (indicated as DT in FIG. 7) as shown in FIG. 7. Each of the four write target data #1, #2, #3, and #4 associated with the address data "A" has a size of 16 bytes. The four write target data associated with the address data "B" and the address data "C" are similar to the case of the address data "A", so a detailed description will be omitted.

[0052] When the generation unit 115 stores the entry information E1, E2, and E3, it checks the continuity of the address data included in the entry information E1, E2, and E3. For example, the generation unit 115 checks whether the address data "A" and the address data "B" are consecutive, whether the address data "B" and the address data "C" are consecutive, etc.

[0053] When address data "A" and address data "B" are consecutive, the generation unit 115 generates first message information (represented as first MSG information in FIG. 7) M1 that aggregates the address data "A", the four pieces of write target data #1, #2, #3, and #4 associated with this address data "A", and the four pieces of write target data #5, #6, #7, and #8 associated with the address data "B". The first message information is an example of first information. The size of the first message information M1 is at least larger than 128 bytes, and is larger than the size of the 64 bytes of write target data (16 bytes x 4 pieces of write target data) that a single local packet has.

[0054] On the other hand, if the address data "B" and the address data "C" are not consecutive, the generation unit 115 generates second message information (represented as second MSG information in FIG. 7) M2 that aggregates the four write target data #9, #10, #11, and #12 associated with the single address data "C." The second message information is an example of second information. Note that, if the address data "B" and the address data "C" are consecutive, the generation unit 115 may aggregate the four write target data #9, #10, #11, and #12 into the first message information M1.

[0055] In this way, when the address data has continuity, the generating unit 115 can generate message information having a size larger than the size of the write target data that a single local packet has. In other words, when the address data has continuity, the generating unit 115 can generate message information having a size of at least 16 bytes x 4 x the number of entry information.

[0056] When the generation unit 115 generates the first message information M1, the second message information M2, etc., it outputs the first message information M1, the second message information M2, etc. to the drive unit 190 of the command management unit 117. As a result, the first message information M1, the second message information M2, etc. are input to the drive unit 190. For example, when the first message information M1 is input to the drive unit 190, the drive unit 190 enters (registers) the first message information M1 in the first queue 91 of the first queue 91 and the second queue 92 that the command management unit 117 has.

[0057] The first queue 91 is a circular buffer used by the driver 190 to issue a write command to the memory controller 16A. The write command is an example of a write request. The first queue 91 is sometimes called a Submission Queue (SQ). Based on the first message information M1 entered in the first queue 91, the driver 190 issues a write command for the data to be written that is included in the first message information M1.

[0058] 8, when the first message information M1 is entered into the first queue 91, the driving unit 190 notifies the doorbell register 16C of the memory control unit 16A of the completion of the entry of the first message information M1 into the first queue 91 and a write command. This causes the memory control unit 16A to access the first queue 91 and read the first message information M1 from the first queue 91. The memory control unit 16A then writes the write target data contained in the first message information M1 into the data storage unit 16B.

[0059] When writing of the target data to be written into data storage unit 16B is completed, data storage unit 16B outputs a completion notification to memory control unit 16A. In response to the completion notification, memory control unit 16A generates completion notification information C1 indicating that processing for first message information M1 is completed, and enters the completion notification information C1 in second queue 92. Second queue 92 is a circular buffer that stores completion notification information C1 and the like. Second queue 92 is sometimes called a CQ (Completion Queue).

[0060] The drive unit 190 monitors the second queue 92, and acquires the completion notification information C1 when the completion notification information C1 is entered in the second queue 92. Although not shown, when the drive unit 190 acquires the completion notification information C1, the drive unit 190 transmits the completion notification information C1 to the CPU of the server 10. As a result, if a client signal including a CXL packet is output from the server 10, the CPU of the server 10 can confirm that writing of the write target data contained in the CXL packet of the client signal output from the server 10 has been completed.

[0061] In this way, some data included in the local packet is aggregated into the first message information M1 compatible with NVMe, etc. This allows the signal processing unit 110 to write the data to be written to the memory device 16 using PCIe as the connection standard and NVMe as the communication standard, without being limited to CXL as the connection standard. Note that the signal processing unit 110 may write the data to be written alone, or may write the data to be written together with address data.

[0062] When the address data has continuity, a plurality of pieces of write target data associated with each of the consecutive address data are aggregated into the first message information M1, etc. In other words, the amount of write target data that can be transferred to the memory device 16 in one output increases. This makes it possible to improve the communication speed of memory access from the signal processing unit 110 to the memory device 16.

[0063] For example, if the entry period to the first queue 91 is shorter than the processing time of the memory control unit 16A, the first queue 91 may become congested or overflow, and the entry may not be accepted. In this case, if the size of the entry information is 64 bytes, the communication speed after the entry is no longer accepted is limited to the processing time of the memory control unit 16A×64 bytes. However, in this embodiment, the memory control unit 16A processes write target data of a size larger than 64 bytes. Therefore, the memory control unit 16A has a processing margin, and the signal processing unit 110 can improve the communication speed of memory access to the memory device 16. The signal processing unit 110 has been described as an example with reference to FIGS. 7 and 8, but the signal processing unit 210 is basically the same as the signal processing unit 110, so a detailed description of the signal processing unit 210 will be omitted.

[0064] Next, the operation of the optical transmission device 100 during transmission will be described with reference to FIG.

[0065] First, the first input / output unit 111 extracts a CXL packet from a client signal (step S1). After the first input / output unit 111 extracts the CXL packet, the compression unit 150 compresses the CXL packet (step S2). As described above, the compression unit 150 extracts the flag data and address data stored in the tag area 81 in the message area 80, and generates a new local packet with the extracted flag data, address data, etc. as new message data.

[0066] When the compression unit 150 compresses the CXL packet to generate a local packet, the first determination unit 151 determines whether the flag data is the first flag data or not (step S3). That is, the first determination unit 151 checks the message data of the local packet and determines whether the message data includes the first flag data or not. For example, if the flag data is not the first flag data, such as the flag data being the second flag data (step S3: NO), the framer unit 160 accommodates the local packet (step S4). That is, the framer unit 160 acquires the message data and the write target data for one accommodation cycle that the local packet holds as a data chunk, and accommodates them in the OTN frame. In this case, the generation unit 115 avoids generating message information.

[0067] When the framer unit 160 accommodates the local packet, the transmitting / receiving unit 140 converts the OTN frame that has passed through the second input / output unit 114 into an optical signal (step S5), and transmits the optical signal (step S6). After transmitting the optical signal, the optical transmission device 100 ends the transmission process. As a result, the optical signal is transmitted from the optical transmission device 100, and the optical transmission device 200 receives this optical signal.

[0068] On the other hand, in the process of step S3, if the flag data is the first flag data (step S3: YES), the generation unit 115 generates message information (step S7). That is, the generation unit 115 generates the above-mentioned first message information M1, second message information M2, etc. After generating the message information, the drive unit 190 notifies a write command for the data to be written (step S8) and ends the process. More specifically, the drive unit 190 notifies the memory control unit 16A of the memory device 16 of the write command and ends the process. This allows the optical transmission device 100 to write the data to be written to the memory device 16 compatible with NVMe at high speed even when a CXL packet is input.

[0069] Next, the operation of the optical transmission device 200 during reception will be described with reference to FIG.

[0070] First, the transmitting / receiving unit (not shown) of the optical transmission device 200 receives the optical signal transmitted from the optical transmission device 100 (step S11). Upon receiving the optical signal, the transmitting / receiving unit of the optical transmission device 200 converts the optical signal into an OTN frame (step S12). After the transmitting / receiving unit of the optical transmission device 200 converts the optical signal into an OTN frame, the deframer unit 270 extracts a local packet from the OTN frame that has passed through the second input / output unit 214 (step S13). Note that the local packet extracted by the deframer unit 270 has part of the message data excluded from the extraction target. For this reason, in the subsequent processing, a process is required to restore the local packet extracted by the deframer unit 270 to the original CXL packet.

[0071] When the deframer unit 270 extracts the local packet, the second determination unit 280 determines whether the flag data is the second flag data or not (step S14). That is, the second determination unit 280 checks the message data of the local packet and determines whether the message data includes the second flag data or not. If the flag data is not the second flag data (step S14: NO), the restoration unit 281 restores the CXL packet (step S15). For example, if the flag data is third flag data different from both the first flag data and the second flag data, the restoration unit 281 restores the original CXL packet from the local packet.

[0072] When the restoration unit 281 restores the CXL packet, the restoration unit 281 transfers the CXL packet (step S16) and ends the process. More specifically, the restoration unit 281 transfers the CXL packet to the CXL device 20. In this manner, the CXL device 20 receives the CXL packet of the client signal transmitted from the server 10.

[0073] On the other hand, in the process of step S14, if the flag data is the second flag data (step S14: YES), the generating unit 215 generates message information (step S17). After generating the message information, the driving unit 290 notifies a write command for the write target data (step S18) and ends the process. This allows the optical transmission device 200 to write the write target data to the NVMe-compatible memory device 26 at high speed, even if the write target data is a CXL packet of a client signal transmitted from the server 10.

[0074] Although the preferred embodiment of the present invention has been described in detail above, the present invention is not limited to the specific embodiment, and various modifications and variations are possible within the scope of the gist of the present invention described in the claims.

[0075] In addition, the following supplementary notes are provided in relation to the above description. (Supplementary Note 1) A memory driving device having: a generation unit that, when receiving a specific packet corresponding to a connection standard defined in CXL, stores data included as part of the specific packet in a buffer, and determines whether addresses included together with the data as part of the specific packet are consecutive, and if the addresses are consecutive, generates first information that aggregates information on the consecutive addresses and information on the data associated with the consecutive addresses; and a notification unit that, when writing the data stored in the buffer to a memory device defined in a communication standard incompatible with CXL, notifies the memory device of a request to write the data to the memory device based on the first information and the communication standard. (Appendix 2) The memory driving device described in Appendix 1, characterized in that, when the addresses are not consecutive, the generation unit generates second information that aggregates information of the single non-consecutive address and information of the data associated with the single non-consecutive address, and the notification unit notifies the memory device of the write request of the data to the memory device based on the second information and the communication standard. (Appendix 3) The memory driving device described in Appendix 1 or 2 further includes a determination unit that determines whether or not to accommodate the specific packet in a transmission frame for optical transmission based on flag information contained in the specific packet, and the generation unit generates the first information when the determination unit determines that the specific packet should not be accommodated in the transmission frame. (Appendix 4) The memory driving device described in Appendix 1 or 2, further comprising a judgment unit that judges whether or not to accommodate the specific packet in a transmission frame for optical transmission based on flag information contained in the specific packet, and the generation unit avoids generating the first information when the judgment unit judges that the specific packet is to be accommodated in the transmission frame. (Appendix 5) The memory drive device described in appendix 1 or 2, characterized in that the communication standard is NVMe. (Appendix 6) The memory drive device described in Appendix 5, characterized in that the memory device is an external storage device compatible with the NVMe, including an SSD. (Supplementary Note 7) An optical transmission system including a first optical transmission device that transmits a transmission frame for optical transmission containing the specific packet to an optical transmission line, and a second optical transmission device that includes the memory drive device according to Supplementary Note 1 or 2 and receives the transmission frame from the optical transmission line, wherein the generation unit receives the specific packet by the second optical transmission device extracting the specific packet from the transmission frame. 1. An optical transmission system comprising: (Appendix 8) A memory driving method comprising the steps of: when receiving a specific packet conforming to a connection standard defined in CXL, storing data included as part of the specific packet in a buffer; determining whether addresses included together with the data as part of the specific packet are consecutive; if the addresses are consecutive, generating first information that aggregates information on the consecutive addresses and information on the data associated with the consecutive addresses; and, when writing the data stored in the buffer to a memory device defined in a communication standard incompatible with CXL, notifying the memory device of a request to write the data to the memory device based on the first information and the communication standard. (Appendix 9) A memory driving method as described in Appendix 8, characterized in that, when the addresses are not consecutive, second information is generated by aggregating information on the single non-consecutive address and information on the data associated with the single non-consecutive address, and a write request for the data to the memory device is notified to the memory device based on the second information and the communication standard. (Appendix 10) A memory driving method as described in appendix 8 or 9, characterized in that it is determined whether or not the specific packet is to be accommodated in a transmission frame for optical transmission based on flag information contained in the specific packet, and the first information is generated when it is determined that the specific packet is not to be accommodated in the transmission frame. (Appendix 11) A memory driving method as described in appendix 8 or 9, characterized in that it is determined whether or not to accommodate the specific packet in a transmission frame for optical transmission based on flag information contained in the specific packet, and when it is determined that the specific packet is to be accommodated in the transmission frame, generation of the first information is avoided. [Explanation of symbols]

[0076] 10 Server 20 CXL Devices 16,26 Memory device 100,200 Optical transmission equipment 110,210 Signal processing section 111 1st input / output section 112,212 Conversion decision section 113,213 Frame Processing Unit 114,214 2nd input / output section 115,215 generation part 116,216 Data Buffers 117,217 Command Management Department 190,290 Drive unit

Claims

1. a generating unit that, when receiving a specific packet conforming to a connection standard defined by CXL (Compute eXpress Link), stores data included as a part of the specific packet in a buffer, and determines whether addresses included together with the data as the part of the specific packet are consecutive or not, and, when the addresses are consecutive, generates first information that aggregates information on the consecutive addresses and information on the data associated with the consecutive addresses; a notification unit that, when writing the data stored in the buffer to a memory device defined by a communication standard incompatible with the CXL, notifies the memory device of a write request for the data to the memory device based on the first information and the communication standard; A memory drive device having:

2. When the addresses are not consecutive, the generation unit generates second information that aggregates information on the single non-consecutive address and information on the data associated with the single non-consecutive address; the notification unit notifies the memory device of the write request to write the data to the memory device based on the second information and the communication standard.

2. The memory drive device according to claim 1.

3. a determination unit that determines whether or not to accommodate the specific packet in a transmission frame for optical transmission based on flag information included in the specific packet, the generating unit generates the first information when the determining unit determines that the specific packet is not to be accommodated in the transmission frame.

3. The memory drive device according to claim 1 or 2.

4. a determination unit that determines whether or not to accommodate the specific packet in a transmission frame for optical transmission based on flag information included in the specific packet, the generation unit avoids generation of the first information when the determination unit determines that the specific packet is to be accommodated in the transmission frame.

3. The memory drive device according to claim 1 or 2.

5. 3. An optical transmission system comprising: a first optical transmission device that transmits a transmission frame for optical transmission containing the specific packet to an optical transmission line; and a second optical transmission device that includes the memory drive device according to claim 1 or 2 and receives the transmission frame from the optical transmission line, the generation unit receives the specific packet by the second optical transmission device extracting the specific packet from the transmission frame.

1. An optical transmission system comprising:

6. When a specific packet conforming to a connection standard defined by CXL (Compute eXpress Link) is received, data included as a part of the specific packet is stored in a buffer, and an address included as a part of the specific packet together with the data is determined to be consecutive; If the addresses are consecutive, generating first information that aggregates information on the consecutive addresses and information on the data associated with the consecutive addresses; when writing the data stored in the buffer to a memory device defined by a communication standard incompatible with the CXL, notifying the memory device of a request to write the data to the memory device based on the first information and the communication standard; Memory drive method.

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