Flexible display device

Abstract

To provide a display device improving poor corrosion quality of a GIP wiring part while increasing productivity.SOLUTION: A flexible display device includes: a board including a display area divided into an optical area and a general area, and a non-display area divided into a bending area and a non-bending area; a first insulation film disposed on the board; a wire disposed on the first insulation film of the non-bending area; a second insulation film disposed on the wire; a connection wire that is disposed on the second insulation film in the non-bending area and has a first contact area connected to the wire; a first flattening layer disposed on the connection wire; and a link wire that is disposed on the first flattening layer and extends to the bending area, and has a second contact area connected to the connection wire.SELECTED DRAWING: Figure 1a

Description

Technical Field

[0001] This specification relates to a flexible display device, and more particularly, to a flexible display device capable of reducing the bezel width.

Background Art

[0002] With the advent of the information age, the field of display devices for visually displaying electrical information signals has been rapidly developing, and research has continued to develop performance such as thinning, lightening, and low power consumption for various display devices.

[0003] Typical display devices include liquid crystal display (LCD), field emission display (FED), electro-wetting display (EWD), and organic light emitting display (OLED).

[0004] The electroluminescent display device typified by the organic light emitting display device is a self-luminous display device, and unlike the liquid crystal display device, it does not require a separate light source and can be manufactured in a lightweight and thin form. In addition, the electroluminescent display device is not only advantageous in terms of power consumption due to low voltage driving, but also excellent in hue composition, response speed, viewing angle, and contrast ratio (CR), and is expected to be used in various fields.

[0005] The electroluminescent display device forms a light emitting element by arranging a light emitting layer between two electrodes, an anode electrode and a cathode electrode. That is, when holes in the anode electrode are injected into the light emitting layer and electrons in the cathode electrode are injected into the light emitting layer, the injected electrons and holes recombine with each other to form excitons in the light emitting layer and emit light.

[0006] On the one hand, efforts have been continuously made to reduce the bezel area, which is the outer contour of the display area, in order to increase the size of the effective display screen on the same area of the display device.

[0007] However, since wirings and driving circuits for driving the screen are arranged in the bezel area corresponding to the non-display area, there is a limit to reducing the bezel area.

Summary of the Invention

Problems to be Solved by the Invention

[0008] In recent years, in relation to a flexible electroluminescent display device that can maintain display performance even when warped by applying a flexible substrate made of a ductile material such as plastic, efforts have been made to reduce the bezel area by bending the non-display area of the flexible substrate while securing an area for wirings and driving circuits. Hereinafter, for convenience, such a display device is referred to as a bezel bending display device.

[0009] On the other hand, while applying a bezel bending display device to reduce the bezel width, a structure applying two layers of wiring layers and two layers of planarization layers is adopted, and photoacrylic (PAC) is applied as the planarization layer in order to improve productivity. In this case, corrosion defects may occur in the Gate-In-Panel (GIP) wiring portion near the contact hole adjacent to the bending area.

[0010] Therefore, the problem to be solved by the present invention is to provide a flexible light-emitting display device that improves productivity while improving corrosion defects in the GIP wiring portion.

[0011] The problems of the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description.

Means for Solving the Problems

[0012] To solve the problems described above, a flexible display device according to an embodiment of the present invention includes a substrate including a display area divided into an optical area and a general area and a non-display area divided into a bending area and a non-bending area, a first insulating film disposed on the substrate, a wiring disposed on the first insulating film in the non-bending area, a second insulating film disposed on the wiring, a connection wiring disposed on the second insulating film in the non-bending area and having a first contact area connected to the wiring, a first planarization layer disposed on the connection wiring, a link wiring disposed on the first planarization layer and extending to the bending area and having a second contact area connected to the connection wiring, a second planarization layer disposed on the link wiring and including an open area where a part of the area is removed to expose the second contact area of the link wiring, and a third insulating film disposed on the second planarization layer and filling the open area.

[0013] Specific matters of other embodiments are included in the detailed description and the drawings.

Advantages of the Invention

[0014] By applying a photoacrylic (PAC) series material as the planarization layer, partially removing the planarization layer on the contact hole of the GIP wiring part, and filling it with a bank of a polyimide (PI) series material, the present invention can improve the productivity and improve the corrosion defect of the GIP wiring part.

[0015] The effects according to the present invention are not limited to the contents exemplified above, and more various effects are included in the present invention.

Brief Description of the Drawings

[0016]

Figure 1a

Figure 1b

Figure 1c

Figure 1d

Figure 2a

Figure 2b

Figure 3

Figure 4

Figure 5a

Figure 5b

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Mode for Carrying Out the Invention

[0017] The advantages and features of the present invention, and the method for achieving them, will become clear by referring to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and is configured in various different forms. Merely, these embodiments are provided so that the disclosure of the present invention is complete, and to fully inform those with ordinary knowledge in the technical field to which the present invention pertains of the scope of the invention. The present invention is only defined by the claims.

[0018] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary, so the present invention is not limited to the matters shown in the drawings. Also, when explaining the present invention, if it is determined that a detailed description of related known technologies may muddy the gist of the present invention, the detailed description thereof will be omitted. Also, when terms such as "including", "having", "being made" as mentioned in this specification are used, unless "only" is used, other parts may be added. When a component is expressed in the singular, it includes the case of including a plurality unless otherwise explicitly stated.

[0019] When interpreting a component, it is interpreted as including an error range even without a separate explicit description.

[0020] In the case of an explanation of a positional relationship, for example, when a positional relationship between two parts is described such as "on ~", "above ~", "below ~", "next to ~", etc., unless "immediately" or "directly" is used, one or more other parts may be located between the two parts.

[0021] When an element or layer is referred to as being on another element or layer, it includes both the case of being immediately above another element and the case of having another layer or another element intervening therebetween.

[0022] The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, the first component referred to below may be the second component within the technical concept of the present invention.

[0023] Throughout the specification, the same reference numerals refer to the same components.

[0024] The size and thickness of each configuration shown in the drawings are shown for convenience of explanation, and the present invention is not necessarily limited to the size and thickness of the shown configuration.

[0025] The respective features of the various embodiments of the present invention can be partially or wholly combined or combined with each other, and various technical linkages and drives are possible as can be fully understood by those skilled in the art. Each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0026] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0027] FIGS. 1a to 1d are plan views schematically showing a flexible display device according to an embodiment of the present invention.

[0028] Referring to FIGS. 1a to 1d, a flexible display device 100 according to an embodiment of the present invention may include a display panel DP for displaying an image and one or more optoelectronic devices 150, 150a, 150b. The optoelectronic devices 150, 150a, 150b may include a light receiving device for receiving light.

[0029] The display panel DP is a panel for displaying an image to a user.

[0030] The display panel DP can include a display element for displaying an image, a driving element for driving the display element, and wirings for transmitting various signals to the display element and the driving element. The display element can be defined to be different depending on the type of the display panel DP. For example, when the display panel DP is an organic light-emitting display panel, the display element can be an organic light-emitting element including an anode electrode, an organic layer, and a cathode electrode. For example, when the display panel DP is a liquid crystal display panel, the display element can be a liquid crystal display element.

[0031] In the following, it is assumed that the display panel DP is an organic light-emitting display panel, but the display panel DP is not limited to an organic light-emitting display panel.

[0032] On the other hand, the display panel DP can be configured to include a substrate, and a number of insulating films, a transistor layer, a light-emitting element layer, etc. on the substrate. The display panel DP can include a number of sub-pixels and various signal lines for driving the number of sub-pixels for image display. The signal lines can include a number of data lines, a number of gate lines, a number of power supply lines, etc. At this time, each of the number of sub-pixels can include a transistor located in the transistor layer and a light-emitting element located in the light-emitting element layer.

[0033] The display panel DP can include a display area DA and a non-display area NDA.

[0034] The display area DA is an area where an image is displayed on the display panel DP.

[0035] In the display area DA, a number of sub-pixels that make up a number of pixels and a circuit for driving the number of sub-pixels can be arranged. The number of sub-pixels is the minimum unit that constitutes the display area DA. A display element can be arranged in each of the number of sub-pixels, and the number of sub-pixels can constitute a pixel. For example, an organic light-emitting element including an anode electrode, an organic layer, and a cathode electrode can be arranged in each of the number of sub-pixels, but it is not limited thereto. In addition, the circuit for driving the number of sub-pixels may include driving elements, wirings, and the like. For example, the circuit may be composed of a thin film transistor, a storage capacitor, a gate line, a data line, etc., but it is not limited thereto.

[0036] The non-display area NDA is an area where an image is not displayed.

[0037] The non-display area NDA can be bent so as not to be visible from the front or hidden by a case (not shown), and is also referred to as a bezel area.

[0038] In FIGS. 1a to 1d, the non-display area NDA is shown as surrounding the rectangular display area DA, but the forms and arrangements of the display area DA and the non-display area NDA are not limited to the examples shown in FIGS. 1a to 1d. That is, the display area DA and the non-display area NDA may be in a form suitable for the design of the electronic device equipped with the flexible display device 100. For example, exemplary forms of the display area DA may be a pentagon, a hexagon, a circle, an ellipse, etc.

[0039] In the non-display area NDA, various wirings, circuits, etc. for driving the organic light-emitting elements of the display area DA can be arranged. For example, in the non-display area NDA, link wirings for transmitting signals to a number of sub-pixels and circuits in the display area DA, GIP (Gate-In-Panel) wirings, or driving ICs such as a gate driver IC and a data driver IC can be arranged, but it is not limited thereto.

[0040] The flexible display device 100 can further include various additional elements for generating various signals or driving pixels within the display area DA. The additional elements for driving pixels can include an inverter circuit, a multiplexer, an electrostatic discharge (ESD) circuit, and the like. The flexible display device 100 can also include additional elements related to functions other than pixel driving. For example, the flexible display device 100 can further include additional elements that provide a touch sensing function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure sensing function, a tactile feedback function, and the like. The aforementioned additional elements can be located in the non-display area NDA and / or an external circuit connected to the connection interface.

[0041] Referring to FIGS. 1a to 1d, the display area DA can include, but is not limited to, a first optical area DA1 and a second optical area DA2.

[0042] In FIGS. 1a to 1d, one or more optoelectronic devices 150, 150a, 150b are electronic components located under the display panel DP (on the side opposite to the viewing surface).

[0043] Light can be incident on the front surface (viewing surface) of the display panel DP, pass through the display panel DP, and be transmitted to one or more optoelectronic devices 150, 150a, 150b located under the display panel DP (on the side opposite to the viewing surface).

[0044] One or more optoelectronic devices 150, 150a, 150b can be devices that receive the light transmitted through the display panel DP and perform functions determined by the received light. For example, the electronic devices 150, 150a, 150b can include one or more of imaging devices such as cameras (image sensors), illuminance sensors, sensing sensors, and proximity sensors.

[0045] As described above, the electronic devices 150, 150a, and 150b are devices that require light reception, but can be located behind (lower part) the display panel DP. That is, the electronic devices 150, 150a, and 150b can be located on the opposite side of the viewing surface of the display panel DP. The electronic devices 150, 150a, and 150b are not exposed on the front surface of the flexible display device 100. Therefore, when the user views the front surface of the flexible display device 100, the electronic devices 150, 150a, and 150b cannot be seen.

[0046] As an example, a camera located behind (lower part) the display panel DP is a front camera that captures the front surface and can also be regarded as a camera lens.

[0047] The electronic devices 150, 150a, and 150b can be arranged so as to overlap with the display area DA of the display panel DP. That is, the electronic devices 150, 150a, and 150b can be located within the display area DA.

[0048] Referring to FIGS. 1a to 1d, the display area DA can include a general area NA and one or more optical areas DA1, DA2.

[0049] One or more optical areas DA1, DA2 may be areas that overlap with one or more optoelectronic devices 150, 150a, 150b.

[0050] According to the example of FIG. 1a, the display area DA can include a general area NA and a first optical area DA1. Here, at least a part of the first optical area DA1 can overlap with the first optoelectronic device 150.

[0051] Although FIG. 1a shows a structure in which the first optical area DA1 is circular, the shape of the first optical area DA1 according to the embodiments of the present invention is not limited thereto.

[0052] For example, as shown in FIG. 1b, the shape of the first optical area DA1 can be octagonal, and in addition, it can be made into various polygonal shapes.

[0053] According to the illustration of FIG. 1c, the display area DA can include a general area NA, a first optical area DA1, and a second optical area DA2. In the illustration of FIG. 1c, a general area NA may exist between the first optical area DA1 and the second optical area DA2. Here, at least a part of the first optical area DA1 can be superimposed on the first optoelectronic device 150a, and at least a part of the second optical area DA2 can be superimposed on the second optoelectronic device 150b.

[0054] According to the illustration of FIG. 1d, the display area DA can include a general area NA, a first optical area DA1, and a second optical area DA2. In the illustration of FIG. 1d, there is no general area NA between the first optical area DA1 and the second optical area DA2. That is, the first optical area DA1 and the second optical area DA2 can be in contact with each other. Here, at least a part of the first optical area DA1 can be superimposed on the first optoelectronic device 150a, and at least a part of the second optical area DA2 can be superimposed on the second optoelectronic device 150b.

[0055] One or more of the optical areas DA1, DA2 must have both an image display structure and a light transmission structure formed. That is, since one or more of the optical areas DA1, DA2 are part of the display area DA, sub-pixels for image display must be arranged in one or more of the optical areas DA1, DA2. A light transmission structure for transmitting light to one or more of the optoelectronic devices 150, 150a, 150b must be formed in one or more of the optical areas DA1, DA2.

[0056] One or more of the optoelectronic devices 150, 150a, 150b are devices that require light reception, but are located on the back (bottom, opposite side of the viewing surface) of the display panel DP to receive light transmitted through the display panel DP.

[0057] One or more of the optoelectronic devices 150, 150a, 150b are not exposed on the front (viewing surface) of the display panel DP. Therefore, when the user looks at the front of the flexible display device 100, the optoelectronic devices 150, 150a, 150b are not visible to the user.

[0058] For example, the first optoelectronic devices 150, 150a may be cameras, and the second optoelectronic device 150b may be a sensing sensor such as a proximity sensor or an illuminance sensor. For example, the sensing sensor may be an infrared sensor that senses infrared rays.

[0059] Conversely, the first optoelectronic devices 150, 150a may be sensing sensors, and the second optoelectronic device 150b may be a camera.

[0060] In the following, for the sake of convenience of explanation, an example is given in which the first optoelectronic devices 150, 150a are cameras and the second optoelectronic device 150b is a sensing sensor. Here, the camera may be a camera lens or an image sensor.

[0061] When the first optoelectronic devices 150, 150a are cameras, this camera is located behind (below) the display panel DP, but may be a front camera that shoots in the front direction of the display panel DP. Therefore, the user can take a picture through a camera that is not visible on the viewing surface while looking at the viewing surface of the display panel DP.

[0062] The general area NA and the one or more optical areas DA1, DA2 included in the display area DA are areas where video display is possible. However, the general area NA is an area where a light transmission structure does not need to be formed, and the one or more optical areas DA1, DA2 are areas where a light transmission structure must be formed.

[0063] Therefore, the one or more optical areas DA1, DA2 must have a transmittance of a certain level or higher, and the general area NA may not have light transmissivity or may have a low transmittance below a certain level.

[0064] For example, the one or more optical areas DA1, DA2 and the general area NA may differ from each other in terms of resolution, sub-pixel arrangement structure, number of sub-pixels per unit area, electrode structure, line structure, electrode arrangement structure, or line arrangement structure.

[0065] For example, the number of sub-pixels per unit area in one or more optical regions DA1, DA2 may be smaller than the number of sub-pixels per unit area in the general region NA. That is, the resolution of one or more optical regions DA1, DA2 may be lower than the resolution of the general region NA. At this time, the number of sub-pixels per unit area is a unit for measuring resolution, and can also be said to be PPI (Pixels Per Inch), which means the number of pixels within 1 inch.

[0066] For example, the number of sub-pixels per unit area in the first optical region DA1 may be smaller than the number of sub-pixels per unit area in the general region NA. The number of sub-pixels per unit area in the second optical region DA2 may be equal to or greater than the number of sub-pixels per unit area in the first optical region DA1.

[0067] The first optical region DA1 may have various patterns such as circular, elliptical, square, hexagonal, or octagonal. The second optical region DA2 may have various patterns such as circular, elliptical, square, hexagonal, or octagonal. The first optical region DA1 and the second optical region DA2 may have the same pattern or different patterns.

[0068] Referring to FIG. 1c, when the first optical region DA1 and the second optical region DA2 are in contact, the overall optical region including the first optical region DA1 and the second optical region DA2 may also have various patterns such as circular, elliptical, square, hexagonal, or octagonal.

[0069] In the following, for the sake of convenience of explanation, it is assumed that each of the first optical region DA1 and the second optical region DA2 is circular.

[0070] In the flexible display device 100 according to an embodiment of the present invention, when the first optoelectronic devices 150, 150a hidden under the display panel DP without being exposed to the outside are cameras, the flexible display device 100 according to an embodiment of the present invention can be said to be a display to which UDC (Under Display Camera) technology is applied.

[0071] According to this, in the case of the flexible display device 100 according to the embodiment of the present invention, since a notch or a camera hole for exposing the camera does not have to be formed in the display panel DP, a reduction in the area of the display area DA does not occur.

[0072] As a result, since a notch or a camera hole for exposing the camera does not have to be formed in the display panel DP, the size of the bezel area can be reduced, there are no design constraints, and the degree of freedom in design can be increased.

[0073] In the flexible display device 100 according to the embodiment of the present invention, although one or more optoelectronic devices 150, 150a, 150b are hidden and located behind the display panel DP, one or more optoelectronic devices 150, 150a, 150b must be able to receive light normally and perform the defined functions normally.

[0074] Also, in the flexible display device 100 according to the embodiment of the present invention, although one or more optoelectronic devices 150, 150a, 150b are hidden and located behind the display panel DP and are located so as to overlap the display area DA, normal video display must be possible in one or more optical areas DA1, DA2 that overlap one or more optoelectronic devices 150, 150a, 150b in the display area DA.

[0075] Therefore, the flexible display device 100 according to an embodiment of the present invention may have a structure capable of improving the transmittance of the first and second optical areas DA1, DA2 that overlap the electronic devices 150, 150a, 150b.

[0076] FIGS. 2a and 2b are diagrams showing an example of the first optical area of the flexible display device of FIG. 1.

[0077] FIG. 2b further shows the wiring SL and the light emitting areas EA1, EA2, EA3, EA4 of the sub-pixels as compared with FIG. 2a.

[0078] Referring to FIGS. 2A and 2B, the first optical region DA1 can overlap with the optoelectronic device. The first optical region DA1 can include a non-transmissive region NTA and a transmissive region TA.

[0079] The transmissive region TA is a part of the region included in the first optical region DA1, and external light can be transmitted to the optoelectronic device by removing an opaque structure such as a cathode electrode. For example, the transmissive region TA can have a circular or elliptical shape and can also be referred to as a hole region.

[0080] Also, the non-transmissive region NTA is a part of the region included in the first optical region DA1, and transistors of the transistor layer and light-emitting elements of the light-emitting element layer can be located.

[0081] The non-transmissive region NTA can include a pixel region PA where light-emitting regions EA1, EA2, EA3, EA4 of a large number of sub-pixels are present and a wiring region WA where signal lines SL are arranged.

[0082] When the transmissive region TA is surrounded by the non-transmissive region NTA, the first optical region DA1 can include a large number of transmissive regions TA in a separated form from each other, but is not limited thereto.

[0083] FIG. 3 is an equivalent circuit of a sub-pixel of a flexible display device according to an embodiment of the present invention.

[0084] Referring to FIG. 3, in a flexible display device according to an embodiment of the present invention, each of a large number of sub-pixels SP arranged on the display panel can include a light-emitting element 120, a driving transistor Td, a scan transistor Ts, a storage capacitor Cst, and the like.

[0085] At this time, the light-emitting element 120 can include a pixel electrode, a common electrode, and a light-emitting layer positioned between the pixel electrode and the common electrode. The pixel electrode is disposed for each sub-pixel SP, and the common electrode can be commonly disposed for a number of sub-pixels SP. For example, the pixel electrode may be an anode electrode, and the common electrode may be a cathode electrode. To give another example, the pixel electrode may be a cathode electrode, and the common electrode may be an anode electrode. For example, the light-emitting element 120 may be an organic light-emitting diode (OLED), a micro light-emitting diode (Micro LED), or a quantum dot (QD: Quantum Dot) light-emitting element, etc.

[0086] The driving transistor Td is a transistor for driving the light-emitting element 120, and can include a first node N1, a second node N2, a third node N3, and the like.

[0087] The first node N1 of the driving transistor Td may be the gate node of the driving transistor Td, and can be electrically connected to the source node or the drain node of the scan transistor Ts. Also, the second node N2 of the driving transistor Td may be the source node or the drain node of the driving transistor Td, and can also be electrically connected to the pixel electrode of the light-emitting element 120. The third node N3 of the driving transistor Td can be electrically connected to a driving voltage line DVL that supplies a driving voltage EVDD.

[0088] Also, the scan transistor Ts is controlled by a scan signal SCAN and can be connected between the first node N1 of the driving transistor Td and the data line DL. The scan transistor Ts is turned on or off by the scan signal SCAN supplied on the gate line GL, and can control the connection between the data line DL and the first node N1 of the driving transistor Td.

[0089] The scan transistor Ts can be turned on by a scan signal SCAN having a turn-on level voltage and can transmit the data voltage Vdata supplied from the data line DL to the first node N1 of the drive transistor Td.

[0090] The turn-on level voltage of the scan signal SCAN that can turn on the scan transistor Ts may be a high level voltage or a low level voltage. The turn-off level voltage of the scan signal SCAN that can turn off the scan transistor Ts may be a low level voltage or a high level voltage. For example, when the scan transistor Ts is an n-type transistor, the turn-on level voltage may be a high level voltage and the turn-off level voltage may be a low level voltage. To give another example, when the scan transistor Ts is a p-type transistor, the turn-on level voltage may be a low level voltage and the turn-off level voltage may be a high level voltage.

[0091] Each of the drive transistor Td and the scan transistor Ts may be an n-type transistor or a p-type transistor.

[0092] The storage capacitor Cst can be connected between the first node N1 and the second node N2 of the drive transistor Td. The storage capacitor Cst is charged with an amount of charge corresponding to the voltage difference across both ends and serves to maintain the voltage difference across both ends during a defined frame time. Thereby, the corresponding sub-pixel SP can emit light during the defined frame time.

[0093] The storage capacitor Cst may be an external capacitor intentionally designed outside the drive transistor Td, not a parasitic capacitor that is an internal capacitor existing between the gate node and the source node (or the drain node) of the drive transistor Td.

[0094] The sub-pixel SP of the flexible display device according to an embodiment of the present invention may further include one or more transistors, or may further include one or more capacitors.

[0095] FIG. 4 is a diagram showing the arrangement of sub-pixels in a display area in a display panel according to an embodiment of the present invention.

[0096] That is, FIG. 4 shows the arrangement of sub-pixels SP in three regions NA, DA1, and DA2 included in the display area of the display panel according to an embodiment of the present invention.

[0097] Referring to FIG. 4, a plurality of sub-pixels SP may be arranged in each of the general region NA, the first optical region DA1, and the second optical region DA2 included in the display area.

[0098] As an example, the plurality of sub-pixels SP may include a red sub-pixel Red SP that emits red light, a green sub-pixel Green SP that emits green light, and a blue sub-pixel Blue SP that emits blue light.

[0099] Accordingly, each of the general region NA, the first optical region DA1, and the second optical region DA2 may include a light-emitting region EA of the red sub-pixel Red SP, a light-emitting region EA of the green sub-pixel Green SP, and a light-emitting region EA of the blue sub-pixel Blue SP.

[0100] Referring to FIG. 4, the general region NA does not include a light-transmitting structure and may include a light-emitting region EA.

[0101] However, the first optical region DA1 and the second optical region DA2 must not only include the light-emitting region EA but also include a light-transmitting structure.

[0102] Therefore, the first optical region DA1 may include a light-emitting region EA and a first transmission region TA1, and the second optical region DA2 may include a light-emitting region EA and a second transmission region TA2.

[0103] The light-emitting region EA and the transmission regions TA1 and TA2 can be distinguished by whether light transmission is possible or not. That is, the light-emitting region EA can be a region where light transmission is impossible, and the transmission regions TA1 and TA2 can be regions where light transmission is possible.

[0104] Also, the light-emitting region EA and the transmission regions TA1 and TA2 can be distinguished by the presence or absence of the formation of a specific metal layer. For example, a cathode electrode may be formed in the light-emitting region EA, and a cathode electrode may not be formed in the transmission regions TA1 and TA2. Also, a light-shielding layer may be formed in the light-emitting region EA, and a light-shielding layer may not be formed in the transmission regions TA1 and TA2.

[0105] At this time, since the first optical region DA1 includes the first transmission region TA1 and the second optical region DA2 includes the second transmission region TA2, both the first optical region DA1 and the second optical region DA2 are regions where light can be transmitted.

[0106] At this time, the transmittance (degree of transmission) of the first optical region DA1 and the transmittance (degree of transmission) of the second optical region DA2 can be the same.

[0107] In this case, the first transmission region TA1 of the first optical region DA1 and the second transmission region TA2 of the second optical region DA2 can have the same pattern or size. Or, even if the pattern and size of the first transmission region TA1 of the first optical region DA1 and the second transmission region TA2 of the second optical region DA2 are different, the ratio of the first transmission region TA1 in the first optical region DA1 and the ratio of the second transmission region TA2 in the second optical region DA2 can be the same.

[0108] In contrast, the transmittance (degree of transmission) of the first optical region DA1 and the transmittance (degree of transmission) of the second optical region DA2 can be different from each other.

[0109] In this case, the first transmission region TA1 of the first optical region DA1 and the second transmission region TA2 of the second optical region DA2 may differ in pattern or size. Alternatively, even if the first transmission region TA1 of the first optical region DA1 and the second transmission region TA2 of the second optical region DA2 have the same pattern and size, the ratio of the first transmission region TA1 in the first optical region DA1 and the ratio of the second transmission region TA2 in the second optical region DA2 may differ from each other.

[0110] For example, when the first optoelectronic device over which the first optical region DA1 is superimposed is a camera and the second optoelectronic device over which the second optical region DA2 is superimposed is a sensing sensor, the camera may require a larger amount of light than the sensing sensor.

[0111] Therefore, the transmittance (degree of transmission) of the first optical region DA1 may be higher than the transmittance (degree of transmission) of the second optical region DA2.

[0112] In this case, the first transmission region TA1 of the first optical region DA1 may have a larger size than the second transmission region TA2 of the second optical region DA2. Alternatively, even if the first transmission region TA1 of the first optical region DA1 and the second transmission region TA2 of the second optical region DA2 have the same size, the ratio of the first transmission region TA1 in the first optical region DA1 may be larger than the ratio of the second transmission region TA2 in the second optical region DA2.

[0113] In the following, for the sake of convenience of explanation, a case where the transmittance (degree of transmission) of the first optical region DA1 is larger than the transmittance (degree of transmission) of the second optical region DA2 will be taken as an example for explanation.

[0114] Also, as shown in FIG. 4, in the embodiments of the present invention, the transmission regions TA1 and TA2 can also be said to be transparent regions, and the transmittance can also be said to be the transparency.

[0115] Also, as shown in FIG. 4, in the embodiments of the present invention, assume a case where the first optical region DA1 and the second optical region DA2 are located at the upper end of the display region of the display panel and are arranged side by side.

[0116] Referring to FIG. 4, the horizontal display area where the first optical area DA1 and the second optical area DA2 are arranged is referred to as the first horizontal display area HA1, and the horizontal display area where the first optical area DA1 and the second optical area DA2 are not arranged is referred to as the second horizontal display area HA2.

[0117] Referring to FIG. 4, the first horizontal display area HA1 can include a general area NA, a first optical area DA1, and a second optical area DA2. In contrast, the second horizontal display area HA2 can include only the general area NA.

[0118] FIG. 5a is a diagram showing, by way of example, the arrangement of signal lines in the first optical area and the general area, respectively, in a display panel according to an embodiment of the present invention.

[0119] FIG. 5b is a diagram showing, by way of example, the arrangement of signal lines in the second optical area and the general area, respectively, in a display panel according to an embodiment of the present invention.

[0120] That is, FIG. 5a shows the arrangement of signal lines in the first optical area DA1 and the general area, respectively, in a display panel according to an embodiment of the present invention, and FIG. 5b shows the arrangement of signal lines in the second optical area DA2 and the general area, respectively, in a display panel according to an embodiment of the present invention.

[0121] The first horizontal display area HA1 shown in FIGS. 5a and 5b is a part of the first horizontal display area HA1 in the display panel, and the second horizontal display area HA2 is a part of the second horizontal display area HA2 in the display panel.

[0122] The first optical area DA1 shown in FIG. 5a is a part of the first optical area DA1 in the display panel, and the second optical area DA2 shown in FIG. 5b is a part of the second optical area DA2 in the display panel.

[0123] Referring to FIGS. 5a and 5b, the first horizontal display area HA1 can include a general area, a first optical area DA1, and a second optical area DA2. The second horizontal display area HA2 can include a general area.

[0124] On the display panel, various types of horizontal lines HL1, HL2 may be arranged, and various types of vertical lines VLn, VL1, VL2 may be arranged.

[0125] In an embodiment of the present invention, the horizontal direction and the vertical direction mean two intersecting directions, and the horizontal direction and the vertical direction may vary depending on the viewing direction. As an example, in an embodiment of the present invention, the horizontal direction may mean the direction in which one gate line extends and is arranged, and the vertical direction may mean the direction in which one data line extends and is arranged. Thus, the horizontal and vertical directions are taken as examples.

[0126] Referring to FIGS. 5a and 5b, the horizontal lines arranged on the display panel may include a first horizontal line HL1 arranged in the first horizontal display area HA1 and a second horizontal line HL2 arranged in the second horizontal display area HA2.

[0127] The horizontal lines arranged on the display panel may be gate lines. That is, the first horizontal line HL1 and the second horizontal line HL2 may be gate lines. The gate lines may include various types of gate lines depending on the structure of the sub-pixels.

[0128] Referring to FIGS. 5a and 5b, the vertical lines arranged on the display panel may include a general vertical line VLn arranged only in the general area, a first vertical line VL1 passing through the first optical area DA1 and the general area, and a second vertical line VL2 passing through the second optical area DA2 and the general area.

[0129] The vertical lines arranged on the display panel may include data lines, driving voltage lines, etc., and moreover, may further include a reference voltage line, an initialization voltage line, etc. That is, the general vertical line VLn, the first vertical line VL1, and the second vertical line VL2 may include data lines, driving voltage lines, etc., and moreover, may further include a reference voltage line, an initialization voltage line, etc.

[0130] In an embodiment of the present invention, in the second horizontal line HL2, the term "horizontal" only means that a signal is transmitted from the left side (or the right side) to the right side (or the left side), and it does not necessarily mean that the second horizontal line HL2 extends in a straight line only in the exact horizontal direction. That is, in FIGS. 5a and 5b, although the second horizontal line HL2 is shown in a straight line form, differently, the second horizontal line HL2 can include a folded or bent portion. Similarly, the first horizontal line HL1 can also include a folded or bent portion.

[0131] In an embodiment of the present invention, in the general vertical line Vln, the term "vertical" only means that a signal is transmitted from the upper side (or the lower side) to the lower side (or the upper side), and it does not mean that the general vertical line Vln extends in a straight line only in the exact vertical direction. That is, in FIGS. 5a and 5b, although the general vertical line Vln is shown in a straight line form, differently, the general vertical line Vln can include a folded or bent portion. Similarly, the first vertical line VL1 and the second vertical line VL2 can also include a folded or bent portion.

[0132] Referring to FIG. 5a, the first optical region DA1 included in the first horizontal region HA1 can include a light-emitting region and a first transmission region. Within the first optical region DA1, the outer region of the first transmission region can include the light-emitting region.

[0133] Referring to FIG. 5a, in order to improve the transmittance of the first optical region DA1, the first horizontal line HL1 passing through the first optical region DA1 can pass by avoiding the first transmission region within the first optical region DA1.

[0134] Therefore, each of the first horizontal lines HL1 passing through the first optical region DA1 can include a curved section or a bending section that bypasses outside the frame of the outline of each first transmission region.

[0135] As a result, the first horizontal line HL1 disposed in the first horizontal area HA1 and the second horizontal line HL2 disposed in the second horizontal area HA2 may differ from each other in pattern, length, or the like. That is, the first horizontal line HL1 passing through the first optical area DA1 and the second horizontal line HL2 not passing through the first optical area DA1 may differ from each other in pattern, length, or the like.

[0136] Also, in order to improve the transmittance of the first optical area DA1, the first vertical line VL1 passing through the first optical area DA1 can pass while avoiding the first transmission area within the first optical area DA1.

[0137] Therefore, each of the first vertical lines VL1 passing through the first optical area DA1 can include a curved section or a bending section that bypasses outside the frame of the outline of each first transmission area.

[0138] As a result, the first vertical line VL1 passing through the first optical area DA1 and the general vertical line VLn disposed in the general area without passing through the first optical area DA1 may differ from each other in pattern, length, or the like.

[0139] Referring to FIG. 5a, the first transmission areas included in the first optical area DA1 within the first horizontal area HA1 can be arranged in a diagonal direction.

[0140] Referring to FIG. 5a, in the first optical area DA1 within the first horizontal area HA1, a light emitting area can be disposed between two adjacent first transmission areas on the left and right. In the first optical area DA1 within the first horizontal area HA1, a light emitting area can be disposed between two adjacent first transmission areas above and below.

[0141] Referring to FIG. 5a, the first horizontal line HL1 disposed in the first horizontal area HA1, that is, the first horizontal line HL1 passing through the first optical area DA1, can all include at least one curved section or a bending section that bypasses outside the frame of the outline of the first transmission area.

[0142] Referring to FIG. 5b, the second optical region DA2 included in the first horizontal region HA1 may include a light-emitting region and a second transmission region TA2. Within the second optical region DA2, the outer region of the second transmission region TA2 may include the light-emitting region.

[0143] The positions and arrangements of the light-emitting region and the second transmission region TA2 within the second optical region DA2 may be the same as the positions and arrangements of the light-emitting region and the second transmission region within the first optical region DA1 in FIG. 5a.

[0144] In contrast, as shown in FIG. 5b, the positions and arrangements of the light-emitting region and the second transmission region TA2 within the second optical region DA2 may be different from the positions and arrangements of the light-emitting region and the second transmission region within the first optical region DA1 in FIG. 5a.

[0145] For example, referring to FIG. 5b, within the second optical region DA2, the second transmission regions TA2 may be arranged in the horizontal direction (left-right direction). A light-emitting region may not be arranged between two adjacent second transmission regions TA2 in the horizontal direction (left-right direction). Also, the light-emitting region within the second optical region DA2 may be arranged between the second transmission regions TA2 adjacent in the vertical direction (up-down direction). That is, a light-emitting region may be arranged between the rows of two second transmission regions TA2.

[0146] When the first horizontal line HL1 passes through the second optical region DA2 and the general region around it within the first horizontal region HA1, it can pass in the same form as in FIG. 5a.

[0147] In contrast, as shown in FIG. 5b, when the first horizontal line HL1 passes through the second optical region DA2 and the general region around it within the first horizontal region HA1, it can pass in a different form from that in FIG. 5a.

[0148] That is, it is because the positions and arrangements of the light-emitting region and the second transmission region TA2 within the second optical region DA2 in FIG. 5b are different from the positions and arrangements of the light-emitting region and the second transmission region within the first optical region DA1 in FIG. 5a.

[0149] Referring to FIG. 5b, when the first horizontal line HL1 passes through the second optical region DA2 and the general region around it within the first horizontal region HA1, it can pass linearly between the vertically adjacent second transmission regions TA2 without any curved sections or bending sections.

[0150] In other words, one first horizontal line HL1 has a curved section or a bending section within the first optical region DA1, but may not have a curved section or a bending section within the second optical region DA2.

[0151] For the improvement of the transmittance of the second optical region DA2, the second vertical line VL2 passing through the second optical region DA2 can avoid passing through the second transmission region TA2 within the second optical region DA2.

[0152] Therefore, each of the second vertical lines VL2 passing through the second optical region DA2 can include a curved section or a bending section that bypasses outside the outline frame of each second transmission region TA2.

[0153] As a result, the second vertical line VL2 passing through the second optical region DA2 and the general vertical line VLn arranged in the general region without passing through the second optical region DA2 may have different patterns or lengths, etc. from each other.

[0154] As shown in FIG. 5a, the first horizontal line HL1 passing through the first optical region DA1 can have a curved section or a bending section that bypasses outside the outline frame of the first transmission region.

[0155] Therefore, the length of the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 can be slightly longer than the length of the second horizontal line HL2 arranged only in the general region without passing through the first optical region DA1 and the second optical region DA2.

[0156] As a result, the resistance of the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 (hereinafter also referred to as the first resistance) can be slightly greater than the resistance of the second horizontal line HL2 disposed only in the general region without passing through the first optical region DA1 and the second optical region DA2 (hereinafter also referred to as the second resistance).

[0157] Referring to FIGS. 5a and 5b, due to the light transmission structure, the first optical region DA1 that at least partially overlaps with the first optoelectronic device includes a plurality of first transmission regions, and the second optical region DA2 that at least partially overlaps with the second optoelectronic device includes a plurality of second transmission regions TA2. Therefore, the first optical region DA1 and the second optical region DA2 may have fewer sub-pixels per unit area than the general region.

[0158] The number of sub-pixels to which the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 is connected and the number of sub-pixels to which the second horizontal line HL2 disposed only in the general region without passing through the first optical region DA1 and the second optical region DA2 is connected may be different from each other.

[0159] The number of sub-pixels (the first number) to which the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 is connected can be less than the number of sub-pixels (the second number) to which the second horizontal line HL2 disposed only in the general region without passing through the first optical region DA1 and the second optical region DA2 is connected.

[0160] The difference between the first number and the second number can vary depending on the difference between the resolution of each of the first optical region DA1 and the second optical region DA2 and the resolution of the general region. For example, the greater the difference between the resolution of each of the first optical region DA1 and the second optical region DA2 and the resolution of the general region, the greater the difference between the first number and the second number can be.

[0161] As described above, since the number of sub-pixels (first number) to which the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 is connected is smaller than the number of sub-pixels (second number) to which the second horizontal line HL2 that does not pass through the first optical region DA1 and the second optical region DA2 and is arranged only in the general region is connected, the area where the first horizontal line HL1 overlaps with other electrodes and lines in the periphery can be smaller than the area where the second horizontal line HL2 overlaps with other electrodes and lines in the periphery.

[0162] Therefore, the parasitic capacitance formed by the first horizontal line HL1 and other electrodes and lines in the periphery (hereinafter referred to as the first capacitance) can be much smaller than the parasitic capacitance formed by the second horizontal line HL2 and other electrodes and lines in the periphery (hereinafter referred to as the second capacitance).

[0163] When considering the magnitude relationship between the first resistance and the second resistance (the second resistance is greater than or equal to the first resistance) and the magnitude relationship between the first capacitance and the second capacitance (the first capacitance << the second capacitance), the RC (Resistance-Capacitance) value of the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 (hereinafter also referred to as the first RC value) can be much smaller than the RC value of the second horizontal line HL2 that does not pass through the first optical region DA1 and the second optical region DA2 and is arranged only in the general region (hereinafter also referred to as the second RC value) (the first RC value << the second RC value).

[0164] Due to the difference between the first RC value of the first horizontal line HL1 and the second RC value of the second horizontal line HL2 (hereinafter referred to as the RC Load deviation), the signal transmission characteristics through the first horizontal line HL1 and the signal transmission characteristics through the second horizontal line HL2 can change.

[0165] FIG. 6 is a diagram showing the cross-sectional structures of the non-transmissive region and the transmissive region in the first optical region and the cross-sectional structure of the general region in a flexible display device according to an embodiment of the present invention.

[0166] Referring to FIG. 6, the first optical region DA1 of the display panel DP can include a transmissive region TA and a non-transmissive region NTA. The general region NA of the display panel DP can be regarded as the non-transmissive region NTA.

[0167] Hereinafter, the laminated structure of the non-transmissive region NTA, the laminated structure of the transmissive region TA, and the laminated structure of the general region NA within the first optical region DA1 will be examined.

[0168] First, the laminated structure of the general region NA is as follows.

[0169] In the general region NA, a transistor layer TRL may be disposed on the upper part of the substrate SUB, and a planarization layer PLN may be disposed on the upper part of the transistor layer TRL. Further, a light-emitting element layer EDL may be disposed on the upper part of the planarization layer PLN, a sealing layer ENCAP may be disposed on the upper part of the light-emitting element layer EDL, a touch sensor layer TSL may be disposed on the upper part of the sealing layer ENCAP, and a protective layer PAC may be disposed on the upper part of the touch sensor layer TSL.

[0170] In the general region NA, a large number of transistors such as a driving transistor and a scan transistor for each sub-pixel may be disposed in the transistor layer TRL, and various insulating films for forming the transistors may be disposed. The various insulating films can include organic films and inorganic films.

[0171] In the general region NA, various wirings such as data lines, gate lines, and driving voltage lines may be disposed in the transistor layer TRL.

[0172] In the general region NA, the light-emitting elements 120 of each sub-pixel may be disposed in the light-emitting element layer EDL. That is, in the general region NA, a pixel electrode, a light-emitting layer, and a common electrode constituting the light-emitting element 120 may be disposed in the light-emitting element layer EDL.

[0173] In the general region NA, a touch sensor may be disposed in the touch sensor layer TSL, and a touch buffer film and a touch insulating film necessary for forming the touch sensor may be further disposed.

[0174] Next, the laminated structure of the non-transmissive region NTA of the first optical region DA1 is the same as the laminated structure of the general region NA.

[0175] Referring to FIG. 6, in the non-transmissive region NTA of the first optical region DA1, a transistor layer TRL may be disposed on the upper portion of the substrate SUB, and a planarization layer PLN may be disposed on the upper portion of the transistor layer TRL. Further, a light-emitting element layer EDL may be disposed on the upper portion of the planarization layer PLN, and a sealing layer ENCAP may be disposed on the upper portion of the light-emitting element layer EDL. A touch sensor layer TSL may be disposed on the upper portion of the sealing layer ENCAP, and a protective layer PAC may be disposed on the upper portion of the touch sensor layer TSL.

[0176] The light-emitting element 120 is vulnerable to moisture and oxygen. The sealing layer ENCAP can prevent the penetration of moisture and oxygen and prevent the light-emitting element 120 from being exposed to moisture and oxygen. The sealing layer ENCAP may be composed of one layer or may be composed of a number of layers.

[0177] In the non-transmissive region NTA of the first optical region DA1, a number of transistors such as driving transistors and scan transistors of each sub-pixel may be disposed in the transistor layer TRL, and various insulating films for forming the transistors may be disposed. Here, the various insulating films can include organic films and inorganic films.

[0178] Also, in the non-transmissive region NTA of the first optical region DA1, various wirings such as data lines, gate lines, and driving voltage lines may be disposed in the transistor layer TRL.

[0179] In the non-transmissive region NTA of the first optical region DA1, the light-emitting elements 120 of each sub-pixel may be disposed in the light-emitting element layer EDL. That is, in the non-transmissive region NTA of the first optical region DA1, a pixel electrode, a light-emitting layer, and a common electrode constituting the light-emitting element 120 may be disposed in the light-emitting element layer EDL.

[0180] Also, in the non-transmissive region NTA of the first optical region DA1, a touch sensor TS may be disposed in the touch sensor layer TSL, and a touch buffer film, a touch insulating film, etc. necessary for forming the touch sensor TS may be further disposed.

[0181] And the stacked structure of the transmissive region TA of the first optical region DA1 is as follows.

[0182] Referring to FIG. 6, in the transmissive region TA of the first optical region DA1, a transistor layer TRL is disposed above the substrate SUB, and a planarization layer PLN may be disposed above the transistor layer TRL. Also, a light-emitting element layer EDL may be disposed above the planarization layer PLN, and a sealing layer ENCAP may be disposed above the light-emitting element layer EDL. A touch sensor layer TSL is disposed above the sealing layer ENCAP, and a protective layer PAC may be disposed above the touch sensor layer TSL.

[0183] In the transmissive region TA of the first optical region DA1, a number of transistors such as drive transistors and scan transistors of each sub-pixel and various wirings may be disposed in the transistor layer TRL, and a light-emitting element 120 of each sub-pixel may be disposed in the light-emitting element layer EDL. In the transmissive region TA of the first optical region DA1, a touch sensor TS may be disposed in the touch sensor layer TSL.

[0184] At this time, in the transmissive region TA of the first optical region DA1, no transistors and wirings are disposed in the transistor layer TRL. However, in the transmissive region TA of the first optical region DA1, various insulating films necessary for forming the transistors may be disposed in the transistor layer TRL. Here, the various insulating films may include organic films and inorganic films.

[0185] Also, in the transmission region TA of the first optical region DA1, the light-emitting element layer EDL does not have the light-emitting elements 120 of each sub-pixel arranged therein. That is, in the transmission region TA of the first optical region DA1, the pixel electrode, the light-emitting layer, and the common electrode are not arranged in the light-emitting element layer EDL. However, the present invention is not limited thereto, and in the transmission region TA of the first optical region DA1, only some of the pixel electrode, the light-emitting layer, and the common electrode may be arranged in the light-emitting element layer EDL. For example, in the transmission region TA of the first optical region DA1, only the light-emitting layer may be arranged in the light-emitting element layer EDL.

[0186] In the transmission region TA of the first optical region DA1, the touch sensor layer TSL does not have the touch sensor arranged therein. In the transmission region TA of the first optical region DA1, a touch buffer film, a touch insulating film, etc. may be arranged in the touch sensor layer TSL.

[0187] Referring to FIG. 6, among the metal material layer and the insulating material layer arranged in the non-transmission regions NTA of the first optical region DA1 and the general region NA, the metal material layer is not arranged in the transmission region TA of the first optical region DA1. However, among the metal material layer and the insulating material layer arranged in the non-transmission regions NTA of the first optical region DA1 and the general region NA, the insulating material layer may be extended and arranged up to the transmission region TA of the first optical region DA1.

[0188] In other words, the metal material layer is arranged in the non-transmission region NTA of the first optical region DA1 and the non-transmission region NTA of the general region NA, and is not arranged in the transmission region TA of the first optical region DA1. The insulating material layer may be commonly arranged in the non-transmission region NTA of the first optical region DA1, the non-transmission region NTA of the general region NA, and the transmission region TA of the first optical region DA1. However, the present invention is not limited thereto.

[0189] Also, the transmission region TA of the first optical region DA1 may be superimposed on the first optoelectronic device 150, and external light may be transmitted through the transmission region TA of the first optical region DA1 to the first optoelectronic device 150. Therefore, for the normal operation of the first optoelectronic device 150, the transmittance of the transmission region TA of the first optical region DA1 must be high.

[0190] On the one hand, the planarization layer PLN of the first optical region DA1 and the general region NA can be composed of two layers, namely, the first planarization layer and the second planarization layer, and photoacrylic (PAC) can be applied to improve productivity. That is, the present invention applies a bezel bending display device to reduce the bezel width, applies two-layer wiring layers and two-layer planarization layers, and applies PAC to improve productivity. In this case, corrosion defects may occur in the source / drain wiring due to moisture permeation from the top of the display panel. In particular, in the GIP wiring portion near the contact hole adjacent to the bending region, different-layer wirings are connected to each other, and thus dissimilar contact corrosion, that is, galvanic corrosion, may occur. Galvanic corrosion occurs when two materials are exposed to a corrosive environment in contact with each other, and the movement of intermetallic electrons occurs due to the potential difference between them. The metal with a relatively high noble potential has a reduced corrosion rate, and the corrosion rate of the metal with a relatively low active potential increases. Therefore, conventionally, PI has been applied instead of PAC as the planarization layer PLN. However, in the case of the UDC model or the UDIR model, as the cathode is removed to ensure the transmittance of the transmission region TA, the UV reliability becomes vulnerable. At the same time, when PI is applied instead of PAC as the planarization layer PLN, it may be vulnerable to pixel shrinkage defects due to outgas. As an example, when PAC is applied, the pixel shrinkage occurrence rate with respect to the input quantity is 0%, while when PI is applied, the pixel shrinkage occurrence rate with respect to the input quantity reaches 100%.

[0191] Therefore, while applying a PAC series material as the planarization layer PLN, the present invention partially removes the planarization layer PLN above the contact hole of the GIP wiring portion and fills it with a bank of a PI series material, or covers a part of the wiring above the contact hole of the GIP wiring portion with a metal layer of an anode electrode or a touch electrode to prevent moisture permeation, thereby improving productivity and at the same time improving the corrosion defect of the GIP wiring portion. A detailed description thereof will be given later with reference to FIGS. 7 to 11.

[0192] FIG. 7 is a diagram showing a part of a cross section of a flexible display device according to an embodiment of the present invention.

[0193] FIG. 8 is a diagram showing a part of a cross section of a flexible display device according to another embodiment of the present invention.

[0194] FIGS. 7 and 8 show a part of a cross section of the non-transmissive region NTA and the transmissive region TA of the first optical region.

[0195] In FIG. 7, the bank 116 is disposed in the transmissive region TA, while in FIG. 8, a part of the bank 116 is removed in the transmissive region TA. That is, FIGS. 7 and 8 only differ in the form of the bank 116 in the transmissive region TA, and other configurations are substantially the same, so duplicate descriptions are omitted.

[0196] Referring to FIGS. 7 and 8, both the non-transmissive region NTA and the transmissive region TA of the first optical region can basically include a substrate SUB, a transistor layer TRL, a planarization layer PLN, a light-emitting element layer EDL, a sealing layer ENCAP, a touch sensor layer TSL, and a protective layer PAC.

[0197] First, the laminated structure of the non-transmissive region NTA included in the first optical region will be described.

[0198] The substrate SUB can include a first substrate 110a, a second substrate 110b, and an interlayer insulating film 110c. The interlayer insulating film 110c can be disposed between the first substrate 110a and the second substrate 110b. By configuring the substrate SUB with the first substrate 110a, the second substrate 110b, and the interlayer insulating film 110c in this way, moisture penetration can be prevented. For example, the first substrate 110a and the second substrate 110b may be polyimide (PI) substrates.

[0199] In the transistor layer TRL, various patterns 131, 132, 133, 134 for forming transistors such as the driving transistor Td, various insulating films 111a, 111b, 112, 113a, 113b, 114, and various metal patterns TM, GM, 135 can be disposed.

[0200] Hereinafter, the laminated structure of the transistor layer TRL will be described in more detail.

[0201] A multi-buffer layer 111a is disposed on the second substrate 110b, and an active buffer layer 111b can be disposed on the multi-buffer layer 111a.

[0202] A metal layer 135 can be disposed on the multi-buffer layer 111a.

[0203] Here, the metal layer 135 can serve as a light shield and can also be referred to as a light-shielding layer.

[0204] An active buffer layer 111b can be disposed on the metal layer 135.

[0205] An active layer 134 of the driving transistor Td can be disposed on the active buffer layer 111b.

[0206] A gate insulating film 112 can be disposed on the active layer 134.

[0207] Further, a gate electrode 131 of the driving transistor Td may be disposed on the gate insulating film 112. At this time, a gate material layer GM may be disposed on the gate insulating film 112 at a position different from the formation position of the driving transistor Td.

[0208] A first interlayer insulating film 113a may be disposed on the gate electrode 131 and the gate material layer GM. A metal pattern TM may be disposed on the first interlayer insulating film 113a. A second interlayer insulating film 113b may be disposed while covering the metal pattern TM on the first interlayer insulating film 113a.

[0209] A source electrode 132 and a drain electrode 133 of the driving transistor Td may be disposed on the second interlayer insulating film 113b.

[0210] The source electrode 132 and the drain electrode 133 may be respectively connected to one side and the other side of the active layer 134 through contact holes provided in the second interlayer insulating film 113b, the first interlayer insulating film 113a, and the gate insulating film 112.

[0211] A portion of the active layer 134 that overlaps the gate electrode 131 is a channel region. One of the source electrode 132 and the drain electrode 133 is connected to one side of the channel region in the active layer 134, and the other one is connected to the other side of the channel region in the active layer 134.

[0212] A passivation layer 114 may be disposed on the source electrode 132 and the drain electrode 133.

[0213] A planarization layer PLN may be located above the transistor layer TRL.

[0214] The planarization layer PLN can include a first planarization layer 115a and a second planarization layer 115b. The first planarization layer 115a can be made of a PI series material, and the second planarization layer 115b can be made of a PAC series material. That is, for the pixel reduction issue in the UDC model or UDIR model, the outgassing of the second planarization layer 115b rather than the first planarization layer 115a is the main cause, and only the second planarization layer 115b can be composed of a PAC series material.

[0215] The first planarization layer 115a can be disposed on the passivation layer 114.

[0216] The connection electrode 125 can be disposed on the first planarization layer 115a.

[0217] The connection electrode 125 can be connected to one of the source electrode 132 and the drain electrode 133 through a contact hole provided in the first planarization layer 115a.

[0218] The second planarization layer 115b can be disposed on the connection electrode 125.

[0219] The light-emitting element layer EDL can be located on top of the second planarization layer 115b.

[0220] Hereinafter, the stacked structure of the light-emitting element layer EDL will be examined in detail.

[0221] The pixel electrode 121 can be disposed on the second planarization layer 115b. At this time, the pixel electrode 121 can be electrically connected to the connection electrode 125 through a contact hole provided in the second planarization layer 115b. For example, the pixel electrode 121 can be an anode electrode.

[0222] The bank 116 can be disposed while covering the pixel electrode 121. A portion of the bank 116 corresponding to the light-emitting region of the sub-pixel can be open. A part of the pixel electrode 121 can be exposed in the open portion (hereinafter referred to as the open region) of the bank 116. At this time, the bank 116 can be made of a PI series material.

[0223] The light-emitting layer 122 can be disposed in the open region of the bank 116 and its periphery. As a result, the light-emitting layer 122 can be disposed on the pixel electrode 121 exposed through the open region of the bank 116.

[0224] The common electrode 123 can be disposed on the light-emitting layer 122. For example, the common electrode 123 can be a cathode electrode.

[0225] The light-emitting element 120 can be formed by the pixel electrode 121, the light-emitting layer 122, and the common electrode 123. The light-emitting layer 122 can include a number of organic films.

[0226] The encapsulation layer ENCAP can be located on top of the above-described light-emitting element layer EDL.

[0227] The encapsulation layer ENCAP can have a single-layer structure or a multi-layer structure. For example, the encapsulation layer ENCAP can include a first encapsulation layer 117a, a second encapsulation layer 117b, and a third encapsulation layer 117c.

[0228] At this time, the first encapsulation layer 117a and the third encapsulation layer 117c can be composed of an inorganic film, and the second encapsulation layer 117b can be composed of an organic film. Among the first encapsulation layer 117a, the second encapsulation layer 117b, and the third encapsulation layer 117c, the second encapsulation layer 117b is the thickest and can serve as a planarization layer.

[0229] The first encapsulation layer 117a can be disposed on the common electrode 123 and can be disposed so as to be most adjacent to the light-emitting element 120. The first encapsulation layer 117a can be formed of an inorganic insulating material capable of low-temperature deposition. For example, the first encapsulation layer 117a can be composed of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al 2 O 3 ) or the like. Since the first encapsulation layer 117a is deposited in a low-temperature atmosphere, it is possible to prevent the light-emitting layer 122 containing organic substances that are vulnerable to a high-temperature atmosphere from being damaged during the deposition process.

[0230] The second encapsulation layer 117b can be formed with an area smaller than that of the first encapsulation layer 117a. In this case, the second encapsulation layer 117b can be formed so as to expose both ends of the first encapsulation layer 117a. The second encapsulation layer 117b can serve as a buffer to relieve the stress between layers due to the warpage of the flexible display device and strengthen the planarization performance.

[0231] For example, the second encapsulation layer 117b can be composed of an organic insulating material such as an acrylic resin, an epoxy resin, a polyimide, a polyethylene, or a silicon oxycarbide (SiOC). For example, the second encapsulation layer 117b may be formed through an inkjet method, but is not limited thereto.

[0232] Although not shown, in order to prevent the encapsulation layer ENCAP from collapsing, one or more dams can be arranged at or near the end points of the inclined surface of the encapsulation layer ENCAP. The one or more dams can be arranged at or near the boundary points between the display area and the non-display area.

[0233] The second encapsulation layer 117b containing an organic substance can be located only on the inner surface of the outermost primary dam. That is, the second encapsulation layer 117b does not have to be present on top of all the dams. In contrast, the second encapsulation layer 117b containing an organic substance can be located on top of at least the primary dam among the primary dam and the secondary dam. That is, the second encapsulation layer 117b can be located so as to extend up to the top of the primary dam. Or, the second encapsulation layer 117b can be located so as to extend from the top of the primary dam through the top of the secondary dam.

[0234] The third encapsulation layer 117c can be formed on the substrate SUB on which the second encapsulation layer 117b is formed so as to cover the upper surfaces and side surfaces of the second encapsulation layer 117b and the first encapsulation layer 117a, respectively. At this time, the third encapsulation layer 117c can minimize or block the penetration of external moisture and oxygen into the first encapsulation layer 117a and the second encapsulation layer 117b. For example, the third encapsulation layer 117c is silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al 2 O3 ) can be composed of an inorganic insulating material such as etc.

[0235] A touch sensor layer TSL can be disposed on top of the above-described encapsulation layer ENCAP.

[0236] Hereinafter, the stacked structure of the touch sensor layer TSL will be described in detail.

[0237] A touch buffer film 118a can be disposed on top of the encapsulation layer ENCAP, and a touch sensor 140 can be disposed on the touch buffer film 118a.

[0238] The touch sensor 140 can include a touch sensor metal 141 and a bridge metal 142 located in different layers. A touch interlayer insulating film 118b can be disposed between the touch sensor metal 141 and the bridge metal 142.

[0239] For example, the touch sensor metal 141 can include a first touch sensor metal, a second touch sensor metal, and a third touch sensor metal that are arranged adjacent to each other. The first touch sensor metal and the second touch sensor metal are electrically connected to each other. However, if there is a third touch sensor metal between the first touch sensor metal and the second touch sensor metal, the first touch sensor metal and the second touch sensor metal can be electrically connected through a bridge metal 142 in another layer. The bridge metal 142 can be insulated from the third touch sensor metal by the touch interlayer insulating film 118b.

[0240] When forming the touch sensor layer TSL, chemicals (such as a developer or an etching solution) or external moisture used in the process may be generated. By disposing the touch buffer film 118a and arranging the touch sensor layer TSL thereon, it is possible to prevent chemicals, moisture, etc. during the manufacture of the touch sensor layer TSL from penetrating into the light-emitting layer 122 containing organic substances. Accordingly, the touch buffer film 118a can prevent damage to the light-emitting layer 122 that is vulnerable to chemicals or moisture.

[0241] The touch buffer film 118a can be formed of an organic insulating material that can be formed at a certain temperature (for example, a low temperature of 100 °C or less) and has a low dielectric constant of 1-3 in order to prevent damage to the light-emitting layer 122 containing organic substances that are vulnerable to high temperatures. For example, the touch buffer film 118a can be formed of a material of the acrylic series, epoxy series, or siloxane series. Due to the warping of the flexible display device, the encapsulation layer ENCAP can be damaged, and the touch sensor metal 141 located above the touch buffer film 118a can be cracked. Even if the flexible display device is warped, the touch buffer film 118a composed of an organic insulating material and having a planarization performance can prevent damage to the encapsulation layer ENCAP and cracking of the metals 141 and 142 constituting the touch sensor 140.

[0242] The protective layer PAC can be arranged to cover the touch sensor 140. The protective layer PAC can be composed of an organic insulating film.

[0243] Hereinafter, the laminated structure of the transmission region TA included in the first optical region will be described.

[0244] Referring to FIGS. 7 and 8, the substrate SUB and various insulating films 111a, 111b, 112, 113a, 113b, 114, 115a, 115b, 117a, 117b, 117c, PAC arranged in the non-transmission region NTA of the first optical region can be arranged identically in the transmission region TA of the first optical region.

[0245] However, in addition to insulating substances in the non-transmission region NTA of the first optical region, a substance layer having electrical characteristics or opaque characteristics (for example, a metal substance layer, a semiconductor layer, etc.) may not be arranged in the transmission region TA of the first optical region.

[0246] For example, the metal material layers 135, 131, GM, TM, 132, 133, 125 related to the transistor and the semiconductor layer 134 are not disposed in the transmission region TA. Further, the pixel electrode 121 and the common electrode 123 included in the light-emitting element 120 may not be disposed in the transmission region TA. The light-emitting layer 122 may or may not be disposed in the transmission region TA. Also, the touch sensor metal 141 and the bridge metal 142 included in the touch sensor 140 are not disposed in the transmission region TA. However, the present invention is not limited thereto.

[0247] That is, since the transmission region TA of the first optical region is superimposed on the first optoelectronic device 150, the transmittance of the transmission region TA must be high for the normal operation of the first optoelectronic device 150.

[0248] Hereinafter, the configuration of the present invention for improving the corrosion failure of the GIP wiring portion will be described in detail with reference to FIGS. 9 and 10.

[0249] FIG. 9 is a plan view showing a GIP wiring portion according to an embodiment of the present invention.

[0250] FIG. 10 is a view showing a cross section taken along line C-C' of FIG. 9.

[0251] FIGS. 9 and 10 show a part of the non-display region including the bending region BA and the non-bending region NBA, that is, a part of the GIP wiring portion.

[0252] At this time, the region other than the quadrilateral shown in FIG. 9 indicates the region where the second planarization layer 215b is disposed.

[0253] Referring to FIGS. 9 and 10, the non-display region of the GIP wiring portion may include a substrate SUB, GIP wirings GM1, SDM1, SDM2, planarization layers 115a, 215b, a bank 216, a touch buffer film 118a, a touch interlayer insulating film 118b, and a protective layer PAC.

[0254] For convenience of explanation, although not shown, the substrate SUB may include a first substrate, a second substrate, and an interlayer insulating film. The interlayer insulating film may be disposed between the first substrate and the second substrate.

[0255] On the upper part of the substrate SUB of the GIP wiring portion, various insulating films of the transistor layer, that is, the multi-buffer layer 111a, the active buffer layer 111b, and the gate insulating film 112 may be disposed. However, the present invention is not limited thereto, and some insulating films may not be disposed.

[0256] The GIP wiring GM1 may be disposed on the gate insulating film 112.

[0257] The GIP wiring GM1 can extend to the driving IC to receive an applied signal or extend to the pixels in the display area to transmit a signal.

[0258] The GIP wiring GM1 may be made of the same metal material in the same layer as the gate electrode of the transistor in the display area, but is not limited thereto.

[0259] The first interlayer insulating film 113a and the second interlayer insulating film 113b may be disposed on the GIP wiring GM1.

[0260] The connection wiring SDM1 may be disposed on the second interlayer insulating film 113b.

[0261] That is, the connection wiring SDM1 is disposed on the second interlayer insulating film 113b in the non-bending area NBA and may include a first contact area connected to the GIP wiring GM1.

[0262] The connection wiring SDM1 can connect between the link wiring SDM2 and the GIP wiring GM1.

[0263] The connection wiring SDM1 can be electrically connected to the link wiring SDM2, that is, the second contact area, through a number of first contact holes 140a, and at the same time, can be electrically connected to the GIP wiring GM1 through a number of second contact holes 140b.

[0264] The connection wiring SDM1 can be made of the same metal material as the source and drain electrodes of the transistors in the display area, but is not limited to this.

[0265] The first planarization layer 115a can be disposed on the connection wiring SDM1.

[0266] At this time, the first planarization layer 115a can be made of a material of the PI series.

[0267] The link wiring SDM2 can be disposed on the first planarization layer 115a.

[0268] The link wiring SDM2 can be a wiring that connects between the GIP wiring connected to the driving IC and the GIP wiring GM1 connected to the pixels in the display area.

[0269] The link wiring SDM2 can be disposed on the first planarization layer 115a, extend to the bending area BA, and include a second contact area connected to the connection wiring SDM1.

[0270] The link wiring SDM2 can be made of the same metal material as the connection electrodes in the display area, but is not limited to this.

[0271] The second planarization layer 215b can be disposed on the link wiring SDM2.

[0272] The second planarization layer 215b can be made of a material of the PAC series.

[0273] On the other hand, one embodiment of the present invention is characterized in that a part of the second planarization layer 215b above the contact area of the GIP wiring part, that is, the contact area where the first contact hole 140a and the second contact hole 140b are disposed, is partially removed to form an open area OP. A part of the link wiring SDM2, that is, the second contact area, can be exposed by the open area OP.

[0274] At this time, although not shown, a blocking layer may be further formed so as to cover the end of the link wiring SDM2 exposed by the open region OP, that is, the second contact region, and block the end of the GIP wiring GM1, that is, the first contact region of the connection wiring SDM1.

[0275] Here, the blocking layer can be disposed on the link wiring SDM2 so as to block the periphery of the first contact hole 140a where the connection wiring SDM1 and the link wiring SDM2 are connected and the periphery of the second contact hole 140b where the connection wiring SDM1 and the GIP wiring GM1 are connected, that is, the contact region.

[0276] The blocking layer can be made of a transparent conductive material such as ITO, IZO, IGZO, etc., but is not limited thereto.

[0277] The bank 216 can be disposed on the second planarization layer 215b, but is not limited thereto, and in some cases, the bank 216 may not be disposed.

[0278] The bank 216 can be made of a material of the PI series. The material of the PI series has good adhesion to Ti of the link wiring SDM2 and is relatively excellent in moisture barrier prevention compared to PAC.

[0279] The bank 216 can be disposed so as to fill the open region OP of the second planarization layer 215b, but the present invention is not limited thereto, and an insulating film made of a material of the PI series other than the bank 216 can be used.

[0280] A touch buffer film 118a and a touch interlayer insulating film 118b can be disposed on the bank 216.

[0281] A protective layer PAC can be disposed on the touch interlayer insulating film 118b.

[0282] Thus, in one embodiment of the present invention, by partially removing the second planarization layer 215b on the contact region of the GIP wiring portion and covering the exposed open region OP with the insulating films of the bank 216 and the touch buffer film 118a, the corrosion defect of the GIP wiring portion can be improved while preventing additional moisture permeation. Corrosion defects mainly occur in regions where the potential difference between dissimilar metals is as large as 0.4 V or more. Therefore, the open region OP may be formed across the entire GIP wiring portion, or may be formed only in some regions where the potential difference between dissimilar metals is large. Also, it becomes possible to be free from the corrosion significant difference due to the presence or absence of the insulating films of the sealing layer and the touch sensor layer on the upper part of the contact region, and the degree of freedom in the design of the sealing layer and the touch sensor layer on the upper part of the contact region of the GIP wiring portion can be increased.

[0283] FIG. 11 is a plan view showing a first optical region of a flexible display device according to an embodiment of the present invention.

[0284] FIG. 12 is an enlarged view showing the X region of FIG. 11.

[0285] First, referring to FIG. 11, the first optical region DA1 may include a central region 910 and a bezel region 920 located on the outer periphery of the central region 910.

[0286] The first optical region DA1 may include a plurality of horizontal lines HL. The transistors located in the bezel region 920 and the light-emitting elements located in the central region 910 may be connected by the plurality of horizontal lines HL.

[0287] The flexible display device 100 according to the embodiment may include a routing structure 940. By including the routing structure 940, the central region 910 can be expanded by a predetermined region a. This is because the pixels located in the predetermined region a can be connected to the transistors located in the bezel region 920 by the routing structure 940.

[0288] Specifically examining the structure of the first optical region DA1 including the routing structure 940 is as follows.

[0289] Referring to FIG. 10, the first optical region can include a plurality of light-emitting elements ED located in the central region 910 and the bezel region 920. By including a plurality of light-emitting elements ED in the first optical region, the first optical region can display an image.

[0290] The first optical region can include a plurality of transistors 1050 located in the bezel region 920. The central region 910 may not have transistors located therein. By not having transistors located in the central region 910, the central region 910 can have a higher transmittance.

[0291] The first optical region includes a plurality of rows, which can include a first row R1 and a second row R2. The plurality of rows included in the first optical region can be any region that horizontally traverses the first optical region and can be defined by the pattern of the transistors 1050.

[0292] The flexible display device can include a light-emitting element ED located in the central region 910 and positioned in the first row R1, and a transistor 1050 located in the bezel region 920 and positioned in the second row R2.

[0293] The flexible display device can include a routing structure 940 that electrically connects the light-emitting element ED located in the first row R1 and the transistor 1050 located in the second row R2.

[0294] Due to the routing structure 940, transistors 1050 and light-emitting elements ED located in different rows can be connected to each other. Thus, a transistor 1050 located in a row with a larger number of transistors 1050 than light-emitting elements ED can be connected to a light-emitting element ED located in a row with a larger number of light-emitting elements ED than transistors 1050.

[0295] The number of light-emitting elements ED included in the central region 910 in the first row R1 can be even larger than the number of light-emitting elements ED included in the central region 910 in the second row R2. Therefore, to drive the light-emitting elements ED included in the first row R1, a larger number of transistors 1050 are required, and to drive the light-emitting elements ED included in the second row R2, a smaller number of transistors 1050 are required. Accordingly, surplus transistors 1050 among the transistors 1050 located in the second row R2 of the bezel region 920 that are not electrically connected to the light-emitting elements ED located in the second row R2 can be electrically connected to the light-emitting elements ED located in the first row R1 by the routing structure 940.

[0296] The central region 910 may have substantially the same number of pixels per unit area throughout the central region 910. Having substantially the same number of pixels per unit area may mean, for example, that one pixel pattern is substantially uniform throughout the central region 910. Accordingly, more light-emitting elements ED may be located in the first row R1, whose area overlapping with the central region 910 is larger than that of the second row R2.

[0297] For example, the number of transistors 1050 included in the bezel region 920 in the first row R1 may be substantially the same as the number of transistors 1050 included in the bezel region 920 in the second row R2. In the above example, if the number of light-emitting elements ED included in the central region 910 in the first row R1 is even larger and the number of light-emitting elements ED included in the central region 910 in the second row R2 is even smaller, some of the transistors 1050 included in the second row R2 may not be electrically connected to the light-emitting elements ED located in the second row R2 and may be electrically connected to the light-emitting elements ED located in the first row R1.

[0298] And the bezel region 920 may have substantially the same number of transistors 1050 per unit area throughout the bezel region 920. Having substantially the same transistor pattern per unit area may mean that one transistor pattern is substantially uniform throughout the bezel region 920.

[0299] The area of region d1 where bezel region 920 overlaps with the first row R1 can be substantially the same as the area of region d2 where bezel region 920 overlaps with the second row R2. In such an example, the number of transistors 1050 located in the first row R1 of bezel region 920 can be substantially the same as the number of transistors 1050 located in the second row R2 of the bezel region.

[0300] When the bezel region 920 is in such a case, the number of transistors 1050 located in the rows of the bezel region 920 can be kept constant, and the excess transistors in a specific row can be electrically connected to the excess light-emitting elements in other rows by the routing structure 940. Therefore, the flexible display device according to the embodiment can have a wider central region 910 than the flexible display device of the comparative example.

[0301] The flexible display device according to an embodiment of the present invention can be described as follows.

[0302] A flexible display device according to an embodiment of the present invention includes a substrate including a display area divided into an optical area and a general area and a non-display area divided into a bending area and a non-bending area, a first insulating film disposed on the substrate, a wiring disposed on the first insulating film in the non-bending area, a second insulating film disposed on the wiring, a connection wiring disposed on the second insulating film in the non-bending area and having a first contact area connected to the wiring, a first planarization layer disposed on the connection wiring, a link wiring disposed on the first planarization layer and extending to the bending area and having a second contact area connected to the connection wiring, a second planarization layer disposed on the link wiring and including an open area where a part of the area is removed to expose the second contact area of the link wiring, and a third insulating film disposed on the second planarization layer and filling the open area.

[0303] According to another feature of the present invention, the first insulating film can include a multi-buffer layer, an active buffer layer, and a gate insulating film.

[0304] According to another feature of the present invention, the wiring can include GIP (Gate-In-Panel) wiring.

[0305] According to another feature of the present invention, the GIP wiring can extend to a driving IC to receive an applied signal or extend to pixels within the display area to transmit a signal.

[0306] According to another feature of the present invention, the GIP wiring can be composed of the same metal material in the same layer as the gate electrodes of the transistors within the display area.

[0307] According to another feature of the present invention, the second insulating film can include a first interlayer insulating film and a second interlayer insulating film.

[0308] According to another feature of the present invention, the connection wiring can be electrically connected to a second contact region of the link wiring through at least one first contact hole and can be electrically connected to the wiring through at least one second contact hole.

[0309] According to another feature of the present invention, the connection wiring can be composed of the same metal material in the same layer as the source electrodes and drain electrodes of the transistors within the display area.

[0310] According to another feature of the present invention, the first planarization layer can be composed of a polyimide (PI) series material.

[0311] According to another feature of the present invention, the link wiring can connect between the GIP wiring connected to the driving IC and the GIP wiring connected to the pixels of the display area.

[0312] According to another feature of the present invention, the link wiring can be composed of the same metal material in the same layer as the connection electrodes within the display area.

[0313] According to another feature of the present invention, the second planarization layer can be composed of a photoacrylic (PAC) series material.

[0314] According to another feature of the present invention, the third insulating film may include a bank.

[0315] According to another feature of the present invention, the bank may be composed of a material of the PI series.

[0316] According to another feature of the present invention, the flexible display device may further include an optoelectronic device that is located below the substrate and is disposed to overlap with the optical region.

[0317] According to another feature of the present invention, the optical region includes a non-transmissive region and a transmissive region, the transmissive region has an opaque electrode including a cathode electrode removed, and the optoelectronic device may be located in the transmissive region.

[0318] As described above, with reference to the accompanying drawings, the embodiments of the present invention have been described in more detail. However, the present invention is not necessarily limited to such embodiments, and can be variously modified and implemented within the scope not departing from the technical idea of the present invention. Therefore, the embodiments disclosed in the present invention are not for limiting the technical idea of the present invention, but for explaining it, and the scope of the technical idea of the present invention is not limited by such embodiments. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.

Explanation of Reference Numerals

[0319] 100 Flexible display device 150 Electronic device 150a First optoelectronic device 150b Second optoelectronic device DA Display area DA1 First optical region DA2 Second optical region NA General region DP represents the panel NDA non-display area

Claims

1. a substrate including a display area and a non-display area, the display area having an optical area and a main area, and the non-display area having a bending area and a non-bending area; a first line disposed on the non-bending region of the substrate; a second line having a first contact region connected to the first line; a first layer disposed on the second line; a third line disposed on the first layer to extend to the bending region, the third line having a second contact region connected to the second line; a second layer disposed on the third line and including an open area formed by removing a portion of the second layer; and a third layer disposed over the open area.

2. the second line is electrically connected to the second contact region of the third line through a plurality of first contact holes; the first line is electrically connected to the first contact region of the second line through a plurality of second contact holes; The flexible display device of claim 1 , wherein a number of the first contact holes and a number of the second contact holes are different.

3. The flexible display device of claim 1 , further comprising an optical / electronic device located under the substrate and overlapping the optical region.

4. the optical region includes a non-transmitting region and a transmitting region; The transparent region is provided with the non-transparent electrodes, including the cathode electrode, removed; The flexible display of claim 3 , wherein the optical-electronic device is located in the transmissive region.

5. The flexible display of claim 3 , wherein horizontal lines passing through the optical area do not pass through transmissive areas in the optical area.

6. The flexible display device of claim 5 , wherein the horizontal line passing through the optical region includes a curved or bent portion that detours outside an outer edge of the transmissive region.

7. The flexible display of claim 3 , wherein a vertical line passing through the optical area does not pass through a transmissive area in the optical area.

8. The flexible display device of claim 7 , wherein the vertical line passing through the optical region includes a curved or bent portion that detours outside an outer edge of the transmissive region.

9. The optical region includes a center region and a bezel region located on an outer periphery of the center region, The flexible display device of claim 3 , wherein the optical region further comprises: a plurality of light emitting diodes disposed in the center region and the bezel region; and a plurality of transistors disposed in the bezel region.

10. a number of transistors included in a first row of the bezel region is equal to a number of transistors included in a second row of the bezel region; The flexible display device of claim 9 , wherein a number of light emitting diodes included in a first row of the center region is different from a number of light emitting diodes included in a second row of the center region.

11. The flexible display device of claim 10 , wherein at least one of the plurality of transistors is electrically connected to at least one of the plurality of light emitting diodes in another column by a wiring structure.

12. The flexible display device of claim 11 , wherein a transistor located in a column having more transistors than said light emitting diodes is connected to a light emitting diode located in another column having more light emitting diodes than transistors.

13. further comprising an insulating film disposed between the first line and the second line; The flexible display device according to claim 4 , wherein the insulating film has a contact hole in the non-transmissive region.

14. further comprising a fourth layer disposed on the third layer; The flexible display device of claim 1 , wherein the fourth layer is an insulating layer, and a portion of the fourth layer overlaps the open area.

15. The flexible display of claim 14 , wherein a portion of the third layer and a portion of the fourth layer are in direct contact.

16. The flexible display device according to claim 1 , wherein the first line is formed on the same layer as a gate electrode of a transistor in the display area and made of the same metal material as a gate electrode of a transistor in the display area.

17. The flexible display device of claim 1 , wherein the second line is formed on the same layer as the source electrode and the drain electrode of the transistor in the display region using the same metal material as the source electrode and the drain electrode of the transistor in the display region.

18. The flexible display device of claim 1 , wherein the first layer comprises an organic insulating material.

19. The flexible display device of claim 1 , wherein the third layer comprises an organic insulating material.

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