Display device
The display device addresses structural and manufacturing issues by using a protective layer and sacrificial layers with varying etching rates to enhance cathode coverage and maintain the organic EL layer integrity, improving display quality and performance.
Patent Information
- Application Number
- JP2023209218
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-12
- Publication Date
- 2025-06-24
AI Technical Summary
Existing organic electroluminescence (organic EL) display devices face challenges in maintaining display quality due to issues with the structure and manufacturing processes that can lead to defects in the organic EL layer and cathode coverage, affecting light emission and overall performance.
The display device incorporates a protective layer with a side wall and an upper layer covering the organic EL layer, along with a sacrificial layer on the upper surface, and uses sacrificial layers with different etching rates to protect the organic EL layer during manufacturing, ensuring proper cathode coverage and minimizing etching damage.
This structure enhances the display quality by preventing coverage defects and maintaining the light-emitting region, thereby improving the reliability and performance of the organic EL display device.
Smart Images

Figure 2025093516000001_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to a display device.
Background Art
[0002] An organic electroluminescence (organic EL) display device that obtains light emission by utilizing the energy at the time of recombination of holes injected from an anode and electrons injected from a cathode has been developed.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Patent Document 2
Summary of the Invention
Problems to be Solved by the Invention
[0004] An object of the present embodiment is to provide a display device with improved display quality.
Means for Solving the Problems
[0005] A display device according to an embodiment includes a plurality of pixels including a first pixel and a second pixel, a bank provided between adjacent pixels, and each of the plurality of pixels includes on a substrate, an anode, an organic EL layer provided on the anode, a protective layer provided so as to cover a side surface of the organic EL layer, a cathode provided in an opening of the protective layer and the bank and provided in contact with the organic EL layer, and The protective layer includes a side wall provided on a side surface of the organic EL layer and a first upper layer provided on an upper surface of the organic EL layer. A sacrificial layer is provided on the upper surface of the first upper layer, close to the side wall.
Brief Description of the Drawings
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BEST MODE FOR CARRYING OUT THE INVENTION
[0007] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that the disclosure is merely an example, and for those that can be easily conceived by those skilled in the art with appropriate modifications while maintaining the gist of the invention, they are naturally included in the scope of the present invention. In addition, for the purpose of making the description clearer, the drawings may schematically represent the width, thickness, shape, etc. of each part compared to the actual aspect, but this is merely an example and does not limit the interpretation of the present invention. Also, in this specification and each figure, elements that are the same as those described above with respect to the previously shown figures may be given the same reference numerals, and detailed descriptions may be omitted as appropriate.
[0008] The embodiments described in this specification are not general ones, but embodiments that explain the same or corresponding special technical features of the present invention. Hereinafter, a display device according to an embodiment will be described in detail with reference to the drawings.
[0009] In this embodiment, the first direction X, the second direction Y, and the third direction Z are orthogonal to each other, but they may intersect at an angle other than 90 degrees. The direction toward the tip of the arrow of the third direction Z is defined as up or upward, and the direction opposite to the direction toward the tip of the arrow of the third direction Z is defined as down or downward. Note that the first direction X, the second direction Y, and the third direction Z may also be referred to as the X direction, the Y direction, and the Z direction, respectively.
[0010] Also, when referring to "the second member above the first member" and "the second member below the first member", the second member may be in contact with the first member or may be located away from the first member. In the latter case, a third member may be interposed between the first member and the second member. On the other hand, when referring to "the second member on the first member" and "the second member under the first member", the second member is in contact with the first member.
[0011] Also, it is assumed that there is an observation position for observing the display device on the tip side of the arrow in the third direction Z, and viewing from this observation position toward the X-Y plane defined by the first direction X and the second direction Y is referred to as a plan view. Viewing a cross-section of the display device in the X-Z plane defined by the first direction X and the third direction Z, or in the Y-Z plane defined by the second direction Y and the third direction Z is referred to as a cross-sectional view.
[0012] [Embodiment 1] FIG. 1 is an overall perspective view of the display device according to Embodiment 1. The display device DSP has a display area DA and a peripheral area FA provided around the display area DA on a substrate SUB1. The display device DSP has a plurality of pixels PX arranged in the display area DA. In the display device DSP, light LT from the back surface is transmitted to the front surface, and vice versa.
[0013] A substrate SUB2 as a sealing material is provided on the upper surface of the display area DA. The substrate SUB2 is fixed to the substrate SUB1 by a sealing material (non-display) surrounding the display area DA. The display area DA formed on the substrate SUB1 is sealed by the substrate SUB2 as a sealing material and the sealing material so as not to be exposed to the atmosphere.
[0014] An area EA at the end of the substrate SUB1 is disposed outside the substrate SUB2. A wiring substrate PCS is provided in the area EA. A driving element DRV for outputting a video signal and a driving signal is provided on the wiring substrate PCS. Signals from the driving element DRV are input to the pixels PX in the display area DA via the wiring substrate PCS. Based on the video signal and various control signals, the pixels PX emit light.
[0015] FIG. 2 is a partial plan view showing an example of a schematic configuration of a display device. The plurality of pixels PX include a pixel PXR that emits red light, a pixel PXG that emits green light, and a pixel PXB that emits blue light. The pixel PXR, the pixel PXG, and the pixel PXB are also referred to as a first pixel, a second pixel, and a third pixel, respectively. The pixel PXR is arranged adjacent to the pixel PXB along a first direction X and a second direction Y. The pixel PXG is arranged adjacent to the pixel PXB along the first direction X and the second direction Y. The pixel PXB is arranged adjacent to the pixel PXR along the first direction and adjacent to the pixel PXG along the second direction Y.
[0016] FIG. 3 is a cross-sectional view taken along line A1 - A2 of the display device shown in FIG. 2. The base material BA1 is, for example, a base material made of glass or a resin material composed of a resin material. As the resin material, for example, acrylic, polyimide, polyethylene terephthalate, polyethylene naphthalate, etc. may be used, and it may be formed by any single layer or a plurality of layers stacked.
[0017] An insulating layer UC1 is provided on the base material BA1. The insulating layer UC1 is formed by, for example, a single layer or a stack of a silicon oxide film and a silicon nitride film.
[0018] A light-shielding layer BM may be provided on the insulating layer UC1 so as to overlap with the transistor Tr. The light-shielding layer BM suppresses changes in transistor characteristics due to, for example, the intrusion of light from the back surface of the channel of the transistor Tr. When the light-shielding layer BM is formed of a conductive layer, it is also possible to give a back-gate effect to the transistor Tr by applying a predetermined potential.
[0019] An insulating layer UC2 is provided to cover the insulating layer UC1 and the light-shielding layer BM. As the material of the insulating layer UC2, the same material as that of the insulating layer UC1 can be used. The insulating layer UC2 may be a material different from that of the insulating layer UC1. For example, the insulating layer UC1 can be made of silicon oxide and the insulating layer UC2 can be made of silicon nitride. The insulating layers UC1 and UC2 are collectively referred to as the insulating layer UC.
[0020] A transistor Tr is provided on an insulating layer UC. The transistor Tr includes a semiconductor layer SC, an insulating layer GI, a gate electrode GE (scanning line), an insulating layer ILI, a source electrode SE (signal line), and a drain electrode DE.
[0021] As the semiconductor layer SC, amorphous silicon, polysilicon, or an oxide semiconductor is used. As the insulating layer GI, for example, silicon oxide or silicon nitride is provided as a single layer or a laminate.
[0022] As the gate electrode GE, for example, a molybdenum-tungsten alloy (MoW) is used. The gate electrode GE may be integrally formed with a scanning line GL.
[0023] An insulating layer ILI is provided to cover the semiconductor layer SC and the gate electrode GE. The insulating layer ILI is formed, for example, by a single layer or a laminate of a silicon oxide layer or a silicon nitride layer.
[0024] A source electrode SE and a drain electrode DE are provided on the insulating layer ILI. The source electrode SE and the drain electrode DE are respectively connected to a source region and a drain region of the semiconductor layer SC through contact holes provided in the insulating layer ILI and the insulating layer GI. The source electrode SE may be integrally formed with a signal line.
[0025] An insulating layer PAS is provided to cover the source electrode SE, the drain electrode DE, and the insulating layer ILI. An insulating layer PLL is provided to cover the insulating layer PAS.
[0026] The insulating layer PAS is formed using an inorganic insulating material. Examples of the inorganic insulating material include a single layer or a laminate of silicon oxide or silicon nitride. The insulating layer PLL is formed using an organic insulating material. Examples of the organic insulating material include organic materials such as photosensitive acrylic and polyimide. By providing the insulating layer PLL, the step difference caused by the transistor Tr can be flattened.
[0027] An anode AD is provided on the insulating layer PLL. The anode AD is connected to the drain electrode DE through contact holes provided in the insulating layers PAS and PLL. Let the anode provided in the pixel PXR be the anode ADR, the anode provided in the pixel PXB be the anode ADB, and the anode provided in the pixel PXG be the anode ADG. When there is no need to distinguish between the anodes ADR, ADG, and ADB, they are simply referred to as the anode AD.
[0028] The anode AD may be formed, for example, of a laminate of a reflective electrode and a transparent electrode. The reflective electrode is formed using a conductive material with high reflectivity, such as silver (Ag) or aluminum (Al). Additionally, the reflective electrode RD may be formed using an aluminum (Al) alloy. In that case, the reflective electrode RD has a three-layer structure in which a barrier metal such as titanium (Ti) is laminated very thinly on aluminum (Al) or an aluminum alloy, and further indium tin oxide (ITO) is laminated. Materials that alloy with aluminum include neodymium (Nd), titanium (Ti), tantalum (Ta), lanthanum (La), etc. The transparent electrode TD is formed, for example, using indium tin oxide (ITO) or indium zinc oxide (IZO).
[0029] In Embodiment 1, the structure from the base material BA1 to the insulating layer PLL is defined as the backplane BPS.
[0030] A bank BK (also referred to as a convex portion or rib) is provided between adjacent anodes AD. As the material of the bank BK, an organic material similar to that of the insulating layer PLL is used. The bank BK is opened so as to expose a part of the anode AD.
[0031] Let the opening provided in the pixel PXR be the opening OPR, the opening provided in the pixel PXB be the opening OPB, and the opening provided in the pixel PXG be the opening OPG. When there is no need to distinguish between the openings OPR, OPB, and OPG, they are simply referred to as the opening OP.
[0032] The end of the opening OP preferably has a gentle taper shape in cross-section. If the end of the opening OP has a steep shape, coverage defects will occur in the organic EL layer ELY formed later.
[0033] An organic EL layer ELY is provided between adjacent banks BK so as to overlap with the anode AD. Although details will be described later, the organic EL layer ELY includes an electron transport layer ETL, a light-emitting layer EML, a hole transport layer HTL, and a hole injection layer HIL. If necessary, the organic EL layer ELY may further include an electron injection layer, an electron blocking layer, and a hole blocking layer.
[0034] The organic EL layer provided in the pixel PXR is the organic EL layer ELYR, the organic EL layer provided in the pixel PXB is the organic EL layer ELYB, and the organic EL layer provided in the pixel PXG is the organic EL layer ELYG. When there is no need to distinguish between the organic EL layer ELYR, the organic EL layer ELYG, and the organic EL layer ELYB, they are simply referred to as the organic EL layer ELY.
[0035] A cathode CD is provided on the organic EL layer ELY. The cathode CD is formed using, for example, a magnesium-silver alloy (MgAg) film, a single-layer film of silver (Ag), a laminated film of silver (Ag) and a transparent conductive material, etc. As the transparent conductive material, for example, indium tin oxide (ITO), indium zinc oxide (IZO), etc. may be used.
[0036] An insulating layer SEY is provided to cover the cathode CD. The insulating layer SEY has a function of preventing moisture from entering the organic EL layer ELY from the outside. As the insulating layer SEY, those with high gas barrier properties are preferable. Examples of the insulating layer SEY include an insulating layer in which an organic insulating layer is sandwiched between two inorganic insulating layers containing nitrogen. Examples of the material of the organic insulating layer include acrylic resin, epoxy resin, polyimide resin, etc. Examples of the material of the inorganic insulating layer containing nitrogen include silicon nitride, aluminum nitride.
[0037] On the insulating layer SEY, a base material BA2 is provided. The base material BA2 is formed of the same material as the base material BA1. An inorganic insulating layer or an organic insulating layer having translucency may be provided between the base material BA2 and the insulating layer SEY. The organic insulating layer may have a function of adhering the insulating layer SEY and the base material BA2.
[0038] The light emitted in the organic EL layer ELY is extracted upward through the cathode CD. That is, the display device DSP of Embodiment 1 has a top emission structure.
[0039] FIG. 4 is a cross-sectional view showing an example of a schematic configuration of the display device of Embodiment 1. In the display device DSP shown in FIG. 4, only the configuration in the vicinity of the organic EL layer ELY is shown. In FIG. 4, an anode AD (anode ADR, anode ADG, anode ADB) is provided on the backplane BPS.
[0040] An organic EL layer ELY is provided on the anode AD. An organic EL layer ELYR is provided on the anode ADR. An organic EL layer ELYB is provided on the anode ADB. An organic EL layer ELYG is provided on the anode ADG.
[0041] Side walls AOSR are provided to cover the side surfaces of the anode ADR and the organic EL layer ELYR. Side walls AOSG are provided to cover the side surfaces of the anode ADG and the organic EL layer ELYG. Side walls AOLB are provided to cover the side surfaces of the anode ADB and the organic EL layer ELYB.
[0042] In the pixel PXR, an upper layer AOUR is provided so as to overlap a part of the organic EL layer ELYR. In the pixel PXG, an upper layer AOUG is provided so as to overlap a part of the organic EL layer ELYG. In the pixel PXB, an upper layer AOUB is provided so as to overlap a part of the organic EL layer ELYB.
[0043] Combine the sidewall AOSR and the upper layer AOUR to form a protective layer AOYR. Combine the sidewall AOSG and the upper layer AOUG to form a protective layer AOYG. Combine the sidewall AOSB and the upper layer AOUB to form a protective layer AOYB. When not distinguishing between the protective layer AOYR, the protective layer AOYG, and the protective layer AOYB, it is called the protective layer AOL. The protective layer AOL is formed of, for example, aluminum oxide (AlOx).
[0044] A sacrificial layer is provided on the protective layer AOL. On the upper layer AOUR, a sacrificial layer MWYR is disposed. On the upper layer AOUG, a sacrificial layer MWYG is disposed. On the upper layer AOUB, a sacrificial layer MWYB is disposed. When not distinguishing between the sacrificial layer MWYR, the sacrificial layer MWYG, and the sacrificial layer MWYB, it is called the sacrificial layer MWY.
[0045] A bank BK is provided on the protective layer AOYR and the sacrificial layer MWYR, the protective layer AOYG and the sacrificial layer MWYG, and the protective layer AOYB and the sacrificial layer MWYB, and also between adjacent organic EL layers ELY. An opening OP (opening OPR, opening OPB, opening OPG) is provided between adjacent banks BK. Although not shown in FIG. 4, a cathode CD is provided to cover the bank BK, the organic EL layer ELY, the protective layer AOL, and the sacrificial layer MWY.
[0046] FIG. 5 is a cross-sectional view showing an example of a schematic configuration of Embodiment 1. FIG. 5 is a partial enlarged view of FIG. 4. As shown in FIG. 5, an organic EL layer ELY is provided between the anode AD and the cathode CD along the third direction Z. The organic EL layer ELY includes a hole injection layer HIL, a hole transport layer HTL, a light emitting layer EML, and an electron transport layer ETL, which are stacked along the third direction Z.
[0047] In the display device DSP of Embodiment 1, the anode AD, the organic EL layer ELY, and the cathode CD are stacked in this order along the third direction Z. In the organic EL layer ELY, a hole injection layer HIL, a hole transport layer HTL, a light emitting layer EML, an electron transport layer ETL, and an electron injection layer EIL are stacked along the third direction Z. However, Embodiment 1 is not limited to this. In the display device DSP of Embodiment 1, the cathode CD, the metal oxide layer, the intermediate layer, the organic EL layer ELY, and the anode AD may be stacked in this order. Further, the organic EL layer ELY may be stacked in the order of the electron transport layer ETL, the light emitting layer EML, the hole transport layer HTL, and the hole injection layer HIL.
[0048] The intermediate layer is formed of an amine derivative, for example, polyethyleneimine (PEI). By forming the intermediate layer of the amine derivative, electron injection increases. That is, it can be said that the intermediate layer is an electron injection layer. The metal oxide layer is a conductive layer having translucency, for example, zinc oxide (ZnO).
[0049] Figs. 6 to 20 are cross-sectional views showing a method of manufacturing the display device of Embodiment 1. In Figs. 6 to 20, a first pixel, which is one of the pixel PXR, the pixel PXG, and the pixel PXB, is defined as the pixel PX1, and another second pixel is defined as the pixel PX2. In Figs. 6 to 20, they are formed in the order of the first pixel (pixel PX1) and the second pixel (pixel PX2). Although not shown, a third pixel (referred to as pixel PX3), which is another one of the pixel PXR, the pixel PXG, and the pixel PXB, is formed in the same manner as the first pixel and the second pixel.
[0050] First, an anode AD1 and an anode AD2 are formed on a substrate BA1 (see Fig. 6). The anode AD1 is the anode of the pixel PX1, and the anode AD2 is the anode of the pixel PX2. The anode AD1 has a reflective electrode RD1 and a transparent electrode TD1. The anode AD2 has a reflective electrode RD2 and a transparent electrode TD2. Note that the reflective electrode RD1 and the reflective electrode RD2 may each have a greater film thickness than the transparent electrode TD1 and the transparent electrode TD2.
[0051] A base material BA1, an anode AD1, and an anode AD2, and an organic EL layer ELM1, a sacrificial layer AOM1, and a sacrificial layer MWM1 are formed to cover the above-described intermediate layer and metal oxide layer (see FIG. 7). The organic EL layer ELM1 is an organic EL layer corresponding to the pixel PX1.
[0052] The sacrificial layer AOM1 is formed of, for example, aluminum oxide (AlOx). The aluminum oxide may be formed by atomic layer deposition (ALD).
[0053] The sacrificial layer MWM1 is formed of, for example, molybdenum tungsten (MoW). The molybdenum tungsten may be formed by sputtering. Further, the sacrificial layer MWM1 may be formed of a plurality of layers having different etching rates, or the etching rate may be different from the top to the bottom. The same applies to the sacrificial layer MWY2.
[0054] In the anisotropic etching process described later, it is necessary to use materials having different etching rates for the sacrificial layer AOM1 and the sacrificial layer MWM1. Although details will be described later, an upper layer AOU1, an upper layer AOU2, side walls AOS1, and side walls AOS2 are formed of the same material as the sacrificial layer AOM1. A sacrificial layer MWY1 and a sacrificial layer MWY2 are formed of the same material as the sacrificial layer MWM1. The etching rates are different for the upper layer AOU1, the upper layer AOU2, the side walls AOS1, and the side walls AOS2, and the sacrificial layer MWY1 and the sacrificial layer MWY2.
[0055] A resist mask RES1 is formed on the sacrificial layer MWM1 facing the anode AD1 (see FIG. 8). No resist mask is formed on the anode AD2.
[0056] Using the resist mask RES1, the sacrificial layer MWM1 is partially removed by etching. As a result, an island-shaped sacrificial layer MWY1 is formed facing the anode AD1 with the sacrificial layer AOM1 interposed therebetween (see FIG. 9).
[0057] Using the sacrificial layer MWY1 formed in an island shape as a mask, the sacrificial layer AOM1 and the organic EL layer ELM1 are partially removed by etching. As a result, an organic EL layer ELY1 and an upper layer AOU1 of the sacrificial layer are formed in an island shape between the anode AD1 and the sacrificial layer MWY1 (see FIG. 10). The sacrificial layer AOM1 and the organic EL layer ELM1 on the anode AD2 are removed.
[0058] A sidewall AOS1 is formed in contact with the side surfaces of the anode AD1, the organic EL layer ELY1, the upper layer AOU1, and the sacrificial layer MWY1. The sidewall AOS1 is formed of the same material as the sacrificial layer AOM1. The upper layer AOU1 and the sidewall AOS1 are combined to form a sacrificial layer AOY1 (see FIG. 11).
[0059] To form the sidewall AOS1, first, a material film that will become the sidewall AOS1 is formed covering the laminate of the organic EL layer ELY1, the upper layer AOU1, and the sacrificial layer MWY1. Then, the material film is anisotropically etched to leave only the region in contact with the side surface of the laminate and remove other regions.
[0060] An organic EL layer ELM2, a sacrificial layer AOM2, and a sacrificial layer MWM2 are formed covering the base material BA1, the sacrificial layer AOY1, the sacrificial layer MWY1, and the anode AD2 (see FIG. 12). The organic EL layer ELM2 is the organic EL layer corresponding to the pixel PX2.
[0061] A resist mask RES2 is formed on the sacrificial layer MWM2 facing the anode AD2. Using the resist mask RES2, the sacrificial layer MWM2 is partially removed by etching. As a result, a sacrificial layer MWY2 is formed in an island shape facing the anode AD2 with the sacrificial layer AOM2 interposed therebetween (see FIG. 13).
[0062] Next, the resist mask RES2 on the sacrificial layer MWY2 is removed (see FIG. 14). Using the sacrificial layer MWY2 formed in an island shape as a mask, the sacrificial layer AOM2 and the organic EL layer ELM2 are partially removed by etching. As a result, an organic EL layer ELY2 and an upper layer AOU2 of the sacrificial layer are formed in an island shape between the anode AD2 and the sacrificial layer MWY2 (see FIG. 15).
[0063] On the sides of the anode AD2, the organic EL layer ELY2, the upper layer AOU2, and the sacrificial layer MWY2, a sidewall AOS2 is formed. The sidewall AOS2 is formed of the same material as the sacrificial layer AOM2. The upper layer AOU2 and the sidewall AOS2 are combined to form a sacrificial layer AOY2 (see FIG. 16).
[0064] Let the thickness of the upper layer AOU1 be thickness tu1, the thickness of the upper layer AOU2 be thickness tu2, the thickness of the sidewall AOS1 be thickness ts1, and the thickness of the sidewall AOS2 be thickness ts2. The thicknesses tu1, tu2, ts1, and ts2 are approximately equal.
[0065] In contact with the sidewalls AOS1, AOS2, the sacrificial layers MWY1, and MWY2, a bank BK is formed between the organic EL layer ELY1 and the organic EL layer ELY2. Above each of the organic EL layer ELY1 and the organic EL layer ELY2, no bank BK is formed. That is, above the organic EL layer ELY1 and the organic EL layer ELY2, an opening OP1 and an opening OP2 are provided respectively (see FIG. 17).
[0066] The sacrificial layers MWY1 and MWY2 in the openings OP1 and OP2 are removed by etching (see FIG. 18).
[0067] Etching is further advanced to remove the upper layers AOU1 and AOU2 in the openings OP1 and OP2. As a result, the organic EL layer ELY1 and the organic EL layer ELY2 are exposed within the openings OP1 and OP2 (see FIG. 19).
[0068] Covering the exposed organic EL layer ELY1, the organic EL layer ELY2, and the bank BK, a cathode CD, an insulating layer INS, and an insulating layer PCL are formed. On the insulating layer PCL, a base material BA2 is provided (see FIG. 20).
[0069] Thus, the display device DSP of Embodiment 1 is formed.
[0070] The insulating layer INS is formed of, for example, silicon nitride (SiN). The insulating layer INS prevents moisture from entering the organic EL layer from the outside. The insulating layer PCL is formed of, for example, a resin insulating material. The insulating layer PCL has a function of flattening the surface. The base material BA2 may use the same material as the base material BA1.
[0071] To form the anode and the organic EL layer of the pixel PX3 which is the third pixel, after the completion of the process shown in FIG. 16, in the same manner as in FIG. 12, an organic EL layer and a sacrificial layer may be formed covering the anode of the pixel PX3. In the same manner as in FIG. 16, after forming the sidewalls of the sacrificial layer of the pixel PX3, the process shown in FIG. 17 may be proceeded to.
[0072] In Embodiment 1, the pixel PX1, the pixel PX2, and the pixel PX3 may be the pixel PXR, the pixel PXG, and the pixel PXB, respectively.
[0073] By covering the side surfaces of the organic EL layer with the sidewalls AOS1 and AOS2 formed of aluminum oxide, the organic EL layer can be protected.
[0074] FIGS. 21 to 23 are cross-sectional views showing a method for manufacturing a display device of Comparative Example 1. To manufacture the display device DSPr of Comparative Example 1, first, anodes AD1 and AD2 are formed on a base material BA1 (see FIG. 21). The anodes AD1 and AD2 in the comparative example are assumed to be transparent electrodes formed of a metal oxide. Examples of such a metal oxide include the above-mentioned indium tin oxide and indium zinc oxide. The process shown in FIG. 21 corresponds to the process shown in FIG. 6.
[0075] Through the processes shown in FIGS. 7 to 9, an organic EL layer ELY1, an upper layer AOU1 of the sacrificial layer, and a sacrificial layer MWY1 are formed on the anode AD1. The sacrificial layer is removed on the anode AD2 (see FIG. 22). The process shown in FIG. 22 corresponds to the process shown in FIG. 10.
[0076] Next, similar to FIG. 11, sidewalls AOS1 are formed in contact with the sides of the anode AD1, the organic EL layer ELY1, the upper layer AOU1, and the sacrificial layer MWY1. Similar to the above, a material film that will become the sidewalls AOS1 is formed to cover the laminate of the organic EL layer ELY1, the upper layer AOU1, and the sacrificial layer MWY1. Then, the material film is anisotropically etched to leave only the region in contact with the side of the laminate and remove other regions, thereby forming the sidewalls AOS1.
[0077] The material of the sidewalls AOS1 is the same material as the sacrificial layer AOM1, for example, aluminum oxide (AlOx). On the other hand, the anodes AD1 and AD2 are formed of, for example, a metal oxide as described above.
[0078] That is, the sidewalls AOS1, and the anodes AD1 and AD2 are formed of a material containing a metal oxide. When etching such a metal oxide, it may be necessary to use an etching gas with no selectivity.
[0079] In this case, in the etching for forming the sidewalls AOS1, there is a risk that the anode AD2 will be removed together (see FIG. 23). If the anode is removed, the pixel will not emit light normally. In such a display device, the display quality will deteriorate.
[0080] FIG. 24 is a cross-sectional view showing a method for manufacturing a display device of Comparative Example 2. As described above, in the manufacturing process shown in FIG. 11, anisotropic etching is performed. At this time, if the sacrificial layer MWY1 is thin or has a narrow width in plan view, there is a risk that part of the sacrificial layer MWY1, part of the sidewalls AOS1, and part of the organic EL layer ELY1 of the pixel PX1 will be etched. If part of the organic EL layer ELY1 is etched, the light-emitting region of the pixel PX1 will decrease. Furthermore, when performing the above-described anisotropic etching on the pixel PX2 in the same manner, there is a risk that not only the organic EL layer of the pixel PX2 but also the organic EL layer ELY1 of the pixel PX1 will be etched again.
[0081] In Embodiment 1, a sacrificial layer MWY1 and a sacrificial layer MWY2 are provided on the upper layer AOU1 and the upper layer AOU2, respectively. The upper layer AOU1 and the upper layer AOU2, as well as the sacrificial layer MWY1 and the sacrificial layer MWY2, have different etching rates as described above. Therefore, the upper layer AOU1 and the upper layer AOU2 are not overly etched, and furthermore, the organic EL layer ELY1 is not etched either.
[0082] As described above, in the display device DSP of Embodiment 1, a part of the sacrificial layer MWY1 and a part of the sacrificial layer MWY2 remain on the upper layer AOU1 and the upper layer AOU2. The etching rates of the sacrificial layer AOY1 and the sacrificial layer AOY2, as well as the sacrificial layer MWY1 and the sacrificial layer MWY2, are different. Thereby, the organic EL layer ELY is not etched, and the light-emitting region of the pixel PX is not decreased. Therefore, the display quality of the display device DSP can be improved.
[0083] [Embodiment 2] FIG. 25 is a cross-sectional view showing an example of the schematic configuration of the display device of Embodiment 2. The display device DSP shown in FIG. 25 is different from the display device DSP shown in FIG. 4 in that no sacrificial layer MWY remains in the pixel PXB.
[0084] In the display device DSP shown in FIG. 25, a sacrificial layer MWYR and a sacrificial layer MWYG are provided on the upper layer AOUR and the upper layer AOUG of the pixel PXR and the pixel PXG, respectively. On the other hand, in the pixel PXB, no sacrificial layer MWYB is provided on the upper layer AOUB.
[0085] In FIG. 25, the pixel PXR and the pixel PXG correspond to the pixel PX1 and the pixel PX2 shown in FIGS. 6 to 19. The pixel PXB corresponds to the pixel PX3 described above.
[0086] Figs. 26 to 29 are cross-sectional views showing the manufacturing process of the display device according to Embodiment 2. In pixels PX1, PX2, and PX3, sidewalls AOS1, AOS2, and AOS3 are formed in the same manner as in Embodiment 1 (see Fig. 26). The process shown in Fig. 26 corresponds to the process shown in Fig. 16.
[0087] In pixel PX1, an organic EL layer ELY1 is formed on an anode AD1 having a reflective electrode RD1 and a transparent electrode TD1. An upper layer AOU1 of a sacrificial layer AOY1 is formed on the organic EL layer ELY1. A sacrificial layer MWY1 is formed on the upper layer AOU1. A sidewall AOS1 is formed on the side surface of the laminate of the anode AD1, the organic EL layer ELY1, the upper layer AOU1, and the sacrificial layer MWY1. The upper layer AOU1 and the sidewall AOS1 are integrally formed and constitute the sacrificial layer AOY1.
[0088] In pixel PX2, an organic EL layer ELY2 is formed on an anode AD1 having a reflective electrode RD2 and a transparent electrode TD2. An upper layer AOU2 of a sacrificial layer AOY2 is formed on the organic EL layer ELY2. A sacrificial layer MWY2 is formed on the upper layer AOU2. A sidewall AOS2 is formed on the side surface of the laminate of the anode AD2, the organic EL layer ELY2, the upper layer AOU2, and the sacrificial layer MWY2. The upper layer AOU2 and the sidewall AOS2 are integrally formed and constitute the sacrificial layer AOY2.
[0089] In pixel PX3, an organic EL layer ELY3 is formed on an anode AD3 having a reflective electrode RD3 and a transparent electrode TD3. An upper layer AOU3 is formed on the organic EL layer ELY3. A sacrificial layer MWY3 is formed on the upper layer AOU3. A sidewall AOS3 is formed on the side surface of the laminate of the anode AD3, the organic EL layer ELY3, the upper layer AOU3, and the sacrificial layer MWY3. The upper layer AOU3 and the sidewall AOS3 are integrally formed and constitute the sacrificial layer AOY3.
[0090] In pixel PX3, all of the sacrificial layer MWY3 and the portion of the sidewall AOS3 protruding from the upper layer AOU3 are removed. That is, the upper layer AOU3 is planarized (see Fig. 27).
[0091] Contacting the sidewall AOS1, the sacrificial layer MWY1, the sidewall AOS2, the sacrificial layer MWY2, the sidewall AOS3, and the upper layer AOU3, a bank BK is formed between the organic EL layer ELY1 and the organic EL layer ELY2, and between the organic EL layer ELY2 and the organic EL layer ELY3.
[0092] Above the organic EL layer ELY1, the organic EL layer ELY2, and the organic EL layer ELY3 respectively, no bank BK is formed. That is, above the organic EL layer ELY1, the organic EL layer ELY2, and the organic EL layer ELY3, openings OP1, OP2, and OP3 are provided respectively. Inside the openings OP1, OP2, and OP3 respectively, the organic EL layer ELY1, the organic EL layer ELY2, and the organic EL layer ELY3 are exposed (see FIG. 28).
[0093] Next, in the same manner as the process shown in FIG. 20, the exposed organic EL layer ELY1, the organic EL layer ELY2, and the organic EL layer ELY3, and the bank BK are covered to form a cathode CD, an insulating layer INS, and an insulating layer PCL. A base material BA2 is provided on the insulating layer PCL. In this way, the display device DSP of Embodiment 2 is obtained (see FIG. 29).
[0094] In Embodiment 2, since the next pixel of the pixel PX3 is not formed, the sidewall AOS3 is not etched any further. Thereby, in the manufacturing process of the display device DSP of Embodiment 2, it is possible to increase the design margin.
[0095] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalent scope thereof.
Explanation of Reference Numerals
[0096] AD…Anode, AOS1…Side wall, AOS2…Side wall, AOS3…Side wall, AOU1…Upper layer, AOU2…Upper layer, AOU3…Upper layer, CD…Cathode, DSP…Display device, ELY…Organic EL layer, EML…Light-emitting layer, MWY…Sacrificial layer, OP…Opening, PX…Pixel, TD…Transparent electrode.
Claims
1. A plurality of pixels including a first pixel and a second pixel; A bank provided between adjacent ones of the pixels; Comprising; Each of the plurality of pixels; On a substrate; An anode; An organic EL layer provided on the anode; A protective layer provided to cover a side surface of the organic EL layer; A cathode provided in an opening of the protective layer and the bank and in contact with the organic EL layer; Comprising; The protective layer includes a side wall provided on a side surface of the organic EL layer and a first upper layer provided on an upper surface of the organic EL layer; A display device in which a sacrificial layer is provided on an upper surface of the first upper layer close to the side wall.
2. The plurality of pixels further includes a third pixel, The third pixel; On the substrate; The anode; The organic EL layer provided on the anode; The protective layer provided to cover a side surface of the organic EL layer; The cathode provided in an opening of the protective layer and the bank and in contact with the organic EL layer; Comprising; The protective layer includes the side wall provided on a side surface of the organic EL layer and the first upper layer provided on an upper surface of the organic EL layer; The display device according to claim 1, wherein the sacrificial layer is provided on an upper surface of the first upper layer close to the side wall.
3. The plurality of pixels further includes a third pixel, The third pixel; On the substrate; The anode; The organic EL layer provided on the anode; The protective layer provided to cover a side surface of the organic EL layer; The cathode provided in an opening of the protective layer and the bank and in contact with the organic EL layer; Comprising; The protective layer includes the side wall provided on a side surface of the organic EL layer and the first upper layer provided on an upper surface of the organic EL layer; The display device according to claim 1, wherein the third pixel does not include the sacrificial layer.
4. The display device according to claim 1, wherein the protective layer includes a second upper layer on the sacrificial layer.
5. The display device according to claim 1, wherein the protective layer is formed of aluminum oxide.
6. The display device according to claim 1, wherein the sacrificial layer is formed of molybdenum tungsten.
Citation Information
Patent Citations
Method for manufacturing organic el display device
JP2014011083A
Method for manufacturing display device
WO2022144666A1