Display device

Abstract

To prevent misalignment of light-emitting elements.SOLUTION: A display device according to an embodiment comprises a wiring substrate having a plurality of link wiring lines arranged thereon; a plurality of display units spaced apart from each other on the wiring substrate; and a plurality of bonding members located between the display units and the wiring substrate and connected to the plurality of link wiring lines. The wiring substrate includes a thin-film transistor, and each of the display units includes a light-emitting element.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This specification relates to a display device, and more particularly, to a display device in which a plurality of display units are arranged on a wiring board on which a plurality of link wirings are arranged.

Background Art

[0002] Display devices are applied to various electronic devices such as TVs, mobile phones, notebook computers, and tablet PCs. Therefore, research has been continuously conducted to develop thinner, lighter, and lower power consumption display devices.

[0003] Among display devices, a self-emitting display device incorporates a light-emitting element or a light source into the display device, and displays information using light generated from the built-in self-emitting element or light source. A display device including a self-emitting element can be configured to be thinner than a display device incorporating a light source, and has the advantage that since it is flexible, it can be configured as a foldable, bendable, or rollable display device.

[0004] Display devices with built-in self-emitting elements include, for example, organic light-emitting display devices (OLEDs; Organic Light Emitting Devices) that contain organic substances as the light-emitting layer, or micro LED display devices (Micro LED; Micro Light Emitting Diode display) that contain inorganic substances as the light-emitting layer. Although organic light-emitting display devices (OLEDs) do not require a separate light source, due to the material characteristics of organic substances that are vulnerable to moisture and oxygen, there is a problem that defective pixels are likely to occur depending on the external environment. On the other hand, micro LED display devices use inorganic substances that are resistant to moisture and oxygen as the light-emitting layer, which has the advantages of not being affected by the external environment, having high reliability, and having a longer lifespan compared to organic light-emitting display devices.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The problem to be solved by the embodiments of this specification is to provide a large-area transparent display device by arranging a plurality of display units on a wiring board on which a plurality of link wirings are arranged.

[0006] Another problem to be solved by the embodiments of this specification is to provide a display device capable of realizing a zero bezel region in which the bezel region is arranged in a minimum space, the space is reduced, or there is substantially no bezel region.

[0007] Another problem to be solved by the embodiments of this specification is to provide a display device that prevents a decrease in transfer yield when transferring a light-emitting element onto a display unit or a display unit structure.

[0008] Another problem to be solved by the embodiments of this specification is to provide a display device that prevents a problem in which the alignment of the light-emitting elements is shifted due to an increase in the number of times of transferring the light-emitting elements onto the display unit.

[0009] Another problem to be solved by the embodiments of this specification is to provide a display device that can be easily repaired when a defect occurs in a light-emitting element or a thin-film transistor.

[0010] The problem to be solved by one embodiment of this specification is not limited to the above-mentioned purposes, and other purposes and advantages of the present invention not mentioned can be understood from the following description and can be more clearly understood from the embodiments of this specification. Also, it will be understood that the purposes and advantages of this specification can be realized by the means shown in the claims and combinations thereof.

Means for Solving the Problem

[0011] A display device according to an embodiment of the present specification includes a wiring substrate, a plurality of link wirings disposed on the wiring substrate, a plurality of display units disposed on the wiring substrate at intervals from each other, and a plurality of bonding members located between the plurality of display units and the wiring substrate and connected to the plurality of link wirings. The wiring substrate includes a thin film transistor, and the plurality of display units include a light emitting element.

[0012] A display device according to another embodiment of the present specification includes a wiring substrate, a plurality of link wirings disposed on the wiring substrate, a plurality of display units disposed on the wiring substrate at intervals from each other, and a plurality of bonding members located between the plurality of display units and the wiring substrate and connected to the plurality of link wirings. The wiring substrate includes a light emitting element, and the plurality of display units include a thin film transistor.

Advantages of the Invention

[0013] According to the embodiment of the present specification, there is an effect that a large-area transparent display device can be realized by arranging a plurality of display units so as to overlap the upper surface of a wiring substrate on which a plurality of link wirings are disposed.

[0014] Further, according to the embodiment of the present specification, by directly bonding a self-assembly substrate on which a light emitting element is disposed as a display unit onto a wiring substrate, the process of transferring the light emitting element can be omitted, and the optimization of the process can be realized.

[0015] Further, by directly bonding a self-assembly substrate on which a light emitting element is disposed to a wiring substrate, the use of a transfer substrate can be omitted, the material components can be unified, and an environmentally friendly product can be manufactured.

[0016] In addition, by directly bonding the self-assembly substrate on which the light-emitting elements are arranged to the wiring substrate, the process of transferring the light-emitting elements onto a separate display unit can be omitted, which can prevent the transfer yield of the light-emitting elements from decreasing and the occurrence of misalignment.

[0017] In addition, by directly bonding the self-assembly substrate on which the light-emitting elements are arranged to the wiring substrate, there is an effect that it can be easily repaired when defective light-emitting elements occur.

[0018] In addition, by directly bonding the display unit on which the thin-film transistors are arranged to the wiring substrate on which the light-emitting elements are arranged, there is an effect that it can be easily repaired when defective thin-film transistors occur.

[0019] In addition, the problem to be solved by the embodiments of the present specification is that the bezel area can be arranged in a minimum space, the space of the bezel area can be reduced, or a zero-bezel area with substantially no bezel area can be realized.

[0020] The effects of the present specification are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the following description.

Brief Description of the Drawings

[0021]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Embodiments for Carrying Out the Invention

[0022] The advantages, features, and the methods for achieving them of the present specification will become clear by referring to the embodiments described in detail below together with the accompanying drawings. However, the present specification is not limited to the embodiments disclosed below and is configured in various different forms. However, this embodiment is provided to complete the disclosure of the present specification and to fully inform those with ordinary knowledge in the technical field to which the present specification pertains of the scope of the invention.

[0023] For the purpose of explaining the embodiments of the present specification, the shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings are exemplary, and the present specification is not limited to the matters shown in the drawings. The same reference signs throughout the specification refer to the same components. Also, when explaining the present specification, if a specific explanation of related known technologies is determined to obscure the gist of the present specification, the detailed description thereof will be omitted. When terms such as "including", "having", "becoming", etc. mentioned in the present specification are used, other parts can be added unless "only" is used. When a component is expressed in the singular, it includes the case of including a plurality unless otherwise explicitly stated.

[0024] When interpreting a component, even if there is no separate explicit description, it is interpreted as including an error range.

[0025] In the case of an explanation of a positional relationship, for example, when explaining the positional relationship between two parts such as "on ~", "above ~", "below ~", "on the side of ~", etc., unless "immediately" or "directly" is used, one or more other parts may be located between the two parts.

[0026] In the case of an explanation regarding the relationship of time, for example, when explaining the chronological relationship such as "after ~", "subsequent to ~", "next to ~", "before ~", etc., unless "immediately" or "directly" is used, it can include cases that are not continuous.

[0027] First, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Thus, the first component mentioned below may be the second component within the technical idea of this specification.

[0028] The features of the multiple embodiments of this specification can be partially or entirely combined or combined with each other, and various interlocks and drives are technically possible. Each embodiment can be implemented independently or can be implemented together in an associated relationship.

[0029] Hereinafter, the display device according to each embodiment of the present invention will be described with reference to the accompanying drawings.

[0030] A display device including micro LEDs can realize a flexible display device while having a structure that is even thinner than an organic light-emitting display device. Thereby, it is easy to arrange multiple display devices including multiple micro LEDs to form a large-area tiling display device.

[0031] In the process of forming a display device including micro LEDs, first, a light-emitting element is grown on a growth substrate, the light-emitting element is separated from the growth substrate, and is aligned on a self-assembly substrate through a primary transfer process. The light-emitting element may be a micro LED (Micro LED). Next, after moving and aligning the light-emitting element aligned on the self-assembly substrate to a transfer substrate, it is aligned from the transfer substrate to the substrate of the display device through a secondary transfer process, thereby forming a display device including micro LEDs.

[0032] However, when transferring a light-emitting element onto a self-assembly substrate through a primary transfer process, if the light-emitting element transferred onto the self-assembly substrate is not transferred to the target position but is over-transferred to a position outside the target position, there is a problem that the transfer yield decreases. Further, in order to transfer light-emitting elements including different hues respectively, the number of transfer times increases, and the accuracy of alignment of the light-emitting elements decreases as the number of transfer times increases, and a misalignment problem may occur in which the elements deviate from the target position.

[0033] Regarding this, the display device according to the embodiment of the present specification forms a self-assembly substrate on which light-emitting elements are arranged from a display unit or a display unit structure, and by directly bonding it onto a wiring substrate, it is possible to prevent a decrease in transfer yield or the occurrence of a misalignment problem of the light-emitting elements. Hereinafter, it will be described with reference to the drawings.

[0034] FIG. 1 is a schematic plan view of a display device according to an embodiment of the present specification. FIG. 2 is a schematic plan view of FIG. 1 in the display device according to an embodiment of the present specification. FIG. 3 is a cross-sectional view of FIG. 2. And FIG. 4 is a cross-sectional view of FIG. 3 in the display device according to an embodiment of the present specification.

[0035] In FIG. 1, for convenience of explanation, among the components of the display device (TD), only the first base substrate 205 of the wiring substrate (M-SUB), a plurality of link wirings (LL) arranged on the first base substrate 205, a plurality of circuit films 210 on which the integrated circuit chips 213 are arranged, the printed circuit board 215, and a plurality of display units (TU) are shown.

[0036] Referring to FIGS. 1 to 3, a tiling display device (TD) according to an embodiment of the present specification can be configured to include a plurality of display units (TU) arranged on a wiring substrate (M-SUB). Each display unit (TU) may be arranged such that adjacent display units are arranged along a first direction and a second direction that intersects or crosses the first direction. Here, the first direction may be a horizontal direction, and the second direction may be a vertical direction. The wiring substrate (M-SUB) and the display unit (TU) can include glass or transparent plastic. Thereby, a large-area transparent display device can be realized.

[0037] A plurality of link wirings (LL) and a plurality of transistors (TFT) may be arranged on a first base substrate 205 of the wiring substrate (M-SUB). The plurality of link wirings (LL) may be arranged along one direction of the first base substrate 205. At at least one side end portion of the wiring substrate (M-SUB), a driving unit including a printed circuit board 215 connected to a circuit film 210 on which an integrated circuit chip 213 is mounted is arranged to be connected to the end portion of the link wiring (LL) for transmitting various signals to each sub-pixel of the display unit. For example, the signals transmitted in the sub-pixels can include a high potential voltage, a low potential voltage, a scan signal, or a data signal, etc. In the embodiment of the present specification, a configuration is shown in which a driving unit including a printed circuit board 215 connected to a circuit film 210 on which an integrated circuit chip 213 is mounted is arranged at both side end portions of the first base substrate 205, but it is not limited thereto.

[0038] The plurality of link wirings (LL) can transmit various signals transmitted from the driving unit to the plurality of signal wirings of each of the plurality of display units (TU). For example, the signal wiring can include a high potential voltage line, a low potential voltage line, a scan line, or a data line. This will be further described with reference to FIG. 4.

[0039] The wiring board (M-SUB) can include thin film transistors (TFTs). The thin film transistors (TFTs) can be electrically connected to a plurality of light emitting elements (EDs) disposed on the display unit (TU) respectively, transmit drive signals to the light emitting elements (EDs), and cause the light emitting elements (EDs) to emit light. Therefore, a first wiring electrode (CE1) and a second wiring electrode (CE2) electrically connected to the thin film transistor (TFT) may be disposed on the wiring board (M-SUB). The first wiring electrode (CE1) and the second wiring electrode (CE2) can be electrically connected to the light emitting element (ED) and transmit the drive signal from the thin film transistor (TFT) to the light emitting element (ED).

[0040] A plurality of display units (TU) arranged on the wiring board (M-SUB) can be connected to the first base substrate 205 by an electrical connection between a plurality of signal wirings and a plurality of link wirings (LL) disposed on the wiring board (M-SUB). Here, the plurality of link wirings (LL) can be arranged so as to overlap the plurality of display units (TU) and may not be exposed to the outside. Thereby, the area of the circuit region where the plurality of link wirings (LL) are arranged can be reduced, and the display region can be increased.

[0041] Referring to FIGS. 2 and 3, the plurality of display units (TU1, TU2) can include a first display unit (TU1) and a second display unit (TU2) arranged adjacent to each other in one direction on the wiring board (M-SUB). In the drawings, for convenience of explanation, only a configuration in which two display units (TU1, TU2) are arranged is shown, but the present invention is not limited thereto. For example, other display units may be arranged adjacent to one side of each display unit.

[0042] Each display unit (TU1, TU2) according to an embodiment of the present specification may be a self-assembly substrate on which a plurality of light emitting elements (ED) are arranged.

[0043] The plurality of light-emitting elements (ED) can include a first light-emitting element (ED1a), a second light-emitting element (ED2a), and a third light-emitting element (ED3a). The first light-emitting element (ED1a), the second light-emitting element (ED2a), or the third light-emitting element (ED3a) can emit light of different hues respectively. For example, the first light-emitting element (ED1a) can emit red (R) light, the second light-emitting element (ED2a) can emit green (G) light, and the third light-emitting element (ED3a) can emit blue (B) light. However, it is not limited thereto, and the light-emitting element can further include a white light-emitting element that emits white light. The light-emitting element according to the embodiment of the present specification may be a micro LED (Micro LED).

[0044] In addition, the plurality of light-emitting elements (ED) can further include redundant light-emitting elements (ED1b, ED2b, ED3b) for the repair process. For example, the redundant light-emitting elements (ED1b, ED2b, ED3b) can include a first redundant light-emitting element (ED1b), a second redundant light-emitting element (ED2b), or a third redundant light-emitting element (ED3b) corresponding to the first light-emitting element (ED1a), the second light-emitting element (ED2a), or the third light-emitting element (ED3a) respectively.

[0045] The wiring substrate (M-SUB) and the plurality of display units (TU1, TU2) can be bonded and electrically connected by a plurality of bonding members (BC1, BC2). The plurality of bonding members (BC1, BC2) may be respectively arranged on the plurality of display units (TU1, TU2). The plurality of bonding members (BC1, BC2) are arranged between the wiring substrate (M-SUB) and the plurality of display units (TU1, TU2) and may be configured to include a substance having an adhesive force on at least one surface. In addition, the plurality of bonding members (BC1, BC2) include a conductive substance and can electrically connect between the wiring substrate (M-SUB) and the plurality of display units (TU1, TU2).

[0046] For example, the bonding members (BC1, BC2) can each include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220. One surface of the bonding members (BC1, BC2) can be connected to the signal transmission wiring (ML) on the display units (TU1, TU2), and the other surface can be electrically connected to the link wiring (LL) on the wiring substrate (M-SUB).

[0047] For example, the filling material 230 can include a transparent epoxy resin and can be filled through an underfill process. The filling material 230 can, together with the bonding members (BC1, BC2), fix the space between the wiring substrate (M-SUB) and the display units (TU1, TU2). Also, the filling material 230 can fill the bezel area, which is the boundary area between adjacent display units (TU1, TU2). By configuring the filling material 230 to include a transparent material, the core area can be blocked from the user's view. As a result, the bezel area can be arranged in a minimal space, the bezel area can be reduced, or a zero-bezel area with substantially no bezel area can be realized, and the effect of further increasing the area of the display area can be achieved.

[0048] The plurality of display units (TU1, TU2) can each include a light-emitting element (ED) disposed on a self-assembly substrate. Hereinafter, the description will be made with reference to FIG. 4. In FIG. 4, for convenience of explanation, only one sub-pixel out of a plurality of sub-pixels is shown.

[0049] Referring to FIG. 4, the wiring substrate (M-SUB) and the plurality of display units (TU1, TU2) can be bonded and electrically connected by a plurality of bonding members (BC1, BC2).

[0050] The wiring substrate (M-SUB) can include thin film transistors (TFTs) disposed on the first base substrate 205, storage capacitors (Cst), and various wirings. The thin film transistors (TFTs) can drive the light emitting elements (EDs), and the storage capacitors (Cst) can store a voltage so that the light emitting elements (EDs) can continuously maintain the same state during one frame. The first base substrate 205 may be made of a transparent material including glass or plastic.

[0051] A light shielding layer (LS) may be disposed on the first base substrate 205 of the wiring substrate (M-SUB). The light shielding layer (LS) can block the light incident from the first base substrate 205 to the active layer (ACT) of the thin film transistor (TFT), thereby reducing the leakage current.

[0052] A buffer layer 104 is disposed on the light shielding layer (LS). The buffer layer 104 can prevent the penetration of impurities or moisture by the first base substrate 205. The buffer layer 104 can include an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

[0053] A thin film transistor (TFT) is disposed on the buffer layer 104. The thin film transistor (TFT) can include a semiconductor layer (ACT), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). A gate insulating layer (GI) may be disposed between the semiconductor layer (ACT) and the gate electrode (GE).

[0054] The semiconductor layer (ACT) can include an active region that overlaps with the gate electrode (GE) to form a channel, a source region located on both sides via the active region, and a drain region. An interlayer insulating film 106 is disposed on the gate electrode (GE). The interlayer insulating film 106 can include a source contact (SC) and a drain contact (DC). The source contact (SC) and the drain contact (DC) can each partially expose the surfaces of the source region and the drain region of the semiconductor layer (ACT). The source contact (SC) and the drain contact (DC) are located on top of the interlayer insulating film 106 and can be electrically connected to a source electrode (SE) and a drain electrode (DE) that are electrically connected to the source / drain regions of the semiconductor layer (ACT), respectively. The source electrode (SE) and the drain electrode (DE) can be composed of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but are not limited thereto.

[0055] The storage capacitor (Cst) is disposed separately from the thin-film transistor (TFT) and can include a first capacitor electrode (ST1) and a second capacitor electrode (ST2). The first capacitor electrode (ST1) may be disposed between the first base substrate 205 and the buffer layer 104. The first capacitor electrode (ST1) may be integrally formed with the light-shielding layer (LS). The buffer layer 104 and the gate insulating layer (GI) may be disposed as dielectrics on the first capacitor electrode (ST1), respectively. The second capacitor electrode (ST2) may be disposed on the gate insulating layer (GI). The second capacitor electrode (ST2) may be made of the same material as the gate electrode (GE).

[0056] On the source electrode (SE) and the drain electrode (DE), a first passivation layer 108 is disposed. The first passivation layer 108 serves to protect the thin film transistor (TFT) and can contain an insulating substance. On the first passivation layer 108, a first planarization layer 110 is disposed. The first planarization layer 110 serves to flatten the surface step caused by the underlying wiring such as the thin film transistor (TFT). The first planarization layer 110 can be configured to include a photoactive compound (PAC), but is not limited thereto.

[0057] The first planarization layer 110 can include a via hole 112 that exposes a part of the surfaces of the source electrode (SE) and the drain electrode (DE). The via hole 112 can penetrate through the first planarization layer 110 and the first passivation layer 108 respectively to expose a part of the surface of the drain electrode (DE).

[0058] A second passivation layer 116 containing an insulating substance can be disposed on the first planarization layer 110, and a second via contact 120 that fills the via hole 112 can be disposed. On the second passivation layer 116, a connection electrode 125 that is connected and linked to the interlayer connection electrode 120, and a low-resistance metal pattern 126 that covers the connection electrode 125 can be disposed.

[0059] One surface of the second via contact 120 can be connected to the drain electrode (DE), and the other surface can be connected to the connection electrode 125. Also, the drain electrode (DE) can be electrically connected to the light shielding layer (LS) through a first via contact (VC) that penetrates through the interlayer insulating film 105 and the buffer layer 104. The low-resistance metal pattern 126 and the protective layer 135 can be formed to cover the connection electrode 125 and can expose a part of the surface of the connection electrode 125.

[0060] A link wiring (LL) may be disposed on the first planarization layer 110. The link wiring (LL) can transmit various signals transmitted from a driving unit including a printed circuit board 215 to a plurality of signal transmission wirings (ML) of each of the plurality of display units (TU).

[0061] In the embodiment of the present specification, although the configuration in which the link wiring (LL) is disposed on the second passivation layer 116 is shown, the present invention is not limited thereto. For example, the link wiring (LL) may be disposed on the first base substrate 205 and may be disposed on the same plane as the light shielding layer (LS) and contain the same substance.

[0062] The link wiring (LL) may be covered with a second planarization layer 140. The second planarization layer 140 can have a thickness sufficient to flatten a surface having steps by circuit elements such as thin film transistors (TFTs). The second planarization layer 140 can include a third via contact (IML). One surface of the third via contact (IML) can penetrate the second planarization layer 140 and connect to a part of the surface of the link wiring (LL). The other surface of the third via contact (IML) can be exposed on the surface of the second planarization layer 140.

[0063] The second planarization layer 140 can also include an opening 145. The opening 145 can penetrate the second planarization layer 140 and the protective layer 135 to expose a part of the surface of the connection electrode 125. A first wiring electrode (CE1) and a second wiring electrode (CE2) may be disposed on the second planarization layer 140 including the opening 144. The first wiring electrode (CE1) and the second wiring electrode (CE2) may be disposed apart from each other. The second wiring electrode (CE2) can extend to the exposed surface of the opening 144 and be electrically connected to the drain electrode (DE) via the connection electrode 125.

[0064] The first wiring electrode (CE1) and the second wiring electrode (CE2) can be arranged on the same layer and can be composed of the same conductive material. In one example, the first wiring electrode (CE1) and the second wiring electrode (CE2) may include a transparent metal oxide such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO), but are not limited thereto.

[0065] Referring further to FIG. 4, a display unit (TU) is arranged at a position facing a wiring substrate (M-SUB) including a thin film transistor (TFT).

[0066] The display unit (TU) may be a self-assembly substrate. The self-assembly substrate may include assembly electrodes (AE1, AE2), clad electrodes (CDE1, CDE2), a partition pattern (PL) defining or adjacent to an assembly pocket (PK) region, and a signal wiring (ML) arranged on a second base substrate 102.

[0067] The second base substrate 102 can include a glass or plastic material. The assembly electrodes (AE1, AE2) can include a first assembly electrode (AE1) and a second assembly electrode (AE2). The first assembly electrode (AE1) and the second assembly electrode (AE2) are arranged apart from each other and can respectively correspond to a plurality of light-emitting elements (ED) assembled through a self-assembly process. The assembly electrodes (AE1, AE2) can include a transparent electrode material including indium-tin-oxide (ITO). When a voltage is applied in the self-assembly process, the first assembly electrode (AE1) and the second assembly electrode (AE2) can generate an electric field to stably fix the light-emitting element (ED) that has moved into the assembly pocket (PK).

[0068] The first assembly electrode (AE1) and the second assembly electrode (AE2) are covered with clad electrodes (CDE1, CDE2). The clad electrodes (CDE1, CDE2) include a first clad electrode (CDE1) and a second clad electrode (CDE2), and are arranged to cover the first assembly electrode (AE1) and the second assembly electrode (AE2), respectively.

[0069] The first clad electrode (CDE1) and the second clad electrode (CDE2) prevent the corrosion of the first assembly electrode (AE1) and the second assembly electrode (AE2) in the self-assembly process performed in the fluid, and facilitate the formation of an electric field for the assembly of the light-emitting element (ED). The first clad electrode (CDE1) and the second clad electrode (CDE2) can contain copper (Cu). The distance between the first clad electrode (CDE1) and the second clad electrode (CDE2) is formed to be smaller than, for example, the distance between the first assembly electrode (AE1) and the second assembly electrode (AE2), and the assembly position of the light-emitting element (ED) arranged in the assembly pocket (PK) can be fixed more precisely.

[0070] A partition wall (PL) may be arranged on the clad electrodes (CDE1, CDE2). A part of the partition wall (PL) covers the upper part of the clad electrodes (CDE1, CDE2), and the other region may be arranged on the second base substrate 102. The partition wall (PL) includes an assembly pocket (PK) defined or included therein. The assembly pocket (PK) can specify the position where the light-emitting element (ED) is to be coupled. The partition wall (PL) can have a thickness equal to or higher than at least the height of the light-emitting element (ED).

[0071] An adhesive layer (AD) is arranged on the clad electrodes (CDE1, CDE2). The adhesive layer (AD) serves to adhere the light-emitting element (ED). The adhesive layer (AD) may be made of a thermosetting material or a photocuring material, but is not limited thereto.

[0072] A light-emitting element (ED) may be disposed on the subsequent layer (AD). The light-emitting element (ED) according to the embodiments of this specification may be a micro LED. A micro LED can be understood as an LED made of an inorganic material and having a light-emitting element with a size of 100 μm or less. In addition, in the embodiments of this specification, a horizontal micro LED is taken as an example for description, but it is not limited thereto. For example, the light-emitting element may be a flip-chip micro LED or a nanorod micro LED.

[0073] The light-emitting element (ED) may include a nitride semiconductor structure (NSS), a first electrode (E1), and a second electrode (E2). The nitride semiconductor structure (NSS) may include a first semiconductor layer (NS1), an active layer (EL) disposed on one side of the first semiconductor layer (NS1), and a second semiconductor layer (NS2). The first electrode (E1) is disposed on the first semiconductor layer (NS1) where the active layer (EL) is not located, and the second electrode (E2) is disposed on the second semiconductor layer (NS2).

[0074] The first semiconductor layer (NS1) is a layer for supplying electrons to the active layer (EL) and may include a nitride semiconductor containing a first conductivity type impurity. For example, the first conductivity type impurity may include an N-type impurity. The active layer (EL) disposed on one side of the first semiconductor layer (NS1) may include a multi quantum well (MQW) structure. The second semiconductor layer (NS2) is a layer for injecting holes into the active layer (EL). The second semiconductor layer (NS2) may include a nitride semiconductor containing a second conductivity type impurity. For example, the second conductivity type impurity may include a P-type impurity.

[0075] The protective layer pattern (PT) can cover the outside of the light-emitting element (ED). The protective layer pattern (PT) plays a role in preventing damage that may occur on the side surface of the nitride semiconductor structure (NSS) in the dry etching process for forming the nitride semiconductor structure (NSS) and compensating for the characteristics of the element.

[0076] One surface of the first semiconductor layer (NS1) on which the active layer (EL) is disposed of the light-emitting element (ED) may be in contact with and fixed to the adhesive layer (AD). Thereby, the first electrode (E1) and the second electrode (E2) of the light-emitting element (ED) are positioned so as to face the first wiring electrode (CE1) and the second wiring electrode (CE21) of the wiring substrate (M-SUB), respectively, and can be electrically connected.

[0077] A signal transmission wiring (ML) may be disposed on the second base substrate 102 of the display unit (TU). The signal transmission wiring (ML) may be disposed on the same plane as the assembly electrodes (AE1, AE2), but is not limited thereto. The signal transmission wiring (ML) can include a plurality of signal transmission wirings. For example, the plurality of signal transmission wirings (ML) can include a plurality of scan lines, a plurality of high-potential power supply lines, a plurality of data lines, and a plurality of reference voltage lines. The plurality of signal transmission wirings (ML) may be disposed on the same plane as each other on the first base substrate 205. Also, the plurality of signal transmission wirings (ML) may be made of the same material as the assembly electrodes (AE1, AE2).

[0078] The wiring substrate (M-SUB) on which the thin film transistor (TFT) is disposed and the plurality of display units (TU) on which the plurality of light-emitting elements (ED) are disposed can be bonded to each other via a plurality of bonding members (BC) and electrically connected.

[0079] One side of the bonding member (BC) is connected to the link wiring (LL) via the third via contact (IML) of the wiring substrate (M-SUB), and the other side of the bonding member (BC) can be electrically connected to the signal transmission wiring (ML) on the display unit (TU). The bonding member (BC) can include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220.

[0080] The spacer pattern 211 can serve to maintain and support the gap between the wiring board (M-SUB) and the display unit (TU). The spacer pattern 211 can be configured in a reverse taper shape in which the width of one surface in contact with the third via contact (IML) is wider than the other surface, but is not limited thereto.

[0081] The outer surface of the spacer pattern 211 may be covered with the conductive connection pattern 217. For example, the conductive connection pattern 217 may be arranged to surround the outer surface while covering the upper surface of the spacer pattern 211. Also, the conductive connection pattern 217 may be arranged to surround at least the outer surface of the spacer pattern 211. Also, the conductive connection pattern 217 can be in contact with the third via contact (IML). The conductive connection pattern 217 can be composed of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.

[0082] The adhesive pattern 220 may be arranged on the conductive connection pattern 217. The adhesive pattern 220 can bond and fix the wiring board (M-SUB) and the display unit (TU). Also, the adhesive pattern 220 can have electrical conductivity in order to transmit the signal transmitted to the link wiring (LL) on the wiring board (M-SUB) to the display unit (TU1). For this reason, the adhesive pattern 220 can be configured to include a material having electrical conductivity and adhesiveness. For example, the adhesive pattern 220 can include an anisotropic conductive film (ACF).

[0083] The space between the wiring substrate (M-SUB) and the display unit (TU), and the boundary regions between adjacent display units can be filled with a filler 230 made of a transparent material. The filler 230 can improve the bonding strength between the wiring substrate (M-SUB) and the display unit (TU). Also, by filling the boundary regions between adjacent display units with the transparent filler 230, a bezel region can be arranged in a minimal space, reducing the bezel region or achieving a zero-bezel region where the bezel region is substantially non-existent.

[0084] According to an embodiment of the present specification, by directly bonding a self-assembly substrate on which a light-emitting element (ED) is arranged to a wiring substrate (M-SUB) as a display unit (TU), the process step of transferring the light-emitting element can be omitted, achieving the effect of optimizing the process. Also, since the process of transferring the light-emitting element can be omitted, it is possible to prevent a decrease in transfer yield and the occurrence of misalignment problems when performing the transfer process.

[0085] Moreover, by directly bonding the display unit on which the light-emitting element is arranged to the wiring substrate, the use of a transfer substrate, which is a temporary substrate for transferring the light-emitting element, can be omitted, achieving the effect of simplifying material components and manufacturing an environmentally friendly product.

[0086] In a display device according to an embodiment of the present specification, the light-emitting element (ED) is arranged in the display unit (TU), and the thin-film transistors (TFTs) are arranged separately from each other on the wiring substrate (M-SUB). Thus, even when a defect occurs in the light-emitting element (ED), only the display unit (TU) in which the light-emitting element (ED) is arranged can be replaced and repaired, achieving the optimization of the process.

[0087] On the other hand, in an embodiment of the present specification, a display device in which horizontal micro-LEDs are arranged has been described, but vertical micro-LEDs may also be arranged. This will be described below with reference to FIG. 5.

[0088] FIG. 5 is a cross-sectional view showing a modified example of the display device according to an embodiment of the present specification. The display device according to FIG. 5 is the same as the display device according to FIG. 4 except that the light-emitting element (ED) is a vertical micro LED. Therefore, the parts with differences will be mainly described, and the same components may be briefly described or omitted.

[0089] Referring to FIG. 5, a thin-film transistor (TFT) may be disposed on the wiring substrate (M-SUB). A first passivation layer 108 and a first planarization layer 110 may be disposed on the thin-film transistor (TFT). A connection electrode 125, a signal transmission wiring (ML), a low-resistance metal pattern 126 disposed on the connection electrode 125 and the signal transmission wiring (ML), and a protective layer 135 may be disposed on the first planarization layer 110. The protective layer 135 can expose a part of the surface of the low-resistance metal pattern 126.

[0090] A link wiring (LL) may be disposed on the first base substrate 205 of the wiring substrate (M-SUB). The link wiring (LL) may be disposed on the same plane as the light-shielding layer (LS), but is not limited thereto. The link wiring (LL) and the signal transmission wiring (ML) can be electrically connected through a first through electrode (C1) penetrating the first planarization layer 110, the first passivation layer 108, and the interlayer insulating film 106.

[0091] The low-resistance metal pattern 126 and the signal transmission wiring (ML) may be connected to a second through electrode (C2) disposed through the second planarization layer 140. The second through electrode (C2) can be connected to a bonding member (BC) described later and electrically connected to the light-emitting element (ED). The second planarization layer 140 may include a groove portion 143 and an opening hole 145. The groove portion 143 may have a side surface portion and a bottom surface having an inclination. A second wiring electrode (CE2) may be disposed on the second planarization layer 140 including the groove portion 143 and the opening hole 145. The second wiring electrode (CE2) can be connected to the low-resistance metal pattern 126 exposed by the opening hole 145 and electrically connected to the connection electrode 125. Further, the second wiring electrode (CE2) can extend from the opening hole 145 to the groove portion 143 and be connected to the second electrode (E2) of the light-emitting element (ED) disposed in the groove portion 143.

[0092] A display unit (TU) including a light-emitting element (ED) is disposed at a position facing a wiring substrate (M-SUB) including a thin-film transistor (TFT). The display unit (TU) may include a first assembly electrode (AE1), a second assembly electrode (AE2), a first clad electrode (CDE1), a second clad electrode (CDE2), a first wiring electrode (CE1), an adhesive layer (AD), and an insulating separation layer (ISL) disposed on a second base substrate 102. The insulating separation layer (ISL) serves to insulate the first clad electrode (CDE1) and the second clad electrode (CDE2). Further, although the insulating separation layer (ISL) is shown in the present specification, it is not limited thereto. For example, as shown in FIG. 4, a partition wall (PL) including an assembly pocket (PK) for designating a position where the light-emitting element (ED) is disposed may be disposed.

[0093] The light-emitting element (ED) may be disposed on the adhesive layer (AD). The light-emitting element (ED) may be a vertical micro-LED. The light-emitting element (ED) may include a nitride semiconductor structure (NSS), a first electrode (E1), and a second electrode (E2). The nitride semiconductor structure (NSS) may include a structure in which a first semiconductor layer (NS1), an active layer (EL), and a second semiconductor layer (NS2) are vertically stacked. A protective layer pattern (PT) may be disposed outside the nitride semiconductor structure (NSS).

[0094] The first electrode (E1) may be disposed on at least one surface of the first semiconductor layer (NS1) disposed in contact with the adhesive layer (AD). For example, the first electrode (E1) may extend from one surface of the first semiconductor layer (NS1) to a part of the side surface of the first semiconductor layer (NS1). A first wiring electrode (CE1) may be disposed in contact with the outside of the first electrode (E1). The second electrode (E1) may be disposed in contact with one surface of the second semiconductor layer (NS2). The second electrode (E2) may be disposed in contact with the second wiring electrode (CE2).

[0095] A wiring substrate (M-SUB) on which a thin-film transistor (TFT) is disposed and a plurality of display units (TU) on which a plurality of light-emitting elements (ED) are disposed can be bonded and electrically connected via a plurality of bonding members (BC).

[0096] One side of the bonding member (BC) may be in contact with the second through electrode (C2) of the wiring substrate (M-SUB), and the other side of the bonding member (BC) may be in contact with the first wiring electrode (CE1). Thereby, it may be connected to the link wiring (LL) via the bonding member (BC). The bonding member (BC) may include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220.

[0097] The space between the wiring substrate (M-SUB) and the display unit (TU) can be filled with a filler 230 made of a transparent material. The filler 230 can improve the bonding force between the wiring substrate (M-SUB) and the display unit (TU).

[0098] Defects may occur during the process of manufacturing the components arranged on each display unit (TU). Each display unit (TU) can be replaced only for the display unit on which a defective component is arranged among the plurality of display units by bonding it to the wiring substrate (M-SUB) via a bonding member (BC). Thereby, a repair process can be easily performed and process optimization can be realized.

[0099] Also, the light-emitting element (ED) is arranged in the display unit (TU), and the thin-film transistor (TFT) is arranged separately on the wiring substrate (M-SUB). Thus, even when a defect occurs in the light-emitting element (ED), the thin-film transistor (TFT), which is a normal component, can be used without being removed. Thereby, it is possible to prevent an unnecessary increase in the manufacturing process steps.

[0100] FIG. 6 is a schematic cross-sectional view of a display device according to another embodiment of the present specification. And FIG. 7 is a cross-sectional view regarding 7 in FIG. 6 in the display device according to another embodiment of the present specification. Here, for the same reference numerals as those in FIGS. 1 to 5, the same components may be briefly described or omitted by referring to the same components.

[0101] Referring to FIGS. 6 and 7, a thin-film transistor (TFT) may be arranged on the display unit (TU), and a light-emitting element (ED) may be arranged on the wiring substrate (M-SUB). And the display unit (TU) and the wiring substrate (M-SUB) can be bonded via a bonding member (BC).

[0102] On the thin film transistor (TFT) disposed on the display unit (TU), a first passivation layer 108 and a first planarization layer 110 may be disposed. On the first planarization layer 110, a connection electrode 125, a low-resistance metal pattern 126, and a protective layer 135 may be disposed. The protective layer 135 can expose a part of the surface of the low-resistance metal pattern 126.

[0103] The second planarization layer 140 may include a groove portion 143 and an opening hole 145. On the second planarization layer 140 including the groove portion 143 and the opening hole 145, a first wiring electrode (CE1) and a second wiring electrode (CE2) may be disposed. The first wiring electrode (CE1) can be connected to the low-resistance metal pattern 126 exposed by the opening hole 145 and electrically connected to the connection electrode 125. Further, the second wiring electrode (CE2) can extend from the opening hole 145 to the groove portion 143 and be connected to a first electrode (E1) of a light-emitting element (ED) disposed in the groove portion 143. The second wiring electrode (CE2) may be disposed at a predetermined distance from the first wiring electrode (CE1).

[0104] A display unit (TU) including a light-emitting element (ED) is disposed at a position facing a wiring substrate (M-SUB) including a thin film transistor (TFT).

[0105] The display unit (TU) may include a first assembly electrode (AE1), a second assembly electrode (AE2), a first clad electrode (CDE1), a second clad electrode (CDE2), a first wiring electrode (CE1), an adhesive layer (AD), and an insulating separation layer (ISL) disposed on a second base substrate 102. Also, in this specification, an insulating separation layer (ISL) is shown, but it is not limited thereto. For example, as shown in FIG. 4, a partition wall (PL) including an assembly pocket (PK) for designating a position where a light-emitting element (ED) is disposed may be disposed.

[0106] The light-emitting element (ED) may be disposed on the adhesive layer (AD). The light-emitting element (ED) may include a nitride semiconductor structure (NSS) including a first semiconductor layer (NS1), an active layer (EL), and a second semiconductor layer (NS2), a first electrode (E1) disposed on the first semiconductor layer (NS1), and a second electrode (E2) disposed on the second semiconductor layer (NS2). A protective layer pattern (PT) may be disposed outside the nitride semiconductor structure (NSS).

[0107] The light-emitting element (ED) may be, but is not limited to, a horizontal micro-LED. For example, the light-emitting element (ED) may be a vertical micro-LED, a flip-chip micro-LED, or a nanorod micro-LED.

[0108] The distance (d) between the first cladding electrode (CDE1) and the second cladding electrode (CDE2) is formed, for example, to be smaller than the distance between the first assembly electrode (AE1) and the second assembly electrode, and when an electric field is generated for self-assembly, the assembly position of the light-emitting element (ED) can be fixed more precisely.

[0109] Link wiring (LL) may be disposed on the first base substrate 205 of the wiring substrate (M-SUB). A bonding member (BC) is disposed on the link wiring (LL) to electrically connect the display unit (TU) and the wiring substrate (M-SUB). The wiring substrate (M-SUB) on which a plurality of light-emitting elements (ED) are disposed and the plurality of display units (TU) on which a plurality of thin-film transistors (TFT) are disposed can be bonded to each other via a plurality of bonding members (BC).

[0110] One side of each bonding member (BC) can contact the link wiring (LL) of the wiring substrate (M-SUB), and the other side of the bonding member (BC) can contact the first wiring electrode (CE1) of the display unit (TU). Thereby, it may be connected to the link wiring (LL) via the bonding member (BC). The bonding member (BC) can include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220.

[0111] The space between the wiring substrate (M-SUB) and the display unit (TU) can be filled with a filling material 230 made of a transparent material. The filling material 230 can improve the bonding force between the wiring substrate (M-SUB) and the display unit (TU).

[0112] In the display device according to another embodiment of the present specification, the light-emitting element (ED) is arranged on the wiring substrate (M-SUB), and the thin-film transistors (TFTs) are arranged separately from each other on the display unit (TU). Thereby, when a defect occurs in the thin-film transistor (TFT), only the display unit (TU) on which the thin-film transistor (TFT) is arranged can be replaced and repaired, and optimization of the process can be realized.

[0113] Thereby, when a defect occurs in a part of the components in the display unit (TU) that includes both the thin-film transistor (TFT) and the light-emitting element (ED), normal components also have to be removed. On the contrary, according to the embodiment of the present specification, normal components do not have to be removed, preventing an increase in unnecessary process steps and realizing optimization of the process.

[0114] In addition, since it is possible to prevent the use of harmful chemical substances while performing unnecessary process steps, there is an effect of realizing an environmentally friendly product.

Explanation of Reference Numerals

[0115] 102 Second base substrate 205 First base substrate 211 Spacer pattern 217 Conductive connection pattern 120 Adhesive pattern BC, BC1, BC2 Bonding member LL Link wiring TU, TU1, TU2 Display unit M-SUB Wiring board ED, ED1a, ED2a, ED3a Light-emitting element TFT Thin film transistor AE1, AE2 Assembly electrode CDE1, CDE2 Clad electrode

Claims

1. A substrate; a light-shielding layer disposed on the substrate; a thin film transistor including a semiconductor layer having a source region and a drain region; an interlayer insulating film covering the semiconductor layer; a source electrode and a drain electrode disposed on the interlayer insulating film and spaced apart from each other; a first planarization layer covering the thin film transistor; a connection electrode disposed above the first planarization layer; a second planarization layer disposed above the connecting electrode; a micro LED having a first electrode and a second electrode; an organic layer surrounding the outside of the micro LED; A cover substrate disposed above the micro LED; Including, The micro LED and the connecting electrode are electrically connected through an opening hole penetrating the second planarization layer. Display device.

2. The display device according to claim 1 , further comprising a first via contact penetrating the interlayer insulating film.

3. The display device according to claim 2 , wherein the light-shielding layer and the thin-film transistor are electrically connected to each other through the first via contact.

4. further comprising an adhesive layer disposed below the cover substrate; The micro LED is disposed on the adhesive layer. The display device according to claim 1 .

5. The display device of claim 1 , further comprising a redundant micro-LED corresponding to the micro-LED.

6. The display device of claim 1 , further comprising a protective layer pattern covering an outer side surface of the micro-LED and a top surface of the micro-LED between the first electrode and the second electrode.

7. A link wiring disposed above the substrate; A signal transmission wiring arranged under the cover substrate; a bonding member located between the substrate and the cover substrate and electrically connected to the link wiring and the signal transmission wiring; Further comprising: The bonding member is an adhesive pattern disposed on the signal transmission wiring; a spacer pattern having one surface in contact with the adhesive pattern; a conductive connection pattern covering at least an outer side surface of the spacer pattern; having The adhesive pattern is electrically connected to the micro LED. The display device according to claim 1 .

8. The display device according to claim 1 , wherein the organic layer includes a transparent resin.

9. The display device according to claim 7 , wherein the second planarization layer covers the link wiring.

10. a via contact disposed between the link wiring and the bonding member; a surface of the via contact is connected to a portion of a surface of the link wiring by extending through a portion of the second planarization layer; Another surface of the via contact is connected to a surface of the spacer pattern of the bonding member. The display device according to claim 7.

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