Radiation detector, radiation imaging system, radiation detection method, and storage medium

Abstract

To solve the problem in which: a technique is sought which can acquire at a high speed a background component at a time point when an object is irradiated with radiation and an image of the object is picked up.SOLUTION: A radiation detector has: a plurality of pixels that detects radiation and outputs voltage signals; and an A / D converter that executes first A / D conversion processing of comparing the voltage signal with a first reference signal and converting the voltage signal into a tri- or more-valent digital signal, and second A / D conversion processing of comparing the voltage signal with a second reference signal and converting the voltage signal into a tri- or more-valent digital signal. The first reference signal is a signal that changes over time in a first voltage area including the mode of the voltage signal output from the pixel not receiving radiation, and the second reference signal is a signal that changes over time in a second voltage area including the voltage signal output from the pixel receiving radiation and not overlapping the first voltage area. A third voltage area where the A / D conversion processing is not performed, is present between the first voltage area and the second voltage area.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a radiation detector and the like.

Background Art

[0002] There is known a radiation detector that receives radiation with a semiconductor element such as a CMOS image sensor without passing through a scintillator (wavelength converter) to obtain a radiation image. In such a radiation detector, in order to acquire a good image, it is required to remove a background component generated by, for example, dark current flowing through the sensor unit from the detected image signal.

[0003] Patent Document 1 describes that, in an X-ray imaging system that detects X-rays with a CMOS image sensor, the signal of a pixel in a certain image frame is corrected based on the signal of the same pixel in different image frames.

[0004] Patent Document 2 proposes a method for obtaining a background component at the timing of imaging an imaging target. It is a method for obtaining the background components included in a plurality of pixels in a certain frame using the values of the pixel signals read out in that frame.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] In the method described in Patent Document 1, the level of the dark current of the image sensor is measured in advance at a time different from the time when the imaging target is imaged, and a correction coefficient is calculated. Then, when the imaging target is imaged, the image signal obtained by imaging the imaging target is calibrated using the correction coefficient based on the dark current measured at another time.

[0007] However, the dark current of the image sensor is not always constant. For example, when the temperature changes due to irradiation with radiation, the dark current can change accordingly. Therefore, if the image signal when imaging the imaging target is calibrated using the correction coefficient obtained in advance without irradiating radiation, the calibration that correctly reflects the dark current at the imaging time is not always achieved. For example, when continuously imaging while irradiating radiation, the temperature of the sensor may rise over time, the dark current may change, and the image quality may not be stable or may deteriorate. In that regard, in the method described in Patent Document 2, there is a possibility of obtaining stable image quality even when background components such as dark current change over time.

[0008] On the other hand, in the field of obtaining a binary image using a radiation detector and performing so-called counting, it is required to obtain an appropriate binary image at a high frame rate.

[0009] Therefore, there has been a demand for a technology capable of quickly obtaining the background component at the time when an object is imaged by irradiating radiation even when background components such as dark current change over time. 。

Means for Solving the Problem

[0010] According to a first aspect of the present invention, there are provided a plurality of pixels that detect radiation and output a voltage signal, a first A / D conversion process that compares the voltage signal with a first reference signal and converts it into a digital signal having three or more values, and a second A / D conversion process that compares the voltage signal with a second reference signal and converts it into a digital signal having three or more values. An A / D converter that executes the above processes and a signal processing unit, wherein the first reference signal is a signal that changes over time in a first voltage region that includes the most frequent value of the voltage signal output by a pixel that has not received radiation, and the second reference signal is a signal that changes over time in a second voltage region that includes the voltage signal output by a pixel that has received radiation and does not overlap with the first voltage region. There is a third voltage region between the first voltage region and the second voltage region where no A / D conversion process is performed. A radiation detector characterized by this.

[0011] Further, according to a second aspect of the present invention, from a plurality of pixels that detect radiation and output a voltage signal, a reading step in which a reading circuit reads the voltage signal, and an A / D converter compares the voltage signal with a first reference signal and converts it into a digital signal having three or more values. A first A / D conversion step, and a second A / D conversion step in which the A / D converter compares the voltage signal with a second reference signal and converts it into a digital signal having three or more values, wherein the first reference signal is a signal that changes over time in a first voltage region that includes the most frequent value of the voltage signal output by a pixel that has not received radiation, and the second reference signal is a signal that changes over time in a second voltage region that includes the voltage signal output by a pixel that has received radiation and does not overlap with the first voltage region. There is a third voltage region between the first voltage region and the second voltage region where the A / D converter does not perform an A / D conversion process. A radiation detection method characterized by this.

Effects of the Invention

[0012] According to the present invention, even when background components such as dark current change over time, the background components at the time of imaging an object by irradiating radiation can be acquired at high speed.

Brief Description of the Drawings

[0013]

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Mode for Carrying Out the Invention

[0014] With reference to the drawings, a radiation detector and the like, which are embodiments of the present invention, will be described. Note that the embodiments shown below are examples, and for example, those skilled in the art can appropriately modify and implement the details of the configuration without departing from the spirit of the present invention.

[0015] In the drawings referred to in the following description of the embodiments and examples, unless otherwise specified, elements denoted by the same reference numerals have the same functions. In the drawings, when a plurality of the same elements are arranged, the assignment of reference numerals and their description may be omitted.

[0016] Also, for the convenience of illustration and description, the drawings may be schematically represented. Therefore, the shapes, sizes, arrangements, etc. of the elements shown in the drawings may not necessarily be exactly the same as the actual objects. Also, the description of "XX or more and YY or less" or "XX to YY" representing a numerical range means a numerical range including the endpoints XX (lower limit) and YY (upper limit) unless otherwise specified. When the numerical ranges are described stepwise, the upper and lower limits of each numerical range can be arbitrarily combined.

[0017] In the following description, "radiation" is a concept that includes electromagnetic radiation (such as X-rays and gamma rays), particle radiation (such as electron beams, proton beams, neutron beams, and alpha rays), and non-ionizing radiation (such as radio waves, microwaves, infrared rays, and visible light). "Radiation imaging system" generally refers to a system that uses radiation to acquire an image of an imaging target as electronic data. The imaging target is, for example, an object to be inspected in a non-destructive inspection system, or a patient in a medical imaging system. "Image" can be a still image or a moving image. "Radiation detector" refers to an image sensor unit that is a component of a radiation imaging system and converts a radiation image into an electrical signal to acquire an image as electronic data.

[0018] In the following description, the analog signal output from each pixel of the radiation detector may be referred to as a pixel signal. Also, a signal obtained by quantizing the pixel signal into two values may be referred to as a binary pixel signal. Further, a signal obtained by quantizing the pixel signal into three or more values may be referred to as a multi-valued pixel signal. Also, an image for one frame composed of binary pixel signals may be referred to as a binary image.

[0019] In each of the embodiments described below, when imaging an image of one frame, for the pixel signal of that one frame, the first voltage region including the signal level of the most frequent value of the background component is A / D converted to obtain a first digital signal (a multi-valued digital signal). Also, for the pixel signal of that one frame, the second voltage region including the signal level of the pixel that has received radiation is A / D converted to obtain a second digital signal (a multi-valued digital signal). In each embodiment, an A / D converter is configured that can acquire the first digital signal and the second digital signal at high speed.

[0020] For the specific methods of setting the binarization determination threshold value and counting in the embodiments, known techniques such as US Patent Publication US2016 / 0309105A1 and International Patent Publication WO2019 / 064632A1 can be referred to.

[0021] [Embodiment 1] (Configuration of Radiation Detector) FIG. 1(a) is a block diagram showing a schematic configuration of a radiation detector 100 according to Embodiment 1. The radiation detector 100 includes an imaging device 101, an output signal processing unit 110, a memory unit 111, an external interface unit 112, and a control unit 117. Each of the illustrated functional elements is conceptually functional and does not necessarily have to be physically configured as shown. For example, the specific form of the dispersion and integration of each functional block is not limited to the illustrated example, and all or part of them can be functionally or physically dispersed and integrated in any unit according to the usage situation or the like.

[0022] The imaging device 101 includes a pixel array 102 composed of a plurality of pixels 103 arranged in a matrix, a vertical scanning circuit 104, vertical signal lines 105, a column circuit 106, a column memory 107, a horizontal scanning circuit 108, and a DFE 109. Here, DFE is an abbreviation for Digital Front End. The vertical scanning circuit 104, the vertical signal lines 105, the column circuit 106, the column memory 107, and the horizontal scanning circuit 108 are examples of a readout circuit that reads pixel signals from each pixel of the pixel array 102 for each frame. The DFE 109 is an example of a processing circuit (signal processing unit) that processes the pixel signals read by the readout circuit. The imaging device 101 is a CMOS image sensor that detects radiation.

[0023] The pixel 103 that constitutes the pixel array 102 converts the incident radiation into electric charges. The configuration of the pixel 103 will be described later. The vertical scanning circuit 104 selects the pixel rows that output signals in the pixel array 102, and sequentially switches and scans the selected rows. The vertical signal line 105 transmits the signals from the pixels 103 of the row selected by the vertical scanning circuit 104. The column circuit 106 processes the signals input from the vertical signal line 105. The processing performed by the column circuit 106 includes A / D conversion. The column memory 107 holds the digital signals (multi-value pixel signals) output from the column circuit 106. The horizontal scanning circuit 108 scans the column circuit 106 or the column memory 107 in the direction of the pixel columns to sequentially read out the digital signals (multi-value pixel signals) for each column. The DFE 109 is an output circuit that processes the digital signals read from the column circuit 106 or the column memory 107 and outputs them outside the image sensor 101.

[0024] The output signal processing unit 110 performs arithmetic processing on the signals output from the image sensor 101. The memory unit 111 is a data holding unit (storage area) for performing the arithmetic operations in the output signal processing unit 110, and holds the data to be processed and the predetermined data. The signals output from the output signal processing unit 110 are output outside the radiation detector 100 through the external interface unit 112.

[0025] The control unit 117 controls the operations of each part of the radiation detector 100, and when configuring the radiation imaging system described later, exchanges signals related to operation control with the outside of the radiation detector 100.

[0026] FIG. 1(b) is a schematic circuit diagram showing a configuration example of one pixel of the pixel 103 in FIG. 1(a). The pixel 103 includes a photodiode 201, a floating diffusion capacitance 202, transistors 203, 204, 205, and 206.

[0027] The photodiode 201 is a conversion element that converts incident radiation into charge. The anode of the photodiode 201 is connected to the reference voltage node, and the cathode is connected to the source of the transistor 203. The drain of the transistor 203 is connected to the source of the transistor 204 and the gate of the transistor 205. The connection node of the drain of the transistor 203, the source of the transistor 204, and the gate of the transistor 205 is a so-called floating diffusion portion. The floating diffusion portion includes a capacitance component (floating diffusion capacitance 202) and functions as a charge holding portion.

[0028] The drains of the transistor 204 and the transistor 205 are connected to a power supply voltage node 207 to which a power supply voltage is supplied. The source of the transistor 205 is connected to the drain of the transistor 206. The source of the transistor 206 is connected to the vertical signal line 105. The vertical signal line 105 is connected to a current source.

[0029] Signal lines for transmitting control signals from the vertical scanning circuit 104 are connected to the gates of the transistor 203, the transistor 204, and the transistor 206, respectively. Each signal line is a signal line common to the row to which the pixel 103 belongs in the pixel array 102.

[0030] When radiation is incident on the pixel 103, the radiation is converted into charge (signal charge) by the photodiode 201 and accumulated. The transistor 203 (transfer transistor) transfers the signal charge accumulated in the photodiode 201 to the floating diffusion portion based on a control signal from the vertical scanning circuit 104. The floating diffusion portion holds the charge transferred from the photodiode 201 and holds a voltage corresponding to the amount of the transferred charge by charge-voltage conversion by the floating diffusion capacitance 202.

[0031] The transistor 205 (amplification transistor) amplifies the pixel signal based on the charge held in the floating diffusion section and outputs it to the transistor 206. The transistor 206 (selection transistor) outputs the pixel signal from the transistor 205 to the vertical signal line 105 based on the control signal from the vertical scanning circuit 104. The transistor 204 (reset transistor) resets the floating diffusion section to a voltage corresponding to the power supply voltage based on the control signal from the vertical scanning circuit 104. Note that the transistor 203 may be omitted, and the photodiode 201 and the floating diffusion capacitor 202 may be directly connected.

[0032] FIG. 2 is a diagram showing a configuration example of the A / D converter 308 included in the column circuit 106. The A / D converter 308 includes an analog memory 309, a reference signal generation circuit 310, a comparator 311, a counter 312, and a digital memory 313. The analog memory 309 holds the pixel signal (analog signal) input from the vertical signal line 105. The reference signal generation circuit 310 as a reference signal generator generates a reference signal for use in A / D conversion. The reference signal is a signal whose signal level changes with the passage of time in an arbitrary voltage range for which the A / D conversion result is to be obtained. The form of the reference signal is not particularly limited, and for example, a ramp signal whose signal level monotonically increases or decreases with the passage of time can be applied.

[0033] The comparator 311 has two input nodes and one output node. One input node of the comparator 311 is connected to the output node of the analog memory 309. The other input node of the comparator 311 is connected to the reference signal generation circuit 310 and receives the supply of the reference signal. When the level of the reference signal is lower than the level of the signal output from the analog memory 309, the comparator 311 outputs an H-level signal. When the level of the reference signal is higher than the level of the signal output from the analog memory 309, the comparator 311 outputs an L-level signal.

[0034] The counter 312 starts a counting operation in synchronization with the timing at which the change in the signal level of the reference signal supplied to the comparator 311 starts, and outputs a count signal to the digital memory 313. The digital memory 313 holds the signal input from the counter 312 when the output of the comparator 311 changes from the H level to the L level.

[0035] As will be described later with reference to FIG. 3, when the reference signal switches from the ramp voltage 501 to the ramp voltage 502, the signal level of the reference signal changes discontinuously. Therefore, in accordance with the switching timing of the ramp voltage, a bias value may be added to the output value of the counter 312. However, if it does not affect the result of the binarization process described later, the counter 312 may be configured to output a count value that continuously increases at a constant rate even at the timing when the signal level of the reference signal changes discontinuously.

[0036] Here, to facilitate the understanding of the operation of the A / D converter 308 in the high-speed A / D conversion mode, the properties of the pixel signals (analog signals) output from each pixel of the radiation detector will be described.

[0037] FIG. 4(a) is a schematic diagram illustrating a situation where a radiation detector is irradiated with radiation. A pixel array 102 in which 12×12 pixels 103 are two-dimensionally arranged is shown, but the number of pixels is not limited to this example, and for example, thousands×thousands of pixels 103 may be provided to acquire a high-definition image. Each pixel 103 has a function of converting the received radiation into an analog voltage signal and outputting it as a pixel signal. The pixel 103 may include a light-receiving element that directly receives radiation and converts it into a signal, or may include a scintillator that converts radiation into light, such as a phosphor, and a light-receiving element that receives the converted light.

[0038] In Fig. 4(a), the incident radiation 301 is schematically indicated by an arrow. The pixel directly irradiated by the radiation 301 is conveniently called the incident pixel 302 and is illustrated in black. Also, the pixel not irradiated by the radiation 301 is conveniently called the non-incident pixel 304 and is illustrated in white. However, even for a pixel that is not directly irradiated by the radiation 301, there are pixels adjacent to the incident pixel 302 where the radiation reaches via the incident pixel 302 and signal charges are generated, etc., resulting in pixels where the output signal fluctuates. Thus, pixels that are not directly irradiated by the radiation but whose output signals fluctuate due to the influence of the radiation are conveniently called affected pixels 303 and are illustrated in gray.

[0039] In order to perform appropriate counting, it is necessary to rapidly acquire binarized images of multiple frames. In that case, for each frame, it is necessary to acquire a multi-valued pixel signal with the influence of temporal fluctuations of the background component reduced, and generate a binarized image using the multi-valued pixel signal. Here, the background component is, for example, the superposition of dark current generated in the light-receiving element of each pixel (e.g., the photodiode 201 in Fig. 1(b)), noise caused by the circuit of each pixel, shading according to the position of each pixel, etc. Due to the temporal degradation of semiconductor elements due to long-term irradiation by radiation, temperature changes of the imaging device 101, etc., the background component can vary over time.

[0040] Fig. 4(b) is a histogram showing an example of the relationship between the level of the pixel signal (analog signal) output from each pixel when one frame of imaging is performed and the number of pixels. The horizontal axis represents the output level of the pixel signal, and the vertical axis represents the number of pixels. In the histogram, there are two peaks, a peak formed by the non-incident pixels 304 (left side in the figure) and a peak formed by the incident pixels 302 and the affected pixels 303 (right side in the figure). Note that since the incident amount of the radiation 301 incident on the radiation detector varies depending on the state of the imaging object, the height and shape of the peaks in the histogram can vary according to the state of the imaging object.

[0041] The pixel signal of the non-incident pixel 304 forms a peak on the left side in the figure. Since it is a pixel where the radiation 301 does not enter, its signal level can be considered to represent the background component. Since the background component of the same magnitude does not occur in every pixel, the signals (background components) read from a plurality of non-incident pixels 304 are distributed with a width in signal level. The signal level corresponding to the peak position of the left peak, that is, the signal level with the largest number of pixels among the non-incident pixels (the mode), can be treated as the representative value of the background component in that image frame.

[0042] The signal level of the background component changes over time for various reasons. For example, when the ambient temperature of the device changes, or when the device itself generates heat and the temperature rises due to irradiation with radiation, the dark current flowing in the pixel changes, so the level of the background component included in the pixel signal fluctuates. Then, the shape of the left peak in the histogram also changes, and the signal level corresponding to the mode, which is the representative value of the background component, can also change.

[0043] In this way, the background components are distributed with a certain width with respect to the signal level, and the distribution can change over time. However, it is possible to specify in advance the voltage range within which the signal level corresponding to the mode value of the background components can be distributed. For example, the distribution of the signal levels of the background components can be measured in advance in a state where the device is not irradiated with radiation, and the signal level corresponding to the mode value can be detected. Furthermore, in a state where the device is not irradiated with radiation, the environmental temperature or the device temperature can be changed, the change in the distribution of the background level can be measured, and the change in the signal level corresponding to the mode value can be measured. Alternatively, after irradiating the device with radiation, the radiation irradiation can be stopped, the change in the distribution of the background level can be measured, and the change in the signal level corresponding to the mode value can be measured. By these methods, the voltage range within which the signal level corresponding to the mode value of the background components can be distributed can be specified. In FIG. 4(b), considering the change over time of the background components, the range of the signal levels within which the mode value of the pixel signals of the non-incident pixels 304 can exist is shown as the first voltage region 305.

[0044] The pixel signals of the incident pixels 302 and the affected pixels 303 constitute the right peak of the histogram. The signal level of the incident pixel 302 is considered to be a superposition of the radiation signal component generated due to the incidence of radiation and the background component. The level of the radiation signal component can vary depending on irradiation conditions such as the type of radiation and the acceleration energy, and the structure of the light-receiving element (for example, the photodiode 201 in FIG. 2) and the thickness of the substrate. Even if these conditions are constant, due to the fact that the magnitude of the generated radiation signal component has a statistical probability distribution and the background component is distributed with a certain width, the pixel signals of the incident pixel 302 are distributed with a certain width of the signal level.

[0045] The signal level of the affected pixel 303 is considered to be a superposition of an affected component, for example, due to radiation incident on adjacent pixels, and a background component. The magnitude of the affected component is not constant but is larger than the background component. Since the signal levels of the affected component and the background component are distributed with widths respectively, the pixel signal of the affected pixel 303 in which these are superimposed is distributed with a width of the signal level.

[0046] Since the pixel signals of the incident pixel 302 and the affected pixel 303 that constitute the right peak of the histogram contain a background component that changes over time, these signal levels can change over time. However, it is possible to specify in advance the voltage range in which the pixel signals of the incident pixel 302 and the affected pixel 303 can be distributed in consideration of the change over time. For example, methods such as measuring in advance the distribution of the signal levels of the incident pixel and the pixel adjacent thereto in a state where radiation is irradiated, and measuring the change in the distribution of the signal levels of the incident pixel and the pixel adjacent thereto by changing the environmental temperature or the device temperature are conceivable. Further, the irradiation of radiation may be continued, and the change in the distribution of the signal levels of the pixels may be measured in a state where the characteristics of the semiconductor element are deteriorated due to the total dose effect.

[0047] In FIG. 4(b), in consideration of the change over time of the background component, the range in which the pixel signals of the incident pixel 302 and the affected pixel 303 are included is shown as the second voltage region 306. As will be described later, the second voltage region 306 can be set as a region including a binarization threshold TH for generating a good binarized image. Compared with the mode value of the pixel signal of the non-incident pixel 304, the pixel signals of the incident pixel 302 and the affected pixel 303 have high signal levels, so the first voltage region 305 and the second voltage region 306 do not overlap with each other. In other words, it can be said that the first voltage region 305 and the second voltage region 306 are separated from each other with the third voltage region 320 in between.

[0048] As described above, in order to perform appropriate counting, it is desirable to obtain a high-quality binary image for each frame. However, if the signal levels of the incident pixels 302 or the affected pixels 303 change for each frame due to the temporal variation of the background component, the magnitude relationship with respect to the binary threshold TH will deviate, which is inconvenient. On the other hand, in order to perform appropriate counting, imaging at a high frame rate and A / D conversion processing are desirable.

[0049] FIG. 3 is a graph illustrating the temporal change of the reference signal (ramp voltage) output by the reference signal generation circuit 310 in the present embodiment. The horizontal axis represents time, and the vertical axis represents voltage. The reference signal generation circuit 310 can operate corresponding to two modes: a high-speed A / D conversion mode and a high-tone A / D conversion mode.

[0050] The high-speed A / D conversion mode is a mode in which A / D conversion can be performed at a high frame rate of, for example, several tens of fps to 1500 fps, and is suitable for preprocessing for obtaining a binary image at high speed and performing so-called counting.

[0051] The high-tone A / D conversion mode is suitable for obtaining an image with a wide dynamic range and high tone resolution without requiring high speed, such as in still image shooting. The A / D converter 308 according to the present embodiment can selectively use the two modes of the high-tone A / D conversion mode and the high-speed A / D conversion mode according to the application, but may also be configured to be able to implement only the high-speed A / D conversion mode.

[0052] 501 and 502 indicate the ramp voltages output by the reference signal generation circuit 310 in the high-speed A / D conversion mode, and 503 indicates the ramp voltage output by the reference signal generation circuit 310 in the high-tone A / D conversion mode.

[0053] In the high-speed A / D conversion mode, during the period of CountII, the ramp voltage 501 sweeps the voltage range from VofsI-B to VofsII-A, and during the period of CountIII, the ramp voltage 502 sweeps the voltage range from VofsII-B to VofsIII-A. Here, "sweeps" means that it changes with time from one end to the other end of the voltage range, or scans the voltage range.

[0054] The voltage range from VofsI-B to VofsII-A corresponds to the first voltage region 305 in Fig. 4(b), and the voltage range from VofsII-B to VofsIII-A corresponds to the second voltage region 306. Also, the voltage range from VofsII-A to VofsII-B corresponds to the third voltage region 320. The voltage width of the third voltage region 320 can be made at least twice or more the voltage width corresponding to the quantization resolution in, for example, the first A / D conversion process using the ramp voltage 501 and the second A / D conversion process using the ramp voltage 502. If the voltage width of the third voltage region 320 is ensured to be large, it is possible to significantly shorten the processing time of the high-speed A / D conversion mode.

[0055] Also, in the high-tone A / D conversion mode, during the period of CountI, the ramp voltage 503 sweeps the voltage range from VofsI-A to VofsIII-B. The voltage range from VofsI-A to VofsIII-B corresponds to the dynamic range 307 of the pixel signal (analog) in Fig. 4(b).

[0056] As can be understood from the configuration of the A / D converter 308 (Fig. 2) and the ramp voltage waveform (Fig. 3), in the high-tone mode, the voltage range from VofsI-A to VofsIII-B corresponding to the dynamic range 307 of the pixel signal (analog) is swept. Therefore, it takes the period of CountI to A / D convert the pixel signals for one row in one frame.

[0057] On the other hand, in the high-speed A / D conversion mode, only the ramp voltage 501 corresponding to the first voltage region 305 and the ramp voltage 502 corresponding to the second voltage region 306 are input to the comparator. That is, for the first voltage region 305 that always includes the most frequent value of the background level even if there is a change over time, and the second voltage region 306 that includes the pixel signals of the incident pixel 302 and the affected pixel 303, multi-value A / D conversion processing is performed on each pixel signal. However, for the third voltage region existing between the first voltage region 305 and the second voltage region 306, multi-value A / D conversion processing is not performed on the pixel signal. Therefore, the time required to A / D convert the pixel signals for one row in one frame is CountII + CountIII, and the A / D conversion processing can be completed in a shorter time than in the high-tone A / D conversion mode.

[0058] As an example, in the case of a radiation detector that detects an electron beam, it is preferable that the scanning time of each ramp voltage per pixel row is about CountI = 12 μs, CountII = 6 μs, and CountIII = 3 μs.

[0059] In this embodiment, in the high-speed A / D conversion mode, the circuit is configured to sequentially perform A / D conversion processing on the first voltage region and the second voltage region using a single comparator 311. Therefore, it is possible to reduce the chip area and the cost of the chip.

[0060] According to the high-speed A / D conversion mode of this embodiment, the background level of the non-incident pixel 304 is acquired as a multi-value digital signal of the first voltage region 305. Also, the signal levels of the incident pixel 302 and the affected pixel 303 are acquired as multi-value digital signals of the second voltage region 305.

[0061] In the high-speed A / D conversion mode, DFE109 obtains the mode value of the background level (multi-valued digital signal) obtained from the non-incident pixels 304 of the frame using the ramp voltage 501, and calculates it as the background component in the frame. DFE109 can obtain a multi-valued pixel signal representing the net signal intensity by subtracting the calculated background component from the signal levels (multi-valued digital signals) of the incident pixels 302 and the affected pixels 303 obtained using the ramp voltage 502. DFE109 can generate a multi-valued pixel signal (data after correction) with the background level subtracted and output it outside the imaging device 101.

[0062] According to the high-speed A / D conversion mode of this embodiment, A / D conversion is performed faster than when performing the high-tone A / D conversion mode, and the background component at the time of imaging the imaging target can be easily obtained. Therefore, the radiation signal component from which the background component is excluded can be obtained at high speed as a multi-valued digital signal. As will be described later, using the multi-valued digital signal obtained in the high-speed A / D conversion mode, a high-quality binarized image suitable for counting can be obtained.

[0063] (Configuration of the radiation imaging system) With reference to FIG. 5, a radiation imaging system 913 incorporating the above-described radiation detector will be described. FIG. 5 is a schematic block diagram showing an example of the configuration of the radiation imaging system 913 of this embodiment. The radiation imaging system 913 according to this embodiment includes the radiation detector 100 shown in FIG. 1(a), a radiation source 914, an exposure control unit 915, and a computer 916.

[0064] The radiation source 914 starts radiation irradiation in accordance with a radiation start command from the exposure control unit 915. The radiation emitted from the radiation source 914 passes through the imaging target and directly or indirectly enters the imaging device 101 of the radiation detector 900. The radiation source 914 stops radiation emission in accordance with a stop command from the exposure control unit 915.

[0065] The radiation detector 100 includes a control unit 117 that controls the frame rate of imaging and the irradiation rate of radiation. Based on the signal output from the imaging device 101, the control unit 117 generates a stop signal for stopping the irradiation of radiation from the radiation source 914. The stop signal is transmitted to the exposure control unit 915, and the exposure control unit 915 sends a stop command to the radiation source 914 in response to the transmitted stop signal.

[0066] When the irradiation rate of the radiation emitted from the radiation source 914 is high, the probability that two or more radiations enter the same pixel within one frame period of the image increases. In that case, when acquiring a binary pixel signal, if the analog pixel signal is A / D converted and multi-valued and then binary-valued with a fixed threshold value, even for a pixel where two or more radiations have entered, it is counted as 1, so a counting loss may occur.

[0067] Therefore, as a desirable embodiment, the control unit 117 controls the frame rate of imaging and the irradiation rate of radiation so that the irradiation rate per pixel of radiation does not exceed, for example, 0.5 during one frame period (that is, does not exceed 0.5 / pix / frm).

[0068] Here, the unit [ / pix / frm] is the average value of the number of radiation particles or photons incident per frame and per pixel. In this embodiment, the irradiation rate of radiation is set to 0.5 / pix / frm or less. In other words, imaging is performed at a low irradiation rate such that the probability of radiation entering one pixel at a certain time is 1 / 2 or less. For example, the standard of the irradiation rate when using X-rays is 0.5 or less as the average value of the number of photons incident per frame and per pixel. The standard of the irradiation rate when using electron beams is 0.5 or less as the average value of the number of electrons incident per frame and per pixel. By imaging at such a low irradiation rate, a binary image that can reduce the counting loss during counting can be obtained.

[0069] The control unit 117 can be configured by, for example, a PLD (abbreviation for Programmable Logic Device) such as an FPGA (abbreviation for Field Programmable Gate Array), or an ASIC (abbreviation for Application Specific Integrated Circuit), or a general-purpose computer with a program incorporated therein, or a combination of all or part of these.

[0070] The computer 916 performs, for example, control of the radiation detector 100 and the irradiation control unit 915, receives radiation image data from the external interface unit 112, and performs processing for displaying it as a radiation image.

[0071] Note that the control unit 117 may be arranged separately from the radiation detector 100. For example, the computer 916 may have the function of the control unit 117. Further, the computer 916 may function as an input unit for a user to input conditions for imaging a radiation image.

[0072] As an example, the irradiation control unit 915 includes an irradiation switch. When the irradiation switch is turned on by the user, an irradiation command is sent from the irradiation switch to the radiation source 914, and a start notification indicating the start of radiation emission is sent to the computer 916. In response to the start notification, the computer 916 notifies the control unit 117 of the radiation detector 100 of the start of radiation irradiation. In response to this, the control unit 117 controls the imaging element 101 to generate a signal corresponding to the incident radiation.

[0073] (Signal processing method) Next, a procedure will be described in which the radiation imaging system 913 of the present embodiment acquires a multi-valued pixel signal in the high-speed A / D conversion mode and acquires and outputs a binarized image suitable for counting based on the multi-valued pixel signal. FIG. 6 is a flowchart showing the procedure of the setting process performed by the radiation imaging system 913 before implementing the high-speed A / D conversion mode, and FIG. 8 is a flowchart showing the procedure of the process of photographing an imaging target in the high-speed A / D conversion mode and acquiring a binarized image.

[0074] First, referring to FIG. 6, the procedure of the setting process performed before implementing the high-speed A / D conversion mode will be described. In step S101, the computer 916 issues an instruction to the control unit 117 to shift to the high-tone A / D conversion mode.

[0075] In step S102, the control unit 117 sets the reference signal generation circuit 310 so that the lamp voltage 503 (FIG. 3) can be output. The reference signal generation circuit 310 can be configured by, for example, a memory, a logic circuit, a D / A conversion circuit, etc., but the control unit 117 can store the waveform data of the lamp voltage 503 in the memory.

[0076] In step S103, imaging and pixel signal reading are performed. Specifically, the computer 916 transmits an instruction to image a radiation image to the exposure control unit 915 and the control unit 117 of the radiation detector 100. The exposure control unit 915 drives the radiation source 914 to irradiate the radiation necessary for imaging the radiation image. In synchronization with this, the control unit 117 of the radiation detector 100 issues a control signal for performing one-frame imaging on the imaging element 101.

[0077] In step S104, the pixel signals (analog) sequentially read out from the pixel array 102 in row units are subjected to A / D conversion processing in high-tone mode by the A / D converter 308 provided in the column circuit 106. The A / D conversion processing result is temporarily stored in the column memory 107. The multi-valued pixel signals stored in the column memory 107 are sent to the DFE 109 by the horizontal scanning circuit 108 and stored in the memory provided in the DFE 109. The image signals are sequentially read out in row units, and the A / D conversion processing results for one frame of the image are stored in the DFE 109.

[0078] In step S105, the DFE 109 extracts the background component in the frame using the multi-valued pixel signals for one frame. Although FIG. 7 exemplifies the histogram of the number of pixels for each signal level, the DFE 109 calculates, for example, the signal level of the most frequent value with the largest number of pixels as the background component.

[0079] In step S106, the DFE 109 subtracts the calculated background level from the multi-valued pixel signals for one frame. The multi-valued pixel signals for one frame from which the background level has been removed are sent to the output signal processing unit 110 and stored in the memory unit 111.

[0080] In step S107, the output signal processing unit 110 performs binarization processing on the multi-valued pixel signals for one frame from which the background level has been removed with the binarization threshold TH, and displays the binarized image on the display unit of the radiation imaging system 913. The user checks the binarized image while changing the binarization threshold TH, and adjusts the binarization threshold TH so as to obtain a binarized image suitable for counting.

[0081] In step S108, the output signal processing unit 110 stores the background component (the most frequent value) acquired by the DFE 109 in step S106 and the binarization threshold TH acquired in step S107 in the storage unit.

[0082] As described above, a background component (the most frequent value) corresponding to the captured image of one frame and a binarization threshold TH suitable for obtaining a binarized image suitable for counting are obtained. The radiation imaging system 913 performs similar processing on a plurality of captured images, and obtains and stores the background component (the most frequent value) and the binarization threshold TH corresponding to each captured image. For example, imaging is performed while changing the environmental temperature or the device temperature, or imaging is performed while changing the state of the imaging object, or imaging is performed in a state where the characteristics of the semiconductor element are deteriorated due to the total dose effect by continuously irradiating radiation, and the background component (the most frequent value) and the binarization threshold TH are obtained. Thus, when imaging is performed in different situations, the signal level of the background component (the most frequent value) and the binarization threshold TH vary over time according to the situation.

[0083] In step S109, the output signal processing unit 110 calculates the variation range of the signal level of the background component (the most frequent value) and the variation range of the binarization threshold TH. Then, the output signal processing unit 110 sets the first voltage region 305 shown in FIG. 4(b) so that the variation range of the signal level of the background component (the most frequent value) is included. In addition, the output signal processing unit 110 sets the second voltage region 306 so that the variation range of the binarization threshold TH is included. The output signal processing unit 110 sets the first voltage region 305 and the second voltage region 306 so that they do not overlap with each other and are separated with the third voltage region 320 in between. The output signal processing unit 110 stores the set result in the memory of the control unit 117. Thus, the setting process performed before implementing the high-speed A / D conversion mode is completed.

[0084] Next, with reference to the flowchart of FIG. 8, the procedure for imaging an imaging object in the high-speed A / D conversion mode and obtaining a binarized image will be described.

[0085] In step S401, the computer 916 issues an instruction to the control unit 117 to shift to the high-speed A / D conversion mode.

[0086] In step S402, the reference signal generation circuit 310 is set. The control unit 117 reads out the stored first voltage region 305 and second voltage region 306, and generates waveform data of the lamp voltage 501 and the lamp voltage 502 shown in FIG. 3. The reference signal generation circuit 310 can be composed of, for example, a memory, a logic circuit, a D / A conversion circuit, etc., but the generated waveform data can be stored in the memory of the reference signal generation circuit 310. Thereby, the reference signal generation circuit 310 is set so that it can output the lamp voltage 501 during the period of CountII and output the lamp voltage 502 during the period of CountIII shown in FIG. 3.

[0087] In step S403, when imaging is started, while radiation is being irradiated from the radiation source 914 of the radiation imaging system, charges are accumulated in each pixel 103 of the pixel array 102, and an analog pixel signal is read out from the pixel 103 of the pixel array 102.

[0088] In step S404, the pixel signals (analog) sequentially read out from the pixel array 102 row by row are subjected to A / D conversion processing in high-speed A / D conversion mode by the A / D converter 308 provided in the column circuit 106. The A / D conversion processing result is temporarily stored in the column memory 107. The multi-valued pixel signals stored in the column memory 107 are sent to the DFE 109 by the horizontal scanning circuit 108 and stored in the memory provided in the DFE 109. Image signals are sequentially read out row by row, and the A / D conversion processing results for one frame of image are stored in the DFE 109.

[0089] In step S405, the DFE 109 extracts the background component in the frame using the multi-valued pixel signals for one frame (background level acquisition step). FIG. 7 exemplifies the histogram of the number of pixels for each signal level. The DFE 109 calculates, for example, the signal level of the most frequent value with the largest number of pixels as the background component.

[0090] In step S406, the DFE 109 subtracts the calculated background component (background level) from the multi-valued pixel signal for one frame. The multi-valued pixel signal for one frame from which the background component has been removed is transmitted to the output signal processing unit 110 and stored in the memory unit 111.

[0091] In step S407, the output signal processing unit 110 performs binarization processing on the multi-valued pixel signal for one frame from which the background component (background level) has been removed using the binarization threshold TH to obtain a binarized image. The data of the obtained binarized image can be stored in the memory unit 111. Note that as the binarization threshold TH, the value obtained by the process described with reference to FIG. 6 may be used. For example, in the process of FIG. 6, a table associating the background level (mode value) and the binarization threshold previously obtained from a plurality of captured images is created and stored in the output signal processing unit 110. The output signal processing unit 110 can refer to the background level in the current captured image calculated by the DFE 109 in step S405 and the table to determine (correct) the binarization threshold TH suitable for the current captured image.

[0092] In step S408, the data of the obtained binarized image can be output to the computer 916 or another external device (not shown) via the external interface unit 112. The radiation imaging system 913 can display the binarized image on a display device (not shown). By outputting the captured multi-valued image data not as it is but as binarized image data suitable for counting, it is possible to reduce the number of output ports and the clock rate of data communication. Furthermore, it is also possible to reduce the data processing load on the external processing device. Therefore, cost reduction of the entire system can be achieved.

[0093] In the above description, the DFE 109 performs the calculation and removal processes of the background component, and the output signal processing unit 110 executes the binarization process. However, the present embodiment is not limited to this. For example, some or all of the above processes may be performed by the DFE 109, or may be performed by the control unit 117, or may be performed by the output signal processing unit 110, or may be performed by the computer 916, or may be performed by an external processing device. Further, a control program for causing a processing device such as a computer to execute some or all of the above processes, and a computer-readable storage medium storing the control program are also included in the embodiments of the present invention.

[0094] For example, if all the processes are performed by the DFE 109, a function for calculating, removing, and binarizing the background component can be implemented on the imaging device 101 on-chip, that is, on the same substrate as the pixel array 102, the column circuit 106, etc. Thereby, the subsequent processing after the output signal processing unit 110 can be simplified. Further, miniaturization and cost reduction of the system are possible.

[0095] [Embodiment 2] A radiation detector, a radiation imaging system, etc. according to Embodiment 2 will be described. Regarding matters common to Embodiment 1, the description will be simplified or omitted. The radiation detector according to the present embodiment is also the same as in Embodiment 1 in that it can operate in the high-speed A / D conversion mode. In the present embodiment, the waveform of the reference signal when operating in the high-speed A / D conversion mode is different from that in Embodiment 1. FIG. 9 shows an example of the waveform of the reference signal according to the present embodiment, and FIG. 10 shows an example of the configuration of the A / D converter 608 according to the present embodiment.

[0096] FIG. 10 is a diagram showing a configuration example of the A / D converter 608 included in the column circuit 106. The A / D converter 608 includes a reference signal generation circuit 610-1, a reference signal generation circuit 610-2, a comparator 611-1, a comparator 611-2, a counter 612-1, a counter 612-2, a digital memory 613-1, and a digital memory 613-2.

[0097] The reference signal generation circuits 610-1 and 610-2 as reference signal generation units generate reference signals for use in A / D conversion. The reference signal generation circuit 610-1 outputs the first ramp voltage 603 shown in FIG. 9 to the comparator 611-1, and the reference signal generation circuit 610-2 outputs the second ramp voltage 604 to the comparator 611-2.

[0098] The vertical signal line 105 is connected to the comparator 611-1 and the comparator 611-2, and each comparator compares the pixel signal input from the vertical signal line 105 with the reference signal. When the level of the reference signal is lower than the level of the pixel signal, each comparator outputs a signal of H level, and when the level of the reference signal is higher than the level of the pixel signal, each comparator outputs a signal of L level.

[0099] The counter 612-1 starts a counting operation in synchronization with the timing at which the change in the signal level of the reference signal supplied from the reference signal generation circuit 610-1 to the comparator 611-1 starts, and outputs a count signal to the digital memory 613-1. The digital memory 613-1 holds the signal input from the counter 612-1 when the output of the comparator 611-1 changes from H level to L level.

[0100] The counter 612-2 starts a counting operation in synchronization with the timing at which the change in the signal level of the reference signal supplied from the reference signal generation circuit 610-2 to the comparator 611-2 starts, and outputs a count signal to the digital memory 613-2. The digital memory 613-2 holds the signal input from the counter 612-2 when the output of the comparator 611-2 changes from H level to L level.

[0101] As will be described with reference to FIG. 9, the ramp voltage 603 output from the reference signal generation circuit 610-1 and the ramp voltage 604 output from the reference signal generation circuit 610-2 start sweeping simultaneously with different voltages as the starting points. Therefore, in accordance with the voltage difference between the ramp voltage 603 and the ramp voltage 604, the output value of the counter 612-2 may be configured to be a value obtained by adding a bias value to the output value of the counter 612-1. However, if there is no influence on the result of the binarization process described later, it is also possible not to add the bias value. In that case, the output of one counter may be supplied to both the digital memory 613-1 and the digital memory 613-2.

[0102] FIG. 9 is a graph illustrating the time change of the ramp signal (ramp voltage) output from the reference signal generation circuit in the present embodiment. The horizontal axis represents time, and the vertical axis represents voltage. The reference signal generation circuit can operate corresponding to two modes: a high-speed A / D conversion mode and a high-tone A / D conversion mode.

[0103] The high-speed A / D conversion mode is a mode capable of performing A / D conversion at a high frame rate of, for example, several tens of fps to 1500 fps, and is suitable for quickly acquiring a binarized image and performing so-called counting. The high-tone A / D conversion mode is suitable for acquiring an image with a wide dynamic range and high tone resolution without requiring high speed, such as in still image shooting. The A / D converter 608 according to the present embodiment can selectively use the two modes of the high-tone A / D conversion mode and the high-speed A / D conversion mode according to the application, but may also be configured to implement only the high-speed A / D conversion mode.

[0104] In the high-speed A / D conversion mode, the reference signal generation circuit 610-1 outputs the ramp voltage 603, and the reference signal generation circuit 610-2 outputs the ramp voltage 604. In the high-tone A / D conversion mode, the reference signal generation circuit 610-1 or the reference signal generation circuit 610-1 outputs the ramp voltage 605.

[0105] In the high-speed A / D conversion mode, during the period of CountII, the ramp voltage 603 sweeps through the voltage range from VofsI-B to VofsII-A, and the ramp voltage 604 sweeps through the voltage range from VofsII-B to VofsIII-A. Here, "sweeps through" means that it changes with time from one end to the other end of the said voltage range, or scans the said voltage range.

[0106] The voltage range from VofsI-B to VofsII-A corresponds to the first voltage region 305 in Fig. 4(b), and the voltage range from VofsII-B to VofsIII-A corresponds to the second voltage region 306. Also, the voltage range from VofsII-A to VofsII-B corresponds to the third voltage region 320.

[0107] Also, in the high-tone A / D conversion mode, during the period of CountI, the ramp voltage 605 sweeps through the voltage range from VofsI-A to VofsIII-B. The voltage range from VofsI-A to VofsIII-B corresponds to the dynamic range 307 of the pixel signal (analog) in Fig. 4(b).

[0108] As can be understood from the configuration of the A / D converter 608 (Fig. 10) and the ramp voltage waveform (Fig. 9), in the high-tone mode, the ramp voltage sweeps through the voltage range from VofsI-A to VofsIII-B corresponding to the dynamic range 307 of the pixel signal (analog). Therefore, it takes the period of CountI to A / D convert the pixel signals for one row in one frame.

[0109] On the other hand, in the high-speed A / D conversion mode, the ramp voltage 603 corresponding to the first voltage region 305 and the ramp voltage 604 corresponding to the second voltage region 306 are input to the comparator 611-1 and the comparator 611-2 in parallel. That is, for the first voltage region 305 that always includes the most frequent value of the background level even if there is a change over time, and the second voltage region 306 that includes the pixel signals of the incident pixel 302 and the affected pixel 303, multi-value A / D conversion processing is performed in parallel for each pixel signal. However, for the third voltage region between the first voltage region 305 and the second voltage region 306, multi-value A / D conversion processing is not performed for each pixel signal. Therefore, the time required to A / D convert the pixel signals for one row in one frame is CountII, and the A / D conversion processing can be performed in a shorter time than in the high-tone A / D conversion mode.

[0110] As an example, in the case of a radiation detector that detects electron beams, it is preferable that the scanning time of each ramp voltage per pixel row is about CountI = 12 μs and CountII = 6 μs.

[0111] The configuration and signal processing method of the radiation imaging system are common in many points to those of the first embodiment, so the description thereof is omitted. In this embodiment, the A / D conversion result for the first voltage region 305 is stored in the digital memory 613-1, and the A / D conversion result for the second voltage region 306 is stored in the digital memory 613-2. Therefore, when calculating the background level, the DFE 109 only needs to extract the most frequent value of the multi-value pixel signals stored in the digital memory 613-1.

[0112] Similar to Embodiment 1, according to the high-speed A / D conversion mode of this embodiment, A / D conversion is performed faster than when performing high-tone A / D conversion, and the background component at the time of imaging the imaging target can be easily obtained. Therefore, the radiation signal component from which the background component is excluded can be obtained as a multi-valued digital signal at high speed. Also, similar to Embodiment 1, a high-quality binary image suitable for counting can be obtained using the multi-valued digital signal obtained in the high-speed A / D conversion mode.

[0113] [Embodiment 3] The radiation detector, radiation imaging system, etc. according to Embodiment 3 will be described. Regarding matters common to Embodiment 1 or Embodiment 2, the description will be simplified or omitted. The radiation detector according to this embodiment is also the same as Embodiments 1 and 2 in that it can operate in a high-speed A / D conversion mode capable of performing A / D conversion processing at high speed. In this embodiment, in the A / D conversion process, the reference signal shown in FIG. 3 is used in the same manner as in Embodiment 1, but the processing method for binarizing and outputting the multi-valued pixel signal is different from that in Embodiment 1.

[0114] FIG. 11 is a flowchart showing the procedure of the process performed by the radiation detector of this embodiment. Steps S701 to S705 are the same processes as steps S401 to S405 described in Embodiment 1 (FIG. 8).

[0115] In this embodiment, in step S706, the binary threshold TH is calculated using the background component extracted in step S705 (background level acquisition step). Steps S707 to S708 are the same processes as steps S407 to S408 described in Embodiment 1 (FIG. 8).

[0116] In this embodiment, after executing step S708, it is determined in step S709 whether to end the high-speed A / D conversion mode. If not ended (step S709: NO), the process returns to step S703, and steps S703 to S708 are repeatedly executed. Thereby, for example, even if the cumulative radiation dose increases and the background component fluctuates during continuous imaging of a moving image, the binarization threshold TH corresponding thereto can be set. That is, in this embodiment, even when the background level fluctuates, by shifting the binarization threshold TH according to the amount of change, a binarized pixel signal following the fluctuation of the background level can be output. Instead of shifting the binarization threshold TH in step 706, the lamp voltage 501 and the lamp voltage 502 may be shifted in the next frame by an amount corresponding to the amount of change.

[0117] Similar to Embodiment 1, according to the high-speed A / D conversion mode of this embodiment, A / D conversion is performed faster than when performing the high-tone A / D conversion mode, and the background component at the time of imaging the imaging target can be easily obtained. Therefore, the radiation signal component from which the background component is excluded can be obtained as a multi-valued digital signal at high speed. Also, similar to Embodiment 1, using the multi-valued digital signal obtained in the high-speed A / D conversion mode, a high-quality binarized image suitable for counting can be obtained.

[0118] [Embodiment 4] The radiation detector, radiation imaging system, etc. according to Embodiment 4 will be described. Regarding matters common to any of the embodiments already described, the description will be simplified or omitted. The radiation detector according to this embodiment is also the same as other embodiments in that it can operate in a high-speed A / D conversion mode capable of performing high-speed A / D conversion processing. In other embodiments, when extracting the background component, the most frequent value of the signal levels in the first voltage region was extracted for all the pixels in one frame and treated as the background component of all the pixels in that frame. In this embodiment, the background component for a certain pixel is extracted based on the pixel signals of the surrounding pixels.

[0119] Figures 12(a) to 12(c) are diagrams showing the arithmetic filter used in the processing method of this embodiment. Figure 12(a) is a diagram showing the filter region of the arithmetic filter. Figure 12(b) is a diagram showing an example of histogramming the values of each pixel signal in the region to which the arithmetic filter is applied.

[0120] In other embodiments, the background component corresponding to the entire screen of one frame is calculated. However, in this embodiment, the background component is calculated for each pixel to obtain a local background component.

[0121] Specifically, for the target pixel 801 (the pixel of interest) for which the background value is to be calculated, a range 802 of a plurality of pixels centered on the target pixel 801 is set to the size of the arithmetic filter. The median or the mode value calculated from the values of each pixel signal in the filter region of this arithmetic filter is set as the background component 805 of the target pixel 801.

[0122] As shown in Figure 12(b), when the values of the pixel signals in the filter region are histogrammed, the pixel signal 803 of the pixel irradiated with radiation and the pixel signal 804 of the pixel not irradiated with radiation are distributed separately in two regions. As described in Embodiment 1, when imaging is performed at a low irradiation rate where the irradiation rate per pixel of radiation does not exceed, for example, 0.5 during one frame period, usually, the number of pixels not irradiated with radiation is larger than the number of pixels irradiated with radiation. Therefore, the median or the mode value of the multi-valued pixel signal 803 and the pixel signal 804 can be set as the background component 805.

[0123] Along the sweeping direction 806 indicated by the arrow in Figure 12(c), the target pixels are successively changed on the pixel array 102 to sweep the arithmetic filter two-dimensionally, and the background component is calculated for each pixel by the method described above. The sweeping direction may be either the column or the row first, but it is preferably set in accordance with the ease of compatibility with the processing circuit.

[0124] In the example of FIG. 12(a), the size of the arithmetic filter is 5×5 pixels, but it is not limited to this example. The filter size may be 3 pixels or more, and may be appropriately determined according to the function of the DFE109. For example, if the processing function in the DFE109 is in units of one line, the filter size may be 1×n (n is 3 or more and less than the number of pixels in one line). Alternatively, if processing of multiple lines is possible, the filter size may be m×n with the above-mentioned 5×5 rectangular area as an example.

[0125] The filter size is set in consideration of the spatial frequency of the main element that generates the non-uniformity of the background component. Generally, if the filter size is reduced, it becomes easier to extract local unevenness and shading components included in the background component. On the other hand, when the filter size is larger, the possibility that the value calculated as the background component deviates greatly from the actual background component is reduced.

[0126] When the filter size increases, a circuit block having a memory function such as a line memory or a frame memory may be separately provided inside or outside the imaging device to perform the above operation. A line memory refers to a memory that can store pixel signals corresponding to one line of pixels. A frame memory refers to a memory that can store pixel signals for one frame (pixel signals of the number of pixels in the pixel array 102). When processing is performed inside the imaging device, the simultaneity of shooting and display is improved. Furthermore, since processing can be performed without increasing the number of components, miniaturization and cost reduction of the system are possible.

[0127] Regarding the A / D conversion process, any one of the high-speed A / D conversion modes of Embodiments 1 to 3 is implemented. Also in this embodiment, the background component and the pixel signal component can be obtained using a plurality of pixel signals in the same frame. Similar to Embodiments 1 to 3, according to the high-speed A / D conversion mode of this embodiment, A / D conversion can be performed faster than when performing the high-bit A / D conversion mode, and the background component at the time of imaging the imaging target can be easily obtained. Therefore, the radiation signal component from which the background component is excluded can be obtained as a multi-valued digital signal at high speed. Also, similar to Embodiment 1, a high-quality binary image suitable for counting can be obtained using the multi-valued digital signal obtained in the high-speed A / D conversion mode.

[0128] [Embodiment 5] As Embodiment 5, another example of a radiation imaging system in which a radiation detector is incorporated will be described with reference to FIGS. 13(a) and 13(b).

[0129] FIG. 13(a) shows an apparatus EQP as a radiation imaging system including a radiation detector 100. The radiation detector 100 includes, in addition to an imaging element 101 which is a semiconductor device, a package PKG for mounting the imaging element 101.

[0130] The package PKG may include a base on which the imaging element 101 is fixed, a lid such as glass facing the imaging element 101, and connection members such as bonding wires and bumps for connecting the terminals provided on the base and the terminals provided on the imaging element 101. The imaging element 101 has a pixel array 102 in which pixels 103 are arranged in a matrix and a peripheral region around it. Peripheral circuits (for example, a vertical scanning circuit 104 and a DFE 109) can be provided in the peripheral region.

[0131] The equipment EQP may further include at least one of an optical system OPT, a control device CTRL, a processing device PRCS, a display device DSPL, a memory device MMRY, and a mechanical device MCHN. The optical system OPT forms an image of radiation on the radiation detector 100 and is, for example, a lens, a shutter, or a mirror. The optical system OPT may form an image of a particle beam such as an electron beam or a proton beam on the radiation detector 100 according to the type of radiation to be handled. The control device CTRL controls the radiation detector 100 and is, for example, an ASIC. The processing device PRCS processes the signal output from the radiation detector 100 and is a device such as a CPU or an ASIC for constituting an AFE (analog front end) or a DFE (digital front end). The display device DSPL is an EL display device or a liquid crystal display device that displays the information obtained by the radiation detector 100 in the form of a visible image or the like. The memory device MMRY is a magnetic device or a semiconductor device that stores the information obtained by the radiation detector 100. The memory device MMRY is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive. The mechanical device MCHN has a movable part or a propulsion part such as a motor or an engine.

[0132] The equipment EQP displays the signal output from the radiation detector 100 on the display device DSPL or transmits it externally by a communication device (not shown) provided in the equipment EQP. For this purpose, it is preferable that the equipment EQP further includes a memory device MMRY and a processing device PRCS separately from the memory circuit and the arithmetic circuit of the radiation detector 100. The mechanical device MCHN may be controlled based on the signal output from the radiation detector 100. The equipment EQP shown in FIG. 13(a) may be a medical device such as an endoscope or a radiation diagnostic device, a measuring device such as a distance measuring sensor, or an analytical device such as an electron microscope.

[0133] FIG. 13(b) is a schematic diagram showing the configuration of a transmission electron microscope (TEM) as an example of the device EQP. The device EQP as an electron microscope includes an electron beam source 1202 (electron gun), an irradiation lens 1204, a vacuum chamber 1201 (column), an objective lens 1206, a magnifying lens system 1207, and a camera 1209 as a radiation detector 100.

[0134] The electron beam 1203, which is an energy beam emitted from the electron beam source 1202, is focused by the irradiation lens 1204 and irradiated onto the sample S as an analysis target, which is held by the sample holder. The space through which the electron beam 1203 passes is formed by the vacuum chamber 1201 (column), and this space is maintained in a vacuum. The radiation detector 100 is arranged so as to face the vacuum space through which the electron beam 1203 passes. The electron beam 1203 that has passed through the sample S is magnified by the objective lens 1206 and the magnifying lens system 1207 and projected onto the radiation detector 100. The electron optical system for irradiating the sample S with an electron beam is called an irradiation optical system, and the electron optical system for forming an image of the electron beam that has passed through the sample S on the radiation detector 100 is called an imaging optical system.

[0135] The electron beam source 1202 is controlled by an electron beam source control device 1211. The irradiation lens 1204 is controlled by an irradiation lens control device 1212. The objective lens 1206 is controlled by an objective lens control device 1213. The magnifying lens system 1207 is controlled by a magnifying lens system control device 1214. The control mechanism 1205 of the sample holder is controlled by a holder control device 1215 that controls the drive mechanism of the sample holder.

[0136] The electron beam 1203 that has passed through the sample S is detected by the direct detector 1200 of the camera 1209. The output signal from the direct detector 1200 is processed by a signal processing device 1216 and an image processing device 1218 as a processing device PRCS, and an image signal is generated. The generated image signal (transmission electron image) is displayed on an image display monitor 1220 and an analysis monitor 1221 corresponding to the display device DSPL.

[0137] Camera 1209 is provided below the equipment EQP. Camera 1209 has a direct detector 1200 (Direct Electron Detector). The direct detector 1200 corresponds to the imaging device 101. At least a part of Camera 1209 is provided inside Camera 1209 so as to be exposed to the vacuum space formed by the vacuum chamber 1201.

[0138] Each of the electron beam source control device 1211, the irradiation lens control device 1212, the objective lens control device 1213, the magnifying lens system control device 1214, and the holder control device 1215 is connected to the image processing device 1218. Thereby, data can be exchanged with each other in order to set the imaging conditions of the electron microscope. For example, the irradiation rate of the electron beam can be set to be 0.5 electron / pix / frm or less. In this case, the electron beam source control device 1211 and the image processing device 1218 function as control means for controlling the irradiation rate of the radiation. The driving control of the sample holder and the setting of the observation conditions of each lens can be performed according to the signal from the image processing device 1218.

[0139] The operator prepares the sample S to be imaged and sets the imaging conditions using the input device 1219 connected to the image processing device 1218. Predetermined data is input to the electron beam source control device 1211, the irradiation lens control device 1212, the objective lens control device 1213, and the magnifying lens system control device 1214, respectively, so as to obtain a desired acceleration voltage, magnification, and observation mode. In addition, the operator inputs conditions such as the number of consecutive field images, the imaging start position, and the moving speed of the sample holder to the image processing device 1218 using the input device 1219 such as a mouse, keyboard, or touch panel. It may also be a specification that the image processing device 1218 automatically sets the conditions regardless of the operator's input. The radiation imaging system described in the above Embodiment 5 is merely an example, and the radiation detectors described in Embodiments 1 to 4 may be applied to other systems.

[0140] In addition, in the above-described embodiments, an example in which a method for obtaining the background component of a pixel signal simultaneously with imaging is applied to a radiation detector or a radiation imaging system has been described. However, the present invention is not limited to this. For example, the methods described in each embodiment may be applied to a detector using a SPAD (single photon avalanche diode) and an imaging system including the same. As a result, it is possible to obtain a background component that is simultaneous with imaging and remove the background component from the image data.

[0141] [Other Embodiments] Note that the present invention is not limited to the embodiments described above, and many modifications are possible within the technical idea of the present invention. For example, it is possible to implement by combining all or part of the different embodiments described above.

[0142] To calculate the background component, the pixel signals of all the pixels in one frame image may be used, the pixel signals for one row may be used, or the pixel signals of the pixels around a specific pixel may be used. In that case, the waveform of the reference voltage used in the high-speed A / D conversion mode may be in the mode of FIG. 3 or the mode of FIG. 9.

[0143] As a method for calculating the background component, in addition to the method of extracting the mode value of the histogram, the median value or the average value may be calculated. As a method for calculating the median value, a known algorithm can be used. For example, when calculating the median value of the pixel signals for each row, the pixel signals for each row may be sorted in descending order by quicksort or the like, and then the value at the middle rank may be selected from the sorted array. Alternatively, a fast algorithm known as the median of medians (quickselect) may be applied.

[0144] The calculation of the background component may be performed based only on the pixel signals included in the first voltage region 305, or may be performed using both the pixel signals included in the first voltage region 305 and the pixel signals included in the second voltage region 306.

[0145] The imaging element 101 may be configured to be able to perform only the high-speed A / D conversion mode, or may be configured to be able to perform both the high-speed A / D conversion mode and the high-tone A / D conversion mode. Further, it may be configured to be able to perform another A / D conversion mode and the high-speed A / D conversion mode.

[0146] In addition to the Slope type, the A / D converter can also adopt the successive comparison type.

[0147] The reference signal generated by the reference signal generation circuit does not necessarily have to be a waveform that continuously changes with respect to time, and may be a signal that changes stepwise. Also, the change in the signal level does not necessarily have to be linear with respect to time, and may be curvilinear with respect to time. In the examples of FIGS. 3 and 9, each ramp voltage that scans the first voltage region and the second voltage region was a voltage signal having substantially the same slope of voltage change with respect to time, but may be a voltage signal having a different slope of voltage change with respect to time.

[0148] The first voltage region 305 and the second voltage region 306 do not necessarily have to be A / D converted with the same quantization resolution. If the slopes of the ramp voltage that sweeps the first voltage region 305 and the ramp voltage that sweeps the second voltage region 306 are made equal and the clock rate of the counter is made constant, the first voltage region 305 and the second voltage region 306 can be A / D converted with the same quantization resolution. On the other hand, in the first voltage region 305 and the second voltage region 306, if the slope of the ramp voltage or the clock rate of the counter is made different, A / D conversion can be performed with different quantization resolutions.

[0149] The conversion element included in the pixel of the radiation detector may be a conversion element formed on a semiconductor substrate such as silicon, or may be a conversion element formed of cadmium telluride or cadmium zinc telluride.

[0150] The present invention can also be implemented by supplying a program that realizes one or more functions of the above-described embodiments to a system or apparatus via a network or a storage medium, and causing one or more processors in a computer of the system or apparatus to read and execute the program. It can also be implemented by a circuit (for example, an ASIC) that realizes one or more functions.

[0151] This specification discloses at least the following matters. [Item 1] A plurality of pixels that detect radiation and output a voltage signal, a first A / D conversion process that compares the voltage signal with a first reference signal and converts it into a digital signal having three or more values, and a second A / D conversion process that compares the voltage signal with a second reference signal and converts it into a digital signal having three or more values, and an A / D converter that executes the processes, a signal processing unit, The first reference signal is a signal that changes temporally in a first voltage region that includes the most frequent value of the voltage signal output by a pixel that is not receiving radiation, The second reference signal is a signal that changes temporally in a second voltage region that includes the voltage signal output by a pixel that has received radiation and does not overlap with the first voltage region, There is a third voltage region between the first voltage region and the second voltage region where A / D conversion processing is not performed, A radiation detector characterized by the above. [Item 2] The voltage width of the third voltage region is at least twice or more the voltage width corresponding to the quantization resolution in the first A / D conversion process and the second A / D conversion process, The radiation detector according to Item 1, characterized by the above. [Item 3] The A / D converter includes a reference signal generator that outputs the first reference signal and the second reference signal at different timings, and a comparator, The comparator compares the voltage signal with the output of the reference signal generator, The radiation detector according to Item 1 or 2, characterized by the above. [Item 4] The A / D converter includes a first comparator and a second comparator, The first comparator compares the voltage signal with the first reference signal, The second comparator compares the voltage signal with the second reference signal. The radiation detector according to Item 1 or 2, characterized in that. [Item 5] The timing at which the first reference signal is input to the first comparator and the timing at which the second reference signal is input to the second comparator overlap in time. The radiation detector according to Item 4, characterized in that. [Item 6] The first reference signal and the second reference signal are voltage signals having substantially equal slopes of voltage change with respect to time. The radiation detector according to any one of Items 1 to 5, characterized in that. [Item 7] The first reference signal and the second reference signal are voltage signals having different slopes of voltage change with respect to time. The radiation detector according to any one of Items 1 to 5, characterized in that. [Item 8] The A / D converter executes a third A / D conversion process of comparing the voltage signal with a third reference signal that spans the first voltage region, the third voltage region, and the second voltage region and changes over time, and converting the voltage signal into a digital signal having three or more values. The radiation detector according to any one of Items 1 to 7, characterized in that. [Item 9] The signal processing unit Based on the result of the first A / D conversion process for the voltage signals of the plurality of pixels in one frame, obtains the background level included in the voltage signal, Using the background level and the result of the second A / D conversion process for the voltage signals of the plurality of pixels in one frame, binarizes the output of each of the plurality of pixels. The radiation detector according to any one of Items 1 to 8, characterized in that. [Item 10] The signal processing unit acquires, as the background level, any one of the mode value, median value, and average value of the digital signal that is the result of the first A / D conversion process. The radiation detector according to Item 9, characterized in that. [Item 11] The signal processing unit subtracts the background level from the digital signal that is the result of the second A / D conversion process, and compares the result with a predetermined threshold value, thereby binarizing the output of each of the plurality of pixels. The radiation detector according to Item 9 or 10, characterized in that. [Item 12] The signal processing unit acquires a threshold value for binarizing the output of each of the plurality of pixels based on the background level. The radiation detector according to Item 9 or 10, characterized in that. [Item 13] The signal processing unit acquires the background level for one frame by using the result of the first A / D conversion process for the voltage signals of all the pixels in the one frame. The radiation detector according to any one of Items 9 to 12, characterized in that. [Item 14] The signal processing unit acquires the background level for the pixels in one row by using the result of the first A / D conversion process for the voltage signals of the pixels in one row of the one frame. The radiation detector according to any one of Items 9 to 12, characterized in that. [Item 15] The signal processing unit acquires the background level for a specific pixel by using the result of the first A / D conversion process for the voltage signals of the pixels around the specific pixel in the one frame. The radiation detector according to any one of Items 9 to 12, characterized in that. [Item 16] The radiation detector according to any one of Items 1 to 15, and A radiation imaging system comprising a radiation source that irradiates an object to be imaged. A radiation imaging system characterized by the above. [Item 17] The radiation source controls the radiation irradiation rate such that the average value of the number of photons or particles of radiation incident per frame and per pixel is 0.5 or less. The radiation imaging system according to Item 16, characterized by the above. [Item 18] A readout step in which a readout circuit reads out the voltage signal from a plurality of pixels that detect radiation and output a voltage signal, A first A / D conversion step in which an A / D converter compares the voltage signal with a first reference signal and converts it into a digital signal with three or more values, The A / D converter includes a second A / D conversion step in which the voltage signal is compared with a second reference signal and converted into a digital signal with three or more values. The first reference signal is a signal that changes temporally in a first voltage region that includes the most frequent value of the voltage signal output by pixels that are not receiving radiation. The second reference signal is a signal that changes temporally in a second voltage region that includes the voltage signal output by pixels that have received radiation and does not overlap with the first voltage region. There is a third voltage region between the first voltage region and the second voltage region where the A / D converter does not perform A / D conversion processing. A radiation detection method characterized by the above. [Item 19] A background level acquisition step in which a signal processing unit acquires the background level included in the voltage signal based on the result of the first A / D conversion step for the voltage signal of one frame read out by the readout circuit, A binarization step in which the signal processing unit binarizes the output of each of the plurality of pixels using the acquired background level and the result of the second A / D conversion step in the one frame is further provided. The radiation detection method according to Item 18, characterized by the above. [Item 20] A storage medium storing a program for causing a computer to execute each step of the radiation detection method described in item 19.

Explanation of symbols

[0152] 100 ··· Radiation detector / 101 ··· Imaging element / 102 ··· Pixel array / 103 ··· Pixel / 104 ··· Vertical scanning circuit / 105 ··· Vertical signal line / 106 ··· Column circuit / 107 ··· Column memory / 108 ··· Horizontal scanning circuit / 109 ··· DFE / 110 ··· Output signal processing unit / 111 ··· Memory unit / 112 ··· External interface unit / 117 ··· Control unit / 301 ··· Radiation / 302 ··· Incident pixel / 303 ··· Affected pixel / 304 ··· Non-incident pixel / 305 ··· First voltage region / 306 ··· Second voltage region / 307 ··· Dynamic range / 308 ··· A / D converter / 309 ··· Analog memory / 310 ··· Reference signal generation circuit / 311 ··· Comparator / 312 ··· Counter / 313 ··· Digital memory / 320 ··· Third voltage region / 501 ··· Lamp voltage / 502 ··· Lamp voltage / 503 ··· Lamp voltage / 608 ··· A / D converter / 610-1, 610-2 ··· Reference signal generation circuit / 611-1, 611-2 ··· Comparator / 612-1, 612-2 ··· Counter / 613-1, 613-2 ··· Digital memory / 801 ··· Target pixel / 802 ··· Range of a plurality of pixels / 803 ··· Pixel signal / 804 ··· Pixel signal / 805 ··· Background component / 806 ··· Scanning direction / 913 ··· / 914 ··· Radiation source / 915 ··· Exposure control unit / 916 ··· Computer

Claims

1. A plurality of pixels that detect radiation and output a voltage signal, a first A / D conversion process that compares the voltage signal with a first reference signal and converts it into a digital signal with three or more values, and a second A / D conversion process that compares the voltage signal with a second reference signal and converts it into a digital signal with three or more values, and an A / D converter that executes the processes, a signal processing unit, wherein the first reference signal is a signal that temporally changes in a first voltage region that includes the most frequent value of the voltage signal output by pixels that are not receiving radiation, the second reference signal is a signal that temporally changes in a second voltage region that includes the voltage signal output by pixels that have received radiation and does not overlap with the first voltage region, a third voltage region where no A / D conversion process is performed exists between the first voltage region and the second voltage region, a radiation detector characterized by the above.

2. The voltage width of the third voltage region is at least twice or more the voltage width corresponding to the quantization resolution in the first A / D conversion process and the second A / D conversion process. The radiation detector according to claim 1, characterized by the above.

3. The A / D converter includes a reference signal generator that outputs the first reference signal and the second reference signal at different timings, and a comparator, wherein the comparator compares the voltage signal with the output of the reference signal generator. The radiation detector according to claim 1, characterized by the above.

4. The A / D converter includes a first comparator and a second comparator, wherein the first comparator compares the voltage signal with the first reference signal, and the second comparator compares the voltage signal with the second reference signal. The radiation detector according to claim 1, characterized by the above.

5. The timing at which the first reference signal is input to the first comparator and the timing at which the second reference signal is input to the second comparator overlap temporally. The radiation detector according to claim 4, characterized by the above.

6. The first reference signal and the second reference signal are voltage signals having substantially equal slopes of voltage change with respect to time. The radiation detector according to claim 1, characterized by the above.

7. The first reference signal and the second reference signal are voltage signals having different slopes of voltage change with respect to time. The radiation detector according to claim 1, characterized by the above.

8. The A / D converter executes a third A / D conversion process of comparing a third reference signal that temporally changes across the first voltage region, the third voltage region, and the second voltage region with the voltage signal and converting the voltage signal into a digital signal having three or more values. The radiation detector according to claim 1, characterized in that.

9. The signal processing unit acquires a background level included in the voltage signal based on a result of the first A / D conversion process for the voltage signals of the plurality of pixels in one frame, and binarizes outputs of each of the plurality of pixels using the background level and a result of the second A / D conversion process for the voltage signals of the plurality of pixels in one frame. The radiation detector according to any one of claims 1 to 8, characterized in that.

10. The signal processing unit acquires, as the background level, any one of a mode value, a median value, and an average value of a digital signal that is a result of the first A / D conversion process. The radiation detector according to claim 9, characterized in that.

11. The signal processing unit subtracts the background level from a digital signal that is a result of the second A / D conversion process and compares the result with a predetermined threshold value, thereby binarizing outputs of each of the plurality of pixels. The radiation detector according to claim 9, characterized in that.

12. The signal processing unit acquires a threshold value for binarizing outputs of each of the plurality of pixels based on the background level. The radiation detector according to claim 9, characterized in that.

13. The signal processing unit acquires the background level for one frame using a result of the first A / D conversion process for the voltage signals of all the pixels in the one frame. The radiation detector according to claim 9, characterized in that.

14. The signal processing unit acquires the background level for the pixels in one row using a result of the first A / D conversion process for the voltage signals of the pixels in one row of the one frame. The radiation detector according to claim 9, characterized in that.

15. The signal processing unit acquires the background level for a specific pixel using a result of the first A / D conversion process for the voltage signals of pixels around the specific pixel in the one frame. The radiation detector according to claim 9, characterized in that.

16. A radiation imaging system comprising: a radiation detector according to any one of claims 1 to 8; and a radiation source that irradiates a radiation imaging target with radiation. The radiation imaging system is characterized by the above.

17. The radiation source controls the radiation irradiation rate such that the average value of the number of photons or particles of radiation incident per frame and per pixel is 0.5 or less. The radiation imaging system according to claim 16, characterized by the above.

18. A readout step in which a readout circuit reads out the voltage signal from a plurality of pixels that detect radiation and output the voltage signal; A first A / D conversion step in which an A / D converter compares the voltage signal with a first reference signal and converts it into a digital signal having three or more values; A second A / D conversion step in which the A / D converter compares the voltage signal with a second reference signal and converts it into a digital signal having three or more values, and The first reference signal is a signal that changes temporally in a first voltage region that includes the most frequent value of the voltage signal output by a pixel that has not received radiation; The second reference signal is a signal that changes temporally in a second voltage region that includes the voltage signal output by a pixel that has received radiation and does not overlap with the first voltage region; There is a third voltage region between the first voltage region and the second voltage region where the A / D converter does not perform A / D conversion processing. The radiation detection method is characterized by the above.

19. A background level acquisition step in which a signal processing unit acquires the background level included in the voltage signal based on the result of the first A / D conversion step for the voltage signal of one frame read out by the readout circuit; A binarization step in which the signal processing unit binarizes the output of each of the plurality of pixels using the acquired background level and the result of the second A / D conversion step in the one frame. The radiation detection method according to claim 18, characterized by the above.

20. A storage medium storing a program for causing a computer to execute each step of the radiation detection method according to claim 19.

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