Display device

Abstract

To provide a display device in which a failure due to a black spot or unevenness can be prevented.SOLUTION: A display device according to the present invention includes a first substrate 140 and a second substrate 160 having a plurality of sub-pixels, a transistor T disposed in a pixel of the first substrate 140, bank layers BNK each disposed between the plurality of sub-pixels, a light-emitting element D disposed in the sub-pixels between the bank layers BNK, an overcoat layer 166 formed on the second substrate 160, a filling material 174 disposed between the first substrate 140 and the second substrate 160, and a groove 167 formed on at least one of the overcoat layer 166 and the bank layer BNK of the sub-pixel.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present invention relates to a display device capable of preventing image quality defects caused by uneven thickness of a filler material.

Background Art

[0002] With the development of information technology, various forms of small and thin display devices such as liquid crystal display devices, organic light emitting display devices, plasma display devices, and micro LED display devices have been proposed. Further, such display devices are adopted in various electronic devices such as smartphones and tablet PCs.

[0003] In such display devices, black spots and unevenness occur on the screen for various reasons, and such black spots and unevenness are important causes of defects in the display device.

Summary of the Invention

Problems to be Solved by the Invention

[0004] An object of the present invention is to provide a display device capable of preventing defects caused by black spots and unevenness.

Means for Solving the Problems

[0005] The display device according to the present invention includes a first substrate and a second substrate including a plurality of sub-pixels, a transistor disposed in each sub-pixel of the first substrate, a bank layer disposed between the plurality of sub-pixels, a light-emitting element disposed in the sub-pixel between the bank layers, an overcoat layer disposed on the second substrate, a filler material disposed between the first substrate and the second substrate, and a groove formed in at least one of the bank layer and the overcoat layer in the sub-pixel.

[0006] The groove formed in the overcoat layer overlaps with the bank layer.

[0007] On the second substrate, a black matrix and a color filter layer are formed, and the groove formed in the overcoat layer overlaps with the black matrix.

[0008] Moreover, the transparent display device according to the present invention includes a first substrate and a second substrate including a plurality of pixels, wherein each pixel includes a display region where a desired video is displayed and a transparent region that transmits rear light, the first substrate and the second substrate, transistors disposed in each of the plurality of sub-pixels disposed in the pixels of the first substrate, a planarization layer formed in a part of the display region and the transparent region to cover the transistors, a bank layer disposed between the sub-pixels and outside the transparent region, a light-emitting element disposed in the sub-pixels between the bank layers, an overcoat layer formed on the second substrate, a filling material disposed between the first substrate and the second substrate, and a groove formed in the overcoat layer of the transparent region.

[0009] In the transparent region, a signal wiring for applying a signal to the light-emitting element is disposed. At this time, in the transparent region, the planarization layer can be formed only on the signal wiring, and the planarization layer in the transparent region can overlap with the groove of the overcoat layer.

[0010] The thickness of the planarization layer in the transparent region is thinner than that of the planarization layer in the display region.

[0011] A dam is formed along the edges of the first substrate and the second substrate to seal the filling material.

[0012] In the present invention, it is possible to improve the spreadability of the filling material in the groove that causes capillary action in the overcoat layer and / or the bank layer, and prevent defects due to non-uniform coating of the filling material.

[0013] In addition, in the present invention, since the flow of the filler is improved and the optimal amount of the filler is applied at a desired thickness, waste of the filler can be prevented and the amount of filler to be discarded can be minimized. As a result, the discharge of harmful substances can be minimized and an environmentally friendly process can be realized.

Brief Description of Drawings

[0014]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8A

Figure 8B

Figure 9

Modes for Carrying Out the Invention

[0015] The advantages and features of the present invention, and the method for achieving them, will become clear by referring to the embodiments described in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below and can be embodied in various different forms. However, these embodiments are provided so that the disclosure of the present invention is complete and those with ordinary knowledge in the technical field to which the present invention pertains can fully understand the scope of the invention, and the present invention is defined by the scope of the claims.

[0016] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary and the present invention is not limited thereto. Throughout the specification, the same reference numerals indicate the same components. Also, when explaining the present invention, if it is determined that a specific explanation of related known technologies will obscure the gist of the present invention, the detailed explanation thereof will be omitted. When "comprises", "includes", "has", "holds", "becomes", etc. are described in this specification, other parts can be added unless both "only" are described. Also, when a component is described in the singular form, it can be interpreted in the plural form unless otherwise explicitly stated.

[0017] Also, when interpreting a component, it shall include an error range even without an explicit description.

[0018] For example, when explaining the positional relationship between two components with "above", "on the upper part", "on the lower part", "sideways", etc., if "directly" or "immediately" is not described, one or more other components can also be located between the two components.

[0019] Also, in the explanation of the time relationship, for example, when explaining the temporal precedence relationship with "after", "subsequent to", "next", "before", etc., if "directly" or "immediately" is not described, non - continuous cases can be included.

[0020] In addition, terms such as "first" and "second" are used to distinguish components, but the components are not limited to such terms. Therefore, the first component mentioned below may also be the second component within the technical idea of the present invention.

[0021] In describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used, but such terms are only used to distinguish components and do not limit the essence, order, sequence, number, etc. of the components. When a component is described as being "connected", "coupled", or "joined" to another component, the two components may be directly connected, coupled, or joined, but it should be understood that another component may be interposed between the components and each component may be "connected", "coupled", or "joined" to another component through another component.

[0022] The "display device" in the present invention can include a display device in a narrow sense such as a display module including a display panel and a driving unit for driving the display panel. In addition, it can also include an electrical equipment display such as a notebook computer, a television, a computer monitor, or an automotive display or other forms of vehicles, which are final products (complete product, final product) equipped with a display module, a set electronic device such as a mobile electronic device such as a smartphone and an electronic pad, or a set device (set device, set apparatus).

[0023] Therefore, the display device in the present invention can include the display device itself in a narrow sense such as a display module, an application product equipped with a display module, or a set device that is a final product.

[0024] Hereinafter, the present invention will be described in detail with reference to the drawings.

[0025] FIG. 1 is a block diagram schematically showing a display device 100 according to the present invention, and FIG. 2 is a block diagram schematically showing a sub-pixel SP shown in FIG. 1.

[0026] As shown in FIG. 1, the display device 100 includes a video processing unit 102, a timing control unit 104, a gate driving unit 106, a data driving unit 107, a power supply unit 108, and a display panel 109.

[0027] The video processing unit 102 outputs a driving signal for driving all devices together with video data from the outside. For example, the driving signal output from the video processing unit 102 may include a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, a clock signal, and the like.

[0028] The timing control unit 104 receives the supply of video data and driving signals and the like from the video processing unit 102. Based on the driving signals input from the video processing unit 102, the timing control unit 104 generates and outputs a gate timing control signal GDC for controlling the operation timing of the gate driving unit 106 and a data timing control signal DDC for controlling the operation timing of the data driving unit 107.

[0029] The gate driving unit 106 outputs a scan signal to the display panel 109 in response to the gate timing control signal GDC from the timing control unit 104. The gate driving unit 106 outputs a scan signal through a plurality of gate lines GL1 to GLm. At this time, the gate driving unit 106 can be in the form of an IC (Integrated Circuit), but is not limited thereto. The gate driving unit 106 includes various gate driving circuits, and the gate driving circuit can be directly formed on the substrate of the display panel 109. In this case, the gate driving unit 106 may be a GIP (Gate-In-Panel).

[0030] The data driving unit 107 outputs a data voltage to the display panel 109 according to the data timing control signal DDC input from the timing control unit 104. The data driving unit 107 samples and latches the digital data signal DATA from the timing control unit 104, and converts it into an analog data voltage based on the gamma voltage. The data driving unit 107 outputs the data voltage through a plurality of data lines DL1 to DLn. At this time, the data driving unit 107 can be in the form of an IC, but is not limited thereto.

[0031] The power supply unit 108 outputs a high-potential voltage, a low-potential voltage, etc., and supplies them to the display panel 109. The high-potential voltage is supplied to the display panel 109 through the first power line EVDD, and the low-potential voltage is supplied to the display panel 109 through the second power line EVSS. At this time, the voltage output from the power supply unit 108 may be output to the gate driving unit 106 and the data driving unit 107 and used for driving these units.

[0032] The display panel 109 displays an image according to the data voltage and the scan signal supplied from the gate driving unit 106 and the data driving unit 107, and the voltage supplied from the power supply unit 108.

[0033] The display panel 109 is composed of a plurality of sub-pixels SP, and an image is actually displayed. The sub-pixel SP may include a red (Red) sub-pixel, a green (Green) sub-pixel, and a blue (Blue) sub-pixel, or may include a white (White, W) sub-pixel, a red (Red, R) sub-pixel, a green (Green, G) sub-pixel, and a blue (Blue, B) sub-pixel. At this time, the sub-pixels SP of white W, red R, green G, and blue B may all have the same area, or may have different areas from each other.

[0034] As shown in FIG. 2, one sub-pixel SP can be connected to a gate line GL1, a data line DL1, a first power line EVDD, and a second power line EVSS. The sub-pixel SP can include a plurality of thin film transistors and a storage capacitor depending on the configuration of the pixel circuit. For example, the sub-pixel SP can be composed of two transistors and one capacitor 2T1C, but is not limited thereto, and can also be a sub-pixel adopting configurations such as 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2C, 8T2C, etc.

[0035] FIG. 3 is a circuit diagram schematically showing a sub-pixel SP of the display device 100 according to the present invention.

[0036] As shown in FIG. 3, the display device according to the present invention includes a gate wiring GL, a data wiring DL, and a power supply wiring PL that intersect with each other to partition the sub-pixel SP. In the sub-pixel SP, a switching transistor Ts, a driving transistor Td, a storage capacitor Cst, and an organic light emitting element D are arranged.

[0037] The switching transistor Ts is connected to the gate wiring GL and the data wiring DL. The driving transistor Td and the storage capacitor Cst are connected between the switching transistor Ts and the power supply wiring PL. The organic light emitting element D is connected to the driving transistor Td.

[0038] In the display device having such a structure, when the switching transistor Ts is turned on by a gate signal applied to the gate wiring GL, the data signal applied to the data wiring DL is applied to the gate electrode of the driving transistor Td and one electrode of the storage capacitor Cst via the switching transistor Ts.

[0039] The driving transistor Td is turned on by a data signal applied to the gate electrode. As a result, a current proportional to the data signal flows from the power supply wiring PL through the driving transistor Td to the organic light-emitting element D, and the organic light-emitting element D emits light with a luminance proportional to the current flowing through the driving transistor Td.

[0040] At this time, the storage capacitor Cst is charged with a voltage proportional to the data signal, so that the voltage of the gate electrode of the driving transistor Td is held constant during one frame.

[0041] In FIG. 3, only two transistors Td and Ts and one capacitor Cst are shown, but the present invention is not limited thereto, and three or more transistors and two or more capacitors can be provided.

[0042] FIG. 4 is a plan view schematically showing the structure of the display device 100 according to the present invention.

[0043] As shown in FIG. 4, the display device 100 according to the present invention includes an active area AA where an image is actually displayed and an outer area NA disposed outside the active area AA.

[0044] A plurality of sub-pixels SP are arranged in the active area AA. The sub-pixels SP can include a red R sub-pixel, a green G sub-pixel, and a blue B sub-pixel. Further, the sub-pixels SP can further include a white W sub-pixel.

[0045] Although not shown in FIG. 4, a plurality of gate lines and data lines are arranged in the active area AA, and sub-pixels SP are arranged in the intersection area of the gate lines and the data lines. In each sub-pixel SP, a thin film transistor as a switching element and a display element for actually embodying an image are arranged.

[0046] The display element can include various display elements. For example, the display element can be an organic electroluminescent display element, a liquid crystal display element, a quantum dot display element, a micro LED display element, or a mini LED display element.

[0047] In the outer region NA, a gate driving unit and a data driving unit for applying all signals to the sub-pixels SP can be arranged. The gate driving unit applies a scanning signal to the sub-pixels SP through the gate line, and the data driving unit applies a video signal to the sub-pixels SP through the data line.

[0048] Also, all wirings are arranged in the outer region NA. For example, in the outer region NA, various wirings such as a Vdd wiring for supplying a high potential voltage to the active region, a Vss wiring for applying a low potential voltage, a data link line for applying a video signal to the data line, and a gate link line for applying a scanning signal to the gate line are formed.

[0049] FIG. 5 is a cross-sectional view specifically showing the structure of the display device 100 according to the first embodiment of the present invention. For convenience of explanation, only two adjacent sub-pixels SP1 and SP2 arranged in the active region are shown. The sub-pixels SP1 and SP2 can each include a sub-pixel of red R, a sub-pixel of green G, and a sub-pixel of blue B. Further, the sub-pixels SP1 and SP2 can further include a sub-pixel of white W.

[0050] As shown in FIG. 5, the first substrate 140 including the active region AA and the outer region NA may be made of a hard material such as glass, or may be made of a plastic-based material having flexibility.

[0051] When the first substrate 140 is made of a plastic-based material, the first substrate 140 can be formed of at least one of polyimide, polymethyl methacrylate, polyethylene terephthalate, polyethersulfone, and polycarbonate, but is not limited thereto.

[0052] For example, when the first substrate 140 is made of polyimide, it can be composed of a plurality of polyimides, and an inorganic layer can be further disposed between the polyimides, but it is not limited thereto.

[0053] A buffer layer 142 is formed on the active region AA and the outer region NA on the first substrate 140. The buffer layer 142 can play a role in improving the adhesion between the layer formed on the first substrate 140 and the first substrate 140, blocking an alkali component or the like flowing out from the first substrate 140, etc. Further, the buffer layer 142 can delay the diffusion of moisture or oxygen that has penetrated into the first substrate 140.

[0054] The buffer layer 142 can be a single layer or a multilayer made of SiNx or SiOx. When the buffer layer 142 is a multilayer, SiNx and SiOx may be alternately formed. The buffer layer 142 can also be omitted based on the type and material of the first substrate 140, the structure and type of the thin film transistor, etc.

[0055] A thin film transistor T is formed on the active region AA on the buffer layer 142. For the sake of convenience of explanation, only the driving thin film transistor is shown among various thin film transistors that can be disposed in the active region AA, but other thin film transistors such as switching thin film transistors can also be included. Further, although a thin film transistor having a top gate structure is shown, it is not limited thereto, and it can also have other structures such as a bottom gate structure.

[0056] The thin film transistor T includes a semiconductor layer 112 disposed on the buffer layer 142, a gate insulating layer 144 formed on the semiconductor layer 112, a gate electrode 114 disposed on the gate insulating layer 144, an interlayer insulating layer 146 formed on the gate electrode 114, a source electrode 115 and a drain electrode 116 disposed on the interlayer insulating layer 146.

[0057] The semiconductor layer 112 can be made of a polycrystalline semiconductor. For example, the polycrystalline semiconductor may be made of low-temperature poly-silicon (LTPS) with high mobility, but is not limited thereto.

[0058] Also, the semiconductor layer 112 can be made of an oxide semiconductor. For example, it can be made of any one of IGZO (Indium Gallium Zinc Oxide), IZO (Indium Zinc Oxide), IGTO (Indium Gallium Tin Oxide), and IGO (Indium Gallium Oxide), but is not limited thereto. The semiconductor layer 112 is composed of a channel region 112a in its central region and source regions 112b and drain regions 112c which are doped layers on both sides thereof.

[0059] The gate insulating layer 144 is formed in the active region AA and the outer region NA. The gate insulating layer 144 can be a single layer or a multilayer made of an inorganic substance such as SiNx or SiOx, but is not limited thereto.

[0060] The interlayer insulating layer 146 is formed in the active region AA and the outer region NA and can be a single layer or a multilayer made of an organic substance such as photoacrylic or an inorganic substance such as SiNx or SiOx. Also, the interlayer insulating layer 146 may be a multilayer composed of an organic layer and an inorganic layer, but is not limited thereto.

[0061] The source electrode 115 and the drain electrode 116 can be a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, but is not limited thereto. The source electrode 115 and the drain electrode 116 can each contact the source region 112b and the drain region 112c in the semiconductor layer 112 through a first contact hole H1 formed in the gate insulating layer 144 and the interlayer insulating layer 146.

[0062] Although not shown in the figure, a Bottom Shield Metal layer can be disposed on the first substrate 140 below the semiconductor layer 112. The Bottom Shield Metal layer is for minimizing the back-channel effect caused by charges trapped in the first substrate 140 and preventing image retention and performance degradation of the transistor, and can be a single layer or multiple layers made of molybdenum (Mo), titanium (Ti), or an alloy thereof, but is not limited thereto.

[0063] A planarization layer 148 is formed on the first substrate 140 on which the thin-film transistor T is disposed. The planarization layer 148 may be made of an organic layer such as photoacrylic, but is not limited thereto, and can also be a multilayer composed of an inorganic layer and an organic layer.

[0064] FIG. 5 shows that the planarization layer 148 is formed only in the active region AA and not in the outer region NA, but it can also be formed in the outer region NA.

[0065] On the planarization layer 148 in the active region AA, particularly in each sub-pixel of the active region AA, a light-emitting element D is disposed. The light-emitting element D is composed of a first electrode 132, a light-emitting layer 134, and a second electrode 136.

[0066] The first electrode 132 can be an anode. The first electrode 132 is disposed on the planarization layer 148 and is electrically connected to the drain electrode 116 of the thin-film transistor T through a contact hole formed in the planarization layer 148. The first electrode 132 can be made of at least one or more of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof. Also, the first electrode 132 may be a transparent metal oxide layer such as ITO or IZO.

[0067] When the display device 100 is a top emission type, since the first electrode 132 serves as a reflective electrode that reflects light, it can further contain an opaque conductive material. When the display device 100 is a bottom emission type, the first electrode 132 can use a transparent conductive material that transmits light, such as ITO or IZO.

[0068] On the planarization layer 148, a bank layer BNK is formed. The bank layer BNK can be a partition wall that partitions the sub-pixels SP. The bank layer BNK can partition each sub-pixel and prevent light of a specific color emitted from adjacent pixels from being mixed and emitted.

[0069] The bank layer BNK can be composed of at least one or more of inorganic insulating materials such as SiNx and SiOx, or organic insulating materials such as BCB (benzocyclobutene), acrylic resins, epoxy resins, phenolic resins, polyamide-based resins, polyimide-based resins, or photosensitive agents containing black (or dark-colored) pigments, but is not limited thereto.

[0070] The light-emitting layer 134 can be formed in at least a partial region on the upper surface of the first electrode 132, the inclined surface, and the upper surface of the bank layer BNK. The light-emitting layer 134 is formed in the R, G, and B sub-pixels and can include an R-light-emitting layer that emits red light, a G-light-emitting layer that emits green light, and a B-light-emitting layer that emits blue light. Further, the light-emitting layer 134 may be a W-light-emitting layer that emits white light.

[0071] The light-emitting layer 134 can include an organic light-emitting layer, or an inorganic light-emitting layer, for example, a nano-sized material layer, quantum dots, a micro-LED light-emitting layer, a mini-LED light-emitting layer, but is not limited thereto.

[0072] When the light-emitting layer 134 is an organic light-emitting layer, the light-emitting layer 134 is composed of a blue organic light-emitting layer and a yellow fluorescent layer, and white light is emitted from the light-emitting layer 134. Further, the light-emitting layer 134 can have a multi-stack structure. For example, when the light-emitting layer 134 has a triple-stack structure, two charge generation layers can be interposed, and the first stack to the third stack can be arranged. The first stack to the third stack can each be composed of an organic light-emitting layer, a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. For example, the organic light-emitting layer of the first stack can emit red light, the organic light-emitting layer of the second stack can emit blue light, and the organic light-emitting layer of the third stack can emit green light.

[0073] The second electrode 136 is disposed on the light-emitting layer 134. When the display device 100 is a top emission type, the second electrode 136 can be made of a translucent conductive material that transmits light. For example, the second electrode 136 can be formed from at least one or more of alloys such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag.

[0074] When the display device 100 is a bottom emission type, the second electrode 136 is a reflective electrode that reflects light, and an opaque conductive material can be used. For example, the second electrode 136 can be formed from at least one or more of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or alloys thereof.

[0075] A sealing layer 152 is formed on the active region AA on the light-emitting element D. When the light-emitting element D is exposed to moisture and oxygen, pixel shrinkage may occur in which the light-emitting region shrinks, or defects such as black dots may occur in the light-emitting region. Further, moisture and oxygen oxidize the electrodes made of metal. The sealing layer 152 blocks the penetration of moisture and oxygen from the outside and prevents defects in the light-emitting element D and all electrodes.

[0076] The encapsulation layer 152 may be a single layer or a multi-layer. When the encapsulation layer 152 is a single layer, the encapsulation layer 152 can be formed of an inorganic material such as SiOx or SiNx, but is not limited thereto.

[0077] Also, when the encapsulation layer 152 is a multi-layer, the encapsulation layer 152 can be composed of a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer. The first and second inorganic encapsulation layers are composed of inorganic materials such as SiOx or SiNx, and the organic encapsulation layer can be composed of an organic insulating material such as an acrylic resin, an epoxy resin, a polyimide, a polyethylene, or a silicon oxycarbide (SiOC), but is not limited thereto.

[0078] A second substrate 160 is disposed on the encapsulation layer 152. The second substrate 160 may be made of a hard material such as glass or a plastic-based material having flexibility, similar to the first substrate 140. A black matrix 162 and a color filter layer 164 can be disposed on the second substrate 160.

[0079] The black matrix 162 is formed in a region where an image is not displayed, for example, between sub-pixels or in a region where a thin film transistor is disposed, and prevents a decrease in image quality by blocking light from passing through the region. The black matrix 162 may be made of a metal such as Cr or CrO, a metal oxide, or a black resin.

[0080] The color filter layer 164 filters the light from the light-emitting element D and transmits only the light of a desired color. The color filter layer 164 can include a red color filter layer that transmits red light, a green color filter layer that transmits green light, and a blue color filter layer that transmits blue light.

[0081] When the display device 100 is a bottom emission display device, the color filter layer 164 can be disposed below the light-emitting element D, for example, on the interlayer insulation layer 146 or the gate insulation layer 144.

[0082] An overcoat layer 166 is formed on the upper surfaces of the black matrix 162 and the color filter layer 164. The overcoat layer 166 may be composed of an inorganic layer, an organic layer, or a multilayer of an inorganic layer and an organic layer.

[0083] A plurality of grooves 167 are formed in the overcoat layer 166. The grooves 167 may be disposed to overlap with the bank layer BNK or may be disposed to overlap with the black matrix 162. Further, the grooves 167 extend vertically and horizontally along the region corresponding to the bank layer BNK. In FIG. 5, only one groove 167 is formed in the region corresponding to the bank layer BNK, but a plurality of grooves may be formed in each region.

[0084] Also, unlike FIG. 5, the groove 167 can also be in contact with the color filter 164 and / or the black matrix 162. That is, the groove 167 can be formed in a state where the entire overcoat layer 166 is removed.

[0085] A dam 172 is disposed between the first substrate 140 and the second substrate 160. The dam 172 is formed along the edges of the first substrate 140 and the second substrate 160, and bonds the two substrates while maintaining the interval between the first substrate 140 and the second substrate 160. The dam 172 can be composed of an organic material such as a resin, but is not limited thereto.

[0086] A filler 174 is disposed in the region between the first substrate 140 and the second substrate 160 surrounded by the dam 172.

[0087] The filler 174 can be another adhesive layer that bonds the sealing layer 152 and the second substrate 160. The filler 174 can be composed of a thermosetting adhesive resin, a photocuring adhesive resin, or a natural curing adhesive resin.

[0088] The filling material 174 can be a barrier layer for blocking the penetration of moisture and oxygen into the display device 100. When the first substrate 140 and the second substrate 160 are bonded together, if the gap space between the first substrate 140 and the second substrate 160 is not filled with any substance, the display device 100 may be relatively vulnerable to moisture and oxygen from the outside. Therefore, by filling the gap space between the first substrate 140 and the second substrate 160 with a moisture-proof layer that suppresses the penetration of moisture and oxygen, the moisture and oxygen penetrating into the inside of the display device 100 can be effectively blocked. At this time, the filling material 174 can be composed of a moisture absorbent or a moisture-proof agent that blocks moisture and oxygen.

[0089] Also, the filling material 174 can be composed of an adhesive resin that bonds the sealing layer 152 and the second substrate 160, and a moisture-proof agent that blocks moisture and oxygen.

[0090] The filling material 174 can also function to keep the distance between the first substrate 140 and the second substrate 160 constant.

[0091] Since the filling material 174 is surrounded by the dam 172 and fills the inside of the display device 100, the dam 172 acts as a sealing agent for sealing the filling material 174.

[0092] As described above, in the display device 100 according to the present invention, the groove 167 is formed in the overcoat layer 166, and the reason therefor will be described.

[0093] FIG. 6 is a flowchart schematically showing the manufacturing process of the display device 100 according to the present invention.

[0094] As shown in FIG. 6, first, after preparing the first substrate 140 made of a hard substance such as glass or a plastic-based substance having flexibility, a thin film transistor T composed of a semiconductor layer 112, a gate insulating layer 144, a gate electrode 113, an interlayer insulating layer 146, a source electrode 115, and a drain electrode 116 is formed in the active region of the first substrate 140 (S101).

[0095] Subsequently, a planarization layer 148 is formed on the thin film transistor T, and a matrix-shaped bank layer BNK is formed between sub-pixels. Then, a light-emitting element D including a first electrode 132, a light-emitting layer 134, and a second electrode 136 is formed in each of the sub-pixels partitioned by the bank layer BNK (S102).

[0096] Next, a dam 172 is formed along the edge of the first substrate 140 in the outermost region of the outer region NA in the first substrate 140 (S103).

[0097] Subsequently, a filling material 174 is dropped onto the first substrate 140 (S104). At this time, the dropping region of the filling material 174 can be formed in various regions depending on the structure and size of the display device 100, etc. Also, the filling material 174 can be dropped into a plurality of dropping regions.

[0098] On the other hand, after forming a black matrix 162 and a color filter layer 164 on the second substrate 160 (S105), an overcoat layer 166 is formed thereon, and a part of the overcoat layer 166 is etched to form a groove 167 at a position overlapping with the bank layer BNK (S106).

[0099] Subsequently, when pressure is applied with the first substrate 140 and the second substrate 160 aligned, the filling material 174 dropped onto the first substrate 140 spreads due to the pressure, and the filling material 174 is applied over the entire regions of the first substrate 140 and the second substrate 160 (S107).

[0100] Thereafter, the display device 100 is completed by irradiating the filling material 174 with light or applying heat to cure the filling material 174.

[0101] Thus, in the display device 100 according to the present invention, the filling material 174 is used to bond the first substrate 140 and the second substrate 160. After the filling material 174 is dropped into the set region, pressure is applied to the first substrate 140 and the second substrate 160, so that the filling material 174 is applied over the entire regions of both substrates.

[0102] Since the filling material 174 is a viscous fluid, when pressure is applied to the first substrate 140 and the second substrate 160, it will spread to the edge regions of both substrates 140 and 160 between the first substrate 140 and the second substrate 160. However, under various conditions such as the physical properties of the filling material 174 like viscosity, external conditions such as the bonding force, or the presence of foreign matter between the first substrate 140 and the second substrate 160, the filling material 174 may not spread uniformly over the entire substrates 140 and 160. In particular, if the spread of the filling material 174 is not smooth, the filling material 174 will be unevenly applied. For example, the thickness of the filling material 174 in the corner regions of the substrates 140 and 160 will be thinner than that in other regions.

[0103] In this way, when the filling material 174 is unevenly applied, defects such as unevenness will occur on the screen.

[0104] In the present invention, in order to prevent defects caused by uneven application of the filling material 174, a groove 167 is formed in the overcoat layer 166. Since the groove 167 is formed with a width of about 30 μm or less, when the filling material 174 spreads due to pressure, it acts as a capillary, improving the spreadability of the filling material 174. Therefore, regardless of the physical properties of the filling material 174 and the bonding conditions, etc., the filling material 174 is uniformly applied over the entire substrates 140 and 160. In particular, since the filling material 174 is uniformly applied up to the corners of the substrates 140 and 160, defects caused by uneven application of the filling material 174 can be prevented.

[0105] Since the groove 167 is formed in a region corresponding to the bank layer BNK which is a non-display region of the image, defects in the image due to the groove 167 can also be prevented.

[0106] FIG. 7 is a cross-sectional view showing the structure of 200 of the display device according to the second embodiment of the present invention. The description of the same structure as that of the display device 100 of the first embodiment shown in FIG. 5 is omitted or simplified, and only the different structures are described in detail.

[0107] As shown in Fig. 7, in the display device 200 according to the second embodiment of the present invention, a thin film transistor T and an organic light emitting element D are disposed on the first substrate 240, and a sealing layer 252 is disposed thereon.

[0108] The thin film transistor T includes a semiconductor layer 212 disposed on the buffer layer 242, a gate electrode 214 disposed on the gate insulating layer 244, and a source electrode 215 and a drain electrode 216 disposed on the interlayer insulating layer 246.

[0109] The organic light emitting element D includes a first electrode 232, a light emitting layer 234, and a second electrode 236 which is a common layer formed across the entire sub-pixel.

[0110] The sealing layer 252 is formed across the entire first substrate 240 and covers the second electrode 236.

[0111] The sub-pixels are partitioned by a bank layer BNK, and a groove 255 is formed on the upper surface of the bank layer BNK. The groove 255 can be formed with a width of about 30 μm or less, but is not limited thereto.

[0112] The light emitting layer 234 and the second electrode 236 can extend to the upper surface of the bank layer BNK, but are not limited thereto. When the light emitting layer 234 and the second electrode 236 extend to the upper surface of the bank layer BNK, the light emitting layer 234, the second electrode 236, and the sealing layer 252 are also formed inside the groove 255, and the groove 255 is formed on the upper surfaces of the light emitting layer 234, the second electrode 236, and the sealing layer 252.

[0113] A black matrix 262 and a color filter layer 264 are formed on the second substrate 260, a filling material 274 is applied between the first substrate 240 and the second substrate 260, and the first substrate 240 and the second substrate 260 are bonded together. Dams 272 are formed at the edges of the first substrate 240 and the second substrate 260 to seal the filling material 274.

[0114] In the display device 200 of the present embodiment, the groove 255 is formed in the bank layer BNK, and when the filling material 274 is applied, capillary action occurs due to the groove 255. Thereby, the spread of the fluid filling material 274 is improved, and the filling material 274 is formed with a uniform thickness over the entire display device 200. As a result, the occurrence of black spots and unevenness due to the non-uniformity of the filling material 274 can be prevented.

[0115] On the other hand, in the display device 100 according to the first embodiment, the groove 167 is formed in the overcoat layer 166 on the second substrate 160 to improve the spreadability of the filling material 174. In the display device 200 according to the second embodiment, the groove 255 is formed in the bank layer BNK on the first substrate 240 to improve the spread of the filling material 274. However, the grooves may be formed in both the overcoat layer of the second substrate and the bank layer of the first substrate. In this case, the groove formed in the overcoat layer of the second substrate and the groove formed in the bank layer of the first substrate can be aligned at the same position, but it is not limited thereto, and they may be formed at different positions.

[0116] FIGS. 8A and 8B are plan views schematically showing the structure of the pixel P of the display device 300 according to the third embodiment of the present invention. FIG. 8A is a plan view of the first substrate 340 on which the thin film transistor is formed, and FIG. 8B is a plan view of the second substrate 360 on which the color filter layer is formed. The display device 300 according to the third embodiment is a transparent display device. Therefore, in the display device 300 of the present embodiment, a desired video is displayed, and at the same time, an object behind the display device 300 is also displayed.

[0117] As shown in FIGS. 8A and 8B, the pixel P includes a display area DA where a video is displayed and a transparent area TA where no video is displayed and external light passes through as it is. A plurality of sub-pixels SP1, SP2, SP3, and SP4 are arranged in the display area DA.

[0118] For example, the first sub-pixel SP1 may be a red R sub-pixel, the second sub-pixel SP2 may be a green G sub-pixel, the third sub-pixel may be a blue B sub-pixel, and the fourth sub-pixel SP4 may be a white W sub-pixel. Also, only R, G, and B sub-pixels can be arranged in the display area DA.

[0119] The transparent area TA is a transparent area through which the light behind the display device 300 passes as it is, and the background behind is displayed. Therefore, no sub-pixels are arranged in the transparent area TA. That is, no thin film transistors and light emitting elements are disclosed in the transparent area TA.

[0120] A bank layer BNK is formed between the sub-pixels SP1, SP2, SP3, SP4 in the display area DA on the first substrate 340, and outside the transparent area TA.

[0121] A black matrix 362 is formed between the sub-pixels SP1, SP2, SP3, SP4 in the display area DA on the second substrate 360, and outside the transparent area TA. Also, although not shown in FIG. 8B, a color filter layer of a corresponding color is formed on each of the sub-pixels SP1, SP2, SP3, SP4 of the second substrate 360. No color filter layer is formed on the fourth sub-pixel SP4, that is, the W sub-pixel that emits white light, and the white light emitted by the light emitting element may pass through as it is.

[0122] A groove 367 is formed in the second substrate 360. As described in the first embodiment and the second embodiment, the groove 367 improves the flow of the filling material so that the filling material is uniformly applied over the entire display device 300. In the transparent display device 300 according to this embodiment, the groove 367 is formed in the transparent area TA. Also, the groove 367 can be formed between the sub-pixels SP1, SP2, SP3, SP4 in the display area DA, but at this time, the groove 367 may overlap with the black matrix 362.

[0123] In this way, by forming the groove 367 in the transparent area TA, it is possible to prevent deterioration of the image quality caused by the change in the optical path due to the groove 367.

[0124] In FIG. 8B, the grooves 367 in the transparent region TA are formed in the horizontal and vertical directions, but are not limited thereto. For example, a plurality of grooves 367 may be formed only in the horizontal direction, or a plurality of grooves 367 may be formed only in the vertical direction. Also, a plurality of grooves 367 may be formed in the horizontal and vertical directions, respectively. The position and number of such grooves 367 can be variously set according to the size of the display device 300, the dropping position and characteristics of the filling material, and the like.

[0125] FIG. 9 is a diagram specifically showing the structure of the transparent display device 300 according to the third embodiment of the present invention. The description of the same structure as that of the display device 100 of the first embodiment shown in FIG. 5 is omitted or simplified, and only the different structures are described in detail.

[0126] As shown in FIG. 9, the display device 300 of this embodiment includes a display area DA in which a desired video is displayed, and a transparent area TA through which the light from the rear is transmitted as it is and the object behind is displayed. Substantially, a plurality of sub-pixels are arranged in the display area DA, but for convenience of explanation, only one sub-pixel is shown in FIG. 9.

[0127] On the display area DA on the first substrate 340, a thin film transistor T and a light emitting element D are arranged.

[0128] The thin film transistor T includes a semiconductor layer 312 arranged on the buffer layer 342, a gate electrode 314 arranged on the gate insulating layer 344, and a source electrode 315 and a drain electrode 316 arranged on the interlayer insulating layer 346.

[0129] The light-emitting element D is disposed on the planarization layer 348. The light-emitting element D includes a first electrode 322, a light-emitting layer 334, and a second electrode 336 formed across the display region DA. A bank layer BNK is formed between sub-pixels in the display region DA and on the outer periphery in the transparent region TA, and the light-emitting element D is disposed in each of the sub-pixels of the display region DA partitioned by the bank layer BNK. Further, the light-emitting element D can be disposed across the entire area of the first substrate 340 including the display region DA and the transparent region TA.

[0130] A sealing layer 352 is formed across the entire first substrate 340 on the light-emitting element D.

[0131] A black matrix 362 and a color filter layer 364 are formed on the second substrate 360, and an overcoat layer 366 is formed thereon. A filling material 374 is applied between the first substrate 340 and the second substrate 360, and the first substrate 340 and the second substrate 360 are bonded together. Dams 372 are formed at the edges of the first substrate 340 and the second substrate 360 to seal the filling material 374.

[0132] A groove 367 is formed in the overcoat layer 366 in the transparent region TA. The groove 367 is formed with a width of about 30 μm or less and acts as a capillary when applying the filling material 374 to smooth the flow of the filling material 374. Thereby, the filling material 374 is uniformly applied across the entire display device 300.

[0133] Further, unlike FIG. 9, the groove 367 can be in contact with the second substrate 360. That is, the groove 367 can be formed in a state where the entire overcoat layer 366 is removed.

[0134] On one hand, a signal wiring 318 is disposed in the transparent region TA. The signal wiring 318 may be a high-potential voltage wiring that supplies a high-potential voltage to the light-emitting element D, or may be a low-potential voltage wiring that supplies a low-potential voltage. The signal wiring 318 is disposed on the gate insulating layer 344 and can be formed of the same metal as the gate electrode 314 of the thin-film transistor T in the same process, but is not limited thereto.

[0135] In the transparent region TA, the planarization layer 348 and the bank layer BNK are removed. This is to prevent the light from the rear of the display device 300 from being absorbed by the planarization layer 348 and the bank layer BNK, and to maximize the transparency of the display device 300. However, at least one of the planarization layer 348 and the bank layer BNK can be disposed on the upper portion of the signal wiring 318. The planarization layer 348a and the bank layer BNK on the upper portion of the signal wiring 318 can minimize the interference between the signal wiring 318 and the metal wiring or electrode above it, and can prevent signal delay.

[0136] However, in the present invention, the groove 367 formed in the overcoat layer 366 is formed so as to overlap with the signal wiring 318, and by removing a part of the bank layer BNK and the planarization layer 348a formed on the upper portion of the signal wiring 318, the capillary phenomenon by the groove 367 is maximized, and the flow of the filler 374 is smoothed.

[0137] The planarization layer 348a in the transparent region TA is for preventing signal delay from occurring in the signal wiring 318 due to interference with other wirings, and at the same time is for maximizing the capillary phenomenon by the groove 367. Therefore, the thickness of the planarization layer 348a in the transparent region TA is desirably set to the minimum thickness at which no signal delay occurs in the signal wiring 318.

[0138] For example, the planarization layer 348a in the region corresponding to the groove 367 may have a thickness of about 50 to 90% compared to the planarization layer 348 in the display region DA, but is not limited thereto.

[0139] As described above, the display device 300 of the present embodiment is a transparent display device, and the pixel includes a display area DA where a desired video is displayed and a transparent area TA where a rear object is displayed. The groove 367 for the flow of the filling material 374 is formed in the overcoat layer 366 of the transparent area TA.

[0140] However, the transparent display device 300 of the present invention is not limited to such a structure. As shown in FIG. 5, the groove 367 of the transparent display device 300 of the present invention can be formed only in the overcoat layer 366 and / or the bank layer BNK of the display area DA, rather than in the transparent area TA. Further, the groove 367 can be formed not only in the overcoat layer 366 of the transparent area TA but also in the overcoat layer 366 and / or the bank layer BNK of the display area DA.

[0141] As described above, the embodiments of the present invention have been described in more detail with reference to the drawings. However, the present invention is not necessarily limited to these embodiments. The present invention can be variously modified within the scope not departing from the technical idea of the present invention. Therefore, the embodiments disclosed herein are not for limiting the technical idea of the present invention but for explaining it, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, the above-described embodiments are all exemplary and should be understood as non-limiting.

Explanation of Reference Numerals

[0142] 112... semiconductor layer, 114... gate electrode, 115... source electrode, 116... drain electrode, 132... first electrode, 134... light-emitting layer, 136... second electrode, 140, 160... substrate, 142... buffer layer, 144... gate insulating layer, 146... interlayer insulating layer, 148... planarization layer, 152... encapsulation layer, 162... black matrix, 164... color filter layer, 166... overcoat layer, 167... groove, 172... dam, 174... filling material

Claims

1. A first substrate and a second substrate including a plurality of sub-pixels, A transistor disposed in each sub-pixel of the first substrate, A bank layer disposed between the plurality of sub-pixels, A light-emitting element disposed in the sub-pixels between the bank layers, An overcoat layer disposed on the second substrate, A filler disposed between the first substrate and the second substrate, A groove formed in at least one of the bank layer and the overcoat layer in the sub-pixel A display device comprising.

2. The groove formed in the overcoat layer is formed in a region where the bank layer is disposed. The display device according to claim 1.

3. The display device according to claim 1, further comprising a black matrix and a color filter layer disposed on the second substrate.

4. The groove formed in the overcoat layer is formed in a region where the black matrix is disposed. The display device according to claim 3.

5. A first substrate and a second substrate including a plurality of pixels, each pixel including a display region where a desired image is displayed and a transparent region that transmits light from behind, a first substrate and a second substrate, A transistor disposed in each of a plurality of sub-pixels disposed in the pixels of the first substrate, A planarization layer formed in a partial region of the display region and the transparent region and covering the transistor, A bank layer disposed between the sub-pixels and outside the transparent region, A light-emitting element disposed in the sub-pixels between the bank layers, An overcoat layer formed on the second substrate, A filler disposed between the first substrate and the second substrate, A groove formed in the overcoat layer in the transparent region A display device comprising.

6. The display device according to claim 5, further comprising a signal wiring disposed in the transparent region and applying a signal to the light-emitting element.

7. A part of the planarization layer in the transparent region is removed, and the planarization layer is formed only on the signal wiring. The display device according to claim 6.

8. The planarization layer in the transparent region is aligned with the groove of the overcoat layer. The display device according to claim 7.

9. The planarization layer in the transparent region is thinner in thickness than the planarization layer in the display region. The display device according to claim 8.

10. The thickness of the planarization layer in the transparent region is 50 to 90% of the thickness of the planarization layer in the display region. The display device according to claim 9.

11. The display device according to claim 1 or claim 5, wherein the groove generates a capillary phenomenon when applying the filler.

12. The display device according to claim 1 or claim 5, further comprising a dam formed along an edge of the first substrate and the second substrate for sealing the filler.

Images