Electronic apparatus

Abstract

To provide a display device allowing a user to unintentionally display an image with optimal brightness.SOLUTION: A driving method of an electronic apparatus comprising a display part, an imaging part and an illuminance detection part includes: a first step of detecting by the imaging part that a user visually recognizes the display part; a second step of, when the user visually recognizes the display part, measuring external light illuminance with the illuminance detection part; a third step of determining whether to correct display brightness according to a value of measured external light illuminance; a fourth step of displaying an image in existing brightness when it is determined not to correct the display brightness in the third step; a fifth step of deciding a correction value when it is determined to correct the display brightness in the third step; and a sixth step of displaying an image in corrected brightness based on the correction value decided in the fifth step.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] One aspect of the present invention relates to a display device, an electronic device including the display device, and a driving method thereof.

[0002] Note that one aspect of the present invention is not limited to the above technical field. Examples of the technical field of one aspect of the present invention disclosed in this specification and the like include semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices, input / output devices, driving methods thereof, or manufacturing methods thereof. A semiconductor device refers to all devices that can function by utilizing semiconductor characteristics.

Background Art

[0003] In recent years, display devices included in mobile phones such as smartphones, tablet-type information terminals, notebook PCs (personal computers), portable game machines, and the like have been improved in various aspects. For example, developments of display devices such as increasing the resolution, improving the color reproducibility, reducing the size of the driving circuit, and reducing the power consumption have been carried out.

[0004] For example, as a switching element included in a pixel circuit of a display device, a technique of applying a transistor in which a metal oxide is included in a channel formation region can be mentioned. In particular, as the metal oxide, an In-Ga-Zn-based oxide can be used. Patent Document 1 discloses an invention in which a transistor including an In-Ga-Zn-based oxide in a channel formation region is used in a pixel circuit of a display device.

[0005] Further, for example, an invention of a source driver IC of a display device having a light-emitting element using a multi-level linear digital-to-analog conversion circuit for displaying a multi-level image is described in Patent Document 2.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

[0007] Portable information terminal devices such as mobile phones, smartphones, and tablet terminals are used in various environments. For example, in an environment with high external light illuminance, if the display luminance is low, it becomes difficult to visually recognize the image displayed on the screen. On the other hand, in an environment with low external light illuminance, if the display luminance is high, it causes glare. Therefore, the user has to change the display luminance to an optimal luminance according to the usage environment.

[0008] One aspect of the present invention is to provide a display device that enables a user to view at an optimal luminance regardless of the usage environment. Or, one aspect of the problem is to provide a display device that can display an image at an optimal luminance without the user being aware of it.

[0009] In addition, as conditions for the display device to display a high-quality image, the display device is required to have, for example, high resolution, multi-gradation, wide color gamut, etc. For example, in a display device including a light-emitting element such as an organic EL (Electro Luminescence) element or a liquid crystal element, in order to realize a multi-gradation image, it is necessary to suitably design the source driver circuit.

[0010] However, in order to handle multi-gradation image data, it is necessary to increase the resolution of the digital-to-analog conversion circuit included in the source driver circuit. When designing a digital-to-analog conversion circuit with high resolution, the circuit area of the digital-to-analog conversion circuit increases.

[0011] In addition, in a circuit section that handles analog signals, such as a digital-to-analog conversion circuit included in a source driver circuit, a higher power supply voltage is required compared to a circuit section that generates digital signals. Therefore, it has been difficult to reduce the power consumption of the source driver circuit. Also, a device in which a display panel is mounted requires a circuit that generates at least two types of power supply voltages.

[0012] One aspect of the present invention has an object of reducing the power consumption of a display device. Or, one object is to reduce the power consumption of a drive circuit of a display device. Or, one object is to provide a display device including a source driver circuit that can be driven by a single power supply voltage. Or, one object is to reduce the power consumption of a device including a display device. Or, one object is to simplify the configuration of a display device, a drive circuit, or a device including a display device.

[0013] Or, one object is to provide a pixel circuit (described as a semiconductor device in this specification etc.) that can generate multi-tone image data. Or, one aspect of the present invention has an object of providing a display device having the semiconductor device. Or, one aspect of the present invention has an object of providing an electronic device having the display device.

[0014] Or, one aspect of the present invention has an object of providing a display device having a source driver circuit with a small circuit area. Or, one aspect of the present invention has an object of providing a display device having a source driver circuit with low power consumption.

[0015] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems can be extracted from the description of the specification, drawings, claims, etc.

Means for Solving the Problems

[0016] One aspect of the present invention is a composite device having a display unit, an imaging unit, and an illuminance detection unit. The composite device has a function of detecting by the imaging unit that a user is viewing the display unit, a function of measuring the external illuminance by the illuminance detection unit when the user is viewing the display unit, and a function of determining a correction value for the display luminance according to the measured value of the external illuminance and displaying an image with the luminance based on the correction value.

[0017] Further, it is preferable that the composite device has a function of detecting a part or all of the user's face by the imaging unit, a function of estimating the user's emotion from the information of the detected part or all of the face, and a function of presenting information to the user by the display unit according to the estimated emotion.

[0018] Further, it is preferable that the composite device has an audio output means. At this time, it is preferable that the composite device has a function of presenting information to the user by using audio by the audio output means according to the estimated emotion.

[0019] One aspect of the present invention is a method for driving an electronic device having a display unit, an imaging unit, and an illuminance detection unit, the method having the following steps. A first step of detecting by the imaging unit that a user is viewing the display unit. A second step of measuring the external illuminance by the illuminance detection unit when the user is viewing the display unit. A third step of determining whether to correct the display luminance according to the measured value of the external illuminance. A fourth step of displaying an image with a predetermined luminance when it is determined in the third step not to correct the display luminance. A fifth step of determining a correction value when it is determined in the third step to correct the display luminance. A sixth step of displaying an image with the corrected luminance based on the correction value determined in the fifth step.

[0020] Also, one aspect of the present invention is a program for causing hardware having a display unit, an imaging unit, and an illuminance detection unit to execute the following operations, which includes the following steps. A first step of detecting, by the imaging unit, that the user is viewing the display unit. A second step of measuring, by the illuminance detection unit, the external illuminance when the user is viewing the display unit. A third step of determining whether to correct the luminance of the display unit according to the measured value of the external illuminance. A fourth step of displaying an image with a predetermined luminance when it is determined in the third step not to correct the luminance of the display unit. A fifth step of determining a correction value when it is determined in the third step to correct the luminance of the display unit. A sixth step of displaying an image with the corrected luminance based on the correction value determined in the fifth step.

[0021] Further, in the above driving method or program, it is preferable to include a seventh step of turning off the display of the display unit when it is detected in the first step that the user is not viewing the display unit.

[0022] Also, in the above driving method, the display unit preferably includes a display device. The display device includes pixels each including a display element. The pixel has a function of holding a first voltage corresponding to a first pulse signal input thereto, and a function of driving the display element with a third voltage obtained by adding a second voltage corresponding to a second pulse signal input thereto to the first voltage. Further, the first pulse signal is determined based on the correction value.

[0023] Also, in the above, the display element is preferably a light-emitting element, and the light-emitting element preferably emits light with a luminance corresponding to the third voltage. At this time, the light-emitting element is preferably an organic EL element or a light-emitting diode.

[0024] Alternatively, in the above, the display element is a liquid crystal element, and it is preferable that the liquid crystal orientation of the liquid crystal element changes according to the third voltage.

[0025] Further, in the above, it is preferable to have a first driving circuit that supplies the first pulse signal. At this time, in the first driving circuit, the first power supply voltage for generating the first pulse signal is preferably lower than the maximum value of the third voltage.

Advantages of the Invention

[0026] According to one aspect of the present invention, a display device that can be visually recognized by a user with optimal brightness regardless of the usage environment can be provided. Alternatively, a display device that can display an image with optimal brightness without the user being aware of it can be provided.

[0027] Further, according to one aspect of the present invention, the power consumption of the display device can be reduced. Alternatively, the power consumption of the driving circuit of the display device can be reduced. Alternatively, a display device including a source driver circuit that can be driven by a single power supply voltage can be provided. Alternatively, the power consumption of a device including the display device can be reduced. Alternatively, the configuration of the display device, the driving circuit, or the device including the display device can be simplified.

[0028] Further, according to one aspect of the present invention, a semiconductor device that can generate multi-tone image data can be provided. Also, a display device having a source driver circuit with a small circuit area can be provided. Alternatively, a display device having a source driver circuit with low power consumption can be provided.

[0029] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have to have all of these effects. Note that other effects can be extracted from the description in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0030]

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Embodiments for Carrying Out the Invention

[0031] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways, and it will be easily understood by those skilled in the art that the forms and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not to be construed as being limited to the description of the following embodiments.

[0032] In the configuration of the invention described below, the same reference numerals are commonly used among different drawings for the same part or parts having the same or similar functions, and the repeated description thereof is omitted. Also, when referring to similar functions, the hatching patterns may be the same, and there may be cases where no particular reference numerals are attached.

[0033] In each of the figures described in this specification, the size of each component, the thickness of a layer, or a region may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0034] The ordinal numbers such as "first" and "second" in this specification etc. are attached to avoid confusion of components and do not numerically limit.

[0035] In this specification etc., a display panel, which is one aspect of a display device, has a function of displaying (outputting) an image etc. on a display surface. Therefore, the display panel is one aspect of an output device.

[0036] In addition, in this specification and the like, a display panel substrate with a connector such as an FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package) attached, or a substrate with an IC mounted by a COG (Chip On Glass) method or the like may be referred to as a display panel module, a display module, or simply a display panel.

[0037] (Embodiment 1) In this embodiment, an example of an electronic device including a display device according to an aspect of the present invention and its driving method will be described.

[0038] [Configuration Example of Electronic Device] An electronic device according to an aspect of the present invention includes at least a display unit, an imaging unit, and an illuminance detection unit. Since an electronic device according to an aspect of the present invention includes various components and can drive them in a combined manner, it can also be referred to as a composite device or a composite system.

[0039] FIG. 1A shows a perspective schematic view of an electronic device 100. The electronic device 100 includes a housing 101, a display unit 102, a camera 103, an illuminance sensor 104, a speaker 105, a power button 106, an operation button 107, a microphone 108, and the like. The electronic device 100 is an electronic device that can be used, for example, as a smartphone.

[0040] The camera 103 functions as an imaging unit. The illuminance sensor 104 functions as an illuminance detection unit.

[0041] The display unit 102 includes a display device (display panel). The specific configuration of the display device will be described in detail in Embodiment 2.

[0042] The display device included in the display unit 102 has a plurality of pixels, and each pixel includes one or more display elements. The display device according to one aspect of the present invention has a function of holding a first voltage corresponding to a first pulse signal input from a source driver circuit, and a function of driving the display device with a third voltage obtained by adding a second voltage corresponding to a second pulse signal to the first voltage. As the second pulse signal, a signal based on image data can be used, and as the first pulse signal, a signal based on a luminance correction value can be used. Thereby, the display luminance of the display unit 102 can be changed based on the correction value.

[0043] Further, the display unit 102 may have a function as a touch sensor. As the touch sensor, various methods such as a capacitance method, a resistive film method, a surface acoustic wave method, an infrared method, an optical method, and a pressure sensitive method can be used. Alternatively, two or more of these may be combined and used.

[0044] Further, the display unit 102 may include a light receiving element and have a function of imaging the fingerprint of the user's fingertip touching the display unit 102. Thereby, the electronic device 100 can execute fingerprint authentication by the display unit 102. As the light receiving element, an inorganic optical sensor using silicon or the like in the active layer, or an organic optical sensor using an organic compound in the active layer is preferably used. Further, the display unit 102 can also function as a touch panel by detecting the position where the user's fingertip or the like touches.

[0045] The camera 103 is provided along the surface of the housing 101 on the same side as the display unit 102. The camera 103 can image the user's face. The electronic device 100 can determine whether the user is viewing the display unit 102 from the captured image.

[0046] The illuminance sensor 104 is provided along the surface of the housing 101 on the same side as the display unit 102. The illuminance sensor 104 can measure the illuminance of external light.

[0047] In addition, when the display unit 102 has a light receiving element capable of receiving visible light, the display unit 102 may measure the illuminance of external light. In that case, the illuminance sensor 104 may not be provided, or the illuminance of external light may be measured by one or both of the illuminance sensor 104 and the display unit 102.

[0048] The power button 106 has functions such as turning on the power of the electronic device 100, turning off the power, shifting to the sleep state, and resuming from the sleep state. Further, the operation button 107 can add various functions according to the application software to be launched, such as adjusting the volume and adjusting the brightness.

[0049] The electronic device 100 according to one aspect of the present invention can determine whether a user is viewing the display unit 102 by the camera 103. Further, when the user is viewing the display unit 102, the illuminance sensor 104 measures the illuminance of external light, and based on the measured illuminance, it is possible to determine whether to correct the display brightness of the display unit 102 and to determine the correction value. The display unit 102 can display with the optimum brightness based on the correction value. As a result, the display unit 102 can always display with the optimum illuminance without the user being aware of it.

[0050] FIG. 1B shows how the user 150 uses the electronic device 100 in three environments. In FIG. 1B, from the left, an outdoor environment on a sunny day, an indoor environment, and an outdoor environment at night are shown respectively.

[0051] Also, below FIG. 1B, the external light illuminance IL ex and the display brightness L disp displayed on the electronic device 100 are shown. In FIG. 1B, the higher illuminance or brightness is denoted as High, and the lower one is denoted as Low.

[0052] In the outdoor environment on a sunny day, since the external light illuminance IL ex is extremely high, the electronic device 100 has a display brightness L dispA correction value is determined to increase it.

[0053] On the other hand, in the outdoor environment at night, since the external illuminance IL ex is extremely low, the electronic device 100 determines a correction value to lower the display luminance L disp

[0054] Also, in the indoor environment, the external illuminance IL ex often has an appropriate value. Therefore, for example, when the predetermined display luminance L disp is the optimal luminance, it can be displayed without correction.

[0055] [Example of driving method for electronic device] Hereinafter, an example of a more specific driving method for the electronic device will be described using a flowchart.

[0056] FIG. 2 is a flowchart related to the driving method of the electronic device 100. The flowchart shown in FIG. 2 has steps S0 to S8. Hereinafter, each step will be described.

[0057] In step S0, the operation is started.

[0058] In step S1, the electronic device 100 determines whether the user is viewing the screen (display unit 102). In step S1, if it is determined that the user is viewing the screen (YES), the process proceeds to step S2. If it is determined that the user is not viewing the screen (NO), the process proceeds to step S7.

[0059] In step S1, when the user's face is displayed in the image captured by the camera 103, it can be determined that the user is viewing the screen. For example, when the user's eyes and nose are detected, a more accurate determination can be made by determining that the user is viewing the screen.

[0060] In step S2, the external illuminance IL ex ​Measure it. The measurement is performed by the illuminance sensor 104. Alternatively, the measurement is performed by one or both of the illuminance sensor 104 and the display unit 102.

[0061] In step S3, the electronic device 100 determines whether correction is necessary from the measured external illuminance IL ex If it is determined that correction is necessary, the process proceeds to step S4. If it is determined that correction is not necessary, the process proceeds to step S6.

[0062] In step S4, the electronic device 100 determines a correction value W based on the value of the external illuminance IL ex For example, when the value of the external illuminance IL ex is higher than a predetermined range, the correction value W is determined so as to increase the display luminance L disp On the other hand, when the value of the external illuminance IL ex is lower than a predetermined range, the correction value W is determined so as to lower the display luminance L disp

[0063] The correction value W can be determined, for example, by referring to a data table in which the relationship between the value of the external illuminance IL ex and the value of the correction value W is defined. Also, the correction value W is preferably determined according to the image data to be displayed. For example, different correction values W can be used when displaying a bright image and when displaying a dark image. Also, different correction values W may be used for each pixel or each area of the display unit 102.

[0064] In step S5, a corrected image is displayed on the display unit 102.

[0065] More specifically, a corrected image is displayed using a second pulse signal based on the image data output from a source driver included in the display device provided in the display unit 102 and a first pulse signal based on the correction value W.

[0066] In step S6, an image is displayed based on the image data.

[0067] ​ In step S6, an image based on the input image data can be displayed at a default luminance without performing luminance correction. Here, the default luminance can be the luminance preset by the manufacturer or the like at the time of shipment of the electronic device 100, or the luminance set by the user.

[0068] In step S7, the display is turned off.

[0069] In step S7, since the user is not viewing the screen, the power consumption of the electronic device 100 can be reduced by turning off the display.

[0070] In step S8, the operation is terminated.

[0071] Note that after step S8, it may be possible to transition to step S2. As a result, the electronic device 100 can always perform display at an optimal luminance.

[0072] Also, after step S8, it may be possible to transition to step S1. As a result, since it is detected that the user has looked away from the screen and the display can be turned off, the power consumption can be reduced. Also, when the user views the screen, the display of the image can be started, so that the power consumption can be reduced without causing stress to the user.

[0073] The above is the description of the example of the driving method of the electronic device.

[0074] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0075] (Embodiment 2) In this embodiment, a semiconductor device according to an aspect of the present invention and a display device having the semiconductor device will be described.

[0076] <Circuit configuration of the display device> First, an example of the configuration of the display device will be described. FIG. 3 is a block diagram showing an example of the display device. The display device DD includes a display unit PA, a source driver circuit SD, and a gate driver circuit GD.

[0077] The display unit PA has a plurality of pixels PIX. Note that in FIG. 3, only one of the plurality of pixels PIX included in the display unit PA is illustrated, and the other pixels PIX are omitted. Further, the plurality of pixels PIX included in the display unit PA are preferably arranged in a matrix.

[0078] In FIG. 3, the pixel PIX is electrically connected to the source driver circuit SD via a wiring DL. In addition, the pixel PIX is electrically connected to the gate driver circuit GD via a wiring GL. Note that since the display unit PA has a plurality of pixels PIX, a plurality of pixels PIX electrically connected to the wiring DL may be provided. Similarly, a plurality of pixels PIX electrically connected to the wiring GL may be provided. Further, each of the wiring DL and the wiring GL may be provided in a plurality according to the number of pixels PIX included in the display unit PA. Furthermore, depending on the circuit configuration of the pixel PIX, a configuration in which a plurality of wirings DL or a plurality of wirings GL are electrically connected to one pixel PIX may be employed.

[0079] The pixel PIX can be configured to have one or more sub-pixels. For example, the pixel PIX can have a configuration with one sub-pixel (any one color such as red (R), green (G), blue (B), white (W), etc.), a configuration with three sub-pixels (such as three colors of red (R), green (G), and blue (B)), or a configuration with four or more sub-pixels (for example, four colors of red (R), green (G), blue (B), white (W), or four colors of red (R), green (G), blue (B), yellow (Y), etc.). Note that the color elements applied to the sub-pixels are not limited to the above, and cyan (C) and magenta (M) etc. may be combined as necessary.

[0080] The pixel PIX includes at least one or more display elements. As the display elements, various display elements such as a light-emitting element, a liquid crystal element, a microcapsule, an electrophoretic element, an electro-wetting element, an electro-fluidic element, an electrochromic element, and a MEMS element can be used.

[0081] As the light-emitting element, an organic EL (Electro Luminescence) element, an LED (Light Emitting Diode) element, an inorganic EL element, etc. can be used.

[0082] As for the LED element, there are macro LEDs (also called giant LEDs), mini LEDs, and micro LEDs from those with a large size. Here, those with a side dimension of the LED chip exceeding 1 mm are called macro LEDs, those larger than 100 μm and less than or equal to 1 mm are called mini LEDs, and those less than or equal to 100 μm are called micro LEDs. As the LED element applied to the pixel PIX, it is particularly preferable to use a mini LED or a micro LED. By using a micro LED, an extremely high-definition display device can be realized.

[0083] The source driver circuit SD has a function of generating image data for input to the pixel PIX included in the display unit PA and a function of transmitting the image data to the pixel PIX.

[0084] The source driver circuit SD can include, for example, a shift register SR, a latch circuit LAT, a level shift circuit LVS, a digital-to-analog conversion circuit DAC, an amplifier circuit AMP, and a data bus wiring DB. In FIG. 3, the output terminal of the shift register SR is electrically connected to the clock input terminal of the latch circuit LAT, the input terminal of the latch circuit LAT is electrically connected to the data bus wiring DB, the output terminal of the latch circuit LAT is electrically connected to the input terminal of the level shift circuit LVS, the output terminal of the level shift circuit LVS is electrically connected to the input terminal of the digital-to-analog conversion circuit DAC, the output terminal of the digital-to-analog conversion circuit DAC is electrically connected to the input terminal of the amplifier circuit AMP, and the output terminal of the amplifier circuit AMP is electrically connected to the display unit PA.

[0085] Note that the latch circuit LAT, the level shift circuit LVS, the digital-to-analog conversion circuit DAC, and the amplifier circuit AMP shown in FIG. 3 are provided for one wiring DL. That is, according to the number of the wirings DL, it is necessary to provide a plurality of each of the latch circuit LAT, the level shift circuit LVS, the digital-to-analog conversion circuit DAC, and the amplifier circuit AMP. In this case, the shift register SR may be configured to sequentially transmit a pulse signal to each of the clock input terminals of the plurality of latch circuits LAT.

[0086] The data bus wiring DB is a wiring for transmitting a digital signal including image data for input to the display unit PA. The image data has a gradation level. The larger the gradation level is, the more smoothly the change in color or brightness can be expressed as a natural gradation, and a more natural image can be displayed on the display unit PA. However, the larger the gradation level is, the larger the data amount of the image data becomes, and it is necessary to use a digital-to-analog conversion circuit with a high resolution.

[0087] A digital signal including image data is input to the input terminal of the latch circuit LAT from the data bus wiring DB. Then, the latch circuit LAT performs either the operation of holding the image data or outputting the held image data from the output terminal according to the signal transmitted from the shift register SR.

[0088] The level shift circuit LVS has a function of converting an input signal into an output signal with a larger amplitude voltage or a smaller amplitude voltage. In FIG. 3, the level shift circuit LVS has a role of converting the amplitude voltage of the digital signal including the image data sent from the latch circuit LAT into an amplitude voltage at which the digital-to-analog conversion circuit DAC operates properly.

[0089] The digital-to-analog conversion circuit DAC has a function of converting a digital signal including the input image data into an analog signal and a function of outputting the analog signal from the output terminal. In particular, when displaying multi-tone image data on the display unit PA, the digital-to-analog conversion circuit DAC needs to be a high-resolution digital-to-analog conversion circuit.

[0090] The amplifier circuit AMP has a function of amplifying the analog signal input to the input terminal and outputting it to the output terminal. By providing the amplifier circuit AMP between the digital-to-analog conversion circuit DAC and the display unit PA, the image data can be stably sent to the display unit PA. As the amplifier circuit AMP, a voltage follower circuit having an operational amplifier or the like can be applied. When a circuit having a differential input circuit is used as the amplifier circuit, it is preferable that the offset voltage of the differential input circuit be as close to 0V as possible.

[0091] By performing the above-described operations, the source driver circuit SD can convert a digital signal including image data sent from the data bus wiring DB into an analog signal and transmit it to the display unit PA. The source driver circuit SD has a function of generating a first signal Sig1 and a second signal Sig2, which are analog signals, and supplying them to the pixel PIX via the wiring DL. Here, the first signal Sig1 and the second signal Sig2 are pulse signals having amplitudes corresponding to the image data, respectively.

[0092] The gate driver circuit GD has a function of selecting a pixel PIX that is the input destination of the image data among a plurality of pixels PIX included in the display unit PA.

[0093] As a method of inputting image data to the display unit PA, for example, the gate driver circuit GD transmits a selection signal to a plurality of pixels PIX electrically connected to a certain wiring GL, turns on the write switching elements of the image data of the plurality of pixels PIX, and then transmits the image data from the source driver circuit SD to the plurality of pixels PIX via the wiring DL to perform the writing.

[0094] Note that one aspect of the present invention is not limited to the configuration of the display device DD shown in FIG. 3. One aspect of the present invention can be, for example, a configuration in which the components of the display device DD are appropriately changed according to situations such as design specifications and purposes.

[0095] By the way, when displaying a multi-tone image on the display unit PA, the resolution of the digital-to-analog conversion circuit DAC may be increased. In this case, however, since the digital-to-analog conversion circuit DAC becomes large, the circuit area of the source driver circuit SD may become large. In order to reduce the circuit area of the source driver circuit SD, if circuit elements such as transistors and capacitor elements included in the circuit of the source driver circuit SD are made small, the electrical characteristics of the circuit elements may be impaired due to the influence of parasitic resistance and the influence of variations in the structure caused during the fabrication of the circuit elements.

[0096] One aspect of the present invention has been made in view of the above, and is configured to vary the potential of the holding unit of the image data of the pixel PIX to a potential with a resolution higher than that of the digital-to-analog conversion circuit DAC by capacitive coupling. As a result, it is not necessary to increase the resolution of the digital-to-analog conversion circuit, so a digital-to-analog conversion circuit with a low resolution can be used. Therefore, the circuit area of the source driver circuit SD including the digital-to-analog conversion circuit DAC can be reduced, and the power consumption of the source driver circuit SD can be reduced.

[0097] FIG. 3 shows an example in which the display device DD has the system circuit SYS. The system circuit SYS has a function of controlling the operation of the source driver circuit SD. For example, the system circuit SYS has a function of supplying various signals such as a data signal, a clock signal, and a start pulse signal, and a power supply voltage to the source driver circuit SD.

[0098] Here, an example is shown in which the system circuit SYS includes a power supply generation unit PU and a control unit CU.

[0099] The control unit CU has at least a logic circuit. For example, it can be configured to have a processor such as a CPU (Central Processing Unit) or a GPU (Graphics Processing Unit).

[0100] The power supply generation unit PU has a function of generating a power supply voltage VDD for supplying to the control unit CU and the source driver circuit SD. For example, the power supply generation unit PU can convert the power supplied from a battery, a power plug, etc., and generate the power supply voltage VDD.

[0101] As will be described later, the pixel PIX included in the display device DD can generate a voltage obtained by adding the amplitudes of two signals (the first signal Sig1 and the second signal Sig2) and drive the display element using these signals. Therefore, when the pixel PIX is displayed at the maximum gradation value, the voltages of the first signal Sig1 and the second signal Sig2 supplied by the source driver circuit SD can be set to half of the voltage obtained by adding these signals or a voltage in the vicinity thereof.

[0102] Therefore, the source driver circuit SD does not require a high power supply voltage for generating an analog signal and can operate with a single power supply voltage VDD. In FIG. 3, the power supply voltage VDD supplied from the system circuit SYS to the source driver circuit SD can be shared with the power supply voltage VDD for driving the control unit CU. The power supply voltage VDD supplied from the system circuit SYS is supplied to the shift register SR, latch circuit LAT, level shift circuit LVS, digital-to-analog conversion circuit DAC, and amplifier circuit AMP within the source driver circuit SD. At this time, the level shift circuit LVS can also be omitted.

[0103] With such a configuration, a booster circuit such as a DC-DC converter for boosting the power supply voltage is not required between the system circuit SYS and the source driver circuit SD. That is, the power supply voltage VDD supplied from the system circuit SYS to the source driver circuit SD is supplied to the source driver circuit SD as it is without being boosted and is used for generating the first signal Sig1 and the second signal Sig2.

[0104] In addition, since it is not necessary to provide a booster circuit for boosting the power supply voltage VDD within the source driver circuit SD, not only can the circuit configuration of the source driver circuit SD be simplified, but also the power consumption of the source driver circuit SD can be reduced. That is, the source driver circuit SD can generate the first signal Sig1 and the second signal Sig2 without boosting the power supply voltage VDD.

[0105] For example, when one of the drive voltages of each circuit including the control unit CU in the system circuit SYS is 1.8V, 2.5V, 3.3V, or a voltage in the vicinity thereof, the voltage can be supplied as the power supply voltage VDD to the source driver circuit SD. As a result, since the power supply generation unit PU in the system circuit SYS does not need to generate a high power supply voltage for supplying to the source driver circuit SD, the circuit configuration can be simplified.

[0106] With such a configuration, since the source driver circuit SD can be driven at a low voltage, it is possible to significantly reduce the power consumption of the source driver circuit SD and the display device DD.

[0107] In addition, in this specification and the like, when a voltage is expressed as a voltage in the vicinity of a certain voltage, it is assumed to be a voltage including a range of plus or minus 20% of the voltage.

[0108] <Circuit configuration of pixel> An example of the circuit configuration of the pixel PIX, which is a semiconductor device according to one aspect of the present invention, will be described.

[0109] The pixel PIX illustrated below has a function of holding a first voltage corresponding to a first pulse signal (first signal Sig1) input from the source driver circuit SD, and a second voltage corresponding to a second pulse signal (second signal Sig2). The pixel PIX has a function of driving the display element with a third voltage obtained by adding the second voltage to the first voltage. That is, the pixel PIX can drive the display element with a voltage higher than the maximum voltages of the first pulse signal and the second pulse signal input from the source driver circuit SD.

[0110] For example, when a light-emitting element is used as the display element, an image can be displayed by causing the light-emitting element to emit light with a luminance corresponding to the third voltage. When a liquid crystal element is used as the display element, the alignment of the liquid crystal is changed according to the third voltage, and thereby the transmittance of light from a light source such as a backlight is changed, so that an image can be displayed.

[0111] In addition, the power supply voltage VDD used by the source driver circuit SD shown in FIG. 3 to generate the first signal Sig1 and the second signal Sig2 can be set to a voltage lower than the maximum value of the third voltage that can be generated by the pixel PIX (for example, the value of the third voltage when displaying at the highest gradation). Preferably, the power supply voltage VDD can be set to half (1 / 2) of the maximum value of the third voltage, or a voltage in the vicinity thereof.

[0112] The pixel PIX shown in FIG. 4A is an example in the case where a light-emitting element is applied as a display element.

[0113] The pixel PIX illustrated in FIG. 4A includes transistors Tr1 to Tr5, a capacitor element C1, a capacitor element C2, and a light-emitting element LD. In addition, wirings DL, WDL, GL1 to GL3, VL, AL, and CAT are electrically connected to the pixel PIX.

[0114] Each of the transistors Tr1, Tr2, Tr4, and Tr5 functions as a switching element. The transistor Tr3 functions as a driving transistor that controls the current flowing through the light-emitting element LD. In addition, the transistors Tr1 to Tr5 can adopt the configuration described in Embodiment 3.

[0115] Each of the wirings DL and WDL is a wiring for transmitting image data to the pixel PIX and corresponds to the wiring DL of the display device DD in FIG. 3. In addition, each of the wirings GL1 to GL3 is a selection signal line for the pixel PIX and corresponds to the wiring GL of the display device DD in FIG. 3.

[0116] The wiring VL is a wiring for applying a predetermined potential to a specific node in the pixel PIX. In addition, the wiring AL is a wiring for supplying a current to flow through the light-emitting element LD.

[0117] The wiring CAT is a wiring for applying a predetermined potential to the output terminal of the light-emitting element LD. As the predetermined potential, for example, a reference potential, a low-level potential, a potential lower than these, etc. can be used.

[0118] The first terminal of the transistor Tr1 is electrically connected to the first terminal of the capacitor element C1, the second terminal of the transistor Tr1 is electrically connected to the wiring DL, and the gate of the transistor Tr1 is electrically connected to the wiring GL1. The first terminal of the transistor Tr2 is electrically connected to the gate of the transistor Tr3, the second terminal of the capacitor element C1, and the first terminal of the capacitor element C2. The second terminal of the transistor Tr2 is electrically connected to the wiring WDL, and the gate of the transistor Tr2 is electrically connected to the wiring GL2.

[0119] In this embodiment, the electrical connection point between the first terminal of the transistor Tr1 and the first terminal of the capacitor element C1 is referred to as the node ND1, and the electrical connection point between the first terminal of the transistor Tr2, the gate of the transistor Tr3, the second terminal of the capacitor element C1, and the first terminal of the capacitor element C2 is referred to as the node ND2.

[0120] Here, the voltage (potential) written from the wiring WDL to the node ND2 via the transistor Tr2 corresponds to the first voltage (potential). Also, the voltage written from the wiring DL to the node ND1 via the transistor Tr1 corresponds to the second voltage. Further, when the second voltage is written to the node ND1, the second voltage is added to the first voltage by capacitive coupling via the capacitor element C1, and as a result, the voltage of the node ND2 changes. The voltage of the node ND2 generated as a result corresponds to the third voltage.

[0121] The first terminal of transistor Tr3 is electrically connected to wiring AL, and the second terminal of transistor Tr3 is electrically connected to the first terminal of transistor Tr4, the first terminal of transistor Tr5, and the second terminal of capacitor element C2. The second terminal of transistor Tr4 is electrically connected to wiring VL, and the gate of transistor Tr4 is electrically connected to wiring GL1. The second terminal of transistor Tr5 is electrically connected to the input terminal of light-emitting element LD, and the gate of transistor Tr5 is electrically connected to wiring GL3. The output terminal of light-emitting element LD is electrically connected to wiring CAT.

[0122] In pixel PIX of FIG. 4A, transistors Tr1, Tr2, and Tr5 are preferably OS transistors. In particular, the OS transistor is preferably an oxide having at least one of indium, element M (element M is aluminum, gallium, yttrium, or tin), and zinc in the channel formation region. Further, the oxide will be described in detail in Embodiment 4. By applying such an OS transistor to transistors Tr1, Tr2, and Tr5, the off-current of the transistor can be made very low. When holding data at the first terminal (node ND1) of capacitor element C1, by using transistor Tr1 as an OS transistor, it is possible to prevent the data held at node ND1 from being destroyed by the off-current. Similarly, when holding data at the gate of transistor Tr3, the second terminal of capacitor element C1, and the first terminal of capacitor element C2 (node ND2), by using transistor Tr2 as an OS transistor, it is possible to prevent the data held at node ND2 from being destroyed by the off-current. Further, when temporarily stopping the light emission of light-emitting element LD, by using transistor Tr5 as an OS transistor, it is possible to prevent the light emission of light-emitting element LD due to the off-current.

[0123] As the transistors Tr3 and Tr4, for example, transistors having silicon in the channel formation region can be applied (hereinafter referred to as Si transistors). As the silicon, for example, hydrogenated amorphous silicon, microcrystalline silicon, or polycrystalline silicon can be used.

[0124] In addition, as the transistors Tr3 and Tr4, OS transistors can be applied. In particular, by making all of the transistors Tr1 to Tr5 OS transistors, each transistor can be formed simultaneously, so that the manufacturing process of the display unit PA may be shortened. That is, since the production time of the display unit PA can be reduced, the production number per unit time can be increased.

[0125] <<Operation Example>> Next, an operation example of the pixel PIX illustrated in FIG. 4A will be described. In order to transmit image data to the pixel PIX in FIG. 4A, it is assumed that the wiring DL and the wiring WDL of the pixel PIX are electrically connected to the source driver circuit SD in FIG. 3.

[0126] FIG. 6 is a timing chart showing an operation example of the pixel PIX illustrated in FIG. 4A. The timing chart shown in FIG. 6 shows changes in the potentials of the wiring DL, the wiring WDL, the wiring VL, the wirings GL1 to GL3, the node ND1, and the node ND2 at times T1 to T8 and times in the vicinity thereof. Note that high described in FIG. 6 indicates a high-level potential, and low indicates a low-level potential. Also, V described in FIG. 6 GND refers to the reference potential.

[0127] Note that the wiring VL is always applied with V GND at times T1 to T8 and times in the vicinity thereof.

[0128] In this operation example, transistors Tr1, Tr2, Tr4, and Tr5 operate in the linear region unless otherwise specified. That is, the gate voltage, source voltage, and drain voltage of transistors Tr1, Tr2, Tr4, and Tr5 are appropriately biased to voltages within the range of operation in the linear region.

[0129] Also, in this operation example, transistor Tr3 operates in the saturation region unless otherwise specified. That is, the gate voltage, source voltage, and drain voltage of transistor Tr3 are appropriately biased to voltages within the range of operation in the saturation region. Even if the operation of transistor Tr3 deviates from the ideal operation in the saturation region, if the accuracy of the output current can be obtained within the desired range, the gate voltage, source voltage, and drain voltage of transistor Tr3 are regarded as being appropriately biased.

[0130] [Before time T1] Before time T1, a low-level potential is applied to wirings GL1 and GL2, and a high-level potential is applied to wiring GL3. When the potential of wiring GL1 is at a low level, a low-level potential is applied to the gates of transistors Tr1 and Tr4, respectively, so that transistors Tr1 and Tr4 are turned off. That is, the state between wiring DL and node ND1 becomes non-conductive. Similarly, when the potential of wiring GL2 is at a low level, a low-level potential is applied to the gate of transistor Tr2, so that transistor Tr2 is turned off. That is, the state between wiring WDL and node ND2 becomes non-conductive. Further, when the potential of wiring GL3 is at a high level, a high-level potential is applied to the gate of transistor Tr5, so that transistor Tr5 is turned on. That is, the input terminal of light-emitting element LD and the first terminal of transistor Tr5 are in an electrically connected state.

[0131] Incidentally, when the difference (gate-source voltage) between the potential of node ND2 and the potential of the source of transistor Tr3 is higher than the threshold voltage of transistor Tr3, transistor Tr3 turns on, and the current flowing between the source and drain of transistor Tr3 is determined according to the gate-source voltage of transistor Tr3. At this time, when the second terminal of transistor Tr3 is the source, current flows from wiring AL, through transistor Tr3 and transistor Tr5, to the input terminal of light-emitting element LD. As a result, light-emitting element LD emits light. In the timing chart shown in FIG. 6, the potential of node ND2 is described as V0 as the potential at which transistor Tr3 is in the off state (that is, the difference between V0 and the potential of the source of transistor Tr3 is lower than the threshold voltage of transistor Tr3, and light-emitting element LD also does not emit light).

[0132] Also, for simplicity of explaining this operation example, the potential of node ND1 before time T1 is also set to V0.

[0133] Before time T1, it is assumed that no image data is sent from source driver circuit SD to pixel PIX, and V GND is applied to wiring DL and wiring WDL.

[0134] [Time T1] At time T1, a low-level potential is applied to wiring GL3. Therefore, between time T1 and time T2, a low-level potential is applied to the gate of transistor Tr5, so transistor Tr5 turns off. As a result, regardless of whether transistor Tr3 is in the on state or the off state, no current flows to the input terminal of light-emitting element LD, so light-emitting element LD does not emit light.

[0135] [Time T2] At time T2, a high-level potential is applied to wiring GL1. Therefore, between time T2 and time T3, a high-level potential is applied to the gates of transistor Tr1 and transistor Tr4 respectively, so that transistor Tr1 and transistor Tr4 are turned on.

[0136] When transistor Tr1 is turned on, wiring DL and node ND1 are electrically connected. Therefore, the potential of node ND1 is V GND becomes. Also, when transistor Tr4 is turned on, wiring VL and the second terminal of capacitor element C2 are electrically connected. Therefore, the potential of the second terminal of capacitor element C2 is V GND becomes.

[0137] In addition, since the second terminal (node ND2) of capacitor element C1 is in a floating state, when the potential of node ND1 changes, the potential of node ND2 also changes due to capacitive coupling. Note that the amount of change in the potential of node ND2 is determined by the amount of change in the potential of node ND1, the capacitance of capacitor element C1, etc. In this operation example, since the potential of node ND1 drops from V0 to V GND decreases, the potential of node ND2 drops from V0.

[0138] [Time T3] At time T3, a high-level potential is applied to wiring GL2. Therefore, between time T3 and time T4, a high-level potential is applied to the gate of transistor Tr2, so that transistor Tr2 is turned on.

[0139] When transistor Tr2 is turned on, wiring WDL and node ND2 are electrically connected. Therefore, the potential of node ND2 is V GND becomes. Since transistor Tr1 is turned on, the potential of node ND1 does not fluctuate due to the change in the potential of node ND2. Similarly, since transistor Tr4 is turned on, the potential of the second terminal of capacitor element C2 also does not fluctuate due to the change in the potential of node ND2.

[0140] [Time T4] At time T4, an analog signal as image data is transmitted from the source driver circuit SD to the wiring DL and the wiring WDL. Here, as the potential of the analog signal, V data is input to the wiring DL and the wiring WDL.

[0141] Since the transistor Tr1 is in the on state, V data is applied from the wiring DL to the first terminal (node ND1) of the capacitor element C1. Also, since the transistor Tr2 is in the on state, V data is applied from the wiring WDL to the gate of the transistor Tr3, the second terminal of the capacitor element C1, and the first terminal (node ND2) of the capacitor element C2. Note that the potential of the second terminal of the capacitor element C2 does not fluctuate due to the change in the potentials of the node ND1 and the node ND2 because the transistor Tr4 is in the on state.

[0142] [Time T5] At time T5, a low-level potential is applied to the wiring GL2. Therefore, a low-level potential is applied to the gate of the transistor Tr2 between time T5 and time T6, so that the transistor Tr2 is turned off.

[0143] When the transistor Tr2 is turned off, the connection between the wiring WDL and the node ND2 is electrically disconnected. Therefore, the node ND2 is in a floating state.

[0144] [Time T6] At time T6, a signal obtained by adding a potential of height ΔV data to the potential V data input between time T4 and time T5 is transmitted from the source driver circuit SD to the wiring DL and the wiring WDL. That is, the potential of each of the wiring DL and the wiring WDL becomes V data +ΔV data .

[0145] Since transistor Tr1 is in the on state, +ΔV data is applied from wiring DL to node ND1. That is, the potential of node ND1 varies from V data to V data +ΔV data between time T4 and time T6. data +ΔV data Since transistor Tr2 is in the off state, +ΔV data is not applied from wiring WDL to node ND2. However, because the potential of node ND1 varies from V data to V data +ΔV data and node ND2 is in a floating state, the potential of node ND2 also varies due to the capacitive coupling of capacitor element C1 as the potential of node ND1 varies. In the timing chart of Fig. 6, the amount of variation in the potential of node ND2 is described as ΔV g , but ΔV g can be estimated by the following equation (E1). data V data +ΔV data

[0146] data +ΔV data data V data +ΔV data Therefore, when the potential of node ND2 is V ND2 , the value of the capacitance of capacitor element C1 is C1, and the value of the capacitance of capacitor element C2 is C2, V ND2 is expressed by the following equation (E2). g ΔV g

[0147]

Equation

[0148] ND2 ND2

[0149]

Equation

[0150] Note that at time T6, the potential of wiring WDL is set to V data +ΔV data . However, in the circuit configuration example shown in Fig. 4A, the potential V data +ΔV data of wiring WDL data +ΔV data data +ΔV data ​​​​​​​​is not input to any element. Therefore, in the circuit configuration example shown in FIG. 4A, at time T6, the potential of the wiring WDL does not have to be V data +ΔV data .

[0151] [Time T7] At time T7, a low-level potential is applied to the wiring GL1. Therefore, between time T7 and time T8, a low-level potential is applied to the gate of the transistor Tr1, so that the transistor Tr1 is turned off. For this reason, the node ND1 becomes a floating state, and the potential of the node ND1 is held by the capacitive element C1.

[0152] Also, between time T7 and time T8, a low-level potential is applied to the gate of the transistor Tr4, so that the transistor Tr4 is turned off. At this time, the potential of the second terminal of the capacitive element C2 is V GND , and the potential of the gate (node ND2) of the transistor Tr3 is V ND2 . Therefore, when V ND2 -V GND is higher than the threshold voltage, the transistor Tr3 is turned on. Also, the current flowing between the source and drain of the transistor Tr3 is determined according to V ND2 -V GND .

[0153] [Time T8] At time T8, a high-level potential is applied to wiring GL3. Therefore, after time T8, a high-level potential is applied to the gate of transistor Tr5, causing transistor Tr5 to turn on. As a result, the current flowing from wiring AL is input to the input terminal of light-emitting element LD through transistors Tr3 and Tr5, causing light-emitting element LD to emit light. At this time, a voltage is applied between the input terminal and the output terminal of light-emitting element LD, and a predetermined potential is applied to wiring CAT. Therefore, the potential of the electrical connection point between the second terminal of transistor Tr3, the first terminal of transistor Tr4, the first terminal of transistor Tr5, and the second terminal of capacitor element C2 increases. And since each of node ND1 and node ND2 is in a floating state, when the potential of the electrical connection point increases, the potentials of node ND1 and node ND2 may also increase by capacitive coupling. In the timing chart of FIG. 6, the potentials of node ND1 and node ND2 after time T8 are shown to be higher than the potentials of node ND1 and node ND2 between time T7 and time T8.

[0154] Note that the luminance of light-emitting element LD is determined by the current flowing through light-emitting element LD. According to Kirchhoff's law, the current flowing through light-emitting element LD is approximately equal to the current flowing between the source and drain of transistor Tr3. Therefore, the luminance of light-emitting element LD is determined by the gate-source voltage of transistor Tr3.

[0155] As described above, for the pixel PIX illustrated in FIG. 4A, by performing the operations at time T1 to time T8 and the times in the vicinity thereof in the timing chart of FIG. 6, a potential with a resolution higher than that of digital-to-analog conversion circuit DAC can be applied to the holding part (node ND2) of the image data of pixel PIX.

[0156] <<Specific Example>> Here, an example of displaying image data with more gradations than the image data output from digital-to-analog conversion circuit DAC on display unit PA of display device DD will be described according to the above-described operation example.

[0157] In this example, a 6-bit digital-to-analog conversion circuit is provided as the digital-to-analog conversion circuit DAC of the source driver circuit SD, and the ratio of the capacitance values of the capacitor elements C1 and C2 included in the pixel PIX is set to C1:C2 = 1:15.

[0158] By using a 6-bit digital-to-analog conversion circuit as the digital-to-analog conversion circuit DAC, the V written to the node ND1 and the node ND2 of the pixel PIX data can take values from "000000" to "111111" in binary notation. Here, assuming the voltage value of "111111" is 6.3V, the V data that can be output by the digital-to-analog conversion circuit DAC ranges from 0V to 6.3V in 0.1V increments.

[0159] Therefore, in the above operation example, between time T4 and time T5, the node ND1 and the node ND2 of the pixel PIX can be written with V in the range from 0V to 6.3V data .

[0160] [V data takes values from 0V to 4.8V] First, the case where V in the range from 0V to 4.8V (from "000000" to "110000" in binary notation) is written to the node ND1 and the node ND2 of the pixel PIX will be described. data

[0161] Since the ratio of the capacitance values of the capacitor elements C1 and C2 is C1:C2 = 1:15, Equation (E1) becomes the following Equation (E3).

[0162] [Equation]

[0163] Here, ΔV datais assumed to be able to take values from "000000" to "001111" in binary notation. At this time, ΔV data can take voltage values in the range from 0 V to 1.5 V in 0.1 V increments. That is, from Equation (E3), ΔV g can take values from 0 V to 0.09375 V in 0.00625 V increments.

[0164] Therefore, in the above operation example, between time T6 and time T7, the potential of the node ND2 of the pixel PIX can take values from 0 V to 4.8 + 0.09375 V in 0.00625 V increments according to Equations (E2) and (E3).

[0165] [when V data takes values from 4.9 V to 6.3 V] Next, the case where V in the range from 4.9 V to 6.3 V (from "110001" to "111111" in binary notation) is written to the node ND1 and the node ND2 of the pixel PIX will be described. data is written will be described.

[0166] The ratio of the capacitance values of the capacitor element C1 and the capacitor element C2 is the same as "when V data takes values from 0 V to 4.8 V", so Equation (E3) can also be used in this case.

[0167] Here, ΔV data is assumed to take voltage values in the range from -1.5 V to 0 V in 0.1 V increments, for example. That is, ΔV data is a negative value, and V data + ΔV data is assumed to be able to take values from 3.4 V to 6.3 V (from "100010" to "111111" in binary notation).

[0168] At this time, from Equation (E3), ΔV g can take values from -0.09375 V to 0 V in 0.00625 V increments.

[0169] Therefore, in the above operation example, between time T6 and time T7, the potential of the node ND2 of the pixel PIX can take values from 4.9 - 0.09375V to 6.3V in steps of 0.00625V according to equations (E2) and (E3).

[0170] Summarizing the above specific example, as a digital - to - analog conversion circuit DAC, a digital - to - analog conversion circuit (6 - bit) capable of outputting analog values from 0V to 6.3V in steps of 0.1V is provided. By setting the ratio of the capacitance values of the capacitance elements C1 and C2 included in the pixel PIX to C1:C2 = 1:15, a potential from 0V to 6.3V in steps of 0.00625V can be applied to the node ND2.

[0171] That is, in the pixel PIX shown in FIG. 4A, by performing the above operation example, a finer voltage value that cannot be output by the 6 - bit digital - to - analog conversion circuit DAC can be applied to the node ND2. In the above specific example, the digital - to - analog conversion circuit DAC outputs a potential in steps of 0.1V, but a potential in steps of 0.00625V can be written to the node ND2 of the pixel PIX. In other words, a potential (image data) with a resolution higher than that of the 6 - bit digital - to - analog conversion circuit DAC can be written to the pixel PIX.

[0172] In the above specific example, the ΔV provided by the 6 - bit digital - to - analog conversion circuit DAC data corresponds to the upper 6 bits of the image data, and the ΔV applied to the node ND2 by the capacitive coupling of the pixel PIX g corresponds to the lower 4 bits of the image data. That is, the pixel PIX in FIG. 4A can complement the upper 6 - bit image data provided by the digital - to - analog conversion circuit DAC with the lower 4 - bit image data.

[0173] Note that the configuration of pixel PIX according to one aspect of the present invention and the configuration of the wiring electrically connected to pixel PIX are not limited to the configuration illustrated in FIG. 4A. One aspect of the present invention can be, for example, appropriately modifying the components of pixel PIX and each wiring according to circumstances such as design specifications and purposes.

[0174] As a specific example, at least one of transistors Tr1 to Tr5 included in pixel PIX of FIG. 4A may be a transistor having a back gate. By applying a potential to the back gate of the transistor, the threshold voltage of the transistor can be increased or decreased.

[0175] Also, in the same transistor, by electrically connecting the gate and the back gate, the source-drain current flowing when the transistor is in the on state can be made larger. FIG. 4B shows a configuration in which all of transistors Tr1 to Tr5 included in pixel PIX of FIG. 4A are transistors having a back gate, and in the same transistor, the gate and the back gate are electrically connected.

[0176] Also, as another specific example, wiring DL and wiring WDL may be combined into one wiring (see FIG. 5). Note that the operation method of pixel PIX illustrated in FIG. 5 takes the above-described operation example into consideration.

[0177] Also, as another specific example, in the present embodiment, FIGS. 4A, 4B, and 5 are illustrated by taking a pixel circuit including a light-emitting element such as an EL element as an example, but one aspect of the present invention is not limited thereto. One aspect of the present invention can be, for example, providing a capacitive element for a pixel circuit including a liquid crystal element in the same manner as FIGS. 4A, 4B, and 5, increasing or decreasing the potential of one terminal of the liquid crystal element by capacitive coupling, and providing an analog value finer than the resolution of digital-to-analog conversion circuit DAC.

[0178] FIG. 7A shows an example in the case where a liquid crystal element LC is used as a display element. In the following, mainly the parts different from the above will be described, and the above description can be cited for the overlapping parts.

[0179] The pixel PIX shown in FIG. 7A includes a transistor Tr1, a transistor Tr2, a transistor Tr6, a capacitor element C1, a capacitor element C3, and a liquid crystal element LC. Further, wiring GL1, wiring GL2, wiring GL4, wiring DL, wiring WDL, wiring VCC, and wiring CAT are connected to the pixel PIX.

[0180] For the transistor Tr6, the gate is electrically connected to the wiring GL4, one of the source or the drain is electrically connected to the node ND2, and the other is electrically connected to one electrode of the capacitor element C3 and one electrode of the liquid crystal element LC. For the capacitor element C3, the other electrode is electrically connected to the wiring VCC. For the liquid crystal element LC, the other electrode is electrically connected to the wiring CAT.

[0181] The wiring VCC is a wiring that applies a predetermined potential to the other electrode of the capacitor element C3. As the potential applied to the wiring VCC, for example, a fixed potential such as a common potential, a reference potential, or a ground potential can be applied. The wiring VCC may be shared with the wiring CAT and configured to have the same potential applied.

[0182] The transistor Tr6 can have a function as a switch for controlling the operation of the liquid crystal element LC. When the signal written from the wiring WDL to the node ND2 is larger than the threshold for operating the liquid crystal element LC, the liquid crystal element LC may operate before the image signal is written from the wiring DL. Therefore, it is preferable to provide the transistor Tr6, and after the potential of the node ND2 is determined, the transistor Tr6 is turned on by the signal applied to the wiring GL4 to operate the liquid crystal element LC.

[0183] The pixel PIX shown in FIG. 7B has a configuration in which the transistor Tr6 and the wiring GL4 are omitted from the configuration shown in FIG. 7A.

[0184] The transistor Tr6 in FIG. 7A is a switch for preventing the liquid crystal element LC from operating inadvertently. However, if the liquid crystal element LC can be prevented from being visually recognized even when it operates, the transistor Tr6 can be omitted. For example, an operation such as turning off the backlight during the period when a signal is supplied from the wiring WDL to the node ND2 may be used in combination.

[0185] Also, as shown in FIG. 7C, a configuration in which the capacitor element C3 is omitted may be used. An OS transistor can be used for the transistor connected to the node ND2. Since the OS transistor has an extremely small leakage current in the off state, image data can be held for a relatively long time even if the capacitor element C3 functioning as a holding capacitor is omitted.

[0186] Also, the said configuration is also effective when the frame frequency is high, such as in field sequential driving, and the holding period of the image data is relatively short. By omitting the capacitor element C3, the aperture ratio can be improved. Or, the transmittance of the pixel can be improved. Note that the configuration in which the capacitor element C3 is omitted may be applied to the configurations of other pixel circuits shown in this specification.

[0187] Also, the pixel PIX shown in FIG. 8A is a configuration in which the transistor Tr7 and the wiring VL are added to the configuration of FIG. 7A.

[0188] In the configuration shown in FIG. 8A, a reset potential is supplied to the wiring VL, and by turning on the transistor Tr7, the reset operation of the liquid crystal element LC can be performed. By adopting the said configuration, the writing operation can be independently controlled by the node ND2 and the potential applied to the liquid crystal element LC, and the display operation period by the liquid crystal element LC can be lengthened.

[0189] Also, when performing low-tone display, an image signal may be supplied from the wiring VL, and the display operation by the liquid crystal element LC may be performed by controlling the conduction and non-conduction of the transistor Tr7. At this time, the transistor Tr6 may be kept non-conductive at all times.

[0190] The pixel PIX shown in FIG. 8B has a configuration in which each transistor is provided with a back gate. The back gate is electrically connected to the front gate and has the effect of increasing the on-current. Also, it may be configured such that a fixed potential different from the front gate can be supplied to the back gate. By adopting such a configuration, the threshold voltage of the transistor can be controlled. Note that in FIG. 8B, a configuration in which all transistors are provided with back gates is illustrated, but there may be transistors without back gates. Also, the configuration in which the transistor has a back gate is effective for other pixel circuits in the present embodiment.

[0191] The above is the description of the configuration example in the case of using a liquid crystal element.

[0192] One aspect of the present invention disclosed in this specification and the like is a semiconductor device having first to third transistors and first and second capacitor elements. A first terminal of the first transistor is electrically connected to a first terminal of the first capacitor element. A first terminal of the second transistor is electrically connected to a gate of the third transistor, a second terminal of the first capacitor element, and a first terminal of the second capacitor element. A first terminal of the third transistor is electrically connected to a second terminal of the second capacitor element. The semiconductor device has the following first to fourth functions. The first function is a function of turning on the first transistor and writing a first potential to the first terminal of the first capacitor element, and a function of turning on the second transistor and writing the first potential to the gate of the third transistor, the second terminal of the first capacitor element, and the second terminal of the second capacitor element. The second function is a function of turning off the second transistor and holding the potential of the gate of the third transistor by the second terminal of the first capacitor element and the second terminal of the second capacitor element. The third function is a function of writing the sum of the first potential and the third potential to the first terminal of the first capacitor element, and a function of changing the first potential held at the gate of the third transistor, the second terminal of the first capacitor element, and the first terminal of the second capacitor element to the sum of the first potential and the fourth potential when the sum of the first potential and the third potential is written to the first terminal of the first capacitor element. The fourth function is a function of allowing a current corresponding to the sum of the first potential and the fourth potential to flow between the first terminal and the second terminal of the third transistor.

[0193] Also, in the above, at least one of the first to third transistors preferably has a metal oxide in the channel formation region.

[0194] Also, in the above, it is preferable to have a fourth transistor and a light-emitting element. At this time, a first terminal of the fourth transistor is preferably electrically connected to a first terminal of the third transistor and a second terminal of the second capacitor element, and an input terminal of the light-emitting element is preferably electrically connected to a second terminal of the fourth transistor.

[0195] Also, in the above, the fourth transistor preferably has a metal oxide in the channel formation region.

[0196] Further, in the above, it is preferable that the first potential corresponds to the data of the upper bit, and the fourth potential corresponds to the data of the lower bit.

[0197] Another aspect of the present invention is a display device including the semiconductor device having the above configuration and a digital-analog conversion circuit. At this time, the output terminal of the digital-analog conversion circuit is electrically connected to the first terminal of the first transistor and the first terminal of the second transistor, and the digital-analog conversion circuit preferably has a function of generating the first potential or the sum of the first potential and the third potential and outputting the first potential or the sum of the first potential and the third potential from the output terminal of the digital-analog conversion circuit.

[0198] Another aspect of the present invention is an electronic device including the display device having the above configuration and a housing.

[0199] Moreover, the operation method of the semiconductor device or the display device according to an aspect of the present invention is not limited to the above-described operation examples or specific examples. For example, the order of applying potentials to elements, circuits, wirings, etc., and the values of the potentials can be appropriately changed. Further, as described above, since the configuration of the semiconductor device or the display device according to an aspect of the invention can be appropriately changed, the operation method of the semiconductor device or the display device may also be changed according to the configuration.

[0200] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0201] (Embodiment 3) In this embodiment, a configuration example of a display device using an EL element will be described.

[0202] In FIG. 9A, a sealing material 4005 is provided so as to surround the display portion 215 provided on the first substrate 4001, and the display portion 215 is sealed by the sealing material 4005 and the second substrate 4006.

[0203] The display unit 215 is provided with a pixel array having the pixels PIX shown in Embodiment 1.

[0204] In FIG. 9A, the scanning line driving circuit 221a, the signal line driving circuit 231a, the signal line driving circuit 232a, and the common line driving circuit 241a each include a plurality of integrated circuits 4042 provided on a printed circuit board 4041. The integrated circuit 4042 is formed of a single crystal semiconductor or a polycrystalline semiconductor. The signal line driving circuit 231a and the signal line driving circuit 232a have the functions of the source driver circuit SD shown in Embodiment 1. The scanning line driving circuit 221a has the functions of the gate driver circuit GD shown in Embodiment 1. The common line driving circuit 241a has the function of supplying a prescribed potential to the wiring CAT shown in Embodiment 1.

[0205] Various signals and potentials supplied to the scanning line driving circuit 221a, the common line driving circuit 241a, the signal line driving circuit 231a, and the signal line driving circuit 232a are supplied via an FPC (FPC: Flexible printed circuit) 4018.

[0206] The integrated circuits 4042 included in the scanning line driving circuit 221a and the common line driving circuit 241a have the function of supplying a selection signal to the display unit 215. The integrated circuits 4042 included in the signal line driving circuit 231a and the signal line driving circuit 232a have the function of supplying an image signal to the display unit 215. The integrated circuit 4042 is mounted in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001.

[0207] Note that the connection method of the integrated circuit 4042 is not particularly limited, and a wire bonding method, a COG (Chip On Glass) method, a TCP (Tape Carrier Package) method, a COF (Chip On Film) method, or the like can be used.

[0208] FIG. 9B shows an example in which the integrated circuit 4042 included in the signal line driving circuit 231a and the signal line driving circuit 232a is implemented by the COG method. Further, part or all of the driving circuit can be integrally formed on the same substrate as the display unit 215 to form a system-on-panel.

[0209] In FIG. 9B, an example is shown in which the scanning line driving circuit 221a and the common line driving circuit 241a are formed on the same substrate as the display unit 215. By forming the driving circuit simultaneously with the pixel circuit in the display unit 215, the number of components can be reduced. Therefore, productivity can be improved.

[0210] Further, in FIG. 9B, a sealing material 4005 is provided so as to surround the display unit 215 provided on the first substrate 4001, the scanning line driving circuit 221a, and the common line driving circuit 241a. Also, a second substrate 4006 is provided on the display unit 215, the scanning line driving circuit 221a, and the common line driving circuit 241a. Therefore, the display unit 215, the scanning line driving circuit 221a, and the common line driving circuit 241a are sealed together with the display element by the first substrate 4001, the sealing material 4005, and the second substrate 4006.

[0211] Also, in FIG. 9B, an example is shown in which the signal line driving circuit 231a and the signal line driving circuit 232a are separately formed and mounted on the first substrate 4001, but the configuration is not limited to this. The scanning line driving circuit may be separately formed and mounted, or part of the signal line driving circuit or part of the scanning line driving circuit may be separately formed and mounted.

[0212] Further, the display device may include a panel in a state where the display element is sealed, and a module in a state where an IC or the like including a controller is mounted on the panel.

[0213] Also, the display unit and the scanning line driving circuit provided on the first substrate have a plurality of transistors. As the transistor, an OS transistor or an Si transistor can be applied.

[0214] The transistors included in the peripheral driving circuit and the transistors included in the pixel circuit of the display unit may have the same structure or different structures. All the transistors included in the peripheral driving circuit may have the same structure, or two or more types of structures may be used in combination. Similarly, all the transistors included in the pixel circuit may have the same structure, or two or more types of structures may be used in combination.

[0215] In addition, an input device can be provided on the second substrate 4006. The configuration in which an input device is provided in the display device shown in FIG. 9 can function as a touch panel.

[0216] There is no limitation to the detection element (also referred to as a sensor element) included in the touch panel according to one aspect of the present invention. Various sensors capable of detecting the proximity or contact of a detected object such as a finger or a stylus can be applied as the detection element.

[0217] As the sensor method, for example, various methods such as a capacitance method, a resistive film method, a surface acoustic wave method, an infrared method, an optical method, and a pressure-sensitive method can be used.

[0218] In the present embodiment, a touch panel having a capacitance-type detection element will be described as an example.

[0219] As the capacitance method, there are a surface capacitance method, a projected capacitance method, etc. Further, as the projected capacitance method, there are a self-capacitance method, a mutual-capacitance method, etc. Using the mutual-capacitance method is preferable because simultaneous multi-point detection is possible.

[0220] The touch panel according to one aspect of the present invention can adopt various configurations, such as a configuration in which a separately manufactured display device and a detection element are bonded together, and a configuration in which electrodes constituting the detection element are provided on one or both of the substrate supporting the display element and the counter substrate.

[0221] FIG. 10A and FIG. 10B show an example of a touch panel. FIG. 10A is a perspective view of a touch panel 4210. FIG. 10B is a perspective schematic view of an input device 4200. Note that only representative components are shown for clarity.

[0222] The touch panel 4210 has a configuration in which a separately manufactured display device and a detection element are bonded together.

[0223] The touch panel 4210 has an input device 4200 and a display device, and these are provided overlapping each other.

[0224] The input device 4200 includes a substrate 4263, electrodes 4227, 4228, a plurality of wirings 4237, 4238, and 4239. For example, the electrode 4227 can be electrically connected to the wiring 4237 or 4239. Also, the electrode 4228 can be electrically connected to the wiring 4239. The FPC 4272b is electrically connected to each of the plurality of wirings 4237 and 4238. An IC 4273b can be provided on the FPC 4272b.

[0225] Alternatively, a touch sensor may be provided between the first substrate 4001 and the second substrate 4006 of the display device. When a touch sensor is provided between the first substrate 4001 and the second substrate 4006, in addition to a capacitive touch sensor, an optical touch sensor using a photoelectric conversion element may be applied.

[0226] FIG. 11 is a cross-sectional view of the portion indicated by the chain line N1 - N2 in FIG. 9B. The display device shown in FIG. 11 has an electrode 4015, and the electrode 4015 is electrically connected via an anisotropic conductive layer 4019 to the terminal of the FPC 4018. Also, in FIG. 11, the electrode 4015 is electrically connected to the wiring 4014 at the openings formed in the insulating layer 4112, the insulating layer 4111, and the insulating layer 4110.

[0227] The electrode 4015 is formed from the same conductive layer as the first electrode layer 4030, and the wiring 4014 is formed from the same conductive layer as the source and drain electrodes of the transistors 4010 and 4011.

[0228] In addition, the display unit 215 and the scanning line driving circuit 221a provided on the first substrate 4001 have a plurality of transistors. In FIG. 11, the transistors 4010 included in the display unit 215 and the transistors 4011 included in the scanning line driving circuit 221a are illustrated. Note that in FIG. 11, bottom gate type transistors are illustrated as the transistors 4010 and 4011, but top gate type transistors may also be used. Further, the transistor 4011 can be a transistor included in the gate driver circuit GD described in Embodiment 1.

[0229] In FIG. 11, an insulating layer 4112 is provided over the transistors 4010 and 4011. In addition, a partition wall 4510 is formed over the insulating layer 4112.

[0230] The transistors 4010 and 4011 are provided over the insulating layer 4102. The transistors 4010 and 4011 have an electrode 4017 formed over the insulating layer 4111. The electrode 4017 can function as a back gate electrode.

[0231] In addition, the display device shown in FIG. 11 includes a capacitor element 4020. The capacitor element 4020 includes an electrode 4021 formed in the same process as the gate electrode of the transistor 4010 and an electrode formed in the same process as the source and drain electrodes. The respective electrodes overlap with each other with the insulating layer 4103 therebetween. Note that the capacitor element 4020 can be, for example, the capacitor element C1 or C2 of the pixel PIX described in Embodiment 1.

[0232] Generally, the capacitance of the capacitive element provided in the pixel portion of the display device is set so that it can hold charges during a predetermined period, taking into account the leakage current of the transistor arranged in the pixel portion or the like. The capacitance of the capacitive element may be set in consideration of the off-current of the transistor or the like.

[0233] The transistor 4010 provided in the display unit 215 is electrically connected to the display element.

[0234] In addition, the display device shown in FIG. 11 has an insulating layer 4111 and an insulating layer 4102. As the insulating layer 4111 and the insulating layer 4102, an insulating layer that hardly transmits impurity elements is used. By sandwiching the transistor with the insulating layer 4111 and the insulating layer 4102, intrusion of impurities from the outside into the semiconductor layer can be prevented.

[0235] As the display element included in the display device, a light-emitting element (EL element) that utilizes electroluminescence can be applied. The EL element has a layer containing a light-emitting compound (also referred to as an "EL layer") between a pair of electrodes. When a potential difference larger than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting substance contained in the EL layer emits light.

[0236] In addition, EL elements are distinguished by whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element and the latter is called an inorganic EL element.

[0237] In the organic EL element, by applying a voltage, electrons are injected into the EL layer from one electrode and holes are injected into the EL layer from the other electrode. Then, when these carriers (electrons and holes) recombine, a light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. Due to such a mechanism, such a light-emitting element is called a current-excited type light-emitting element.

[0238] Note that, in addition to the light-emitting compound, the EL layer may contain a substance with high hole injection property, a substance with high hole transport property, a hole-blocking material, a substance with high electron transport property, a substance with high electron injection property, or a bipolar substance (a substance with high electron transport property and high hole transport property).

[0239] The EL layer can be formed by methods such as vapor deposition method (including vacuum vapor deposition method), transfer method, printing method, inkjet method, coating method, etc.

[0240] Inorganic EL elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements according to their element structures. Dispersed inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emission mechanism is donor-acceptor recombination light-emission that utilizes donor levels and acceptor levels. Thin-film inorganic EL elements have a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emission mechanism is localized light-emission that utilizes inner-shell electron transitions of metal ions. Here, an organic EL element is used for explanation as the light-emitting element.

[0241] For the light-emitting element to extract light emission, at least one of a pair of electrodes may be transparent. There are light-emitting elements with a top emission structure that forms a transistor and a light-emitting element on a substrate and extracts light emission from the surface opposite to the substrate, a bottom emission structure that extracts light emission from the surface on the substrate side, and a dual emission structure that extracts light emission from both surfaces, and light-emitting elements with any of these emission structures can be applied.

[0242] FIG. 11 is an example of a light-emitting display device (also referred to as an "EL display device") using a light-emitting element as a display element. The light-emitting element 4513, which is the display element, is electrically connected to a transistor 4010 provided in the display unit 215. That is, the transistor 4010 corresponds to the transistor Tr5 described in the first embodiment, and the light-emitting element 4513 corresponds to the light-emitting element LD described in the first embodiment. Note that the configuration of the light-emitting element 4513 has a stacked structure of a first electrode layer 4030, a light-emitting layer 4511, and a second electrode layer 4031, but is not limited to this configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of light extracted from the light-emitting element 4513 and the like.

[0243] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, it is preferable to use a photosensitive resin material to form an opening on the first electrode layer 4030 so that the side surface of the partition wall 4510 becomes an inclined surface formed with a continuous curvature.

[0244] The light-emitting layer 4511 may be composed of a single layer or may be configured such that a plurality of layers are stacked.

[0245] The emission color of the light-emitting element 4513 can be white, red, green, blue, cyan, magenta, yellow, or the like depending on the material constituting the light-emitting layer 4511.

[0246] As a method for realizing color display, there are a method of combining a light-emitting element 4513 having a white emission color with a coloring layer and a method of providing light-emitting elements 4513 having different emission colors for each pixel. In the latter method, since it is necessary to separately form the light-emitting layer 4511 for each pixel, the productivity is inferior to that of the former method. However, in the latter method, an emission color with higher color purity can be obtained than in the former method. In addition to the latter method, the color purity can be further increased by providing a microcavity structure to the light-emitting element 4513.

[0247] Note that the light-emitting layer 4511 may contain an inorganic compound such as quantum dots. For example, by using quantum dots in the light-emitting layer, it can also function as a light-emitting material.

[0248] A protective layer may be formed on the second electrode layer 4031 and the partition wall 4510 so that oxygen, hydrogen, moisture, carbon dioxide, etc. do not enter the light-emitting element 4513. As the protective layer, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, DLC (Diamond Like Carbon), etc. can be formed. Further, a filler 4514 is provided and sealed in the space sealed by the first substrate 4001, the second substrate 4006, and the sealing material 4005. In this way, it is preferable to package (encase) with a protective film (laminated film, ultraviolet curable resin film, etc.) or a cover material that has high airtightness and little outgassing so as not to be exposed to the outside air.

[0249] As the filler 4514, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) etc. can be used. Further, the filler 4514 may contain a desiccant.

[0250] As the sealing material 4005, a glass material such as glass frit, a curable resin that cures at room temperature such as a two-component mixed resin, a resin material such as a photocurable resin or a thermosetting resin can be used. Further, the sealing material 4005 may contain a desiccant.

[0251] Also, if necessary, an optical film such as a polarizing plate, a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), a color filter, etc. may be appropriately provided on the light-emitting surface of the light-emitting element. Also, an antireflection film may be provided on the polarizing plate or the circular polarizing plate. For example, an antiglare treatment that diffuses reflected light due to surface irregularities and can reduce reflection can be performed.

[0252] Also, by forming the light-emitting element into a microcavity structure, light with high color purity can be extracted. Further, by combining the microcavity structure with a color filter, reflection can be reduced and the visibility of the display image can be enhanced.

[0253] In the first electrode layer and the second electrode layer (also referred to as a pixel electrode layer, a common electrode layer, a counter electrode layer, etc.) to which a voltage is applied to the display element, the light transmittance and reflectivity may be selected according to the direction of the light to be extracted, the location where the electrode layer is provided, and the pattern structure of the electrode layer.

[0254] For the first electrode layer 4030 and the second electrode layer 4031, a conductive material having light transmittance such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide, etc. can be used.

[0255] Also, the first electrode layer 4030 and the second electrode layer 4031 can be formed using one or more of metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), or an alloy thereof, or a metal nitride thereof.

[0256] Also, the first electrode layer 4030 and the second electrode layer 4031 can be formed using a conductive composition containing a conductive polymer (also referred to as a conductive polymer). As the conductive polymer, a so-called π-electron conjugated system conductive polymer can be used. For example, polyaniline or its derivative, polypyrrole or its derivative, polythiophene or its derivative, or a copolymer composed of two or more of aniline, pyrrole, and thiophene or its derivative, etc. can be mentioned.

[0257] In addition, since transistors are easily damaged by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured using a non-linear element.

[0258] FIG. 12 shows an example in the case where a light-emitting diode chip (hereinafter also referred to as an LED chip) is used as the display element.

[0259] The LED chip has a light-emitting diode. The configuration of the light-emitting diode is not particularly limited, and an MIS (Metal Insulator Semiconductor) junction may be used, or a homo-structure, hetero-structure, or double hetero-structure having a PN junction or a PIN junction can be used. Further, a superlattice structure, a single quantum well structure or a multi-quantum well (MQW) structure in which thin films that generate quantum effects are stacked may be used.

[0260] The LED chip 4600 includes a substrate 4601, an n-type semiconductor layer 4611, a light-emitting layer 4612, a p-type semiconductor layer 4613, an electrode 4615, electrodes 4621, 4622, an insulating layer 4603, and the like.

[0261] As the material of the p-type semiconductor layer 4613, a material that is larger than the bandgap energy of the light-emitting layer 4612 and can confine carriers to the light-emitting layer 4612 can be used. Further, the LED chip 4600 is provided with an electrode 4621 that functions as a cathode on the n-type semiconductor layer 4611, an electrode 4615 that functions as a contact electrode on the p-type semiconductor layer 4613, and an electrode 4622 that functions as an anode on the electrode 4615. Further, it is preferable that the upper surface of the n-type semiconductor layer 4611 and the upper surface and side surfaces of the electrode 4615 are covered with the insulating layer 4603. The insulating layer 4603 functions as a protective film for the LED chip 4600.

[0262] The LED chip 4600 has an area of the region that emits light of 1 mm 2 Hereinafter, preferably 10000 μm 2Hereinafter, more preferably 3000 μm 2 Hereinafter, even more preferably 700 μm 2 It is preferably below.

[0263] As the LED chip 4600, a macro LED with a side dimension exceeding 1 mm may be used, but it is preferable to use an LED with a smaller size. In particular, it is preferable to use a mini LED with a side dimension greater than 100 μm and less than or equal to 1 mm, and more preferably a micro LED with a side dimension of 100 μm or less. By using a micro LED, an extremely high-definition display device can be realized.

[0264] The n-type semiconductor layer 4611 may have a structure in which an n-type contact layer is laminated on the substrate 4601 side and an n-type cladding layer is laminated on the light-emitting layer 4612 side. Further, the p-type semiconductor layer 4613 may have a structure in which a p-type cladding layer is laminated on the light-emitting layer 4612 side and a p-type contact layer is laminated on the electrode 4615 side.

[0265] The light-emitting layer 4612 can use a multiple quantum well (MQW) structure in which a barrier layer and a well layer are laminated multiple times. It is preferable to use a material with a larger bandgap energy for the barrier layer than for the well layer. With such a configuration, energy can be confined in the well layer, the quantum efficiency can be improved, and the light-emitting efficiency of the LED chip 4600 can be improved.

[0266] The LED chip 4600 is a face-down type LED chip from which light is mainly emitted on the substrate 4601 side. At this time, as the electrode 4615, a material that reflects light can be used, for example, metals such as silver, aluminum, and rhodium can be used. When a face-up type LED chip is used, a translucent material may be used for the electrode 4615, for example, oxides such as ITO (In2O3 - SnO2), AZO (Al2O3 - ZnO), IZO (registered trademark) (In2O3 - ZnO), GZO (GeO2 - ZnO), ICO (In2O3 - CeO2) can be used.

[0267] As the substrate 4601, oxide single crystals such as sapphire single crystal (Al2O3), spinel single crystal (MgAl2O4), ZnO single crystal, LiAlO2 single crystal, LiGaO2 single crystal, MgO single crystal, etc., Si single crystal, SiC single crystal, GaAs single crystal, AlN single crystal, GaN single crystal, boride single crystals such as ZrB2, etc. can be used. In the face-down type LED chip 4600, it is preferable to use a material that transmits light for the substrate 4601. For example, a sapphire single crystal or the like can be used.

[0268] Also, a buffer layer (not shown) may be provided between the substrate 4601 and the n-type semiconductor layer 4611. The buffer layer has a function of relaxing the difference in lattice constants between the substrate 4601 and the n-type semiconductor layer 4611.

[0269] The electrode 4621 and the electrode 4622 of the LED chip 4600 are joined to the first electrode layer 4030 or the second electrode layer 4031 via the bumps 4605, respectively.

[0270] Also, it is preferable to provide a light-shielding resin layer 4607 covering the side surface of the LED chip 4600. Thereby, the light emitted laterally from the LED chip 4600 can be shielded, and a decrease in contrast due to waveguide light can be prevented.

[0271] Also, FIG. 12 shows an example in which a further substrate 4006 is provided on the substrate 4601. In this way, by providing a resin layer 4607 around the LED chip 4600 and further covering the upper surface with the substrate 40 06, the bonding of the LED chip 4600 can be made stronger, and it is possible to suitably prevent the occurrence of poor bonding of the LED chip 4600.

[0272] FIG. 13 is an example of a liquid crystal display device using a liquid crystal element as a display element.

[0273] In FIG. 13, a liquid crystal element 4013, which is a display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033, which function as alignment films, are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is provided on the side of the second substrate 4006, and the first electrode layer 4030 and the second electrode layer 4031 overlap with each other with the liquid crystal layer 4008 therebetween.

[0274] The spacer 4035 is a columnar spacer obtained by selectively etching an insulating layer, and is provided to control the distance (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. Note that a spherical spacer may be used.

[0275] Also, if necessary, optical members (optical substrates) such as a black matrix (light-shielding layer), a colored layer (color filter), a polarizing member, a retardation member, and an antireflection member may be appropriately provided. For example, circular polarization using a polarizing substrate and a retardation substrate may be used. Also, a backlight, a side light, or the like may be used as a light source. Further, a micro LED or the like may be used as the backlight and the side light.

[0276] In the display device shown in FIG. 13, a light-shielding layer 4132, a colored layer 4131, and an insulating layer 4133 are provided between the substrate 4006 and the second electrode layer 4031.

[0277] Examples of materials that can be used as the light-shielding layer include carbon black, titanium black, metals, metal oxides, and composite oxides including a solid solution of a plurality of metal oxides. The light-shielding layer may be a film containing a resin material or a thin film of an inorganic material such as a metal. Also, a laminated film of a film containing the material of the colored layer may be used for the light-shielding layer. For example, a laminated structure of a film containing the material used for a colored layer that transmits light of a certain color and a film containing the material used for a colored layer that transmits light of another color can be used. It is preferable to share the materials of the colored layer and the light-shielding layer because the device can be shared and the process can be simplified.

[0278] Examples of materials that can be used for the coloring layer include metal materials, resin materials, resin materials containing pigments or dyes, and the like. The method for forming the light shielding layer and the coloring layer may be the same as the method for forming each of the above-described layers. For example, it may be performed by an inkjet method or the like.

[0279] This embodiment can be implemented by appropriately combining at least a part thereof with other embodiments described in this specification.

[0280] (Embodiment 4) In this embodiment, a display device according to an aspect of the present invention will be described with reference to FIG. 14.

[0281] The display device exemplified below is a device having a function of displaying an image and a function of imaging an image. The display device exemplified below can be applied to the display unit in Embodiment 1.

[0282] [Overview] The display device of this embodiment has a light receiving element and a light emitting element in the display unit. Specifically, light emitting elements are arranged in a matrix in the display unit, and an image can be displayed on the display unit. In addition, light receiving elements are arranged in a matrix in the display unit, and the display unit also has a function as a light receiving unit. The light receiving unit can be used for an image sensor or a touch sensor. That is, by detecting light with the light receiving unit, it is possible to capture an image or detect the proximity or contact of an object (such as a finger or a pen).

[0283] In the display device of this embodiment, when the light emitted from the light emitting element of the display unit is reflected by an object, the light receiving element can detect the reflected light. Therefore, imaging and touch (including near touch) detection are possible even in a dark place.

[0284] The display device of this embodiment has a function of displaying an image using the light emitting element. That is, the light emitting element functions as a display element.

[0285] As the light-emitting element, it is preferable to use an EL element such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). Examples of the light-emitting substance included in the EL element include a substance that emits fluorescence (fluorescent material), a substance that emits phosphorescence (phosphorescent material), an inorganic compound (such as a quantum dot material), and a substance that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) material). Further, as the light-emitting element, an LED such as a micro LED (Light Emitting Diode) can also be used.

[0286] The display device of the present embodiment has a function of detecting light by using a light-receiving element.

[0287] When the light-receiving element is used as an image sensor, the display device of the present embodiment can capture an image by using the light-receiving element.

[0288] Further, when the light-receiving element is used as an illuminance sensor, the display device of the present embodiment can measure the illuminance and chromaticity of external light by using the light-receiving element.

[0289] For example, data such as fingerprints, palm prints, or irises can be acquired by using an image sensor. That is, a biometric authentication sensor can be incorporated into the display device of the present embodiment. By incorporating the biometric authentication sensor into the display device, the number of components of the electronic device can be reduced compared to the case where a biometric authentication sensor is provided separately from the display device, and the electronic device can be miniaturized and lightened.

[0290] In addition, using an image sensor, it is possible to acquire data such as the user's facial expression, eye movement, or change in pupil diameter. By analyzing this data, it is possible to obtain information about the user's physical and mental state. Based on this information, by changing the output content of one or both of the display and sound, for example, in a device for virtual reality (VR), augmented reality (AR), or mixed reality (MR), it is possible to ensure that the user can safely use the device.

[0291] Also, when the light receiving element is used as a touch sensor, the display device of the present embodiment can detect the proximity or contact of an object using the light receiving element.

[0292] As the light receiving element, for example, a pn-type or pin-type photodiode can be used. The light receiving element functions as a photoelectric conversion element that detects light incident on the light receiving element and generates electric charges. The amount of generated electric charges is determined based on the amount of incident light.

[0293] In particular, as the light receiving element, it is preferable to use an organic photodiode having a layer containing an organic compound. Since the organic photodiode can be easily thinned, lightened, and enlarged in area, and also has a high degree of freedom in shape and design, it can be applied to various display devices.

[0294] In one aspect of the present invention, an organic EL element is used as the light emitting element, and an organic photodiode is used as the light receiving element. The organic photodiode has many layers that can have the same configuration as the organic EL element. Therefore, a light receiving element can be incorporated into the display device without significantly increasing the manufacturing process. For example, the active layer of the light receiving element and the light emitting layer of the light emitting element can be separately formed, and the other layers can have the same configuration for the light emitting element and the light receiving element.

[0295] FIGS. 14A to 14D show cross-sectional views of a display device according to one aspect of the present invention.

[0296] The display device 50A shown in FIG. 14A has a layer 53 having a light-receiving element and a layer 57 having a light-emitting element between a substrate 51 and a substrate 59.

[0297] The display device 50B shown in FIG. 14B has a layer 53 having a light-receiving element, a layer 55 having a transistor, and a layer 57 having a light-emitting element between a substrate 51 and a substrate 59.

[0298] The display devices 50A and 50B are configured such that light of red (R), green (G), and blue (B) is emitted from the layer 57 having the light-emitting element.

[0299] The display device according to one aspect of the present invention has a plurality of pixels arranged in a matrix. One pixel has one or more sub-pixels. One sub-pixel has one light-emitting element. For example, the pixel may have a configuration having three sub-pixels (three colors of R, G, and B, or three colors of yellow (Y), cyan (C), and magenta (M), etc.), or a configuration having four sub-pixels (four colors of R, G, B, and white (W), or four colors of R, G, B, and Y, etc.). Further, the pixel has a light-receiving element. The light-receiving element may be provided in all pixels or in some pixels. Also, one pixel may have a plurality of light-receiving elements.

[0300] The layer 55 having the transistor preferably has a first transistor and a second transistor. The first transistor is electrically connected to the light-receiving element. The second transistor is electrically connected to the light-emitting element.

[0301] The display device according to one aspect of the present invention may have a function of detecting an object such as a finger in contact with the display device. For example, as shown in FIG. 14C, the light emitted by the light-emitting element in the layer 57 having the light-emitting element is reflected by the finger 52 in contact with the display device 50B, and the light-receiving element in the layer 53 having the light-receiving element detects the reflected light. Thereby, it can be detected that the finger 52 has contacted the display device 50B.

[0302] As shown in FIG. 14D, a display device according to an aspect of the present invention may have a function of detecting or imaging an object (not in contact) close to the display device 50B.

[0303] FIGS. 14E to 14H show an example of a pixel.

[0304] The pixels shown in FIGS. 14E and 14F have three sub-pixels (three light-emitting elements) of R, G, and B and a light-receiving element PD. FIG. 14E is an example in which three sub-pixels and the light-receiving element PD are arranged in a 2×2 matrix, and FIG. 14F is an example in which three sub-pixels and the light-receiving element PD are arranged in a single horizontal row.

[0305] The pixel shown in FIG. 14G has four sub-pixels (four light-emitting elements) of R, G, B, and W and a light-receiving element PD.

[0306] The pixel shown in FIG. 14H has three sub-pixels of R, G, and B, a light-emitting element IR that emits infrared light, and a light-receiving element PD. At this time, it is preferable that the light-receiving element PD has a function of detecting infrared light. The light-receiving element PD may have a function of detecting both visible light and infrared light. The wavelength of the light detected by the light-receiving element PD can be determined according to the use of the sensor.

[0307] (Embodiment 5) In the present embodiment, an information processing apparatus according to an aspect of the present invention will be described.

[0308] Human behavior is influenced by the emotions of the moment. In many cases, since people can unconsciously control their emotions, when a stimulus that induces a change in emotion is given, if it is relatively small, they can maintain a normal state of mind. However, when the stimulus that induces a change in emotion is large, there is a risk that they cannot control their emotions well and will unconsciously act based on their emotions.

[0309] As a result of such emotional changes, concentration may decrease. For example, when concentration decreases, even when performing the same task, the work efficiency and accuracy will decline. Also, sometimes the decrease in concentration based on emotions may cause accidents or disasters. Especially when driving a vehicle or the like, the decrease in concentration may lead to extremely dangerous accidents.

[0310] Therefore, one aspect of the present invention is to detect a part (especially the eyes, or the eyes and the surrounding area) or all of the user's face, extract the features of the user's face from the information of the detected part or all of the face, and estimate the user's emotions from the extracted face features. Then, when the estimated emotion is an emotion that may reduce, for example, concentration, a stimulus is given to the user's vision, hearing, touch, smell, etc. to make the user recover concentration. Thereby, the decrease in concentration that the user is not aware of can be effectively suppressed.

[0311] Emotions that may reduce concentration and the like include impatience, anxiety, anger, rage, sadness, excitement, uneasiness, fear, dissatisfaction, pain, and emptiness, etc. These may be collectively referred to as negative emotions below. Generally, excitement is not necessarily a negative emotion, but here it is included as an emotion that may reduce concentration and the like.

[0312] The stimulus given to the user is preferably through vision. For example, displaying an image that wipes away the user's negative emotions and calms the mood can be mentioned. Examples of such images include images related to nature, such as animals, plants, and landscapes. Since the images that calm the user's mood vary from person to person, it may also be a method of displaying the images set by the user in advance.

[0313] Also, as a stimulus given to the user through vision, the color tone of the displayed image may be changed. For example, among the color tones of the displayed image, by lowering the red gradation and raising the green or blue gradation, the user's negative emotions can be suppressed and the mood can be calmed. In that case, if the color tone is changed extremely instantaneously, it may have an adverse effect such as increasing the user's irritation. Therefore, it is preferable to change the color tone gently over time to such an extent that the change is hardly noticeable to the user. For example, when an image can be displayed with 256 gradations or more for each color, it may be changed gently so that the gradation value changed per second is 1 gradation value or less.

[0314] Also, as a stimulus given to the user through vision, examples include gradually dimming the brightness of the space where the user is, or making the color tone of the lighting closer to green or blue.

[0315] Also, as a stimulus given to the user through hearing to wipe out the user's negative emotions and calm the mood, examples include environmental sounds related to nature (bird chirping, sound of flowing water).

[0316] Also, instead of giving the user a stimulus to calm the mood, by making the user aware of what the estimated current emotion is, it is also possible to suitably suppress a decrease in the user's concentration and the like. By recognizing the negative emotions that the user is not aware of, the user can consciously take actions to calm the mood. For example, actions such as taking a deep breath, stopping work or driving to take a break can be consciously executed.

[0317] As a method for making the user recognize their current emotion, for example, displaying a character with an expression similar to the user's current emotion on the screen, displaying an image in which the level of emotion (for example, the level of irritation) is digitized, or an image represented by graphics on the screen, etc. can be mentioned. Or, when it is estimated that the emotion is extremely heightened, a warning may be issued to the user using sound, lighting, odor, etc. In particular, by simultaneously issuing warnings that act on hearing, smell, touch, etc. in addition to the visual warning by displaying an image, the user can be made to recognize their current emotion more effectively.

[0318] A method for estimating the user's emotion will be described. First, a part of the user's (subject's) eyes or the face including the eyes and the surrounding area thereof is imaged. Then, face features are extracted from the imaged part of the user's face. Then, the user's current emotion is estimated from the extracted face features. As for the extraction of features and the estimation of emotion, preferably, it can be performed by inference using a neural network.

[0319] Hereinafter, more specific examples will be described with reference to the drawings.

[0320] [Configuration Example] FIG. 15 is a block diagram of an information processing apparatus 310 according to an aspect of the present invention. The information processing apparatus 310 includes an information presentation unit 311, a subject detection unit 312, a feature extraction unit 313, an emotion estimation unit 314, and an information generation unit 315.

[0321] In the drawings attached to this specification, the components are classified by function and a block diagram is shown with each block being independent of each other. However, in actual components, it is difficult to completely separate them by function, and it is possible that one component is related to multiple functions or one function is realized by multiple components.

[0322] [Information Presentation Unit 311] The information presentation unit 311 has a function of giving a stimulus to the user with respect to vision, smell, hearing, or touch. The information presentation unit 311 can present (output) the information generated by the information generation unit 315 described later to the user.

[0323] As the information presentation unit 311, various hardware can be used. For example, when giving a stimulus to the user's vision (or presenting information), a display device capable of displaying an image, a lighting device capable of changing illuminance and chromaticity, etc. can be used. Also, for example, as a device that gives a stimulus to smell, an aroma diffuser that disperses a fragrance by vibration, heat, etc. can be used. Also, as a device that gives a stimulus to hearing, a sound output device such as a speaker, headphones, or earphones can be used. Also, as a device that gives a stimulus to touch, a vibration device, etc. can be used.

[0324] In particular, in the information processing apparatus 310 according to one aspect of the present invention, it is particularly preferable to present information to the user through vision. When the information presentation unit 311 included in the information processing apparatus 310 has means for displaying an image, it can be referred to as an image display device.

[0325] Furthermore, it is preferable that the information presentation unit 311 has other information presentation means in addition to the means for displaying an image. Thereby, in addition to presenting an image to the user, it is possible to give a stimulus to vision, hearing, smell, or touch by other means, so that it is possible to synergistically give the user a notice.

[0326] 〔Subject detection unit 312〕 The subject detection unit 312 has a function of acquiring information on a part of the user's face and outputting the information to the feature extraction unit 313.

[0327] As the subject detection unit 312, typically, an imaging device equipped with an image sensor can be used. In that case, an infrared imaging device that irradiates infrared rays onto the user's face and captures an image may be used. Note that the subject detection unit 312 is not limited to an imaging device as long as it can detect the state of a part of the subject's face. An optical distance measurement device that measures the distance between the device and a part of the face using infrared rays or the like can also be used. Further, a detection device that contacts electrodes with the user's face and electrically detects the movement of the muscles of the user's face may be used.

[0328] 〔Feature extraction unit 313〕 The feature extraction unit 313 has a function of extracting feature points from the face information output from the subject detection unit 312, extracting features of a part or all of the face from the positions of the feature points, and outputting the information of the extracted features to the emotion estimation unit 314.

[0329] When the face information acquired by the subject detection unit 312 is information about the eyes and their surroundings, examples of the features extracted by the feature extraction unit 313 include the pupil, iris, cornea, conjunctiva (white of the eye), inner corner of the eye, outer corner of the eye, upper eyelid, lower eyelid, eyelashes, eyebrows, glabella, brow head, and brow tail. Further, features other than the eyes and their surroundings include the root of the nose, tip of the nose, nasal column, nostrils, lips (upper lip, lower lip), corners of the mouth, mouth opening, teeth, cheeks, jaw, ears, and forehead. The feature extraction unit 313 recognizes the shapes and positions of these parts of the face and extracts the position coordinates of the feature points in each part. Then, the data of the extracted position coordinates and the like can be output to the emotion estimation unit 314 as information about the features of the face.

[0330] As a method for feature extraction by the feature extraction unit 313, various algorithms for extracting feature points can be applied to the image or the like acquired by the subject detection unit 312. For example, algorithms such as SIFT (Scaled Invariant Feature Transform), SURF (Speeded Up Robust Features), and HOG (Histograms of Oriented Gradients) can be used.

[0331] In particular, it is preferable that the feature extraction by the feature extraction unit 313 is performed by inference using a neural network. In particular, it is preferably performed using a convolutional neural network (CNN: Convolutional Neural Networks). Hereinafter, the case of using a neural network will be described.

[0332] FIG. 16A schematically shows a neural network NN1 that can be used for the feature extraction unit 313. The neural network NN1 has an input layer 351, three intermediate layers 352, and an output layer 353. Note that the number of intermediate layers 352 is not limited to three and may be one or more.

[0333] Data 361 input from the subject detection unit 312 is input to the neural network NN1. The data 361 is data including coordinates and values corresponding to the coordinates. Typically, it can be image data including coordinates and gradation values corresponding to the coordinates. Data 362 is output from the neural network NN1. The data 362 is data including the position coordinates of the above-described feature points.

[0334] The neural network NN1 is pre-trained to extract the above-described feature points from data 361 such as image data and output their coordinates. In the neural network NN1, learning is performed so that the neuron value of the output layer 353 corresponding to the coordinates where the above-described feature points exist becomes high by performing edge processing and the like using various filters in the intermediate layer 352.

[0335] [Emotion estimation unit 314] The emotion estimation unit 314 has a function of estimating the emotion of the user from the information on the features of the face input from the feature extraction unit 313 and outputting the information on the estimated emotion to the information generation unit 315.

[0336] The emotion estimation unit 314 can estimate whether the user has negative emotions (such as irritation, anxiety, anger, indignation, sadness, excitement, uneasiness, fear, dissatisfaction, pain, or emptiness, etc.) using information on the characteristics of the user's face. Also, when the user has negative emotions, it is preferable to estimate the degree (level) thereof.

[0337] The estimation of emotions in the emotion estimation unit 314 is preferably performed by inference using a neural network. In particular, it is preferably performed using a CNN.

[0338] FIG. 16B schematically shows a neural network NN2 that can be used for the emotion estimation unit 314. Here, an example is shown in which the neural network NN2 has substantially the same configuration as the neural network NN1. Note that the number of neurons in the input layer 351 of the neural network NN2 can be made smaller than that of the neural network NN1.

[0339] Data 362 input from the feature extraction unit 313 is input to the neural network NN2. The data 362 includes information related to the coordinates of the extracted feature points.

[0340] Also, as data input to the neural network NN2, data obtained by processing the data 362 may be used. For example, a vector connecting any two feature points may be calculated, and the vectors obtained for all or some of the feature points may be used as data input to the neural network NN2. Also, the calculated vectors may be used as normalized data. Hereinafter, data obtained by processing the data 362 based on the data 362 output by the neural network NN1 is also denoted as data 362.

[0341] From the neural network NN2 into which data 362 is input, data 363 is output. Data 363 corresponds to the neuron values output from each neuron in the output layer 353. Each neuron in the output layer 353 is associated with one emotion. As shown in FIG. 16B, data 363 is data including the neuron values of neurons corresponding to a predetermined negative emotion (such as irritation, anxiety, anger, etc.).

[0342] The neural network NN2 is pre-trained to estimate the degree of negative emotion from data 362 and output it as a neuron value. Since the relative positional relationship of a plurality of feature points on the user's face can determine the user's expression, the neural network NN2 can estimate the emotion held by the user from that expression.

[0343] FIG. 16C is a diagram schematically showing data 363. The height of the neuron value corresponding to each emotion indicates the height of the estimated degree of emotion. Also, in data 363, a threshold value T1 and a threshold value T2 are shown by broken lines. For example, when it is below the threshold value T1, it can be determined that the user does not hold that emotion or the degree of that emotion is sufficiently low. Also, when it exceeds the threshold value T2, it can be determined that the degree of that emotion is extremely high.

[0344] For example, from FIG. 16C, it can be estimated that the emotion is a mixture of "irritation", "anxiety", and "excitement", and especially that the user strongly feels "irritation".

[0345] In this way, by configuring the emotion estimation unit 314 to estimate only negative emotions and output the results to the information generation unit 315, the calculation scale in the emotion estimation unit 314 can be reduced, and the power consumption related to the calculation can be reduced. In addition, since the amount of data used by the information generation unit 315 can be reduced, the power consumption related to the data transmission from the emotion estimation unit 314 to the information generation unit 315 and the calculation in the information generation unit 315 can also be reduced. Note that the emotion estimation unit 314 can also estimate emotions opposite to negative emotions, such as joy, gratitude, happiness, affection, satisfaction, love, etc., and output the results to the information generation unit 315.

[0346] Note that the emotion estimation can also be performed without using a neural network. For example, it may be performed by a template matching method or a pattern matching method that compares a partial image of the user's face acquired by the subject detection unit 312 with a template image and uses the similarity. In that case, a configuration without the feature extraction unit 313 can also be adopted.

[0347] 〔Information generation unit 315〕 The information generation unit 315 has a function of determining or generating information to be presented to the user based on the emotions estimated by the emotion estimation unit 314 and outputting the information to the information presentation unit 311.

[0348] For example, when the information presentation unit 311 has a function of displaying an image, the information generation unit 315 can generate or select the image to be displayed and output it to the information presentation unit 311. Also, when the information presentation unit 311 has a function as a lighting device, the information generation unit 315 can determine the brightness (illuminance) and chromaticity of the lighting and output it to the information presentation unit 311. Further, when the information presentation unit 311 has a function of spraying a fragrance, the information generation unit 315 can determine the type of the sprayed fragrance or the strength of the fragrance and output a signal or the like for controlling the operation of the information presentation unit 311. Also, when the information presentation unit 311 has a function of outputting sound, the information generation unit 315 can generate or select the sound to be played and output it together with the information on the volume to be played to the information presentation unit 311. Also, when the information presentation unit 311 has a function of inducing vibration, the information generation unit 315 can determine the vibration pattern and intensity and output a signal or the like for controlling the operation of the information presentation unit 311.

[0349] The above is the description of the configuration example of the information processing apparatus 310.

[0350] The components and their functions of the information processing apparatus 310 can be incorporated into a composite device (also referred to as a composite system) such as the electronic device 100 exemplified in the first embodiment.

[0351] Here, one aspect of the present invention exemplified in the first embodiment or the like has a display unit, an imaging unit, and an illuminance detection unit, and has a function of detecting by the imaging unit that the user is viewing the display unit, a function of measuring the external illuminance by the illuminance detection unit when the user is viewing the display unit, and a function of correcting the luminance of the display unit according to the measured value of the external illuminance and displaying an image, and can also be referred to as a composite device.

[0352] In addition, the composite device according to one aspect of the present invention can be configured to have a function of detecting a part or all of a user's face by an imaging unit, a function of estimating the user's emotion from information on the detected part or all of the face, and a function of presenting information to the user by a display unit according to the estimated emotion.

[0353] Furthermore, the composite device according to one aspect of the present invention preferably has a voice output means. At this time, it is preferable to have a function of presenting information to the user using voice by the voice output means according to the estimated emotion.

[0354] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0355] (Embodiment 6) In this embodiment, a configuration of a semiconductor device according to one aspect of the present invention or a transistor that can be used in a display device will be described.

[0356] The semiconductor device according to one aspect of the present invention or the display device can be manufactured using various types of transistors such as a bottom gate type transistor and a top gate type transistor. Therefore, it is possible to easily replace the material of the semiconductor layer and the transistor structure to be used according to the existing manufacturing line.

[0357] [Bottom Gate Type Transistor] FIG. 17A1 is a cross-sectional view of a channel protection type transistor 810 which is a kind of bottom gate type transistor. In FIG. 17A1, the transistor 810 is formed on a substrate 771. Further, the transistor 810 has an electrode 746 on the substrate 771 via an insulating layer 772. Further, the electrode 746 has a semiconductor layer 742 via an insulating layer 726. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer.

[0358] Further, an insulating layer 741 is provided over the channel formation region of the semiconductor layer 742. Also, electrodes 744a and 744b are provided over the insulating layer 726 in contact with a part of the semiconductor layer 742. The electrode 744a can function as one of a source electrode or a drain electrode. The electrode 744b can function as the other of the source electrode or the drain electrode. A part of the electrode 744a and a part of the electrode 744b are formed over the insulating layer 741.

[0359] The insulating layer 741 can function as a channel protection layer. By providing the insulating layer 741 over the channel formation region, it is possible to prevent the exposure of the semiconductor layer 742 that occurs during the formation of the electrodes 744a and 744b. Therefore, it is possible to prevent the channel formation region of the semiconductor layer 742 from being etched during the formation of the electrodes 744a and 744b. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized.

[0360] Also, the transistor 810 has an insulating layer 728 over the electrodes 744a, the electrodes 744b, and the insulating layer 741, and has an insulating layer 729 over the insulating layer 728.

[0361] When an oxide semiconductor is used for the semiconductor layer 742, it is preferable to use a material capable of depriving a part of the semiconductor layer 742 of oxygen and causing oxygen deficiency in at least the portions of the electrodes 744a and 744b that are in contact with the semiconductor layer 742. In the region where oxygen deficiency occurs in the semiconductor layer 742, the carrier concentration increases, the region becomes n-type, and becomes an n-type region (n + layer). Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, examples of the material capable of depriving the semiconductor layer 742 of oxygen and causing oxygen deficiency include tungsten, titanium, and the like.

[0362] By forming a source region and a drain region in the semiconductor layer 742, the contact resistance between the electrodes 744a and 744b and the semiconductor layer 742 can be reduced. Therefore, electrical characteristics of the transistor, such as field-effect mobility and threshold voltage, can be made favorable.

[0363] When using a semiconductor such as silicon for the semiconductor layer 742, it is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor between the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b. The layer that functions as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of the transistor.

[0364] The insulating layer 729 is preferably formed using a material having a function of preventing or reducing the diffusion of impurities from the outside into the transistor. Note that the insulating layer 729 can be omitted as necessary.

[0365] The transistor 811 shown in FIG. 17A2 is different from the transistor 810 in that it has an electrode 723 that can function as a back gate electrode on the insulating layer 729. The electrode 723 can be formed by the same material and method as the electrode 746.

[0366] Generally, the back gate electrode is formed of a conductive layer and is arranged so as to sandwich the channel formation region of the semiconductor layer between the gate electrode and the back gate electrode. Therefore, the back gate electrode can function in the same manner as the gate electrode. The potential of the back gate electrode may be the same as the potential of the gate electrode, or may be a ground potential (GND potential) or an arbitrary potential. Also, by changing the potential of the back gate electrode independently without linking it to the potential of the gate electrode, the threshold voltage of the transistor can be changed.

[0367] Both electrode 746 and electrode 723 can function as gate electrodes. Therefore, insulating layer 726, insulating layer 728, and insulating layer 729 can each function as a gate insulating layer. Note that electrode 723 may be provided between insulating layer 728 and insulating layer 729.

[0368] When one of electrode 746 or electrode 723 is referred to as the "gate electrode", the other is referred to as the "back gate electrode". For example, in transistor 811, when electrode 723 is referred to as the "gate electrode", electrode 746 is referred to as the "back gate electrode". Also, when electrode 723 is used as the "gate electrode", transistor 811 can be considered a type of top gate transistor. Additionally, in some cases, one of electrode 746 and electrode 723 is referred to as the "first gate electrode" and the other as the "second gate electrode".

[0369] By providing electrode 746 and electrode 723 across semiconductor layer 742, and further by setting electrode 746 and electrode 723 to the same potential, the region where carriers flow in semiconductor layer 742 becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-current of transistor 811 increases and the field-effect mobility becomes higher.

[0370] Therefore, transistor 811 is a transistor having a large on-current with respect to the occupied area. That is, the occupied area of transistor 811 can be reduced with respect to the required on-current. According to one aspect of the present invention, the occupied area of the transistor can be reduced. Thus, according to one aspect of the present invention, a semiconductor device with a high integration degree can be realized.

[0371] Also, since the gate electrode and the back gate electrode are formed of a conductive layer, they have a function of preventing the electric field generated outside the transistor from acting on the semiconductor layer where the channel is formed (particularly the electric field shielding function against static electricity, etc.). Note that by forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode, the electric field shielding function can be enhanced.

[0372] Further, by forming the back gate electrode with a conductive film having light-shielding properties, it is possible to prevent light from entering the semiconductor layer from the back gate electrode side. Therefore, it is possible to prevent light degradation of the semiconductor layer and deterioration of electrical characteristics such as shift of the threshold voltage of the transistor.

[0373] According to one aspect of the present invention, a transistor with good reliability can be realized. Further, a semiconductor device with good reliability can be realized.

[0374] FIG. 17B1 shows a cross-sectional view of a channel protection type transistor 820 which is one of the bottom gate type transistors. The transistor 820 has substantially the same structure as the transistor 810, but is different in that the insulating layer 741 covers the end portion of the semiconductor layer 742. Also, in the opening formed by selectively removing a part of the insulating layer 741 overlapping the semiconductor layer 742, the semiconductor layer 742 and the electrode 744a are electrically connected. Also, in another opening formed by selectively removing a part of the insulating layer 741 overlapping the semiconductor layer 742, the semiconductor layer 742 and the electrode 744b are electrically connected. The region of the insulating layer 741 overlapping the channel formation region can function as a channel protection layer.

[0375] The transistor 821 shown in FIG. 17B2 is different from the transistor 820 in that it has an electrode 723 that can function as a back gate electrode on the insulating layer 729.

[0376] By providing the insulating layer 741, it is possible to prevent exposure of the semiconductor layer 742 that occurs during the formation of the electrodes 744a and 744b. Therefore, it is possible to prevent thinning of the semiconductor layer 742 during the formation of the electrodes 744a and 744b.

[0377] In addition, the distances between the electrode 744a and the electrode 746, and between the electrode 744b and the electrode 746 are longer for the transistor 820 and the transistor 821 than for the transistor 810 and the transistor 811. Therefore, the parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced. Also, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized.

[0378] The transistor 825 shown in FIG. 17C1 is a channel etching type transistor which is one of the bottom gate type transistors. The transistor 825 forms the electrodes 744a and 744b without using the insulating layer 741. For this reason, a part of the semiconductor layer 742 exposed during the formation of the electrodes 744a and 744b may be etched. On the other hand, since the insulating layer 741 is not provided, the productivity of the transistor can be increased.

[0379] The transistor 826 shown in FIG. 17C2 is different from the transistor 820 in that it has an electrode 723 that can function as a back gate electrode on the insulating layer 729.

[0380] 〔Top Gate Type Transistor〕 The transistor 842 illustrated in FIG. 18A1 is one of the top gate type transistors. The transistor 842 is different from the transistor 810, the transistor 811, the transistor 820, the transistor 821, the transistor 825, and the transistor 826 in that the electrodes �44a and 744b are formed after forming the insulating layer 729. The electrodes 744a and 744b are electrically connected to the semiconductor layer 742 at the openings formed in the insulating layer 728 and the insulating layer 729.

[0381] Further, by removing a part of the insulating layer 726 that does not overlap with the electrode 746 and introducing the impurity 755 into the semiconductor layer 742 using the electrode 746 and the remaining insulating layer 726 as masks, an impurity region can be formed self-alignedly in the semiconductor layer 742 (see FIG. 18A3). The transistor 842 has a region where the insulating layer 726 extends beyond the end of the electrode 746. The impurity concentration in the region where the impurity 755 is introduced through the insulating layer 726 of the semiconductor layer 742 is lower than that in the region where the impurity 755 is introduced without passing through the insulating layer 726. Therefore, an LDD (Lightly Doped Drain) region is formed in the region of the semiconductor layer 742 that does not overlap with the electrode 746.

[0382] The transistor 843 shown in FIG. 18A2 is different from the transistor 842 in that it has the electrode 723. The transistor 843 has an electrode 723 formed on the substrate 771. The electrode 723 overlaps with the semiconductor layer 742 via the insulating layer 772. The electrode 723 can function as a back gate electrode.

[0383] Also, as in the transistor 844 shown in FIG. 18B1 and the transistor 845 shown in FIG. 18B2, all of the insulating layer 726 in the region that does not overlap with the electrode 746 may be removed. Also, as in the transistor 846 shown in FIG. 18C1 and the transistor 847 shown in FIG. 18C2, the insulating layer 726 may be left.

[0384] For the transistors 842 to 847 as well, after forming the electrode 746, an impurity region can be formed self-alignedly in the semiconductor layer 742 by using the electrode 746 as a mask and introducing the impurity 755 into the semiconductor layer 742. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized. Also, according to one aspect of the present invention, a semiconductor device with high integration can be realized.

[0385] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0386] (Embodiment 7) In this embodiment, a metal oxide (hereinafter also referred to as an oxide semiconductor) that can be used for the OS transistor described in the above embodiment will be described.

[0387] The metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to these, it is preferable that aluminum, gallium, yttrium, tin, etc. are contained. Further, one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. may be contained.

[0388] <Classification of Crystal Structure> First, the classification of the crystal structure in the oxide semiconductor will be described with reference to FIG. 19A. FIG. 19A is a diagram for explaining the classification of the crystal structure of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0389] As shown in FIG. 19A, the oxide semiconductor is roughly classified into "Amorphous", "Crystalline", and "Crystal". In addition, "completely amorphous" is included in "Amorphous". In addition, CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite) are included in "Crystalline". Note that single crystal, poly crystal, and completely amorphous are excluded from the classification of "Crystalline" (excluding single crystal and poly crystal). In addition, single crystal and poly crystal are included in "Crystal".

[0390] Note that the structure within the thick frame shown in Fig. 19A is in an intermediate state between "Amorphous" and "Crystal", and belongs to a new boundary region (New crystalline phase). That is, this structure can be described as having a structure that is energetically unstable "Amorphous" and is completely different from "Crystal".

[0391] Note that the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. Here, the XRD spectra obtained from grazing-incidence XRD (GIXD) measurements of a quartz glass substrate and an IGZO film (also referred to as crystalline IGZO) having a crystal structure classified as "Crystalline" are shown in Figs. 19B and 19C, respectively. Note that the GIXD method is also referred to as the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectra obtained from the GIXD measurements shown in Figs. 19B and 19C are simply referred to as XRD spectra. Fig. 19B shows the XRD spectrum of the quartz glass substrate, and Fig. 19C shows the XRD spectrum of the crystalline IGZO film. Note that the composition of the crystalline IGZO film shown in Fig. 19C is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, the thickness of the crystalline IGZO film shown in Fig. 19C is 500 nm.

[0392] As shown by the arrows in Fig. 19B, in the quartz glass substrate, the shape of the peak in the XRD spectrum is almost symmetric about the y-axis. On the other hand, as shown by the arrows in Fig. 19C, in the crystalline IGZO film, the shape of the peak in the XRD spectrum is asymmetric about the y-axis. The fact that the shape of the peak in the XRD spectrum is asymmetric about the y-axis indicates the presence of crystals in the film or substrate. In other words, if the shape of the peak in the XRD spectrum is not symmetric about the y-axis, it cannot be said that the film or substrate is in an amorphous state. Note that Fig. 19C clearly shows a crystal phase (IGZO crystal phase) at 2θ = 31° or in the vicinity thereof. The asymmetrically shaped peak in the XRD spectrum is presumed to be derived from the diffraction peak due to the crystal phase (microcrystals).

[0393] Specifically, the interference of X-rays scattered by atoms contained in IGZO is presumed to contribute to the peak at 2θ = 34° or in its vicinity. Also, minute crystals are presumed to contribute to the peak at 2θ = 31° or in its vicinity. In the XRD spectrum of the crystalline IGZO film shown in FIG. 19C, at the peak at 2θ = 34° or in its vicinity, the peak width on the low angle side becomes wider. This suggests that minute crystals attributable to the peak at 2θ = 31° or in its vicinity are present in the crystalline IGZO film.

[0394] Also, the crystal structure of the film or substrate can be evaluated by the diffraction pattern (also referred to as the nano beam electron diffraction pattern) observed by the nano beam electron diffraction method (NBED). The diffraction patterns of the quartz glass substrate and the IGZO film formed with the substrate temperature at room temperature are shown in FIGS. 19D and 19E, respectively. FIG. 19D shows the diffraction pattern of the quartz glass substrate, and FIG. 19E shows the diffraction pattern of the IGZO film. Note that the IGZO film shown in FIG. 19E is formed by a sputtering method using an oxide target with In:Ga:Zn = 1:1:1 [atomic ratio]. Also, in the nano beam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0395] As shown in FIG. 19D, in the diffraction pattern of the quartz glass substrate, a halo is observed, and it can be confirmed that the quartz glass is in an amorphous state. Also, as shown in FIG. 19E, in the diffraction pattern of the IGZO film formed at room temperature, a spot-like pattern rather than a halo is observed. Therefore, it is presumed that the IGZO film formed at room temperature is in an intermediate state that is neither a crystalline state nor an amorphous state, and it cannot be concluded that it is in an amorphous state.

[0396] <<Structure of Oxide Semiconductor>> Note that when focusing on the crystal structure, the oxide semiconductor may be classified differently from that in FIG. 19A. For example, the oxide semiconductor can be divided into a single-crystalline oxide semiconductor and other non-single-crystalline oxide semiconductors. Examples of the non-single-crystalline oxide semiconductor include the above-mentioned CAAC-OS and nc-OS. In addition, the non-single-crystalline oxide semiconductor includes a polycrystalline oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.

[0397] Here, the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.

[0398] [CAAC-OS] CAAC-OS is an oxide semiconductor having a plurality of crystal regions, and the c-axes of the plurality of crystal regions are oriented in a specific direction. Note that the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. In addition, the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region where the lattice arrangements are aligned. Further, CAAC-OS has a region where a plurality of crystal regions are connected in the a-b plane direction, and this region may have strain. Note that the strain refers to a portion where the orientation of the lattice arrangement changes between a region where the lattice arrangements are aligned and another region where the lattice arrangements are aligned in a region where a plurality of crystal regions are connected. That is, CAAC-OS is an oxide semiconductor in which the c-axis is oriented and there is no obvious orientation in the a-b plane direction.

[0399] Note that each of the plurality of crystal regions is composed of one or more minute crystals (crystals having a maximum diameter of less than 10 nm). When a crystal region is composed of one minute crystal, the maximum diameter of the crystal region is less than 10 nm. In addition, when a crystal region is composed of a number of minute crystals, the size of the crystal region may be about several tens of nm.

[0400] In addition, in the In-M-Zn oxide (where element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter, the In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter, the (M,Zn) layer) are laminated. Note that indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain element M. Note that the In layer may also contain Zn. The layered structure is observed as a lattice image, for example, in a high-resolution TEM image.

[0401] When a structural analysis is performed on the CAAC-OS film using, for example, an XRD apparatus, in an Out-of-plane XRD measurement using a θ / 2θ scan, a peak indicating c-axis orientation is detected at 2θ = 31° or in the vicinity thereof. Note that the position (the value of 2θ) of the peak indicating c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.

[0402] In addition, for example, in the electron diffraction pattern of the CAAC-OS film, a plurality of bright spots (spots) are observed. Note that one spot and another spot are observed at point-symmetric positions with the spot of the incident electron beam transmitted through the sample (also referred to as the direct spot) as the center of symmetry.

[0403] When observing the crystal region from the specific direction, the lattice arrangement within the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be an irregular hexagon. Also, in the above-mentioned strain, there may be lattice arrangements such as pentagons and heptagons. In CAAC-OS, even in the vicinity of the strain, a distinct grain boundary cannot be confirmed. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is presumably because CAAC-OS can tolerate strain due to the non-dense arrangement of oxygen atoms in the a-b plane direction and the change in the interatomic bond distance due to the substitution of metal atoms.

[0404] A crystal structure in which distinct grain boundaries are confirmed is called a so-called polycrystal. Grain boundaries can act as recombination centers, and carriers are likely to be captured, causing a decrease in the on-current of the transistor and a decrease in the field-effect mobility. Therefore, CAAC-OS in which distinct grain boundaries are not confirmed is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor. To form CAAC-OS, a configuration having Zn is preferable. For example, In-Zn oxide and In-Ga-Zn oxide are preferable because they can suppress the generation of grain boundaries more effectively than In oxide.

[0405] CAAC-OS is an oxide semiconductor with high crystallinity and no distinct grain boundaries confirmed. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility due to grain boundaries is less likely to occur. Also, since the crystallinity of the oxide semiconductor may decrease due to the incorporation of impurities or the generation of defects, it can also be said that CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen deficiencies). Therefore, the physical properties of the oxide semiconductor having CAAC-OS are stable. For this reason, the oxide semiconductor having CAAC-OS is resistant to heat and has high reliability. Also, CAAC-OS is stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when CAAC-OS is used for the OS transistor, it becomes possible to expand the degree of freedom in the manufacturing process.

[0406] [nc-OS] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In other words, nc-OS has minute crystals. Since the size of the minute crystals is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystals are also referred to as nanocrystals. Further, nc-OS does not show regularity in the crystal orientation among different nanocrystals. Therefore, no orientation is observed in the entire film. Thus, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or an amorphous oxide semiconductor. For example, when performing structural analysis on an nc-OS film using an XRD apparatus, in an Out-of-plane XRD measurement using θ / 2θ scan, no peak indicating crystallinity is detected. Further, when performing electron beam diffraction (also referred to as restricted-view electron beam diffraction) using an electron beam with a probe diameter larger than that of the nanocrystals (for example, 50 nm or more) on the nc-OS film, a diffraction pattern such as a halo pattern is observed. On the other hand, when performing electron beam diffraction (also referred to as nanobeam electron beam diffraction) using an electron beam with a probe diameter close to or smaller than that of the nanocrystals (for example, 1 nm or more and 30 nm or less) on the nc-OS film, an electron beam diffraction pattern in which a plurality of spots are observed within a ring-shaped region centered on a direct spot may be obtained.

[0407] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor. a-like OS has a loose or low-density region. That is, a-like OS has lower crystallinity compared with nc-OS and CAAC-OS. Further, a-like OS has a higher hydrogen concentration in the film compared with nc-OS and CAAC-OS.

[0408] [[Constitution of Oxide Semiconductor]] Next, the details of the above-mentioned CAC-OS will be described. Note that CAC-OS relates to the material constitution.

[0409] [CAC-OS] CAC-OS is, for example, a component of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof. In the following, in the metal oxide, a state in which one or more metal elements are unevenly distributed and the regions having the metal elements are mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof is also referred to as a mosaic state or a patch state.

[0410] Furthermore, CAC-OS becomes a mosaic state by separating the material into a first region and a second region, and the first region has a configuration distributed in the film (hereinafter also referred to as a cloud state). That is, CAC-OS is a composite metal oxide having a configuration in which the first region and the second region are mixed.

[0411] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0412] Specifically, the first region is a region mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. That is, the first region can be rephrased as a region mainly composed of In. The second region can be rephrased as a region mainly composed of Ga.

[0413] Note that there may be cases where no clear boundary can be observed between the above first region and the above second region.

[0414] Also, CAC-OS in In-Ga-Zn oxide refers to a structure in a material composition containing In, Ga, Zn, and O, where a region mainly composed of Ga and a region mainly composed of In are each mosaic-shaped and these regions are randomly present. Therefore, it is presumed that CAC-OS has a structure in which metal elements are unevenly distributed.

[0415] CAC-OS can be formed, for example, by a sputtering method under conditions where the substrate is not intentionally heated. Also, when forming CAC-OS by a sputtering method, any one or more selected from among inert gases (typically argon), oxygen gas, and nitrogen gas may be used as the film-forming gas. Further, the lower the flow rate ratio of oxygen gas to the total flow rate of the film-forming gas during film formation, the more preferable it is. For example, it is preferable that the flow rate ratio of oxygen gas to the total flow rate of the film-forming gas during film formation is 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0416] Also, for example, in CAC-OS in In-Ga-Zn oxide, it can be confirmed by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) that a region mainly composed of In (first region) and a region mainly composed of Ga (second region) are unevenly distributed and have a mixed structure.

[0417] Here, the first region is a region with higher conductivity compared to the second region. That is, when carriers flow through the first region, the conductivity as a metal oxide is exhibited. Therefore, when the first region is distributed in a cloud-like manner in the metal oxide, a high field-effect mobility (μ) can be realized.

[0418] On the one hand, the second region is a region with higher insulation compared to the first region. That is, by distributing the second region in the metal oxide, the leakage current can be suppressed.

[0419] Therefore, when using CAC-OS in a transistor, the conductivity caused by the first region and the insulation caused by the second region act complementarily, enabling the function of switching (the function of turning on / off) to be imparted to the CAC-OS. That is, CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximally enhanced. Thus, by using CAC-OS in a transistor, a high on-current (I on )、high field-effect mobility (μ), and good switching operation can be realized.

[0420] In addition, a transistor using CAC-OS has high reliability. Therefore, CAC-OS is optimal for various semiconductor devices including displays.

[0421] Oxide semiconductors have various structures and each has different characteristics. The oxide semiconductor of one aspect of the present invention may have two or more of amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0422] <Transistor having an oxide semiconductor> Subsequently, the case of using the above oxide semiconductor in a transistor will be described.

[0423] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility can be realized. Also, a highly reliable transistor can be realized.

[0424] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, more preferably 1×10 13 cm -3 or less, even more preferably 1×10 11 cm -3 or less, still more preferably 1×10 10 cm -3 and less than 1×10 -9 cm -3 or more. When reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced and the density of defect levels may be reduced. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as highly pure intrinsic or substantially highly pure intrinsic. In some cases, an oxide semiconductor with a low carrier concentration may be referred to as a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor.

[0425] In addition, since an oxide semiconductor film that is highly pure intrinsic or substantially highly pure intrinsic has a low density of defect levels, the density of trap levels may also be low.

[0426] In addition, the charge trapped in the trap levels of the oxide semiconductor has a long time required to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high trap level density may have unstable electrical characteristics.

[0427] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In addition, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0428] <Impurities> Here, the effects of various impurities in the oxide semiconductor will be described.

[0429] In an oxide semiconductor, when silicon or carbon, which is one of the Group 14 elements, is contained, defect levels are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (the concentration obtained by secondary ion mass spectrometry (SIMS)) are set to 2×10 18 atoms / cm 3 Hereinafter, preferably 2×10 17 atoms / cm 3 or less.

[0430] Further, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0431] In addition, when nitrogen is contained in the oxide semiconductor, carriers, i.e., electrons, are generated, the carrier concentration increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as the semiconductor tends to have normally-on characteristics. Or, when nitrogen is contained in the oxide semiconductor, trap levels may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the oxide semiconductor obtained by SIMS is set to less than 5×10 19 atoms / cm 3 preferably 5×10 18 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3Hereinafter, more preferably, it is 5×10 17 atoms / cm 3 or less.

[0432] In addition, since hydrogen contained in the oxide semiconductor reacts with oxygen bonded to metal atoms to form water, oxygen vacancies may be formed. When hydrogen enters these oxygen vacancies, electrons, which are carriers, may be generated. Also, a part of the hydrogen may bond with oxygen bonded to metal atoms to generate electrons, which are carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is 1×10 20 atoms / cm 3 or less, preferably 1×10 19 atoms / cm 3 or less, more preferably 5×10 18 atoms / cm 3 or less, still more preferably 1×10 18 atoms / cm 3 or less.

[0433] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be imparted.

[0434] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0435] (Embodiment 8) In this embodiment, a product example in which the semiconductor device or display device described in the above embodiment is applied to an electronic device will be described.

[0436] <Notebook personal computer> The semiconductor device or display device according to one aspect of the present invention can be applied to a display provided in an information terminal device. FIG. 20A shows a notebook personal computer, which is a type of information terminal device, and includes a housing 5401, a display unit 5402, a keyboard 5403, a pointing device 5404, and the like.

[0437] <Smartwatch> The semiconductor device or display device according to one aspect of the present invention can be applied to a wearable terminal. FIG. 20B shows a smartwatch, which is a type of wearable terminal, and includes a housing 5901, a display unit 5902, operation buttons 5903, an operator 5904, a band 5905, and the like. Also, a display device with an added function as a position input device may be used for the display unit 5902. Further, the function as a position input device can be added by providing a touch panel on the display device. Alternatively, the function as a position input device can also be added by providing a photoelectric conversion element, also called a photosensor, in the pixel portion of the display device. In addition, the operation button 5903 can be provided with any one of a power switch for starting the smartwatch, a button for operating an application of the smartwatch, a volume adjustment button, or a switch for turning on or off the display unit 5902. Also, in the smartwatch shown in FIG. 20B, the number of operation buttons 5903 is shown as two, but the number of operation buttons of the smartwatch is not limited to this. Further, the operator 5904 functions as a crown for adjusting the time of the smartwatch. Also, the operator 5904 may be used as an input interface for operating applications of the smartwatch in addition to time adjustment. Note that, in the smartwatch shown in FIG. 20B, it has a configuration with the operator 5904, but it is not limited to this, and a configuration without the operator 5904 may also be possible.

[0438] <Video camera> A semiconductor device or a display device according to an aspect of the present invention can be applied to a video camera. The video camera shown in FIG. 20C includes a first housing 5801, a second housing 5802, a display unit 5803, operation keys 5804, a lens 5805, a connection unit 5806, etc. The operation keys 5804 and the lens 5805 are provided on the first housing 5801, and the display unit 5803 is provided on the second housing 5802. The first housing 5801 and the second housing 5802 are connected by a connection unit 5806, and the angle between the first housing 5801 and the second housing 5802 can be changed by the connection unit 5806. The video on the display unit 5803 may be switched according to the angle between the first housing 5801 and the second housing 5802 at the connection unit 5806.

[0439] <Mobile phone> A semiconductor device or a display device according to an aspect of the present invention can be applied to a mobile phone. FIG. 20D is a mobile phone having the functions of an information terminal, and includes a housing 5501, a display unit 5502, a microphone 5503, a speaker 5504, and operation buttons 5505. Further, a display device with an additional function as a position input device may be used for the display unit 5502. The function as a position input device can be added by providing a touch panel on the display device. Alternatively, the function as a position input device can also be added by providing a photoelectric conversion element, also called a photosensor, in the pixel portion of the display device. Further, the operation buttons 5505 can be provided with any one of a power switch for starting the mobile phone, a button for operating applications of the mobile phone, a volume adjustment button, or a switch for turning on or off the display unit 5502.

[0440] In the mobile phone shown in FIG. 20D, the number of operation buttons 5505 is shown as two, but the number of operation buttons of the mobile phone is not limited to this. Although not shown, the mobile phone shown in FIG. 20D may be configured to have a light emitting device for use as a flashlight or illumination.

[0441] <Television device> The semiconductor device or display device according to one aspect of the present invention can be applied to a television device. The television device shown in FIG. 20E has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), connection terminals 9006, and the like. The television device can incorporate a display unit 9001 with a large screen, for example, 50 inches or more, or 100 inches or more.

[0442] <Mobile body> The semiconductor device or display device according to one aspect of the present invention can be applied to the periphery of the driver's seat of an automobile, which is a mobile body.

[0443] For example, FIG. 20F is a diagram showing the periphery of the windshield inside an automobile. In FIG. 20F, in addition to display panels 5701, 5702, and 5703 attached to the dashboard, a display panel 5704 attached to the pillar is illustrated.

[0444] The display panels 5701 to 5703 can provide various information by displaying navigation information, a speedometer, a tachometer, a travel distance, a fuel gauge, a gear state, an air conditioner setting, and the like. In addition, the display items and layout displayed on the display panel can be appropriately changed according to the user's preference, and the designability can be enhanced. The display panels 5701 to 5703 can also be used as lighting devices.

[0445] The display panel 5704 can complement the visual field (blind spot) blocked by the pillar by projecting the video from the imaging means provided on the vehicle body. That is, by displaying the image from the imaging means provided outside the automobile, the blind spot can be compensated and the safety can be enhanced. In addition, by projecting the video that complements the invisible part, the safety check can be performed more naturally and without a sense of discomfort. The display panel 5704 can also be used as a lighting device.

[0446] <Electronic device for electronic bulletin> The semiconductor device or display device according to one aspect of the present invention can be applied to a display for electronic announcements. FIG. 21A shows an example of an electronic signboard (digital signage) that can be attached to a wall. FIG. 21A shows a state where the electronic signboard 6200 is attached to the wall 6201.

[0447] <Foldable tablet-type information terminal> The semiconductor device or display device according to one aspect of the present invention can be applied to a tablet-type information terminal. FIG. 21B shows a tablet-type information terminal having a foldable structure. The information terminal shown in FIG. 21B includes a housing 5321a, a housing 5321b, a display unit 5322, and operation buttons 5323. In particular, the display unit 5322 has a flexible base material, and a structure that can be folded by the base material can be realized.

[0448] In addition, the housing 5321a and the housing 5321b are coupled by a hinge portion 5321c, and the hinge portion 5321c enables the device to be folded in half. Further, the display unit 5322 is provided on the housing 5321a, the housing 5321b, and the hinge portion 5321c.

[0449] Although not shown, the electronic devices shown in FIGS. 20A to 20C, 20E, 21A, and 21B may be configured to have a microphone and a speaker. With this configuration, for example, a voice input function can be added to the above-described electronic devices.

[0450] Although not shown, the electronic devices shown in FIGS. 20A, 20B, 20D, 21A, and 21B may be configured to have a camera.

[0451] Also, although not shown, the electronic devices shown in FIGS. 20A to 20F and FIGS. 21A and 21B may be configured to have a sensor (including a function of measuring force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays, etc.) inside the housing. In particular, by providing a detection device having a sensor for detecting inclination, such as a gyro or an acceleration sensor, in the mobile phone shown in FIG. 20D, the orientation of the mobile phone (in which direction the mobile phone is facing with respect to the vertical direction) can be determined, and the screen display of the display unit 5502 can be automatically switched according to the orientation of the mobile phone.

[0452] Also, although not shown, the electronic devices shown in FIGS. 20A to 20F and FIGS. 21A and 21B may be configured to have a device for acquiring biometric information such as fingerprint, vein, iris, or voiceprint. By applying this configuration, an electronic device having a biometric authentication function can be realized.

[0453] Also, as the display unit of the electronic devices shown in FIGS. 20A to 20E and FIG. 21A, a flexible substrate may be used. Specifically, the display unit may be configured to have transistors, capacitive elements, display elements, etc. provided on a flexible substrate. By applying this configuration, not only a housing having a flat surface like the electronic devices shown in FIGS. 20A to 20E and FIG. 21A, but also an electronic device with a housing having a curved surface like the dashboard and pillar shown in FIG. 20F can be realized.

[0454] Examples of flexible base materials applicable to the display portions of FIGS. 20A to 20F and FIGS. 21A and 21B include materials having translucency to visible light, such as polyethylene terephthalate resin (PET), polyethylene naphthalate resin (PEN), polyethersulfone resin (PES), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate resin, polyamide resin, polycycloolefin resin, polystyrene resin, polyamideimide resin, polypropylene resin, polyester resin, polyvinyl halide resin, aramid resin, epoxy resin, urethane resin, etc. Also, these materials may be used by mixing or laminating them.

[0455] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

Description of Reference Numerals

[0456] 100: Electronic device, 101: Housing, 102: Display portion, 103: Camera, 104: Illuminance sensor, 105: Speaker, 106: Power button, 107: Operation button, 108: Microphone, 150: User, DD: Display device, PA: Display portion, GD: Gate driver circuit, SD: Source driver circuit, PIX: Pixel, SR: Shift register, LAT: Latch circuit, LVS: Level shift circuit, DAC: Digital-analog conversion circuit, AMP: Amplifier circuit, GL: Wiring, DL: Wiring, DB: Data bus wiring, Tr1 to 7: Transistor, C1, C2, C3: Capacitive element, LD: Light-emitting element, GL1 to 4: Wiring, DL: Wiring, WDL: Wiring, VL: Wiring, AL: Wiring, CAT: Wiring, ND1: Node, ND2: Node

Claims

1. A display unit and an imaging unit, The display unit has a plurality of pixels arranged in a matrix, Each of the plurality of pixels has a light receiving element and a light emitting element, The light receiving element and the light emitting element each have a layer containing an organic compound, The light receiving element has a function of measuring external illuminance and a function of acquiring information on the user's facial expression, The imaging unit has a function of detecting that the user is viewing the display unit, When the user is viewing the display unit, a correction value for the display luminance corresponding to each of the plurality of pixels is determined according to the measured value of the external illuminance, and an image is displayed on each of the plurality of pixels with a luminance based on the correction value, An electronic device that stops displaying the image when the user is not viewing the display unit.

2. In claim 1, Estimate the user's emotion from the information on the user's facial expression acquired by the light receiving element, An electronic device that displays the image based on the estimated user emotion.

Images