Synthesizer device and implementation method

Abstract

To prevent unintended operation from occurring even if data in a read-only storage circuit is corrupted.SOLUTION: A synthesizer device comprises: a signal generating unit for generating a signal of a specified frequency, a data read-only storage circuit for storing device parameter information, and a control circuit having a determination unit for determining whether or not data of the device parameter has been read successfully, and a control unit for controlling the signal generating unit using the data of the device parameter that has been read successfully. If the determination unit determines that an abnormality has occurred in the reading of the data of the device parameter, the control unit controls the signal generating unit using the device parameter information stored in a storage area of the control unit.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a synthesizer device and a method for implementing device parameter information in a synthesizer device. [Background technology]

[0002] There is known a device having a nonvolatile memory, in which device parameters are written and the nonvolatile memory is used as a storage circuit dedicated to reading data after the device is shipped (see, for example, Patent Documents 1 to 3). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-103117 [Patent Document 2] Japanese Patent Application Publication No. 11-312101 [Patent Document 3] Patent No. 3376331 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when such non-volatile memory was actually installed in products and shipped, there were cases where the written data was corrupted due to aging, etc. If the product continued to be used with such corrupted data, the product could malfunction or cause unintended behavior.

[0005] The present invention has been made in view of these points, and has as its object to prevent unintended operations from occurring even if data in a read-only memory circuit is corrupted. [Means for solving the problem]

[0006] In a first aspect of the present invention, there is provided a synthesizer device comprising: a control circuit having a signal generating unit that generates a signal of a specified frequency; a memory circuit dedicated to reading data that stores information on device parameters; a judgment unit that judges whether the device parameter data has been read successfully; and a control unit that controls the signal generating unit using the device parameter data that has been read successfully, wherein the control circuit has a memory area that stores information that is the same as the device parameter information stored in the memory circuit, and when the judgment unit judges that an abnormality has occurred in the reading of the device parameter data, the control unit controls the signal generating unit using the device parameter information stored in the memory area.

[0007] The memory circuit and the memory area of the control circuit store data including the device parameter data and an error detection code for the device parameter data as information about the device parameter, and the judgment unit may use the error detection code to judge whether the device parameter data has been read successfully.

[0008] The memory circuit may store multiple pieces of information on the same device parameter, and when the judgment unit determines that an abnormality has occurred in reading the data on all of the device parameter information, the control unit may control the signal generating unit using the device parameter information stored in the memory area.

[0009] In a second aspect of the present invention, there is provided an implementation method executed by a computer for implementing information on device parameters in the synthesizer device of the first aspect, the implementation method comprising the steps of: writing data including data on the device parameters corresponding to the synthesizer device and an error detection code for the data on the device parameters into the memory circuit as information on the device parameters; initializing the memory area of the control circuit; and copying the data stored in the memory circuit to the memory area of the control circuit. [Effects of the Invention]

[0010] According to the present invention, it is possible to prevent unintended operations from occurring even if data in a read-only memory circuit is corrupted. [Brief explanation of the drawings]

[0011] [Figure 1] 1 shows an example of the configuration of a synthesizer device 10 according to this embodiment. [Figure 2] 10 shows an example of an operation flow for implementing device parameter information in the synthesizer device 10 according to this embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] <Configuration example of synthesizer device 10> FIG. 1 shows an example of the configuration of a synthesizer device 10 according to this embodiment. Synthesizer device 10 outputs a signal at an externally specified frequency. Synthesizer device 10 is configured so that, when executing an operation to output a signal, unintended operation does not occur even if data in a read-only memory circuit that stores device parameters is corrupted. Synthesizer device 10 includes a signal generating section 20, an input section 30, a memory circuit 40, and a control circuit 50.

[0013] The signal generating unit 20 generates a signal of a specified frequency. The signal generating unit 20 has a PLL circuit or the like, and generates and outputs a signal of a specified frequency within a predetermined frequency range. The signal generating unit 20 is a known technology, so a detailed description thereof will be omitted here.

[0014] A signal specifying a frequency is input to the input unit 30 from outside. The input unit 30 functions as an interface connected to, for example, an external device, circuit, etc. The input unit 30 may be configured to be connectable to a network and may send and receive signals via the network. The input unit 30 may also have an input device operated by a user of the synthesizer device 10 and may receive input of a frequency specified by the user.

[0015] The memory circuit 40 is a read-only memory that stores information about device parameters. The memory circuit 40 is, for example, a non-volatile memory such as an EEPROM. Device parameters are written to the memory circuit 40 before the synthesizer device 10 is shipped, and the memory circuit 40 functions as a read-only memory after the synthesizer device 10 is shipped. The memory circuit 40 also stores programs and the like that the control circuit 50 uses to control each component.

[0016] It is desirable that the memory circuitry 40 stores a plurality of pieces of information about the same device parameter. In this embodiment, an example will be described in which the memory circuitry 40 has a first area 41 and a second area 42 that store the same device parameter. Furthermore, the first area 41 and the second area 42 store data including the device parameter data and an error detection code for the device parameter data as the device parameter information. In FIG. 1, the area that stores the device parameters is shown as a data area 43, and the area that stores the error detection code is shown as a thumb area 44.

[0017] The control circuit 50 uses data read from the memory circuit 40 to control each unit within the synthesizer device 10. For example, the control circuit 50 acquires a signal specifying a frequency input to the input unit 30, and supplies a control signal to the signal generating unit 20 to cause the signal generating unit 20 to generate a signal of the specified frequency. The control circuit 50 has a memory area 51, a determination unit 52, and a control unit 53.

[0018] The control circuit 50 is a CPU (Central Processing Unit) such as a processor. In other words, the CPU executes a program stored in the memory circuit 40 to function as the control circuit 50 having a memory area 51, a determination unit 52, and a control unit 53. Note that, for example, when the CPU functions as the control circuit 50, the memory circuit 40 may store information such as an OS (Operating System) that causes the CPU to function.

[0019] The memory area 51 stores the same information as the device parameter information stored in the memory circuitry 40. The memory area 51 stores, for example, data including the device parameter data and an error detection code for the device parameter data as the device parameter information. Fig. 1 shows an example in which the same device parameter information is stored in three areas, the first area 41, the second area 42, and the memory area 51 of the memory circuitry 40.

[0020] The determination unit 52 reads information about the device parameters from the storage circuitry 40 and determines whether the device parameter data has been read successfully. When information about a plurality of device parameters is stored in the storage circuitry 40, the determination unit 52 may read the information about the plurality of device parameters in order until the information about the device parameter is read successfully. When the determination unit 52 determines that the information about the device parameters has been read successfully, it supplies the information about the device parameters that have been read successfully to the control unit 53.

[0021] Furthermore, if the determination unit 52 cannot determine that the device parameter information stored in the memory circuit 40 has been read out normally even after sequentially reading all of the information, it notifies the control unit 53 that an abnormality has occurred in reading the device parameter information. The determination unit 52 uses an error detection code to determine whether the device parameter data has been read out normally. Since the error detection code is a known technology, a description of the determination operation using the error detection code will be omitted.

[0022] When the determining unit 52 determines that the device parameter information has been read successfully, the control unit 53 uses the data of the device parameter that has been read successfully to control the signal generating unit 20. This allows the control unit 53 to more reliably generate a control signal that causes the signal generating unit 20 to generate a signal of a specified frequency, and supply the control signal to the signal generating unit 20.

[0023] Furthermore, when the determination unit 52 determines that an abnormality has occurred in reading the data of the device parameters, the control unit 53 controls the signal generating unit 20 using the information on the device parameters stored in the memory area 51 of the control circuit 50. Note that when information on a plurality of device parameters is stored in the memory circuit 40, the control unit 53 controls the signal generating unit 20 using the information on the device parameters stored in the memory area 51 in response to the determination unit 52 determining that an abnormality has occurred in reading the data of the information on all of the device parameters.

[0024] As described above, the synthesizer device 10 according to this embodiment stores the same device parameter information in the memory circuit 40 and the control circuit 50, and controls the operation of the device using the device parameter information that has been correctly read. This allows the synthesizer device 10 to stably and reliably output a signal of a specified frequency. Furthermore, by including error detection code data in the device parameter information stored in the memory area 51 of the control circuit 50, it is possible to easily detect data abnormalities even if the data in the memory area 51 is rewritten by an unintentional write operation or the like.

[0025] The control circuit 50 of the synthesizer device 10 according to the present embodiment has been described as having a storage area 51 for storing device parameter information. Such a control circuit 50 may be configured as a single IC chip, such as an MCU (Micro Controller Unit) having a data flash area.

[0026] To write data to the data flash area in such an MCU, a dedicated software tool provided by the manufacturer of the MCU may be required. However, such software tools are not versatile and can be difficult for developers and operators of the synthesizer device 10 to use easily.

[0027] Therefore, as described above, synthesizer device 10 according to this embodiment is configured to store in the data flash area of the MCU the same information as the device parameter information stored in storage circuit 40. This allows developers and operators of synthesizer device 10 to configure synthesizer device 10 by copying the parameter information in storage circuit 40 to synthesizer device 10 without having to use dedicated software tools. A method for implementing device parameter information in such synthesizer device 10 will now be described.

[0028] <Operation flow for implementing device parameter information in the synthesizer device 10> 2 shows an example of an operational flow for implementing device parameter information in the synthesizer device 10 according to this embodiment. The operational flow shown in FIG. 2 is executed by a server, a computer, etc. when manufacturing the synthesizer device 10, when performing maintenance on the synthesizer device 10, etc.

[0029] First, data including device parameter data corresponding to the synthesizer device 10 and an error detection code for the device parameter data is written as device parameter information into the storage circuit 40 (S71). The device parameters are, for example, parameters specified in advance to adjust the performance, characteristics, etc. of the synthesizer device 10. Such device parameters may be specified automatically, for example, using a computer or the like together with a detection device that detects the frequency of the signal output by the synthesizer device 10.

[0030] Next, the storage area 51 of the control circuit 50 is initialized (S72). Even if the control circuit 50 is an MCU having a data flash area, the initialization of the data flash area can be easily executed.

[0031] Next, the data stored in memory circuit 40 is copied to memory area 51 of control circuit 50 (S73). Even if control circuit 50 is an MCU having a data flash area, copying to the data flash area can be easily performed. As described above, it is possible to easily configure synthesizer device 10 in which the same information as the device parameter information stored in memory circuit 40 is stored in the data flash area of the MCU. Therefore, it is possible to simply configure synthesizer device 10 in which unintended operation does not occur even if the data in read-only memory circuit 40 is corrupted.

[0032] In the above embodiment, the synthesizer device 10 that reads device parameter information and generates a signal of a specified frequency has been described as an example, but the present invention is not limited to this. As long as the device controls its operation by executing a control program using device parameters, the same effect can be obtained by having a similar configuration. Furthermore, the present invention is not limited to measurement devices, and can be applied to devices that perform predetermined operations by executing a control program that uses device-specific device parameters.

[0033] The present invention has been described above using embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments, and various modifications and changes are possible within the scope of the gist of the present invention. For example, all or part of the device can be configured by functionally or physically distributing or integrating any unit. Furthermore, new embodiments resulting from any combination of multiple embodiments are also included in the embodiments of the present invention. The effects of the new embodiments resulting from the combination also have the effects of the original embodiments. [Explanation of symbols]

[0034] 10 Synthesizer Device 20 Signal Generator 30 Input section 40 Memory circuit 41 First area 42 Second area 43 Data Area 44 Thumb Area 50 control circuit 51 Storage area 52 Judgment section 53 Control Unit

Claims

1. a signal generating unit that generates a signal of a specified frequency; a memory circuit dedicated to reading data that stores information on device parameters; a control circuit including a determination unit that determines whether the device parameter data has been read normally or not, and a control unit that controls the signal generating unit using the device parameter data that has been read normally; Equipped with the control circuit has a storage area for storing the same information as the information of the device parameters stored in the storage circuit; When the determination unit determines that an abnormality has occurred in reading the data of the device parameter, the control unit controls the signal generating unit using the information of the device parameter stored in the storage area. Synthesizer equipment.

2. the storage circuit and the storage area of the control circuit store data including the device parameter data and an error detection code for the device parameter data as information on the device parameter; the determination unit determines whether the device parameter data has been read normally using the error detection code.

2. The synthesizer device according to claim 1.

3. the storage circuit stores a plurality of pieces of information on the same device parameter, the control unit controls the signal generating unit using the information on the device parameters stored in the storage area when the determination unit determines that an abnormality has occurred in reading data on all of the information on the device parameters.

2. The synthesizer device according to claim 1.

4. 4. A computer-implemented method for implementing information about device parameters in the synthesizer device according to claim 1, comprising the steps of: writing data including the device parameter data corresponding to the synthesizer device and an error detection code for the device parameter data into the storage circuit as information on the device parameters; initializing the storage area of the control circuit; copying data stored in the memory circuit to the memory area of the control circuit; An implementation method comprising:

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