Method and system for achieving hardware real-time by non-real-time system of hils

Abstract

To achieve hardware real-time by a non-real-time system of a hardware-in-loop simulation (HILS).SOLUTION: A method includes: enabling a task program to automatically read computer configuration and determine the number Z of processor cores of a current computer device; when the number Z of the cores is not greater than X, set a thread number to be allocated to a real-time model task, to n=1 to execute the real-time model task, and when the number Z of the cores is greater than X, set the thread number to be allocated to the real-time model task to n=(Z-X) / Y to execute the real-time model task, Y representing the maximum number of threads that one physical core of the processor supports, (Z-X) / Y being a natural number, and X being set so that the number of own cores not involved in a hardware-in-loop simulation (HILS) is X / Y.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This application claims priority from Chinese Patent Application No. 202311360067.1 filed on October 19, 2023, and U.S. Patent Application No. 18 / 371,543 filed on September 22, 2023, the entire contents of which are incorporated herein by reference. The present invention belongs to the technical field of vehicle software development, and specifically relates to a method and system for achieving hard real time in a non-real time system in HILS (Hardware-in-the-Loop Simulation). [Background technology]

[0002] Hardware-in-the-Loop Simulation always relies on a real-time system to execute tasks, and task execution must be placed on the real-time system. The real-time system is located on another computer, not locally, so any operations must be completed via remote calls, which causes problems such as the inability to directly observe key signals that determine algorithm function and performance. Summary of the Invention

[0003] The present invention relates to a method for realizing hard real-time in a non-real-time system in HILS, the method including: A real-time model task is created to form a task program. The task program automatically reads the computer configuration and determines the number of processor cores Z (number Z of kernels of a processor) of the current computer device. If the number of cores Z is X or less, it sets the number of threads n = 1 to execute the real-time model task, and if the number of cores Z is more than X, it sets the number of threads n = (ZX) / Y to execute the real-time model task, where Y indicates the number of threads in one physical core of the processor.

[0004] In a second aspect, the present invention further provides a computer-readable storage medium having stored thereon computer-readable instructions that, when executed by at least one processor, cause the HILS to perform a method for achieving hard real-time in a non-real-time system.

[0005] In a third aspect, the present invention further provides an electronic device, the electronic device including a processor, a readable storage medium, a communication bus, and a communication interface, wherein the processor, the readable storage medium, and the communication interface communicate with each other via the communication bus. The readable storage medium is used to store a program for executing a method for realizing hard real-time in a non-real-time system in the HILS, and the program causes a processor to perform operations corresponding to the method for realizing hard real-time in a non-real-time system in the HILS.

[0006] In a fourth aspect, the present invention further provides a system for realizing hard real-time in a non-real-time system in a HILS, the system including a computer device configured to execute a task creation module and a task thread setting module. The task creation module is configured to create a real-time model task and form a task program. The task thread setting module is configured so that the task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and if the number of cores Z is less than or equal to X, sets the number of threads n=1 to execute the real-time model task, and if the number of cores Z is more than X, sets the number of threads n=(ZX) / Y to execute the real-time model task, where Y indicates the number of threads of one physical core of the processor.

[0007] In a fifth aspect, the present invention further provides a computer program product, the product comprising a computer-readable storage medium having stored thereon computer-readable program code, the computer-readable program code comprising instructions for causing at least one processor or at least one computing device to perform a method for achieving hard real-time in a non-real-time system in the HILS.

[0008] Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and obtained by the structure particularly pointed out in the description and drawings.

[0009] In order to make the above objects, features and advantages of the present invention more comprehensible, the following preferred embodiments will be described in detail in conjunction with the accompanying drawings. In order to more clearly describe the specific embodiments of the present invention or the technical solutions of the prior art, the following will briefly describe the drawings that need to be used to describe the specific embodiments or the prior art. The drawings described in the following description are some embodiments of the present invention, and it is obvious that those skilled in the art can obtain other drawings from these drawings without any creative efforts. [Brief explanation of the drawings]

[0010] [Figure 1]FIG. 1 is a flowchart of a method for achieving hard real-time in a non-real-time system in a HILS according to some embodiments. [Figure 2] FIG. 2 shows a principle block diagram of a system for realizing hard real-time in a non-real-time system in a HILS according to some embodiments. [Figure 3] FIG. 3 shows a principle block diagram of an electronic device according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0011] In order to clarify the objectives, technical aspects and advantages of the embodiments of the present invention, the technical aspects of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. However, it is clear that the described embodiments are only some of the embodiments of the present invention and do not represent all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without performing creative work fall within the scope of protection of the invention.

[0012] Currently, similar software typically achieves hard real-time through a real-time system when executing HILS tasks, which requires increased hardware investment and deployment costs. In some embodiments, a method for achieving hard real-time in a non-real-time system in HILS can achieve hard real-time in a non-real-time system without the need for a separate real-time system.

[0013] Specifically, some embodiments provide a method for achieving hard real-time in a non-real-time system in HILS, including: creating a real-time model task to form a task program; the task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device; if the number of cores Z is X or less, it sets the number of threads n = 1 to execute the real-time model task; if the number of cores Z is more than X, it sets the number of threads n = (ZX) / Y to execute the real-time model task, where Y represents the number of threads of one physical core of the processor.

[0014] In some embodiments of HILS, a non-real-time system achieves hard real-time by directly running a virtual hard real-time environment on a PC when executing HILS tasks, eliminating the need for a separate real-time system. Furthermore, all operations are performed locally, significantly improving development and testing efficiency and enhancing the flexibility of simulation signal monitoring and modification. For example, if a user wishes to monitor a local variable, the local program code can be modified at any time to add functions such as printing information, monitoring information, and curve-drawing signal information, which can then be compiled locally and immediately executed, resulting in high efficiency. Conventional approaches require designing input and output interfaces for this local variable, updating the simulation model interface table, compiling the entire code program, redeploying the real-time system software, and then remotely executing and monitoring the simulation model.

[0015] Various non-limiting embodiments of examples of the present disclosure are described in detail below in conjunction with the drawings. As shown in Figure 1, some embodiments provide a method for achieving hard real-time in a non-real-time system in a HILS. The method includes: A real-time model task is created to form a task program. The task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and if the number of cores Z is X or less, it sets the number of threads n = 1 and executes the real-time model task; if the number of cores Z is more than X, it sets the number of threads n = (ZX) / Y and executes the real-time model task. Y indicates the number of threads per physical core of the processor.

[0016] Specifically, the real-time model task is a timing program. First, a timer is created to create the real-time model task. After creating the timer, the timer period is set, for example, 500 microseconds. Then, the step function of the model is called according to this period. The created task program is a code module for real-time model task simulation.

[0017] The number of processor cores Z is determined by the processor model, and different processor models have completely different core numbers Z. For example, the number of cores Z of the Intel Xeon Platinum 9282 is 56, while the number of cores Z of the Intel Core i5-2520M is 2.

[0018] If Z is less than X, the current computer performance is weak and it is not suitable for running simulations using multiple threads. If the number of cores Z exceeds X, it will cause the local computer to freeze. In this case, it is suitable to run the real-time model task using a single thread, i.e., the number of threads n is set to 1 to run the real-time model task.

[0019] On the other hand, if Z exceeds X, it is necessary to limit the minimum value of X to prevent the execution of multi-threaded simulations when the computer's performance is weak. In other words, the minimum value of Z, the number of computer cores that execute the simulation task in multi-threaded mode, is limited. In the limiting case of X=0, the number of threads n=Z / Y is equal to the number of real physical cores. If X is not zero, it indicates that X / Y real physical cores are reserved as self-cores, and these self-cores do not participate in the simulation, thereby ensuring the smooth operation of the software system and other software.

[0020] In one implementation of some embodiments, executing a real-time model task with the number of threads set to n=1 includes: Define the real-time time interval m for the real-time model task execution. The thread acquires the current time t in real time and determines in real time whether the current time t is greater than the next execution time t_next. If t>t_next, t_next=t_next+m and execute the real-time model task.

[0021] When the real-time model task is executed for the first time, t_next=m, t=0. Specifically, we will explain in detail how to execute a real-time model task when n=1, using examples. If X=4 and the processor model of the computer device is Intel Core i5-2520M, then the number of cores Z=2, which is less than 4, and the current computer performance is weak and not suitable for running simulations using multiple threads. Otherwise, it will cause a local computer failure, and in this case, it is suitable for running real-time model tasks using a single thread. That is, the number of threads n=1 is set to run the real-time model tasks.

[0022] When only one thread executes a real-time model task and determines whether the current time t is greater than the next execution time t_next during execution, there is no multithread preemption, so there is no need to synchronize threads using means such as critical sections, thereby reducing the performance cost of introducing critical sections.However, the flaws of single threads themselves are also becoming apparent.If the processor time slice of that single thread is taken away by OS scheduling, the processor may start a new time slice, which reduces the locking accuracy of the t_next time, i.e., the level of execution time accuracy for locking the next time.

[0023] When a real-time mode task is executed in a single thread, the real-time interval m for executing the real-time mode task is set to 500 microseconds. The pseudocode for the thread executing the real-time model task is as follows: m = 0.00005; while (is_running) { t = get_current_time_stamp_us(); if (t > t_next){ t_next_ = t_next + m; run_model_task(); } other_task(); } Here, "is_running" is the simulation execution enable flag. If the simulation is terminated by the user or exits naturally, the flag is false and the algorithm does not execute the while loop. "get_current_time_stamp_us()" is an internal function of the Windows system, used to obtain the current timestamp, in microseconds. "run_model_task()" is an internal function of the Windows system, used to periodically call the model's step function. "other_task()" is another task of the Windows system, where, for example, Sleep(1) can be executed to reduce the consumption of processor time on the current processor.

[0024] In another implementation scenario of some embodiments, when the number of threads is n=(ZX) / Y, if the number of cores Z exceeds X, it indicates that the processor of the current computer device is suitable for launching multi-threaded simulation. Define the real-time interval m for the real-time model task execution. Each thread simultaneously acquires the corresponding current time t in real time, and determines in real time whether the corresponding current time t is greater than the next execution time t_next. When at least one thread recognizes that t>t_next, the thread attempts to enter the critical section, and at this time other threads are prevented from entering the critical section. After the thread successfully enters the critical section, the flag that determined that t>t_next in the previous thread is invalidated, and therefore the thread that successfully enters the critical section performs the following in the critical section: The current time t is repeatedly acquired, and it is determined whether the current time t is greater than the next execution time t_next. If so, t_next=t_next+m, and simultaneously execute the real-time model task, and the thread exits the critical section. Otherwise, the thread exits the critical section directly.

[0025] Specifically, we will explain in detail how to execute a real-time model task when n=(ZX) / Y, using examples. Set X=2 and Y=2. If the processor model of the computer device is Intel Core i7-8700, the number of cores is Z=6. If it is greater than 2, set the number of threads n=(ZX) / Y=(6-2) / 2=2 to execute the real-time model task.

[0026] The two threads are defined as the 0th thread and the 1st thread, respectively. If we define the real-time interval m = 500 microseconds for the execution of the real-time model task, the pseudocode for each thread to execute the model task is as follows: m = 0.00005; while (is_running) { t = get_current_time_stamp_us(); if (t > t_next){ EnterCriticalSection(FSection); t = get_current_time_stamp_us(); if (t > t_next){ t_next_ = t_next + m; run_model_task(); } LeaveCriticalSection(FSection); } other_task(); } Here, "is_running" is the simulation execution enable flag. If the simulation is terminated by the user or exits naturally, the flag is false and the algorithm does not execute the while loop. "get_current_time_stamp_us()" is an internal function of the Windows system, used to obtain the current timestamp, measured in microseconds. "EnterCriticalSection" is an API function of the Windows system, whose role is to enter a critical section. "FSection" is a critical section object shared by multiple threads. "LeaveCriticalSection" is a Windows API function that works to exit a critical section. "run_model_task()" is an internal function of the Windows system, used to periodically call the model's step function. "other_task()" is another task of the Windows system, which can, for example, execute Sleep(1) here to reduce the consumption of processor time on the current processor.

[0027] The above pseudocode effectively alleviates the situation where a single thread loses processor time due to system scheduling, resulting in a decrease in simulation time accuracy. In other words, the above method effectively ensures simulation time accuracy, thereby guaranteeing simulation real-time performance.

[0028] Threads that unsuccessfully enter the critical section are blocked from entering the critical section and begin their next attempt after the threads that entered the critical section have exited the critical section.

[0029] For example, in the case of a real-time model task with n = 2, if thread 0 is unable to determine the next execution time t_next in a timely manner due to system scheduling, thread 1 will determine that the probability of determining the next execution time t_next is very high and that t > t_next. When this occurs, thread 0 will successfully enter the critical section and execute the model task with priority. At this time, thread 0 will be blocked on the line of code that enters the critical section. After thread 1 completes the real-time model task and exits the critical section, thread 0 will begin to determine whether the current time t is greater than the next execution time t_next. After thread 0 successfully enters the critical section, it updates the current time t again. That is, it repeatedly obtains the current time t. If it determines that the current time t is less than the next execution time t_next (the next execution time t_next is updated by thread 1), thread 0 will not execute the real-time model task, but will immediately exit the critical section and wait for the next decision.

[0030] The thread that successfully enters the critical section is determined by the critical section itself, i.e., the thread that successfully enters the critical section is randomly determined by the Windows system.

[0031] t_next is a common global variable shared by all threads. This means that multiple threads can access the same variable simultaneously. Each thread can share and access the same variable. In this way, when a thread first finds that the current time t is greater than the next execution time t_next, it immediately attempts to enter the critical section. This effectively mitigates the situation where a single thread loses processor time due to system scheduling, thereby reducing simulation time accuracy, and effectively guarantees simulation time accuracy.

[0032] Each configured thread occupies one physical core of the processor, The index of the processor physical core that each thread occupies is equal to the value obtained by performing a modulo operation on the corresponding thread index and the total number of processor physical cores.

[0033] Each configured thread occupies one physical core of the processor, enabling optimal performance of the computer system.

[0034] For example, if there are 10 threads in total and the total number of physical cores in the processor is 8, the processor physical core index occupied by thread 0 is equal to the value obtained by performing a modulo operation on 0 and 8, which is 0. The processor physical core index occupied by thread 9 is equal to the value obtained by performing a modulo operation on 9 and 8, which is 1.

[0035] In the HILS disclosed herein, the method for enabling a non-real-time system to achieve hard real-time is to directly execute a virtual hard real-time environment on a personal computer when executing HILS tasks, thereby achieving hard real-time. This means that there is no need to purchase a real-time system, and all operations can be performed locally, greatly improving development and testing efficiency and increasing the degree of freedom for observing and modifying simulation signals.

[0036] 2, some embodiments further provide a system for achieving hard real-time in a non-real-time system in a HILS, including a computer device, wherein the computer device is configured to execute a task creation module and a task thread setting module. The task creation module is configured to create a real-time model task and form a task program. The task thread setting module is configured so that the task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and if the number of cores Z is less than or equal to X, sets the number of threads n=1 to execute the real-time model task, and if the number of cores Z is more than X, sets the number of threads n=(ZX) / Y to execute the real-time model task, where Y indicates the number of threads of one physical core of the processor.

[0037] In some embodiments, the functions performed by the task creation module and the task thread setting module are implemented in a computer device. For specific details, please refer to the specific description of the method for implementing hard real-time in a non-real-time system in the HILS described above, and the description will be omitted here.

[0038] The following describes the electronic device in some embodiments from the perspective of hardware processing. As shown in FIG. 3, some embodiments of the present disclosure are not limited to a specific implementation of an electronic device. When the processor executes the program, it implements the steps in the embodiment of the method for realizing hard real-time in a non-real-time system in HILS shown in Fig. 1, for example, steps S101 and S102 shown in Fig. 1. Alternatively, when the processor executes the computer program, it implements the functions of each module or unit in the embodiment of each device.

[0039] In some embodiments, the processor is specifically used to implement the following steps: A real-time model task is created to form a task program. The task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and if the number of cores Z is X or less, it sets the number of threads n = 1 and executes the real-time model task; if the number of cores Z is more than X, it sets the number of threads n = (ZX) / Y and executes the real-time model task. Y indicates the number of threads per physical core of the processor.

[0040] Optionally, in a possible embodiment, the processor can be used to further implement the following steps: Setting the number of threads to n=1 and running the real-time model task includes: Define the real-time interval m for the real-time model task execution. The thread acquires the current time t in real time and determines in real time whether the current time t is greater than the next execution time t_next. If t>t_next, t_next=t_next+m, and the real-time model tasks are executed simultaneously.

[0041] Optionally, in a possible embodiment, the processor can be used to further implement the following steps: When the real-time model task is first executed, t_next=m, t=0.

[0042] Optionally, in a possible embodiment, the processor can be used to further implement the following steps: To execute real-time model tasks, set the number of threads as n=(ZX) / Y, including: Define the real-time interval m for the real-time model task execution. Each thread simultaneously acquires the corresponding current time t in real time, and determines in real time whether the corresponding current time t is greater than the next execution time t_next. If at least one thread recognizes that t>t_next, that thread attempts to enter the critical section, and if the thread successfully enters the critical section, it performs the following in the critical section: The current time t is repeatedly acquired, and it is determined whether the current time t is greater than the next execution time t_next. If so, t_next=t_next+m, and simultaneously execute the real-time model task and the thread exits the critical section. Otherwise, the thread exits the critical section directly.

[0043] Optionally, in a possible embodiment, the processor can be used to further implement the following steps: Any thread that has not successfully entered the critical section will be blocked from entering the critical section and will begin its next attempt after the thread that entered the critical section has exited the critical section.

[0044] Optionally, in a possible embodiment, the processor can be used to further implement the following steps: The thread that successfully enters the critical section is determined by the critical section itself.

[0045] Optionally, in a possible embodiment, the processor can be used to further implement the following steps: t_next is a global variable common to all threads.

[0046] Optionally, in a possible embodiment, the processor can be used to further implement the following steps: Each configured thread occupies one physical core of the processor and includes: The physical core index of the processor that each thread occupies is equal to the value obtained by performing a modulo operation on the corresponding thread number index and the total number of physical cores of the processor.

[0047] Some embodiments provide a computer-readable storage medium having computer-readable instructions stored thereon that, when executed by at least one processor, cause the medium to perform the method for achieving hard real-time in a non-real-time system in the HILS of the above-described embodiments.

[0048] Some embodiments provide a computer program product, including a computer-readable storage medium having computer-readable program code stored thereon, the computer-readable program code including instructions that cause at least one processor or at least one computing device to perform a method for achieving hard real-time in a non-real-time system in any of the above possible HILs.

[0049] In other embodiments, computer equipment, industrial computers, etc. may also be types of electronic devices.

[0050] It should be noted that the configuration shown in FIG. 3 is not intended to limit the electronic device, which may include fewer or more components than those shown, may combine some components, or may have different component arrangements.

[0051] In some embodiments, the communication interface may be a communication interface connectable to an external bus adapter, such as RS232, RS485, a USB port, a TYPE port, etc. A wired or wireless network interface may also be included, and the network interface may optionally include a wired and / or wireless interface typically used to establish a communication connection between the computing device and other electronic devices (e.g., a WI-FI interface, a Bluetooth interface, etc.). A storage module, readable storage medium, or computer-readable storage medium includes at least one type of memory. Memory may include flash memory, hard disk, multimedia card, card-type memory (e.g., SD or DX memory), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, it may be an internal storage unit of a computer device, such as a hard disk of the computer device. In other embodiments, memory may be an external storage device of a computer device, such as a plug-in hard disk installed in the computer device, a SmartMedia Card (SMC), a Secure Digital Card (SD), a flash card, etc. Furthermore, memory may include both an internal storage unit of a computer device and an external storage device. Memory is used to store various data, such as application software and computer program code installed in the computer device, as well as to temporarily store output data or data to be output.

[0052] In some embodiments, the processor may be a Central Processing Unit (CPU), controller, microcontroller, microprocessor, or other data processing chip that executes program code stored in memory or processes data, for example, to execute a computer program.

[0053] In some embodiments, the communication bus may be an input / output bus, which may be a Peripheral Component Interconnect (PCI) bus or an Enhanced Industry Standard Architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc.

[0054] Optionally, the computer device may further include a user interface. The user interface may include input units such as a display and a keyboard, and optionally, the user interface may also include a standard wired interface or a wireless interface. Optionally, in some embodiments, the display or display module may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch device, etc. In this case, the display or display module is also called a display screen or a display unit, since it displays information processed in the computer device and a visualized user interface.

[0055] In some embodiments of the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. The apparatus embodiments described above are merely exemplary. For example, the flowcharts and block diagrams in the drawings illustrate possible architectures, functions, and operations of apparatuses, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, a program segment, or a portion of code. The module, program segment, or portion of code includes executable instructions for implementing one or more predetermined logical functions. Note that in some alternative implementations, the functions depicted in the blocks may occur in a different order than depicted in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, or may sometimes be executed in the reverse order, depending on the functionality involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented in a dedicated hardware-based system that performs the predetermined functions or operations, or may be implemented in a combination of dedicated hardware and computer instructions.

[0056] Furthermore, each functional module in each embodiment of the present invention may be integrated together to form a single independent part, each module may exist independently, or two or more modules may be integrated to form a single independent part.

[0057] The above functions can be realized in the form of software functional modules and stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention essentially or a part that contributes to the prior art or a part of the technical solution can be expressed in the form of a software product. The computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention.

[0058] The above-described preferred embodiments of the present invention have been enlightened, and those skilled in the art can make various changes and modifications based on the above description without departing from the technical spirit of the present invention. The technical scope of the present invention is not limited to the content of the specification, but should be determined based on the claims.

Claims

1. A method for achieving hard real-time in a non-real-time system in HILS, comprising: The task program automatically reads the computer configuration to determine the number Z of processor cores of the current computer device, and when X is set so that the maximum number of threads supported by one physical core of the processor is Y, (Z-X) / Y is a natural number and the number of own cores not participating in the HILS is X / Y, if the number Z of cores is X or less, the number of threads to be assigned to the real-time model task is set to n=1 and the real-time model task is executed, and if the number Z of cores is more than X, the number of threads to be assigned to the real-time model task is set to n=(Z-X) / Y and the real-time model task is executed. A method for realizing hard real-time in a non-real-time system in a HILS.

2. Setting the number of threads to n=1 and executing a real-time model task is defining a real-time time interval m for execution of a real-time model task; The thread acquires a current time t in real time and determines in real time whether the current time t is greater than a next execution time t_next; and executing the real-time model task simultaneously with t_next=t_next+m when t>t_next.

3. 3. The method for realizing hard real-time in a non-real-time system in a HILS according to claim 2, wherein when a real-time model task is executed for the first time, t_next=m, t=0.

4. Setting the number of threads to n = (Z-X) / Y and executing a real-time model task is defining a real-time time interval m for execution of a real-time model task; Each thread simultaneously acquires a corresponding current time t in real time, and determines in real time whether the corresponding current time t is greater than a next execution time t_next; If at least one thread recognizes that t>t_next, that thread attempts to enter the critical section, and the thread that successfully enters the critical section: (1) Repeatedly acquire the current time t and determine whether the current time t is greater than the next execution time t_next; (2) If it is larger, set t_next = t_next + m, execute the real-time model task simultaneously, and exit the critical section. (3) If it is not large, include directly exiting the critical section.

2. The method for realizing hard real-time in a non-real-time system in a HILS according to claim 1.

5. 5. The method for realizing hard real-time in a non-real-time system in a HILS according to claim 4, wherein a thread that has not normally entered the critical section is prevented from entering the critical section, and a next attempt is initiated after a thread that has entered the critical section has exited the critical section.

6. 6. The method for realizing hard real-time in a non-real-time system in a HILS according to claim 5, wherein the thread that normally enters the critical section is determined by the critical section itself.

7. 5. The method for realizing hard real-time in a non-real-time system in a HILS according to claim 4, wherein t_next is a common global variable for each thread.

8. Each configured thread occupies one physical core of the processor, 2. The method for realizing hard real-time in a non-real-time system in a HILS according to claim 1, wherein the physical core index of the processor occupied by each thread is equal to a value obtained by performing a modulo operation using the corresponding thread number index as the dividend and the total number of physical cores of the processor as the divisor.

9. A computer-readable storage medium, comprising: A computer-readable storage medium having stored thereon computer-readable instructions that, when executed by at least one processor, cause the medium to perform a method for realizing hard real-time in a non-real-time system in a HILS according to any one of claims 1 to 8.

10. An electronic device, a processor, a readable storage medium, a communication bus, and a communication interface; the processor, the readable storage medium, and the communication interface communicate with each other via the communication bus; The readable storage medium is configured to store a program for a method for realizing hard real time in a non-real time system in a HILS according to any one of claims 1 to 8, and the program is configured to cause a processor to execute operations corresponding to the method for realizing hard real time in a non-real time system in the HILS.

11. A system for realizing hard real-time in a non-real-time system in HILS, a computer device configured to execute a task thread setting module; The task thread setting module is configured such that the task program automatically reads the computer configuration to determine the number Z of processor cores of the current computer device, and when X is set so that the maximum number of threads supported by one physical core of the processor is Y, (Z-X) / Y is a natural number, and the number of self-cores not participating in the HILS is X / Y, if the number Z of cores is X or less, the number of threads n to be assigned to the real-time model task is set to 1 and the real-time model task is executed; otherwise, the number of threads n to be assigned to the real-time model task is set to (Z-X) / Y and the real-time model task is executed. A system for realizing hard real-time in a non-real-time system in a HILS.

12. The system for realizing hard real-time in a non-real-time system in a HILS according to claim 11, wherein the computer device is configured to execute a task thread setting module according to the method of any one of claims 2 to 8.

13. A computer program causing at least one processor or at least one computer device to execute the method for realizing hard real-time in a non-real-time system in a HILS according to any one of claims 1 to 8.

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