Display device and electronic device

Abstract

To provide a display device with high light extraction efficiency.SOLUTION: A display device has first to third subpixels in a pixel, the first and second subpixels are arranged adjacent to each other in a first direction, and the third subpixel is arranged adjacent to each of the first and second subpixels in a second direction perpendicular to the first direction. A first plano-convex lens is arranged above the first subpixel, a second plano-convex lens is arranged above the second subpixel, and the third and fourth plano-convex lenses are arranged adjacent to each other above the third subpixel, thereby improving light extraction efficiency.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a display device and an electronic device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. The technical field of one embodiment of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specific examples of the technical field of one embodiment of the present invention disclosed in this specification include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, lighting devices, power storage devices, memory devices, imaging devices, and operation methods thereof or manufacturing methods thereof.

[0003] Note that in this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are examples of a semiconductor device. In addition, a memory device, a display device, an imaging device, and an electronic device may include a semiconductor device. [Background technology]

[0004] Goggle-type and eyeglass-type devices are being developed as electronic devices for XR (a general term for virtual reality (VR), augmented reality (AR), mixed reality (MR), etc.).

[0005] Representative display panels used in these electronic devices include display devices equipped with liquid crystal elements, and display devices equipped with organic EL (Electro Luminescence) elements or light emitting diodes (LEDs: Light Emitting Diodes).

[0006] A display device equipped with an organic EL element does not require a backlight, which is necessary for a liquid crystal display device, and therefore can realize a thin, lightweight, high-contrast, and low-power display device. For example, an example of a display device using an organic EL element is described in Patent Document 1. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Publication No. 2018-107444 Summary of the Invention [Problem to be solved by the invention]

[0008] Catadioptric systems used in VR devices, etc., use selective reflection of polarized light, which results in insufficient light utilization efficiency. AR devices also require high display visibility even in strong external light. For this reason, XR devices have had to use display devices with increased brightness. Increasing the brightness of display devices can lead to increased power consumption and reduced reliability of the display device, so display devices with high light extraction efficiency are desired.

[0009] Therefore, an object of one embodiment of the present invention is to provide a display device with high light extraction efficiency, a display device with low power consumption, a display device with high visibility, an electronic device including the display device, or a novel electronic device.

[0010] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become clear from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0011] One embodiment of the present invention relates to a display device with high light extraction efficiency.

[0012] One embodiment of the present invention is a display device in which a pixel has a first subpixel, a second subpixel, and a third subpixel each emitting a different light color, the first and second subpixels being arranged adjacent to each other in a first direction, the third subpixel being arranged adjacent to each of the first and second subpixels in a second direction perpendicular to the first direction, a first plano-convex lens being arranged on the first subpixel, a second plano-convex lens being arranged on the second subpixel, and a third plano-convex lens and a fourth plano-convex lens being arranged adjacent to each other in the first direction on the third subpixel.

[0013] The third plano-convex lens is arranged adjacent to the first plano-convex lens in the second direction, the fourth plano-convex lens is arranged adjacent to the second plano-convex lens in the second direction, the first and fourth plano-convex lenses have circular outer shapes with a radius r1 when viewed from above, the second and third plano-convex lenses have circular outer shapes with a radius r2 when viewed from above, the pixels are square when viewed from above, and it is preferable that the length of one side of the pixel is 2(r1+r2) or more.

[0014] A partial area of ​​the third plano-convex lens can be provided on an adjacent pixel. Preferably, the first to fourth plano-convex lenses are spherical lenses.

[0015] When viewed from above, it is preferable that the third subpixel is rectangular, the center points of the third and fourth plano-convex lenses are on or near a line that vertically bisects the short side of the third subpixel, the center point of the third plano-convex lens is at or near a position that is a distance r2 from the center point of the third subpixel, and the center point of the fourth plano-convex lens is at or near a position that is a distance r1 from the center point of the third subpixel.

[0016] Another embodiment of the present invention is a display device having a pixel including a first subpixel, a second subpixel, and a third subpixel each emitting a different light color, the first and second subpixels being arranged adjacent to each other in a first direction, the third subpixel being arranged adjacent to each of the first and second subpixels in a second direction perpendicular to the first direction, a first plano-convex lens being arranged on the first subpixel, a second plano-convex lens being arranged on the second subpixel, and a lens array being arranged on the third subpixel, the lens array having a configuration in which three different plano-convex lenses are joined in the first direction, and the lens array having a first lens region, a second lens region, and a third lens region each having a different curvature arranged in that order in the first direction.

[0017] It is preferred that the first lens region has a region of a first curvature, the second lens region has a region of a second curvature, the third lens region has a region of a third curvature, the first region of curvature has a curvature equivalent to that of the second plano-convex lens, the third region of curvature has a curvature equivalent to that of the first plano-convex lens, and the second lens region has a curvature between that of the first plano-convex lens and that of the second plano-convex lens.

[0018] The first lens region is arranged adjacent to the first plano-convex lens in the second direction, the third lens region is arranged adjacent to the second plano-convex lens in the second direction, the first plano-convex lens has a circular outer shape with a radius r1 when viewed from above, the second plano-convex lens has a circular outer shape with a radius r2 when viewed from above, the pixel has a square outer shape when viewed from above, and it is preferable that the length of one side of the pixel is 2(r1+r2) or more.

[0019] Some areas of the lens array can be provided over adjacent pixels.

[0020] When viewed from above, the third subpixel is rectangular, and the center points of the first to third lens regions are located on or near a line that vertically bisects the short side of the third subpixel, and it is preferable that the center point of the second lens region is located on or near the center point of the third subpixel.

[0021] Preferably, one of the first and second light-emitting elements emits red light, the other of the first and second light-emitting elements emits green light, and the third light-emitting element emits blue light.

[0022] An electronic device using the above-described display device as a light source and having a catadioptric system provided on the display surface side of the display device is also one aspect of the present invention. [Effects of the Invention]

[0023] According to one embodiment of the present invention, a display device with high light extraction efficiency, a display device with low power consumption, a display device with high visibility, an electronic device including the display device, or a novel electronic device can be provided.

[0024] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims. [Brief explanation of the drawings]

[0025] [Figure 1] FIG. 1 is a diagram illustrating a pixel of a display device. [Figure 2] 2(A) and 2(B) are diagrams illustrating pixels in an S-stripe arrangement. [Figure 3] 3A to 3D are diagrams for explaining the arrangement of lenses. [Figure 4] 4(A1) to 4(C2) are diagrams for explaining a simulation model. [Figure 5] FIG. 5 is a diagram illustrating a simulation model. [Figure 6] FIG. 6 is a diagram illustrating the simulation results. [Figure 7] FIG. 7 is a diagram illustrating a pixel of a display device. [Figure 8]8(A) and 8(B) are diagrams for explaining pixels in an S-stripe arrangement. [Figure 9] 9(A) and 9(B) are diagrams for explaining the arrangement of lenses. [Figure 10] FIG. 10 is a diagram illustrating the simulation results. [Figure 11] 11A to 11C are diagrams illustrating a display device. [Figure 12] 12(A) to 12(E) are diagrams illustrating a method for manufacturing a lens. [Figure 13] 13(A) and 13(B) are diagrams illustrating a display device. [Figure 14] 14A to 14E are diagrams illustrating a display panel. [Figure 15] 15(A) to 15(C) are diagrams illustrating a glasses-type device. [Figure 16] 16(A) and 16(B) are diagrams illustrating an example of the configuration of a display panel. [Figure 17] FIG. 17 is a diagram illustrating an example of the configuration of a display panel. [Figure 18] FIG. 18 is a diagram illustrating an example of the configuration of a display panel. [Figure 19] FIG. 19 is a diagram illustrating an example of the configuration of a display panel. [Figure 20] FIG. 20 is a diagram illustrating an example of the configuration of a display panel. [Figure 21] FIG. 21 is a diagram illustrating an example of the configuration of a display panel. [Figure 22] FIG. 22 is a diagram illustrating an example of the configuration of a display panel. [Figure 23] 23A and 23B are diagrams illustrating a transistor. DETAILED DESCRIPTION OF THE INVENTION

[0026] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art will readily understand that various modifications in form and detail may be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same parts or parts having similar functions will be designated by the same reference numerals in different drawings, and repeated description thereof may be omitted. Hatching of the same elements constituting the drawings may be omitted or changed as appropriate in different drawings.

[0027] Furthermore, even if a circuit diagram shows a single element, that element may be configured as multiple elements as long as there is no functional problem. For example, multiple transistors operating as switches may be connected in series or parallel. Also, a capacitor may be divided and placed in multiple locations.

[0028] Furthermore, one conductor may have multiple functions, such as wiring, electrode, and terminal, and in this specification, multiple names may be used for the same element. Also, even when elements are shown as being directly connected to each other on a circuit diagram, in reality, the elements may be connected via one or more conductors, and in this specification, such a configuration is also included in the category of direct connection.

[0029] In this specification, "connection" includes, as an example, "electrical connection." Note that the term "electrical connection" is sometimes used to define the connection relationship between circuit elements as a physical entity. Furthermore, "electrical connection" includes "direct connection" and "indirect connection." "A and B are directly connected" means that A and B are connected without the intervention of a circuit element (e.g., a transistor, a switch, etc.; wiring is not considered a circuit element). On the other hand, "A and B are indirectly connected" means that A and B are connected via one or more circuit elements.

[0030] For example, assuming that a circuit including A and B is operating, if there is a time during the operation of the circuit when an electrical signal is exchanged or an electrical potential interaction occurs between A and B, then it can be defined that "A and B are indirectly connected" as objects. Note that even if there is a time during the operation of the circuit when no electrical signal is exchanged or an electrical potential interaction occurs between A and B, it can still be defined as "A and B are indirectly connected" if there is a time during the operation of the circuit when an electrical signal is exchanged or an electrical potential interaction occurs between A and B.

[0031] An example of a case where "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors. On the other hand, an example of a case where it cannot be said that "A and B are indirectly connected" is when an insulator is present in the path from A to B. Specifically, this includes cases where a capacitive element is connected between A and B, or where a transistor gate insulating film or the like is present between A and B. Therefore, it cannot be said that "the gate (A) of a transistor and the source or drain (B) of the transistor are indirectly connected."

[0032] Another example of a case where it cannot be said that "A and B are indirectly connected" is when multiple transistors are connected via their sources and drains to the path from A to B, and a constant potential V is supplied to a node between one transistor and another from a power supply, GND, etc.

[0033] In this specification, the term "square" includes "approximately square," and the term "rectangle" includes "approximately rectangular." The term "approximately square" refers to one or a combination of two or more of the following: a square, a shape in which the corners of a square have been deformed to have curvature, or a shape in which one or more sides of a square have been deformed to have curvature. The term "approximately rectangular" refers to one or a combination of two or more of the following: a rectangle, a shape in which the corners of a rectangle have been deformed to have curvature, or a shape in which one or more sides of a rectangle have been deformed to have curvature. The term "circular" is not limited to a perfect circle, but includes an approximately circular shape with multiple curvatures around the circumference.

[0034] (Embodiment 1) In this embodiment, a display device and an electronic device according to one embodiment of the present invention will be described.

[0035] One embodiment of the present invention is a display device with high light extraction efficiency. The display device includes a spherical lens provided over a sub-pixel. The spherical lens is provided for each sub-pixel that emits a different light color, and is a spherical lens that is circular in top view or a lens array in which a plurality of spherical lenses are bonded together.

[0036] The lenses placed on the sub-pixels are preferably hemispherical lenses that can strongly refract light emitted from the light-emitting elements in an oblique direction toward the front. However, in pixel arrays where the shapes of each sub-pixel are different, such as an S-stripe array, it may not be possible to place an appropriate hemispherical lens on each sub-pixel due to pixel size restrictions.

[0037] Therefore, in one embodiment of the present invention, a spherical lens, a plurality of spherical lenses, or a lens array in which a plurality of spherical lenses are bonded together is provided over a sub-pixel. By using such a lens or lens array, even if the shapes of the sub-pixels in a pixel are not uniform, light emitted from the light-emitting element can be efficiently emitted in the forward direction.

[0038] By using the spherical lens or lens array of one embodiment of the present invention, loss of light emitted from a light-emitting element due to divergence and reflection can be suppressed, and the light extraction efficiency of a display device can be improved. This action also makes it possible to suppress the voltage applied to the light-emitting element, thereby improving the reliability of the light-emitting element and reducing the power consumption of the light-emitting element. Furthermore, by using the display device, the visibility of XR equipment and the like can be improved.

[0039] Note that all lenses used in one embodiment of the present invention are plano-convex lenses, and description of each lens may be omitted.

[0040] FIG. 1 is a perspective view of a portion of a pixel array included in a display device according to one embodiment of the present invention, showing a pixel 101a. Note that a pixel is the smallest unit element of an image whose color and brightness can be controlled. The pixel 101a includes a subpixel 105R having a light-emitting element that emits red light, a subpixel 105G having a light-emitting element that emits green light, and a subpixel 105B having a light-emitting element that emits blue light. Lenses 102 (lenses 102R, 102G, and 102B) are provided on each subpixel. The lens 102R is provided on the subpixel 105R, the lens 102G is provided on the subpixel 105G, and the lens 102B (lenses 102B1 and 102B2) is provided on the subpixel 105B. Note that the stack 100 includes the elements that constitute the pixel 101a.

[0041] The insulating layer 103 of the laminate 100 is an insulating layer provided between the light-emitting element and the lens 102, and is transparent to visible light. The insulating layer 103 is located on the optical path, and therefore has optical interaction with the lens 102 with the light emitted from the light-emitting element.

[0042] The lens 102 is a plano-convex lens, and is also called a microlens because it has a minute size corresponding to the size of the pixel. Furthermore, a configuration in which the plano-convex lenses are regularly arranged on a surface is also called an MLA (microlens array).

[0043] In this embodiment, an example will be described in which pixels in an S-stripe arrangement are used as a representative example of sub-pixels with different shapes, but it is also possible to apply this to any arrangement of sub-pixels, regardless of their shape, such as a stripe arrangement, a delta arrangement, a zigzag arrangement, a pentile arrangement, or a diamond arrangement.

[0044] A pixel in the S-stripe arrangement has first to third subpixels that emit light of different colors. The first and second subpixels are arranged adjacent to each other in a first direction, and the third subpixel is arranged adjacent to each of the first and second subpixels in a second direction that is perpendicular to the first direction.

[0045] The S-stripe arrangement allows the area between sub-pixels to be smaller than that of a stripe arrangement, for example, making it easier to increase the aperture ratio and advantageous for increasing the brightness of the display panel.

[0046] 2A is an example of a top view of a pixel in an S-stripe arrangement, showing the layout of a pixel 101a that can be used in a 5009 ppi display panel. The pixel 101a includes a sub-pixel 105R having a light-emitting element that emits red light (e.g., wavelength 625 nm to 780 nm), a sub-pixel 105G having a light-emitting element that emits green light (e.g., wavelength 500 nm to 565 nm), and a sub-pixel 105B having a light-emitting element that emits blue light (e.g., wavelength 450 nm to 485 nm).

[0047] The lifetime of a light-emitting element is correlated with the current density during light emission. Therefore, it is preferable that a subpixel having a light-emitting element with relatively high reliability has a small area (element area) in the pixel and a high current density to obtain the required brightness. It is preferable that a subpixel having a light-emitting element with relatively low reliability has a large area in the pixel and a low current density to obtain the required brightness.

[0048] 2A, for example, the area occupied by the sub-pixel 105R having the red light emitting element with the highest reliability is set to be the smallest, and the area occupied by the sub-pixel 105R having the blue light emitting element with the lowest reliability is set to be the largest. By varying the area occupied by the sub-pixels according to the emitted color in this way, it is preferable to devise a way to extend the overall lifespan.

[0049] Catadioptric systems used in VR devices, for example, use selective reflection of polarized light, resulting in insufficient light utilization efficiency. AR devices also require high display visibility even in strong external light. Display panels used in XR devices require a resolution of, for example, 2000 ppi or higher to avoid the screen door effect. Meanwhile, smaller pixel sizes result in lower aperture ratios. Therefore, when the current density flowing through the light-emitting elements remains constant, the amount of light entering the optical system becomes insufficient. Therefore, display panels are required to achieve even higher brightness.

[0050] To increase the front brightness of a display panel, it is effective to provide a convex lens on the light-emitting element. A portion of the light emitted from the light-emitting element is emitted in an oblique direction and cannot be extracted to the outside due to total reflection at the interfaces within the display panel and reflection or absorption by structures. By providing a convex lens, the light emitted in an oblique direction from the light-emitting element can be refracted toward the upper surface of the display panel. In other words, the front brightness can be increased.

[0051] The ideal convex lens would be a hemispherical lens, which has a large curvature and can be expected to have a large refraction. However, in the S-stripe arrangement, as mentioned above, the shapes of the sub-pixels provided within a pixel are different, making it difficult to arrange a hemispherical lens.

[0052] If a hemispherical lens were placed to encompass each sub-pixel, the adjacent hemispherical lenses would be joined together, which would result in the loss of some of their lens functionality. Furthermore, the path of light emitted from the sub-pixel would become more complex, leading to light intrusion into adjacent pixels and resulting in color mixing.

[0053] 2A, one embodiment of the present invention uses a single spherical lens that is circular in top view and encompasses each of the square or rectangular subpixels 105R and 105G, which have a relatively small aspect ratio in top view. Also, two adjacent spherical lenses are used for the rectangular subpixel 105B, which has a relatively large aspect ratio in top view. These spherical lenses preferably have a circular outer shape in top view so that the refraction effect does not depend on the direction of light incidence.

[0054] It is preferable to use a hemispherical lens as the spherical lens. However, when providing hemispherical lenses to match the size of the sub-pixels, hemispherical lenses with different heights are provided depending on the size of the sub-pixels. Since repeating the manufacturing process for lenses with different heights increases manufacturing costs, it is preferable to manufacture multiple lenses in the same process.

[0055] Although a method for manufacturing the lenses will be described later, the lenses used in one embodiment of the present invention are formed into island shapes using a lithography process using a material applied to a constant thickness, so that all the lenses have approximately the same height.

[0056] Therefore, a plano-convex spherical lens is used as the lens in one embodiment of the present invention. Note that the spherical lens used in one embodiment of the present invention refers to a lens having a shape in which a part of a sphere is cut off and has a height equal to or less than that of a hemispherical lens. In other words, a hemispherical lens is also a type of spherical lens. In this embodiment, an example will be described in which the lens with the smallest radius of curvature is a hemispherical lens, and the other lenses are spherical lenses whose heights are shorter than that of a hemispherical lens.

[0057] Note that one embodiment of the present invention is not limited to a configuration using hemispherical lenses. For example, all lenses may be spherical lenses that are not hemispherical, or aspherical lenses. Depending on the shape of the subpixel, the angle dependency of chromaticity shift during white display may increase depending on the lens combined. In this case, the chromaticity shift may be reduced by using lenses that are shorter than the hemispherical lenses so that the refractive power is weakened.

[0058] In order to capture as much light as possible from the light-emitting element, lenses 102B1 and 102B2 provided on subpixel 105B preferably have as large an area as possible that covers subpixel 105B. Therefore, lenses 102B1 and 102B2 do not need to be the same size and may be different sizes.

[0059] Furthermore, in order to capture as much light emitted by the light-emitting elements as possible in all of the lenses 102, it is preferable that the base area (the area of ​​the flat surface of the plano-convex lens) is as large as possible. However, since bonding between adjacent lenses can cause color mixing, it is preferable to arrange the lenses 102 so closely that adjacent lenses touch each other.

[0060] 2B is an example of a top view of a portion of a pixel array, showing four adjacent pixels 101a. By selecting an appropriate lens size for each sub-pixel, lenses that are circular in top view can be densely arranged.

[0061] As shown in Figures 2(A) and (B), a portion of the lens 102B1 extends beyond the outline of one pixel 101a, but since this area can be provided in the empty space of an adjacent pixel, it can be said that the lens 102B1 is substantially contained within the area occupied by the pixel 101a.

[0062] In this way, the size of the lenses and pixels can be appropriately set to maximize the base area of ​​the lenses 102 and to arrange the lenses closely.

[0063] For example, as shown in the top view of Figure 3(A), when the radius of the bottom surface of lens 102R is r1 and the radius of the bottom surface of lens 102G is r2, the radius of the bottom surface of lens 102B1 is r2 and the radius of the bottom surface of lens 102B2 is r1.

[0064] Lenses 102R and 102G are arranged adjacent to each other in a first direction (y direction), and lenses 102R and 102B1 are arranged adjacent to each other in a second direction (x direction) perpendicular to the first direction. Lenses 102G and 102B2 are arranged adjacent to each other in the second direction (x direction). At this time, the center point O of lens 102R is 102R , the center point O of the lens 102G 102G , the center point O of the lens 102B1 102B1 , and the center point O of the lens 102B2 102B2 The quadrilateral with vertices is a square.

[0065] Furthermore, it is preferable that pixel 101a be a square with one side measuring 2(r1+r2), which maximizes the area occupied by the lens relative to the pixel. In this case, a portion of lens 102B1 extends beyond the area occupied by pixel 101a, but as shown by the diagonal lines in Figure 3(A), this area can be provided in the empty area of ​​adjacent pixel 101a, so it can be contained substantially within the area occupied by pixel 101a.

[0066] Note that the side of pixel 101a may be larger than 2(r1+r2), but the area occupied by the lens will be smaller than when the side is 2(r1+r2). Note that if the side of pixel 101a is smaller than 2(r1+r2), adjacent lenses will be joined together, which is not preferable.

[0067] As shown in FIG. 3B, the center point O of the lens 102R 102R is the center point O of the subpixel 105R. 105R It is preferable that the center point O of the lens 102R is overlapped with the center point O of the lens 102R. 102R is the center point O of the subpixel 105R. 105R It is preferable to provide the center point O 105RThe vicinity is defined as the area within which the opening of the subpixel 105R is included within the outline of the bottom surface of the lens 102R, and is located at the center point O 102R It refers to the range that can be taken.

[0068] Also, as shown in FIG. 3C, the center point O of the lens 102G 102G is the center point O of the subpixel 105G. 105G It is preferable that the lens 102G is provided so as to overlap with the center point O of the lens 102G. 102G is the center point O of the subpixel 105G. 105G It is preferable to provide the center point O 105G The vicinity is defined as the area within which the opening of the subpixel 105G is included within the outline of the bottom surface of the lens 102G, and is located at the center point O 102G It refers to the range that can be taken.

[0069] Also, the center point O of the lens 102B1 102B1 As shown in FIG. 3D, the pixel 105B is located on a line that vertically bisects the short side (length w, also referred to as the distance between the long sides) of the subpixel 105B and is located at the center point O of the subpixel 105B. 105B It is preferable to set the lens 102B2 at a distance r2 from the center point O 102B2 is on the line that vertically bisects the short side of the subpixel 105B, and is located at the center point O of the subpixel 105B. 105B It is preferable to set it at a position that is a distance r1 from the center point O. 102B1 , and the center point O 102B2 The position of the center point O 102R The range of possible values, or the center point O 102G The deviation can be tolerated within the range that can be taken.

[0070] In this way, by appropriately setting the pixel size, lens size, and lens position, the lenses 102 can be densely arranged on the pixel array as shown in FIG. 2(B).

[0071] Next, we will explain the effect of a lens according to one embodiment of the present invention by comparing the front luminance ratio of a display panel with that of lenses of other configurations. The parameters of each model used in the simulation are shown in Table 1. The assumed resolution of the display panel is 5009 ppi with a pixel size of 5.07 μm square.

[0072] [Table 1]

[0073] The simulation model of one embodiment of the present invention is model M1, which has pixels in an S-stripe arrangement, in which lenses 102R and 102B2 are hemispherical lenses of the same size, and lenses 102G and 102B1 are spherical lenses of the same size (see Figures 2(A) and 3(A)).

[0074] The models compared are model M2, model M3, and model M4 shown in Figures 4(A1) to 4(C2). In all models, the configuration of each subpixel and the configuration of lenses 102R and 102G are the same as model M1, and only the configuration of lens 102B is different.

[0075] Model M2 has a configuration in which lens 102B is a single cylindrical lens whose cross section on the minor axis side is semicircular with a radius of curvature r1 (same as that of lens 102R) (see the perspective view in FIG. 4(A1) and the top view in FIG. 4(A2)).

[0076] Model M3 has a configuration in which both ends of lens 102B in model M2 are formed into a single cylindrical lens having a curvature radius r1 (see FIG. 4(B1) perspective view and FIG. 4(B2) top view).

[0077] Model M4 has a configuration in which lens 102B1 in model M1 is replaced with a hemispherical lens of the same size as lens 102B2 (see Fig. 4(C1) perspective view and Fig. 4(C2) top view).

[0078] Figure 5 shows a model showing the positional relationship of each element used in the calculation and the refractive index n of each element. Lens 102 is located on a light-transmitting insulating layer 103 provided on the light-emitting surface LS of the light-emitting element of the subpixel. Light-transmitting insulating layer 104 is disposed on lens 102 and insulating layer 103. Furthermore, film FLM is disposed on insulating layer 104. Furthermore, light-receiving surface LR is disposed on film FLM, with air assumed to be between them.

[0079] The refractive index n of insulating layer 103 and lens 102 is 1.58, the refractive index n of insulating layer 104 is 1.41, the refractive index n of film FLM is 1.5, and the refractive index n of air is 1. The distance between the upper surface of film FLM and light receiving surface LR is 350 mm.

[0080] The calculations were performed using the LightTools lighting analysis simulator manufactured by Synopsys, Inc. The light source for each subpixel was assumed to be the light emission of an organic EL element, and the Setofos organic EL device simulator manufactured by Fluxim was used to calculate the emission spectrum and orientation pattern of the actual element configuration.

[0081] 6 shows the calculation results of the front luminance of the display panel using the above models M1 to M4, and shows the dependency of the front luminance ratio on the thickness of the insulating layer 103 when the front luminance of the display panel without a lens is set to 1. Note that the front luminance is calculated assuming that only the sub-pixel 105B emits light.

[0082] As shown in Figure 6, the front luminance ratio is greater than 1 in all models, which indicates that providing a lens over a subpixel is an effective method for increasing the front luminance. In other words, the comparative structures shown in Figures 4A1 to 4C2 are also effective methods for increasing the front luminance of a display panel. In other words, the structures shown in Figures 4A1 to 4C2 are also embodiments of the present invention.

[0083] Note that a saturation tendency is observed with respect to the film thickness of the insulating layer 103 in all models. This is thought to be due to the following two factors. The first factor is that as the insulating layer 103 becomes thicker, the amount of light directed in the front direction increases as the light source approaches the focal length of each lens. The second factor is that as the insulating layer 103 becomes thicker, the amount of light incident on the lens decreases as the distance from the light source to the lens increases.

[0084] It is considered that the influence of the first factor is dominant within a range of conditions where the thickness of the insulating layer 103 is relatively thin and the front luminance ratio shows an upward trend to the right. Also, it is considered that the influence of the first factor and the second factor is balanced within a range of conditions where the thickness of the insulating layer 103 is relatively thick and the front luminance ratio shows a saturation trend.

[0085] The simulation results show that when the thickness of the insulating layer 103 is 3.5 μm or more, the front luminance ratio is model M4<model M2<model M3<model M1, and the configuration of one embodiment of the present invention is most preferable.

[0086] Model M4, which uses two ideal hemispherical lenses on the subpixel 105B, is the least effective because it does not sufficiently cover the subpixel 105B and the base area of ​​the lenses is small.

[0087] Model M2 has a configuration in which the cylindrical lens covers the entire subpixel 105B, and is more effective than Model M4. However, it is thought that the effect of the curved lens surface only acts in the short axis direction, and not in the long axis direction where there is no curved lens surface.

[0088] Model M3 has curved surfaces at the edges, which means that the effect of the lens curve appears in part of the long axis direction, and the front brightness is improved compared to Model M2. However, because there are areas other than the edges in the long axis direction that do not have a lens curve, the improvement in effect compared to Model M2 can be said to be limited.

[0089] Model M1 is a modified version of Model M4, and has a configuration in which spherical lenses (lens 102B2 is a hemispherical lens) with different radii in a top view are arranged next to each other on subpixel 105B. Model M1 can increase the area covering subpixel 105B compared to Model M4, and by increasing the bottom area of ​​the lens, it is possible to increase the amount of light entering the lens from the light-emitting element, thereby further increasing the front brightness.

[0090] Note that the angle dependency of chromaticity shift during white display may increase as the thickness of insulating layer 103 increases. Therefore, it can be said that the thickness of insulating layer 103 is preferably 3.5 μm to 6 μm, at which point the front luminance ratio begins to show a tendency to saturate, more preferably 3.5 μm to 5 μm, and even more preferably 3.5 μm to 4.5 μm.

[0091] Furthermore, compared to models M2 to M4, model M1 has a thicker insulating layer 103, which causes a tendency for saturation in the front luminance ratio. This is thought to be because the bottom area of ​​the lens of model M1 is larger than that of the other models, making it easier to take in light and making the effect of the second factor mentioned above less likely to occur.

[0092] From the above, it can be said that providing two spherical lenses on the subpixel 105B can sufficiently increase the front luminance ratio of the display panel.

[0093] In the configuration of model M1 (pixel 101a), there is an area near the region between lens 102B1 and lens 102B2 where the lens does not cover subpixel 105B. Although this area is small, the light emitted from this area is not easily affected by the lens. Therefore, if a lens could be provided over this area, it can be said that the front brightness can be further increased.

[0094] 7 is a perspective view of pixel 101b, which is different from pixel 101a, and a portion of a pixel array including pixel 101b. Pixel 101b differs from pixel 101a in that it has a lens array 102BA over subpixel 105B. Lens array 102BA is configured such that lenses are provided in areas of pixel 101a where lens 102B does not cover subpixel 105B. Lens array 102BA has lens areas 102BA1, 102BA2, and 102BA3.

[0095] FIG. 8A is an example of a top view of the pixel 101b shown in FIG. 7, and shows the layout of the pixel 101b that can be used in a 5009 ppi display panel.

[0096] 8A, a single spherical lens that is circular in top view and encompasses each of subpixels 105R and 105G, which have a small aspect ratio when viewed from above, is used, and lens array 102BA is used for subpixel 105B, which has a large aspect ratio when viewed from above.

[0097] 8B is an example of a top view of a portion of the pixel array, showing four adjacent pixels 101b. By selecting an appropriate lens size for each subpixel, the lenses 102R and 102G, which are circular in top view, and the lens array 102BA can be densely arranged.

[0098] As shown in Figures 8(A) and (B), lens area 102BA1 and lens area 102BA3 partially extend beyond the outline of one pixel 101b, but since this area can be provided in the empty area of ​​an adjacent pixel, it can be said that they are essentially contained within the occupied area of ​​pixel 101b.

[0099] To densely arrange lenses 102R, 102G, and lens array 102BA in this manner, for example, as shown in the top view of Figure 9(A), when the radius of the bottom surface of lens 102R is r1 and the radius of the bottom surface of lens 102G is r2, lens region 102BA1 of lens array 102BA is configured to have an area with a bottom radius of r2. Lens region 102BA2 is configured to have an area with a bottom radius of r1. Lens region 102BA3 is configured to have an area with a bottom radius of r3.

[0100] The lens area 102BA1 has an area with the same curvature as the lens 102B1 of the pixel 101a, and can be regarded as a part including the center of the lens 102B1. 102BA1 The position of the lens 102B1 is the center point O 102B1 is the same as

[0101] The lens area 102BA2 has an area with the same curvature as the lens 102B2 of the pixel 101a, and can be considered as a part including the center of the lens 102B2. 102BA2 The position of the lens 102B2 is the center point O 102B2 is the same as

[0102] That is, lens array 102BA is configured by combining a spherical lens with a bottom radius of r3 between lens 102B1 and lens 102B2 shown in FIG. 3(A).

[0103] When the lens area 102BA3 is regarded as a part of a spherical lens having a circular shape when viewed from above, its center point O 102BA3 As shown in FIG. 9B, the pixel 105B is located on a line that vertically bisects the short side (length W, also referred to as the distance between the long sides) of the subpixel 105B and is located at the center point O of the subpixel 105B. 105B It is preferable to set it at the position of the center point O. 102BA3 The position of is the center point O explained in Figure 3(B) and (C). 102R The range of possible values, or the center point O 102GWithin the range that can be taken, the deviation can be tolerated.

[0104] At this time, as shown in FIG. 9(A), r3 is preferably as large as possible with the upper limit being the length in contact with the lens 102G. Therefore, the radius of each of the lens regions 102BA1 to 102BA3 is r1 < r3 < r2, and the curvature is lens region 102BA2 < lens region 102BA3 < lens region 102BA1.

[0105] With such a configuration, the bottom area of the lens array 102BA can be increased, and the amount of light entering the lens array 102BA from the light-emitting element can be increased, so that the front luminance can be further increased.

[0106] FIG. 10 is a simulation result of the front luminance of the display panel using the pixel 101b shown in FIGS. 7 to 9(B) as the model M5, and is a diagram compared with the model M1.

[0107] As shown in FIG. 10, it has been confirmed that the use of the lens array 102BA covering the entire sub-pixel 105B can further increase the front luminance compared to the model M1. The front luminance ratio has a saturation tendency when the film thickness of the insulating layer 103 is 4 μm or more. Therefore, it can be said that the film thickness of the insulating layer 103 considering the chromaticity deviation is preferably 4 μm or more and 6 μm or less, more preferably 4 μm or more and 5 μm or less, and even more preferably 4 μm or more and 4.5 μm or less.

[0108] As described above, by arranging two spherical lenses with a circular top view adjacent to each other on a sub-pixel with a relatively large aspect ratio, the light emitted by the light-emitting element can be efficiently emitted in the front direction, and the light extraction efficiency in the display device can be increased.

[0109] Alternatively, by arranging a lens array having a first lens region, a second lens region, and a third lens region, each with a different curvature in one direction, in that order on a subpixel with a relatively large aspect ratio, the light emitted by the light-emitting element can be efficiently emitted in the forward direction, thereby increasing the light extraction efficiency of the display device.

[0110] Therefore, by using one embodiment of the present invention, the voltage applied to the light-emitting element can be reduced, the reliability of the light-emitting element can be improved, and the power consumption of the light-emitting element can be reduced.

[0111] A light-emitting element that can be used in one embodiment of the present invention preferably has an MML (metal maskless) structure in which a light-emitting layer is separately formed using a lithography process without using a FMM (fine metal mask). A light-emitting element with an MML structure can have a higher aperture ratio than a light-emitting element fabricated using an FMM, and can emit light with high luminance or low power consumption. One embodiment of the present invention has a structure in which a light-emitting element with an MML structure is combined with a convex lens to further increase the light extraction efficiency.

[0112] Fig. 11(A) is a diagram corresponding to the cross section A1-A2 of pixel 101a shown in Fig. 11(B) or the cross section A1-A2 of pixel 101b shown in Fig. 11(C). Note that although Fig. 11(A) and Fig. 13(A) and (B) show lens 102B, this can be replaced with lens array 102BA.

[0113] Furthermore, the pixel 101a and the pixel 101b each have subpixels 105R, 105G, and 105B, but here, the description of the subpixel 105R will be omitted and only the subpixels 105G and 105B will be described. Note that for the subpixel 105R, the description of the subpixels 105G and 105B can be referred to.

[0114] The light emitting element 110G of the subpixel 105G and the light emitting element 110B of the subpixel 105B are provided on a substrate 161. The substrate 161 includes a support, as well as elements of the pixel circuit.

[0115] It is preferable to use, for example, an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode) as the light emitting element 110G and the light emitting element 110B. As the light emitting material contained in the EL element, not only organic compounds but also inorganic compounds (such as quantum dot materials) can be used.

[0116] The light-emitting element 110G has a pixel electrode 111G, an organic layer 112G, a common layer 114, and a common electrode 113. The light-emitting element 110B has a pixel electrode 111B, an organic layer 112B, a common layer 114, and a common electrode 113. The common layer 114 and the common electrode 113 are provided in common to the light-emitting element 110G and the light-emitting element 110B.

[0117] Organic layer 112G of light-emitting element 110G contains a light-emitting organic compound that emits at least green light. Organic layer 112B of light-emitting element 110B contains a light-emitting organic compound that emits at least blue light. Organic layer 112G and organic layer 112B can also be called EL layers, and each contain at least a layer (light-emitting layer) containing a light-emitting substance.

[0118] Hereinafter, when describing matters common to light emitting element 110G and light emitting element 110B, they may be referred to as light emitting element 110. Similarly, when describing matters common to components distinguished by letters, such as organic layer 112G and organic layer 112B, they may be described using symbols without the letters.

[0119] The organic layer 112 and the common layer 114 can each independently have one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer. For example, the organic layer 112 can have a stacked structure of a hole injection layer, a hole transport layer, a light-emitting layer, and an electron transport layer from the pixel electrode 111 side, and the common layer 114 can have an electron injection layer.

[0120] The pixel electrode 111G and the pixel electrode 111B are provided for each light-emitting element. The common electrode 113 and the common layer 114 are provided as a continuous layer common to each light-emitting element. A conductive film that is transparent to visible light is used for either one of the pixel electrodes or the common electrode 113, and a conductive film that is reflective is used for the other. By making each pixel electrode transparent and the common electrode 113 reflective, a bottom-emission display device can be obtained. Conversely, by making each pixel electrode reflective and the common electrode 113 transparent, a top-emission display device can be obtained. Note that by making both the pixel electrodes and the common electrode 113 transparent, a dual-emission display device can be obtained.

[0121] A protective layer 121 is provided on the common electrode 113 to cover the light emitting elements 110G and 110B. The protective layer 121 has the function of preventing impurities such as water from diffusing from above into each light emitting element.

[0122] The edge of the pixel electrode 111 preferably has a tapered shape. When the edge of the pixel electrode 111 has a tapered shape, the organic layer 112 provided along the edge of the pixel electrode 111 can also have an inclined portion. By tapering the edge of the pixel electrode 111, the coverage of the organic layer 112 provided over the edge of the pixel electrode 111 can be improved. Furthermore, by tapering the side surface of the pixel electrode 111, foreign matter (also referred to as dust or particles, for example) during the manufacturing process can be easily removed by a process such as cleaning, which is preferable.

[0123] In this specification, the term "tapered shape" refers to a shape in which at least a part of the side surface of the structure is inclined with respect to the substrate surface. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface is less than 90°.

[0124] The organic layer 112 is processed into an island shape using, for example, a resist mask formed by lithography. As a result, the organic layer 112 has a shape in which the angle between the top surface and the side surface is close to 90 degrees at its edge. On the other hand, an organic film formed using an FMM (Fine Metal Mask) or the like tends to become gradually thinner closer to the edge, and the top surface is formed in a sloped shape over a range of, for example, 1 μm to 10 μm, making it difficult to distinguish between the top surface and the side surface.

[0125] Between two adjacent light emitting elements, an insulating layer 124, an insulating layer 125, and a resin layer 126 are provided.

[0126] Between two adjacent light-emitting elements, the side surfaces of the organic layers 112 face each other with the resin layer 126 sandwiched therebetween. The resin layer 126 is located between the two adjacent light-emitting elements and is provided so as to fill the ends of each organic layer 112 and the region between the two organic layers 112. The resin layer 126 has a smooth, convex upper surface, and a common layer 114 and a common electrode 113 are provided to cover the upper surface of the resin layer 126.

[0127] The resin layer 126 functions as a planarizing film that fills in the step between two adjacent light-emitting elements. By providing the resin layer 126, it is possible to prevent the common electrode 113 from being separated by the step at the end of the organic layer 112 (also called step disconnection), which would otherwise occur and result in insulation of the common electrode on the organic layer 112.

[0128] Furthermore, the organic layers 112 of adjacent light-emitting elements 110 are insulated from each other by the resin layer 126. This reduces leakage current between adjacent light-emitting elements via the organic layers 112, thereby suppressing unnecessary light emission due to crosstalk.

[0129] An insulating layer containing an organic material can be suitably used as the resin layer 126. For example, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, precursors of these resins, etc. can be used as the resin layer 126. Alternatively, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin can be used as the resin layer 126.

[0130] Furthermore, a photosensitive resin can be used as the resin layer 126. A photoresist can be used as the photosensitive resin. The photosensitive resin can be a positive type material or a negative type material.

[0131] The resin layer 126 may contain a material that absorbs visible light. For example, the resin layer 126 itself may be made of a material that absorbs visible light, or the resin layer 126 may contain a pigment that absorbs visible light. For example, the resin layer 126 may be a resin that can be used as a color filter that transmits red, blue, or green light and absorbs other light, or a resin that contains carbon black as a pigment and functions as a black matrix.

[0132] The resin layer 126 absorbs light emitted obliquely from the light emitting element, thereby suppressing leakage of light (stray light) from the light emitting element to an adjacent light emitting element via the resin layer 126. This improves the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.

[0133] The insulating layer 125 is provided in contact with the side surface of the organic layer 112. The insulating layer 125 is also provided to cover the upper end portion of the organic layer 112. A portion of the insulating layer 125 is provided in contact with the upper surface of the substrate 161.

[0134] The insulating layer 125 is located between the resin layer 126 and the organic layer 112, and functions as a protective film to prevent the resin layer 126 from coming into contact with the organic layer 112. If the organic layer 112 and the resin layer 126 come into contact with each other, the organic layer 112 may be dissolved by an organic solvent or the like used when forming the resin layer 126. Therefore, by providing the insulating layer 125 between the organic layer 112 and the resin layer 126, it is possible to protect the side surfaces of the organic layer 112.

[0135] The insulating layer 125 can be an insulating layer containing an inorganic material. For example, inorganic insulating films such as an insulating oxide film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used for the insulating layer 125. The insulating layer 125 may have a single-layer structure or a stacked-layer structure. Examples of oxide insulating films include silicon oxide films, aluminum oxide films, magnesium oxide films, indium gallium zinc oxide films, gallium oxide films, germanium oxide films, yttrium oxide films, zirconium oxide films, lanthanum oxide films, neodymium oxide films, hafnium oxide films, and tantalum oxide films. Examples of nitride insulating films include silicon nitride films and aluminum nitride films. Examples of oxynitride insulating films include silicon oxynitride films and aluminum oxynitride films. Examples of nitride oxide insulating films include silicon nitride oxide films and aluminum nitride oxide films. In particular, by using metal oxide films such as aluminum oxide films and hafnium oxide films formed by the ALD method, or inorganic insulating films such as silicon nitride films and silicon oxide films, the insulating layer 125 can have few pinholes and excellent protection of the EL layer.

[0136] In this specification and elsewhere, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0137] The insulating layer 125 can be formed by a sputtering method, a CVD method, a PLD method, an ALD method, etc. The insulating layer 125 is preferably formed by an ALD method, which has good coverage.

[0138] Furthermore, a reflective film (for example, a metal film containing one or more selected from silver, palladium, copper, titanium, aluminum, etc.) may be provided between the insulating layer 125 and the resin layer 126, so that the light emitted from the light-emitting layer is reflected by the reflective film, thereby improving the light extraction efficiency.

[0139] The insulating layer 124 is a portion of a protective layer (also referred to as a mask layer or a sacrificial layer) that protects the organic layer 112 when the organic layer 112 is etched. The insulating layer 124 can be made of the same material as can be used for the insulating layer 125. In particular, it is preferable to use the same material for the insulating layer 124 and the insulating layer 125, because this allows the use of common processing equipment and the like.

[0140] In particular, metal oxide films such as aluminum oxide films and hafnium oxide films, or inorganic insulating films such as silicon nitride films and silicon oxide films formed by the ALD method have few pinholes, and therefore have excellent functionality for protecting the EL layer, and can be suitably used for insulating layer 125 and insulating layer 124.

[0141] The protective layer 121 may have, for example, a single-layer structure or a stacked-layer structure including at least an inorganic insulating film. Examples of the inorganic insulating film include oxide films or nitride films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film. Alternatively, the protective layer 121 may be made of a semiconductor material or a conductive material such as indium gallium oxide, indium zinc oxide, indium tin oxide, or indium gallium zinc oxide.

[0142] Furthermore, an insulating layer 103 is provided on the protective layer 121. For example, the insulating layer 103 can be made of an organic material that can be used for the resin layer 126. By forming the insulating layer 103, the influence of unevenness caused by the underlying structure can be reduced, making it easier to form structures such as a lens array. The structure from the substrate 161 to the insulating layer 103 corresponds to the laminate 100 shown in FIG. 1.

[0143] Lenses 102 (lenses 102G and 102B), which are plano-convex lenses, are provided on the insulating layer 103 so as to overlap the light-emitting element 110. In addition, an insulating layer 104 is provided on the lenses 102. The lenses 102 are provided in pairs with the light-emitting element 110. In other words, one lens 102 is provided for each sub-pixel.

[0144] The lens 102 is provided above the light emitting element 110 (in the direction in which the light is emitted). Since the light emitted by the light emitting element 110 has a certain degree of divergence, light that is not extracted to the outside of the display device is lost. Therefore, it is preferable for the display device to have high front brightness. Since the lens 102 has a convex lens shape, it can act in a direction to converge light. In other words, it can suppress the divergence of the light emitted by the light emitting element, thereby increasing the light extraction efficiency of the display device. The lens 102 can be manufactured using the same material and process as the resin layer 126.

[0145] 12A to 12E are diagrams illustrating the steps of forming the lens 102 on the insulating layer 103. FIG.

[0146] First, a photosensitive resin is applied onto the insulating layer 103 and pre-baked to form a resin layer 102a (see FIG. 12A). As the photosensitive resin, for example, the material for forming the resin layer 126 described in Embodiment 1 can be used. Although an example of using a positive photosensitive resin is described here, a negative photosensitive resin may also be used.

[0147] Next, the resin layer 102a is exposed to light using a photomask 145, while blocking light from the region where the lens 102 is to be formed (see FIG. 12B). When a negative photosensitive resin is used, a photomask that blocks light from the region where the lens 102 is not to be formed is used.

[0148] Next, a development step is performed to remove unnecessary regions of the resin layer 102a, forming a resin layer 102b (see FIG. 12(C)). Here, since the resin layer 102b is unexposed, unreacted components remain and it may be colored. Since the lens 102 to be formed preferably has high transmittance to visible light, if the resin layer 102b is colored, the reaction is promoted by exposing the resin layer 102b.

[0149] By promoting the reaction, it is possible to form a resin layer 102c with improved transmittance (see FIG. 12(D)). Furthermore, by performing such exposure after the development step, it may be possible to lower the post-bake temperature of the resin layer 102c in a subsequent step. Note that if the resin layer 102b is not colored, exposure after the development step may not be necessary.

[0150] Then, post-baking is performed to reflow and harden the resin layer 102c, thereby forming the lenses 102 having spherical surfaces (FIG. 12(E)).

[0151] When fabricating the lens array 102BA of the pixel 101b, the exposure amount may be controlled partially in the process of Fig. 12(C). For example, by using a multi-tone mask such as a halftone mask or a gray-tone mask, an island-shaped lens array with multiple curvatures can be formed without separating one island-shaped resin layer 102b.

[0152] The insulating layer 104 provided on the lens 102 is an adhesive layer provided between the lens 102 and the substrate 163, and is preferably made of an organic material. For example, an optical adhesive having a refractive index close to that of the glass or film that can be used as the substrate 163 can be used.

[0153] The above is a description of an example of the configuration of the light emitting element and its vicinity.

[0154] 11A shows an example in which the lenses 102G and 102B have the same height, but this is not limiting. For example, the heights of the lenses 102G and 102B may be different. The shape of the sub-pixels in a top view may differ depending on the emitted color, and lenses of an appropriate shape may be provided depending on the light emitted by each sub-pixel.

[0155] 13(A), the lens 102G and the lens 102B may be joined near their respective ends. To prevent color mixing, it is preferable that adjacent lenses are separated. However, by joining adjacent lenses, the width of the lenses increases, and the amount of light incident on the lens 102 from the light-emitting element 110 can be increased. This may improve the light extraction efficiency of the display panel. Note that, to suppress color mixing, it is preferable to make the height of the joint portion of the lenses as low as possible.

[0156] 13(B), the insulating layer 103 and the lens 102 may be formed from materials with the same refractive index. For example, by forming the insulating layer 103 and the lens 102 from the same resin material, it is possible to improve adhesion at the interface. Furthermore, by using the same material and sharing manufacturing equipment, it is possible to reduce manufacturing costs.

[0157] 11(A), the refractive index may be gradually decreased in the insulating layer 103, the lens 102, and the insulating layer 104, which are the paths of light emitted from the light-emitting element 110. For linear light that does not undergo refraction, providing a step in which the refractive index gradually decreases in the direction of light propagation can reduce the refractive index step at each interface, thereby reducing reflection at the interface. Therefore, it can be said that the extraction efficiency of linear light can be improved. This effect can be derived from Fresnel's equation.

[0158] The configurations shown in FIG. 11(A) and FIGS. 13(A) and (B) can be combined as appropriate.

[0159] Although it has been explained so far that the light extraction efficiency from a display panel can be improved by providing a lens of one embodiment of the present invention over a light-emitting element, using a light-emitting element with higher emission efficiency is also effective in improving the front luminance of a display panel. In principle, the luminance of a tandem organic EL element increases depending on the number of layers stacked at the same current density, and a two-layer tandem organic EL element can achieve twice the luminance of a single organic EL element.

[0160] Furthermore, because the lifespan of an organic EL element depends on the current density, even if the brightness of a tandem organic EL element is doubled, the lifespan will be equivalent to that of a single organic EL element if the current density is the same. In other words, tandem organic EL elements are an effective technology for increasing the brightness and reliability of organic EL elements.

[0161] 14A is a block diagram illustrating a display device of one embodiment of the present invention. The display device 20 includes a pixel array 74, a circuit 75, and a circuit 76. The pixel array 74 includes pixels 40 arranged in columns and rows.

[0162] The pixel 40 can have multiple sub-pixels 71. The sub-pixels 71 have the function of emitting light for display. By assigning colors such as R (red), G (green), and B (blue) to the light emitted by the sub-pixels 71, a full-color display can be achieved.

[0163] The subpixel 71 has a light-emitting device that emits unpolarized visible light. The light-emitting device is preferably an EL element such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). Examples of light-emitting materials that the EL element may have include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (quantum dot materials, etc.). Alternatively, an LED such as a micro LED may be used as the light-emitting device.

[0164] The circuit 75 and the circuit 76 are driver circuits for driving the sub-pixel 71. The circuit 75 can function as a source driver circuit, and the circuit 76 can function as a gate driver circuit. The circuits 75 and 76 can be, for example, shift register circuits.

[0165] The display device 20 may be divided into a plurality of regions vertically and horizontally, and pixels may be driven for each divided region.

[0166] 14B, for example, the circuit 75 and the circuit 76 can be separately disposed below the pixel array 74. In this case, the display device 20 has a stacked structure of a layer 77 and a layer 78, and the layer 77 is provided with a plurality of the circuits 75 and the circuits 76, and the pixel array 74 is provided on the layer 78 so as to overlap the circuits 75 and the circuits 76.

[0167] By dividing the circuit 75 and the circuit 76, the pixel array 74 can be driven for each divided area. For example, the pixel array 74 can be operated at different frame rates in parts. The pixel array 74 can be displayed at different resolutions in parts, and can also be made compatible with foveated rendering.

[0168] Furthermore, by providing the driver circuit below the pixel array 74, the wiring length can be shortened and the wiring capacitance can be reduced. This allows for high-speed operation and low power consumption. Furthermore, the display device 20 can have a narrow frame.

[0169] 14B is merely an example and can be changed as appropriate. Part of the circuit 75 and part of the circuit 76 can be formed in the same layer as the pixel array 74. The layer 77 may also include circuits such as a memory circuit, an arithmetic circuit, and a communication circuit.

[0170] In this configuration, for example, the layer 77 is provided on a single crystal silicon substrate, the circuits 75 and 76 are formed using transistors having silicon in their channel formation regions (hereinafter referred to as Si transistors), and the pixel circuits of the pixel array 74 provided in the layer 78 are formed using transistors having metal oxide in their channel formation regions (hereinafter referred to as OS transistors). The OS transistors can be formed using a thin film and can be stacked on the Si transistors.

[0171] 14C , a layer 79 in which an OS transistor is provided may be provided between the layer 77 and the layer 78. The layer 79 may include OS transistors that form part of pixel circuits included in the pixel array 74. Alternatively, the layer 79 may include OS transistors that form part of the circuits 75 and 76. Alternatively, the layer 77 may include OS transistors that form part of circuits such as a memory circuit, an arithmetic circuit, and a communication circuit.

[0172] Furthermore, the shape of the display device 20 when viewed from above is not limited to a rectangle, but may be a circle as shown in Fig. 14(D), or a polygon such as an octagon as shown in Fig. 14(E).

[0173] 15(A) is a diagram showing an example of a glasses-type device having a display device and an optical device according to one embodiment of the present invention. Here, a combination of a display device 20 and an optical device 21 is shown by a dashed line as a display unit 60. FIG. 15(C) is a diagram illustrating elements of the display unit 60.

[0174] The user can view the image displayed on the display device 20 by bringing their eyes close to the optical device 21 provided on the display surface side of the display device 20. The user can view the image with the viewing angle widened by the optical device 21, which gives the user a sense of immersion and realism.

[0175] A linear polarizer 62 and a retardation film 63 can be attached to the display surface of the display device 20. The optical device 21 can include, for example, a half mirror 64, a lens 65, a retardation film 66, a reflective polarizer 67, and a lens 68.

[0176] The optical device 21 converts the light emitted by the display device 20 into linearly polarized or circularly polarized light and uses it to selectively reflect or transmit light using elements arranged in the optical path. This allows the optical path length to be secured within a limited space, and the focal length of the optical device to be shortened. This type of optical system is called a catadioptric system. It is also sometimes called a pancake lens due to its thin shape.

[0177] The two display units 60 are incorporated into the housing 30 so that the surfaces of the lenses 68 are exposed on the inside. One display unit 60 is for the right eye, and the other display unit 60 is for the left eye, and by displaying images corresponding to the parallax on each display unit 60, the user can feel the three-dimensionality of the image.

[0178] Furthermore, the housing 30 or the holder 35 may be provided with an input terminal and an output terminal. The input terminal can be connected to a cable for supplying a video signal from a video output device or the like, power for charging the battery, etc. The output terminal functions as an audio output terminal, for example, and can be connected to earphones, headphones, etc. Note that if the configuration is such that audio data can be output via wireless communication, or if audio is output from an external video output device, the audio output terminal need not be provided.

[0179] Furthermore, a wireless communication module and a storage module may be provided inside the housing 30 or the holder 35. The wireless communication module performs wireless communication, and the content to be viewed can be downloaded and stored in the storage module. This allows the user to view the downloaded content offline.

[0180] As shown in FIG. 15B, a line-of-sight detection sensor 41 may be provided within the housing 30. The line-of-sight detection sensor 41 detects the position of the gaze by detecting changes in the reflected light due to iris movement using light emitted from a light source 42 provided within the housing 30. The light emitted by the light source 42 is preferably near-infrared light, which has extremely low visibility. For example, operation buttons such as power on, power off, sleep, volume adjustment, channel change, menu display, selection, decision, and back, as well as operation buttons such as video play, stop, pause, fast forward, and fast rewind, may be displayed, and the respective operations can be performed by visually recognizing the operation buttons. Furthermore, the user's level of fatigue may be detected from the number of blinks, and an alert may be displayed.

[0181] By using the display device of one embodiment of the present invention for a glasses-type device, the electronic device can have low power consumption and high reliability.

[0182] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0183] (Embodiment 2) In this embodiment, a structural example of a display panel that can be used as a display device of one embodiment of the present invention will be described.

[0184] The display panel of this embodiment is a high-definition display panel, and is particularly suitable for use as a display unit for VR devices such as head-mounted displays, eyeglass-type devices that can be worn on the head such as eyeglass-type AR devices, or wearable devices.

[0185] [Display module] 16A shows a perspective view of a display module 280. The display module 280 includes a display panel 200A and an FPC 290. Note that the display panel included in the display module 280 is not limited to the display panel 200A, and may be any of display panels 200B to 200F described below.

[0186] The display module 280 has a substrate 291 and a substrate 292. The display module 280 has a display unit 281. The display unit 281 is an area for displaying an image.

[0187] 16(B) is a perspective view schematically showing the configuration on the substrate 291 side. A circuit portion 282, a pixel circuit portion 283 on the circuit portion 282, and a pixel portion 284 on the pixel circuit portion 283 are stacked on the substrate 291. A terminal portion 285 for connecting to an FPC 290 is provided in a portion of the substrate 291 that does not overlap with the pixel portion 284. The terminal portion 285 and the circuit portion 282 are connected via a wiring portion 286 composed of a plurality of wirings.

[0188] The pixel section 284 has a plurality of periodically arranged pixels 284a. An enlarged view of one pixel 284a is shown on the right side of Fig. 16(B). The pixel 284a has a light-emitting element 110R that emits red light, a light-emitting element 110G that emits green light, and a light-emitting element 110B that emits blue light.

[0189] The pixel circuit section 283 has a plurality of pixel circuits 283a arranged periodically. One pixel circuit 283a is a circuit that controls the light emission of three light-emitting devices included in one pixel 284a. One pixel circuit 283a may be configured to have three circuits that control the light emission of one light-emitting device. For example, the pixel circuit 283a may be configured to have at least one selection transistor, one current control transistor (drive transistor), and a capacitance element for each light-emitting device. In this case, a gate signal is input to the gate of the selection transistor, and a source signal is input to the source. This realizes an active matrix display panel.

[0190] The circuit portion 282 has a circuit that drives each pixel circuit 283a of the pixel circuit portion 283. For example, it is preferable that the circuit portion 282 has one or both of a gate line driver circuit and a source line driver circuit. In addition, the circuit portion 282 may have at least one of an arithmetic circuit, a memory circuit, a power supply circuit, etc. Furthermore, a transistor provided in the circuit portion 282 may constitute a part of the pixel circuit 283a. That is, the pixel circuit 283a may be constituted by a transistor included in the pixel circuit portion 283 and a transistor included in the circuit portion 282.

[0191] The FPC 290 functions as wiring for supplying video signals, power supply potential, etc. from the outside to the circuit section 282. An IC may also be mounted on the FPC 290.

[0192] The display module 280 can be configured such that one or both of the pixel circuit unit 283 and the circuit unit 282 are provided overlapping below the pixel unit 284, thereby enabling the aperture ratio (effective display area ratio) of the display unit 281 to be extremely high. For example, the aperture ratio of the display unit 281 can be set to 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. Furthermore, the pixels 284a can be arranged at an extremely high density, enabling the pixel density of the display unit 281 to be extremely high. For example, it is preferable that the pixels 284a are arranged in the display unit 281 at a pixel density of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and 20000 ppi or less, or 30000 ppi or less.

[0193] Such a display module 280 has extremely high resolution and can therefore be suitably used in VR devices such as head-mounted displays or eyeglass-type AR devices. For example, even in a configuration in which the display unit of the display module 280 is viewed through lenses, the display module 280 has an extremely high-resolution display unit 281, so that even if the display unit is enlarged with the lenses, the pixels are not visible, allowing for a highly immersive display. Furthermore, the display module 280 is not limited to this, and can be suitably used in electronic devices having relatively small display units. For example, it can be suitably used in the display unit of a wearable electronic device such as a wristwatch.

[0194] [Display panel 200A] 17 includes a substrate 301, a light-emitting element, a capacitor 240, and a transistor 310. Note that in FIGS. 17 to 22, a light-emitting element 110G that emits green light and a light-emitting element 110B that emits blue light are shown as examples of the light-emitting element.

[0195] The substrate 301 corresponds to the substrate 291 in FIGS. 16(A) and 16(B).

[0196] The transistor 310 has a channel formation region in a substrate 301. The substrate 301 can be, for example, a semiconductor substrate such as a single crystal silicon substrate. The transistor 310 includes a part of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region in which the substrate 301 is doped with impurities and functions as either a source or a drain. The insulating layer 314 is provided to cover a side surface of the conductive layer 311.

[0197] Furthermore, an element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301 .

[0198] In addition, an insulating layer 261 is provided to cover the transistor 310 , and a capacitor 240 is provided on the insulating layer 261 .

[0199] Capacitor 240 has conductive layer 241, conductive layer 245, and insulating layer 243 located therebetween. Conductive layer 241 functions as one electrode of capacitor 240, conductive layer 245 functions as the other electrode of capacitor 240, and insulating layer 243 functions as a dielectric of capacitor 240.

[0200] The conductive layer 241 is provided over the insulating layer 261 and is buried in the insulating layer 254. The conductive layer 241 is connected to one of the source and drain of the transistor 310 by a plug 271 buried in the insulating layer 261. The insulating layer 243 is provided to cover the conductive layer 241. The conductive layer 245 is provided in a region overlapping with the conductive layer 241 with the insulating layer 243 interposed therebetween.

[0201] An insulating layer 255a is provided to cover the capacitor 240, an insulating layer 255b is provided on the insulating layer 255a, and an insulating layer 255c is provided on the insulating layer 255b.

[0202] The insulating layers 255a, 255b, and 255c can each preferably be made of an inorganic insulating film. For example, it is preferable to use a silicon oxide film for the insulating layers 255a and 255c, and a silicon nitride film for the insulating layer 255b. This allows the insulating layer 255b to function as an etching protection film. In this embodiment, an example is shown in which part of the insulating layer 255c is etched to form a recess, but the insulating layer 255c does not necessarily have to have a recess.

[0203] The light emitting element 110G and the light emitting element 110B are provided on the insulating layer 255c. The first embodiment can be referred to for the configuration of the light emitting element 110G and the light emitting element 110B.

[0204] The display panel 200A has a separate light-emitting device for each emitted color, resulting in minimal change in chromaticity between low and high brightness emissions. Furthermore, because the organic layers 112G and 112B are spaced apart, crosstalk between adjacent subpixels can be suppressed even in a high-resolution display panel. This allows for the realization of a high-resolution, high-quality display panel.

[0205] An insulating layer 125 and a resin layer 126 are provided in the regions between adjacent light emitting elements.

[0206] The pixel electrode 111G and pixel electrode 111B of the light-emitting element are connected to one of the source or drain of the transistor 310 via a plug 256 embedded in the insulating layers 255a, 255b, and 255c, a conductive layer 241 embedded in the insulating layer 254, and a plug 271 embedded in the insulating layer 261. The height of the top surface of the insulating layer 255c and the height of the top surface of the plug 256 are the same or approximately the same. Various conductive materials can be used for the plug.

[0207] Further, a protective layer 121 is provided on the light emitting elements 110G and 110B. A substrate 163 is attached to the protective layer 121 with an insulating layer 104 that functions as an adhesive layer.

[0208] There is no insulating layer covering the upper end of each pixel electrode 111 between two adjacent pixel electrodes 111. This allows the distance between adjacent light-emitting elements to be extremely narrow, resulting in a high-definition or high-resolution display panel.

[0209] [Display panel 200B] 18 has a configuration in which a transistor 310A and a transistor 310B, each having a channel formed in a semiconductor substrate, are stacked. Note that in the following description of the display panel, descriptions of parts that are the same as those of the display panel described above may be omitted.

[0210] The display panel 200B has a configuration in which a substrate 301B on which a transistor 310B, a capacitor 240, and a light-emitting device are provided and a substrate 301A on which a transistor 310A is provided are bonded together.

[0211] Here, an insulating layer 345 is provided on the lower surface of substrate 301B, and an insulating layer 346 is provided on insulating layer 261 provided on substrate 301A. Insulating layers 345 and 346 function as protective layers and can suppress the diffusion of impurities into substrates 301B and 301A. As insulating layers 345 and 346, an inorganic insulating film that can be used for protective layer 121 can be used.

[0212] The substrate 301B is provided with a plug 343 penetrating the substrate 301B and an insulating layer 345. Here, it is preferable to provide an insulating layer 344 that covers the side surface of the plug 343 and functions as a protective layer.

[0213] Furthermore, in the substrate 301B, a conductive layer 342 is provided below the insulating layer 345. The conductive layer 342 is embedded in the insulating layer 335, and the lower surfaces of the conductive layer 342 and the insulating layer 335 are flattened. Furthermore, the conductive layer 342 is connected to a plug 343.

[0214] On the other hand, in the substrate 301A, a conductive layer 341 is provided on an insulating layer 346. The conductive layer 341 is embedded in the insulating layer 336, and the upper surfaces of the conductive layer 341 and the insulating layer 336 are flattened.

[0215] It is preferable to use the same conductive material for conductive layer 341 and conductive layer 342. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film containing the above elements (titanium nitride film, molybdenum nitride film, tungsten nitride film), etc., can be used. In particular, it is preferable to use copper for conductive layer 341 and conductive layer 342. This allows the use of Cu-Cu (copper-copper) direct bonding technology (technology that achieves electrical conductivity by connecting Cu (copper) pads together).

[0216] [Display Panel 200C] The display panel 200C shown in FIG. 19 has a configuration in which a conductive layer 341 and a conductive layer 342 are joined via a bump 347.

[0217] 19, by providing a bump 347 between the conductive layer 341 and the conductive layer 342, the conductive layer 341 and the conductive layer 342 can be connected. The bump 347 can be formed using a conductive material containing, for example, gold (Au), nickel (Ni), indium (In), tin (Sn), or the like. Alternatively, for example, solder may be used as the bump 347. An adhesive layer 348 may be provided between the insulating layer 345 and the insulating layer 346. When the bump 347 is provided, the insulating layer 335 and the insulating layer 336 may not be provided.

[0218] [Display Panel 200D] The display panel 200D shown in FIG. 20 differs from the display panel 200A mainly in the configuration of the transistors.

[0219] The transistor 320 is a transistor (OS transistor) in which a metal oxide (also referred to as an oxide semiconductor) is used for a semiconductor layer in which a channel is formed.

[0220] The transistor 320 includes a semiconductor layer 321 , an insulating layer 323 , a conductive layer 324 , a pair of conductive layers 325 , an insulating layer 326 , and a conductive layer 327 .

[0221] The substrate 331 corresponds to the substrate 291 in FIGS. 16(A) and 16(B).

[0222] An insulating layer 332 is provided over a substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320 and prevents oxygen from being released from the semiconductor layer 321 toward the insulating layer 332. The insulating layer 332 can be, for example, a film through which hydrogen or oxygen is less likely to diffuse than a silicon oxide film, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0223] A conductive layer 327 is provided over the insulating layer 332, and an insulating layer 326 is provided to cover the conductive layer 327. The conductive layer 327 functions as a first gate electrode of the transistor 320, and part of the insulating layer 326 functions as a first gate insulating layer. An oxide insulating film such as a silicon oxide film is preferably used for at least a portion of the insulating layer 326 that is in contact with the semiconductor layer 321. The top surface of the insulating layer 326 is preferably planarized.

[0224] The semiconductor layer 321 is provided over an insulating layer 326. The semiconductor layer 321 preferably includes a metal oxide (also referred to as an oxide semiconductor) film exhibiting semiconductor characteristics. A pair of conductive layers 325 is provided over and in contact with the semiconductor layer 321 and functions as a source electrode and a drain electrode.

[0225] An insulating layer 328 is provided to cover top surfaces and side surfaces of the pair of conductive layers 325 and side surfaces of the semiconductor layer 321, and an insulating layer 264 is provided over the insulating layer 328. The insulating layer 328 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 264 or the like to the semiconductor layer 321 and prevents oxygen from being released from the semiconductor layer 321. The insulating layer 328 can be an insulating film similar to the insulating layer 332.

[0226] An opening reaching the semiconductor layer 321 is provided in the insulating layer 328 and the insulating layer 264. An insulating layer 323 in contact with the upper surface of the semiconductor layer 321 and a conductive layer 324 are buried inside the opening. The conductive layer 324 functions as a second gate electrode, and the insulating layer 323 functions as a second gate insulating layer.

[0227] The upper surfaces of conductive layer 324, insulating layer 323, and insulating layer 264 are planarized so that their heights are the same or approximately the same, and insulating layers 329 and 265 are provided to cover them.

[0228] The insulating layer 264 and the insulating layer 265 function as interlayer insulating layers. The insulating layer 329 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 265 or the like to the transistor 320. The insulating layer 329 can be formed using an insulating film similar to the insulating layer 328 and the insulating layer 332.

[0229] The plug 274 connected to one of the pair of conductive layers 325 is provided so as to be embedded in the insulating layer 265, the insulating layer 329, and the insulating layer 264. Here, the plug 274 preferably has a conductive layer 274a that covers the side surfaces of the openings in the insulating layer 265, the insulating layer 329, the insulating layer 264, and the insulating layer 328 and a part of the upper surface of the conductive layer 325, and a conductive layer 274b that is in contact with the upper surface of the conductive layer 274a. In this case, it is preferable to use a conductive material that is difficult for hydrogen and oxygen to diffuse into as the conductive layer 274a.

[0230] Note that the structure of the transistor included in the display panel of this embodiment is not particularly limited. For example, a planar transistor, a staggered transistor, an inverted staggered transistor, or the like can be used. Furthermore, either a top-gate transistor or a bottom-gate transistor structure may be used. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0231] The transistor 320 has a structure in which a semiconductor layer in which a channel is formed is sandwiched between two gates. The two gates may be connected and the transistor may be driven by supplying the same signal to them. Alternatively, the threshold voltage of the transistor may be controlled by applying a potential for controlling the threshold voltage to one of the two gates and a potential for driving to the other.

[0232] The crystallinity of a semiconductor material used for a semiconductor layer of a transistor is not particularly limited, and any of an amorphous semiconductor, a single-crystal semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a single-crystal semiconductor or a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0233] The band gap of the metal oxide used for the semiconductor layer of the transistor is preferably 2 eV or more, more preferably 2.5 eV or more. Use of a metal oxide with a wide band gap can reduce the off-state current of the OS transistor.

[0234] The metal oxide preferably contains at least indium or zinc, and more preferably contains indium and zinc. For example, the metal oxide preferably contains indium, M (wherein M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc.

[0235] Alternatively, the semiconductor layer of the transistor may contain silicon, such as amorphous silicon or crystalline silicon (such as low-temperature polysilicon or single-crystal silicon).

[0236] Examples of metal oxides that can be used in the semiconductor layer include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains two or three elements selected from indium, element M, and zinc. The element M is one or more elements selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. The element M is particularly preferably one or more elements selected from aluminum, gallium, yttrium, and tin.

[0237] When a metal oxide is used for the semiconductor layer, the metal oxide is preferably formed by a sputtering method or an ALD method. When the metal oxide is formed by a sputtering method, productivity and film density can be increased. When the metal oxide is formed by an ALD method, film coverage can be improved.

[0238] In particular, as the metal oxide used for the semiconductor layer, it is preferable to use an oxide containing indium, gallium, and zinc (also referred to as IGZO). Alternatively, it is preferable to use an oxide containing indium, tin, and zinc (also referred to as ITZO (registered trademark)). Alternatively, it is preferable to use an oxide containing indium, gallium, tin, and zinc. Alternatively, it is preferable to use an oxide containing indium, aluminum, and zinc (also referred to as IAZO). Alternatively, it is preferable to use an oxide containing indium, aluminum, gallium, and zinc (also referred to as IAGZO).

[0239] When the metal oxide used in the semiconductor layer is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. Examples of atomic ratios of metal elements in such an In-M-Zn oxide include a composition of In:M:Zn=1:1:1 or thereabouts, In:M:Zn=1:1:1 or thereabouts, In:M:Zn=1:1:1.2 or thereabouts, In:M:Zn=1:3:2 or thereabouts, In:M:Zn=1:3:4 or thereabouts, In:M:Zn=2:1:3 or thereabouts, In:M:Zn=3:1:2 or thereabouts, In:M:Zn=4:2: Examples of compositions include In:M:Zn=4:2:4.1 or a composition in the vicinity, In:M:Zn=5:1:3 or a composition in the vicinity, In:M:Zn=5:1:6 or a composition in the vicinity, In:M:Zn=5:1:7 or a composition in the vicinity, In:M:Zn=5:1:8 or a composition in the vicinity, In:M:Zn=6:1:6 or a composition in the vicinity, and In:M:Zn=5:2:5 or a composition in the vicinity. Note that a composition in the vicinity includes a range of ±30% of the desired atomic ratio.

[0240] Furthermore, it is preferable to use gallium or tin as the element M. Note that the element M may be a combination of two or more of the above elements. It is also preferable to use In:M:Zn=40:1:10 or a metal oxide thereof in the semiconductor layer. Specifically, it is preferable to use In:Sn:Zn=40:1:10 or a metal oxide thereof in the semiconductor layer.

[0241] For example, when describing a composition with an atomic ratio of In:Ga:Zn=4:2:3 or thereabout, this includes a case where, when In is taken as 4, Ga is 1 to 3 and Zn is 2 to 4. Furthermore, when describing a composition with an atomic ratio of In:Ga:Zn=5:1:6 or thereabout, this includes a case where, when In is taken as 5, Ga is greater than 0.1 and 2 or less and Zn is 5 to 7 or less. Furthermore, when describing a composition with an atomic ratio of In:Ga:Zn=1:1:1 or thereabout, this includes a case where, when In is taken as 1, Ga is greater than 0.1 and 2 or less and Zn is greater than 0.1 and 2 or less.

[0242] The semiconductor layer may also have two or more metal oxide layers with different compositions. For example, a stacked structure of a first metal oxide layer with an atomic ratio of In:M:Zn=1:3:4 or a similar composition and a second metal oxide layer with an atomic ratio of In:M:Zn=1:1:1 or a similar composition provided on the first metal oxide layer is preferred. Gallium or aluminum is particularly preferred as the element M.

[0243] Alternatively, for example, a laminated structure of any one selected from indium oxide, indium gallium oxide, and IGZO and any one selected from IAZO, IAGZO, and ITZO (registered trademark) may be used.

[0244] Examples of crystalline oxide semiconductors include c-axis-aligned crystalline (CAAC)-OS and nanocrystalline (nc)-OS.

[0245] OS transistors have significantly higher field-effect mobility than transistors using amorphous silicon. Furthermore, OS transistors have significantly lower source-drain leakage current (also called off-state current) in an off state, allowing them to retain charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of OS transistors can reduce the power consumption of display panels.

[0246] Furthermore, to increase the light emission luminance of a light-emitting device included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of the drive transistor included in the pixel circuit. Because OS transistors have a higher source-drain breakdown voltage than Si transistors, a high voltage can be applied between the source and drain of an OS transistor. Therefore, by using an OS transistor as the drive transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting device and increase the light emission luminance of the light-emitting device.

[0247] Furthermore, when the transistor operates in the saturation region, the change in source-drain current in an OS transistor is smaller than that in a Si transistor when the gate-source voltage changes. Therefore, by using an OS transistor as the drive transistor in a pixel circuit, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing through the light-emitting device. This allows for a greater number of gray levels in the pixel circuit.

[0248] Furthermore, in terms of the saturation characteristics of the current that flows when a transistor operates in the saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a drive transistor, a stable current can be passed through a light-emitting device, even when the current-voltage characteristics of an EL device vary. In other words, when an OS transistor operates in the saturation region, the source-drain current remains almost unchanged even when the source-drain voltage increases, thereby stabilizing the light-emitting brightness of the light-emitting device.

[0249] As described above, by using an OS transistor for the drive transistor included in the pixel circuit, it is possible to achieve "reduced power consumption," "increased light emission brightness," "multiple gradations," and "suppressed variations in light-emitting devices."

[0250] [Display Panel 200E] A display panel 200E shown in FIG. 21 has a stacked structure of a transistor 310 in which a channel is formed in a substrate 301 and a transistor 320 in which a channel is formed and a semiconductor layer containing metal oxide is formed.

[0251] An insulating layer 261 is provided to cover the transistor 310, and a conductive layer 251 is provided over the insulating layer 261. An insulating layer 262 is provided to cover the conductive layer 251, and a conductive layer 252 is provided over the insulating layer 262. The conductive layers 251 and 252 each function as wirings. An insulating layer 263 and an insulating layer 332 are provided to cover the conductive layer 252, and a transistor 320 is provided over the insulating layer 332. An insulating layer 265 is provided to cover the transistor 320, and a capacitor 240 is provided over the insulating layer 265. The capacitor 240 and the transistor 320 are connected by a plug 274.

[0252] The transistor 320 can be used as a transistor that constitutes a pixel circuit. The transistor 310 can be used as a transistor that constitutes a pixel circuit or a driver circuit (gate line driver circuit, source line driver circuit) that drives the pixel circuit. The transistors 310 and 320 can be used as transistors that constitute various circuits such as an arithmetic circuit or a memory circuit.

[0253] With this configuration, not only pixel circuits but also driving circuits etc. can be formed directly below the light-emitting device, which makes it possible to make the display panel smaller than when driving circuits are provided around the periphery of the display area.

[0254] [Display Panel 200F] The display panel 200F shown in Fig. 22 has a configuration in which the transistor 320 of the display panel 200E shown in Fig. 21 is replaced with a transistor 320A (vertical transistor). Note that the configuration in which the transistor 320 is replaced with the transistor 320A can also be applied to the display panel 200D shown in Fig. 20.

[0255] 23A shows a cross-sectional view of the transistor 320A in the XZ plane, and FIG. 23B shows a cross-sectional view of the transistor 320A in the XY plane including the wiring 440.

[0256] The transistor 320A includes an oxide semiconductor 470, an insulator 430, and a conductor 420. The oxide semiconductor 470 functions as a semiconductor layer, the insulator 430 functions as a gate insulator, and the conductor 420 functions as a gate electrode. The wiring 450 has a region that functions as one of a source electrode and a drain electrode of the transistor 320A. The wiring 440 has a region that functions as the other of the source electrode and the drain electrode of the transistor 320A.

[0257] An opening 490 is provided through the wiring 440 and the insulator 480, reaching the wiring 450. The opening 490 has a columnar shape with a roughly circular upper surface. This configuration allows for miniaturization or high integration of memory cells. Note that the side surface of the opening 490 is preferably perpendicular to the upper surface of the wiring 450.

[0258] At least a part of the oxide semiconductor 470 is disposed in the opening 490. Note that the oxide semiconductor 470 has a region in contact with the top surface of the wiring 450, a region in contact with the side surface of the wiring 440, and a region in contact with the side surface of the insulator 480 in the opening 490.

[0259] The insulator 430 is disposed so that at least a portion thereof covers the opening 490. The conductor 420 is disposed so that at least a portion thereof is located in the opening 490. Note that the conductor 420 is preferably provided so as to fill the opening 490, and preferably has a substantially circular shape in top view in order to increase the degree of integration.

[0260] As shown in FIG. 23A, the oxide semiconductor 470 includes a region 470i and regions 470na and 470nb that are provided so as to sandwich the region 470i.

[0261] The region 470na is a region of the oxide semiconductor 470 that is in contact with the wiring 450. At least a part of the region 470na functions as one of the source region and the drain region of the transistor 320A. The region 470nb is a region of the oxide semiconductor 470 that is in contact with the wiring 440. At least a part of the region 470nb functions as the other of the source region and the drain region of the transistor 320A. As shown in FIG. 23B, the wiring 440 is in contact with the entire periphery of the oxide semiconductor 470. Therefore, the other of the source region and the drain region of the transistor 320A can be formed around the entire periphery of a portion of the oxide semiconductor 470 that is formed in the same layer as the wiring 440.

[0262] The region 470i is a region sandwiched between the regions 470na and 470nb in the oxide semiconductor 470. At least part of the region 470i functions as a channel formation region of the transistor 320A. That is, the channel formation region of the transistor 320A is formed in a part of the oxide semiconductor 470 located between the wiring 450 and the wiring 440. It can also be said that the channel formation region of the transistor 320A is located in a region of the oxide semiconductor 470 that is in contact with the insulator 480 or in a region near the insulator 480.

[0263] The channel length of the transistor 320A is the distance between the source region and the drain region. In other words, the channel length of the transistor 320A is determined by the thickness of the insulator 480 on the wiring 450. In FIG. 23A, the channel length L of the transistor 320A is indicated by a dashed double-headed arrow. In a cross-sectional view, the channel length L is the distance between the edge of the region where the oxide semiconductor 470 and the wiring 450 contact each other and the edge of the region where the oxide semiconductor 470 and the wiring 440 contact each other. In other words, the channel length L corresponds to the length of the side surface of the insulator 480 on the opening 490 side in a cross-sectional view.

[0264] In a planar transistor, the channel length is limited by the exposure limit of photolithography, making further miniaturization difficult. However, in one embodiment of the present invention, the channel length can be set by the film thickness of the insulator 480. Therefore, the channel length of the transistor 320A can be made into a very fine structure that is equal to or less than the exposure limit of photolithography (for example, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less, and 1 nm or more, or 5 nm or more). This allows the on-state current of the transistor 320A to be increased.

[0265] Furthermore, as described above, the channel formation region, the source region, and the drain region can be formed in the opening 490. This reduces the area occupied by the transistor 320A compared to a conventional transistor in which the channel formation region, the source region, and the drain region are provided separately on the XY plane, thereby increasing pixel density.

[0266] A transistor having a channel formation region along the side surface of the insulator 480 in the opening 490 is also called a vertical transistor.

[0267] 23B, the oxide semiconductor 470, the insulator 430, and the conductor 420 are also arranged concentrically in the XY plane including the channel formation region of the oxide semiconductor 470. Therefore, the side surface of the conductor 420 located at the center faces the side surface of the oxide semiconductor 470 with the insulator 430 interposed therebetween. In other words, the entire periphery of the oxide semiconductor 470 forms the channel formation region in a top view. In this case, the channel width of the transistor 320A is determined, for example, by the perimeter of the oxide semiconductor 470. In other words, the channel width of the transistor 320A is determined by the maximum width of the opening 490 (the maximum diameter when the opening 490 is circular in a top view). In FIGS. 23A and 23B, the maximum width D of the opening 490 is indicated by a double-headed, dashed arrow. In FIG. 23B, the channel width W of the transistor 320A is indicated by a double-headed, dashed arrow. By increasing the size of the maximum width D of the opening 490, the channel width per unit area can be increased, and the on-current can be increased.

[0268] When the opening 490 is formed using photolithography, the maximum width D of the opening 490 is limited by the exposure limit of photolithography. The maximum width D of the opening 490 is set by the film thickness of each of the oxide semiconductor 470, the insulator 430, and the conductor 420 provided in the opening 490. The maximum width D of the opening 490 is, for example, 5 nm or more, 10 nm or more, or 20 nm or more, and preferably 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less. Note that when the opening 490 is circular in top view, the maximum width D of the opening 490 corresponds to the diameter of the opening 490, and the channel width W can be calculated as "D × π."

[0269] In the memory device of one embodiment of the present invention, the channel length L of the transistor 320A is preferably at least shorter than the channel width W of the transistor 320A. The channel length L of the transistor 320A of one embodiment of the present invention is 0.1 to 0.99 times, preferably 0.5 to 0.8 times, the channel width W of the transistor 320A. With such a structure, a transistor with favorable electrical characteristics and high reliability can be realized.

[0270] Furthermore, by forming the opening 490 to have a substantially circular shape in top view, the oxide semiconductor 470, the insulator 430, and the conductor 420 are arranged concentrically. This makes the distance between the conductor 420 and the oxide semiconductor 470 substantially uniform, allowing a gate electric field to be applied to the oxide semiconductor 470 substantially uniformly.

[0271] The channel formation region of a transistor using an oxide semiconductor for a semiconductor layer preferably has fewer oxygen vacancies or a lower concentration of impurities such as hydrogen, nitrogen, or metal elements than the source and drain regions. For example, the aluminum concentration in the channel formation region of an oxide semiconductor is preferably 1×10 22 atoms / cm 3 Less than 1×10 is preferred 21 atoms / cm 3 Less than 1×10 is preferable. 20 atoms / cm 3 Less than 5×10 is preferable. 19 atoms / cm 3 Less than 1×10 is preferable. 19 atoms / cm 3 Less than 5×10 is preferable. 18 atoms / cm 3 Less than 1×10 is preferable. 18 atoms / cm 3 The following is even more preferred:

[0272] In addition, hydrogen atoms near the oxygen vacancies are converted into hydrogen atoms in the oxygen vacancies (hereinafter referred to as V OH) and generate electrons that become carriers. Therefore, in the channel formation region, V O It is preferable that H is also reduced. In this way, the channel formation region of the transistor is a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the transistor can be said to be i-type (intrinsic) or substantially i-type.

[0273] In addition, the source and drain regions of a transistor using an oxide semiconductor for the semiconductor layer have more oxygen vacancies than the channel formation region. O This is a region with a high carrier concentration and low resistance due to a high concentration of H or impurities such as hydrogen, nitrogen, and metal elements. In other words, the source and drain regions of a transistor are n-type regions with a high carrier concentration and low resistance compared to the channel formation region.

[0274] 23A and the like, the opening 490 is provided so that the side surface of the opening 490 is perpendicular to the upper surface of the wiring 450, but the present invention is not limited to this. For example, the side surface of the opening 490 may be tapered.

[0275] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification. [Explanation of symbols]

[0276] 20: display device, 21: optical device, 30: housing, 35: holder, 40: pixel, 41: line-of-sight detection sensor, 42: light source, 60: display unit, 62: linear polarizer, 63: retardation plate, 64: half mirror, 65: lens, 66: retardation plate, 67: reflective polarizer, 68: lens, 71: subpixel, 74: pixel array, 75: circuit, 76: circuit, 77: layer, 78: layer, 79: layer, 100: laminate, 101a: pixel, 101b: pixel, 102: lens, 102a: resin layer, 102B: lens, 102b: resin layer, 102BA: lens array, 102c: resin layer, 102G : lens, 102R: lens, 103: insulating layer, 104: insulating layer, 105B: sub-pixel, 105G: sub-pixel, 105R: sub-pixel, 110: light-emitting element, 110B: light-emitting element, 110G: light-emitting element, 110R: light-emitting element, 111: pixel electrode, 111B: pixel electrode, 111G: pixel electrode, 112: organic layer, 112B: organic layer, 112G: organic layer, 113: common electrode, 114: common layer, 121: protective layer, 124: insulating layer, 125: insulating layer, 126: resin layer, 145: photomask, 161: substrate, 163: substrate, 200A: display panel, 200B: display panel, 20 0C: display panel, 200D: display panel, 200E: display panel, 200F: display panel, 240: capacitor, 241: conductive layer, 243: insulating layer, 245: conductive layer, 251: conductive layer, 252: conductive layer, 254: insulating layer, 255a: insulating layer, 255b: insulating layer, 255c: insulating layer, 256: plug, 261: insulating layer, 262: insulating layer, 263: insulating layer, 264: insulating layer, 265: insulating layer, 271: plug, 274: plug, 274a: conductive layer, 274b: conductive layer, 280: display module, 281: display unit, 282: circuit unit, 283: pixel circuit unit, 283a: Pixel circuit, 284: pixel portion, 284a: pixel, 285: terminal portion, 286: wiring portion, 290: FPC, 291: substrate, 292: substrate, 301: substrate, 301A: substrate, 301B: substrate, 310: transistor, 310A: transistor, 310B: transistor, 311: conductive layer, 312: low resistance region, 313: insulating layer, 314: insulating layer, 315: element isolation layer, 320: transistor, 320A: transistor, 321: semiconductor layer, 323: insulating layer, 324: conductive layer, 325: conductive layer, 326: insulating layer, 327: conductive layer, 328: insulating layer, 329: insulating layer,331: substrate, 332: insulating layer, 335: insulating layer, 336: insulating layer, 341: conductive layer, 342: conductive layer, 343: plug, 344: insulating layer, 345: insulating layer, 346: insulating layer, 347: bump, 348: adhesive layer, 420: conductor, 430: insulator, 440: wiring, 450: wiring, 470: oxide semiconductor, 470i: region, 470na: region, 470nb: region, 480: insulator, 490: opening,

Claims

1. a pixel having a first subpixel, a second subpixel, and a third subpixel each having a different emission color; the first and second subpixels are arranged adjacent to each other in a first direction; the third subpixel is arranged adjacent to each of the first and second subpixels in a second direction perpendicular to the first direction; a first plano-convex lens is disposed on the first sub-pixel; a second plano-convex lens is disposed on the second sub-pixel; A display device in which a third plano-convex lens and a fourth plano-convex lens are arranged adjacent to each other in the first direction above the third subpixel.

2. In claim 1, the third plano-convex lens is disposed adjacent to the first plano-convex lens in the second direction, the fourth plano-convex lens is disposed adjacent to the second plano-convex lens in the second direction, The first and fourth plano-convex lenses have an outer shape with a radius r when viewed from above. １ is circular, The second and third plano-convex lenses have an outer shape with a radius r when viewed from above. ２ is circular, The pixel has a square shape when viewed from above, The length of one side of the pixel is 2(r １ +r ２ ) or more.

3. In claim 1, A display device in which a partial area of ​​the third plano-convex lens is provided on an adjacent pixel.

4. In claim 1, The display device wherein the first to fourth plano-convex lenses are spherical lenses.

5. In claim 1, In top view, the third subpixel is rectangular; the center points of the third and fourth plano-convex lenses are located on or near a line that perpendicularly bisects a short side of the third sub-pixel, The center point of the third plano-convex lens is at a distance r from the center point of the third sub-pixel. ２ at or near the location of The center point of the fourth plano-convex lens is at a distance r from the center point of the third sub-pixel. １ A display device located at or near the location of

6. In claim 1, one of the first subpixel and the second subpixel emits red light; the other of the first subpixel and the second subpixel emits green light; The third subpixel emits blue light.

7. a pixel having a first subpixel, a second subpixel, and a third subpixel each having a different emission color; the first and second subpixels are arranged adjacent to each other in a first direction; the third subpixel is arranged adjacent to each of the first and second subpixels in a second direction perpendicular to the first direction; a first plano-convex lens is disposed on the first sub-pixel; a second plano-convex lens is disposed on the second sub-pixel; a lens array is disposed above the third subpixel; the lens array has a configuration in which three different plano-convex lenses are joined together in the first direction, The lens array has, in the first direction, a first lens area, a second lens area, and a third lens area, each having a different curvature.

8. In claim 7, the first lens region has a first area of ​​curvature; the second lens region has a second area of ​​curvature; the third lens region has a third area of ​​curvature; the first region of curvature has a curvature equivalent to that of the second plano-convex lens; the third region of curvature has a curvature equivalent to that of the first plano-convex lens; The second lens region has a curvature between the curvature of the first plano-convex lens and the curvature of the second plano-convex lens.

9. In claim 7, the first lens region is disposed adjacent to the first plano-convex lens in the second direction, the third lens region is disposed adjacent to the second plano-convex lens in the second direction, The first plano-convex lens has an outer shape of a radius r when viewed from above. １ is circular, The second plano-convex lens has an outer shape of radius r when viewed from above. ２ is circular, The pixel has a square shape when viewed from above, The length of one side of the pixel is 2(r １ +r ２ ) or more.

10. In claim 7, A display device in which a partial area of ​​the lens array is provided on an adjacent pixel.

11. In claim 7, In top view, the third subpixel is rectangular; the center points of the first to third lens regions are located on or near a line that perpendicularly bisects a short side of the third subpixel, A display device in which the center point of the second lens region is provided at or near the center point of the third sub-pixel.

12. In claim 7, one of the first subpixel and the second subpixel emits red light; the other of the first subpixel and the second subpixel emits green light; The third subpixel emits blue light.

13. 13. An electronic device using the display device according to claim 1 as a light source, and having a catadioptric system provided on a display surface side of the display device.

Images