Transparent display device
Optimizing the arrangement of subpixels in transparent displays by placing green and white subpixels centrally and adjacent red and green or blue and white subpixels addresses edge artifacts, enhancing image quality and transmittance.
Patent Information
- Application Number
- JP2024215316
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-28
- Filing Date
- 2024-12-10
- Publication Date
- 2025-09-09
- Estimated Expiration
- 2044-12-10
AI Technical Summary
Transparent display devices suffer from edge artifacts such as bright lines, dark lines, and color bleeding due to spacing deviations between emitting subpixels, particularly in four-color configurations, leading to degraded image quality.
The arrangement of subpixels is optimized by placing green and white subpixels in the center and red and green or blue and white subpixels adjacent to each other in non-transmissive regions, improving image quality by reducing these artifacts.
This arrangement enhances image quality by minimizing edge artifacts like bright lines, dark lines, and color bleeding, while also increasing transmissive area and improving transmittance.
Smart Images

Figure 2025131504000001_ABST
Abstract
Description
[Technical Field]
[0001] The present specification relates to a transparent display device capable of improving image quality by reducing edge artifacts. [Background technology]
[0002] Transparent display devices can include non-transmissive and transmissive regions, where the non-transmissive regions can display full color using four-color sub-pixels containing white, red, green, and blue emitting regions.
[0003] In a four-color transparent display device, the spacing between the emitting subpixels may increase to display a particular color, or spacing deviations may occur between the emitting subpixels.
[0004] As a result, in a four-color transparent display device, edge artifacts, in which bright lines, dark lines, or color bleeding are observed at edges where there is a luminance difference between adjacent pixels, may occur, resulting in degradation of image quality. Summary of the Invention [Problem to be solved by the invention]
[0005] The present specification provides a transparent display device that can improve edge artifacts by optimizing the arrangement of four color light-emitting regions.
[0006] The problems to be solved in this specification are not limited to those mentioned above, and other problems not mentioned will be clearly understood by a person having ordinary skill in the art to which the technical idea of this specification belongs from the following description. [Means for solving the problem]
[0007] A transparent display device according to one embodiment includes a plurality of pixel regions including non-transmissive regions and transmissive regions, and the non-transmissive region of each pixel region includes a first subpixel, a second subpixel, a third subpixel, and a fourth subpixel arranged in order in a first direction, wherein one of the second and third subpixels is a green subpixel and the other is a white subpixel, and when the second subpixel is a green subpixel, the first subpixel is a red subpixel, and when the third subpixel is a green subpixel, the fourth subpixel is a red subpixel.
[0008] A transparent display device according to one embodiment may include a plurality of pixel regions including non-transmissive regions and transmissive regions, and the non-transmissive regions of each pixel region may include red sub-pixels, green sub-pixels, white sub-pixels, and blue sub-pixels arranged in a vertical direction.
[0009] A transparent display device according to one embodiment may include a plurality of pixel regions including non-transmissive regions and transmissive regions, and the non-transmissive regions of each pixel region may include blue sub-pixels, white sub-pixels, green sub-pixels, and red sub-pixels arranged in a vertical direction.
[0010] Specific matters according to various examples of the present specification other than the means for solving the above-mentioned problems are included in the following description and drawings. [Effects of the Invention]
[0011] In one embodiment of the transparent display device, among the four color sub-pixels in the non-transmissive region of each pixel region, the green and white sub-pixels are arranged in the center of the non-transmissive region, and the red and green sub-pixels are arranged adjacent to each other, thereby improving image quality by improving edge artifacts such as bright lines, dark lines, and color bleeding.
[0012] A transparent display device according to an embodiment includes red / green / white / blue or blue / white / green / red sub-pixels arranged parallel to the vertical direction in the non-transmissive area of each pixel area, thereby improving image quality by improving edge artifacts such as bright lines, dark lines, and color bleeding, and achieving low power consumption by increasing the transmissive area and improving transmittance. [Brief explanation of the drawings]
[0013] [Figure 1] 1 is a block diagram illustrating a schematic configuration of a transparent display device according to an embodiment. [Figure 2] 1 is a block diagram illustrating a schematic configuration of a transparent display device according to an embodiment. [Figure 3A] FIG. 3A is a diagram illustrating a pixel structure according to one embodiment. [Figure 3B] FIG. 3B is a diagram illustrating a pixel structure according to one embodiment. [Figure 3C] FIG. 3C is a diagram illustrating a pixel structure according to one embodiment. [Figure 4A] FIG. 4A is a diagram illustrating a pixel structure according to one embodiment. [Figure 4B] FIG. 4B is a diagram illustrating a pixel structure according to one embodiment. [Figure 4C] FIG. 4C is a diagram illustrating a pixel structure according to one embodiment. [Figure 5] FIG. 2 is an equivalent circuit diagram showing the configuration of each sub-pixel according to an embodiment. [Figure 6] FIG. 2 is an equivalent circuit diagram showing the configuration of each sub-pixel according to an embodiment. [Figure 7] 1 is an exemplary diagram illustrating pixel regions according to an embodiment; [Figure 8A] FIG. 8A is a diagram illustrating a comparison of transmittance between a transparent display device according to a comparative example and a transparent display device according to an embodiment. [Figure 8B] FIG. 8B is a diagram illustrating a comparison of transmittance between the transparent display device according to the comparative example and the transparent display device according to the embodiment. [Figure 8C] FIG. 8C is a diagram illustrating a comparison of transmittance between the transparent display device according to the comparative example and the transparent display device according to the embodiment. [Figure 9] 10A and 10B are diagrams illustrating the color bleeding phenomenon depending on the arrangement order of three-color sub-pixels according to a comparative example. [Figure 10A] FIG. 10A is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 10B] FIG. 10B is a diagram illustrating the edge artifact phenomenon in the transparent display device according to the comparative example. [Figure 10C] FIG. 10C is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 11A] FIG. 11A is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 11B] FIG. 11B is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 11C] FIG. 11C is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 12A] FIG. 12A is a diagram illustrating an improvement effect of edge artifacts in a transparent display device according to an embodiment. [Figure 12B] FIG. 12B is a diagram illustrating an improvement effect of edge artifacts in the transparent display device according to an embodiment. [Figure 12C] FIG. 12C is a diagram illustrating an improvement effect of edge artifacts in a transparent display device according to an embodiment. [Figure 13A] FIG. 13A is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 13B] FIG. 13B is a diagram illustrating the edge artifact phenomenon in the transparent display device according to the comparative example. [Figure 14A] FIG. 14A is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 14B] FIG. 14B is a diagram illustrating the edge artifact phenomenon in the transparent display device according to the comparative example. [Figure 15A] FIG. 15A is a diagram illustrating an edge artifact phenomenon in a transparent display device according to a comparative example. [Figure 15B] FIG. 15B is a diagram illustrating the edge artifact phenomenon in the transparent display device according to the comparative example. [Figure 16A] FIG. 16A is a diagram illustrating an improvement effect of edge artifacts in a transparent display device according to an embodiment. [Figure 16B] FIG. 16B is a diagram illustrating an improvement effect of edge artifacts in the transparent display device according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0014] The advantages and features of the present specification, as well as methods for achieving them, will become apparent from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present specification is not limited to the embodiments disclosed below, and may be embodied in various different forms. These embodiments are provided solely to ensure that the disclosure of the present specification is complete and to fully convey the scope of the invention to those skilled in the art. The present specification is defined only by the scope of the claims.
[0015] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of this specification are illustrative only and do not limit the present specification to the details shown in the drawings. The same reference numerals refer to the same elements throughout this specification. Furthermore, if a detailed description of related prior art is deemed to unnecessarily obscure the gist of this specification, such a detailed description will be omitted. When terms such as "comprise," "have," and "consist of" are used in this specification, other parts may be added unless "only" is used. When a component is expressed in the singular, the plural is included unless otherwise explicitly stated.
[0016] When interpreting elements, the error range is interpreted as being included even if there is no separate explicit description of the error range.
[0017] In the case of a description of a positional relationship, for example, when the positional relationship of two parts is described using "above," "on top," "below," or "beside," one or more other parts may be located between the two parts, unless the words "immediately" or "directly" are used.
[0018] When describing a temporal relationship, for example, when the temporal precedence relationship is described using "after," "following," "next to," or "before," it can also include cases where the relationship is not consecutive, unless the words "immediately" or "directly" are used.
[0019] Although terms such as "first" and "second" are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a first component referred to below may also be a second component within the technical concept of this specification.
[0020] In describing components in this specification, terms such as first, second, A, B, a, b, etc. may be used. Such terms are used merely to distinguish the component from other components, and do not limit the nature, order, sequence, or number of the components. When a component is described as being "coupled," "coupled," or "connected" to another component, it should be understood that the component can be directly coupled or connected to the other component, but that other components may be "intervening" between each component that can be indirectly coupled or connected unless otherwise explicitly stated.
[0021] The term "at least one" should be understood to include all combinations of one or more of the associated components. For example, the meaning of "at least one of the first, second, and third components" can include not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.
[0022] The features of each of the several embodiments of this specification can be partially or wholly combined or combined with each other, and various technical interlocking and driving mechanisms are possible, and each embodiment can be implemented independently of each other or can be implemented together in a linked relationship.
[0023] The present invention will be described in detail with reference to the accompanying drawings and examples below. The scales of the components shown in the drawings are different from the actual scales for the convenience of explanation, and are not limited to the scales shown in the drawings.
[0024] 1 and 2 are block diagrams showing a schematic configuration of a transparent display device according to an embodiment, FIGS. 3A to 4C are diagrams showing a pixel structure according to an embodiment, and FIGS. 5 and 6 are equivalent circuit diagrams showing the configuration of each sub-pixel according to an embodiment.
[0025] The display devices 1000 and 1000A according to an embodiment may be a liquid crystal display device, an electroluminescent display device using self-luminous elements, or a micro light-emitting diode (MLD) display device using micro light-emitting diodes. The MLD display device may be an organic light-emitting diode (OLED) display device, a quantum-dot light-emitting diode (QD) display device, or an inorganic light-emitting diode (ILD) display device.
[0026] 1 and 2, a transparent display apparatus 1000, 1000A according to an embodiment may include a display panel 100, a gate driver 300, a data driver 400, a timing controller 600, a gamma voltage generator 700, and a power management circuit 800, 800A. The gate driver 300 and the data driver 400 may be referred to as a panel driver 200 that drives the display panel 100. The gate driver 300, the data driver 400, the timing controller 600, and the gamma voltage generator 700 may be referred to as a display driver 500.
[0027] Referring to FIG. 2, the transparent display device 1000A according to an embodiment may further include a light blocking plate 1100 disposed on the rear surface of the display panel 100 and overlapping the display panel 100, and a light blocking plate driver 1200 for driving the light blocking plate 1100.
[0028] Referring to Figures 1 and 2, the display panel 100 may be a rigid display panel or a flexible display panel that can be deformed into a different shape, such as a foldable, bendable, rollable, or stretchable display panel.
[0029] The display panel 100 is a transparent display device that allows a background behind it to be seen through the display panel 100. The display panel 100 includes a display area (AA) in which a plurality of pixel areas (PX) are arranged in a matrix form to display an image, and a bezel area located around the display area (AA). The display panel 100 according to one embodiment may be a panel that includes or has a touch sensor screen that overlaps the display area (AA).
[0030] Each of the pixel regions (PX) can include an emissive region (EA) in which a plurality of sub-pixels that display on-screen images are arranged, and a transmissive region (TA) that transmits light. The emissive region (EA) can be expressed as a non-transmissive region, and the transmissive region (TA) can be expressed as a transparent region.
[0031] 3A to 4C, each of the pixel regions (PX11, PX12, PX13, PX21, PX22, PX23) according to various embodiments may include a non-transmissive area (NTA) in which first to fourth sub-pixels (SP1, SP2, SP3, SP4) are arranged parallel to each other in a first direction (Y) (vertical direction), and a transmissive area (TA) arranged adjacent to the non-transmissive area (NTA) in a second direction (X) (horizontal direction). The non-transmissive area (NTA) may include first to fourth light-emitting areas (EA1, EA2, EA3, EA4) of the first to fourth sub-pixels (SP1, SP2, SP3, SP4) arranged parallel to each other in the first direction (Y) (vertical direction), and a black matrix (BM) surrounding the light-emitting areas (EA1, EA2, EA3, EA4).
[0032] The first type pixel region (PX11) according to an embodiment and the second type pixel region (PX21) according to an embodiment may have a structure in which a non-transmissive region (NTA) is arranged on the left side and a transmissive region (TA) is arranged on the right side.
[0033] The first type pixel region (PX12) according to one embodiment and the second type pixel region (PX22) according to one embodiment may have a structure in which the non-transmissive region (NTA) is arranged on the right side and the transmissive region (TA) is arranged on the left side.
[0034] The first type pixel region (PX13) according to one embodiment and the second type pixel region (PX23) according to one embodiment may have a structure in which a non-transparent region (NTA) is arranged in the center and transparent regions (TA) are arranged on both the left and right sides of the non-transparent region (NTA).
[0035] The first to fourth light-emitting regions (EA1, EA2, EA3, EA4) of the first to fourth sub-pixels (SP1, SP2, SP3, SP4) can be respectively arranged on the first to fourth row lines (RL1, RL2, RL3, RL4) arranged parallel to the first direction (Y).
[0036] Referring to Figures 3A to 3C, the first type pixel area (PX11, PX12, PX13) may include blue (hereinafter B), white (hereinafter W), green (hereinafter G), and red (hereinafter R) sub-pixels (SP1, SP2, SP3, SP4) arranged in order in a first direction (Y) in a non-transmitting area (NTA).
[0037] Referring to Figures 4A to 4C, the second type pixel area (PX21, PX22, PX23) may include R, G, W, and B sub-pixels (SP1, SP2, SP3, SP4) arranged in order in the first direction (Y) in the non-transmitting area (NTA).
[0038] 3A to 4C, in each of the pixel regions (PX11, PX12, PX13, PX21, PX22, and PX23) according to various embodiments, the G and W subpixels may be disposed at the center of the non-transmitting portion (NTA) in the first direction (Y), thereby preventing edge artifacts such as bright lines and dark lines that may occur at the edge of an image pattern due to the spacing or spacing difference between the G and W subpixels between pixels.
[0039] 3A to 4C, in each of the pixel regions (PX11, PX12, PX13, PX21, PX22, and PX23) according to various embodiments, the R subpixel may be disposed adjacent to the G subpixel in the first direction (Y), thereby preventing color bleeding artifacts that may occur at the edge of an image pattern due to the spacing between the R and G subpixels between pixels.
[0040] 3A to 4C, in each of the pixel regions (PX11, PX12, PX13, PX21, PX22, PX23) according to various embodiments, one of the second and third subpixels (SP2, SP3) centrally disposed in the first direction (Y) may be a G subpixel, and the remaining one may be a W subpixel. As in FIGS. 4A to 4C, when the second subpixel (SP2) is a G subpixel, the first subpixel (SP1) may be an R subpixel, the third subpixel (SP3) may be a W subpixel, and the fourth subpixel (SP4) may be a B subpixel. As in FIGS. 3A to 3C, when the third subpixel (SP3) is a G subpixel, the fourth subpixel (SP4) may be an R subpixel, the first subpixel (SP1) may be a B subpixel, and the second subpixel (SP2) may be a W subpixel.
[0041] Each of the plurality of sub-pixels (SP1-SP2) may include a light-emitting element and a pixel circuit for independently driving the light-emitting element. The light-emitting element may be an organic light-emitting diode, a quantum dot light-emitting diode, or an inorganic light-emitting diode. The pixel circuit may include various types of TFTs, including a driving TFT for driving the light-emitting element and a switching TFT for transmitting a data signal to the driving TFT, and a storage capacitor for storing a driving voltage for the driving TFT. The pixel circuit is electrically connected to signal lines, including gate lines, data lines, and power lines, arranged on the display panel 100.
[0042] The power management circuits 800 and 800A can use an externally supplied input voltage to generate and output various driving voltages required for the operation of all components of the transparent display device, i.e., the display panel 100 and the display driver 500. The power management circuit 800A can further supply driving voltages required for driving the douser 1100 and the douser driver 1200.
[0043] The gate driver 300 is controlled by a plurality of gate control signals supplied from the timing controller 600 and can individually drive the gate lines of the display panel 100. The gate driver 300 supplies a scan signal of a gate-on voltage to each gate line during a driving period of the corresponding gate line, and supplies a gate-off voltage to the corresponding gate line during a non-driving period of the corresponding gate line. The gate driver 300 can be built in the bezel area of the display panel 100 in the form of a gate-in-panel (GIP) formed together with the TFTs in the display area (AA).
[0044] The gate driver 300 built in the display panel 100 according to an embodiment may receive a plurality of gate control signals from the timing controller 600 via a level shifter. The level shifter receives control signals from the timing controller 600, and generates a plurality of gate control signals by level shifting or logic processing the control signals, and supplies the generated signals to the gate driver 300.
[0045] The gamma voltage generator 700 generates a plurality of reference gamma voltages having different gamma voltage levels and supplies them to the data driver 400. The gamma voltage generator 700 can generate a plurality of reference gamma voltages corresponding to the gamma characteristics of the display device under the control of the timing controller 600 and supply them to the data driver 400. The gamma voltage generator 700 can adjust the reference gamma voltage level according to the gamma data supplied from the timing controller 600 and output the reference gamma voltage to the data driver 400. The gamma voltage generator 700 can adjust a high potential power supply voltage, which is the maximum gamma voltage, according to the peak brightness control from the timing controller 600, and adjust a plurality of reference gamma voltages according to the adjusted high potential power supply voltage and output the reference gamma voltages to the data driver 400.
[0046] The data driver 400 is controlled by a data control signal supplied from the timing controller 600 and can convert digital data supplied from the timing controller 600 into an analog data signal using a digital-to-analog conversion circuit. The data driver 400 can subdivide a plurality of reference gamma voltages supplied from the gamma voltage generator 700 into gray scale voltages and convert the digital data into an analog data signal using the subdivided gray scale voltages. The data driver 400 can supply the converted data signal to a data line of the display panel 100.
[0047] Furthermore, the data driver 400 can supply a reference voltage to a reference line of the display panel 100 under the control of the timing controller 600. The data driver 400 can supply separate reference voltages for display and sensing under the control of the timing controller 600.
[0048] The data driver 400 can sense signals reflecting the driving characteristics of the sub-pixels SP1 to SP4 through the reference lines by using the sensing unit under the control of the timing controller 600 in a voltage sensing manner or a current sensing manner.
[0049] The timing controller 600 may receive source image data and timing control signals from a host system. The host system may be any one of a computer, a TV system, a set-top box, a mobile terminal system such as a tablet or a mobile phone, or an in-vehicle system. The timing control signals may include a dot clock, a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, etc.
[0050] The timing controller 600 can control the gate driver 300 and the data driver 400 using timing control signals provided from the host system and timing setting information stored therein. The timing controller 600 can generate a plurality of gate control signals for controlling the driving timing of the gate driver 300 and provide them to the gate driver 300. The timing controller 600 can generate a plurality of data control signals for controlling the driving timing of the data driver 400 and provide them to the data driver 400.
[0051] The timing controller 600 can perform various image processing operations, including image quality correction, degradation correction, and brightness correction for reducing power consumption, on input image data supplied from the host system, and can supply the image-processed data to the data driver 400. The timing controller 600 can be expressed as an image processing unit.
[0052] In one embodiment, the timing controller 600 may use a Peak Luminance Control (PLC) method for controlling peak luminance based on image data. The timing controller 600 may determine an average picture level (APL) of the image data, and may reduce power consumption by lowering the peak luminance as the APL increases.
[0053] In one embodiment, the timing controller 600 can operate the display device 1000 in a sensing mode. In the sensing mode, the timing controller 600 can receive sensing data obtained by sensing electrical characteristics of the display panel 100 via a sensing circuit built in one of the data driver 400 and the power management circuits 800 and 800A.
[0054] In one embodiment, the timing controller 600 may accumulate image data and determine a sensing area by predicting columns and areas on the display panel 100 based on the accumulated data. In the sensing mode, the timing controller 600 may receive sensing data obtained by sensing electrical characteristics of the sensing area of the display panel 100 using the data driver 400 or the power management circuit 800, 800A.
[0055] The timing controller 600 can calculate the amount of change in electrical characteristics (threshold voltage shift value) of the driving transistor and / or light emitting element of each sub-pixel (SP1, SP2, SP3, SP4) based on the sensing data, calculate a compensation value for compensating for the change, and store the calculated compensation value in a memory. The timing controller 600 can compensate for brightness deviation due to characteristic deviation of each sub-pixel (SP1, SP2, SP3, SP4) or compensate for image lag due to degradation by applying the compensation value stored in the memory to compensate for image data.
[0056] The sensing mode of the display device 1000, 1000A according to an embodiment can be performed according to a command from the host system, a request from a user via the host system, or according to a driving sequence determined by the timing controller 600.
[0057] 2, a transparent display apparatus 1000A according to an embodiment may operate in an on-screen emphasis mode and a see-through emphasis mode by controlling the light transmittance of a douser 1100. The on-screen emphasis mode may include a general mode for displaying television images, etc. The see-through emphasis mode may include a transparent mode.
[0058] The timing controller 600 can distinguish between an on-screen important mode and a see-through important mode depending on the type of input image. In the on-screen important mode, the timing controller 600 operates in a normal mode, and the douser driving unit 1200 can drive the douser 1100 in a douser mode that displays black under the control of the timing controller 600. As a result, the display panel 100 can improve the visibility of the on-screen image by displaying the on-screen image using the pixel area (PA) on the black background of the douser 1100 that can be seen through the transmissive portion (TA).
[0059] In the see-through mode, the timing controller 600 controls the douser driver 1200 to drive the douser 1100 in a transmissive mode, allowing the viewer to see the on-screen image displayed by the pixel area (PA) along with the transmissive portion (TA) of the display panel 100 and the background behind the douser 1100.
[0060] FIG. 5 is an equivalent circuit diagram showing the configuration of each sub-pixel according to one embodiment.
[0061] Referring to FIG. 5, each subpixel 10A may include a light-emitting element (EL) connected between a first power supply line (VDDL) that supplies a high potential driving voltage (ELVDD) (first power supply voltage) and a second power supply line (VSSL) that supplies a low potential driving voltage (ELVSS) (second power supply voltage), and a pixel circuit including first and second switching TFTs (ST1, ST2), a driving TFT (DT), and a storage capacitor (Cst) to independently drive the light-emitting element (EL).
[0062] The light-emitting element (EL) may include an anode connected to the source node (N2) of the driving TFT (DT), a cathode connected to the second power line (VSSL), and an organic light-emitting layer between the anode and the cathode. The anode may be independent for each subpixel, while the cathode may be a common electrode shared by all subpixels. When a driving current is supplied from the driving TFT (DT), electrons from the cathode are injected into the organic light-emitting layer, and holes from the anode are injected into the organic light-emitting layer. The recombination of the electrons and holes in the organic light-emitting layer causes a fluorescent or phosphorescent material to emit light, thereby generating light with a brightness proportional to the value of the driving current.
[0063] The first switching TFT (ST1) is driven by a scan signal (SCAN) supplied from the gate driver 300 to the gate line (GL), and can supply a data voltage (Vdata) supplied from the data driver 400 to the data line (DL) to the gate node (N1) of the driving TFT (DT).
[0064] The second switching TFT (ST2) is driven by a scan signal (SCAN) supplied to the gate line (GL) from the gate driver 300, and can supply a reference voltage (Vref) supplied to the reference line (RL) from the data driver 400 to the source node (N2) of the driving TFT (DT). Meanwhile, in the sensing mode, the second switching TFT (ST2) can provide a current that reflects the characteristics of the driving TFT (DT) and the light emitting element (EL) to the reference line (RL).
[0065] The first and second switching TFTs ST1 and ST2 may be controlled by the same gate line as in FIG. 5, or may be controlled by different gate lines.
[0066] The storage capacitor (Cst) connected between the gate node (N1) and source node (N2) of the driving TFT (DT) charges the difference voltage between the data voltage (Vdata) and the reference voltage (Vref) supplied to the gate node (N1) and source node (N2) respectively through the first and second switching TFTs (ST1, ST2) as the driving voltage (Vgs) of the driving TFT (DT), and maintains the charged driving voltage (Vgs) during the light-emitting period when the first and second switching TFTs (ST1, ST2) are off.
[0067] The driving TFT (DT) can control the light emitting intensity of the light emitting element (EL) by controlling the current (Ids) flowing through the light emitting element (EL) according to the driving voltage (Vgs) charged in the storage capacitor (Cst).
[0068] In FIG. 5, the gate line (GL) is driven by the gate driver 300, receives a data voltage (Vdata) and a reference voltage (Vref) from the data driver 400, and can receive a high potential drive voltage (ELVDD) and a low potential drive voltage (ELVSS) from the power management circuits 800 and 800A.
[0069] FIG. 6 is an equivalent circuit diagram showing the configuration of each sub-pixel according to an embodiment.
[0070] 6, the pixel circuit of each subpixel 10B may include a light-emitting element (EL), a driving TFT (DT) that supplies current to the light-emitting element (EL), a plurality of TFTs (T1 to T6), and a storage capacitor (Cst). The TFT of each pixel circuit may be a TFT using any one of a polysilicon semiconductor, an amorphous silicon semiconductor, and an oxide semiconductor.
[0071] For example, the drive TFT (DT) and the TFTs (T1 to T6) can be configured by P-type channel polysilicon TFTs using polysilicon with high mobility.
[0072] Meanwhile, the driving TFT (DT) and TFTs (T1 to T3, T5 to T6) are composed of P-type channel polysilicon TFTs, and the compensation TFT (T4), which connects the driving TFT (DT) to a diode structure, can be composed of an N-type channel oxide TFT using an oxide semiconductor with a smaller leakage current than polysilicon. During low-speed driving, when the screen update speed is relatively slow, the fourth switching TFT (T4) can block leakage current to prevent flicker.
[0073] The light emitting element (EL) may include an anode connected to the drain electrode of the driving TFT (DT) via the light emitting control TFT (T5), a cathode connected to the second power supply line 110 that supplies the second power supply voltage (ELVSS), and an organic light emitting layer between the anode and the cathode. The light emitting element (EL) can emit light with a brightness proportional to the current value of the driving current supplied from the driving TFT (DT).
[0074] The compensation TFT (T4) is controlled by the first gate line 104 and can connect a second node (N2) connected to the gate electrode of the driving TFT (DT) with a third node (N3) connected to the drain electrode of the driving TFT (DT). The compensation TFT (T4) is turned on by a gate-on voltage of a first gate signal (SC1[n]) supplied via the first gate line 104, and connects the gate electrode and drain electrode of the driving TFT (DT), thereby connecting the driving TFT (DT) in a diode structure. The first gate line 104 can be arranged on two row lines, i.e., the n-1th and nth row lines (n is an integer greater than or equal to 2), thereby reducing the size of the gate driver 300 to be built into the bezel area of the display panel 100 and the size of the bezel.
[0075] The switching TFT (T1) is controlled by the second gate line 105 and can connect the data line 102 to a first node (N1) connected to the source electrode of the driving TFT (DT). The switching TFT (T1) is turned on by the gate-on voltage of the second gate signal (SC2[n]) supplied via the second gate line 105 and can supply the data voltage (Vdata) supplied via the data line 102 to the source electrode of the driving TFT (DT).
[0076] The operation control TFT (T2) is controlled by the light emitting control line 111 and can connect the first power supply line (ELVDD) to a first node (N1) connected to the source electrode of the driving TFT (DT). The operation control TFT (T2) is turned on by a gate-on voltage of the light emitting control signal (EM[n]) supplied via the light emitting control line 111 and can supply the first power supply voltage (ELVDD) supplied via the first power supply line 103 to the source electrode of the driving TFT (DT).
[0077] The emission control TFT (T5) is controlled by an emission control line 111, and can connect a third node (N3) connected to the drain electrode of the driving TFT (DT) with a fourth node (N4) connected to the anode electrode of the light-emitting element (EL). The emission control TFT (T5) is turned on by a gate-on voltage of an emission control signal (EM[n]) supplied via the emission control line 111, and can connect the drain electrode of the driving TFT (DT) with the anode electrode of the light-emitting element (EL).
[0078] The first initialization TFT (T3) is controlled by the third gate line 106, and can connect a third node (N3) connected to the drain electrode of the driving TFT (DT) to the first initialization line 108. The first initialization TFT (T3) is turned on by a gate-on voltage of a third gate signal (SC3[n]) supplied via the third gate line 106, and can supply a first initialization voltage (Vini) supplied via the first initialization line 108 to the third node (N3) connected to the drain electrode of the driving TFT (DT).
[0079] The second initialization TFT (T6) is controlled by the fourth gate line 107 and may connect the second initialization line 109 to a fourth node (N4) connected to the anode of the light-emitting element (EL). The second initialization TFT (T6) is turned on by a gate-on voltage of a fourth gate signal (SC3[n+1]) supplied via the fourth gate line 107 and may supply a second initialization voltage (VAR, anode reset voltage) supplied via the second initialization line 109 to the fourth node (N4) connected to the anode electrode of the light-emitting element (LED). The fourth gate line 107 may share the third gate line that supplies the third gate signal (SC3[n+1]) in the (n+1)th row line (n is a positive integer).
[0080] The storage capacitor Cst may be connected between the first power line 103 and a second node N2 connected to the gate electrode of the driving TFT DT. The storage capacitor Cst may be charged with a differential voltage between the first power voltage ELVDD supplied via the first power line 103 and the data voltage Vdata supplied to the second node N2. The data voltage Vdata may be supplied to the second node N2 from the data line 102 via the switching TFT T2, the driving TFT DT, and the compensation TFT T1. While the driving TFT DT is connected to the diode structure via the compensation TFT T4, the storage capacitor Cst may sample and store the threshold voltage Vth of the driving TFT DT and provide a data voltage (Vdata+Vth) compensated for the threshold voltage Vth to the gate electrode of the driving TFT DT. As a result, the storage capacitor (Cst) can be charged with a target voltage that is the difference between the first power supply voltage (ELVDD) and the data voltage (Vdata) for which the threshold voltage (Vth) of the driving TFT (DT) is compensated, and the charged target voltage can be provided as a driving voltage (Vgs) between the gate and source electrodes of the driving TFT (DT), thereby compensating for characteristic deviations of the driving TFT (DT) between sub-pixels.
[0081] The driving TFT (DT) controls the current (Ids) flowing through the light emitting element (EL) according to the driving voltage charged in the storage capacitor (Cst), thereby controlling the luminous intensity of the light emitting element (EL).
[0082] 6, the gate lines 104, 105, 106, and 107 can be driven by a gate driver 300, and the light-emitting control line 111 can be driven by a light-emitting control driver built into the gate driver 300 and arranged in the bezel area of the display panel 100. The data voltage (Vdata) is supplied from the data driver 400, and the first power supply voltage (ELVDD), the second power supply voltage (ELVSS), the first initialization voltage (Vini), and the second initialization voltage (VAR) can be supplied from power management circuits 800 and 800A.
[0083] FIG. 7 is an exemplary view showing each pixel region according to an embodiment, and FIGS. 8A to 8C are views showing a comparison of the transmittance of a transparent display device according to a comparative example and the transparent display device according to the embodiment.
[0084] 7, a pixel area (PX) according to one embodiment may include a non-transmissive portion (NTA) disposed at the center in the second direction (X) and transmissive portions (TA) disposed on both sides of the non-transmissive portion (NTA) in the second direction (X). The non-transmissive portion (NTA) may include light-emitting areas (EA1-EA4) of R, G, W, and B sub-pixels (SP1, SP2, SP3, SP4) sequentially arranged parallel to each other in the first direction (Y). Pixel circuits of the R, G, W, and B sub-pixels (SP1, SP2, SP3, SP4) may be overlapped below the light-emitting areas (EA1-EA4).
[0085] The R, G, W, and B sub-pixels (SP1, SP2, SP3, and SP4) extend along the first direction (Y) on the left side of the non-transmissive portion (NTA) and may be individually connected to the first to fourth data lines (DL1 to DL4) arranged parallel to the second direction (X). The R, G, W, and B sub-pixels (SP1, SP2, SP3, and SP4) extend along the first direction (Y) on the right side of the non-transmissive portion (NTA) and may be commonly connected to the first power line (VDDL), the reference line (RL), and the second power line (VSSL), which are arranged parallel to the second direction (X). The R, G, W, and B sub-pixels (SP1, SP2, SP3, and SP4) may be commonly connected to the gate line (GL) extending in the second direction (X).
[0086] Referring to Figures 8A to 8C, it can be seen that the transmittance (55%) of the pixel region (PX) according to one embodiment having a vertical array structure in which the light-emitting areas (EA) of the four-color (R, G, W, B) sub-pixels are arranged parallel to the vertical direction as shown in Figure 8C is improved compared to the transmittance (45%) of the pixel region (PX) according to the comparative example in which the light-emitting areas (EA) of the four-color (R, G, W, B) sub-pixels are arranged in a matrix form as shown in Figures 8A and 8B.
[0087] FIG. 9 is a diagram illustrating the color bleeding phenomenon depending on the arrangement order of three-color subpixels according to a comparative example, FIGS. 10A to 11C are diagrams showing the edge artifact phenomenon of a transparent display device according to a comparative example, FIGS. 12A to 12C are diagrams showing the edge artifact improvement effect of a transparent display device according to an embodiment, FIGS. 13A to 15B are diagrams showing the edge artifact phenomenon of a transparent display device according to a comparative example, and FIGS. 16A and 16B are diagrams showing the edge artifact improvement effect of a transparent display device according to an embodiment.
[0088] 9, it can be seen that in a basic stripe structure of three-color (R, G, B) subpixels, an RGB array structure in which the G subpixel is arranged in the center can excellently display a white line without color bleeding. On the other hand, when a white line is displayed using a GBR array structure in which the G subpixel is arranged offset to the left, red bleeding may occur at the right end of the white line, and when a white line is displayed using a BRG array structure in which the G subpixel is arranged offset to the right, blue bleeding occurs at the left end of the white line. It can be seen that color bleeding is more noticeable when the R and G subpixels are separated by another subpixel (B), as in the GBR array structure.
[0089] 10A-10C, 13A, and 13B, in a comparative display device using a comparative pixel region (PXa) in which R / W / B / G subpixels are arranged in order vertically as in Figures 10A and 13A, the G subpixel is not centrally located in the pixel region (PXa), but the R and G subpixels are spaced apart with the W and B subpixels sandwiched between them. As a result, in the comparative display device, dark lines (BL) and bright lines (WL) may occur at the edges of character patterns (G, D) displayed in green on a white pattern as in Figure 10B, or red color bleeding (CFL) may occur at the edges of a line pattern displayed in yellow as in Figure 10C, or edge artifacts such as bright lines, dark lines, and color bleeding may occur at the edges of box patterns of various colors as in Figure 13B.
[0090] 11A-11C, 14A, and 14B, in a comparative display device using a comparative pixel region (PXb) in which R / G / B / W subpixels are arranged in order vertically as in FIGS. 11A and 14A, the W subpixel is not centrally located in the pixel region (PXb). As a result, in the comparative display device, dark lines (BL) and bright lines (WL) may occur at the edges of character patterns (G, D) displayed in green on a white pattern as in FIG. 11B, or artifacts such as bright and dark lines may occur at the edges of various color patterns as in FIG. 14B. However, because the R and G subpixels are adjacently arranged in the pixel region (PXb), the comparative display device does not exhibit color bleeding artifacts in the yellow line pattern as in FIG. 10C.
[0091] 12A to 12C, 16A, and 16B, in a display device according to an embodiment using a pixel region (PX) according to an embodiment in which R / G / W / B subpixels are sequentially arranged in the vertical direction as shown in Figures 12A and 16A, it can be seen that the G and W subpixels are centrally arranged in the pixel region (PX) and the R and G subpixels are adjacently arranged. Therefore, in the display device according to an embodiment, dark line and bright line artifacts do not occur at the edge of the character pattern (G, D) displayed in green on the white pattern as shown in Figure 12B, color bleeding artifacts do not occur in the yellow line pattern as shown in Figure 12C, and edge artifacts such as bright lines, dark lines, and color bleeding do not occur at the edge of various color patterns as shown in Figure 16B.
[0092] 15A and 15B, in a comparative example display device using a comparative example pixel region (PXc) in which R / W / G / B subpixels are arranged in order in the vertical direction as shown in Fig. 15A, the R and G subpixels are spaced apart with a W subpixel sandwiched between them in the pixel region (PXc). As a result, the comparative example display device exhibits edge artifacts such as color bleeding at the edges of various color patterns as shown in Fig. 15B.
[0093] As described above, in the transparent display device according to one embodiment, among the four color sub-pixels in the non-transmissive region of each pixel region, the green and white sub-pixels are arranged in the center of the non-transmissive region, and the red and green sub-pixels are arranged adjacent to each other, thereby improving image quality by improving edge artifacts such as bright lines, dark lines, and color bleeding.
[0094] A transparent display device according to an embodiment includes red / green / white / blue or blue / white / green / red sub-pixels arranged vertically in parallel in the non-transmissive area of each pixel area, thereby improving image quality by reducing edge artifacts such as bright lines, dark lines, and color bleeding, and also achieving low power consumption by increasing the transmissive area and improving transmittance.
[0095] A transparent display device according to one embodiment includes a plurality of pixel regions including non-transmissive regions and transmissive regions, and the non-transmissive region of each pixel region includes a first subpixel, a second subpixel, a third subpixel, and a fourth subpixel arranged in order in a first direction, wherein one of the second and third subpixels is a green subpixel and the remaining one is a white subpixel, and when the second subpixel is a green subpixel, the first subpixel is a red subpixel, and when the third subpixel is a green subpixel, the fourth subpixel is a red subpixel.
[0096] In the transparent display device according to an embodiment, the first to fourth sub-pixels may be a red sub-pixel, a green sub-pixel, a white sub-pixel, and a blue sub-pixel arranged in order in a first direction.
[0097] In the transparent display device according to an embodiment, the first to fourth sub-pixels may be a blue sub-pixel, a white sub-pixel, a green sub-pixel, and a red sub-pixel arranged in order in a first direction.
[0098] In each pixel area of the transparent display device according to an embodiment, the transmissive area can be located on the left or right side of the non-transmissive area, or on both sides of the non-transmissive area.
[0099] A transparent display device according to one embodiment may include a plurality of pixel regions including non-transmissive regions and transmissive regions, and the non-transmissive regions of each pixel region may include red sub-pixels, green sub-pixels, white sub-pixels, and blue sub-pixels arranged in a vertical direction.
[0100] A transparent display device according to one embodiment may include a plurality of pixel regions including non-transmissive regions and transmissive regions, and the non-transmissive regions of each pixel region may include blue sub-pixels, white sub-pixels, green sub-pixels, and red sub-pixels arranged in a vertical direction.
[0101] The transparent display device according to the present specification may be applied to various electronic devices, such as mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, navigation systems, vehicle navigation systems, vehicle display devices, televisions, wallpaper display devices, signage devices, and home appliances.
[0102] The features, structures, effects, etc. described in the various examples of this specification are included in at least one example of this specification and are not necessarily limited to one example. Furthermore, the features, structures, effects, etc. exemplified in at least one example of this specification can be combined or modified in other examples by a person skilled in the art to which the technical ideas of this specification belong. Therefore, content related to such combinations and modifications should be interpreted as being included in the technical scope or scope of rights of this specification.
[0103] The present specification described above is not limited by the above-mentioned examples and the attached drawings, and various substitutions, modifications, and alterations are possible within the scope of the technical subject matter of the present specification, which will be apparent to those skilled in the art to which the present specification pertains. Therefore, the scope of the present specification is defined by the claims below, and all modifications and alterations derived from the meaning, scope, and equivalent concepts of the claims should be construed as being included in the scope of the present specification. [Explanation of symbols]
[0104] 100: Display panel 200: Panel driver 300: Gate driver 400: Data driver 500: Display driver 600: Timing controller 700: Gamma voltage generator 800, 800A: Power management circuit 1000, 1000A: Display device 1100: Shade 1200: Shade plate drive unit
Claims
1. a display area in which a plurality of pixel areas having non-transmissive areas and transmissive areas are arranged; the non-transmitting region of each of the plurality of pixel regions includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel arranged in order in a first direction; one of the second and third subpixels is a green subpixel and the other is a white subpixel; when the second subpixel is a green subpixel, the first subpixel is a red subpixel; A transparent display device, wherein when the third sub-pixel is a green sub-pixel, the fourth sub-pixel is a red sub-pixel.
2. The transparent display device of claim 1 , wherein the first to fourth sub-pixels are a red sub-pixel, a green sub-pixel, a white sub-pixel, and a blue sub-pixel arranged in the first direction.
3. The transparent display device of claim 1 , wherein the first to fourth sub-pixels are a blue sub-pixel, a white sub-pixel, a green sub-pixel, and a red sub-pixel arranged in the first direction.
4. In each of the pixel regions, The transparent display device according to claim 1 , wherein the transmissive region is disposed on the left side or the right side of the non-transmissive region, or on both the left and right sides of the non-transmissive region.
5. a display area in which a plurality of pixel areas having non-transmissive areas and transmissive areas are arranged; A transparent display device, wherein the non-transmissive region of each of the plurality of pixel regions includes a red subpixel, a green subpixel, a white subpixel, and a blue subpixel arranged in vertical order.
6. In each pixel region, The transparent display device according to claim 5 , wherein the transmissive region is disposed on the left side or the right side of the non-transmissive region, or on both the left and right sides of the non-transmissive region.
7. a display area in which a plurality of pixel areas having non-transmissive areas and transmissive areas are arranged; A transparent display device, wherein the non-transmissive region of each of the plurality of pixel regions includes a blue subpixel, a white subpixel, a green subpixel, and a red subpixel arranged in vertical order.
8. In each pixel region, The transparent display device according to claim 7 , wherein the transmissive region is disposed on the left side or the right side of the non-transmissive region, or on both the left and right sides of the non-transmissive region.
Citation Information
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