Display device, display module, electronic appliance, and manufacturing method for display device

Abstract

To provide a manufacturing method for a novel display device with excellent convenience, usefulness, or reliability.SOLUTION: A manufacturing method for a display device including a first light-emitting device and a second light-emitting device is provided. The first light-emitting device includes a first electrode, a second electrode, a first unit, and a first layer. The first unit includes a first light-emitting material and a first side surface, and the first layer includes a carrier injection material. Since a step of reducing the outer shape of the first unit is included, the concentration of the carrier injection material is higher in the first layer than in the first side surface. The second light-emitting device includes a third electrode, a fourth electrode, a second unit, and a second layer. The third electrode is adjacent to the first electrode, the second unit includes a second side surface, and the second layer includes a carrier injection material. Since a step of reducing the outer shape of the second unit is included, the concentration of the carrier injection material is higher in the second layer than in the second side surface.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a display device, a display module, an electronic device, or a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. The technical field of one embodiment of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification include information processing devices, semiconductor devices, memory devices, driving methods thereof, and manufacturing methods thereof. [Background technology]

[0003] In recent years, there has been a demand for higher definition display panels. Devices requiring high-definition display panels include, for example, smartphones, tablet devices, and notebook computers. Furthermore, with the rise in resolution, stationary display devices such as televisions and monitors also require higher definition. Furthermore, devices requiring the highest definition include, for example, devices for virtual reality (VR) or augmented reality (AR).

[0004] Representative examples of display devices that can be applied to display panels include liquid crystal display devices, organic EL (Electro Luminescence) elements, light-emitting devices equipped with light-emitting elements such as light-emitting diodes (LEDs: Light Emitting Diodes), and electronic paper that displays using an electrophoresis method or the like.

[0005] For example, the basic structure of an organic EL element is a layer containing a light-emitting organic compound sandwiched between a pair of electrodes. By applying a voltage to this element, light can be emitted from the light-emitting organic compound. A display device using such an organic EL element does not require a backlight, which is necessary in liquid crystal display devices and the like, and therefore can realize a thin, lightweight, high-contrast, and low-power display device. For example, an example of a display device using an organic EL element is described in Patent Document 1.

[0006] Patent Document 2 discloses a display device for VR that uses organic EL elements. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-324673 [Patent Document 2] International Publication No. 2018 / 087625 Summary of the Invention [Problem to be solved by the invention]

[0008] An object of one embodiment of the present invention is to provide a novel display device with excellent convenience, usefulness, or reliability.An object of one embodiment of the present invention is to provide a novel display module with excellent convenience, usefulness, or reliability.An object of one embodiment of the present invention is to provide a novel electronic device with excellent convenience, usefulness, or reliability.An object of one embodiment of the present invention is to provide a novel display device, a novel display module, a novel electronic device, or a novel semiconductor device.

[0009] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0010] (1) One embodiment of the present invention is a method for manufacturing a display device including first to sixth phases.

[0011] In a first phase, a first electrode, a second electrode, and a first gap are formed on an insulating layer, with the first gap sandwiched between the first electrode and the second electrode.

[0012] In step 1 of the second phase, a first film is formed on the first electrode and the second electrode.

[0013] In step 2 of the second phase, a second film is formed on the first film.

[0014] In step 3 of the second phase, a third film is formed on the second film.

[0015] In step 4 of the second phase, a fourth film is formed on the third film.

[0016] In step 5 of the second phase, the fourth film is removed from above the second electrode using photolithography to form a first layer that overlaps the first electrode.

[0017] In step 6 of the second phase, the third film and the second film are removed from the second electrode using an etching method to form a second layer, a first unit, and a third layer, where the second layer is sandwiched between the first layer and the first electrode, and the first unit is sandwiched between the second layer and the first electrode.

[0018] In step 1 of the third phase, a fifth film is formed on the first layer and the second electrode.

[0019] In step 2 of the third phase, a sixth film is formed on the fifth film.

[0020] In step 3 of the third phase, a seventh film is formed on the sixth film.

[0021] In step 4 of the third phase, an eighth film is formed on the seventh film.

[0022] In step 5 of the third phase, photolithography is used to remove the eighth film from over the first layer and form a fourth layer that overlaps the second electrode.

[0023] In step 6 of the third phase, a fourth layer and an etching method are used to remove the seventh and sixth films from the first layer and the first gap, forming a fifth layer, a second unit, a sixth layer, and a second gap, where the fifth layer is sandwiched between the fourth layer and the second electrode, the second unit is sandwiched between the fifth layer and the second electrode, and the second gap overlaps the first gap.

[0024] In step 1 of the fourth phase, the ninth film is formed, and then a photoresist is formed.

[0025] In step 2 of the fourth phase, a seventh layer and an eighth layer are formed using photoresist and etching, where the seventh layer overlaps the first electrode and has a smaller profile than the first layer, and the eighth layer overlaps the second electrode and has a smaller profile than the fourth layer.

[0026] In step 3 of the fourth phase, the seventh layer, the eighth layer and the etching process are used to reduce the profile of the first layer and the profile of the fourth layer.

[0027] In step 4 of the fourth phase, the first layer, the fourth layer, and the second layer, the fifth layer, the first unit, the second unit, the third layer, and the sixth layer are reduced in profile using etching techniques.

[0028] In step 5 of the fourth phase, the first and fourth layers are removed using an etching process.

[0029] In step 1 of the fifth phase, a ninth layer is formed. The ninth layer contacts the insulating layer in the first gap and covers the first unit and the second unit.

[0030] In step 2 of the fifth phase, a tenth layer is formed. The tenth layer fills the first gap and the second gap. The tenth layer also has a first opening overlapping the first electrode and a second opening overlapping the second electrode.

[0031] In step 3 of the fifth phase, a tenth layer and etching method is used to remove the ninth layer and the second layer that overlap the first opening and to remove the ninth layer and the fifth layer that overlap the second opening.

[0032] In step 1 of the sixth phase, an eleventh layer is formed on the first unit and the second unit.

[0033] In step 2 of the sixth phase, a conductive film is formed on the eleventh layer.

[0034] This allows, for example, the carrier injection material attached to the first side surface in step 1 of the third phase to be removed in step 4 of the fourth phase. Furthermore, it is possible to suppress the current flowing between the first electrode and the third electrode along the first side surface. Furthermore, it is possible to suppress the current flowing between the second electrode and the fourth electrode along the second side surface. Furthermore, it is possible to reduce the current that does not contribute to the light emission of the first light-emitting device or the second light-emitting device. Furthermore, it is possible to increase the current efficiency related to the light emission of the display device. As a result, it is possible to provide a novel method for manufacturing a display device that is highly convenient, useful, and reliable.

[0035] (2) Another embodiment of the present invention is the above-described method for manufacturing a display device, in which a tenth film is formed over the insulating layer in Step 1 of the first phase.

[0036] In step 2 of the first phase, a first electrode, a second electrode, and a first gap are formed on the tenth film. The first gap is sandwiched between the first electrode and the second electrode.

[0037] In step 5 of the fourth phase, the first, fourth, and tenth layers are removed using an etching method to form the twelfth, thirteenth, and third gaps. The twelfth layer is sandwiched between the first electrode and the insulating layer. The thirteenth layer is sandwiched between the second electrode and the insulating layer. The third gap overlaps the first gap.

[0038] As a result, in step 4 of the fourth phase, the outer shapes of the first unit and the second unit can be adjusted using an etching process using an oxygen-containing gas. Furthermore, by using the ninth film, the insulating layer can be protected from the etching process using the oxygen-containing gas. Furthermore, even if the ninth film is conductive, the formation of the third gap can prevent conduction between the first electrode and the second electrode. As a result, a novel method for manufacturing a display device that is highly convenient, useful, and reliable can be provided.

[0039] (3) One embodiment of the present invention is a display device including a first light-emitting device, a second light-emitting device, and an insulating layer.

[0040] The first light-emitting device includes a first electrode, a second electrode, a first unit, and a first layer, the first electrode being formed on an insulating layer, the first unit being sandwiched between the first electrode and the second electrode, the first unit including a first light-emitting material, and the first unit having a first side.

[0041] The first layer is sandwiched between the first electrode and the first unit, the first layer contacts the first electrode, the first layer includes a carrier injection material, and the first layer has a higher concentration of the carrier injection material than the first side.

[0042] The second light-emitting device includes a third electrode, a fourth electrode, a second unit, and a second layer. The third electrode is formed on the insulating layer, and the third electrode is adjacent to the first electrode, with a first gap between the third electrode and the first electrode. The second unit is sandwiched between the second layer and the fourth electrode, and includes a second light-emitting material. The second unit is disposed with a second gap between the second unit and the first unit, with the second gap overlapping the first gap. The second unit also includes a second side surface, which faces the first side surface.

[0043] The second layer is sandwiched between the third electrode and the second unit, the second layer contacts the third electrode, the second layer is disposed with a third gap between the second layer and the first layer, and the third gap overlaps with the first gap. The second layer also includes a carrier injection material, and the second layer has a higher concentration of the carrier injection material than the second side.

[0044] This makes it possible to suppress the current flowing between the first electrode and the second electrode through the first side surface. It also makes it possible to suppress the current flowing between the third electrode and the fourth electrode through the second side surface. It also makes it possible to reduce the current that does not contribute to the light emission of the first light-emitting device or the second light-emitting device. It also makes it possible to increase the current efficiency related to the light emission of the display device. As a result, it is possible to provide a novel display device that is highly convenient, useful, and reliable.

[0045] (4) Another embodiment of the present invention is the above display device, in which the insulating layer has a lower etching rate in etching treatment using a gas containing oxygen than the first unit.

[0046] This allows the outer shapes of the first unit and the second unit to be adjusted by etching using an oxygen-containing gas. Furthermore, the carrier injection material adhering to the first side surface or the second side surface can be removed, resulting in a state closer to cleanness. Furthermore, the insulating layer can be protected from the etching using an oxygen-containing gas. As a result, a novel display device with excellent convenience, usefulness, and reliability can be provided.

[0047] (5) Another embodiment of the present invention is the above display device including a third layer and a fourth layer.

[0048] The first electrode comprises a region sandwiched between the first layer and the third layer, and the third electrode comprises a region sandwiched between the second layer and the fourth layer.

[0049] The third layer has a region sandwiched between the first electrode and the insulating layer, and has a lower etching rate in an etching process using an oxygen-containing gas than the first unit, and is conductive.

[0050] The fourth layer includes a region sandwiched between the third electrode and the insulating layer, the fourth layer is adjacent to the third layer, and the fourth layer is disposed with a fourth gap between the fourth layer and the third layer, and the fourth layer includes the same material as the third layer.

[0051] This allows the outer shapes of the first unit and the second unit to be adjusted using an etching process using an oxygen-containing gas. Furthermore, the carrier injection material attached to the first side surface or the second side surface can be removed, resulting in a clean state. Furthermore, the insulating layer can be protected from the etching process using an oxygen-containing gas. Furthermore, the fourth gap can be used to prevent electrical conduction between the first electrode and the third electrode. As a result, a novel display device with excellent convenience, usefulness, and reliability can be provided.

[0052] (6) Another embodiment of the present invention is the above display device including the fifth layer, the sixth layer, and a conductive film.

[0053] The fifth layer overlaps the first gap and contacts the insulating layer, and the fifth layer includes a first opening and a second opening, the first opening overlaps the first electrode, and the second opening overlaps the third electrode.

[0054] The sixth layer fills the first gap and the second gap, and is sandwiched between the conductive film and the fifth layer. The sixth layer also has a third opening and a fourth opening, the third opening overlapping the first electrode, and the fourth opening overlapping the third electrode. The conductive film includes a second electrode and a fourth electrode.

[0055] (7) Another aspect of the present invention is a display module including the display device described above and at least one of a connector and an integrated circuit.

[0056] (8) Another embodiment of the present invention is an electronic device including the above-described display device and at least one of a battery, a camera, a speaker, and a microphone. [Effects of the Invention]

[0057] One embodiment of the present invention can provide a novel display device with excellent convenience, usefulness, or reliability. Alternatively, a novel display module with excellent convenience, usefulness, or reliability can be provided. Alternatively, a novel electronic device with excellent convenience, usefulness, or reliability can be provided. Alternatively, a novel display device, a novel display module, a novel electronic device, or a novel semiconductor device can be provided.

[0058] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0059] [Figure 1] 1A to 1C illustrate a structure of a display device according to an embodiment. [Figure 2] 2(A) and 2(B) are diagrams illustrating the configuration of a display device according to an embodiment. [Figure 3] 3A and 3B are diagrams illustrating the configuration of a display device according to an embodiment. [Figure 4] 4(A) and 4(B) are diagrams illustrating the configuration of a display device according to an embodiment. [Figure 5] 5(A) and 5(B) are diagrams illustrating the configuration of a display device according to an embodiment. [Figure 6] FIG. 6 is a flowchart illustrating a manufacturing method of a display device according to an embodiment. [Figure 7] 7A to 7C are diagrams illustrating a method for manufacturing a display device according to an embodiment. [Figure 8] 8A to 8C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 9] 9A to 9C are diagrams illustrating a method for manufacturing a display device according to an embodiment. [Figure 10] 10A to 10C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 11] 11A to 11C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 12] 12A to 12C are diagrams illustrating a method for manufacturing a display device according to an embodiment. [Figure 13]13A to 13C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 14] 14A to 14C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 15] 15A to 15C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 16] 16A to 16C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 17] 17A to 17C are diagrams illustrating a method for manufacturing a display device according to an embodiment. [Figure 18] 18A to 18C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 19] 19A to 19C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 20] 20A to 20C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 21] 21A to 21C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 22] 22A to 22C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 23] 23A to 23C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 24] 24A to 24C are diagrams illustrating a manufacturing method of a display device according to an embodiment. [Figure 25] 25(A) and 25(B) are diagrams illustrating the configuration of a display module according to an embodiment. [Figure 26] 26A to 26E are diagrams illustrating a configuration of a display device according to an embodiment. [Figure 27] FIG. 27 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 28] 28(A) and 28(B) are diagrams illustrating the configuration of a display device according to an embodiment. [Figure 29] FIG. 29 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 30] FIG. 30 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 31] FIG. 31 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 32] FIG. 32 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 33] FIG. 33 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 34] 34A to 34C are diagrams illustrating a configuration of a display device according to an embodiment. [Figure 35] FIG. 35 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 36] 36A to 36D are diagrams illustrating a structure of a display device according to an embodiment. [Figure 37] 37A to 37E are diagrams illustrating a configuration of a display device according to an embodiment. [Figure 38] FIG. 38 is a diagram illustrating a configuration of a display device according to an embodiment. [Figure 39] 39A to 39D illustrate the configuration of an electronic device according to an embodiment. [Figure 40] 40A to 40F are diagrams illustrating the configuration of an electronic device according to an embodiment. [Figure 41] 41A to 41G are diagrams illustrating the configuration of an electronic device according to an embodiment. [Figure 42] 42(A) to 42(C) are diagrams for explaining the structure of a workpiece according to the embodiment. [Figure 43] FIG. 43 is a diagram illustrating the current density-luminance characteristics of the light-emitting device according to the example. [Figure 44] FIG. 44 is a diagram illustrating the luminance-current efficiency characteristics of the light-emitting device according to the example. [Figure 45] FIG. 45 is a diagram illustrating the voltage-luminance characteristics of the light-emitting device according to the example. [Figure 46]FIG. 46 is a diagram illustrating the voltage-current density characteristics of the light-emitting device according to the example. [Figure 47] FIG. 47 is a diagram illustrating the emission spectrum of the light-emitting device according to the example. [Figure 48] FIG. 48 is a diagram illustrating the configuration of a workpiece according to an embodiment. [Figure 49] FIG. 49 is a diagram illustrating the current density-luminance characteristics of the light-emitting device according to the example. [Figure 50] FIG. 50 is a diagram illustrating the luminance-current efficiency characteristics of the light-emitting device according to the example. [Figure 51] FIG. 51 is a diagram illustrating the voltage-luminance characteristics of the light-emitting device according to the example. [Figure 52] FIG. 52 is a diagram illustrating the voltage-current density characteristics of the light-emitting device according to the example. [Figure 53] FIG. 53 is a diagram illustrating the emission spectrum of the light-emitting device according to the example. [Figure 54] FIG. 54 is a diagram illustrating the voltage-current density characteristics of the light-emitting device according to the example. [Figure 55] FIG. 55 is a diagram illustrating the current density-current efficiency characteristics of the light-emitting device fabricated in this example. [Figure 56] FIG. 56 is a diagram illustrating the current density-external quantum efficiency characteristics of the light-emitting device fabricated in this example. [Figure 57] FIG. 57 is a diagram illustrating the luminance-blue index characteristics of the light-emitting device fabricated in this example. DETAILED DESCRIPTION OF THE INVENTION

[0060] A manufacturing method of a display device according to one embodiment of the present invention is a manufacturing method of a display device including a first light-emitting device, a second light-emitting device, and an insulating layer. The first light-emitting device includes a first electrode, a second electrode, a first unit, and a first layer. The first electrode is formed on the insulating layer. The first unit is sandwiched between the first electrode and the second electrode. The first unit includes a first light-emitting material and has a first side surface. The first layer is sandwiched between the first electrode and the first unit, is in contact with the first electrode, and includes a carrier injection material. Since the manufacturing method includes a step of reducing the outer shape of the first unit, the first layer has a higher concentration of the carrier injection material than the first side surface. The second light-emitting device includes a third electrode, a fourth electrode, a second unit, and a second layer, wherein the third electrode is formed on an insulating layer, the third electrode is adjacent to the first electrode, and the third electrode is disposed with a first gap between it and the first electrode, the second unit is sandwiched between the second layer and the fourth electrode, the second unit includes a second light-emitting material, the second unit is disposed with a second gap between it and the first unit, the second gap overlaps the first gap, the second unit has a second side surface, and the second side surface faces the first side surface. The second layer is sandwiched between the third electrode and the second unit, the second layer is in contact with the third electrode, the second layer is disposed with a third gap between it and the first layer, the third gap overlaps the first gap, and the second layer includes a carrier injection material. Since the process includes reducing the outer shape of the second unit, the second layer has a higher concentration of carrier-injecting material than the second side.

[0061] This makes it possible to suppress the current flowing between the first electrode and the second electrode through the first side surface. It also makes it possible to suppress the current flowing between the third electrode and the fourth electrode through the second side surface. It also makes it possible to reduce the current that does not contribute to the light emission of the first light-emitting device or the second light-emitting device. It also makes it possible to increase the current efficiency related to the light emission of the display device. As a result, it is possible to provide a novel display device that is highly convenient, useful, and reliable.

[0062] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same parts or parts having similar functions will be denoted by the same reference numerals in different drawings, and repeated explanations will be omitted.

[0063] In the drawings accompanying this specification, components are classified by function and shown as block diagrams that are independent of each other, but in reality, it is difficult to completely separate components by function, and one component may be involved in multiple functions.

[0064] (Embodiment 1) In this embodiment, a display device of one embodiment of the present invention will be described with reference to FIGS.

[0065] Fig. 1A is a perspective view illustrating a structure of a display device according to one embodiment of the present invention, Fig. 1B is a front view of Fig. 1A, and Fig. 1C is a front view illustrating a part of Fig. 1A.

[0066] 2A is a cross-sectional view illustrating a structure of a display device of one embodiment of the present invention taken along the cutting line P1-P2 in FIG. 1C, and FIG. 2B is a cross-sectional view illustrating a structure different from that in FIG. 2A.

[0067] 3A is a cross-sectional view illustrating the structure of a display device of one embodiment of the present invention along the cutting line P1-P2 shown in FIG. 1C and the cutting line Q1-Q2 shown in FIG. 1B, and FIG. 3B is a cross-sectional view illustrating a part of FIG. 3A.

[0068] FIG. 4A is a cross-sectional view illustrating a configuration different from that of FIG. 3A, and FIG. 4B is a cross-sectional view illustrating a part of FIG. 4A.

[0069] FIG. 5(A) is a cross-sectional view illustrating a part of FIG. 3(A), and FIG. 5(B) is a cross-sectional view illustrating a part of FIG. 4(A).

[0070] <Display device configuration example 1> A display device 700 described in this embodiment includes a display region 731 and a conductive layer VCOM2 (see FIGS. 1A and 1B).

[0071] The display area 731 includes a set of pixels 703. The set of pixels 703 includes a pixel 702A, a pixel 702B, and a pixel 702C (see FIG. 1C).

[0072] The pixel 702A includes a light-emitting device 550A and a pixel circuit 530A, and the light-emitting device 550A is connected to the pixel circuit 530A (see FIGS. 2(A) and 2(B)). Note that in this specification, "connection" includes "electrical connection."

[0073] "A and B are electrically connected" means that, among the cases where A and B are connected without an insulator (where A and B are connected via a conductor or semiconductor, or where A and B are in contact), there is a time when an exchange of electrical signals or an interaction of electrical potential occurs between A and B during circuit operation. In other words, even if there is a time during circuit operation when an exchange of electrical signals or an interaction of electrical potential does not occur between A and B, if there is a time when an exchange of electrical signals or an interaction of electrical potential occurs between A and B, it can be said that "A and B are electrically connected."

[0074] Pixel 702B includes a light emitting device 550B and a pixel circuit 530B, where light emitting device 550B is electrically connected to pixel circuit 530B.

[0075] Pixel 702C includes a light emitting device 550C and a pixel circuit 530C, where light emitting device 550C is electrically connected to pixel circuit 530C.

[0076] The conductive layer VCOM2 is electrically connected to the light emitting device 550A, the light emitting device 550B, and the light emitting device 550C and supplies a common potential to them.

[0077] The display device 700 also includes a functional layer 520 , a substrate 510 and a layer 573 .

[0078] The functional layer 520 includes an insulating layer 521. The insulating layer 521 is sandwiched between the light-emitting device 550A and the pixel circuit 530A and has insulating properties.

[0079] Functional layer 520 also includes pixel circuit 530A, pixel circuit 530B, and pixel circuit 530C. Pixel circuit 530A is sandwiched between light-emitting device 550A and substrate 510, pixel circuit 530B is sandwiched between light-emitting device 550B and substrate 510, and pixel circuit 530C is sandwiched between light-emitting device 550C and substrate 510.

[0080] The layer 573 has an overlapping region overlapping with the insulating layer 521, and the overlapping region includes a display region 731 (see FIG. 1A). Note that the layer 573 sandwiches the light-emitting device 550A between itself and the insulating layer 521. For example, a material that transmits light emitted from the light-emitting device and has a refractive index of 1.8 or higher can be used for the layer 573. Alternatively, a film that is less permeable to impurities such as water or oxygen can be used for the layer 573. Specifically, a film containing nitrogen and silicon can be used for the layer 573.

[0081] The light-emitting device 550A of the display device 700 of one embodiment of the present invention emits light ELA in a direction where the pixel circuit 530A is not arranged, the light-emitting device 550B emits light ELB in a direction where the pixel circuit 530B is not arranged, and the light-emitting device 550C emits light ELC in a direction where the pixel circuit 530C is not arranged (see FIG. 2A). In other words, the display device 700 of one embodiment of the present invention is a top-emission display device.

[0082] Furthermore, the light-emitting device 550A of the display device 700 of one embodiment of the present invention emits light ELA in the direction in which the pixel circuit 530A is disposed, the light-emitting device 550B emits light ELB in the direction in which the pixel circuit 530B is disposed, and the light-emitting device 550C emits light ELC in the direction in which the pixel circuit 530C is disposed (see FIG. 2B). In other words, the display device 700 of one embodiment of the present invention is a bottom-emission display device.

[0083] <Display device configuration example 2> A display device 700 described in this embodiment includes a light-emitting device 550A, a light-emitting device 550B, a light-emitting device 550C, and an insulating layer 521 (see FIG. 3A).

[0084] For example, a configuration for emitting blue light can be applied to light-emitting device 550A, a configuration for emitting green light can be applied to light-emitting device 550B, and a configuration for emitting red light can be applied to light-emitting device 550C. This makes it possible to provide a side-by-side display device. Also, it is possible to provide a display device with high current efficiency.

[0085] Furthermore, for example, a configuration for emitting white light may be applied to light-emitting device 550A, light-emitting device 550B, and light-emitting device 550C, with a colored layer that transmits blue light being placed on top of light-emitting device 550A, a colored layer that transmits green light being placed on top of light-emitting device 550B, and a colored layer that transmits red light being placed on top of light-emitting device 550C.

[0086] Also, for example, a configuration for emitting blue light can be applied to light-emitting device 550A, light-emitting device 550B, and light-emitting device 550C, with a layer that converts blue light into green light being placed on top of light-emitting device 550B, and a layer that converts blue light into red light being placed on top of light-emitting device 550C.

[0087] The display device 700 also includes a conductive layer VCOM2, a layer ESE, a conductive film 552, a layer 105, and a functional layer 520 (see FIG. 3A).

[0088] A layer REFE can be disposed between the conductive layer VCOM2 and the insulating layer 521. For example, a material that can be used for a layer REFA, which will be described later, can be used for the layer REFE. In addition, the conductive layer VCOM2 has a region sandwiched between the conductive film 552 and the layer ESE. For example, a material that can be used for a layer ESA, which will be described later, can be used for the layer ESE.

[0089] The conductive film 552 is electrically connected to the conductive layer VCOM2 at a connection portion Con. The conductive film 552 includes an electrode 552A, an electrode 552B, and an electrode 552C. The layer 105 includes a layer 105A, a layer 105B, and a layer 105C.

[0090] The functional layer 520 includes an insulating layer 501, a pixel circuit, and an insulating layer 521. The pixel circuit is sandwiched between the insulating layer 501 and the insulating layer 521.

[0091] <Configuration Example 1 of Light-Emitting Device 550A> The light-emitting device 550A includes an electrode 551A, an electrode 552A, a unit 103A, and a layer 104A. The electrode 551A is formed on an insulating layer 521. A layer REFA can be disposed between the electrode 551A and the insulating layer 521. For example, a layer containing aluminum or a layer containing silver can be used for the layer REFA. This allows light emitted from the light-emitting device 550A toward the layer REFA to be efficiently reflected.

[0092] [Configuration example 1 of unit 103A] The unit 103A is sandwiched between the electrode 551A and the electrode 552A, and includes a light-emitting material EMA. For example, a fluorescent material, a phosphorescent material, or a material exhibiting thermally activated delayed fluorescence can be used as the light-emitting material EMA. The unit 103A also includes a side surface 103AS (see FIG. 5(A)).

[0093] Furthermore, a structure in which multiple layers are stacked can be used for the unit 103A. For example, a layer having hole transport properties, a layer containing the light-emitting material EMA, and a layer having electron transport properties can be used for the unit 103A. Note that a structure in which a layer containing the light-emitting material EMA is disposed in a region where holes and electrons recombine is preferred. For example, the layer having hole transport properties is disposed closer to the anode than the layer containing the light-emitting material EMA, and the layer having electron transport properties is disposed closer to the cathode than the layer containing the light-emitting material EMA. This allows the energy generated by carrier recombination to be efficiently converted into light and emitted.

[0094] [Configuration example of layer 104A] The layer 104A is sandwiched between the electrode 551A and the unit 103A, and the layer 104A is in contact with the electrode 551A (see FIG. 3A). The layer 104A also contains a carrier injection material CIM, and the concentration of the carrier injection material CIM is higher in the layer 104A than in the side surface 103AS (see FIG. 5A).

[0095] [Example 1 of carrier injectable material CIM] For example, when the electrode 551A functions as an anode, a material having hole injection properties can be used as the carrier injection material CIM, which allows the layer 104A to receive holes from the electrode 551A and transfer them to the unit 103A.

[0096] For example, the hole mobility is 1×10 when the square root of the electric field strength V / cm is 600. -3 cm 2 / Vs or less can be used for the layer 104A. 4 Ω cm or more 1×10 7 A film having an electrical resistivity of 5×10 Ω·cm or less can be used for the layer 104A. 4 Ω cm or more 1×10 7 It has an electrical resistivity of Ω·cm or less, and more preferably, 1×10 5 Ω cm or more 1×10 7 It has an electrical resistivity of less than Ω·cm.

[0097] Specifically, a substance having an electron-accepting property can be used for the layer 104A. Alternatively, a composite material containing a plurality of substances can be used for the layer 104A.

[0098] Organic and inorganic compounds can be used as the electron-accepting material. The electron-accepting material can extract electrons from the adjacent hole-transporting layer or the material having hole-transporting properties when an electric field is applied.

[0099] For example, a compound having an electron-withdrawing group (a halogen group or a cyano group) can be used as the electron-accepting substance. Note that organic compounds having electron-accepting properties are easy to vapor-deposit and form into films.

[0100] [Example 2 of carrier injectable material CIM] When the electrode 551A functions as a cathode, a material having an electron injection property can be used for the carrier injection material CIM, which allows the layer 104A to receive electrons from the electrode 551A and transfer them to the unit 103A.

[0101] Specifically, a substance having an electron-donating property can be used for the layer 104A. Alternatively, a composite material of a substance having an electron-donating property and a material having an electron-transporting property can be used for the layer 104A. Alternatively, an electride can be used for the layer 104A.

[0102] For example, alkali metals, alkaline earth metals, rare earth metals, or compounds thereof (oxides, halides, carbonates, etc.) can be used as electron-donating substances. Alternatively, organic compounds such as tetrathianaphthacene (abbreviated as TTN), nickelocene, and decamethylnickelocene can also be used as electron-donating substances.

[0103] [Example of the configuration of layer 105A] The layer 105A is sandwiched between the electrode 552A and the unit 103A, and the layer 105A is in contact with the electrode 552A (see FIG. 3A). The layer 105A also contains a material with carrier injection properties.

[0104] For example, when the electrode 552A functions as a cathode, a material having electron injection properties can be used for the layer 105A, which allows the layer 105A to receive electrons from the electrode 552A and transfer them to the unit 103A.

[0105] For example, when the electrode 552A functions as an anode, a material having hole injection properties can be used for the layer 105A, which allows the layer 105A to receive holes from the electrode 552A and transfer them to the unit 103A.

[0106] Configuration Example 1 of Light-Emitting Device 550B The light-emitting device 550B includes an electrode 551B, an electrode 552B, a unit 103B, and a layer 104B (see FIG. 3(A)).

[0107] Electrode 551B is formed on insulating layer 521. Electrode 551B is adjacent to electrode 551A, and electrode 551B is disposed with gap 551AB between electrode 551B and electrode 551A. Note that layer REFB can be disposed between electrode 551B and insulating layer 521. For example, the same material that can be used for layer REFA can be used for layer REFB.

[0108] [Configuration example 1 of unit 103B] The unit 103B is sandwiched between the layer 104B and the electrode 552B, and includes a light-emitting material EMB. Note that a material that can be used for the light-emitting material EMA can be used for the light-emitting material EMB. For example, a material that emits light of a different hue from the color of light emitted by the light-emitting material EMA can be used for the light-emitting material EMB.

[0109] Unit 103B is disposed with gap 103AB sandwiched between it and unit 103A. Gap 103AB overlaps gap 551AB. Unit 103B also has side surface 103BS (see FIG. 5(A)). Side surface 103BS faces side surface 103AS.

[0110] [Configuration example of layer 104B] The layer 104B is sandwiched between the electrode 551B and the unit 103B, and the layer 104B contacts the electrode 551B (see FIG. 3A). The layer 104B is disposed with a gap 104AB between it and the layer 104A, and the gap 104AB overlaps the gap 551AB. The layer 104B contains a carrier injection material CIM, and the layer 104B has a higher concentration of the carrier injection material CIM than the side surface 103BS (see FIG. 5A). The same carrier injection material that can be used for the layer 104A can be used for the layer 104B. For example, the concentration of the carrier injection material CIM contained in the layer 104B is preferably 10 times or more, more preferably 100 times or more, and even more preferably 1000 times or more, of the concentration of the carrier injection material CIM observed on the side surface 103BS.

[0111] [Configuration example of layer 105B] The layer 105B is sandwiched between the electrode 552B and the unit 103B and is in contact with the electrode 552B (see FIG. 3A). The layer 105B includes a carrier injecting material and includes the material that can be used for the layer 105A.

[0112] This makes it possible to suppress the current flowing between electrode 551A and electrode 552A through side surface 103AS. It also makes it possible to suppress the current flowing between electrode 551B and electrode 552B through side surface 103BS. It also makes it possible to reduce the current that does not contribute to the light emission of light-emitting device 550A or the light emission of light-emitting device 550B. It also makes it possible to increase the current efficiency related to the light emission of the display device. As a result, it is possible to provide a novel display device that is highly convenient, useful, and reliable.

[0113] <Configuration Example 1 of Light-Emitting Device 550C> The light-emitting device 550C includes an electrode 551C, an electrode 552C, a unit 103C, and a layer 104C (see FIG. 3A). The electrode 551B is formed on the insulating layer 521. Note that a layer REFC can be disposed between the electrode 551C and the insulating layer 521. For example, the material that can be used for the layer REFA can be used for the layer REFC.

[0114] [Configuration example 1 of unit 103C] The unit 103C is sandwiched between the layer 104C and the electrode 552C, and includes a light-emitting material. Note that a material that can be used for the light-emitting material EMA can be used for the unit 103C. For example, a material that emits light of a color different in hue from the color of light emitted by the light-emitting material EMA can be used for the unit 103C.

[0115] [Example of the configuration of layer 104C] The layer 104C is sandwiched between the electrode 551C and the unit 103C and is in contact with the electrode 551C (see FIG. 3A). Note that the carrier injecting material that can be used for the layer 104A can be used for the layer 104C.

[0116] [Example of the configuration of layer 105C] The layer 105C is sandwiched between the electrode 552C and the unit 103C, and is in contact with the electrode 552C (see FIG. 3A). The layer 105C includes a material with a carrier injection property and includes the material that can be used for the layer 105A.

[0117] [Configuration example of insulating layer 521] The insulating layer 521 has a lower etching rate in an etching process using a gas containing oxygen than the unit 103 A. For example, the insulating layer 521 can be made of silicon oxide, silicon nitride, aluminum oxide, or zirconium oxide.

[0118] This allows the outer shapes of the units 103A and 103B to be adjusted using an etching process using an oxygen-containing gas. Furthermore, the carrier injection material CIM adhering to the side surface 103AS or the side surface 103BS can be removed, bringing the surface closer to a clean state. Furthermore, the insulating layer 521 can be protected from the etching process using an oxygen-containing gas. As a result, a novel display device with excellent convenience, usefulness, and reliability can be provided.

[0119] <Configuration example 3 of the display device> Moreover, the display device 700 described in this embodiment has a layer ESA, a layer ESB, and a layer ESC (see FIG. 3(A)). Note that the electrode 551A has a region sandwiched between the layer 104A and the layer ESA, and the electrode 551B has a region sandwiched between the layer 104B and the layer ESB. Furthermore, the electrode 551C has a region sandwiched between the layer 104C and the layer ESC.

[0120] The layer ESA has a region sandwiched between the electrode 551A and the insulating layer 521, and has a lower etching rate in an etching process using a gas containing oxygen than the unit 103A. The layer ESA is also conductive.

[0121] The layer ESB has a region sandwiched between the electrode 551B and the insulating layer 521, the layer ESB is adjacent to the layer ESA, and the layer ESB is disposed with a gap ESAB between it and the layer ESA. The layer ESB also includes the same material as the layer ESA.

[0122] For example, tungsten, molybdenum, aluminum, titanium, or tantalum can be used for the layer ESA, the layer ESB, and the layer ESC. Also, for example, indium oxide-tin oxide (abbreviation: ITO), indium oxide-tin oxide containing silicon or silicon oxide (abbreviation: ITSO), indium oxide-zinc oxide (registered trademark: IZO), indium oxide-gallium oxide-zinc oxide (abbreviation: IGZO), or aluminum oxide-zinc oxide (abbreviation: AZO) can be used for the layer ESA, the layer ESB, and the layer ESC.

[0123] This allows the outer shapes of the units 103A and 103B to be adjusted using an etching process using an oxygen-containing gas. Furthermore, the carrier injection material CIM attached to the side surface 103AS or the side surface 103BS can be removed, resulting in a state closer to being clean. Furthermore, the insulating layer 521 can be protected from the etching process using an oxygen-containing gas. Furthermore, the gap ESAB can be used to prevent electrical conduction between the electrodes 551A and 551B. As a result, a novel display device with excellent convenience, usability, and reliability can be provided.

[0124] <Display device configuration example 4> The display device 700 described in this embodiment includes a layer 529_1, a layer 529_2, and a conductive film 552 (see FIG. 3A). The layer 529_1 overlaps with the gap 551AB and is in contact with the insulating layer 521.

[0125] The layer 529_1 has an opening 529_1A and an opening 529_1B (see FIG. 3B). The opening 529_1A overlaps with the electrode 551A, and the opening 529_1B overlaps with the electrode 551B.

[0126] The layer 529_2 fills the gaps 551AB and 103AB (see FIG. 3A). The layer 529_2 is sandwiched between the conductive film 552 and the layer 529_1 (see FIG. 5A).

[0127] The layer 529_2 has an opening 529_2A and an opening 529_2B (see FIG. 3B). The opening 529_2A overlaps with the electrode 551A, and the opening 529_2B overlaps with the electrode 551B. The conductive film 552 includes an electrode 552A and an electrode 552B (see FIG. 3A).

[0128] The display device 700 also has layers SCRA2, SCRB2, and SCRC2. The layer SCRA2 is sandwiched between the layer 529_1 and the unit 103A, the layer SCRB2 is sandwiched between the layer 529_1 and the unit 103B, and the layer SCRC2 is sandwiched between the layer 529_1 and the unit 103C.

[0129] <Display Device Configuration Example 5> In the present embodiment, the display device 700 described with reference to Figures 4(A), 4(B), and 5(B) differs from the display device described with reference to Figures 3(A), 3(B), and 5(A) in the configuration of the light-emitting device 550A and the configuration of the light-emitting device 550B. Here, the different parts will be described in detail, and the above description will be used for the similar configurations.

[0130] <<Configuration Example 2 of Light-Emitting Device 550A>> The light-emitting device 550A includes an electrode 551A, an electrode 552A, a unit 103A, an intermediate layer 106A, a unit 103A2, and a layer 104A (see FIG. 4A). The electrode 551A is formed on an insulating layer 521.

[0131] In other words, light-emitting device 550A has a plurality of stacked units between electrode 551A and electrode 552A. The number of stacked units is not limited to two, and three or more units may be stacked. A configuration including a plurality of stacked units sandwiched between electrode 551A and electrode 552A and intermediate layer 106A sandwiched between the plurality of units may be referred to as a stacked light-emitting device or a tandem light-emitting device.

[0132] This allows for high-luminance light emission while maintaining a low current density, improves reliability, reduces the driving voltage compared to the same luminance, and reduces power consumption.

[0133] [Configuration example 2 of unit 103A] The unit 103A is sandwiched between the electrode 551A and the electrode 552A, and includes a light-emitting material EMA. For example, a fluorescent material, a phosphorescent material, or a material exhibiting thermally activated delayed fluorescence can be used as the light-emitting material EMA. The unit 103A also includes a side surface 103AS (see FIG. 5(B)).

[0134] [Configuration example of Unit 103A2] The unit 103A2 is sandwiched between the unit 103A and the electrode 552A, and includes a light-emitting material (see FIG. 4(A)). Note that a material that can be used for the light-emitting material EMA can be used for the unit 103A2. For example, the same material can be used for the unit 103A and the unit 103A2. Furthermore, a material that emits light of the same hue as the color of light emitted by the light-emitting material EMA can be used for the unit 103A2. Furthermore, a material that emits light of a different hue from the color of light emitted by the light-emitting material EMA can be used for the unit 103A2.

[0135] [Example of middle layer 106A] The intermediate layer 106A has a function of supplying electrons to the anode side and holes to the cathode side when a voltage is applied, and can also be called a charge generation layer.

[0136] Intermediate layer 106A is sandwiched between unit 103A2 and unit 103A. Intermediate layer 106A has the function of injecting holes into one of unit 103A2 or unit 103A, and injecting electrons into the other. For example, when electrode 552A functions as a cathode, intermediate layer 106A supplies holes to unit 103A2 and electrons to unit 103A. Also, for example, when electrode 552A functions as an anode, intermediate layer 106A supplies electrons to unit 103A2 and holes to unit 103A.

[0137] For example, a stacked film can be used for the intermediate layer 106A. Specifically, a stacked film of a film containing a material having hole injection properties and a film containing a material having electron injection properties can be used for the intermediate layer 106A. Alternatively, a stacked film in which a film containing a material having a LUMO level in the range of −5.0 eV or higher, preferably −5.0 eV to −3.0 eV, is sandwiched between a film containing a material having hole injection properties and a film containing a material having electron injection properties can be used for the intermediate layer 106A.

[0138] <<Configuration Example 2 of Light-Emitting Device 550B>> The light-emitting device 550B includes an electrode 551B, an electrode 552B, a unit 103B, an intermediate layer 106B, a unit 103B2, and a layer 104B (see FIG. 4(A)).

[0139] [Configuration example 2 of unit 103B] The unit 103B is sandwiched between the layer 104B and the electrode 552B, and includes a light-emitting material EMB. Note that a material that can be used for the light-emitting material EMA can be used for the light-emitting material EMB. For example, a material that emits light of a different hue from the color of light emitted by the light-emitting material EMA can be used for the light-emitting material EMB.

[0140] Furthermore, unit 103B is disposed with gap 103AB sandwiched between it and unit 103A. Gap 103AB overlaps gap 551AB. Unit 103B also has side surface 103BS (see FIG. 5(B)). Side surface 103BS faces side surface 103AS.

[0141] [Configuration example of Unit 103B2] The unit 103B2 is sandwiched between the unit 103B and the electrode 552B, and includes a light-emitting material (see FIG. 4(A)). Note that a material that can be used for the light-emitting material EMB can be used for the unit 103B2. For example, the same material can be used for the unit 103B and the unit 103B2. Furthermore, a material that emits light of the same hue as the color of light emitted by the light-emitting material EMB can be used for the unit 103B2. Furthermore, a material that emits light of a different hue from the color of light emitted by the light-emitting material EMB can be used for the unit 103B2.

[0142] [Configuration example of intermediate layer 106B] The intermediate layer 106B is sandwiched between the unit 103B2 and the unit 103B. The intermediate layer 106B has the function of injecting holes into one of the unit 103B2 or the unit 103B, and injecting electrons into the other. For example, when the electrode 552B functions as a cathode, the intermediate layer 106B supplies holes to the unit 103B2 and electrons to the unit 103B. Also, for example, when the electrode 552B functions as an anode, the intermediate layer 106B supplies electrons to the unit 103B2 and holes to the unit 103B.

[0143] For example, the materials that can be used for the intermediate layer 106A can also be used for the intermediate layer 106B.

[0144] Intermediate layer 106B is disposed with gap 106AB sandwiched between it and intermediate layer 106A (see FIG. 4(A)). This suppresses the current flowing between intermediate layer 106B and intermediate layer 106A, and can prevent adjacent light-emitting devices from emitting light at an unintended luminance when the other is made to emit light. Also, adjacent light-emitting devices can be made to emit light independently. Also, crosstalk between light-emitting devices can be prevented. Also, a display device capable of displaying a wide color gamut can be provided.

[0145] <Configuration Example 2 of Light-Emitting Device 550C> The light-emitting device 550C includes an electrode 551C, an electrode 552C, a unit 103C, an intermediate layer 106C, a unit 103C2, and a layer 104C (see FIG. 4(A)).

[0146] [Configuration example 2 of unit 103C] Unit 103C is sandwiched between layer 104C and electrode 552C, and includes a light-emitting material. A material that can be used for light-emitting material EMA can be used for unit 103C. For example, a material that emits light of a color that is different in hue from the color of light emitted by light-emitting material EMA and different in hue from the color of light emitted by light-emitting material EMB can be used for unit 103C.

[0147] [Configuration example of Unit 103C2] The unit 103C2 is sandwiched between the unit 103C and the electrode 552C, and includes a light-emitting material (see FIG. 4A). The light-emitting material that can be used for the unit 103C can be used for the unit 103C2. For example, the same material can be used for the unit 103C and the unit 103C2. A material that emits light of the same hue as the color of light emitted by the light-emitting material that can be used for the unit 103C can be used for the unit 103C2. A material that emits light of a different hue from the color of light emitted by the light-emitting material that can be used for the unit 103C can also be used for the unit 103C2.

[0148] [Configuration example of intermediate layer 106C] The intermediate layer 106C is sandwiched between the unit 103C2 and the unit 103C. The intermediate layer 106C has the function of injecting holes into one of the unit 103C2 or the unit 103C, and injecting electrons into the other. For example, when the electrode 552C functions as a cathode, the intermediate layer 106C supplies holes to the unit 103C2 and electrons to the unit 103C. Also, for example, when the electrode 552C functions as an anode, the intermediate layer 106C supplies electrons to the unit 103C2 and holes to the unit 103C.

[0149] For example, the materials that can be used for intermediate layer 106A can be used for intermediate layer 106C.

[0150] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0151] (Embodiment 2) In this embodiment, a manufacturing method of a display device according to one embodiment of the present invention will be described with reference to FIGS.

[0152] <Example of a method for manufacturing the display device 700> The manufacturing method of a display device described in this embodiment mode includes the following phases from start to end (see FIG. 6).

[0153] Phase PH0 Phase PH0 is a phase in which a circuit board for the display device is formed.

[0154] In phase PH0, functional layer 520 is formed on substrate 510 (see FIG. 7). Functional layer 520 includes insulating layer 501 and insulating layer 521. Functional layer 520 also includes, for example, a pixel circuit or a drive circuit between insulating layer 501 and insulating layer 521.

[0155] Phase PH1 Phase PH1 is a phase in which the electrodes 551A, 551B, 551C, and the conductive layer VCOM2 are formed (see FIGS. 7 to 9).

[0156] [Step 1] In step 1 of phase PH1, a film ES is formed on the insulating layer 521 (see FIG. 7). For example, a film containing silicon nitride may be formed on the insulating layer 521 by using a CVD method and used as the film ES. Alternatively, for example, tungsten may be formed on the insulating layer 521 by using a sputtering method and used as the film ES.

[0157] Furthermore, layers REFA, REFB, REFC, and REFE are formed on insulating layer 521. For example, a film that will later become layers ESA, ESB, ESC, and ESE is formed on film ES using a sputtering method. Furthermore, a photoresist PR is formed, and layers REFA, REFB, REFC, and REFE are formed using a photolithography method. Specifically, a stacked film formed by stacking a film containing titanium, a film containing aluminum, and a film containing titanium can be used for layers REFA, REFB, REFC, and REFE.

[0158] Alternatively, without forming film ES, layers REFA, REFB, REFC, and REFE may be formed on insulating layer 521. In this case, layer REFA connects light-emitting device 550A to the pixel circuit, layer REFB connects light-emitting device 550B to the pixel circuit, and layer REFC connects light-emitting device 550C to the pixel circuit.

[0159] Furthermore, a conductive film 551 is formed over the layers REFA, REFB, REFC, and REFE (see FIG. 8). The conductive film 551 is formed by, for example, a sputtering method. Specifically, the conductive film 551 can be formed using indium oxide-tin oxide (abbreviation: ITSO) containing silicon or silicon oxide.

[0160] Note that the conductive film 551 may be formed on the insulating layer 521 without forming the film ES, the layer REFA, the layer REFB, the layer REFC, and the layer REFE.

[0161] [Step 2] In step 2 of phase PH1, a photoresist PR is formed on the conductive film 551, and an electrode 551A, an electrode 551B, and a gap 551AB are formed on the insulating layer 521 using photolithography (see FIG. 9). The gap 551AB is sandwiched between the electrode 551A and the electrode 551B. In addition, an electrode 551C and a conductive layer VCOM2 are formed.

[0162] Alternatively, the films that will later become the layers REFA, REFB, REFC, and REFE may be formed on the insulating layer 521, and then the conductive film 551 may be formed, followed by forming the layers REFA, REFB, REFC, REFE, the electrodes 551A, 551B, 551C, the gap 551AB, and the conductive layer VCOM2 using photolithography.

[0163] Phase PH2A Phase PH2A is a phase that forms part of light-emitting device 550A, specifically, layer 104A, unit 103A, intermediate layer 106A, and unit 103A2 (see FIGS. 10 to 13).

[0164] [Step 1] In step 1 of phase PH2A, a film 104a is formed on the electrode 551A and the electrode 551B (see FIG. 10). The film 104a is also formed on the electrode 551C and the conductive layer VCOM2. For example, the film 104a can be formed using a resistance heating method. Specifically, an organic compound can be vapor-deposited or co-deposited.

[0165] [Step 2] In step 2 of phase PH2A, film 103a is formed on film 104a. When a tandem configuration is applied to the light-emitting device, film 106a is formed on film 103a, and film 103a2 is formed on film 106a. For example, film 106a and film 103a2 can be formed using a resistance heating method. Specifically, organic compounds can be vapor-deposited or co-deposited.

[0166] [Step 3] In step 3 of phase PH2A, a film SCRa2 is formed on the film 103a (see FIG. 11). When a tandem configuration is applied to the light-emitting device, the film 106a and the film 103a2 are sandwiched between the film 103a and the film SCRa2. A shadow mask can be used to prevent the film 104a, the film 103a, the film 106a, and the film 103a2 from being formed on the conductive layer VCOM2.

[0167] For example, when a film containing aluminum oxide having a thickness of 30 nm is used as the film SCRa2, the film SCRa2 can be formed by using an atomic layer deposition (ALD) method.

[0168] [Step 4] In step 4 of phase PH2A, a film SCRa1 is formed on the film SCRa2. For example, when a 50-nm-thick film containing tungsten is used for the film SCRa1, the film SCRa1 can be formed by sputtering.

[0169] [Step 5] In step 5 of phase PH2A, a photoresist PR is formed on the film SCRa1, and the film SCRa1 is removed from the electrodes 551B and 551C using photolithography to form a layer SCRA1 overlapping the electrode 551A (see FIG. 12). For example, if a film containing tungsten is used for the film SCRa1, a gas containing sulfur hexafluoride (SF6) can be used to etch the film SCRa1.

[0170] [Step 6] In step 6 of phase PH2A, the layer SCRA1 and film SCRa2 and film 103a are removed from the electrodes 551B and 551C using an etching method, and a layer SCRA2, unit 103A, and layer 104A are formed on the electrode 551A (see FIG. 13). The layer SCRA2 is sandwiched between the layer SCRA1 and the electrode 551A. The unit 103A is sandwiched between the layer SCRA2 and the electrode 551A. When a tandem configuration is applied to the light-emitting device, an intermediate layer 106A and unit 103A2 are sandwiched between the unit 103A and the layer SCRA2.

[0171] For example, when a film containing aluminum oxide is used for the film SCRa2, a gas containing trifluoromethane (CHF), helium (He), and methane (CH) can be used to etch the film SCRa2. Also, when an organic compound is used for the film 103a, a gas containing oxygen can be used to etch the film 103a. The layer SCRA1 also functions as a hard mask.

[0172] Furthermore, the layer SCRE1 is formed in the step of forming the layer SCRA1, and the layer SCRE2 is formed in the step of forming the layer SCRA2. The layer SCRE1 overlaps the conductive layer VCOM2, and the layer SCRE2 is sandwiched between the layer SCRE1 and the conductive layer VCOM2.

[0173] It is also possible to form the layer SCRE1 in the step of forming the layer SCRB1, which will be described later, and form the layer SCRE2 in the step of forming the layer SCRB2. It is also possible to form the layer SCRE1 in the step of forming the layer SCRC1, which will be described later, and form the layer SCRE2 in the step of forming the layer SCRC2.

[0174] Phase PH2B Phase PH2B is a phase that forms part of light-emitting device 550B. Specifically, layer 104B, unit 103B, intermediate layer 106B, and unit 103B2 are formed (see FIGS. 14 and 15). Here, parts that use different methods will be described in detail, and parts that can use the same methods will be described by reference to the above description.

[0175] [Step 1] In step 1 of phase PH2B, the film 104b is formed on the layer SCRA1 and the electrode 551B (see FIG. 14). The film 104b is also formed on the electrode 551C and the conductive layer VCOM2. When the film 104b is formed, the material used for the film 104b adheres to a part of the light-emitting device 550A formed in phase PH2A. For example, if the film 104b is formed using a resistance heating method, the material used for the film 104b also adheres to the side surface of the unit 103A.

[0176] [Step 2] In step 2 of phase PH2B, film 103b is formed on film 104b. When a tandem structure is applied to the light-emitting device, film 106b is formed on film 103b, and film 103b2 is formed on film 106b.

[0177] [Step 3] In step 3 of phase PH2B, a film SCRb2 is formed on the film 103b. When a tandem configuration is applied to the light-emitting device, the film 106b and the film 103b2 are sandwiched between the film 103b and the film SCRb2. The material that can be used for the film SCRa2 can also be used for the film SCRb2.

[0178] [Step 4] In step 4 of phase PH2B, a film that will later become the layer SCRB1 is formed on the film SCRb2. Note that the materials that can be used for the film SCRa1 can also be used for the film that will later become the layer SCRB1.

[0179] [Step 5] In step 5 of phase PH2B, photoresist PR is formed on the film that will later become layer SCRB1, and unnecessary portions are removed from layer SCRB1 and electrode 551C using photolithography to form layer SCRB1 that overlaps electrode 551B. For example, if tungsten is used for layer SCRB1, a gas containing SF can be used for etching.

[0180] [Step 6] In step 6 of phase PH2B, the layer SCRB1 and the film SCRB2 and the film 103b are removed from the layer SCRA1 and the gap 551AB using an etching method, and the layer SCRB2, the unit 103B, and the layer 104B are formed on the electrode 551B (see FIG. 15). Also, the gap 103AB is formed on the gap 551AB. The layer SCRB2 is sandwiched between the layer SCRB1 and the electrode 551B. Also, the unit 103B is sandwiched between the layer SCRB2 and the electrode 551B, and the gap 103AB overlaps the gap 551AB. Note that when a tandem configuration is applied to the light-emitting device, the intermediate layer 106B and the unit 103B2 are sandwiched between the unit 103B and the layer SCRB2.

[0181] For example, when an aluminum oxide-containing film is used for the film SCRb2, a gas containing CHF, He, and CH can be used to etch the film SCRb2. Also, when an organic compound is used for the film 103b, a gas containing oxygen can be used to etch the film 103b. The layer SCRB1 also functions as a hard mask.

[0182] Phase PH2C Phase PH2C is a phase that forms part of light-emitting device 550C. Specifically, layer 104C, unit 103C, intermediate layer 106C, and unit 103C2 are formed (see FIGS. 16 and 17). Here, parts that use different methods will be described in detail, and parts that can use the same methods will be described by reference to the above description.

[0183] [Step 1] In step 1 of phase PH2C, the film 104c is formed on the layer SCRA1, the layer SCRB1, and the electrode 551C (see FIG. 16). The film 104c is also formed on the conductive layer VCOM2. When the film 104c is formed, the material used for the film 104c adheres to a part of the light-emitting device 550B formed in phase PH2B. For example, if the film 104c is formed using a resistance heating method, the material used for the film 104c also adheres to the side surface of the unit 103B.

[0184] [Step 2] In step 2 of phase PH2C, film 103c is formed on film 104c. When a tandem structure is applied to the light-emitting device, film 106c is formed on film 103c, and film 103c2 is formed on film 106c.

[0185] [Step 3] In step 3 of phase PH2C, a film SCRc2 is formed on the film 103c. When a tandem configuration is applied to the light-emitting device, the film 106c and the film 103c2 are sandwiched between the film 103c and the film SCRc2. The material that can be used for the film SCRa2 can also be used for the film SCRc2.

[0186] [Step 4] In step 4 of phase PH2C, a film that will later become the layer SCRC1 is formed on the film SCRc2. Note that the materials that can be used for the film SCRa1 can also be used for the film that will later become the layer SCRC1.

[0187] [Step 5] In step 5 of phase PH2C, photoresist PR is formed on the film that will later become layer SCRC1, and unnecessary portions are removed from layers SCRA1 and SCRB1 using photolithography to form layer SCRC1 that overlaps electrode 551C. For example, if tungsten is used for layer SCRC1, a gas containing SF can be used for etching.

[0188] [Step 6] In step 6 of phase PH2C, the layer SCRC1 and the film SCRC2 and the film 103c are removed from the layers SCRA1, SCRB1, and the gap 551AB using an etching method, and a layer SCRC2, a unit 103C, and a layer 104C are formed on the electrode 551C (see FIG. 17). The layer SCRC2 is sandwiched between the layer SCRC1 and the electrode 551C. The unit 103C is sandwiched between the layer SCRC2 and the electrode 551C. When a tandem configuration is applied to the light-emitting device, an intermediate layer 106C and a unit 103C2 are sandwiched between the unit 103C and the layer SCRC2.

[0189] For example, when an aluminum oxide-containing film is used for the film SCRc2, a gas containing CHF, He, and CH can be used to etch the film SCRc2. Also, when an organic compound is used for the film 103c, a gas containing oxygen can be used to etch the film 103c. The layer SCRc1 also functions as a hard mask.

[0190] Phase PH3 Phase PH3 is a phase for adjusting the outer shapes of unit 103A of light emitting device 550A, unit 103B of light emitting device 550B, and unit 103C of light emitting device 550C, and forming side surfaces (see FIGS. 18 to 21).

[0191] [Step 1] In step 1 of phase PH3, a film SCR3 is formed on layers SCRA1, SCRB1, and SCRC1, and then a photoresist PR is formed (see FIG. 18). The film SCR3 covers a portion of light-emitting device 550A formed in phase PH2A, a portion of light-emitting device 550B formed in phase PH2B, and a portion of light-emitting device 550C formed in phase PH2C. For example, the film SCR3 covers the side surfaces of unit 103A, unit 103B, and unit 103C. This prevents the solution containing the photosensitive polymer from coming into contact with unit 103A, unit 103B, or unit 103C when the photoresist PR is formed. This also prevents the solution containing the photosensitive polymer from dissolving a portion of unit 103A, a portion of unit 103B, or a portion of unit 103C.

[0192] For example, when a film containing aluminum oxide having a thickness of 30 nm is used as the film SCR3, the film SCR3 can be formed using the ALD method.

[0193] [Step 2] In step 2 of phase PH3, unnecessary portions are removed from the film SCR3 using photoresist PR and etching to form layers SCRA3, SCRB3, and SCRC3 (see FIG. 19). The layer SCRA3 overlaps the electrode 551A and has a smaller outer shape than the layer SCRA1. The layer SCRB3 overlaps the electrode 551B and has a smaller outer shape than the layer SCRB1. The layer SCRC3 overlaps the electrode 551C and has a smaller outer shape than the layer SCRC1. For example, if a film containing aluminum oxide is used for the film SCR3, a gas containing CHF, He, and CH can be used to etch the film SCR3.

[0194] [Step 3] In step 3 of phase PH3, the outer shape of the layer SCRA1, the outer shape of the layer SCRB1, and the outer shape of the layer SCRC1 are reduced using a photoresist PR and etching method or a layer SCRA3, a layer SCRB3, a layer SCRC3, and an etching method (see FIG. 19). For example, if a film containing tungsten is used for the layer SCRA1, the layer SCRB1, and the layer SCRC1, a gas containing SF6 can be used to etch the layer SCRA1, the layer SCRB1, and the layer SCRC1.

[0195] [Step 4] In step 4 of phase PH3, layers SCRA1, SCRB1, and SCRC1 are etched to reduce the outer shapes of layers SCRA2, SCRB2, SCRC2, unit 103A, unit 103B, unit 103C, layer 104A, layer 104B, and layer 104C (see FIG. 20). Furthermore, when a tandem configuration is applied to the light-emitting device, the outer shapes of intermediate layer 106A, intermediate layer 106B, intermediate layer 106C, unit 103A2, unit 103B2, and unit 103C2 are reduced. Furthermore, unnecessary portions are removed from conductive layer VCOM2. This allows the portion of unit 103A to which the material used for film 104b is attached to be removed. Furthermore, the portion of unit 103B to which the material used for film 104c is attached to be removed. When a tandem configuration is applied to the light-emitting device, the portion where the material used for film 104b is attached can be removed from intermediate layer 106A and unit 103A2, and the portion where the material used for film 104c is attached can be removed from intermediate layer 106B and unit 103B2.

[0196] If the same material is used for the layers SCRA3, SCRB3, SCRC3, SCRA2, SCRB2, and SCRC2, the etching method for that step can be used to remove unnecessary portions. For example, if aluminum oxide is used for the layers SCRA3, SCRB3, SCRC3, SCRA2, SCRB2, and SCRC2, a gas containing CHF3, He, and CH4 can be used to etch the layers SCRA3, SCRB3, SCRC3, SCRA2, SCRB2, and SCRC2. Furthermore, if an organic compound is used for the units 103A, 103B, and 103C, a gas containing oxygen can be used to etch the units 103A, 103B, and 103C. Furthermore, the layers SCRA1, SCRB1, and SCRC1 function as hard masks. Furthermore, when the film ES is formed on the functional layer 520, the film ES can protect the functional layer 520 from the etching process in this step.

[0197] [Step 5] In step 5 of phase PH3, the layers SCRA1, SCRB1, and SCRC1 are removed using an etching method (see FIG. 21). For example, if a tungsten-containing film is used for the layers SCRA1, SCRB1, and SCRC1, a gas containing SF can be used to etch the layers SCRA1, SCRB1, and SCRC1.

[0198] Furthermore, unnecessary portions are removed from film ES to form layers ESA, ESB, and gap ESAB. Furthermore, layers ESC and ESE are formed. Note that layer ESA is sandwiched between electrode 551A and insulating layer 521, and layer ESB is sandwiched between electrode 551B and insulating layer 521. Also, gap ESAB overlaps gap 551AB. For example, if a film containing tungsten is used for film ES, a gas containing SF6 can be used to etch film ES.

[0199] Phase PH4 Phase PH4 is a phase for forming a layer 529_1 and a layer 529_2 (see FIGS. 22 and 23).

[0200] [Step 1] In step 1 of phase PH4, a layer 529_1 is formed (see FIG. 22). The layer 529_1 contacts the insulating layer 521 at the gap 551AB and covers the unit 103A and the unit 103B. It also covers the unit 103C. Note that when a tandem configuration is applied to the light-emitting device, the layer 529_1 covers the intermediate layer 106A, the intermediate layer 106B, the intermediate layer 106C, the unit 103B2, and the unit 103C2.

[0201] For example, when a film containing aluminum oxide is used for the layer 529_1, the layer 529_1 can be formed by an ALD method.

[0202] [Step 2] In step 2 of phase PH4, a layer 529_2 is formed. The layer 529_2 fills the gaps 551AB and 103AB. The layer 529_2 also includes an opening 529_2A overlapping the electrode 551A and an opening 529_2B overlapping the electrode 551B. The layer 529_2 also includes an opening 529_2C overlapping the electrode 551C and an opening 529_2E overlapping the conductive layer VCOM2.

[0203] For example, a photosensitive polymer can be used for the layer 529_2. Specifically, a film containing a photosensitive polymer is formed by spin coating, and openings 529_2A, 529_2B, 529_2C, and 529_2E are formed by photolithography.

[0204] [Step 3] In step 3 of phase PH4, the layer 529_2 is etched using a wet etching method to remove the layer 529_1 and the layer SCRA2 overlapping the opening 529_2A, and the layer 529_1 and the layer SCRB2 overlapping the opening 529_2B (see FIG. 23). The layer 529_1 and the layer SCRC2 overlapping the opening 529_2C are also removed, and the layer 529_1 overlapping the opening 529_2E is also removed. For example, if aluminum oxide is used for the layer 529_1, the layer SCRA2, the layer SCRB2, and the layer SCRC2, an aqueous solution containing hydrofluoric acid (HF) can be used for etching.

[0205] The layer 529_2 can be softened and fluidized by, for example, heating the workpiece WP on which the layer 529_2 is formed.

[0206] Phase PH5 Phase PH5 is a phase in which the layer 105 and the conductive film 552 are formed (see FIG. 24).

[0207] [Step 1] In step 1 of phase PH5, a layer 105 is formed on the unit 103A, the unit 103B, the unit 103C, and the conductive layer VCOM2 (see FIG. 24). When a tandem configuration is applied to the light-emitting device, the layer 105 is formed on the unit 103A2, the unit 103B2, and the unit 103C2.

[0208] [Step 2] In step 2 of phase PH5, a conductive film 552 is formed on the layer 105. For example, the conductive film 552 can be formed by a resistance heating method. Specifically, a film containing silver and magnesium can be co-evaporated. Alternatively, a film containing indium oxide-tin oxide (abbreviated as ITO) can be stacked on the film containing silver and magnesium by a sputtering method.

[0209] [Step 3] In step 3 of phase PH5, a layer 573 is formed on the conductive film 552. For example, a film containing ITO can be formed by sputtering and used for the layer 573. Alternatively, a film containing an organic compound that transmits light emitted from a light-emitting device and has a refractive index of 1.8 or higher can be formed by resistance heating and used for the layer 573. Alternatively, a film that is less permeable to impurities such as water or oxygen can be formed by CVD or ALD and used for the layer 573.

[0210] As a result, for example, the carrier injection material CIM attached to the side surface 103AS in step 1 of phase PH2B can be removed in step 4 of phase PH3. Also, the current flowing between the electrode 551A and the electrode 552A along the side surface 103AS can be suppressed. Also, the current flowing between the electrode 551B and the electrode 552B along the side surface 103BS can be suppressed. Also, the current that does not contribute to the light emission of the light-emitting device 550A or the light-emitting device 550B can be reduced. Also, the current efficiency related to the light emission of the display device can be improved.

[0211] Furthermore, in step 4 of phase PH3, the outer shapes of units 103A and 103B can be adjusted using an etching process using an oxygen-containing gas. Furthermore, by using film ES, insulating layer 521 can be protected from the etching process using an oxygen-containing gas. Furthermore, even if film ES is conductive, forming gap ESAB can prevent conduction between electrode 551A and electrode 551B. As a result, a novel method for manufacturing a display device that is highly convenient, useful, and reliable can be provided.

[0212] (Embodiment 3) In this embodiment, structural examples of a display module and a display device that can be used as a display device of one embodiment of the present invention will be described with reference to FIGS.

[0213] The display device of the present embodiment can be a high-definition display device, and can therefore be used, for example, as a display unit for a wristwatch-type or bracelet-type information terminal (wearable device), as well as a display unit for a wearable device that can be worn on the head, such as a head-mounted display (HMD) for VR and a glasses-type device for AR.

[0214] The display device of this embodiment can be a high-resolution display device or a large-sized display device. Therefore, the display device of this embodiment can be used in electronic devices having relatively large screens, such as television devices, desktop or notebook computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproducing devices.

[0215] [Display module] 25A shows a perspective view of a display module 280. The display module 280 includes a display device 700A and an FPC 290. Note that, instead of the display device 700A, for example, any of display devices 700B to 700F described below can be used as the display module 280.

[0216] [Example 1 of display device 700] The display device 700A includes a substrate 291 and a substrate 292. The display device 700A includes a display unit 281. The display unit 281 is a region for displaying an image. The display unit 281 also includes a pixel portion 284.

[0217] 25(B) shows a perspective view illustrating a portion of the configuration of the display device 700A. A circuit portion 282, a pixel circuit portion 283 on the circuit portion 282, and a pixel portion 284 on the pixel circuit portion 283 are stacked on a substrate 291. A terminal portion 285 is provided outside the pixel portion 284 on the substrate 291. A wiring portion 286 is provided between the circuit portion 282 and the terminal portion 285. The wiring portion 286 includes a plurality of wires and connects the terminal portion 285 and the circuit portion 282. The display device 700A is connected to an FPC 290 at the terminal portion 285.

[0218] The pixel section 284 has a plurality of periodically arranged pixels 284a. An enlarged view of one pixel 284a is shown on the right side of Fig. 25(B). The pixel 284a has a plurality of sub-pixels arranged in a stripe pattern.

[0219] The pixel circuit section 283 has a plurality of pixel circuits 283a arranged periodically.

[0220] For example, the pixel circuit 283a can be configured to have at least one selection transistor, one current control transistor (drive transistor), and a capacitor. In this case, a gate signal is input to the gate of the selection transistor, and a source signal is input to the source. This realizes an active matrix display device.

[0221] The circuit portion 282 includes a circuit for driving each pixel circuit 283a of the pixel circuit portion 283. For example, it is preferable that the circuit portion 282 includes one or both of a gate line driver circuit and a source line driver circuit. In addition, the circuit portion 282 may include at least one of an arithmetic circuit, a memory circuit, a power supply circuit, and the like.

[0222] The FPC 290 functions as wiring for supplying a video signal, a power supply potential, or the like from the outside to the circuit portion 282. In addition, an integrated circuit (IC) can be mounted on the FPC 290.

[0223] The display device 700 can be configured such that one or both of the pixel circuit unit 283 and the circuit unit 282 are provided overlapping below the pixel unit 284, thereby enabling the aperture ratio (effective display area ratio) of the display unit 281 to be extremely high. For example, the aperture ratio of the display unit 281 can be set to 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. Furthermore, the pixels 284a can be arranged at an extremely high density, enabling the resolution of the display unit 281 to be extremely high. For example, it is preferable that the pixels 284a are arranged in the display unit 281 at a resolution of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and 20000 ppi or less, or 30000 ppi or less.

[0224] Such a display device 700 has an extremely high-definition display unit 281, and therefore can be suitably used in VR devices such as HMDs or eyeglass-type AR devices. For example, even in a configuration in which the display unit is magnified and viewed through lenses, individual pixels cannot be distinguished, so a highly immersive display can be achieved. Furthermore, the display device 700 can be suitably used in electronic devices with relatively small display units, such as wearable electronic devices such as wristwatches.

[0225] [Example 2 of display device 700] 26A is a block diagram illustrating a display device of one embodiment of the present invention. The display device 700 includes a pixel array 74, a circuit 75, and a circuit 76. The pixel array 74 includes pixels 40 arranged in columns and rows.

[0226] The pixel 40 can have multiple sub-pixels 71. The sub-pixels 71 have the function of emitting light for display. By assigning colors such as R (red), G (green), and B (blue) to the light emitted by the sub-pixels 71, a full-color display can be achieved.

[0227] The subpixel 71 has a light-emitting device that emits unpolarized visible light. The light-emitting device is preferably an EL element such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). Examples of light-emitting materials that the EL element may have include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (quantum dot materials, etc.). Alternatively, an LED such as a micro LED may be used as the light-emitting device.

[0228] The circuit 75 and the circuit 76 are driver circuits for driving the sub-pixel 71. The circuit 75 can function as a source driver circuit, and the circuit 76 can function as a gate driver circuit. The circuits 75 and 76 can be, for example, shift register circuits.

[0229] The display device 700 may be divided into a plurality of regions vertically and horizontally, and pixels may be driven for each divided region.

[0230] 26(B), for example, the circuits 75 and 76 can be separately disposed below the pixel array 74. In this case, the display device 700 has a stacked structure of a layer 77 and a layer 78, and the layer 77 is provided with a plurality of the circuits 75 and a plurality of the circuits 76, and the pixel array 74 is provided on the layer 78 so as to overlap the circuits 75 and the circuits 76.

[0231] By dividing the circuit 75 and the circuit 76, the pixel array 74 can be driven for each divided area. For example, the pixel array 74 can be operated at different frame rates in parts. The pixel array 74 can be displayed at different resolutions in parts, and can also be made compatible with foveated rendering.

[0232] Furthermore, by providing the driver circuit below the pixel array 74, the wiring length can be shortened and the wiring capacitance can be reduced. Therefore, a display device that can operate at high speed and with low power consumption can be obtained. Furthermore, the display device 700 can have a narrow frame.

[0233] 26B is merely an example and can be changed as appropriate. Part of the circuit 75 and the circuit 76 can be formed in the same layer as the pixel array 74. The layer 77 may also include circuits such as a memory circuit, an arithmetic circuit, and a communication circuit.

[0234] In this configuration, for example, the layer 77 is provided over a single crystal silicon substrate, the circuits 75 and 76 are formed using transistors having silicon in their channel formation regions (hereinafter referred to as Si transistors), and the pixel circuits included in the pixel array 74 provided in the layer 78 are formed using transistors having an oxide semiconductor in their channel formation regions (hereinafter referred to as OS transistors). The OS transistor can be formed using a thin film and can be stacked on the Si transistor.

[0235] 26C , a structure may be adopted in which a layer 79 in which an OS transistor is provided is provided between the layer 77 and the layer 78. The layer 79 may include OS transistors that form part of the pixel circuits included in the pixel array 74. Alternatively, the layer 79 may include OS transistors that form part of the circuits 75 and 76. Alternatively, the layer 77 may include OS transistors that form part of circuits such as a memory circuit, an arithmetic circuit, and a communication circuit.

[0236] Furthermore, the shape of the display device 700 when viewed from above is not limited to a rectangle, but may be a circle as shown in Fig. 26(D), or a polygon such as an octagon as shown in Fig. 26(E).

[0237] The display device of this embodiment is a high-definition display device, and is particularly suitable for use as a display unit for VR devices such as head-mounted displays, and for wearable devices that can be worn on the head, such as eyeglass-type AR devices.

[0238] [Display device 700A] The display device 700A shown in FIG. 27 includes a substrate 301, a light emitting device F30R, a light emitting device F30G, a light emitting device F30B, a capacitor 240, and a transistor 310.

[0239] The substrate 301 corresponds to the substrate 291 in FIGS. 25(A) and 25(B).

[0240] The transistor 310 has a channel formation region in a substrate 301. The substrate 301 can be, for example, a semiconductor substrate such as a single crystal silicon substrate. The transistor 310 includes a part of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region in which the substrate 301 is doped with impurities and functions as one of a source and a drain. The insulating layer 314 is provided to cover a side surface of the conductive layer 311.

[0241] An isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301 .

[0242] An insulating layer 261 is provided to cover the transistor 310 , and a capacitor 240 is provided on the insulating layer 261 .

[0243] Capacitor 240 has conductive layer 241, conductive layer 245, and insulating layer 243 positioned therebetween. Conductive layer 241 functions as one electrode of capacitor 240, conductive layer 245 functions as the other electrode of capacitor 240, and insulating layer 243 functions as a dielectric of capacitor 240.

[0244] By using a material with low light transmittance for the conductive layer 241 and the conductive layer 245, light can be prevented from entering the transistor 310. When the conductive layer 241 and the conductive layer 245 function as light-shielding layers in addition to the light-shielding layer F09, fluctuations in the electrical characteristics of the transistor 310 are suppressed, resulting in a highly reliable display device. It is more preferable that one or both of the conductive layer 241 and the conductive layer 245 have a region overlapping with the transistor 310 (particularly, the channel formation region). The light-shielding layer F09 preferably has low transmittance, particularly for light with energy equal to or higher than the band gap of the semiconductor material of the semiconductor layer of the transistor provided in the layer F01, that is, light with a short wavelength. This more effectively suppresses fluctuations in the electrical characteristics of the transistor, resulting in a highly reliable display device. For example, when the band gap of the semiconductor material of the semiconductor layer is 3.1 eV, it is particularly preferable that the light-shielding layer F09 has low transmittance for light with energy equal to or higher than 3.1 eV (wavelength of approximately 400 nm or shorter). For example, red, green, brown, and black resins have low transmittance for light of short wavelengths, and therefore can be particularly suitably used for the light-shielding layer F09.

[0245] The conductive layer 241 is provided over the insulating layer 261 and is buried in the insulating layer 254. The conductive layer 241 is connected to one of the source and drain of the transistor 310 by a conductive layer 271 buried in the insulating layer 261. The conductive layer 271 functions as a plug. The insulating layer 243 is provided to cover the conductive layer 241. The conductive layer 245 is provided in a region overlapping with the conductive layer 241 with the insulating layer 243 interposed therebetween.

[0246] It is preferable that at least one of the conductive layers of the layer F01 has a conductive layer surrounding the outside of the display area 281 (or the pixel area 284). This conductive layer may also be called a guard ring. By providing this conductive layer, it is possible to prevent elements such as transistors and light-emitting devices from being damaged by high voltages that may be applied to these elements due to charging caused by processes using ESD (electrostatic discharge) or plasma.

[0247] An insulating layer 253 is provided to cover the capacitor 240, and conductive layers 249R, 249G, and 249B are provided on the insulating layer 253. The conductive layers 249R, 249G, and 249B each function as, for example, wiring. The conductive layer 249R is connected to the conductive layer 241 by a conductive layer 256 embedded in the insulating layer 253. The conductive layer 256 functions as a plug. The same applies to the conductive layers 249G and 249B.

[0248] An inorganic insulating film such as an insulating oxide film, an insulating nitride film, an insulating oxynitride film, or an insulating nitride oxide film can be preferably used for the insulating layer 253. For example, one or more of a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, a silicon nitride film, and a silicon nitride oxide film can be preferably used for the insulating layer 253.

[0249] An insulating layer F88 is provided on the insulating layer 253, the conductive layer 249R, the conductive layer 249G, and the conductive layer 249B, a light-shielding layer F09 is provided on the insulating layer F88, and an insulating layer F82 is provided on the light-shielding layer F09. Light-emitting devices F30R, F30G, and F30B are provided on the insulating layer F82.

[0250] Note that although FIG. 27 illustrates a structure in which a light-shielding layer F09 is provided between the conductive layer 249R, the conductive layer 249G, and the conductive layer 249B and the light-emitting device F30R, the light-emitting device F30G, and the light-emitting device F30B, one embodiment of the present invention is not limited to this.

[0251] In Fig. 27, an insulator is provided in the region between adjacent light-emitting devices. In Fig. 27 and other figures, an insulating layer F25 and an insulating layer F27 on the insulating layer F25 are provided in that region. A mask layer F18R is located on the layer F13R of the light-emitting device F30R, a mask layer F18G is located on the layer F13G of the light-emitting device F30G, and a mask layer F18B is located on the layer F13B of the light-emitting device F30B.

[0252] The pixel electrodes F11R, F11G, and F11B are connected to the conductive layers 249R, 249G, and 249B by the conductive layers F70R, F70G, and F70B embedded in the light-shielding layer F09, the insulating layer F82, and the insulating layer F88. The height of the upper surface of the insulating layer F82 and the height of the upper surfaces of the conductive layers F70R, F70G, and F70B are the same or approximately the same.

[0253] A protective layer F31 is provided on the light-emitting devices F30R, F30G, and F30B. A substrate F20 is bonded to the protective layer F31 via a resin layer F22. The substrate F20 corresponds to the substrate 292 in FIG. 25(A).

[0254] 28(A) and 28(B) show an example of a display device having a light-emitting device F30R, a light-emitting device F30G, and a light-receiving device F50. Although not shown, the display device also has a light-emitting device F30B. In FIG. 28(B), layers below the insulating layer 253 are omitted. The display device 700A shown in FIGS. 28(A) and 28(B) can have, for example, any of the configurations of the layer F01 shown in FIGS. 27 and 29 to 34(A).

[0255] The light-receiving device F50 has a pixel electrode F11S, a conductive layer F35S on the pixel electrode F11S, a layer F13S on the conductive layer F35S, a common layer F14 on the layer F13S, and a common electrode F15 on the common layer F14. The conductive layer F35S can be formed in the same process as the conductive layers F35R, F35G, and F35B.

[0256] The conductive layer F70S is in contact with and connected to the conductive layer 249S. The conductive layer 249S functions as, for example, a wiring. The conductive layer 249S can be formed in the same process as the conductive layers 249R, 249G, and 249B, for example.

[0257] A pixel electrode F11S is provided on the insulating layer F82. The pixel electrode F11S has a region in contact with a conductive layer F70S embedded in the light-shielding layer F09, the insulating layer F82, and the insulating layer F88, and is connected to the conductive layer F70S. The conductive layer F70S is in contact with a conductive layer 249S included in the layer F01 and is connected to the conductive layer 249S. In other words, the conductive layer 249S is connected to the pixel electrode F11S via the conductive layer F70S. The conductive layer 249S corresponds to an electrode of a transistor, an electrode of a capacitor, or a wiring.

[0258] As shown in Fig. 28(B), a lens array F33 can be provided in the display device. The lens array F33 can be provided so as to overlap one or both of the light-emitting device and the light-receiving device.

[0259] 28(B) shows an example in which a lens array F33 is provided on a light-emitting device F30R, a light-emitting device F30G, and a light-receiving device F50 via a protective layer F31. By forming the lens array F33 directly on the substrate on which the light-emitting devices (and light-receiving devices) are formed, it is possible to improve the accuracy of alignment between the light-emitting devices or the light-receiving devices and the lens array.

[0260] In FIG. 28(B), the light emitted from the light emitting device passes through a lens array F33 and is extracted to the outside of the display device.

[0261] The lens array F33 can be provided on the substrate F20 and attached onto the protective layer F31 by the resin layer F22. By providing the lens array F33 on the substrate F20, the temperature of the heat treatment in the process of forming the lens array F33 can be increased.

[0262] [Display device 700B] 29 has a configuration in which a transistor 310A and a transistor 310B, each having a channel formed in a semiconductor substrate, are stacked. Note that in the following description of the display device, descriptions of parts that are the same as those of the display device described above may be omitted.

[0263] The display device 700B has a configuration in which a substrate 301B on which a transistor 310B, a capacitor 240, and a light-emitting device are provided and a substrate 301A on which a transistor 310A is provided are bonded together.

[0264] Here, it is preferable to provide an insulating layer 345 on the lower surface of the substrate 301B. It is also preferable to provide an insulating layer 346 on the insulating layer 261 provided on the substrate 301A. The insulating layers 345 and 346 are insulating layers that function as protective layers and can suppress the diffusion of impurities into the substrates 301B and 301A. The insulating layers 345 and 346 can be made of an inorganic insulating film that can be used for the protective layer F31.

[0265] The substrate 301B is provided with a plug 343 that penetrates the substrate 301B and an insulating layer 345. Here, it is preferable to provide an insulating layer 344 to cover the side surface of the plug 343. The insulating layer 344 is an insulating layer that functions as a protective layer and can suppress the diffusion of impurities into the substrate 301B. The insulating layer 344 can be made of an inorganic insulating film that can be used for the protective layer F31.

[0266] A conductive layer 342 is provided on the back surface of substrate 301B (the surface opposite to substrate F20) under insulating layer 345. Conductive layer 342 is preferably provided so as to be embedded in insulating layer 335. Furthermore, the bottom surfaces of conductive layer 342 and insulating layer 335 are preferably flattened. Here, conductive layer 342 contacts and is connected to plug 343.

[0267] On the other hand, in the substrate 301A, a conductive layer 341 is provided on an insulating layer 346. The conductive layer 341 is preferably provided so as to be embedded in the insulating layer 336. Furthermore, the upper surfaces of the conductive layer 341 and the insulating layer 336 are preferably flattened.

[0268] Substrate 301A and substrate 301B are connected by bonding conductive layer 341 and conductive layer 342. Here, by improving the flatness of the surface formed by conductive layer 342 and insulating layer 335 and the surface formed by conductive layer 341 and insulating layer 336, conductive layer 341 and conductive layer 342 can be bonded well.

[0269] It is preferable that the conductive layers 341 and 342 are made of the same conductive material. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film containing the above elements (titanium nitride film, molybdenum nitride film, tungsten nitride film), etc., can be used. In particular, it is preferable that copper be used for the conductive layers 341 and 342. This allows the use of Cu-Cu direct bonding technology (technology that achieves electrical conductivity by connecting Cu (copper) pads together).

[0270] [Display device 700C] A display device 700C shown in FIG. 30 has a configuration in which a conductive layer 341 and a conductive layer 342 are joined via a bump 347.

[0271] 30, by providing a bump 347 between the conductive layer 341 and the conductive layer 342, the conductive layer 341 and the conductive layer 342 can be connected. The bump 347 can be formed using a conductive material containing, for example, gold (Au), nickel (Ni), indium (In), tin (Sn), or the like. Alternatively, for example, solder may be used as the bump 347. An adhesive layer 348 can be provided between the insulating layer 345 and the insulating layer 346. When the bump 347 is provided, the insulating layer 335 and the insulating layer 336 may not be provided.

[0272] [Display device 700D] Display device 700D shown in FIG. 31 differs from display device 700A mainly in the configuration of the transistors.

[0273] The transistor 320 is an OS transistor in which an oxide semiconductor is used for a semiconductor layer in which a channel is formed.

[0274] The transistor 320 includes a semiconductor layer 321 , an insulating layer 323 , a conductive layer 324 , a pair of conductive layers 325 , an insulating layer 326 , and a conductive layer 327 .

[0275] 25A and 25B. The substrate 331 corresponds to the substrate 291 in Fig. 25A and 25B. The substrate 331 can be an insulating substrate or a semiconductor substrate.

[0276] An insulating layer 332 is provided over a substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities (for example, water and hydrogen) from diffusing from the substrate 331 to the transistor 320 and prevents oxygen from being released from the semiconductor layer 321 toward the insulating layer 332. The insulating layer 332 can be, for example, a film through which hydrogen or oxygen is less likely to diffuse than a silicon oxide film, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0277] A conductive layer 327 is provided over the insulating layer 332, and an insulating layer 326 is provided to cover the conductive layer 327. The conductive layer 327 functions as a first gate electrode of the transistor 320, and part of the insulating layer 326 functions as a first gate insulating layer. An oxide insulating film such as a silicon oxide film is preferably used for at least a portion of the insulating layer 326 that is in contact with the semiconductor layer 321. The top surface of the insulating layer 326 is preferably planarized.

[0278] The semiconductor layer 321 is provided over an insulating layer 326. The semiconductor layer 321 preferably includes an oxide semiconductor film. A pair of conductive layers 325 is provided on and in contact with the semiconductor layer 321 and functions as a source electrode and a drain electrode.

[0279] An insulating layer 328 is provided to cover top surfaces and side surfaces of the pair of conductive layers 325 and side surfaces of the semiconductor layer 321, and an insulating layer 264 is provided over the insulating layer 328. The insulating layer 328 functions as a barrier layer that prevents impurities (for example, water and hydrogen) from diffusing from the insulating layer 264 or the like to the semiconductor layer 321 and prevents oxygen from being released from the semiconductor layer 321. The insulating layer 328 can be formed using an insulating film similar to the insulating layer 332.

[0280] An opening is provided in the insulating layer 328 and the insulating layer 264, reaching the semiconductor layer 321. Inside the opening, an insulating layer 323 and a conductive layer 324 are buried, the insulating layer 323 being in contact with side surfaces of the insulating layer 264, the insulating layer 328, and the conductive layer 325 and the top surface of the semiconductor layer 321. The conductive layer 324 functions as a second gate electrode, and the insulating layer 323 functions as a second gate insulating layer.

[0281] The upper surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are planarized so that their heights are the same or approximately the same, and insulating layers 329 and 265 are provided to cover them.

[0282] The insulating layer 264 and the insulating layer 265 function as interlayer insulating layers. The insulating layer 329 functions as a barrier layer that prevents impurities (for example, water and hydrogen) from diffusing from the insulating layer 265 or the like to the transistor 320. The insulating layer 329 can be formed using an insulating film similar to the insulating layer 328 and the insulating layer 332.

[0283] The plug 274 connected to one of the pair of conductive layers 325 is provided so as to be embedded in the insulating layer 265, the insulating layer 329, and the insulating layer 264. Here, the plug 274 preferably includes a conductive layer 274a covering the side surfaces of the openings of the insulating layer 265, the insulating layer 329, the insulating layer 264, and the insulating layer 328 and part of the top surface of the conductive layer 325, and a conductive layer 274b in contact with the top surface of the conductive layer 274a. In this case, the conductive layer 274a is preferably made of a conductive material through which hydrogen and oxygen do not easily diffuse.

[0284] [Display device 700E] A display device 700E illustrated in FIG. 32 has a stacked structure of a transistor 320A and a transistor 320B each including an oxide semiconductor as a semiconductor in which a channel is formed.

[0285] For the transistor 320A, the transistor 320B, and the surrounding configuration, the description of the display device 700D can be referred to.

[0286] Note that although two transistors including an oxide semiconductor are stacked here, the present invention is not limited to this structure, and for example, three or more transistors may be stacked.

[0287] [Display device 700F] A display device 700F illustrated in FIG. 33 has a stacked structure of a transistor 310 in which a channel is formed in a substrate 301 and a transistor 320 in which a channel is formed and which includes an oxide semiconductor in a semiconductor layer.

[0288] An insulating layer 261 is provided to cover the transistor 310, and a conductive layer 251 is provided over the insulating layer 261. An insulating layer 262 is provided to cover the conductive layer 251, and a conductive layer 252 is provided over the insulating layer 262. The conductive layers 251 and 252 each function as wirings. An insulating layer 263 and an insulating layer 332 are provided to cover the conductive layer 252, and a transistor 320 is provided over the insulating layer 332. An insulating layer 265 is provided to cover the transistor 320, and a capacitor 240 is provided over the insulating layer 265. The capacitor 240 and the transistor 320 are connected by a plug 274.

[0289] The transistor 320 can be used as a transistor included in a pixel circuit. The transistor 310 can be used as a transistor included in a pixel circuit or a driver circuit (gate line driver circuit, source line driver circuit) for driving the pixel circuit. The transistors 310 and 320 can be used as transistors included in various circuits such as an arithmetic circuit or a memory circuit.

[0290] By using this configuration, not only pixel circuits but also driving circuits etc. can be formed directly below the light-emitting device, making it possible to make the display device smaller than when driving circuits are provided around the periphery of the display area.

[0291] Fig. 34A shows a configuration example different from that of Fig. 33. A display device 700F shown in Fig. 34A has a structure in which a transistor 310 having a channel formed in a substrate 301 and a transistor 320V are stacked.

[0292] An enlarged view of the transistor 320V is shown in Fig. 34(B), and a cross-sectional view taken along the dashed line A1-A2 in Fig. 34(B) is shown in Fig. 34(C).

[0293] The transistor 320V includes a conductive layer 327 functioning as a first gate electrode, an insulating layer 326 functioning as a first gate insulating layer, a semiconductor layer 321, a conductive layer 325a, and a conductive layer 325b. The conductive layer 325a functions as one of a source and a drain, and the conductive layer 325b functions as the other of the source and the drain. The semiconductor layer 321 can be preferably formed using, for example, an oxide semiconductor.

[0294] The conductive layer 325a is provided over the insulating layer 332, the insulating layer 267 is provided over the conductive layer 325a, and the conductive layer 325b is provided over the insulating layer 267. The conductive layer 325b and the insulating layer 267 have an opening 490 that reaches the conductive layer 325a. The semiconductor layer 321 is provided to cover the opening 490 and is in contact with the conductive layer 325a at the opening 490. The semiconductor layer 321 is in contact with the side surfaces of the insulating layer 267 and the conductive layer 325b. The semiconductor layer 321 is preferably in contact with not only the side surface of the conductive layer 325b but also the top surface of the conductive layer 325b. A region of the semiconductor layer 321 in contact with the conductive layer 325a functions as one of the source and drain regions, and a region of the semiconductor layer 321 in contact with the conductive layer 325b functions as the other of the source and drain regions. In the semiconductor layer 321, a channel formation region is located between the source and drain regions. An insulating layer 326 is provided over the semiconductor layer 321, and a conductive layer 327 is provided over the insulating layer 326. In the opening, the conductive layer 327 has a region that overlaps with the semiconductor layer 321 with the insulating layer 326 interposed therebetween.

[0295] An inorganic insulating film such as an insulating oxide film, an insulating nitride film, an insulating oxynitride film, or an insulating nitride oxide film can be preferably used for the insulating layer 267. For example, one or more of a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, a silicon nitride film, and a silicon nitride oxide film can be preferably used for the insulating layer 267.

[0296] In the transistor 320V, the source electrode and drain electrode are located at different heights relative to the surface on which the transistor 320V is formed (here, the upper surface of the insulating layer 332), and a drain current flows in a direction perpendicular or approximately perpendicular to the upper surface of the insulating layer 332. In other words, it can be said that the channel length direction has a component in the height direction (vertical direction), and therefore the transistor 320V can be called a VFET (Vertical Field Effect Transistor), a vertical transistor, a vertical channel transistor, or a vertical channel transistor.

[0297] The channel length L of the transistor 320V can be controlled by the thickness of an insulating layer (here, the insulating layer 267) sandwiched between the source electrode and the drain electrode. Therefore, the transistor 320V can be fabricated with high precision to have a channel length L shorter than the minimum exposure dimension of an exposure device used to fabricate the transistor (for example, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less, and 1 nm or more, or 5 nm or more). By shortening the channel length L of the transistor 320V, the on-state current can be increased. This allows for a display device that operates at high speed.

[0298] The transistor 320V can have a source electrode, a semiconductor layer, and a drain electrode stacked on top of each other. This allows for a significantly smaller footprint compared to a so-called planar transistor, which has these elements arranged in a plane. By applying a VFET to the pixel circuit of a display device, the footprint of the pixel circuit can be reduced, enabling the creation of a high-resolution display device.

[0299] 34(C), by forming the opening 490 to have a circular or approximately circular shape in a top view, the semiconductor layer 321, the insulating layer 326, and the conductive layer 327 are provided concentrically. This makes the distance between the conductive layer 327 and the semiconductor layer 321 approximately uniform, allowing a gate electric field to be applied to the semiconductor layer 321 approximately uniformly.

[0300] The side surface of the conductive layer 327 faces the side surface of the semiconductor layer 321 via the insulating layer 326. That is, in a top view, the entire periphery of the semiconductor layer 321 forms a channel formation region. In this case, for example, the channel width W of the transistor 320V is determined by the length of the periphery of the semiconductor layer 321. That is, the channel width W of the transistor 320V can be determined by the maximum width of the opening 490 (the maximum diameter if the opening 490 is circular in a top view). In Figures 34(B) and 34(C), the maximum width D of the opening 490 is indicated by a double-headed arrow in a solid line. In Figure 34(C), the channel width W of the transistor 320V is indicated by a double-headed arrow in a dashed line. By increasing the maximum width D of the opening 490, the channel width per unit area can be increased, thereby increasing the on-current.

[0301] When the opening 490 is formed using photolithography, the maximum width D of the opening 490 is equal to or greater than the minimum exposure dimension of the exposure device. The maximum width D of the opening 490 is determined by the film thicknesses of the semiconductor layer 321, the insulating layer 326, and the conductive layer 327 provided in the opening 490. The maximum width D of the opening 490 is, for example, 5 nm or more, 10 nm or more, or 20 nm or more, and is preferably 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less. When the opening 490 is circular in top view, the maximum width D of the opening 490 corresponds to the diameter of the opening 490, and the channel width W can be calculated as "D × π."

[0302] The configuration of the transistor 320V shown here can also be applied to other configuration examples.

[0303] [Display device 700G] FIG. 35 shows a perspective view of the display device 700G, and FIG. 36(A) shows a cross-sectional view of the display device 700G.

[0304] Display device 700G has a configuration in which substrate F52 and substrate F51 are bonded together. In Fig. 35, substrate F52 is indicated by a dashed line.

[0305] The display device 700G has a display unit F62, a connection unit F40, a circuit F64, wiring F65, etc. Fig. 35 shows an example in which an integrated circuit F73 and an FPC 290 are mounted on the display device 700G. Therefore, the configuration shown in Fig. 35 can also be said to be a display module having the display device 700G, an IC (integrated circuit), and an FPC.

[0306] The connection portion F40 is provided on the outside of the display portion F62. The connection portion F40 can be provided along one or more sides of the display portion F62. There can be one or more connection portions F40. FIG. 35 shows an example in which the connection portion F40 is provided so as to surround the four sides of the display portion. The connection portion F40 connects the common electrode of the light-emitting device and the conductive layer, and can supply a potential to the common electrode.

[0307] As the circuit F64, for example, a scanning line driver circuit can be used.

[0308] The wiring F65 has a function of supplying signals and power to the display portion F62 and the circuit F64. The signals and power are input to the wiring F65 from the outside via the FPC 290 or input to the wiring F65 from the integrated circuit F73.

[0309] 35 shows an example in which an integrated circuit F73 is provided on a substrate F51 by a COG (Chip On Glass) method or a COF (Chip On Film) method. The integrated circuit F73 can be, for example, an IC having a scanning line driver circuit or a signal line driver circuit. The display device 700G and the display module can also be configured without an IC. Alternatively, the IC can be mounted on an FPC by a COF method or the like.

[0310] Figure 36(A) shows an example of a cross section of the display device 700G, showing a portion of the area including the FPC 290, a portion of the circuit F64, a portion of the display section F62, a portion of the connection section F40, and a portion of the area including the end portion.

[0311] 36(A) includes a transistor 201, a transistor 205, a light-emitting device F30R, a light-emitting device F30G, and a light-emitting device F30B between a substrate F51 and a substrate F52. The transistors 201 and 205 are provided on the substrate F51, an insulating layer 215 is provided on the transistors 201 and 205, a light-shielding layer F09 is provided on the insulating layer 215, and an insulating layer F86 is provided on the light-shielding layer F09. The light-emitting device F30R, the light-emitting device F30G, and the light-emitting device F30B are provided on the insulating layer F86.

[0312] 36(A), conductive layers F05R, F05G, F05B, and F05p are provided on an insulating layer F86. Layers F07R, F07G, and F07B are provided on the conductive layers F05R, F05G, and F05B. Pixel electrodes F11R, F11G, and F11B are provided to cover the conductive layers F05R, F05G, F05B, F07R, F07G, and F07B. An electrode F23 is provided on the conductive layer F05p, and a conductive layer F35p is provided on the electrode F23.

[0313] The conductive layer F05B is in contact with and connected to the conductive layer 222b of the transistor 205 in an opening provided in the insulating layer F86, the light-shielding layer F09, the insulating layer 215, and the insulating layer 213. The pixel electrode F11B is connected to the conductive layer 222b through the conductive layer F05B. The same applies to the pixel electrode F11R, the conductive layer F05R, the pixel electrode F11G, and the conductive layer F05G, and detailed descriptions thereof will be omitted.

[0314] In the display portion F62, a light-shielding layer F09 is provided over the transistor 205. In the circuit F64, a light-shielding layer F09 is provided over the transistor 201. By providing the light-shielding layer F09 in the display portion F62 and the circuit F64, external light and light emitted from the light-emitting device can be prevented from entering the transistors included in the display device, and fluctuations in the electrical characteristics of the transistors due to light can be prevented. Therefore, a highly reliable pixel circuit and driver circuit can be provided, and a highly reliable display device can be provided.

[0315] Part of the top surface and side surfaces of layers F13B, F13G, and F13R are covered with insulating layers F25 and F27, respectively. A mask layer F18B is located between layer F13B and insulating layer F25. A mask layer F18G is located between layer F13G and insulating layer F25, and a mask layer F18R is located between layer F13R and insulating layer F25. A common layer F14 is provided on layers F13B, F13G, F13R, insulating layer F25, and insulating layer F27, and a common electrode F15 is provided on the common layer F14. The common layer F14 and the common electrode F15 are each a continuous film provided in common to multiple light-emitting devices.

[0316] A protective layer F31 is provided on the light-emitting device F30R, the light-emitting device F30G, and the light-emitting device F30B. The protective layer F31 and the substrate F52 are bonded via an adhesive layer F42. A light-shielding layer F17 is provided on the substrate F52. A solid sealing structure, a hollow sealing structure, or the like can be applied to seal the light-emitting devices. In FIG. 36(A), the space between the substrate F52 and the substrate F51 is filled with the adhesive layer F42, and a solid sealing structure is applied. Alternatively, the space can be filled with an inert gas (such as nitrogen or argon) and a hollow sealing structure can be applied. In this case, the adhesive layer F42 may be provided so as not to overlap with the light-emitting device. Alternatively, the space may be filled with a resin different from the frame-shaped adhesive layer F42.

[0317] The protective layer F31 is provided at least on the display unit F62, and is preferably provided so as to cover the entire display unit F62. The protective layer F31 is preferably provided so as to cover not only the display unit F62 but also the connection unit F40 and the circuit F64. The protective layer F31 is also preferably provided up to the edge of the display device 700G. Meanwhile, the connection unit 204 has a portion where the protective layer F31 is not provided, in order to connect the FPC 290 and the conductive layer F66.

[0318] A connection portion 204 is provided in an area of ​​the substrate F51 where the substrate F52 does not overlap. In the connection portion 204, the wiring F65 is connected to the FPC 290 via the conductive layer F05q, the conductive layer F66, the conductive layer F35q, and the connection layer 242. The conductive layer F05q can be formed, for example, in the same process as the conductive layer F05R, the conductive layer F05G, and the conductive layer F05B. The conductive layer F66 can be formed, for example, in the same process as the pixel electrode F11R, the pixel electrode F11G, and the pixel electrode F11B. The conductive layer F35q can be formed, for example, in the same process as the conductive layer F35R, the conductive layer F35G, and the conductive layer F35B. The conductive layer F35q is exposed on the upper surface of the connection portion 204. This allows the connection portion 204 and the FPC 290 to be connected via the connection layer 242.

[0319] For example, after the protective layer F31 is formed over the entire surface of the display device 700G, the conductive layer F35q can be exposed by removing the area of ​​the protective layer F31 that overlaps with the conductive layer F35q using a mask.

[0320] Here, a configuration is shown in which no other layer (e.g., a layer corresponding to layer F07R) is provided between conductive layer F05q and conductive layer F66. This increases the contact area between conductive layer F05q and conductive layer F66, thereby reducing contact resistance. Note that a configuration in which another layer (e.g., a layer corresponding to layer F07R) is provided between conductive layer F05q and conductive layer F66 may also be used.

[0321] A laminated structure of at least one organic layer and a conductive layer can be provided on the conductive layer F35q, and the protective layer F31 can be provided on the laminated structure. A peeling initiation point (a portion that triggers peeling) can then be formed in the laminated structure using a laser or a sharp blade (e.g., a needle or a cutter). The laminated structure and the protective layer F31 thereon can be selectively removed to expose the conductive layer F35q. For example, the protective layer F31 can be selectively removed by pressing an adhesive roller against the substrate F51 and moving the roller relative to the substrate F51 while rotating. Alternatively, adhesive tape can be attached to the substrate F51 and peeled off. Because of poor adhesion between the organic layer and the conductive layer, or between the organic layers themselves, separation occurs at the interface between the organic layer and the conductive layer or within the organic layer. This allows selective removal of the region of the protective layer F31 that overlaps with the conductive layer F35q. Any organic layer or other material remaining on the conductive layer F35q can be removed using an organic solvent or the like.

[0322] The organic layer may be, for example, at least one organic layer (functioning as a light-emitting layer, carrier blocking layer, carrier transport layer, or carrier injection layer) used in any of the layers F13B, F13G, and F13R. The organic layer may be formed simultaneously with the formation of any of the layers F13B, F13G, and F13R, or may be provided separately. The conductive layer may be formed in the same process and with the same material as the common electrode F15. For example, an ITO film is preferably formed as the common electrode F15 and the conductive layer. When the common electrode F15 has a laminated structure, at least one of the layers constituting the common electrode F15 is provided as the conductive layer.

[0323] The upper surface of the conductive layer F35q may be covered with a mask to prevent the protective layer F31 from being formed on the conductive layer F35q. For example, a metal mask (area metal mask) or an adhesive or suction tape or film may be used as the mask. By forming the protective layer F31 with the mask in place and then removing the mask, the conductive layer F35q can be kept exposed even after the protective layer F31 is formed.

[0324] By using such a method, a region where the protective layer F31 is not provided is formed in the connection portion 204, and the conductive layer F35q and the FPC 290 can be connected via the connection layer 242 in this region.

[0325] Note that, although the configuration in which the conductive layer F66 and the conductive layer F35q are provided in the connection portion 204 has been described here, one embodiment of the present invention is not limited to this. The conductive layer F35q may not be provided in the connection portion 204. When the conductive layer F35q is not provided in the connection portion 204, the conductive layer F66 may be exposed on the upper surface of the connection portion 204 and may be in contact with the connection layer 242.

[0326] The display device 700G is a top-emission type. Light emitted by the light-emitting device is emitted toward the substrate F52. The substrate F52 is preferably made of a material that is highly transparent to visible light. The pixel electrodes contain a material that reflects visible light, and the counter electrode (common electrode F15) contains a material that transmits visible light.

[0327] The transistor 201 and the transistor 205 can be formed in the same process.

[0328] An insulating layer 211, an insulating layer 213, an insulating layer 215, a light-shielding layer F09, and an insulating layer F86 are provided on the substrate F51 in this order. A portion of the insulating layer 211 functions as a gate insulating layer for each transistor. A portion of the insulating layer 213 functions as a gate insulating layer for each transistor. The insulating layer 215 is provided to cover the transistors. The light-shielding layer F09 is provided to cover the transistors and prevents light from entering the transistors. The number of gate insulating layers and the number of insulating layers covering the transistors are not limited, and each may be a single layer or two or more layers.

[0329] At least one insulating layer covering the transistor is preferably made of a material that is resistant to the diffusion of impurities such as water and hydrogen. This allows the insulating layer to function as a barrier layer. With this structure, it is possible to effectively prevent impurities from diffusing into the transistor from the outside, thereby improving the reliability of the display device.

[0330] It is preferable to use an inorganic insulating film for each of the insulating layers 211, 213, and 215. Examples of inorganic insulating films that can be used include a silicon nitride film, a silicon oxynitride film, a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, and an aluminum nitride film. Examples of films that can be used include a hafnium oxide film, an yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film. Two or more of the above insulating films can also be stacked.

[0331] The transistor 201 and the transistor 205 each include a conductive layer 221 that functions as a gate, an insulating layer 211 that functions as a gate insulating layer, conductive layers 222a and 222b that function as a source and a drain, a semiconductor layer 231, an insulating layer 213 that functions as a gate insulating layer, and a conductive layer 223 that functions as a gate. Here, the same hatching pattern is applied to multiple layers obtained by processing the same conductive film. The insulating layer 211 is located between the conductive layer 221 and the semiconductor layer 231. The insulating layer 213 is located between the conductive layer 223 and the semiconductor layer 231.

[0332] The structure of the transistor included in the display device of this embodiment is not particularly limited. For example, a planar transistor, a staggered transistor, an inverted staggered transistor, or the like can be used. Furthermore, either a top-gate transistor or a bottom-gate transistor can be used. Alternatively, gates can be provided above and below a semiconductor layer in which a channel is formed.

[0333] The transistor 201 and the transistor 205 have a structure in which a semiconductor layer in which a channel is formed is sandwiched between two gates. The transistors can be driven by connecting the two gates and supplying the same signal to them. Alternatively, the threshold voltage of the transistor can be controlled by applying a potential for controlling the threshold voltage to one of the two gates and a potential for driving to the other.

[0334] The crystallinity of the semiconductor material used for the transistor is not particularly limited, and any of an amorphous semiconductor, a single-crystal semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) can be used. The use of a single-crystal semiconductor or a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0335] The semiconductor layer of the transistor preferably includes an oxide semiconductor. That is, the display device of this embodiment preferably includes an OS transistor whose channel formation region is formed using an oxide semiconductor.

[0336] Examples of crystalline oxide semiconductors include c-axis-aligned crystalline (CAAC)-OS and nanocrystalline (nc)-OS.

[0337] Alternatively, a transistor using silicon in a channel formation region (Si transistor) can be used. Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor having low temperature polysilicon (LTPS) in a semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used. LTPS transistors have high field-effect mobility and good frequency characteristics.

[0338] By using Si transistors such as LTPS transistors, circuits that need to be driven at high frequencies (such as source driver circuits) can be built on the same substrate as the display unit, which simplifies the external circuits mounted on the display device and reduces component and mounting costs.

[0339] OS transistors have significantly higher field-effect mobility than transistors using amorphous silicon. Furthermore, OS transistors have significantly lower source-drain leakage current (also called off-state current) in an off state, allowing them to retain charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of OS transistors can reduce the power consumption of display devices.

[0340] To increase the light emission luminance of a light-emitting device included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of the drive transistor included in the pixel circuit. Because OS transistors have a higher source-drain breakdown voltage than Si transistors, a high voltage can be applied between the source and drain of an OS transistor. Therefore, by using an OS transistor as the drive transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting device and increase the light emission luminance of the light-emitting device.

[0341] When the transistor operates in the saturation region, OS transistors can reduce the change in source-drain current relative to a change in gate-source voltage compared to Si transistors. Therefore, by using OS transistors as the drive transistors in pixel circuits, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing to the light-emitting device. This allows for a greater number of gray levels in the pixel circuit.

[0342] In terms of the saturation of the current that flows when a transistor operates in the saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a drive transistor, for example, a stable current can be passed through a light-emitting device even when the current-voltage characteristics of the light-emitting device vary. In other words, when an OS transistor operates in the saturation region, the source-drain current remains almost unchanged even when the source-drain voltage increases, thereby stabilizing the light-emitting brightness of the light-emitting device.

[0343] As described above, by using an OS transistor for the drive transistor included in the pixel circuit, it is possible to achieve "suppression of black floating," "increase in light emission brightness," "multiple gradations," and "suppression of variation in light-emitting devices."

[0344] Examples of oxide semiconductors used in the semiconductor layer include indium oxide, gallium oxide, and zinc oxide. The oxide semiconductor preferably contains at least indium or zinc. The oxide semiconductor preferably contains one or more elements selected from indium, element M, and zinc. The element M is a metal element or a metalloid element having a high bond energy with oxygen, for example, a metal element or a metalloid element having a higher bond energy with oxygen than indium. Specific examples of the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the oxide semiconductor is preferably one or more of the above elements, more preferably one or more selected from gallium, aluminum, tin, and yttrium, and even more preferably one or more selected from gallium, aluminum, and tin. These elements are more preferred because they have a high bond energy with oxygen and an ionic radius similar to that of indium or zinc. Tin is also more preferred because it is tetravalent and can increase carrier mobility. Note that in this specification and the like, metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal elements" described in this specification and the like may also include metalloid elements.

[0345] The semiconductor layer may be formed of, for example, indium zinc oxide (In-Zn oxide, also referred to as IZO (registered trademark)), indium tin oxide (In-Sn oxide, also referred to as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (In-W oxide, also referred to as IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, Examples of usable materials include indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as AZO), indium tin zinc oxide (In-Sn-Zn oxide, also referred to as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO, IGZAO, or IAGZO). Alternatively, examples of usable materials include silicon-containing indium tin oxide (ITSO), gallium tin oxide (Ga-Sn oxide), and aluminum tin oxide (Al-Sn oxide).

[0346] Note that the oxide semiconductor can contain one or more metal elements having a higher period number in the periodic table instead of or in addition to indium. The greater the overlap between the orbitals of metal elements, the greater the carrier conduction in the oxide semiconductor. Therefore, the presence of a metal element having a higher period number can sometimes improve the field-effect mobility of a transistor. Examples of metal elements having a higher period number include elements belonging to the fifth period and the sixth period. Specific examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0347] By increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements contained in the oxide semiconductor, the field-effect mobility of the transistor can be increased, and further, a transistor with high on-state current can be realized.

[0348] In this specification, the ratio of the number of indium atoms to the sum of the numbers of atoms of all contained metal elements may be referred to as the indium content. The same applies to other metal elements. When multiple elements are contained as element M, the sum of the ratios of the number of atoms of element M to the sum of the numbers of atoms of all contained metal elements can be referred to as the content of element M.

[0349] By increasing the zinc content in the oxide semiconductor, the oxide semiconductor can have high crystallinity, which can suppress the diffusion of impurities in the oxide semiconductor, thereby suppressing fluctuations in the electrical characteristics of the transistor and improving its reliability.

[0350] By increasing the content of element M in the oxide semiconductor, it is possible to obtain an oxide semiconductor with a wide band gap. O:Oxygen Vacancy) formation is suppressed, and oxygen vacancies (V O ) can be suppressed, and a shift in the threshold voltage of the transistor can be suppressed. As a result, the cutoff current can be reduced, and the transistor can be a normally-off transistor. In addition, the transistor can have a small off-state current. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, and reliability can be improved.

[0351] The electrical characteristics and reliability of a transistor vary depending on the composition of the oxide semiconductor used in the semiconductor layer. Therefore, by varying the composition of the oxide semiconductor depending on the electrical characteristics and reliability required of the transistor, a semiconductor device that has both excellent electrical characteristics and high reliability can be obtained.

[0352] When the oxide semiconductor is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of element M. Examples of atomic ratios of metal elements in such In-M-Zn oxides include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:1, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M Examples of compositions include In:M:Zn=5:1:9, In:M:Zn=6:1:6, In:M:Zn=10:1:1, In:M:Zn=10:1:3, In:M:Zn=10:1:4, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10, and compositions in the vicinity thereof. Note that compositions in the vicinity include a range of ±30% of the desired atomic ratio. Increasing the atomic ratio of indium in the oxide semiconductor can increase the on-state current or field-effect mobility of a transistor.

[0353] The atomic ratio of In in the In-M-Zn oxide can be less than the atomic ratio of the element M. Examples of atomic ratios of metal elements in such In-M-Zn oxide include In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, In:M:Zn=1:3:6, and compositions close to these. By increasing the ratio of M atoms in the oxide semiconductor, oxygen vacancies (V O ) can be suppressed.

[0354] When the element M contains a plurality of elements, the atomic ratio of the element M can be the sum of the atomic ratios of these elements.

[0355] By using a material with a high indium content in the semiconductor layer, the on-state current or field-effect mobility of the transistor can be increased. Furthermore, by containing the element M, oxygen vacancies (V O ) can be suppressed. The content of element M in the oxide semiconductor of the semiconductor layer is preferably 0.1% to 25% inclusive, more preferably 0.1% to 20% inclusive, even more preferably 0.1% to 10% inclusive, even more preferably 0.1% to 8% inclusive, even more preferably 0.1% to 6% inclusive, and even more preferably 0.1% to 4% inclusive. This allows for a transistor with excellent electrical characteristics. For example, it is preferable to use an oxide semiconductor having an In:M:Zn=40:1:10 or a similar structure. The element M is preferably one or more of the above elements, and more preferably one or more selected from aluminum, gallium, tin, and yttrium. Specifically, oxide semiconductors having an In:Sn:Zn=40:1:10 or a similar structure can be preferably used. Alternatively, oxide semiconductors having an In:Al:Zn=40:1:10 or a similar structure can be preferably used.

[0356] Here, when a polycrystalline oxide semiconductor is used for the semiconductor layer, crystal grain boundaries become recombination centers, and carriers are captured, which may reduce the on-state current of the transistor. Furthermore, when a polycrystalline oxide semiconductor is used for the semiconductor layer, the surface of the semiconductor layer may become uneven. This increases the step on the surface where a layer formed on the semiconductor layer is to be formed, which may cause defects such as discontinuities or voids in the layer. When an oxide semiconductor having a composition that easily forms a polycrystalline structure is used for the semiconductor layer, it is preferable to include an element that inhibits crystallization. This prevents the semiconductor layer from becoming a polycrystalline structure, resulting in a transistor with a large on-state current. Furthermore, the coverage of a layer formed on the semiconductor layer can be improved, which prevents defects such as discontinuities or voids in the layer.

[0357] For example, compared with indium tin oxide (ITO), silicon-containing indium tin oxide (ITSO) is less likely to form a polycrystalline structure, making it suitable for use in the semiconductor layer. When ITSO is used, the silicon content is preferably 1% to 20%, more preferably 3% to 20%, even more preferably 3% to 15%, and even more preferably 5% to 15%. Specifically, oxide semiconductors with In:Sn:Si=45:5:4, In:Sn:Si=95:5:8, and oxide semiconductors in the vicinity thereof are suitable for use. When silicon-containing indium tin oxide (ITSO) is used in the semiconductor layer, it is preferable that it has crystallinity. Note that the semiconductor layer may have an amorphous region. Furthermore, the semiconductor layer may be amorphous.

[0358] An oxide semiconductor that does not contain element M can be used for the semiconductor layer. When the oxide semiconductor is an In-Zn oxide, the atomic ratio of the metal elements can be, for example, In:Zn=1:1, In:Zn=2:1, In:Zn=1:2, In:Zn=3:1, In:Zn=3:2, In:Zn=2:3, In:Zn=4:1, In:Zn=4:3, In:Zn=5:1, In:Zn=5:2, In:Zn=5:3, In:Zn=5:4, In:Zn=5:6, In:Zn=5:7, In:Zn=5:8, In:Zn=5:9, In:Zn=7:1, In:Zn=10:1, In:Zn=10:3, In:Zn=10:7, and compositions close to these. Furthermore, it is more preferable that the atomic ratio of In is equal to or greater than the atomic ratio of Zn. By increasing the atomic ratio of indium in an oxide semiconductor, the on-state current or field-effect mobility of a transistor can be increased.

[0359] The composition of the semiconductor layer can be analyzed using, for example, energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectroscopy (XPS), inductively coupled plasma-mass spectrometry (ICP-MS), or inductively coupled plasma-atomic emission spectrometry (ICP-AES). Alternatively, a combination of these techniques can be used for analysis. It is preferable to separate the peaks of the spectrum obtained by analysis to identify and quantify the elements. Note that for elements with low content, the actual content and the content obtained by analysis may differ due to analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content, it may be difficult to quantify the content of element M, or element M may be below the detection limit.

[0360] The oxide semiconductor can be formed by a sputtering method or an ALD method. The ALD method can be a thermal ALD method or a plasma-enhanced ALD (PEALD) method. When an oxide semiconductor is formed by a sputtering method, the composition of the formed oxide semiconductor may differ from that of the sputtering target. In particular, the zinc content in the formed oxide semiconductor may decrease to about 50% of that of the sputtering target. Alternatively, the oxide semiconductor can be formed by a PECVD method.

[0361] The semiconductor layer is preferably made of a crystalline oxide semiconductor. Examples of the structure of a crystalline oxide semiconductor include a c-axis aligned crystal (CAAC) structure, a polycrystalline structure, and a nano-crystal (nc) structure. By using a crystalline oxide semiconductor, the density of defect states in the semiconductor layer can be reduced, and a highly reliable semiconductor device can be realized.

[0362] The semiconductor layer preferably uses a CAAC-OS or an nc-OS.

[0363] The CAAC-OS has multiple layered crystals. The c-axes of the crystals are oriented in the normal direction to the surface on which they are formed. The semiconductor layer preferably has layered crystals parallel or approximately parallel to the surface on which it is formed. This allows the layered crystals of the semiconductor layer to be formed parallel or approximately parallel to the channel length direction of the transistor, resulting in a transistor with a large on-state current.

[0364] By using an oxide semiconductor with high crystallinity for the channel formation region, the density of defect states in the channel formation region can be reduced, whereas by using an oxide semiconductor with low crystallinity, a transistor capable of passing a large current can be realized.

[0365] The transistors in the circuit F64 and the transistors in the display unit F62 may have the same structure or different structures. The transistors in the circuit F64 may all have the same structure or may have two or more types. Similarly, the transistors in the display unit F62 may all have the same structure or may have two or more types.

[0366] All of the transistors in the display portion F62 may be OS transistors, all of the transistors in the display portion F62 may be Si transistors, or some of the transistors in the display portion F62 may be OS transistors and the rest may be Si transistors.

[0367] For example, by using both an LTPS transistor and an OS transistor in the display portion F62, a display device with low power consumption and high driving capability can be realized. A configuration in which an LTPS transistor and an OS transistor are combined is sometimes called an LTPO. As a more preferable example, it is preferable to use an OS transistor as a transistor that functions as a switch for controlling conduction / non-conduction between wirings, and to use an LTPS transistor as a transistor for controlling current.

[0368] For example, one of the transistors in the display unit F62 functions as a transistor for controlling the current flowing through the light-emitting device and can be called a drive transistor. One of the source and drain of the drive transistor is connected to the pixel electrode of the light-emitting device. It is preferable to use an LTPS transistor as the drive transistor. This allows the current flowing through the light-emitting device in the pixel circuit to be increased.

[0369] On the other hand, another transistor in the display unit F62 functions as a switch for controlling pixel selection / deselection and can also be called a selection transistor. The gate of the selection transistor is connected to a gate line, and one of the source and drain is connected to a source line (signal line). It is preferable to use an OS transistor as the selection transistor. This allows the pixel gradation to be maintained even when the frame frequency is significantly reduced (for example, 1 fps or less), and therefore power consumption can be reduced by stopping the driver when displaying a still image.

[0370] As described above, the display device of one embodiment of the present invention can have a high aperture ratio, high definition, high display quality, and low power consumption.

[0371] Note that a display device according to one embodiment of the present invention includes an OS transistor and a light-emitting device with an MML (metal maskless) structure. This structure can significantly reduce leakage current that may flow through the transistor and leakage current that may flow between adjacent light-emitting devices (also referred to as lateral leakage current or side leakage current). Furthermore, with this structure, when an image is displayed on the display device, a viewer can observe one or more of image clarity, image sharpness, high saturation, and a high contrast ratio. Note that a structure in which leakage current that may flow through the transistor and lateral leakage current between light-emitting devices are extremely low can minimize light leakage during black display (so-called floating black).

[0372] In particular, by applying the above-mentioned side-by-side (SBS) structure to light-emitting devices with an MML structure, the layers provided between the light-emitting devices (for example, organic layers shared between the light-emitting devices, also called common layers) are separated, which makes it possible to eliminate or greatly reduce side leakage.

[0373] A light-shielding layer F17 is preferably provided on the surface of the substrate F52 facing the substrate F51. The light-shielding layer F17 can be provided between adjacent light-emitting devices, on the connection portions F40, and on the circuit F64. Various optical members can be disposed on the outside of the substrate F52.

[0374] The substrate F51 and the substrate F52 can be made of the same materials as those used for the substrate F20.

[0375] The adhesive layer F42 can be made of a material that can be used for the resin layer F22.

[0376] The connection layer 242 may be made of an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.

[0377] 36B to 36D show other structural examples of the transistor.

[0378] The transistor 209 and the transistor 210 each include a conductive layer 221 functioning as a gate, an insulating layer 211 functioning as a gate insulating layer, a semiconductor layer 231 including a channel formation region 231i and a pair of low-resistance regions 231n, a conductive layer 222a connected to one of the pair of low-resistance regions 231n, a conductive layer 222b connected to the other of the pair of low-resistance regions 231n, an insulating layer 225 functioning as a gate insulating layer, a conductive layer 223 functioning as a gate, and an insulating layer 215 covering the conductive layer 223. The insulating layer 211 is located between the conductive layer 221 and the channel formation region 231i. The insulating layer 225 is located at least between the conductive layer 223 and the channel formation region 231i. Furthermore, an insulating layer 218 covering the transistor may be provided.

[0379] 36B shows an example of the transistor 209 in which the insulating layer 225 covers the top surface and side surfaces of the semiconductor layer 231. The conductive layer 222a and the conductive layer 222b are in contact with and connected to the low-resistance region 231n through openings provided in the insulating layer 225 and the insulating layer 215, respectively. One of the conductive layer 222a and the conductive layer 222b functions as a source, and the other functions as a drain.

[0380] On the other hand, in the transistor 210 shown in Figure 36(C), the insulating layer 225 overlaps with the channel formation region 231i of the semiconductor layer 231 but does not overlap with the low-resistance region 231n. For example, the insulating layer 225 is processed using the conductive layer 223 as a mask, so that the structure shown in Figure 36(C) can be manufactured. The insulating layer 215 is provided to cover the insulating layer 225 and the conductive layer 223. The conductive layer 222a and the conductive layer 222b are in contact with the low-resistance region 231n through openings provided in the insulating layer 215 and are connected to the low-resistance region 231n.

[0381] The insulating layer 225 of the transistor 209 shown in FIG. 36(D) has a region protruding from the conductive layer 223. The semiconductor layer 231 also has a pair of regions 231L between the channel formation region 231i and the pair of low-resistance regions 231n. The regions 231L overlap with the insulating layer 225 but do not overlap with the conductive layer 223. The electrical resistance of the regions 231L is approximately the same as or lower than the electrical resistance of the channel formation region 231i. Furthermore, the electrical resistance of the regions 231L is approximately the same as or higher than the electrical resistance of the low-resistance region 231n.

[0382] The region 231L functions as a buffer region for alleviating the drain electric field. Since the region 231L does not overlap with the conductive layer 223, a channel is hardly formed even when a gate voltage is applied to the conductive layer 223. The region 231L preferably has a higher carrier concentration than the channel formation region. This allows the region 231L to function as an LDD (Lightly Doped Drain) region. By providing an LDD region, a transistor with a high drain breakdown voltage can be realized.

[0383] FIG. 36D shows a structure in which the conductive layers 222a and 222b functioning as a source and a drain are formed in the same process as the conductive layer 223 functioning as a gate. For example, an insulating layer 225 is formed over a semiconductor layer 231, and a conductive film is formed over the semiconductor layer 231 and the insulating layer 225. Then, the conductive film is processed to form the conductive layers 222a, 222b, and 223. Forming the conductive layers 222a, 222b, and 223 in the same process can simplify the process. Note that in FIG. 36D, the conductive layers 222a and 222b are given the same hatching pattern as the conductive layer 223. An insulating layer 215 is provided over the conductive layers 222a, 222b, and 223.

[0384] Examples of transistor structures different from those shown in FIGS. 36A to 36D are shown in FIGS. 37A to 37C.

[0385] 37A shows a configuration example in which transistors 201V and 205V, which are VFETs, are used. The transistors 201V and 205V each include a conductive layer 221 functioning as a gate, an insulating layer 211 functioning as a gate insulating layer, a semiconductor layer 231, a conductive layer 222a, and a conductive layer 222b. The conductive layer 222a functions as one of a source and a drain, and the conductive layer 222b functions as the other of the source and the drain.

[0386] An insulating layer F60 is provided on the conductive layer 222a, and a conductive layer 222b is provided on the insulating layer F60. The conductive layer 222b and the insulating layer F60 have openings that reach the conductive layer 222a. A semiconductor layer 231 is provided to cover the openings and is in contact with the conductive layer 222a through the openings. The semiconductor layer 231 is in contact with side surfaces of the insulating layer F60 and the conductive layer 222b. The semiconductor layer 231 is preferably in contact with not only the side surfaces of the conductive layer 222b but also the top surface of the conductive layer 222b. A region of the semiconductor layer 231 in contact with the conductive layer 222a functions as one of the source region and the drain region, and a region of the semiconductor layer 231 in contact with the conductive layer 222b functions as the other of the source region and the drain region. In the semiconductor layer 231, a channel formation region is located between the source region and the drain region. An insulating layer 211 is provided on the semiconductor layer 231, and a conductive layer 221 is provided on the insulating layer 211. In the opening, the conductive layer 221 has a region that overlaps with the semiconductor layer 231 with the insulating layer 211 interposed therebetween.

[0387] The channel lengths of the transistors 201V and 205V can be controlled by the thickness of an insulating layer (here, insulating layer F60) sandwiched between the source electrode and the drain electrode. Therefore, the transistors 201V and 205V can be fabricated with high precision, each having a channel length shorter than the minimum exposure dimension of an exposure tool used to fabricate the transistors. By shortening the channel lengths of the transistors 201V and 205V, the on-state current can be increased. This allows for a display device that operates at high speed.

[0388] By applying VFETs to the pixel circuits of a display device, the area occupied by the pixel circuits can be reduced, resulting in a high-resolution display device.Furthermore, by applying VFETs to the drive circuits of a display device (e.g., one or both of the gate line drive circuit and the source line drive circuit), the area occupied by the drive circuits can be reduced, resulting in a display device with a narrow frame.

[0389] The insulating layer F60 can have a laminated structure. Fig. 37(B) shows an example of a configuration in which the insulating layer F60 has an insulating layer F60a, an insulating layer F60b on the insulating layer F60a, and an insulating layer F60c on the insulating layer F60b.

[0390] At least a region of the semiconductor layer 231 in contact with the insulating layer F60b functions as a channel formation region of the transistor 206. The insulating layer F60b preferably releases oxygen when heat is applied. This reduces oxygen vacancies (V O ), and oxygen deficiency (V O ) with hydrogen (hereinafter referred to as V O It is preferable to use an oxide insulating film as the insulating layer F60b. For example, a silicon oxide film or a silicon oxynitride film can be suitably used as the insulating layer F60b.

[0391] The insulating layer F60a and the insulating layer F60c function as barrier layers that prevent oxygen from being released from the insulating layer F60b toward the insulating layer F60a and the insulating layer F60c, respectively. By sandwiching the insulating layer F60b between the insulating layer F60a and the insulating layer F60c, the amount of oxygen supplied from the insulating layer F60b to the channel formation region can be increased, and oxygen deficiency (V O ) and V O It is possible to efficiently reduce H. Therefore, a transistor having good electrical characteristics and high reliability can be obtained. The insulating layer F60a and the insulating layer F60c can be made of the materials listed for the insulating layer 332.

[0392] The transistor 208 shown in Figure 37(C) includes an insulating layer 225 that functions as a gate insulating layer and a conductive layer 223 that functions as a gate. Figure 37(C) shows a structure example in which the conductive layer 223 is located between the insulating layers F60a and F60b. The insulating layer F60, the conductive layer 223, and the conductive layer 222b have an opening that reaches the conductive layer 222a. The insulating layer 225 is provided along the sidewall of the opening. The semiconductor layer 231 is provided in contact with the top surface and side surface of the insulating layer 225. The semiconductor layer 231 has a region sandwiched between the conductive layer 221 with the insulating layer 211 interposed therebetween and the conductive layer 223 with the insulating layer 225 interposed therebetween. Enlarged views of the insulating layer 225, the conductive layer 223, and their vicinity are shown in Figures 37(D) and 37(E). As shown in FIGS. 37(D) and 37(E), the insulating layer F60a has a region sandwiched between the insulating layer 225 and the conductive layer 222a. By providing the insulating layer F60a between the insulating layer 225 and the conductive layer 222a, it is possible to prevent oxygen from being supplied from the insulating layer 225 to the conductive layer 222a. This prevents the conductive layer 222a from being oxidized and the electrical resistance of the conductive layer 222a from increasing. Furthermore, as shown in FIG. 37(E), the thickness of the region of the insulating layer F60a that contacts the lower surface of the insulating layer 225 may be thinner than the thickness of the region that contacts the lower surface of the conductive layer 223. In this case, the insulating layer 225 has regions that contact the upper and side surfaces of the insulating layer F60a.

[0393] [Display device 700H] A display device 700H shown in FIG. 38 differs from the display device 700G mainly in that it includes a light receiving device F50.

[0394] The light-receiving device F50 includes a pixel electrode F11S, a conductive layer F35S on the pixel electrode F11S, a layer F13S on the conductive layer F35S, a common layer F14 on the layer F13S, and a common electrode F15 on the common layer F14. The layer F13S includes at least an active layer.

[0395] The conductive layer F05S is in contact with the conductive layer 222b of the transistor 205 through an opening formed in the insulating layer F86, the light-shielding layer F09, the insulating layer 215, and the insulating layer 213, and is connected to the conductive layer 222b. The pixel electrode F11S is connected to the conductive layer 222b through the conductive layer F05S. A layer F07S is provided on the conductive layer F05S, and the pixel electrode F11S is provided to cover the conductive layer F05S and the layer F07S. The conductive layer F05S has a recess at a position overlapping with the opening formed in the insulating layer F86, the light-shielding layer F09, the insulating layer 215, and the insulating layer 213. The recess is filled with the layer F07S.

[0396] A portion of the top surface and side surfaces of the layer F13S are covered with an insulating layer F25 and an insulating layer F27. A mask layer F18S is located between the layer F13S and the insulating layer F25. A common layer F14 is provided on the layer F13S, the insulating layer F25, and the insulating layer F27, and a common electrode F15 is provided on the common layer F14. The common layer F14 is a continuous film provided in common to the light-receiving device and the light-emitting device.

[0397] This embodiment mode can be combined with other embodiment modes as appropriate.

[0398] (Fourth embodiment) In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to FIGS.

[0399] The electronic devices of this embodiment include the display device of one embodiment of the present invention in their display portions. The display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, the display device of one embodiment of the present invention can be used in the display portions of various electronic devices.

[0400] Examples of electronic devices include electronic devices with relatively large screens such as television sets, desktop or notebook computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound playback devices.

[0401] In particular, the display device of one embodiment of the present invention can be suitably used in electronic devices having a relatively small display area because it can increase the resolution. Examples of such electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), and head-mounted wearable devices such as VR devices (head-mounted displays), AR glasses-type devices, and MR devices.

[0402] The display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 × 720 pixels), FHD (1920 × 1080 pixels), WQHD (2560 × 1440 pixels), WQXGA (2560 × 1600 pixels), 4K (3840 × 2160 pixels), or 8K (7680 × 4320 pixels). A resolution of 4K, 8K, or higher is particularly preferable. Furthermore, the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or higher, preferably 300 ppi or higher, more preferably 500 ppi or higher, more preferably 1000 ppi or higher, more preferably 2000 ppi or higher, more preferably 3000 ppi or higher, more preferably 5000 ppi or higher, and even more preferably 7000 ppi or higher. By using a display device having either or both of high resolution and high definition, it is possible to further enhance the sense of realism and depth. Furthermore, the screen ratio (aspect ratio) of the display device of one embodiment of the present invention is not particularly limited. For example, the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.

[0403] The electronic device of this embodiment may also be configured to have a sensor (including the function of sensing, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays).

[0404] The electronic device of the present embodiment can have various functions, such as a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, time, etc., a function to execute various software (programs), a wireless communication function, a function to read out programs or data recorded on a recording medium, etc.

[0405] 39(A) to 39(D), an example of a wearable device that can be worn on the head will be described. These wearable devices have at least one of the following functions: a function to display AR content, a function to display VR content, a function to display SR content, and a function to display MR content. By having an electronic device have the function to display at least one of AR, VR, SR, and MR content, it is possible to enhance the user's sense of immersion.

[0406] 39(A) and the electronic device 8700B shown in Fig. 39(B) each include a pair of display panels 8751, a pair of housings 8721, a communication unit (not shown), a pair of mounting units 8723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 8753, a frame 8757, and a pair of nose pads 8758. Note that the display panel 8751 is omitted in Fig. 39(B).

[0407] The display device of one embodiment of the present invention can be applied to the display panel 8751. Therefore, the electronic device can provide an extremely high-resolution display.

[0408] The electronic device 8700A and the electronic device 8700B can each project an image displayed on the display panel 8751 onto a display area 8756 of an optical member 8753. Because the optical member 8753 is translucent, the user can see the image displayed in the display area superimposed on a transmitted image visually recognized through the optical member 8753. Therefore, the electronic device 8700A and the electronic device 8700B are each electronic devices capable of AR display.

[0409] The electronic device 8700A and the electronic device 8700B can be provided with a camera capable of capturing an image of the front as an imaging unit. The electronic device 8700A and the electronic device 8700B can also be provided with an acceleration sensor such as a gyro sensor to detect the orientation of the user's head and display an image corresponding to the orientation in the display region 8756.

[0410] The communication unit has a wireless communication device, and can supply a video signal, etc. Instead of or in addition to the wireless communication device, a connector can be provided to which a cable through which a video signal and a power supply potential can be connected.

[0411] The electronic device 8700A and the electronic device 8700B are provided with a battery (not shown) that can be charged wirelessly and / or by wire.

[0412] The housing 8721 can be provided with a touch sensor module. The touch sensor module has a function of detecting a touch on the outer surface of the housing 8721. The touch sensor module can detect a tap operation or a slide operation by the user and perform various processes. For example, a tap operation can perform a process such as pausing or resuming a video, and a slide operation can perform a process such as fast-forwarding or fast-rewinding. Furthermore, providing a touch sensor module on each of the two housings 8721 can expand the range of operations.

[0413] Various touch sensors can be used as the touch sensor module. For example, various types of touch sensors can be used, such as a capacitance type, a resistive film type, an infrared type, an electromagnetic induction type, a surface acoustic wave type, and an optical type. In particular, it is preferable to use a capacitance type or an optical type sensor in the touch sensor module.

[0414] When an optical touch sensor is used, a photoelectric conversion device (also called a photoelectric conversion element) can be used as the light receiving device. The active layer of the photoelectric conversion device can be made of either or both of an inorganic semiconductor and an organic semiconductor.

[0415] 39(C) and the electronic device 8800B shown in Fig. 39(D) each include a pair of display units 8820, a housing 8821, a communication unit 8822, a pair of mounting units 8823, a control unit 8824, a pair of imaging units 8825, and a pair of lenses 8832. Note that the display unit 8820, the communication unit 8822, and the imaging unit 8825 are omitted in Fig. 39(D).

[0416] The display device of one embodiment of the present invention can be applied to the display portion 8820. Therefore, an electronic device capable of displaying images with extremely high resolution can be provided, which allows a user to feel a high sense of immersion.

[0417] The display portion 8820 is provided inside the housing 8821 at a position that can be viewed through a lens 8832. In addition, by displaying different images on the pair of display portions 8820, a three-dimensional display using parallax can be performed.

[0418] The electronic device 8800A and the electronic device 8800B can each be referred to as an electronic device for VR. A user wearing the electronic device 8800A or the electronic device 8800B can view an image displayed on the display portion 8820 through the lens 8832.

[0419] The electronic device 8800A and the electronic device 8800B preferably have a mechanism for adjusting the left-right positions of the lens 8832 and the display unit 8820 so that the lens 8832 and the display unit 8820 are optimally positioned according to the position of the user's eyes. Also, the electronic device 8800A and the electronic device 8800B preferably have a mechanism for adjusting the focus by changing the distance between the lens 8832 and the display unit 8820.

[0420] The attachment unit 8823 allows the user to attach the electronic device 8800A or the electronic device 8800B to the head. Note that in Fig. 39(C) and other figures, the attachment unit 8823 has an example shape similar to the temples of glasses, but is not limited to this. The attachment unit 8823 may have any shape that can be worn by the user, such as a helmet or band.

[0421] The imaging unit 8825 has a function of acquiring external information. Data acquired by the imaging unit 8825 can be output to the display unit 8820. An image sensor can be used for the imaging unit 8825. Furthermore, a plurality of cameras can be provided to support a plurality of angles of view, such as a telephoto and a wide angle.

[0422] Although an example including the imaging unit 8825 is shown here, a distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to an object may be provided. That is, the imaging unit 8825 is one aspect of the detection unit. For example, an image sensor or a range image sensor such as a LIDAR (Light Detection and Ranging) can be used as the detection unit. By using an image obtained by the camera and an image obtained by the range image sensor, more information can be obtained, enabling more accurate gesture operations.

[0423] The electronic device 8800A may also have a vibration mechanism that functions as bone conduction earphones. For example, a configuration having such a vibration mechanism can be applied to one or more of the display unit 8820, the housing 8821, and the wearing unit 8823. This allows the user to enjoy video and audio simply by wearing the electronic device 8800A, without the need for separate audio equipment such as headphones, earphones, or speakers.

[0424] The electronic device 8800A and the electronic device 8800B may each have an input terminal to which a cable for supplying a video signal from a video output device or the like and power for charging a battery provided in the electronic device can be connected.

[0425] The electronic device of one embodiment of the present invention can also have a function of wirelessly communicating with an earphone 8750. The earphone 8750 has a communication unit (not shown) and has a wireless communication function. The earphone 8750 can receive information (e.g., audio data) from the electronic device through the wireless communication function. For example, the electronic device 8700A shown in FIG. 39A has a function of transmitting information to the earphone 8750 through the wireless communication function. Furthermore, for example, the electronic device 8800A shown in FIG. 39C has a function of transmitting information to the earphone 8750 through the wireless communication function.

[0426] The electronic device may have an earphone unit. An electronic device 8700B shown in FIG. 39(B) has an earphone unit 8727. For example, the earphone unit 8727 and a control unit may be connected to each other by wire. Part of the wiring connecting the earphone unit 8727 and the control unit may be disposed inside the housing 8721 or the wearing unit 8723.

[0427] 39(D) includes an earphone unit 8827. For example, the earphone unit 8827 and the control unit 8824 can be configured to be connected to each other by wire. Part of the wiring connecting the earphone unit 8827 and the control unit 8824 may be disposed inside the housing 8821 or the wearing unit 8823. The earphone unit 8827 and the wearing unit 8823 may also have magnets. This allows the earphone unit 8827 to be fixed to the wearing unit 8823 by magnetic force, which is preferable because it makes storage easier.

[0428] The electronic device may have an audio output terminal to which earphones or headphones can be connected. The electronic device may also have one or both of an audio input terminal and an audio input mechanism. For example, a sound collection device such as a microphone can be used as the audio input mechanism. By having the audio input mechanism, the electronic device may be endowed with the functionality of a so-called headset.

[0429] As described above, the electronic devices of one embodiment of the present invention are suitable for both eyeglasses (such as the electronic devices 8700A and 8700B) and goggles (such as the electronic devices 8800A and 8800B).

[0430] An electronic device according to one embodiment of the present invention can transmit information to an earphone via a wired or wireless connection.

[0431] An electronic device 6500 shown in FIG. 40A is a portable information terminal that can be used as a smartphone.

[0432] The electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508. The display portion 6502 has a touch panel function.

[0433] The display device of one embodiment of the present invention can be applied to the display portion 6502.

[0434] FIG. 40(B) is a schematic cross-sectional view including the end portion of the housing 6501 on the microphone 6506 side.

[0435] A light-transmitting protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.

[0436] A display panel 6511, an optical member 6512, and a touch sensor panel 6513 are fixed to the protective member 6510 by adhesive layers (not shown).

[0437] In an area outside the display unit 6502, a part of the display panel 6511 is folded back, and an FPC 6515 is connected to the folded back part. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on a printed circuit board 6517.

[0438] The display device of one embodiment of the present invention can be applied to the display panel 6511. Therefore, an extremely lightweight electronic device can be realized. Furthermore, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted thereon while keeping the thickness of the electronic device small. Furthermore, by folding back a part of the display panel 6511 and arranging a connection portion with the FPC 6515 on the back side of the pixel portion, an electronic device with a narrow frame can be realized.

[0439] 40C shows an example of a television set. A television set 7100 includes a display portion 7000 built in a housing 7101. Here, the housing 7101 is supported by a stand 7103.

[0440] The display device of one embodiment of the present invention can be applied to the display portion 7000.

[0441] 40C can be operated using operation switches provided on the housing 7101 and a separate remote control 7111. Alternatively, the display portion 7000 may be provided with a touch sensor, and the television set 7100 may be operated by touching the display portion 7000 with a finger or the like. The remote control 7111 may have a display portion that displays information output from the remote control 7111. Using operation keys or a touch panel provided on the remote control 7111, the channel and volume can be controlled, and an image displayed on the display portion 7000 can be controlled.

[0442] The television device 7100 is configured to include a receiver, a modem, and the like. The receiver can receive general television broadcasts. In addition, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.

[0443] 40D shows an example of a notebook computer. A computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. A display portion 7000 is incorporated in the housing 7211.

[0444] The display device of one embodiment of the present invention can be applied to the display portion 7000.

[0445] 40(E) and 40(F) show an example of digital signage.

[0446] 40E includes a housing 7301, a display portion 7000, and a speaker 7303. The digital signage 7300 may further include an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.

[0447] 40F shows a digital signage 7400 attached to a cylindrical pillar 7401. The digital signage 7400 has a display unit 7000 provided along the curved surface of the pillar 7401.

[0448] In FIGS. 40E and 40F, the display device of one embodiment of the present invention can be applied to the display portion 7000.

[0449] The larger the display unit 7000, the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it will attract people's attention, which can increase the advertising effectiveness of, for example, advertisements.

[0450] Applying a touch panel to the display unit 7000 is preferable because it not only displays images or videos on the display unit 7000 but also allows the user to intuitively operate it. Furthermore, when used to provide information such as route information or traffic information, intuitive operation can improve usability.

[0451] 40(E) and 40(F), the digital signage 7300 or the digital signage 7400 is preferably capable of wirelessly linking with an information terminal 7311 or an information terminal 7411, such as a smartphone carried by a user. For example, advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Furthermore, by operating the information terminal 7311 or the information terminal 7411, the display on the display unit 7000 can be switched.

[0452] It is also possible to run a game on the digital signage 7300 or the digital signage 7400 using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller), thereby allowing an unspecified number of users to simultaneously participate in and enjoy the game.

[0453] The electronic devices shown in Figures 41(A) to 41(G) have a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays), a microphone 9008, etc.

[0454] 41A to 41G, the display device of one embodiment of the present invention can be applied to the display portion 9001.

[0455] 41(A) to 41(G) have various functions. For example, they may have a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing using various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc. Note that the functions of the electronic devices are not limited to these, and they may have various other functions. The electronic devices may have multiple display units. Furthermore, the electronic devices may have a function to include a camera or the like to capture still images or videos and store them on a recording medium (external or built-in to the camera), a function to display the captured images on the display unit, etc.

[0456] The electronic devices shown in FIGS. 41(A) to 41(G) will be described in detail below.

[0457] FIG. 41A is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 can be used as, for example, a smartphone. Note that the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like. The mobile information terminal 9101 can display text and image information on multiple surfaces thereof. FIG. 41A shows an example in which three icons 9050 are displayed. Information 9051, indicated by a dashed rectangle, can also be displayed on another surface of the display unit 9001. Examples of the information 9051 include notifications of incoming emails, SNS messages, phone calls, etc., the title of the email or SNS message, the sender's name, the date and time, the remaining battery level, and radio wave intensity. Alternatively, the icon 9050 or the like may be displayed in the position where the information 9051 is displayed.

[0458] 41B is a perspective view showing a mobile information terminal 9102. The mobile information terminal 9102 has a function of displaying information on three or more surfaces of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different surfaces. For example, a user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while the mobile information terminal 9102 is placed in a breast pocket of clothes. The user can check the display without taking the mobile information terminal 9102 out of the pocket and decide, for example, whether to answer a call.

[0459] 41C is a perspective view of a tablet terminal 9103. The tablet terminal 9103 is capable of executing various applications such as mobile phone calls, e-mails, text browsing and creation, music playback, internet communication, computer games, etc. The tablet terminal 9103 has a display portion 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front side of a housing 9000, operation keys 9005 as operation buttons on the side of the housing 9000, and a connection terminal 9006 on the bottom.

[0460] FIG. 41D is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can be used as, for example, a smart watch (registered trademark). The display surface of the display portion 9001 is curved, and display can be performed along the curved display surface. The mobile information terminal 9200 can also perform hands-free conversation by communicating with, for example, a headset capable of wireless communication. The mobile information terminal 9200 can also perform data transmission and reception with another information terminal and charge itself through a connection terminal 9006. Note that charging can be performed by wireless power supply.

[0461] 41(E) to 41(G) are perspective views showing a foldable mobile information terminal 9201. FIG. 41(E) shows the mobile information terminal 9201 in an unfolded state, FIG. 41(G) shows it in a folded state, and FIG. 41(F) is a perspective view showing a state in the process of changing from one of FIG. 41(E) and FIG. 41(G) to the other. The mobile information terminal 9201 is highly portable when folded, and has a seamless, wide display area when unfolded, providing excellent viewability of the display. A display portion 9001 of the mobile information terminal 9201 is supported by three housings 9000 connected by hinges 9055. For example, the display portion 9001 can be bent with a curvature radius of 0.1 mm to 150 mm.

[0462] This embodiment mode can be combined with other embodiment modes as appropriate. [Example]

[0463] In this example, a workpiece WP manufactured by a manufacturing method of a display device according to one embodiment of the present invention will be described with reference to FIGS.

[0464] Fig. 42(A) is a perspective view illustrating the structure of the workpiece WP produced in this example, Fig. 42(B) is a top view illustrating a portion of Fig. 42(A), and Fig. 42(C) is a cross-sectional view taken along the cutting line P1-P2 shown in Fig. 42(B).

[0465] FIG. 43 is a diagram illustrating the current density-luminance characteristics of the light-emitting device fabricated in this example.

[0466] FIG. 44 is a diagram illustrating the luminance-current efficiency characteristics of the light-emitting device fabricated in this example.

[0467] FIG. 45 is a diagram illustrating the voltage-luminance characteristics of the light-emitting device fabricated in this example.

[0468] FIG. 46 is a diagram illustrating the voltage-current density characteristics of the light-emitting device fabricated in this example.

[0469] FIG. 47 shows the light emitting device fabricated in this example with a luminance of 1000 cd / m 2 10 is a diagram illustrating an emission spectrum when light is emitted at a luminance of 1000 .mu.m.

[0470] <Example of workpiece WP 1> The workpiece WP fabricated in this example has a set of pixels 703 (see FIG. 42(A)). The set of pixels 703 includes light-emitting devices D1, D2, and D3 (see FIG. 42(B)). The workpiece WP also has a substrate 510 and a functional layer 520, and the functional layer 520 includes an insulating layer 521 (see FIG. 42(C)). A silicon substrate was used for the substrate 510, and silicon oxide was used for the insulating layer 521. The workpiece WP does not include a pixel circuit or a driving circuit.

[0471] <Configuration of light-emitting device D1> The light-emitting device D1 has a rectangular shape with a width of 2.38 μm and a length of 6.83 μm (see FIG. 42(B)). The area of ​​the light-emitting device D1 is approximately 16.26 μm. 2 and the perimeter is approximately 18.42 μm.

[0472] The light-emitting device D1 also includes an electrode 551A, a layer 104A, a unit 103A, an intermediate layer 106A, a unit 103A2, a layer 105A, and an electrode 552A (see FIG. 42(C)). The electrode 551A is formed on the layer REFA, and a layer 573 is formed on the electrode 551A.

[0473] The layer REFA includes a 50 nm thick layer containing titanium, a 70 nm thick layer containing aluminum, and a 2 nm thick layer containing titanium, and the electrode 551A includes ITSO.

[0474] Layer 104A contains a hole-injecting material. Specifically, it contains N-(biphenyl-4-yl)-N-[4-(9-phenyl-9H-carbazol-3-yl)phenyl]-9,9-dimethyl-9H-fluoren-2-amine (abbreviated as PCBBiF) and an electron-accepting material (abbreviated as OCHD-003) in a weight ratio of PCBBiF:OCHD-003 = 1:0.03, and has a thickness of 10 nm. OCHD-003 contains fluorine and has a molecular weight of 672.

[0475] Both unit 103A and unit 103A2 include a layer having hole transport properties, a layer containing a light-emitting material, and a layer having electron transport properties. Both unit 103A and unit 103A2 emit blue light. Intermediate layer 106A supplies electrons to unit 103A and holes to unit 103A2. Layer 105A includes a material having electron injection properties.

[0476] <Configuration of light-emitting device D2> The light-emitting device D2 has a rectangular shape with a width of 3.36 μm and a length of 3.53 μm (see FIG. 42(B)). The area of ​​the light-emitting device D2 is approximately 11.86 μm. 2 and the perimeter is approximately 13.78 μm.

[0477] The light-emitting device D2 also includes an electrode 551B, a layer 104B, a unit 103B, an intermediate layer 106B, a unit 103B2, a layer 105B, and an electrode 552B (see FIG. 42(C)). The electrode 551B is formed on the layer REFB, and is disposed with a gap 551AB between it and the electrode 551A. A layer 573 is formed on the electrode 551B.

[0478] Layer REFB has the same structure as layer REFA, and electrode 551B includes ITSO. Layer 104B is disposed with gap 104AB between it and layer 104A. Layer 104B includes the same material as layer 104A.

[0479] Both unit 103B and unit 103B2 include a layer having hole transport properties, a layer containing a light-emitting material, and a layer having electron transport properties. Both unit 103B and unit 103B2 emit green light. Intermediate layer 106B supplies electrons to unit 103B and holes to unit 103B2. Layer 105B includes a material having electron injection properties. Unit 103B is disposed with gap 103AB between it and unit 103A. Intermediate layer 106B is disposed with gap 106AB between it and intermediate layer 106A.

[0480] <Configuration of light-emitting device D3> The light-emitting device D3 has a rectangular shape with a width of 3.36 μm and a length of 2.21 μm (see FIG. 42(B)). The area of ​​the light-emitting device D3 is approximately 7.43 μm. 2 and the perimeter is approximately 11.14 μm.

[0481] The light-emitting device D3 also includes an electrode 551C, a layer 104C, a unit 103C, an intermediate layer 106C, a unit 103C2, a layer 105C, and an electrode 552C (see FIG. 42(C)). The electrode 551C is formed on the layer REFC, and is disposed with a gap between it and the electrode 551B. A layer 573 is formed on the electrode 551A.

[0482] Layer REFC has the same structure as layer REFA, and electrode 551C includes ITSO. Layer 104C is disposed with a gap between it and layer 104B. Layer 104C includes the same material as layer 104A.

[0483] Both unit 103C and unit 103C2 include a layer having hole transport properties, a layer containing a light-emitting material, and a layer having electron transport properties. Unit 103C and unit 103C2 both emit red light. Intermediate layer 106C supplies electrons to unit 103C and holes to unit 103C2. Layer 105C includes a material having electron injection properties.

[0484] <<Operation Characteristics of Light-Emitting Device D1, Light-Emitting Device D2, and Light-Emitting Device D3>> When power was supplied, light-emitting devices D1, D2, and D3 emitted light. The operating characteristics of light-emitting devices D1, D2, and D3 were measured at room temperature (see FIGS. 43 to 47). A spectroradiometer (SR-UL1R, manufactured by Topcon Corporation) was used to measure the luminance and emission spectrum.

[0485] Light-emitting device D1, light-emitting device D2, and light-emitting device D3 all exhibited favorable characteristics. For example, at a voltage lower than the voltage at which light emission begins, it was possible to suppress the unnecessary current flowing through light-emitting device D1, light-emitting device D2, and light-emitting device D3. It was also possible to suppress the current that does not contribute to light emission. It was also possible to suppress the current flowing along the sides of the light-emitting device at a voltage lower than the voltage at which light emission begins. It was also possible to suppress the current component that flows depending on the perimeter ... 2 More than 10000cd / m 2 High current efficiency was observed in the following range. Furthermore, good current density-voltage characteristics were observed, with current starting to flow in the range of 3 V to 5 V. Furthermore, an emission spectrum without color mixing was obtained.

[0486] <How to make the workpiece WP> The workpiece WP was fabricated using the method described in embodiment 2. Further details are provided below.

[0487] In phase PH0, an insulating layer 521 was formed on the substrate 510 by using a CVD method. Specifically, a film containing silicon oxide was formed on the silicon substrate.

[0488] In phase PH1, step 1 was skipped. In step 2 of phase PH1, films that would later become layers REFA, REFB, REFC, and REFE were formed on insulating layer 521, and conductive film 551 was then formed. Specifically, a 50-nm-thick titanium-containing film, a 70-nm-thick aluminum-containing film, a 2-nm-thick titanium-containing film, and a 10-nm-thick ITSO-containing film were stacked in this order using a sputtering method. Then, layers REFA, REFB, REFC, REFE, electrode 551A, electrode 551B, gap 551AB, electrode 551C, and conductive layer VCOM2 were formed. Specifically, photolithography was used.

[0489] In step 6 of phase PH2A, the layer SCRE1 was not formed, and in step 6 of phase PH2C, the layer SCRE1 was formed when the layer SCRC1 was formed.

[0490] In step 3 of phase PH3, photoresist PR and etching were used to reduce the outlines of layers SCRA1, SCRB1, and SCRC1. Specifically, a tungsten-containing film was used for layers SCRA1, SCRB1, SCRC1, and SCRE1, and a SF6-containing gas was used to etch layers SCRA1, SCRB1, SCRC1, and SCRE1. Additionally, an aluminum oxide-containing film was used for layers SCRA2, SCRB2, SCRC2, and SCRE2, and a CHF3, He, and CH4-containing gas was used to etch layers SCRA2, SCRB2, SCRC2, and SCRE2.

[0491] In step 2 of phase PH5, a conductive film 552 was formed using a resistance heating method. Specifically, a 15-nm-thick film containing silver (Ag) and magnesium (Mg) in a volume ratio of Ag:Mg=1:0.1 was co-evaporated. In step 3 of phase PH5, a layer 573 was formed using a sputtering method. Specifically, a 70-nm-thick film containing ITO was formed. [Example]

[0492] FIG. 48 is a top view illustrating a workpiece configuration different from that shown in FIG. 42(A).

[0493] FIG. 49 is a diagram illustrating the current density-luminance characteristics of the light-emitting device fabricated in this example.

[0494] FIG. 50 is a diagram illustrating the luminance-current efficiency characteristics of the light-emitting device fabricated in this example.

[0495] FIG. 51 is a diagram illustrating the voltage-luminance characteristics of the light-emitting device fabricated in this example.

[0496] FIG. 52 is a diagram illustrating the voltage-current density characteristics of the light-emitting device fabricated in this example.

[0497] FIG. 53 shows the light emitting device fabricated in this example with a luminance of 1000 cd / m 2 10 is a diagram illustrating an emission spectrum when light is emitted at a luminance of 1000 .mu.m.

[0498] FIG. 54 is a diagram illustrating the voltage-current density characteristics of the light-emitting device fabricated in this example.

[0499] FIG. 55 is a diagram illustrating the current density-current efficiency characteristics of the light-emitting device fabricated in this example.

[0500] FIG. 56 is a diagram illustrating the current density-external quantum efficiency characteristics of the light-emitting device fabricated in this example.

[0501] FIG. 57 is a diagram illustrating the luminance-blue index characteristics of the light-emitting device fabricated in this example. The blue index (BI) is one of the indices that represent the characteristics of a blue light-emitting device, and is the value obtained by dividing the current efficiency (cd / A) by the y chromaticity. In general, blue light with high color purity is useful for expressing a wide color gamut. Furthermore, the higher the color purity of blue light, the smaller the y chromaticity tends to be. Therefore, the value obtained by dividing the current efficiency (cd / A) by the y chromaticity serves as an index showing the usefulness of a blue light-emitting device. In other words, a blue light-emitting device with a high BI is suitable for realizing a display device with a wide color gamut and high efficiency.

[0502] <Example 2 of workpiece WP> The workpiece WP fabricated in this example has a set of pixels 703. The set of pixels 703 includes light-emitting devices D4, D5, and D6 (see FIG. 48). The set of pixels 703 of the workpiece WP described in this example is smaller than the set of pixels 703 of the workpiece WP described in Example 1. The workpiece WP described in this example also includes the set of pixels 703 at a resolution of 5009 ppi. Here, differences will be described in detail, and the above description will be used for similar configurations.

[0503] <Configuration of light-emitting device D4> The light-emitting device D4 has a rectangular shape with a width of 1.10 μm and a length of 3.98 μm (see FIG. 48). The area of ​​the light-emitting device D4 is approximately 4.38 μm. 2 and the perimeter is approximately 10.16 μm. Similarly to the light-emitting device D1, the light-emitting device D4 includes two units that emit blue light.

[0504] <<Configuration of the light-emitting device D5>> The light-emitting device D5 has a rectangular shape with a width of 1.79 μm and a length of 1.775 μm (see FIG. 48). The area of ​​the light-emitting device D5 is approximately 3.18 μm. 2and the perimeter is approximately 7.13 μm. Similarly to the light-emitting device D2, the light-emitting device D5 includes two units that emit green light.

[0505] <Configuration of light-emitting device D6> The light-emitting device D6 has a rectangular shape with a width of 1.79 μm and a length of 1.115 μm (see FIG. 48). The area of ​​the light-emitting device D6 is approximately 2.00 μm. 2 and the perimeter is approximately 5.81 μm. Similarly to the light-emitting device D3, the light-emitting device D6 includes two units that emit red light.

[0506] <<Operation Characteristics of Light-Emitting Device D4, Light-Emitting Device D5, and Light-Emitting Device D6>> When power was supplied, light-emitting devices D4, D5, and D6 emitted light. The operating characteristics of light-emitting devices D4, D5, and D6 were measured at room temperature (see FIGS. 49 to 57). A spectroradiometer (SR-UL1R, manufactured by Topcon Corporation) was used to measure the luminance and emission spectrum.

[0507] Light-emitting devices D4, D5, and D6 all exhibited good characteristics. Representative operating characteristics are shown in Table 1. The blue index of light-emitting device D4 was 10 mA / cm 2 At a current density of 145.1 (cd / A / y).

[0508] [Table 1]

[0509] For example, at a voltage lower than the voltage at which light emission begins, it was possible to suppress the unnecessary current flowing through light-emitting device D4, light-emitting device D5, and light-emitting device D6. It was also possible to suppress the current that does not contribute to light emission. It was also possible to suppress the current that flows along the side of the light-emitting device at a voltage lower than the voltage at which light emission begins. It was also possible to suppress the current component that flows depending on the perimeter of the light-emitting device at a voltage lower than the voltage at which light emission begins. It was also possible to suppress the current component that flows depending on the perimeter of the light-emitting device at a voltage lower than the voltage at which light emission begins. 2 More than 10000cd / m 2 High current efficiency was observed in the following range. Furthermore, good current density-voltage characteristics were observed, with current starting to flow in the range of 3 V to 5 V. Furthermore, an emission spectrum without color mixing was obtained.

[0510] <How to make the workpiece WP> A workpiece WP was fabricated using the same method as that described in the second embodiment. [Explanation of symbols]

[0511] ELA Light ELB Hikari ELC Hikari Con Connection ES membrane ESA layer ESAB gap ESB layer ESC layer ESE layer F11B pixel electrode F11G pixel electrode F11R pixel electrode F11S pixel electrode F13B layer F13G layer F13R layer F13S layer F14 common layer F15 common electrode F17 Light blocking layer F18B mask layer F18G Mask layer F18R mask layer F18S Mask layer F20 board F22 resin layer F25 insulating layer F27 Insulation layer F30B Light Emitting Device F30G Light Emitting Device F30R Light Emitting Device F31 protective layer F33 Lens Array F35B conductive layer F35G conductive layer F35q conductive layer F35R conductive layer F35S conductive layer F40 connection F42 adhesive layer F50 light receiving device F51 board F52 board F60 insulating layer F60a insulation layer F60b insulation layer F60c insulation layer F62 Display section F64 circuit F65 wiring F66 conductive layer F70B conductive layer F70G conductive layer F70R conductive layer F70S conductive layer F73 Integrated Circuit F82 insulating layer F86 Insulation Layer F88 Insulation Layer PR Photoresist REFA layer REFB layer REFC layer REFE layer 40 pixels 71 subpixels 74 pixel array 75 circuits 76 circuits 77 layers 78 layers 79 layers 103A unit 103a membrane 103AB Gap 103AS side 103B Unit 103b Membrane 103BS side 103C unit 103c membrane 104A layer 104a membrane 104AB Gap 104B layer 104b Membrane 104C layer 104c membrane 105 layers 105A layer 105B layer 105C layer 106A Middle layer 106a Membrane 106AB Gap 106B Middle layer 106b Membrane 106C middle layer 106c membrane 201 Transistor 201V transistor 204 Connection 205 Transistor 205V transistor 206 Transistor 208 Transistor 209 Transistor 210 Transistor 211 Insulating layer 213 Insulating Layer 215 Insulating Layer 218 Insulating Layer 221 Conductive layer 222a conductive layer 222b Conductive layer 223 Conductive Layer 225 Insulating Layer 231 Semiconductor layer 231i Channel formation region 231L area 231n Low resistance region 240 capacity 241 Conductive Layer 242 Connection Layer 243 Insulating Layer 245 Conductive Layer 249B Conductive layer 249G conductive layer 249R conductive layer 249S conductive layer 251 Conductive Layer 252 Conductive layer 253 Insulating Layer 254 Insulating Layer 256 conductive layer 261 Insulating Layer 262 Insulating Layer 263 Insulating Layer 264 Insulating Layer 265 Insulating Layer 267 Insulating Layer 271 Conductive Layer 274 Plug 274a conductive layer 274b Conductive layer 280 Display Module 281 Display section 282 Circuit section 283 Pixel circuit section 283a Pixel circuit 284 pixel section 284a pixels 285 Terminal section 286 Wiring section 290 FPC 291 Circuit Board 292 PCB 301 Substrate 301A board 301B board 310 Transistor 310A transistor 310B transistor 311 Conductive layer 312 Low resistance region 313 Insulating Layer 314 Insulating Layer 315 Element isolation layer 320 transistors 320A transistor 320B transistor 320V transistor 321 Semiconductor layer 323 Insulation Layer 324 Conductive Layer 325 Conductive Layer 325a conductive layer 325b conductive layer 326 Insulating Layer 327 Conductive Layer 328 Insulating Layer 329 Insulating Layer 331 Substrate 332 Insulating layer 335 Insulation Layer 336 Insulating Layer 341 Conductive Layer 342 Conductive Layer 343 Plug 344 Insulating Layer 345 Insulation Layer 346 Insulating Layer 347 Bump 348 Adhesive layer 490 opening 501 Insulation layer 510 board 520 Functional Layer 521 Insulating layer 529_1 layer 529_1A opening 529_1B opening 529_2 layer 529_2A opening 529_2B opening 529_2C opening 529_2E opening 530A pixel circuit 530B pixel circuit 530C pixel circuit 550A Light Emitting Device 550B Light Emitting Device 550C Light Emitting Device 551 Conductive film 551A Electrode 551AB Gap 551B Electrode 551C electrode 552 Conductive film 552A electrode 552B Electrode 552C electrode 573 layers 700 Display device 700A display device 700B display unit 700C display unit 700D display unit 700E display unit 700F display device 700G display device 700H display device 702A pixel 702B pixels 702C pixels 703 pixels 731 Display area 6500 Electronic equipment 6501 Housing 6502 Display section 6503 Power button 6504 Button 6505 Speaker 6506 Microphone 6507 Camera 6508 Light source 6510 Protective materials 6511 Display Panel 6512 Optical components 6513 Touch Sensor Panel 6515 FPC 6516 IC 6517 Printed Circuit Board 6518 Battery 7000 Display 7100 Television equipment 7101 Housing 7103 Stand 7111 Remote control device 7200 Computer 7212 keyboard 7213 Pointing Device 7214 External connection port 7300 Digital Signage 7301 Housing 7303 Speaker 7311 Information terminals 7400 Digital Signage 7401 Pillar 7411 Information terminals 8700A Electronic equipment 8700B Electronic equipment 8721 Housing 8723 Mounting part 8727 Earphones 8750 earphones 8751 Display Panel 8753 Optical components 8756 Display area 8757 frames 8758 Nose pad 8800A electronic equipment 8800B Electronic equipment 8820 Display section 8821 Housing 8822 Communications Department 8823 Mounting part 8824 Control section 8825 Imaging unit 8827 Earphones 8832 Lens 9000 chassis 9001 Display section 9002 Camera 9003 Speaker 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Icon 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9101 Mobile Information Terminal 9102 Mobile Information Terminal 9103 Tablet device 9200 Mobile Information Terminal 9201 Mobile Information Terminal

Claims

1. A method for manufacturing a display device, comprising first to sixth phases, In the first phase, a first electrode, a second electrode, and a first gap are formed on an insulating layer; the first gap is sandwiched between the first electrode and the second electrode; In step 1 of the second phase, a first film is formed on the first electrode and the second electrode; In step 2 of the second phase, a second film is formed on the first film; In step 3 of the second phase, a third film is formed on the second film; In step 4 of the second phase, a fourth film is formed on the third film; In step 5 of the second phase, the fourth film is removed from above the second electrode using a photolithography method, and a first layer overlapping the first electrode is formed; In step 6 of the second phase, the third film and the second film are removed from the second electrode using an etching method to form a second layer, a first unit, and a third layer; the second layer is sandwiched between the first layer and the first electrode; the first unit is sandwiched between the second layer and the first electrode; In step 1 of the third phase, a fifth film is formed on the first layer and the second electrode; In step 2 of the third phase, a sixth film is formed on the fifth film; In step 3 of the third phase, a seventh film is formed on the sixth film; In step 4 of the third phase, an eighth film is formed on the seventh film; In step 5 of the third phase, the eighth film is removed from the first layer using a photolithography method, and a fourth layer overlapping the second electrode is formed; In step 6 of the third phase, the seventh film and the sixth film are removed from the first layer and the first gap using the fourth layer and an etching method to form a fifth layer, a second unit, a sixth layer, and a second gap; the fifth layer is sandwiched between the fourth layer and the second electrode; the second unit is sandwiched between the fifth layer and the second electrode; the second gap overlaps the first gap; In step 1 of the fourth phase, a ninth film is formed, and then a photoresist is formed; In step 2 of the fourth phase, a seventh layer and an eighth layer are formed using the photoresist and etching method; the seventh layer overlaps the first electrode and has a smaller profile than the first layer; the eighth layer overlaps the second electrode and has a smaller profile than the fourth layer; In step 3 of the fourth phase, the seventh layer, the eighth layer, and an etching method are used to reduce the outline of the first layer and the outline of the fourth layer; In step 4 of the fourth phase, reducing the outer dimensions of the first layer, the fourth layer, the second layer, the fifth layer, the first unit, the second unit, the third layer, and the sixth layer using an etching method; In step 5 of the fourth phase, the first layer and the fourth layer are removed using an etching method; In step 1 of the fifth phase, a ninth layer is formed; the ninth layer is in contact with the insulating layer in the first gap and covers the first unit and the second unit; In step 2 of the fifth phase, a tenth layer is formed; the tenth layer fills the first gap and the second gap; the tenth layer includes a first opening overlapping the first electrode and a second opening overlapping the second electrode; In step 3 of the fifth phase, using the tenth layer and an etching method, removing the ninth layer and the second layer that overlap the first opening and removing the ninth layer and the fifth layer that overlap the second opening; In step 1 of the sixth phase, an eleventh layer is formed on the first unit and the second unit; In step 2 of the sixth phase, a conductive film is formed on the eleventh layer.

2. In step 1 of the first phase, a tenth film is formed on the insulating layer; In step 2 of the first phase, the first electrode, the second electrode, and the first gap are formed on the tenth film; the first gap is sandwiched between the first electrode and the second electrode; In step 5 of the fourth phase, the first layer, the fourth layer, and the tenth film are removed using an etching method to form a twelfth layer, a thirteenth layer, and a third gap; the twelfth layer is sandwiched between the first electrode and the insulating layer; the thirteenth layer is sandwiched between the second electrode and the insulating layer; The method for manufacturing a display device according to claim 1 , wherein the third gap overlaps with the first gap.

3. a first light emitting device; and a second light-emitting device; and an insulating layer; the first light-emitting device comprises a first electrode, a second electrode, a first unit, and a first layer; the first electrode is formed on the insulating layer; the first unit is sandwiched between the first electrode and the second electrode; the first unit includes a first luminescent material; the first unit has a first side; the first layer is sandwiched between the first electrode and the first unit; the first layer is in contact with the first electrode; the first layer includes a carrier-injecting material; the first layer has a higher concentration of the carrier injecting material than the first side surface; the second light-emitting device comprises a third electrode, a fourth electrode, a second unit, and a second layer; the third electrode is formed on the insulating layer; the third electrode is adjacent to the first electrode; the third electrode is disposed with a first gap between it and the first electrode, the second unit is sandwiched between the second layer and the fourth electrode; the second unit includes a second luminescent material; the second unit is disposed with a second gap between it and the first unit, the second gap overlaps the first gap; the second unit has a second side; the second side surface faces the first side surface, the second layer is sandwiched between the third electrode and the second unit; the second layer is in contact with the third electrode; the second layer is disposed with a third gap between it and the first layer; the third gap overlaps the first gap; the second layer includes the carrier injecting material; The second layer has a higher concentration of the carrier injection material than the second side.

4. The display device according to claim 3 , wherein the insulating layer has a lower etching rate than the first unit in an etching process using a gas containing oxygen.

5. a third layer; and a fourth layer; the first electrode comprises a region sandwiched between the first layer and the third layer; the third electrode comprises a region sandwiched between the second layer and the fourth layer; the third layer comprises a region sandwiched between the first electrode and the insulating layer; the third layer has a lower etching rate in an etching process using a gas containing oxygen than the first layer; the third layer is electrically conductive; the fourth layer includes a region sandwiched between the third electrode and the insulating layer; the fourth layer is adjacent to the third layer; the fourth layer is disposed with a fourth gap between it and the third layer, The display device of claim 3 , wherein the fourth layer comprises the same material as the third layer.

6. a fifth layer; and a sixth layer; and a conductive film; the fifth layer overlaps the first gap; the fifth layer is in contact with the insulating layer, the fifth layer includes a first opening and a second opening; the first opening overlaps the first electrode; the second opening overlaps the third electrode; the sixth layer fills the first gap and the second gap; the sixth layer is sandwiched between the conductive film and the fifth layer, the sixth layer includes a third opening and a fourth opening; the third opening overlaps the first electrode; the fourth opening overlaps the third electrode; The display device according to claim 3 , wherein the conductive film includes the second electrode and the fourth electrode.

7. A display device according to any one of claims 3 to 6; a display module having at least one of a connector and an integrated circuit.

8. A display device according to any one of claims 3 to 6; An electronic device having at least one of a battery, a camera, a speaker, and a microphone.

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