Ultrasonic diagnostic apparatus
The ultrasound diagnostic device increases the number of reception beam signals by employing a transducer array with extended delay-and-sum periods and external memory for control parameters, addressing the challenge of processing load without high-performance hardware or prolonged times.
Patent Information
- Application Number
- JP2024032637
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-05
- Publication Date
- 2025-09-18
AI Technical Summary
Increasing the number of receive beam signals in ultrasound diagnostic devices while avoiding the need for high-performance hardware or prolonged processing times.
Implementing a transducer array with a transmission/reception sequence that includes separate storage units for reception signals and a phasing addition unit to generate multiple reception beam signals using extended delay-and-sum periods, including vacant periods for charging and cooling, and utilizing external memory for control parameters.
Enhances the capability to generate a larger number of reception beam signals without requiring high-performance hardware or extended processing times, improving the efficiency and cost-effectiveness of ultrasound diagnostic devices.
Smart Images

Figure 2025135064000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to an ultrasonic diagnostic apparatus, and more particularly to processing of received ultrasonic signals. [Background technology]
[0002] Known ultrasound reception signal processing methods include parallel beam reception processing and pulse inversion (phase inversion). In parallel beam reception processing, multiple reception beams are formed in parallel with one transmission (i.e., one transmission beam). In pulse inversion, ultrasound is transmitted using two transmission signals with mutually inverted phases, and the reception signal obtained by one transmission signal and the reception signal obtained by the other transmission signal are subjected to addition or difference processing.
[0003] Patent Document 1 discloses a circuit configuration suitable for receive signal processing involving synthesis processing such as pulse inversion and receive parallel beam processing. In this circuit configuration, each receive signal memory stores a receive signal set for one beam processed by each receive processor. Each synthesis processor reads out a receive signal set corresponding to each beam number and performs synthesis processing to generate a synthesized receive signal corresponding to that beam number. Each synthesized signal memory stores synthesized receive signals from each transducer element. Each synthesized signal memory has two storage areas corresponding to two beams. A phasing adder reads out multiple synthesized receive signals corresponding to multiple transducer elements from the storage area corresponding to each beam number according to a delay pattern corresponding to that beam number. The phasing adder generates a receive beam signal by delaying and adding the multiple synthesized receive signals.
[0004] There is also a technology called ultrasound elastography, which uses ultrasound to measure and visualize physical quantities related to the elasticity of biological tissue. Shear wave elastography, a type of ultrasound elastography, involves exciting tissue to generate shear waves, and then tracking the shear wave propagation with an array of ultrasound transducers to determine the shear wave propagation velocity. The tissue is excited, for example, by a powerful ultrasound pulse from an array of transducers. This exciting ultrasound pulse is called a push pulse. In other words, the push pulse is a pulse used to generate shear waves.
[0005] The ultrasonic pulse used to track shear waves is called a track pulse. A track pulse can be said to be a pulse for observing shear waves. In order to capture the propagation of shear waves with high resolution, the track pulse is repeatedly transmitted and received many times (for example, several hundred times) for one shear wave.
[0006] For example, Patent Document 2 discloses an ultrasound diagnostic device that includes an elasticity value calculation unit that measures the propagation speed of shear waves generated in a measurement area of a subject's biological tissue by a push pulse irradiated from an ultrasound probe onto the measurement area, thereby determining the elasticity value of the measurement area; an elasticity image generation unit that generates an elasticity image based on the elasticity value determined by the elasticity value calculation unit; and a display unit that displays the elasticity image generated by the elasticity image generation unit. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] Japanese Patent Application Publication No. 2017-077311 [Patent Document 2] Japanese Patent Application Laid-Open No. 2012-010099 Summary of the Invention [Problem to be solved by the invention]
[0008] Since receiving parallel beam processing imposes a certain amount of processing load, if you try to increase the number of receiving beam signals generated for one transmission, you will either have to introduce high-performance hardware or increase the processing time.
[0009] The present invention provides a technique for increasing the number of receive beam signals generated by delay-and-sum in an ultrasound diagnostic device that excites tissue with a transducer array to generate shear waves and tracks the shear waves with the transducer array. [Means for solving the problem]
[0010] The ultrasound diagnostic device disclosed in this specification includes a transducer array having a plurality of transducers, a transmission / reception circuit that causes the plurality of transducers to transmit and receive ultrasound waves according to a transmission / reception sequence including a first transmission / reception period for transmitting and receiving ultrasound waves for shear wave generation, a second transmission / reception period for transmitting and receiving ultrasound waves for shear wave observation multiple times, and an empty period during which ultrasound waves are not transmitted, a first storage unit provided for each of the transducers, the first storage unit storing a reception signal by the transducer for each transmission of the ultrasound waves for shear wave observation in the second transmission / reception period, and a second storage unit provided for each of the transducers, each having at least two line memories, each of which is stored in the first storage unit. and a phasing addition unit that generates a plurality of reception beam signals by performing phasing addition for each of a plurality of different delay patterns on sets of reception signals for the plurality of transducers corresponding to the same transmission that are read from the line memory of the second storage unit provided for each of the transducers, according to the delay pattern, wherein the phasing addition unit executes the process of generating the plurality of reception beam signals corresponding to one transmission using at least a part of a time period having a length corresponding to the vacant period in addition to a time period having a length corresponding to the second transmission / reception period.
[0011] According to this configuration, the delay-and-sum period can be made longer than in a configuration in which a plurality of reception beam signals are generated in a delay-and-sum period having the same length as the second transmission / reception period.
[0012] Here, the vacant period may include the charging period required to transmit the ultrasonic waves for generating the shear waves, from the end of the second transmission / reception period to the start of the first transmission / reception period in the next transmission / reception sequence.
[0013] The vacant period may include a cooling period for cooling the transducer array after the second transmission / reception period.
[0014] The ultrasound diagnostic apparatus may further include a generation unit that generates parameters for the delay-and-sum operation for the received signals corresponding to each of the individual transmissions in the second transmission-reception period before the start of each of the individual transmissions, wherein the second storage unit is configured in an internal memory in the same integrated circuit as the delay-and-sum operation unit, while the first storage unit is configured in an external memory external to the integrated circuit, and the parameters generated by the generation unit are temporarily stored in the external memory and, when used for the delay-and-sum operation, are read from the external memory into the internal memory.
[0015] In this configuration, a large amount of control parameters for the numerous receive beam signals to be generated by transmitting and receiving ultrasound waves for shear wave observation are stored in an external memory, which is generally much larger than the internal memory provided within the integrated circuit. [Effects of the Invention]
[0016] According to the present invention, the period for delay-and-sum can be made longer than in the past, and therefore the number of reception beam signals that can be generated during that period can be increased. [Brief explanation of the drawings]
[0017] [Figure 1] FIG. 1 is a diagram illustrating an example of the functional configuration of an ultrasound diagnostic apparatus. [Figure 2] FIG. 10 is a diagram showing an example of a time chart of ultrasonic transmission and reception processing in shear wave elastography mode. [Figure 3] FIG. 2 is a diagram for explaining transitions of display modes in the ultrasound diagnostic apparatus. [Figure 4] 10A and 10B are diagrams for explaining the generation process of a shear wave elastography image. DETAILED DESCRIPTION OF THE INVENTION
[0018] FIG. 1 is a diagram showing an example of the functional configuration of an ultrasound diagnostic apparatus according to the present disclosure. A transducer 102 is an element that transmits and receives ultrasound. A plurality of transducers 102 are arranged to form a transducer array, which is provided within an ultrasound probe. An ultrasound beam is formed by controlling the transmission and reception of ultrasound by this transducer array, and the ultrasound beam is electronically scanned. Examples of electronic scanning methods include electronic linear scanning and electronic sector scanning. The ultrasound probe is used by contacting it with the surface of a living body or by inserting it into a body cavity of the living body.
[0019] The multiple transducers 102 constituting the transducer array are controlled to transmit by a transmitting unit (not shown) that functions as a transmit beamformer. The received signals obtained by each transducer 102 receiving ultrasound waves from a living body are processed in the respective downstream units shown in FIG. 1. Several functional elements that process the received signals for each transducer 102 are provided downstream of the multiple transducers 102. A collection of functional elements for each transducer 102 is called a channel 100. One channel 100 includes a transducer 102, a first reception processing unit 104, an A / D converter (ADC) 106, a second reception processing unit 108, a channel (CH) memory 110, a synthesis processing unit 112, and a buffer 114. The ultrasound diagnostic device has a channel 100 for each transducer 102 provided in the ultrasound probe.
[0020] The first reception processing unit 104 adjusts (e.g., amplifies) the gain of the reception signal output from the corresponding transducer 102. The reception signal whose gain has been adjusted by the first reception processing unit 104 is input to the corresponding ADC 106. The ADC 106 converts the analog reception signal into a digital reception signal.
[0021] The second reception processing unit 108 performs the necessary reception processing on the digital reception signal. Specific examples of this reception processing include decimation (thinning-out processing). Decimation thins the number of samples of the digital reception signal to, for example, n / m (n and m are natural numbers). The reception signal (digital) processed by the second reception processing unit 108 is stored in the CH memory 110.
[0022] The CH memory 110 stores received signals obtained from the corresponding transducer 102 and processed by the second reception processing unit 108. The CH memory 110 stores a set of received signals for one beam related to the transducer 102 (i.e., a set of received signals corresponding to one beam number). A specific example of a received signal set is a set of received signals obtained by one transmitted signal and another transmitted signal in pulse inversion.
[0023] The CH memory 110 is a relatively large-capacity memory that can store a set of received signals for one beam, and can be realized by, for example, a DRAM (Dynamic Random Access Memory).The CH memories 110 for multiple channels 100 may be implemented on the same single storage device (for example, a single package of DRAM), or may be implemented by combining multiple storage devices (for example, multiple packaged DRAMs).
[0024] The synthesis processing unit 112 reads out and synthesizes the received signal set stored in the corresponding CH memory 110. The CH memory 110 stores a received signal set for one beam corresponding to one of a plurality of beam numbers. The synthesis processing unit 112 reads out and synthesizes the received signal set corresponding to each beam number stored in the corresponding CH memory 110, thereby generating a synthesized received signal corresponding to that beam number.
[0025] For example, if a specific example of the received signal set is a pair of two received signals obtained by pulse inversion, the two received signals are added together in the synthesis processing unit 112. This addition process forms a synthesized received signal of, for example, second harmonics (even harmonics). Note that a synthesized received signal in which, for example, even harmonics have been reduced (or removed) may be formed from the difference between the two received signals obtained by pulse inversion.
[0026] The buffer 114 has two line memories #1 and #2 corresponding to two beams (two beam numbers). Of the combined received signals for the two beams, the combined received signal corresponding to one beam number can be written to one line memory #1 or #2, while the combined received signal corresponding to the other beam number can be read from the other line memory #2 or #1. In other words, the buffer 114 functions as a ping-pong buffer.
[0027] The buffer 114 may be configured using a dual-port memory configured, for example, by SRAM (Static Random Access Memory). For example, the buffers 114 of multiple channels 100 may be implemented by the same single device (e.g., a single-package storage device) or by combining multiple devices (e.g., multiple-package storage devices).
[0028] Furthermore, the main signal processing elements of the ultrasound diagnostic apparatus (for example, the second reception processing unit 108 and synthesis processing unit 112 of each channel 100 described above, and the phasing addition unit 200 and signal processing unit 300 described later) may be integrated on a single integrated circuit. Such an integrated circuit may be, for example, an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit). The buffer 114 may be implemented using internal memory (for example, SRAM) on this integrated circuit. On the other hand, in the case where reception signals corresponding to a large number of beam numbers are to be stored, the CH memory 110 may be implemented in a large-capacity external memory attached externally to the integrated circuit. Furthermore, in addition to the signal processing elements, a processor for performing control and other information processing may also be integrated on the integrated circuit.
[0029] It is also possible to configure the device without the combining processor 112. For example, in a device configuration that does not perform pulse inversion, the CH memory 110 only stores one received signal corresponding to one transmitted signal, and the combining processor 112 that combines multiple received signals is not required. In this case, the received signal that has been temporarily stored in the CH memory 110 is transferred directly to the buffer 114.
[0030] The phasing addition unit 200 generates a reception beam signal by delaying and adding a plurality of composite reception signals corresponding to a plurality of transducers 102. The phasing addition unit 200 reads out the composite reception signals of each channel that are generated for each beam number and stored in each buffer 114, and generates a reception beam signal (i.e., reception beam data) corresponding to each beam number.
[0031] The phasing addition unit 200 reads out the combined received signal from the line memory #1 or #2 corresponding to each beam number in accordance with the delay pattern corresponding to that beam number. For example, data at an address corresponding to the delay pattern is read out from the combined received signal for one beam stored in the corresponding line memory #1 or #2. This read address control realizes delay processing (i.e., phasing processing). Then, a received beam signal is formed by adding up the data that has been phased according to the delay pattern from multiple combined received signals.
[0032] Furthermore, the phasing adder 200 has a function of performing receive parallel beam processing to form multiple receive beam signals for each beam number. The receive parallel beam processing by the ultrasound diagnostic apparatus of Fig. 1 may be the same as conventional processing (for example, that disclosed in Patent Document 1). Note that, for example, by providing M (M is a natural number) phasing adders 200 and performing receive parallel beam processing in each phasing adder 200, the number of receive parallel beams may be multiplied by M.
[0033] In this way, the phases of the received signals from the multiple transducers 102 are aligned with respect to the focus point, and electronic focusing and electronic beam steering are achieved.
[0034] The received beam signals generated by the delay-and-sum unit 200 are further processed in the signal processing unit 300 at the downstream stage. The signal processing unit 300 performs various signal processing required to generate images in each mode of the ultrasound diagnostic device. For example, in B-mode, the received beam signals are subjected to detection, logarithmic compression, and other processes. In color flow mapping mode (color Doppler mode), processes such as autocorrelation calculations for complex signals are performed. When Doppler mode is selected, processes necessary for extracting Doppler information and frequency analysis, such as quadrature detection, are performed. Furthermore, when shear wave elastography display is instructed, transmission and reception control and signal processing are performed to generate a shear wave elastography image, such as calculating the propagation velocity of shear waves from the received signals of tracking pulses. Hereinafter, shear wave elastography is abbreviated as SWE. SWE stands for Shear Wave Elastography.
[0035] The detection process (including quadrature detection process) may be performed for each transducer 102 before the phasing addition process by the phasing addition unit 200. Furthermore, by converting the received signal into a baseband signal through the detection process, the number of samples to be sampled when digitized can generally be reduced, so for example, the thinning rate in decimation may be further increased (the number of data to be thinned out may be increased compared to when detection is not performed).
[0036] Then, for example, image data of the ultrasound image is formed through interpolation processing and coordinate conversion processing by a digital scan converter, and an ultrasound image corresponding to the image data is displayed on a display device such as a liquid crystal monitor.
[0037] The elements involved in the signal processing of the received signal have been described above.
[0038] The control unit 400 controls the circuit configuration for signal processing of the received signals described above to generate the various diagnostic images described above. The control unit 400 includes the following functional units: control parameter generation 402, processing A 404, processing flow control 406, control parameter buffer 408, processing B 410, and processing C 412. The control unit 400 may be implemented using, for example, a processor, memory, etc. integrated on the same integrated circuit as the above-mentioned signal processing elements.
[0039] The control parameter generator 402 generates control parameters necessary for processing such as receive beam generation in each digital signal processing element downstream from the ADC 106 in each channel 100. The control parameter generator 402 receives information such as device operation information and transmit / receive mode information from the main controller of the ultrasound diagnostic device, and generates control parameters based on this information.
[0040] The control parameters generated by the control parameter generation 402 include, for example, the number of decimations, the storage destination of the received signal, the storage destination of the focus calculation parameters, the number of parallel beams, and beam attribute information required for image generation in various modes in the signal processing unit 300.
[0041] The thinning number is referred to when the second reception processing unit 108 performs thinning processing.
[0042] The storage destination of the received signal is the memory address of the CH memory 110 where the received signal processed by the second reception processing unit 108 is stored. For example, if the CH memory 110 is secured in an external memory, the memory address allocated to the CH memory 110 within the memory space managed by the operating system of the control unit 400 becomes one of the control parameters.
[0043] Similarly, the storage destination of the focus calculation parameters is the memory address of the storage destination of the parameters generated to calculate the focus of the receive beam. Note that this storage destination is also secured in, for example, an external memory.
[0044] The number of parallel beams is the number of parallel beams generated for one transmission in the parallel beam receiving process.
[0045] The beam attribute information required for image generation in various modes in the signal processing unit 300 includes, for example, the beam type (e.g., black and white B mode, tracking pulse, etc.), the direction of the receive beam in B mode, and the order of the receive beam in SWE mode.
[0046] For example, for each transmission of ultrasound, the control parameter generation 402 generates a group of control parameters to be applied to the received signals generated by the transducers 102 of each channel 100 for that transmission. The timing at which the control parameter generation 402 generates the group of control parameters to be applied to a certain transmission may be any timing prior to that transmission, and does not have to be immediately before that transmission. For example, when the mth (m is an integer equal to or greater than 1) ultrasound transmission is being executed, a group of control parameters for the (m+n)th (n is a predetermined integer equal to or greater than 2) ultrasound transmission may be generated. Furthermore, the control parameter generation 402 may generate control parameters for multiple transmissions collectively. Furthermore, the control parameter generation 402 may of course generate not only control parameters for each transmission, but also control parameters to be applied commonly to multiple transmissions.
[0047] Process A404 is a process in which the second reception processing unit 108 processes (e.g., decimates) the digitally formatted reception signal output from the ADC 106, and writes the digital data resulting from this processing (e.g., decimated reception signal data) to the CH memory 110. Here, the second reception processing unit 108 performs signal processing such as decimation using, for example, one or more specific control parameters (e.g., the value of the number of decimations) that correspond to the second reception processing unit 108 from the group of control parameters generated by the control parameter generation unit 402.
[0048] The processing flow control 406 reads and writes control parameters from and to the control parameter buffer 408. That is, the processing flow control 406 writes the control parameters generated by the control parameter generation 402 to the control parameter buffer 408. The processing flow control 406 also reads out the control parameters required for the synthesis processing unit 112, the phasing addition unit 200, the signal processing unit 300, etc. from the control parameter buffer 408 at the timing required for the processing of each of these units, and provides these units with these parameters.
[0049] In one example, in process A404, the second reception processing unit 108 may directly read and use the control parameters generated in an internal memory of an integrated circuit such as an FPGA by the control parameter generation unit 402. In this case, the second reception processing unit 108 does not need to read the control parameters from the control parameter buffer 408.
[0050] The control parameter buffer 408 is a buffer that stores control parameters. In this embodiment, to generate an SWE image, the CH memory 110 and the control parameter buffer 408 must store received signal data and control parameters corresponding to a very large number of track pulse transmissions (e.g., several hundred times). This is to accommodate cases in which the ultrasound diagnostic apparatus displays an SWE image superimposed on a B-mode tomographic image, for example. That is, in this case, one of the line memories #1 or #2 of the buffer 114, which is a ping-pong buffer, is occupied for a long time by B-mode received signal data. This is because B-mode requires a long reception time and generates a large number of parallel beams. Therefore, the next line (i.e., received signal) cannot be read until the line memory #1 or #2 storing the B-mode received signal becomes available, and the delay-and-sum process for SWE cannot proceed. For this reason, for example, during the period in which delay-and-sum is being performed to generate a B-mode tomographic image, the received signal obtained by each track pulse for SWE must be stored in the CH memory 110. For the same reason, it is necessary to retain control parameters corresponding to the received signals for SWE during the delay-and-sum period for generating a B-mode tomographic image. As described above, to generate an SWE image, it is necessary to track the propagation of shear waves using a large number of track pulses, and the amount of data for the control parameters corresponding to these track pulses is also quite large. For this reason, in models with a small internal memory capacity on an integrated circuit integrating signal processing elements, etc., the large set of control parameters for SWE may not be able to be stored in the internal memory. To address this issue, for example, the control parameter buffer 408 may be stored in an external memory external to the integrated circuit, similar to the CH memory 110.
[0051] In process B410, the synthesis processor 112 synthesizes received signal data read from the CH memory 110 and writes the resulting data to line memory #1 or #2 in the buffer 114. Here, the synthesis processor 112 waits while both line memories #1 and #2 in the buffer 114 are full. When the next data becomes available to be written to one of line memories #1 and #2, the synthesis processor 112 obtains control parameters for the next received signal data from the control parameter buffer 408 via the process flow control 406 and executes synthesis processing using those control parameters. In the illustrated example, the set of control parameters read from the control parameter buffer 408 in process B410 is passed from process B410 to the next process C412.
[0052] When the control parameter buffer 408 is configured to be secured in an external memory external to the integrated circuit that performs signal processing, the control parameters are read from the control parameter buffer 408 to an internal memory in the integrated circuit, and the control parameters in the internal memory are referenced by the synthesis processing unit 112. The control parameters in the internal memory are also referenced in the subsequent process C412.
[0053] If the ultrasonic diagnostic apparatus does not have the synthesis processing unit 112, the process B410 is a process of reading the next received signal data from the CH memory 110 and writing it into an available line memory #1 or #2.
[0054] Process C412 represents the processing of the phasing addition unit 200 and the signal processing unit 300 on the received signal data read out from the line memory #1 or #2 of each channel 100.
[0055] In process C412, the delay-and-sum unit 200 reads out the received signal data of each channel 100 according to a plurality of different delay patterns in accordance with the control parameters and performs delay-and-sum to generate a received beam signal for each pattern. This is parallel beam processing.
[0056] Furthermore, in process C412, the signal processing unit 300 generates an ultrasound image of the current mode by performing, for example, signal processing corresponding to the current mode on each reception beam signal output from the phasing addition unit 200. The generated ultrasound image is displayed, for example, on the screen of an ultrasound diagnostic device.
[0057] Next, an example of the time flow of signal processing in SWE mode will be described with reference to Fig. 2. Fig. 2 is a diagram for explaining a specific example of receive parallel beam processing. Fig. 2 shows a time chart (also called a timing chart) of receive signal processing realized by the ultrasound diagnostic apparatus of Fig. 1.
[0058] The top chart 500 in FIG. 2 shows the overall transmission and reception sequence for one frame of image display in SWE mode.
[0059] In SWE mode, an SWE image is displayed superimposed on a portion of a B-mode tomographic image. Therefore, the chart 500 first transmits and receives ultrasound waves to generate one frame of a black-and-white B-mode tomographic image. This transmission and reception period is indicated as BWB in the figure.
[0060] This is followed by four transmit-receive periods, Push-Track (1), (2), (3), and (4), for generating an SWE image. The reason for dividing it into four transmit-receive periods is that the width of the SWE image that can be generated with one track pulse is small. That is, in this embodiment, the ROI (i.e., region of interest) of the SWE display is divided into four small regions, and these four transmit-receive periods cover the four small regions.
[0061] An idle period NopA is provided after each transmission / reception period Push-Track (1), (2), (3), and (4). The idle period NopA is a period during which no ultrasonic transmission or reception occurs. During this idle period NopA, charging takes place in preparation for transmitting the next push pulse. A push pulse is a powerful ultrasonic pulse that generates shear waves in the target tissue, and transmitting such a powerful pulse requires supplying a large amount of power to the transducer 102. The idle period NopA is the period required for charging this large amount of power. As an example, the length of one transmission / reception period Push-Track is approximately 100 ms (milliseconds), and the length of one idle period NopA is approximately 40 ms.
[0062] Chart 502 is an enlarged view of four transmit-receive periods for SWE, Push-Track(1), (2), (3), and (4), of the overall chart 500. Within each transmit-receive period (e.g., Push-Track(1)), a push pulse Push0 is transmitted first, followed by track pulses Track0, 1, . . . , 299, transmitted in sequence. In this example, the shear wave generated in the tissue by the push pulse Push0 is tracked by 300 track pulses Track0, 1, . . . , 299. This tracking allows the propagation time (or propagation velocity) of the shear wave at each position in the tissue to be determined.
[0063] For example, in the transmission / reception period Push-Track(1) of chart 502, the period of push pulse Push0 corresponds to the period during which ultrasonic waves for generating shear waves are transmitted and received, and the period of track pulses Track0 to Track299 corresponds to the period during which ultrasonic waves for observing shear waves are transmitted and received multiple times.
[0064] After the idle period NopA following the fourth transmission / reception period Push-Track(4), another idle period NopB follows. This idle period NopB is a period for cooling the ultrasonic probe that has become hot during the four transmission / reception periods Push-Track(1) to (4), and its length is, for example, about 4 seconds. Processing for one frame ends during this idle period NopB. After this, a similar ultrasonic transmission / reception sequence is performed for the next frame.
[0065] Chart group 504 shows the flow of conventional processing of received signal data obtained by track pulses. The three charts arranged in rows show, from top to bottom, the timing of the process of writing data resulting from processing by the second reception processing unit 108 to the CH memory 110, the process of reading data from the CH memory 110, and the phasing process by the phasing addition unit 200. As shown in the diagram, these three processes are executed in parallel using pipeline processing.
[0066] In this example, push pulse Push0 is first transmitted at the start of transmission / reception period Push-Track(1), followed by track pulses Track0 to 299, which are transmitted in sequence. The received signals for each track pulse Track0 to 299 are then processed by second reception processing unit 108, and the resulting processed data is written in sequence to CH memory 110. Writing to CH memory 110 ends immediately after transmission / reception of the final track pulse Track299 in transmission / reception period Push-Track(1). During the following vacant period NopA, no transmission or reception takes place, and charging is performed in preparation for the next push pulse transmission. The remaining three transmission / reception periods Push-Track(2), (3), and (4) and the vacant period NopA are then repeated in the same manner.
[0067] Furthermore, after data of the received signal corresponding to the first track pulse Track0 of the transmission / reception period Push-Track(1) is written to the CH memory 110, reading of data from the CH memory 110 begins. Thereafter, data corresponding to each of the subsequent track pulses Track1 to 299 is read out from the CH memory 110 in sequence.
[0068] The sequentially read data is processed by the synthesis processing unit 112 and then temporarily stored in the buffer 114. Thereafter, the phasing addition unit 200 performs phasing processing on the data of each channel 100 to form a receive beam. Phasing processing is performed sequentially on the data of each track pulse Track 0 to 299. Parallel beam processing is achieved by delaying a data group corresponding to one pulse using various different delay patterns and then performing phasing processing.
[0069] In the conventional control shown in the group of charts 504, the period for reading data of track pulses Track 0 to 299 from the CH memory 110 is equal to the period for writing the data for 300 pulses to the CH memory 110. In addition, the period for performing phasing processing on the data for 300 pulses read from the CH memory 110 is also equal to the period for writing the data to the CH memory 110.
[0070] However, in the parallel beam processing in the phasing adder 200, it is necessary to perform the phasing process many times while changing the parameters in order to form many receive beams. Therefore, an extremely high-speed phasing adder 200 is required to perform the phasing process in the same length of time as it takes to write data to the CH memory 110. However, such a high-speed phasing adder 200 is extremely costly.
[0071] In contrast to this, this embodiment employs the process flow shown in chart group 506. Chart group 506 also shows a three-stage process flow similar to the above-described conventional chart group 504. Of these, the time chart for the write process in the top stage is the same as the time chart in the top stage of chart group 504.
[0072] In contrast, the period for reading data from the CH memory 110 shown in the second row from the top and the period for phasing processing shown in the third row are significantly longer than the conventional periods shown in the chart group 504. In the example of FIG. 2, the length of all of the four empty periods NopA for charging and at least a part of the long empty period NopB for cooling thereafter are evenly allocated to the period for phasing processing in the four transmission / reception periods Push-Track (1) to (4), thereby lengthening the period for phasing processing. In other words, the length of the period for phasing processing is calculated by multiplying the length of the period for writing data to the CH memory 110 (which is approximately equal to the length of the transmission period of track pulses Track 0 to 299) by T NopA and T0 are added together. NopA is the length of the vacant period NopA, and T0 is one-fourth the length of the vacant period NopB allocated to extending the phasing processing period. Of course, almost the entire vacant period NopB may be allocated to extending the phasing processing period.
[0073] In the example of FIG. 2, in accordance with the extension of the period of the phasing process, the period of the process of reading data from the CH memory 110 is also extended by the same amount.
[0074] In the example of FIG. 2, the period of phasing processing is made much longer than in the past, so even in a configuration using a phasing addition unit 200 that is not particularly high speed, a large number of receive beams can be formed by parallel beam processing.
[0075] Next, referring to FIG. 3, an example of the flow of operations for SWE display in an ultrasonic diagnostic apparatus will be described.
[0076] 3, when a user presses the SWE button while a B-mode screen 600 is displayed on the ultrasound diagnostic apparatus, the displayed screen switches to a SWE mode screen 610. The SWE button is a button for issuing an instruction to execute the SWE mode, and is implemented as a mechanical button or a button on a graphical user interface.
[0077] The illustrated SWE mode screen 610 is divided into a B-mode display area 612 on the left and an SWE display area 616 on the right. A B-mode tomographic image 614 is displayed in the B-mode display area 612. A SWE image 620 is displayed in the SWE display area 616. Note that, since it may be difficult to determine which part of the body is represented by the SWE image 620 alone, in the illustrated example, the SWE image 620 is displayed superimposed on the B-mode tomographic image 617. Note that, instead of displaying the images superimposed in this manner, the relevant part of the B-mode tomographic image 617 may be replaced with the SWE image 620 and displayed.
[0078] In the illustrated example, the SWE mode is divided into two submodes: a SWEROI adjustment mode and a SWE update mode. The SWEROI adjustment mode is a mode in which the user sets the ROI (i.e., region of interest) to be displayed in SWE or adjusts an already set ROI. The SWE update mode is a mode in which the SWE image is displayed.
[0079] When the SWE button is pressed while the B-mode screen 600 is displayed, the ultrasound diagnostic apparatus transitions to SWE ROI adjustment mode. In SWE ROI adjustment mode, a B-mode tomographic image 614 acquired in real time is displayed in the B-mode display area 612, and the same B-mode tomographic image 617 and an ROI frame 618 are displayed in the SWE display area 616. The area inside the ROI frame 618 is the ROI displayed in SWE. The user adjusts the position and size of the ROI frame 618 by operating a pointing device such as a mouse, trackball, or touch panel.
[0080] Once the desired ROI frame 618 is obtained through adjustment, the user can instruct SWE display by pressing the Update button. When the Update button is pressed, the ultrasound diagnostic apparatus transitions to SWE update mode. In SWE update mode, a B-mode tomographic image 614 is displayed in the B-mode display area 612. The same B-mode tomographic image 617 is displayed in the SWE display area 616, and a SWE image 620 is superimposed or replaced on the ROI portion of the B-mode tomographic image 617 set in the SWE ROI adjustment mode. The displayed SWE image 620 is updated every predetermined time (referred to as "cooling time" in the figure). That is, the ultrasound diagnostic apparatus performs ultrasound operations for SWE image generation every predetermined time to generate a new SWE image and displays it in the SWE display area 616.
[0081] When the user presses the Update or Freeze button during SWE update mode, the ultrasound diagnostic system transitions to SWE ROI adjustment mode and accepts SWE ROI adjustments from the user. After performing the desired ROI adjustments, the user can obtain a SWE display with the adjusted ROI by pressing the Update button again.
[0082] Next, a generation process of the SWE image 620 in this embodiment will be described with reference to Fig. 4. As shown in Fig. 2, although this is merely an example, in this embodiment, one frame of the SWE image is generated by dividing it into four transmission / reception periods (Push-Track).
[0083] That is, in the first transmission / reception period Push-Track(1), as shown as sequence 0 in FIG. 4 , an SWE image is generated for the rightmost sub-region 620a of the region within the ROI frame 618 divided into four circumferential regions. That is, a push pulse Push is transmitted along the radial line at the right end of the sub-region 620a, and after that transmission, an SWE image is generated by approximately 300 track pulses. In the subsequent transmission / reception periods Push-Track(2), (3), and (4), SWE images for three sub-regions 620b, 620c, and 620d are generated in the order of sequences 1, 2, and 3. Then, by merging these four sub-regions 620a to 620d, an SWE image 620 within the ROI frame 618 is generated and displayed in the SWE display area 616.
[0084] As described above, in this embodiment, the parallel beam generation capability of the phasing summation unit 200 can be improved by using the vacant period NopA or NopB to lengthen the period of phasing processing for SWE.
[0085] Furthermore, in the above embodiment, when the signal processing and control circuits are configured as an integrated circuit, the control parameter buffer 408 can be configured in an external memory attached to the integrated circuit. When this configuration is adopted, even if the internal memory of the integrated circuit is small, a large amount of control parameters for multiple track pulses for generating an SWE image can be stored in an external memory with a larger capacity than the internal memory, making it possible to generate an SWE image.
[0086] The above-described embodiment is merely an example, and various modifications and improvements are possible within the scope of the invention as defined in the claims.
[0087] For example, in the above embodiment (see FIG. 2), the period of the phasing process for SWE is the period for writing data to the CH memory 110 plus the vacant period NopA and further plus a part of the vacant period NopB. However, this is merely an example. Instead, for example, the period of the phasing process may be the period for writing data to the CH memory 110 plus only the vacant period NopA.
[0088] Furthermore, although the configuration for generating an SWE image has been described above as an example, the technique of the above embodiment can be applied to a general configuration for generating an ultrasound image using shear waves, in addition to SWE. [Explanation of symbols]
[0089] 100 channel, 102 transducer, 104 first receiving processing unit, 106 ADC (A / D converter), 108 second receiving processing unit, 110 CH (channel) memory, 112 synthesis processing unit, 114 buffer, 200 phasing addition unit, 300 signal processing unit, 400 control unit, 402 control parameter generation, 404 processing A, 406 processing flow control, 408 control parameter buffer, 410 processing B, 412 processing C.
Claims
1. a transducer array having a plurality of transducers; a transmission / reception circuit that causes the plurality of transducers to transmit and receive signals in accordance with a transmission / reception sequence including a first transmission / reception period for transmitting and receiving ultrasonic waves for shear wave generation, a second transmission / reception period for transmitting and receiving ultrasonic waves for shear wave observation multiple times, and an idle period during which no ultrasonic waves are transmitted; a first storage unit provided for each of the transducers, the first storage unit storing a reception signal by the transducer for each transmission of the ultrasonic waves for shear wave observation during the second transmission and reception period; a second storage unit provided for each of the transducers, each having at least two line memories, each of the at least two line memories being used to store the received signals corresponding to different transmissions of the ultrasonic waves for shear wave observation read from the first storage unit; A phasing addition unit that generates a plurality of reception beam signals by performing phasing addition according to a plurality of different delay patterns on a set of reception signals for the plurality of transducers corresponding to the same transmission, which are read from the line memory of the second storage unit provided for each of the transducers; Including, the phasing addition unit executes the process of generating the plurality of reception beam signals corresponding to one transmission, using at least a part of a period of time corresponding to the vacant period in addition to a period of time corresponding to the second transmission-reception period. An ultrasonic diagnostic device characterized by:
2. 2. The ultrasound diagnostic device according to claim 1, wherein the idle period includes a charging period required for transmitting the ultrasound waves for generating the shear waves, from the end of the second transmission / reception period to the start of the first transmission / reception period in the next transmission / reception sequence.
3. The ultrasonic diagnostic apparatus according to claim 1 , wherein the idle period includes a cooling period for cooling the transducer array after the second transmission / reception period.
4. a generating unit configured to generate, before each of the individual transmissions in the second transmission / reception period starts, parameters for the delay-and-sum operation on the received signal corresponding to the transmission; the second storage unit is configured in an internal memory in the same integrated circuit as the phasing addition unit, whereas the first storage unit is configured in an external memory external to the integrated circuit; The parameters generated by the generation unit are temporarily stored in the external memory, and when used in the delay-and-sum, are read from the external memory to the internal memory.
4. The ultrasonic diagnostic apparatus according to claim 1, wherein the ultrasonic diagnostic apparatus is a hologram.
Citation Information
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