Display device

By adopting a multi-gate structure thin-film transistor and capacitor design in display devices, the problems of increased aperture ratio and area are solved, high aperture ratio and improved stability are achieved, component life is extended and current density is reduced.

JP2025137573APending Publication Date: 2025-09-19SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025115931
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2006-07-21
Filing Date
2025-07-09
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

The existing technology increases the aperture ratio of display devices by using high dielectric constant materials, which increases the number of process steps. At the same time, the complex opening shape leads to an increase in the edge length of the EL light emitting part, promotes short-circuit links, and makes it difficult to increase the coverage area in semiconductor devices.

Method used

A thin film transistor (TFT) with a multi-gate structure, in which multiple channel formation areas are arranged parallel to the wires, ensures that the channel width direction is consistent with the wire current direction, increases the channel length to improve the aperture ratio, and forms a capacitor through an island-shaped semiconductor layer and a gate insulating film, using a layered insulating film to increase the storage capacitance.

Benefits of technology

It achieves the goal of increasing the aperture ratio of the display device without increasing the number of process steps, reducing the current density to extend the life of the component, and reducing characteristic fluctuations through a multi-gate structure to improve the reliability and visibility of the display device.

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Abstract

To provide a display device having a high aperture ratio or a semiconductor device having an element with a large area.SOLUTION: A TFT channel forming region having a multi-gate structure is provided below wiring disposed between neighboring pixel electrodes (or electrodes of an element). A channel width direction of a plurality of channel forming regions is a direction parallel to a length direction of a shape of the pixel electrode. Channel width is made longer than channel length, so that the channel forming region has a large area.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to an active matrix display device and a semiconductor device in which elements are arranged in a matrix. It relates to a conductor device. [Background technology]

[0002] Conventionally, image display devices include liquid crystal display devices, electroluminescence (ELC) display devices, and the like. Electroluminescence (EL) display devices and the like are known. These display devices are classified into passive matrix and active matrix types. Active matrix display devices can achieve high speed even when the number of pixels increases. It has the characteristic of being able to perform various operations.

[0003] Active matrix display devices have TFTs, capacitance elements, wiring, pixel electrodes, etc., all mounted on the same substrate. Therefore, the material, shape, number, or Attempts are being made to increase the aperture ratio by devising layout and design. For example, In Patent Document 1, tantalum oxide, which has a high relative dielectric constant, is used as the dielectric of a capacitance element. This discloses a method for reducing the area of ​​the capacitance element. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 11-312808 Summary of the Invention [Problem to be solved by the invention]

[0005] On the other hand, the method of using a material with a high relative dielectric constant for the capacitor element in order to increase the aperture ratio increases the number of processes. There is a problem that this leads to

[0006] Here, in order to increase the aperture ratio without increasing the number of processes, it is sufficient to increase the area of ​​the opening. However, when openings are created between the wiring to increase the area of ​​the openings, In the EL display device, the shape of the opening is complicated. If the shape is changed, the length of the edge of the opening becomes large, so the EL light emitting part This creates a problem where links are encouraged.

[0007] Here, shrinking of the EL light-emitting part does not mean that the EL layer physically shrinks, but rather that the EL element shrinks. The effective area of ​​the EL element (the area where the EL element emits light) gradually shrinks from the edge. It refers to one's attitude.

[0008] In addition, in semiconductor devices other than display devices (for example, DRAMs, etc.), It is preferable to increase the area of ​​the element to be covered.

[0009] Therefore, the present invention provides a display device with a high aperture ratio (or a semiconductor device with a large element area). The goal is to [Means for solving the problem]

[0010] In this specification, the channel forming region of a TFT is defined as the region below the gate electrode with a gate insulating film interposed therebetween. The channel length refers to the distance between the gate electrode and the gate electrode in the channel formation region. The channel width is the length in the direction perpendicular to the channel length. The length of the channel forming region is called the length of the channel forming region.

[0011] In the case of a TFT with a multi-gate structure, the channel length and channel width are the same as those of one channel. This refers to the dimensions of each formation area.

[0012] The multi-gate structure is a structure in which multiple channel formation regions are provided in one TFT. On the other hand, the single gate structure is a structure in which one channel forming region is provided in one TFT. It is made of

[0013] The display device of the present invention includes wiring provided between adjacent pixel electrodes and thin film transistors. a thin film transistor, the channel forming region of which is provided below the wiring; The channel forming region is provided at a position overlapping the wiring, and the channel The direction of the channel width of the hole formation region is parallel to the direction of current flow in the wiring. It is characterized by the following.

[0014] The display device of the present invention includes wiring provided between adjacent pixel electrodes and a plurality of channel forming regions. a thin film transistor having a plurality of channel forming regions, The plurality of channel forming regions are provided at positions overlapping the wiring. The direction of the channel width of the plurality of channel formation regions is the same as the direction of the current flow in the wiring. It is characterized in that the direction is parallel to the direction in which the

[0015] The display device of the present invention includes wiring provided between adjacent pixel electrodes, a thin film transistor, a channel forming region of the thin film transistor is provided below the wiring; The channel forming region is provided at a position overlapping the wiring, and the channel forming region The direction of the channel width of the region is parallel to the longitudinal direction of the shape of the wiring. It is a sign.

[0016] The display device of the present invention includes wiring provided between adjacent pixel electrodes and a plurality of channel forming regions. a thin film transistor having a plurality of channel forming regions, The plurality of channel forming regions are provided at positions overlapping the wiring. The direction of the channel width of the plurality of channel formation regions is the same as the longitudinal direction of the shape of the wiring. It is characterized by being a direction parallel to the direction.

[0017] The display device of the present invention includes wiring provided between adjacent pixel electrodes, a thin film transistor, a channel forming region of the thin film transistor is provided below the wiring; The channel forming region is provided at a position overlapping the wiring, and the channel forming region The direction of the channel width of the region is parallel to the longitudinal direction of the shape of the pixel electrode. It is characterized by:

[0018] The display device of the present invention includes wiring provided between adjacent pixel electrodes and a plurality of channel forming regions. a thin film transistor having a plurality of channel forming regions, The plurality of channel forming regions are provided at positions overlapping the wiring. The direction of the channel width of the plurality of channel forming regions is It is characterized by being in a direction parallel to the longitudinal direction.

[0019] In the display device of the present invention, the thin film transistor operates in a linear region. do.

[0020] The voltage between the gate and source of a transistor is Vgs, and the voltage between the source and drain of a transistor is V The voltage between the two terminals is Vds, and the threshold voltage of the transistor is Vth. In this case, the linear region is This refers to the range where the relation |Vgs-Vth|>|Vds| holds true.

[0021] That is, the thin film transistor has a gate-source voltage (Vgs) that is equal to the source-drain voltage. It operates in a range that is greater than the voltage during switching (Vds) by at least the threshold voltage (Vth). It is characterized by:

[0022] In the display device of the present invention, the channel width of the channel forming region is It is characterized in that the length is longer than the channel length of the formation region.

[0023] In the display device of the present invention, the shape of the impurity region connecting the channel formation regions is The longitudinal direction is characterized by being parallel to the direction of the channel width.

[0024] In the display device of the present invention, the channel formation region is made of an amorphous semiconductor or a polycrystalline semiconductor. It is characterized by the fact that

[0025] In the display device of the present invention, the channel formation region is a single crystal.

[0026] In the display device of the present invention, the thin film transistor includes an island-shaped semiconductor layer, a gate insulating film, and , and a gate electrode, and the island-shaped semiconductor layer has the plurality of channel forming regions and a plurality of and an impurity region, and a gate insulating film is formed on the plurality of channel forming regions. The device is characterized in that a gate electrode is formed.

[0027] In the display device of the present invention, the wiring is formed on the gate electrode via an interlayer insulating film. It is characterized by being

[0028] In the display device of the present invention, the island-shaped semiconductor layer and the gate insulating film on the island-shaped semiconductor layer a first capacitor including a gate electrode on the gate insulating film; a second insulating film on the gate electrode and the wiring on the insulating film; A capacitance is formed.

[0029] In the display device of the present invention, the longitudinal direction of the shape of the gate electrode is It is characterized in that the direction is

[0030] In the display device of the present invention, the wiring is formed by a partition wall (insulating wall) formed to cover the end of the pixel electrode. It is characterized by being formed below the edge of the frame.

[0031] In the display device of the present invention, the source terminal (region) or the drain terminal of the thin film transistor One of the electrodes (regions) is connected to one of the adjacent pixel electrodes.

[0032] In the display device of the present invention, the source terminal (region) or the drain terminal of the thin film transistor The other of the children (areas) is connected to the wiring.

[0033] The semiconductor device of the present invention comprises wiring provided between adjacent electrodes and a thin film transistor. a channel formation region of the thin film transistor is provided below the wiring, The channel forming region is provided at a position overlapping the wiring, and the channel forming region The direction of the channel width is the direction of the current flow in the wiring (or the direction of the current flow in the shape of the wiring). It is characterized by being in a direction parallel to the longitudinal direction.

[0034] The semiconductor device of the present invention comprises wiring provided between adjacent electrodes and a thin film transistor. a channel formation region of the thin film transistor is provided below the wiring, The channel forming region is provided at a position overlapping the wiring, and the channel forming region The direction of the channel width is parallel to the longitudinal direction of the electrode. Let's say.

[0035] The semiconductor device of the present invention comprises wiring provided between adjacent elements and a thin film transistor. a channel formation region of the thin film transistor is provided below the wiring, The channel forming region is provided at a position overlapping the wiring, and the channel forming region The direction of the channel width is the direction of the current flow in the wiring (or the direction of the current flow in the shape of the wiring). It is characterized by being in a direction parallel to the longitudinal direction.

[0036] The semiconductor device of the present invention comprises wiring provided between adjacent elements and a thin film transistor. a channel formation region of the thin film transistor is provided below the wiring, The channel forming region is provided at a position overlapping the wiring, and the channel forming region The direction of the channel width is parallel to the longitudinal direction of the element. Let's say.

[0037] In the semiconductor device of the present invention, the channel width of the channel formation region is The length of the hole is longer than the channel length of the hole formation region. [Effects of the Invention]

[0038] The present invention realizes a display device with a high aperture ratio (or a semiconductor device with a large element area). It is possible to do this.

[0039] In addition, in order to increase the aperture ratio, the shape of the pixel electrode (or the electrode of the element) needs to be complex. It will also disappear.

[0040] Furthermore, by increasing the aperture ratio, the current density to the element is reduced, which extends the element's life. It becomes possible to make it live. [Brief explanation of the drawings]

[0041] [Figure 1] Double gate structure layout 1 [Figure 2] Double gate structure layout 2 [Figure 3] Pixel circuit diagram [Figure 4] TFT manufacturing flow (top view) [Figure 5] Diagram of pixel electrodes and wiring (wiring shape: straight line) [Figure 6] Diagram of pixel electrodes and wiring (wiring shape: zigzag) [Figure 7] Diagram of pixel electrodes and wiring (wiring shape: meander) [Figure 8] Single gate structure layout 1 [Figure 9] Single gate structure layout 2 [Figure 10] Triple gate structure layout 1 [Figure 11] Triple gate structure layout 2 [Figure 12] Cross section of inorganic EL element 1 [Figure 13] Cross section of inorganic EL element 2 [Figure 14] Top view and cross-sectional view of a display device [Figure 15] DRAM circuit diagram [Figure 16] DRAM Layout [Figure 17] Examples of electronic devices DETAILED DESCRIPTION OF THE INVENTION

[0042] The following describes the embodiments of the present invention with reference to the drawings. and the present invention can be implemented in various forms without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the mode and details of the present invention. The present invention is not to be construed as being limited to the description in the form of

[0043] The following embodiments 1 to 11 can be combined as appropriate.

[0044] (Embodiment 1) In this embodiment mode, a pixel configuration and a layout of a display device of the present invention will be described. Here, a pixel composed of two TFTs will be explained.

[0045] First, the pixel configuration of the display device of the present invention will be described with reference to Fig. 3. The pixel is connected to a pixel electrode. The connected TFT (driving TFT 301), the capacitance element 300, and the switching TFT 3 302, a display element 303, a scanning line 305, a signal line 304, and a power supply line 306. The driving TFT 301 and the switching TFT 302 are two channels. It is a double gate structure having a forming region.

[0046] The driving TFT 301 may have a single gate structure or may have three or more channels. It may also have a multi-gate structure having a gate forming region.

[0047] One of the source terminal or the drain terminal of the switching TFT 302 is connected to the signal line 304. It has been done.

[0048] The gate terminal of the switching TFT 302 is connected to a scanning line 305 .

[0049] The other of the source terminal or drain terminal of the switching TFT 302 is connected to the driving TFT 301 The gate terminal of the capacitor is electrically connected to one of the electrodes of the capacitor.

[0050] Either the source terminal or the drain terminal of the driving TFT 301 is connected to a power supply line 306. are.

[0051] The other of the source terminal and the drain terminal of the driving TFT 301 is connected to the display element 303. There are.

[0052] The gate terminal of the driving TFT 301 is connected to one of the electrodes of the capacitance element and the switching TFT 30 2 is connected to the other of the source terminal or drain terminal.

[0053] The other terminal of the capacitor element 300 is electrically connected to a power supply line 306 .

[0054] One terminal of the capacitance element 300 is connected to the gate terminal of the driving TFT and the switching TFT 3. The transistor 02 is electrically connected to the other of the source terminal and the drain terminal.

[0055] Next, the layout of the pixel section will be explained using Figures 1 and 2. Figure 2 corresponds to Figure 1. 1 is a top view showing a first semiconductor layer 101, a second semiconductor layer 102, a gate wiring 105, a gate FIG. 10 is a diagram showing the stage where the electrode 100 has been formed.

[0056] The correspondence between FIG. 1, FIG. 2 and FIG. 3 will be described.

[0057] The portion surrounded by the dashed line 6001 corresponds to the driving TFT 301 .

[0058] The portion surrounded by the dashed line 6011 corresponds to the switching TFT 302 .

[0059] The portion surrounded by the dashed line 6012 corresponds to the capacitance element 300 .

[0060] The pixel electrode 107 corresponds to the pixel electrode of the display element 303 .

[0061] The signal line 104 corresponds to the signal line 304 .

[0062] The power supply line 106 corresponds to the power supply line 306 .

[0063] In FIG. 1, a first semiconductor layer 101 is an island-shaped semiconductor layer of a switching TFT. The region overlapping with the gate wiring 105 is the channel forming region, and the region connected to the signal line 104 is the source region. A contact terminal (or drain terminal) is connected to the connection electrode 103 via a contact hole. is the drain terminal (or source terminal). The switching TFT has two channels. It has a double gate structure with a channel forming region.

[0064] The switching TFT may have a single gate structure or may have three or more channels. It may also have a multi-gate structure having a channel forming region.

[0065] The second semiconductor layer 102 is an island-shaped semiconductor layer of a driving TFT 301 that drives the display element. The region overlapping with the gate electrode 100 is the channel forming region. The gate electrode of the application TFT 301 is connected to the connection electrode 103 through a contact hole. Furthermore, the source terminal (or drain terminal) of the driving TFT 301 and the power supply line 106 The drain terminal (or drain terminal) of the driving TFT 301 is connected to the gate electrode 302 via a contact hole. is a source terminal) and a connection electrode 108 are connected via a contact hole. A pixel electrode 107 is formed in contact with the connection electrode 108 .

[0066] In addition, the second semiconductor layer 102 overlaps with the gate electrode 100 via the gate insulating film. A power supply line 106 is disposed above the channel forming region. The capacitance formed between the power supply line 106 and the display element is used as a storage capacitance. can be done.

[0067] An interlayer insulating film is sandwiched between the gate electrode 100 and the power supply line 106 .

[0068] The gate electrode 100 serves as one of the electrodes of the capacitance element, and the power supply line serves as the gate electrode. The overlapping portion becomes the other electrode of the capacitance element.

[0069] In addition, to prevent short circuits of the electrodes of the display element, the area other than the light-emitting area is covered with a partition (insulator). The width of the partition wall provided between adjacent left and right pixels is, for example, 20 μm. In this embodiment, the thickness is about 25 μm. Signal lines 104 and power supply lines 106 are arranged between the pixel electrodes.

[0070] In this embodiment, the longitudinal direction of the power supply line 106 and the shape of the pixel electrode The power supply line 1 is arranged so as to be parallel to the longitudinal direction (longitudinal direction of the pixel electrode). The driving TFT is arranged below the 06 so as to overlap it. Place it parallel to the direction.

[0071] However, in the present invention, the power supply line 106 is always arranged parallel to the longitudinal direction of the pixel electrode. In addition, it is not necessary to place the driving TFT 301 below the power supply line 106.

[0072] Therefore, when the signal line 104 is arranged parallel to the longitudinal direction of the pixel electrode, The driving TFT 301 may be disposed below the signal line 104 so as to overlap it.

[0073] In addition, the shape of the pixel electrode may be a square, a substantially square (for example, a square with notches at the corners). Or a square shape with rounded corners (not all corners need to be rounded. Only the corners of the power supply may be rounded. It does not matter whether the driving TFT 301 is disposed below the line 106 or the signal line 104. .

[0074] The pixel electrode may have a rectangular or substantially rectangular shape (for example, a rectangular shape with notches at the corners). A rectangular shape with rounded corners (all corners must be rounded). It is not necessary to round the corners. Only some corners may be rounded.)), oval, polygonal, approximately polygonal (for example, polygonal A shape with notches at the corners of a polygon, or a shape with rounded corners (all corners are rounded) It does not have to be rounded. Only some corners can be rounded. The shape of the pixel electrode is not limited to these examples. When the pole shape is rectangular or nearly rectangular, it is easy to arrange the wiring in a grid pattern, so the layout This is preferable as it makes it easier to design the product.

[0075] The size of the pixel electrode may be different for each pixel. It may be different for each element.

[0076] Also, when the length of the required channel width is shorter than the length in the short side direction of the pixel electrode shape the driving TFT 301 may be arranged so as to overlap below the wiring arranged parallel to the short side direction if appropriate.

[0077] Also, a part of the power supply line 106 may be arranged above or below the pixel electrode. In such an arrangement, the gate electrode of the driving TFTs 301 is arranged so as to overlap with a part of the power supply line 106.

[0078] Note that the direction of the channel width of the driving TFT 301 is set to be parallel to the long side direction (the long side direction of the wiring) in the shape of the wiring. This makes it possible to increase the length of the channel width. Also, since the wiring is arranged between adjacent pixel electrodes, the long side direction (the long side direction of the wiring) in the shape of the wiring is set to be parallel to the long side direction or the short side direction of the pixel electrode, thereby increasing the aperture ratio.

[0079] Note that since current usually flows in the long side direction of the wiring, it can also be said that the direction of the channel width is parallel to the direction in which current flows in the wiring arranged above the

[0080] channel formation region. Also, in this embodiment, it is the case of operating in the linear region. When the channel length is L and the [[ID=Channel width is W, the driving TFT has a double gate structure with L < W. Here, the driving TFT has a double gate structure with L = 7 μm and W = 20 μm approximately. Then, when performing the pixel layout, the wiring is arranged under the partition wall with a width of 20 μm, and the driving TFT is arranged under the wiring, thereby increasing the aperture ratio even when the size of the driving TFT becomes large. .

[0081] In this embodiment, the semiconductor layer is bent in a U-shape relative to the gate electrode 100. This turns the channel width direction to the pixel direction (dotted line 6001 in Fig. 1 and Fig. 2). The electrodes can be arranged parallel to the longitudinal direction of the electrodes (see arrows 7001 in Figs. 1 and 2). ).

[0082] The longitudinal direction of the shape of the impurity regions connecting the channel forming regions is called the channel It is preferable that the direction is parallel to the width direction. This allows the narrow space between the pixel electrodes ( This allows for the placement of TFTs of as large a size as possible in the space between adjacent pixel electrodes. This is because an increase in the aperture ratio can be expected. Since a current flows in the longitudinal direction of the impurity region, the resistance value of the impurity region can be increased. Therefore, the off current can be reduced.

[0083] However, in the present invention, if the direction of the channel width is perpendicular to the longitudinal direction of the pixel electrode, Therefore, the channel width can be increased by the length of the island-shaped semiconductor layer of the TFT. The shape is not limited to the U-shape as in this embodiment.

[0084] The capacitor element 300 includes a second semiconductor layer 102, a gate electrode 100, and a second semiconductor A gate insulating film (first storage capacitor) formed between the layer 102 and the gate electrode 100 and The gate electrode 100, the power supply line 106, and the gate electrode 100 and the power supply line 106 are connected to each other. The second storage capacitor can be formed by an interlayer insulating film formed on the first storage capacitor.

[0085] In this case, the gate electrode 100 and the second semiconductor layer 10 are connected in the dashed line portion 6012. 2 and a gate insulating film formed between the semiconductor layer 102 of the gate electrode 2, Therefore, the area of ​​the gate electrode in the dashed line portion 6012 is increased. This allows the storage capacitance to be increased.

[0086] With the above configuration, it is possible to fill the narrow space between pixel electrodes (the space between adjacent pixel electrodes). It is possible to arrange TFTs of as large a size as possible (especially TFTs with a large channel width). Therefore, the aperture ratio can be increased.

[0087] Since the TFT is very small, there is a large variation in the thickness or quality of the gate insulating film. The electrical characteristics may vary depending on the variations in the implant dose during ion doping. However, there is a problem that the measurement value is easily varied.

[0088] In particular, when amorphous silicon, microcrystalline silicon, or polycrystalline silicon is used as the semiconductor of the TFT, TFT characteristics due to the crystallinity of the conductor (e.g., on-current, off-current, threshold voltage, mobility) In particular, when the characteristics of the TFT connected to the pixel vary, The current (or voltage) supplied to the pixel varies, which deteriorates the visibility of the display device. There is a problem that...

[0089] To solve the above problem, a multi-gate structure is used. The area of ​​a TFT with a gate structure is larger than that of a TFT with a single gate structure. Therefore, in order to reduce the variation in the electrical characteristics of the TFT, a multi-gate structure TFT is used. However, by applying the configuration of the present invention, This makes it possible to reduce variations in TFT characteristics and increase the aperture ratio.

[0090] In this embodiment, a so-called constant voltage driving method is used, in which the driving TFT is operated in a linear region. An example of the formula has been explained above, so the constant voltage driving method will be explained below.

[0091] TFTs can be operated in either the saturation region or the linear region. The voltage between the gate and source of the transistor is Vgs, and the voltage between the source and drain of the transistor is V Vds and the threshold voltage of the transistor is Vth. In this case, the saturation region is |Vgs- The linear region is the region where the relationship Vth|<|Vds| holds. This refers to the range where the relation th|>|Vds| holds true.

[0092] Then, the TFT connected to the pixel electrode of the EL element (hereinafter referred to as the "driving TFT") is saturated. The method of passing a constant current through the display element by operating it in the constant current driving region is called the constant current driving method. cormorant.

[0093] The constant current drive method allows a constant current to flow continuously through the EL element, preventing deterioration of the display element. However, the constant current driving method is prone to degradation of the driving TFT. When the TFT voltage is increased, the current flowing through the driving TFT also decreases. This tends to affect the luminance variation of the display element.

[0094] On the other hand, by operating the driving TFT in the linear region, a constant voltage is applied to the EL element. This method is called a constant voltage drive method.

[0095] The constant voltage driving method operates in the linear region, so the voltage between the source and drain is This can be made lower than the voltage between the electrodes. This reduces the effect on the current flowing through the element, and therefore reduces the deterioration of the TFT. The variations in brightness are unlikely to affect the variations in brightness of the display elements.

[0096] However, even if the driving TFT is operated in the linear region, the semiconductor layer of the TFT is amorphous. When silicon, microcrystalline silicon, polycrystalline silicon, etc. are used, the crystallinity within the substrate surface varies. The impact cannot be ignored.

[0097] Therefore, in order to suppress the variations in the driving TFT, It is preferable to increase the product, that is, it is preferable to increase the channel length and the channel width. It's nice.

[0098] Also, the longer the channel width, the lower the voltage between the source and drain can be. Furthermore, the shorter the channel length, the lower the voltage between the source and drain can be. Preferably, the channel width is longer than the channel length.

[0099] Therefore, when the TFT is operated in the linear region, the surface of the channel forming region of the driving TFT To increase the product, it is preferable to increase the channel width.

[0100] Generally, the area of ​​the channel forming region is increased to increase the opening of the display device. In other words, when trying to reduce the variation in TFT characteristics, In other words, in general, the reduction of TFT characteristic variations and the increase of aperture ratio are It is very difficult to simultaneously realize both of these. This becomes particularly noticeable when the area of ​​the channel forming region of the TFT structure is increased.

[0101] However, by applying the configuration of this embodiment, it is possible to reduce the variation in the characteristics of the TFT and It is possible to simultaneously achieve both an increase in the number of customers and an increase in the acceptance rate.

[0102] In addition, increasing the aperture ratio reduces power consumption and improves the reliability of the display element. That is, when a certain brightness is required, the larger the aperture ratio, the smaller the current (or voltage) required. This is because the brightness can be increased by increasing the current (or voltage) supplied to the display element. ) is smaller, the deterioration rate of the display element is reduced.

[0103] In addition, the deterioration rate of each display element varies. If the deterioration rate of the display element is reduced by increasing the brightness, the variation in the brightness deterioration of the display element can also be reduced. Therefore, the synergistic effect of reducing the variation in TFT characteristics and the variation reduction due to the increased aperture ratio is achieved. This can improve the visibility of the display device.

[0104] In addition, a TFT with a multi-gate structure can reduce the off-current of the TFT. Therefore, whether the semiconductor of the TFT is non-single crystal or single crystal, the multi-gate structure It is preferable to use a TFT of this type.

[0105] Also, as in this embodiment, a driving transistor and a switch connected to the driving transistor are The switching transistor is placed below the wiring (signal line or power supply line), and the The direction of the channel length of the switching transistor and the direction of the channel length of the driving transistor are arranged vertically, and the direction of the channel width of the driving transistor is the direction of the current flow in the wiring. By setting the orientation in this direction, the aperture ratio can be increased.

[0106] (Embodiment 2) In this embodiment, the meaning of "longitudinal direction of the wiring shape (longitudinal direction of the wiring)" is as follows: This will be specifically described with reference to FIGS. 5, 6 and 7.

[0107] The "longitudinal direction of the wiring shape" ("channel width direction") is the same as the "channel The direction is parallel to the direction in which current flows in the wiring arranged above the formation region. In the case of zigzag or meander-shaped wiring, which will be described later, the current does not necessarily flow in a straight line. In this case, the flow direction is not the "longitudinal direction of the wiring shape" ("channel width"). The "direction of current flow" refers to the "direction of current flow in the wiring region arranged above the channel formation region." The direction is approximately parallel to the direction of the

[0108] Here, the shape of the wiring does not necessarily have to be a straight line as in Figure 5. For example, As shown in FIG. 7, the first wirings 501 and 502 may be formed in a zigzag shape. In addition, the first wirings 501 and 502 may have a meandering shape.

[0109] 5, 6, and 7 are schematic diagrams showing the arrangement of wiring and pixel electrodes. FT is not shown. 501 to 504 are first wirings, and 601 and 602 are second wirings. The first wiring and the second wiring are connected to the pixel electrodes 701 to 707. is a source signal line, and the other is a power supply line.

[0110] A zigzag shape is a straight line that bends left and right multiple times. Also, the word "meander" means "flowing in a winding manner." The meandering shape refers to such a shape.

[0111] As shown in FIG. 5, the first wirings 501 to 504 and the second wiring 601 are linear. In this case, the "longitudinal direction of the wiring shape (first arrow 8001 in Figure 5)" is The direction in which the current flows in the first wiring arranged above the channel formation region (the first wiring in FIG. 5) The direction is parallel to the arrow 8001).

[0112] When the wiring is zigzag as shown in FIG. 6, for example, the first wiring area 5001 in FIG. In this case, the TFT is placed under the wiring in the longitudinal direction (the second arrow in Figure 6). 8002)" refers to the direction in which current flows in the wiring placed above the channel formation region. The direction is parallel to the direction of the second arrow 8002 in FIG. 6.

[0113] On the other hand, when a TFT is arranged under the second wiring region 5002 in FIG. 6, for example, The longitudinal direction (third arrow 8003 in FIG. 6) is The direction is parallel to the direction in which the current flows in the connected wiring (third arrow 8003 in FIG. 6). do.

[0114] Even if the wiring is meandering as shown in Figure 7, the current flows along the shape of the wiring. Therefore, the current flows in a direction that is not parallel to the longitudinal direction of the wiring. However, ultimately, the electrons are directed in a direction parallel to the longitudinal direction of the wiring. Therefore, when the wiring is shaped like this, The direction of the channel width is defined as "the direction in which current flows in the wiring region arranged above the channel forming region." The direction is "approximately parallel to the direction in which the wiring is wound" or "parallel to the longitudinal direction of the wiring shape."

[0115] With the above configuration, the pixel electrodes can be arranged in the narrow space between the pixel electrodes (the space between adjacent pixel electrodes). In addition, a TFT (especially a channel) of as large a size as possible can be placed under the wiring. It is possible to arrange TFTs with a large panel width, which allows for an increase in aperture ratio. .

[0116] (Embodiment 3) In this embodiment, other variations of the layout of the driving transistor of the present invention are illustrated. The present invention is not limited to the layout exemplified in this embodiment.

[0117] 8 shows the layout of the single gate structure. The first semiconductor layer 101 is The region overlapping with the gate wiring 105 is the channel forming region, The area connected to the signal line 104 through the contact hole is the source terminal (or drain terminal). ), and the region connected to the connection electrode 103 is the drain terminal (or source terminal).

[0118] The second semiconductor layer 102 is an island-shaped semiconductor layer of a driving TFT 301 that drives the display element. The region overlapping with the gate electrode 100 is the channel forming region. The gate electrode of the application TFT 301 is connected to the connection electrode 103 via a contact hole. Furthermore, the source terminal (or drain terminal) of the driving TFT 301 and the power supply line 106 The drain terminal (or source terminal) of the driving TFT 301 and the connection electrode 108 is connected through a contact hole. A pixel electrode 107 is formed.

[0119] The correspondence between FIG. 8 and FIG. 3 is as follows:

[0120] The portion surrounded by the dashed line 6002 corresponds to the driving TFT 301 .

[0121] The portion surrounded by the dashed line 6021 corresponds to the switching TFT 302 .

[0122] The portion surrounded by the dashed line 6022 corresponds to the capacitance element 300 .

[0123] The pixel electrode 107 corresponds to the pixel electrode of the display element 303 .

[0124] The signal line 104 corresponds to the signal line 304 .

[0125] The power supply line 106 corresponds to the power supply line 306 .

[0126] 9 is a top view corresponding to FIG. 8, and shows the first semiconductor layer 101 and the second semiconductor layer 10 2, the gate wiring 105, and the gate electrode 100 have been formed.

[0127] The impurity region of the semiconductor layer is then formed in the longitudinal direction of the pixel electrode (or in the direction in which the current in the wiring flows). The patterning is performed so that the wiring is parallel to the direction of the wiring (or the longitudinal direction of the wiring shape) (Fig. 8 9 (dotted line 6002). This allows the direction of the channel width to be aligned with the length of the pixel electrode. It can be arranged parallel to the longitudinal direction (arrow 7002 in FIGS. 8 and 9).

[0128] 10 is a layout of the triple gate structure. The first semiconductor layer 101 is a switch The region overlapping with the gate wiring 105 is the channel forming region. The region connected to the signal line 104 is the source terminal (or drain terminal), and the region connected to the connection electrode 103 is the The region connected via the contact hole is the drain terminal (or source terminal).

[0129] The second semiconductor layer 102 is an island-shaped semiconductor layer of a driving TFT 301 that drives the display element. The region overlapping with the gate electrode 100 is the channel forming region. The gate electrode of the driving TFT 301 is connected to the connection electrode 103. The source terminal (or drain terminal) of 301 and the power supply line 106 are connected via a contact hole. The drain terminal (or source terminal) of the driving TFT 301 and the connection electrode 108 is connected through a contact hole. A pixel electrode 107 is formed.

[0130] The correspondence between FIG. 10 and FIG. 3 is as follows:

[0131] The portion surrounded by the dashed line 6003 corresponds to the driving TFT 301 .

[0132] The portion surrounded by the dashed line 6031 corresponds to the switching TFT 302 .

[0133] The portion surrounded by the dashed line 6032 corresponds to the capacitance element 300 .

[0134] The pixel electrode 107 corresponds to the pixel electrode of the display element 303 .

[0135] The signal line 104 corresponds to the signal line 304 .

[0136] The power supply line 106 corresponds to the power supply line 306.

[0137] Also, FIG. 11 is a top view corresponding to FIG. 10, and is a diagram of the stage where the first semiconductor layer 101, the second semiconductor layer 102, the gate wiring 105, and the gate electrode 100 are formed.

[0138] Then, the impurity region of the semiconductor layer is patterned (dashed line portion 6003 in FIGS. 10 and 11) so as to be parallel to the longitudinal direction of the pixel electrode (or the direction in which current flows in the wiring, or the longitudinal direction in the shape of the wiring), for example, in an S shape. Thereby, the direction of the channel width can be arranged parallel to the longitudinal direction in the shape of the pixel electrode (arrow 7003 in FIGS. 10 and 11). 方向、又は、配線の形状における長尺方向)と平行になるよう(例えば、S字形状)に、 パターニングする(図10、図11 破線部6003)。これにより、チャネル幅の方向 を画素電極の形状における長尺方向と平行に配置することができる(図10、図11 矢 印7003)。

[0139] In this embodiment, the layout of the TFT having one or three channel formation regions has been described. Also, in Embodiment 1, the layout of the TFT having two channel formation regions has been described. However, the configuration of the present invention is not limited to the configurations of these embodiments, and is also applicable to a TFT having four or more channel formation regions. 説明した。また、実施の形態1では、チャネル形成領域を2つ有するTFTのレイアウト について説明した。しかし、本発明の構成はこれらの実施の形態の構成に限定されず、4 つ以上のチャネル形成領域を有するTFTについても適用可能である。

[0140] (Embodiment 4) The present invention is not limited to a pixel composed of two TFTs. In the case of a pixel configuration having a driving TFT with a double gate structure of L < W, it can be appropriately used so as to improve the aperture ratio, have a simple aperture shape, and increase the length of the channel width. 動用TFTを有した画素構成の場合、開口率の向上やシンプルな開口部形状、且つチャネ ル幅の長さを大きくするような配置になるように適宜用いることができる。

[0141] (Embodiment 5) In this embodiment, the manufacturing process of the display device will be described. In the description, only the pixel portion will be described, but in the driving circuit portion, the manufacturing process is not limited to this, and here 部のみについて説明するが、駆動回路部においては、作製工程はこの限りではなく、ここ So I will skip the explanation.

[0142] As shown in Figure 4(A), barium borosilicate glass or aluminoborosilicate glass A silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed on a substrate made of glass such as After that, the semiconductor film having an amorphous structure is crystallized by laser crystallization or known thermal The crystalline semiconductor film crystallized by the crystallization method is patterned into a desired shape to form an island-shaped semiconductor. The underlayer and the semiconductor layer are formed by a known film forming method (for example, CV It can be formed by a method such as PVD or PVD.

[0143] In this case, the semiconductor film is crystallized to form a polycrystalline silicon film. Alternatively, polycrystalline silicon or microcrystalline silicon may be used. Alternatively, single crystal silicon may be used.

[0144] When single crystal silicon is used, a thin single crystal silicon layer is placed on a substrate (SOI substrate (Si It is best to use a PCB such as a Lithium-ion-Insulator board.

[0145] Here, impurities are added to the first region of the island-shaped semiconductor layer 4101, which will become the first capacitance portion. This allows the first region to function as a first electrode of the first capacitor. In this case, boron, which gives p-type conductivity, is implanted by ion doping. Impurities that impart n-type conductivity may be implanted. Impurities that impart n-type conductivity include phosphorus and arsenic. The addition of impurities can be performed by known methods (for example, ion doping, On-shower method, etc.) can be used.

[0146] Next, a gate insulating film is formed to cover the island-shaped semiconductor layers 4101 and 4102. Elements selected from W, Ti, Mo, Al, Cu, etc., or alloy materials containing the above elements as the main components A conductive film for forming a gate electrode is formed using a metal or compound material. Then, the gate electrodes 4103 and 4104 (4104 also serves as a scanning line) are formed by patterning the gate electrodes 4103 and 4104 into a desired shape. (Figure 4(B)).

[0147] Next, impurities are added to the impurity regions of the island-shaped semiconductor layers 4101 and 4102 to form a semiconductor layer. The source region, drain region, and channel region are formed. To form the capacitor, boron, which imparts p-type conductivity, was implanted by ion doping. When forming an n-channel transistor, impurities that impart n-type conductivity can be implanted. Impurities that give n-type conductivity include phosphorus and arsenic. For this, known methods (for example, ion doping method, ion shower method, etc.) can be used. Furthermore, an LDD region may be formed in the portion in contact with the channel forming region.

[0148] Next, annealing is performed to activate the added impurities. Known techniques such as annealing, laser annealing, etc. may be used. To protect the gate insulating film, a passivation film (e.g., silicon oxide) is formed by a known method (e.g., For example, it may be formed by a CVD method, a PVD method, or the like.

[0149] Next, an interlayer insulating film is formed. The interlayer insulating film may be an organic insulating film or an inorganic insulating film. Examples of organic insulating films include acrylic, polyimide, and siloxane. The method for forming the layer can be a known method (spin coating, dipping, etc.). The inorganic insulating film may be formed by a known method (for example, CVD method, P It may be formed by a method such as VD method. It is not recommended to use a material with a high relative dielectric constant such as silicon nitride. On the other hand, when an organic insulating film is used, flattening is possible.

[0150] The interlayer insulating film may be planarized by a known technique (for example, CMP).

[0151] Next, as shown in FIG. 4(C), island-shaped semiconductor layers 4101 and 4102 and a gate electrode 4103 are formed. , 4104, a contact hole 4105 is formed, and wirings 4106, 4107, 41 08 (4106 is a source signal line, 4107 is a power supply line) and an electrode 4110 are formed. do.

[0152] Next, as shown in FIG. 4(D), a pixel electrode 4109 is formed. The material of the pixel electrode is , indium tin oxide (commonly known as "ITO"), etc. are typical. The pixel electrode 4109 is also After forming a film made of the material, a desired shape is obtained by patterning. The pixel electrode 4109 is in contact with the substrate 110 through a contact hole 4105 .

[0153] Next, a partition is formed between adjacent pixels, and the light-emitting area is opened by patterning. After that, an EL layer is formed in the opening.

[0154] In this embodiment, a method for manufacturing a top gate type TFT has been described. However, the present invention is also applicable to bottom-gate TFTs.

[0155] (Sixth embodiment) In this embodiment mode, an example of the appearance of a light-emitting display panel will be described with reference to FIG. 14(A) is a diagram showing a first sealing material 1205 and a second sealing material 1206 between a first substrate and a second substrate. 14(A) is a top view of the panel sealed with sealing material 1206, and FIG. 14(B) is a top view of the panel sealed with sealing material 1206. ) correspond to the cross-sectional views taken along lines A-A' and B-B'.

[0156] FIG. 14A shows a pixel section 1202, a monitor element section 1230, and a scanning line driver section 1230, which are shown by dotted lines. In this embodiment, the pixel portion 1202 and The scanning line driver circuit 1203 is located in the area sealed with the first sealant and the second sealant. Also, 1201 is a signal line (source line) driver circuit, and the signal line driver circuit is a first The first sealing material is a highly viscous material containing a filler. It is preferable to use an epoxy resin. As the second sealing material, a low-viscosity epoxy resin is used. It is preferable to use an alkoxy resin. It is desirable that 206 be made of a material that is as impermeable to moisture and oxygen as possible.

[0157] In addition, a desiccant may be provided between the pixel portion 1202 and the first sealant 1205. In the pixel area, a desiccant may be provided on the scanning line or the signal line. Oxidation of alkaline earth metals such as calcium oxide (CaO) and barium oxide (BaO) It is preferable to use a material that adsorbs water (H2O) by chemical adsorption, such as Not only this, but also materials such as zeolite and silica gel that adsorb water by physical adsorption can be used. It's okay.

[0158] In addition, a highly moisture-permeable resin containing granular desiccant is used as the interlayer insulating film. The interlayer insulating film and the second substrate 1204 can be fixed with a sealant. Instead of expensive resins, inorganic materials such as PSG (phosphorus glass) and BPSG (borophosphorus glass) are used. may also be used.

[0159] A desiccant may be provided in the area overlapping the scanning line. The interlayer insulating film and the second substrate 12 are bonded together using a resin with high thermal conductivity that contains granular desiccant. The opening ratio can be reduced by using a sealing material. Therefore, it is possible to prevent moisture from entering the display element and the resulting deterioration. Therefore, it is possible to suppress the variation in deterioration of the display elements between the peripheral part and the central part of the pixel part 1202. It is possible.

[0160] The connection wiring 1210 is connected to the signal line driver circuit 1201 and the scanning line driver circuit 1203. The FPC1209 (flexible) is the external input terminal. The video signal and clock signal are received from the optical fiber (flexible printed circuit) via the connecting wiring 1208. Take.

[0161] Next, the cross-sectional structure will be described with reference to FIG. The display has a circuit and a pixel section, and has multiple semiconductor elements, typically TFTs. The circuit shown is a signal line driver circuit 1201 and a pixel portion 1202. 201 is a C that combines n-channel TFT1221 and p-channel TFT1222. A MOS circuit is formed.

[0162] In this embodiment, a scanning line driving circuit and a TFT of a pixel portion are formed on the same substrate. This allows the volume of the light-emitting display device to be reduced.

[0163] The pixel section 1202 is made up of a switching TFT 1211, a driving TFT 1212, and A first pixel made of a conductive film having reflectivity electrically connected to the other of the source and the drain. It is formed by a plurality of pixels each including a base electrode 1213 (anode).

[0164] In addition, an insulator 1214 (bank, partition wall, barrier) is provided on both ends of the first pixel electrode 1213 (anode). The coverage of the film formed on the insulator 1214 is In order to improve the insulation, the upper or lower end of the insulator 1214 has a radius of curvature. The surface of the insulator 1214 is covered with an aluminum nitride film, a nitride film, or the like. Covered with a protective film made of aluminum oxide, carbon-based thin film, or silicon nitride film. Furthermore, the insulator 1214 may be a material that absorbs visible light, such as a black pigment or a dye. By using an organic material in which the above-mentioned compound is dissolved or dispersed, stray light from a display element to be formed later can be reduced. As a result, the contrast of each pixel is improved. In the case of the LCD panel, the scanning lines, the signal lines, and the TFTs are arranged below the insulating material. When the TFT is placed below the scanning line, the shape of the scanning line is The longitudinal direction (or the direction of current flow) of the TFT is arranged parallel to the channel width direction of the TFT. When a TFT is placed under a signal line, the signal line is The direction of the TFT channel width is parallel to the direction of the TFT.

[0165] In addition, an organic compound material is vapor-deposited on the first pixel electrode 1213 (anode), and an electroluminescence Furthermore, the second pixel electrode 12 is selectively formed on the electroluminescent layer 1215. Form 16 (cathode).

[0166] Thus, the first pixel electrode 1213 (anode), the electroluminescent layer 1215, and the second pixel electrode The display element 1217 is formed from the second Light is emitted toward the substrate 1204 side.

[0167] In addition, a protective laminate 1218 is formed to seal the display element 1217. Reference numeral 8 is made up of a laminate of a first inorganic insulating film, a stress relaxation film, and a second inorganic insulating film. Next, the protective laminate 1218 and the second substrate 1204 are bonded to the first sealant 1205 and the second The second sealing material is applied using a device that drops sealing material. It is preferable to drop the sealing material by dropping or discharging it from a dispenser. After forming the active matrix substrate, the second substrate and the active matrix are bonded in vacuum. The substrate is then bonded to the glass substrate, and the glass substrate is cured with ultraviolet light to seal the glass substrate.

[0168] The surface of the second substrate 1204 is provided with a reflector to prevent external light from being reflected on the substrate surface. An anti-reflection film 1226 is provided. In addition, a polarizing plate and a retardation film are provided between the second substrate and the anti-reflection film. By providing a retardation plate and a polarizing plate, external light can be prevented from passing through the optical path. It is possible to prevent the first pixel electrode 1213 from reflecting the light. The second pixel electrode 1216 is formed of a light-transmitting conductive film or a semi-light-transmitting conductive film. The interlayer insulating film is made of a material that absorbs visible light, or a material that absorbs visible light is dissolved or dispersed in the interlayer insulating film. When the organic material is used, external light is not reflected by each pixel electrode, and the retardation film and It is not necessary to use a polarizing plate.

[0169] The connection wiring 1208 and the FPC 1209 are electrically connected by an anisotropic conductive film or anisotropic conductive resin 1227. Furthermore, the connection between each wiring layer and the connection terminal is sealed with sealing resin. This structure prevents moisture from entering the display element through the cross section and causing deterioration. It can be prevented.

[0170] The space between the second substrate 1204 and the protective laminate 1218 is filled with a second sealant 120. Instead of 6, it may be possible to prevent deterioration by filling it with an inert gas, such as nitrogen gas.

[0171] A colored layer can be provided between the second substrate and the polarizing plate. In this case, a white color is applied to the pixel portion. By providing a display element capable of emitting light and separately providing a colored layer that indicates RGB, a full color display is possible. In addition, a display element capable of emitting blue light can be provided in the pixel area, and a color conversion layer can be separately provided. By providing a full color display, it is possible to further increase the number of pixels in red, green, and red. In this case, a display element that emits blue light can be formed, and a colored layer can also be used. The display module has high color purity for each RGB color, enabling high-definition display.

[0172] In addition, a film or resin may be applied to either the first substrate 1200 or the second substrate 1204, or both. A light-emitting display module may be formed using a substrate such as a film or resin. By using a substrate made of resin or the like, it is possible to improve the lightness, size and thickness of the display device.

[0173] Furthermore, the surface or end of the FPC1209 (flexible printed circuit) which serves as the external input terminal The light-emitting display module is equipped with IC chips such as a controller, memory, and pixel driving circuit. may be formed.

[0174] (Embodiment 7) A light-emitting element is a device that has a structure in which an organic compound layer that emits light when an electric field is generated is sandwiched between an anode and a cathode. However, the term "OLED element" is not limited to this.

[0175] A light-emitting element is a device that uses the light emitted (fluorescence) when a singlet exciton transitions to the ground state. and those that utilize luminescence (phosphorescence) that occurs when triplet excitons transition to the ground state. This is intended to be shown.

[0176] The organic compound layer includes a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, etc. The light-emitting element basically has a structure in which an anode, a light-emitting layer, and a cathode are stacked in this order. In addition, there is a structure in which an anode, a hole injection layer, a light emitting layer, an electron injection layer, and a cathode are stacked in this order. In the structure, an anode, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, and a cathode are sequentially formed. There are stacked structures.

[0177] The organic compound layer includes a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, etc. In other words, the organic compound layer is not limited to a layer having a clearly distinguished laminated structure. The materials constituting the hole injection layer, hole transport layer, light emitting layer, electron transport layer, electron injection layer, etc. are mixed. It may also have a structure having layers.

[0178] Inorganic substances may also be mixed.

[0179] The organic compound layer of the OLED element may be made of low molecular weight materials, high molecular weight materials, or medium molecular weight materials. The material may be any material.

[0180] In this specification, the term "middle molecular material" refers to a material in which the length of the chain of molecules is 10 μm or less and which is It shall not have any floral characteristics.

[0181] (Embodiment 8) Another configuration that can be applied to the display element of the present invention will be described with reference to FIGS. 12 and 13. do.

[0182] Light-emitting elements (display elements) that utilize electroluminescence use organic compounds as light-emitting materials. Generally, the former is an organic EL element and the latter is an inorganic compound. These are called organic EL elements.

[0183] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. The former has an electroluminescent layer in which particles of a luminescent material are dispersed in a binder, and the latter has The difference is that it has an electroluminescent layer made of a thin film of a light-emitting material, but it is accelerated by a high electric field. The mechanism of light emission is similar to that of the donor. Donor-acceptor recombination luminescence utilizing the - and acceptor levels, and metal ion In general, in dispersed inorganic EL devices, the donor -Acceptor recombination type emission, while thin-film inorganic EL devices often use localized emission.

[0184] The luminescent material that can be used in the present invention is composed of a host material and an impurity element that becomes the luminescent center. By changing the impurity elements contained, it is possible to obtain light of various colors. Various methods can be used to prepare luminescent materials, such as the solid-phase method and the liquid-phase method (coprecipitation method). In addition, spray pyrolysis, double decomposition, precursor pyrolysis, and reverse decomposition are also possible. There are also liquid phase methods such as the micelle method, a method that combines these methods with high-temperature baking, and freeze-drying. It can be used.

[0185] In the solid phase method, the base material and the impurity element or a compound containing the impurity element are weighed and mixed in a mortar. This method involves heating and firing in an electric furnace to induce a reaction, which causes the impurity elements to be incorporated into the base material. The growth temperature is preferably 700 to 1500°C. If the temperature is too low, the solid-phase reaction does not proceed. If the temperature is too high, the base material will decompose. However, it is preferable to perform firing in the pellet state. However, since it is a simple method, it is highly productive and suitable for mass production.

[0186] The liquid phase method (coprecipitation method) is a method in which a base material or a compound containing a base material and an impurity element or an impurity element are mixed together. This method involves reacting a compound containing the luminescent material in a solution, drying it, and then baking it. The molecules are uniformly distributed, the particle size is small, and the reaction can proceed even at a low firing temperature.

[0187] The base material used for the light-emitting material may be a sulfide, an oxide, or a nitride. Examples of sulfides include zinc sulfide (ZnS), cadmium sulfide (CdS), and calcium sulfide. CaS, yttrium sulfide (Y2S3), gallium sulfide (Ga2S3), sulfur Strontium (SrS), barium sulfide (BaS), etc. can be used. As the material, for example, zinc oxide (ZnO), yttrium oxide (Y2O3), etc. can be used. As the nitride, for example, aluminum nitride (AlN), gallium nitride, GaN, indium nitride (InN), etc. can be used. Lead (ZnSe), zinc telluride (ZnTe), etc. can also be used, and calcium sulfide-gallium Strontium (CaGa2S4), strontium-gallium sulfide (SrGa2S4), barium sulfide It may also be a ternary mixed crystal such as sodium-gallium (BaGa2S4).

[0188] The luminescent centers of localized luminescence are manganese (Mn), copper (Cu), samarium (Sm), and thiamin (Te). Rubium (Tb), Erbium (Er), Thulium (Tm), Europium (Eu), Se Ce, praseodymium (Pr), etc. can be used. In addition, a halogen element such as fluorine (F) or chlorine (Cl) may be added.

[0189] On the other hand, the first electrons that form the donor level act as the luminescence centers of donor-acceptor recombination luminescence. and a light-emitting material containing a second impurity element that forms an acceptor level. The first impurity element can be, for example, fluorine (F), chlorine (Cl), aluminum (Al), or the like. The second impurity element may be, for example, copper (Cu), Silver (Ag) or the like can be used.

[0190] When synthesizing a donor-acceptor recombination luminescent material using the solid-phase method, the host material a first impurity element or a compound containing the first impurity element; and a second impurity element or a compound containing the second impurity element. The compounds containing the above impurity elements were weighed and mixed in a mortar, then heated and fired in an electric furnace. The base material can be the above-mentioned base material, and the first impurity element is For example, fluorine (F), chlorine (Cl), etc. can be used as the first impurity element. As a compound containing aluminum sulfide (Al2S3), for example, aluminum sulfide (Al2S3) can be used. The second impurity element may be, for example, copper (Cu), silver (Ag), or the like. Compounds containing the impurity element 2 include, for example, copper sulfide (CuS), silver sulfide (AgS The firing temperature is preferably 700 to 1500°C. If the temperature is too low, If the temperature is too high, the solid-state reaction will not proceed, and if the temperature is too high, the base material will decompose. Although the firing may be carried out in a powder state, it is preferable to carry out the firing in a pellet state.

[0191] In addition, as impurity elements when using a solid-state reaction, a first impurity element and a second impurity element are used. In this case, the impurity element is easily diffused. This facilitates the solid-state reaction, making it possible to obtain a uniform luminescent material. Since no significant impurity elements are introduced, a highly pure light-emitting material can be obtained. Examples of compounds consisting of an element and a second impurity element include copper chloride (CuCl), salt Silver chloride (AgCl) and the like can be used.

[0192] The concentration of these impurity elements should be 0.01 to 10 atom% relative to the base material. The content is preferably in the range of 0.05 to 5 atom %.

[0193] In the case of a thin-film inorganic EL, the electroluminescent layer is a layer containing the above-mentioned luminescent material, and is formed by a resistance heating deposition method, Vacuum deposition methods such as electron beam deposition (EB deposition), physical vapor deposition methods such as sputtering ( Chemical vapor deposition (CVD) methods such as PVD, metal organic CVD, and hydride transport low pressure CVD. D), atomic layer epitaxy (ALE), or the like.

[0194] 12(A) to 12(C) show an example of a thin-film inorganic EL element that can be used as a display element. 12(A) to 12(C), the display element includes a first electrode layer 50, an electroluminescent layer 52, including a second electrode layer 53.

[0195] The display elements shown in FIGS. 12B and 12C are the same as the display element shown in FIG. 12A except that the The display element shown in FIG. 12(B) has a structure in which an insulating layer is provided between the electrode layer and the electroluminescent layer. 12(C) which has an insulating layer 54 between the electrode layer 50 and the electroluminescent layer 52. The insulating layer 54a is disposed between the first electrode layer 50 and the electroluminescent layer 52, and the second electrode layer 53 is disposed between the An insulating layer 54b is provided between the light-emitting layer 52. In this way, the insulating layer sandwiches the electroluminescent layer. The insulating layer may be provided between only one of the pair of electrode layers, or between both of them. The insulating layer may be a single layer or a laminate of multiple layers.

[0196] In addition, in FIG. 12(B), an insulating layer 54 is provided so as to contact the first electrode layer 50. The insulating layer 54 is placed in contact with the second electrode layer 53 by reversing the order of the insulating layer and the electroluminescent layer. It may be provided.

[0197] In the case of a dispersion-type inorganic EL element, particulate luminescent material is dispersed in a binder to form a film-like electroluminescent layer. When the method for producing the luminescent material does not produce particles of the desired size, The binder is a granular luminescent material. It is a substance that fixes the dispersed state and maintains the shape of the electroluminescent layer. The material is uniformly dispersed and fixed in the electroluminescent layer by the binder.

[0198] In the case of a dispersion type inorganic EL element, the electroluminescent layer can be selectively formed by the method of forming the electroluminescent layer. droplet ejection method, printing method (screen printing, offset printing, etc.), spin coating method, The film thickness is not particularly limited. However, it is preferably in the range of 10 to 1000 nm. In the electroluminescent layer, the ratio of the light emitting material is preferably 50 wt % or more and 80 wt % or less.

[0199] 13A to 13C show an example of a dispersion-type inorganic EL element that can be used as a display element. The display element in FIG. 13A includes a first electrode layer 60, an electroluminescent layer 62, a second A laminated structure of an electrode layer 63 and a luminescent material held by a binder in an electroluminescent layer 62 Including 61.

[0200] The binder that can be used in this embodiment can be an organic material or an inorganic material. A mixed material of an organic material and an inorganic material may be used. Polymers with relatively high dielectric constants, such as cellulose-based resins, polyethylene, polypropylene, etc. Resins such as polyethylene, polystyrene resin, silicone resin, epoxy resin, and vinylidene fluoride In addition, aromatic polyamide, polybenzimidazole (poly A heat-resistant polymer such as benzimidazole or a siloxane resin may also be used. Siloxane resin is a resin containing Si-O-Si bonds. The skeleton structure is made up of bonds between silicon (Si) and oxygen (O). Organic groups containing at least hydrogen (e.g., alkyl groups, aromatic hydrocarbons) are used. Alternatively, a fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen may be used as a substituent. In addition, polyvinyl alcohol, polyvinyl butyral, etc. may be used. Any vinyl resin, phenolic resin, novolac resin, acrylic resin, melamine resin, urea resin Resin materials such as tan resin and oxazole resin (polybenzoxazole) may also be used. These resins are coated with barium titanate (BaTiO3) and strontium titanate (SrT The dielectric constant can also be adjusted by mixing an appropriate amount of high-dielectric-constant fine particles such as SiO3.

[0201] The inorganic materials contained in the binder include silicon oxide (SiO x ), silicon nitride (SiN x ), Silicon containing oxygen and nitrogen, aluminum nitride (AlN), aluminum containing oxygen and nitrogen Aluminum or aluminum oxide (Al2O3), titanium oxide (TiO2), BaTiO3, S rTiO3, lead titanate (PbTiO3), potassium niobate (KNbO3), niobic acid Lead (PbNbO3), tantalum oxide (Ta2O5), barium tantalate (BaTa2O 6), lithium tantalate (LiTaO3), yttrium oxide (Y2O3), zirconium oxide Materials selected from substances containing ZnO (ZrO2), ZnS, and other inorganic materials are used. By adding an inorganic material with a high dielectric constant to an organic material (by adding, etc.), This allows for better control of the dielectric constant of the electroluminescent layer made of the luminescent material and binder. This allows the dielectric constant to be increased.

[0202] In the manufacturing process, the light-emitting material is dispersed in a solution containing a binder. The solvent of the binder-containing solution that can be used is a solvent that dissolves the binder material and forms an electroluminescent layer. It is possible to prepare a solution with a viscosity suitable for the method of forming the film (various wet processes) and the desired film thickness. An organic solvent or the like can be used, for example, as a binder. When using siloxane resin as the Phenylene glycol monomethyl ether acetate (PGMEA), 3-methoxy- 3-methyl-1-butanol (also known as MMB) can be used.

[0203] The display elements shown in FIGS. 13B and 13C are the same as the display element shown in FIG. 13A except that the The display element shown in FIG. 13(B) has a structure in which an insulating layer is provided between the electrode layer and the electroluminescent layer. 13(C) which has an insulating layer 64 between the electrode layer 60 and the electroluminescent layer 62. The insulating layer 64a is disposed between the first electrode layer 60 and the electroluminescent layer 62, and the second electrode layer 63 is disposed between the An insulating layer 64b is provided between the light-emitting layer 62. In this way, the insulating layer sandwiches the electroluminescent layer. The insulating layer may be provided between only one of the pair of electrode layers, or between both of them. The insulating layer may be a single layer or a laminate of multiple layers.

[0204] In addition, in FIG. 13(B), an insulating layer 64 is provided so as to contact the first electrode layer 60. The order of the insulating layer and the electroluminescent layer is reversed, and the insulating layer 64 is placed in contact with the second electrode layer 63. It may be provided.

[0205] The insulating layer such as the insulating layer 54 in FIG. 12 and the insulating layer 64 in FIG. 13 is not particularly limited. However, it is preferable that the dielectric strength is high and the film quality is dense. For example, silicon oxide (SiO2), yttrium oxide (YO 3), titanium oxide (TiO2), aluminum oxide (Al2O3), hafnium oxide (H fO2), tantalum oxide (Ta2O5), barium titanate (BaTiO3), titanic acid Strontium (SrTiO3), lead titanate (PbTiO3), silicon nitride (Si3 N4), zirconium oxide (ZrO2), etc., or a mixed film of these or a laminated film of two or more types. These insulating films can be formed by sputtering, vapor deposition, CVD, etc. The insulating layer may be formed by dispersing particles of these insulating materials in a binder. The binder material is formed using the same material and method as the binder contained in the electroluminescent layer. The film thickness is not particularly limited, but is preferably in the range of 10 to 1000 nm. be.

[0206] The display element shown in this embodiment mode has a structure in which a voltage is applied between a pair of electrode layers sandwiching an electroluminescent layer. Light can be emitted by driving either DC or AC. do.

[0207] (Embodiment 9) In the first to eighth embodiments, a display device using electroluminescence is mainly used as an example. However, the present invention is applicable to various active matrix display devices. Other display devices include liquid crystal display devices, FEDs (Field Emissive Display Devices), and ion Display) and others.

[0208] (Embodiment 10) The present invention is also applicable to various semiconductor devices other than display devices (note that the present invention is not limited to semiconductor devices). (The term "device" includes display devices.)

[0209] For example, DRAM (Dynamic Random Access Memory) There is a memory element (storage element). Figure 15(A) shows the circuit diagram of a DRAM. A unit in which one terminal of 401 is connected to a cell plate 402 (capacitance element) is called one cell. The cells are connected to each other by wiring. The other terminal of transistor 401 is connected to bit line 403. The gate is connected to a word line 404 .

[0210] The operating principle of DRAM is explained below. When the transistor 401 is an N-type transistor, During the write period, a positive voltage is applied to the bit line 403 and the word line 404 to activate the cell polarity. Charge is accumulated at rate 402. In addition, during the data read period, a positive voltage is applied to the word line. By applying a voltage, the charge stored in the cell plate 402 is transferred to the bit line 403. If the transistor 401 is a P-type transistor, the voltages with the opposite polarities are applied. It is sufficient to apply it during these periods.

[0211] Furthermore, the larger the area of ​​the cell plate 402, the larger the capacitance. This prevents soft errors (errors recorded in memory cells due to factors such as the impact of cosmic rays) This can prevent errors such as the loss (rewriting) of stored information. Therefore, in order to increase the capacitance of the capacitor element, it is necessary to increase the surface area of ​​the capacitor element.

[0212] Therefore, wiring is provided between adjacent electrodes, and a thin film transistor is connected to the capacitance element below it. and the direction of the channel width of the channel forming region of the thin film transistor is set to the wiring. The direction is parallel to the direction of current flow in the electrode or parallel to the longitudinal direction of the electrode. By placing the capacitor, the capacitance of the capacitor element can be increased.

[0213] In this embodiment, as shown in FIG. 16, the direction of the channel width of the transistor 401 is the cell plate. The electrode 402 (or the electrode of the capacitance element) is arranged parallel to the longitudinal direction of the shape (FIG. 16 The transistor 401 may have a single gate structure or a multi-gate structure. It may also be a structure.

[0214] The DRAM structure may be either a stack type or a trench type. After forming the insulating film, a step is formed on the substrate by etching the insulating film. On the other hand, the trench type is formed by etching the substrate. This creates a step, and the capacitor element is embedded in the step.

[0215] The stacked DRAM is fabricated by a known method using SOI (Silicon on Insulator) A transistor is formed on a semiconductor substrate (insulator), or the method described in embodiment 3 is used. Then, an insulating film (e.g., acrylic, polyimide, siloxane, (Silicon oxide, silicon nitride, etc. can be used) is formed. Next, the insulating film is patterned. After this, the step is formed by etching.

[0216] Then, a lower electrode (e.g., aluminum) in contact with the source or drain region of the transistor is formed. Next, a dielectric film (for example, titanium oxide) is formed. tantalum oxide, silicon nitride, silicon oxide, etc. can be used). Form an electrode (for example, tungsten silicide, polysilicon, etc. can be used). By doing so, a capacitance element is formed on the step.

[0217] The manufacturing method of trench type DRAM is to first pattern the substrate and then etch it. Then, a step is formed on the substrate by a known method. A transistor is formed on a silicon substrate (on a silicon substrate insulator), or The TFT is fabricated by the method described in .

[0218] Then, a lower electrode (e.g., aluminum) in contact with the source or drain region of the transistor is formed. Next, a dielectric film (for example, titanium oxide) is formed. tantalum oxide, silicon nitride, silicon oxide, etc. can be used). Form an electrode (for example, tungsten silicide, polysilicon, etc. can be used). By doing so, a capacitance element is formed on the step.

[0219] Furthermore, the present invention can be applied to elements other than DRAM when the area of ​​the element is to be enlarged. FIG. 15B shows a circuit diagram of an element to which the present invention can be applied. A unit in which one terminal of the element 412 is connected to the element 412 is considered to be one cell. The other terminal of the transistor 411 is connected to the first The gate of the transistor 411 is connected to a wiring 413. The gate of the transistor 411 is connected to a second wiring 414. is connected.

[0220] Therefore, wiring is provided between adjacent elements, and thin film transistors connected to the elements are placed below the wiring. and the direction of the channel width of the channel forming region of the thin film transistor is set to the direction of the wiring. The direction is parallel to the direction of current flow or parallel to the longitudinal direction of the element. By placing the element in a different position, it is possible to increase the area of ​​the element or the number of elements.

[0221] The element 412 may be, for example, an organic memory, a photodiode, a piezoelectric element, or the like. can be done.

[0222] When an organic memory is used as the element 412, a storage element can be formed. As an organic memory method, the first wiring 413 and the second wiring 414 are selected to electrically A method of storing information in an organic material, i.e., a conjugated polymer material doped with a photoacid generator, is used. There is a method for optically storing information by irradiating an organic memory element with laser light. To form a memory element, a certain amount of area is required. In order to achieve this, it is effective to increase the number of memory elements. This is effective because it allows the number of memory elements to be increased.

[0223] Furthermore, when a photodiode is used as the element 412, a photosensor can be formed. There are two types of photodiodes: PN photodiodes and PIN photodiodes. , avalanche photodiodes, Schottky photodiodes, etc. can be used. The larger the area of ​​the photodiode, the higher the photoelectric conversion efficiency. This is effective.

[0224] Furthermore, by using a piezoelectric element as the element 412, a pressure sensor can be formed. Furthermore, a touch panel can be formed by forming a piezoelectric element and a display element on the same substrate. The piezoelectric element can be a pressure sensor with a parallel plate capacitor, a p-type silicon The silicon crystal is doped with n-type impurities by thermal diffusion, and a compensated high-resistance intrinsic semiconductor region is formed by straining. There are strain gauge type pressure sensors that are used as strain gauges. The larger the area, the higher the sensitivity of the sensor. Therefore, it is effective to adopt the configuration of the present invention.

[0225] As described above, the present invention can be applied to various semiconductor devices.

[0226] (Embodiment 11) The display device of the present invention can be used in the display portion of various electronic devices. It is desirable to use the display device of the present invention in such mobile devices. The semiconductor device can be used in a variety of electronic devices, especially in mobile devices that require thinness and light weight. It is desirable to use the semiconductor device of the present invention in the equipment.

[0227] As an example of an electronic device incorporating the display device or semiconductor device of the present invention in a housing, a television set (also simply called TV, television, or television receiver), camera (video camera or digital camera) digital cameras, goggle displays, navigation systems, sound reproduction devices ( Car audio, audio components, computers, game devices, mobile information terminals (mobile phones, etc.) mobile computers, mobile phones, portable game consoles, e-books, etc.), Image playback devices (specifically DVDs (digital versatile discs) and DVD (High Definition DVD), Blu-ray Disc (Blu-ray A display that can play back recording media such as a .y (registered trademark) Disk and display the images. Examples of electronic devices include electronic devices with a display unit, and other electrical appliances with a display unit. Shown in Figure 17.

[0228] FIG. 17A shows a portable information terminal, which includes a main body 9201, a display portion 9202, and the like.

[0229] FIG. 17B shows a digital video camera, which includes a main body 9702, a display portion 9701, etc. There are.

[0230] FIG. 17C shows a mobile terminal, which includes a main body 9101, a display portion 9102, and the like.

[0231] FIG. 17D shows a portable television device including a main body 9301, a display portion 9302, etc. Such television devices are small and are installed in mobile terminals such as mobile phones. From medium-sized to large (e.g., 40 inches or larger) that can be carried around, It can be widely applied to

[0232] FIG. 17(E) shows a portable computer, which includes a main body 9401, a display portion 9402, etc. There are.

[0233] FIG. 17(F) shows a television device, which includes a main body 9501, a display portion 9502, etc. .

[0234] As described above, the scope of application of the present invention is extremely wide, and it is suitable for manufacturing methods of electronic devices in all fields. It is possible to use it. [Explanation of symbols]

[0235] 51 Electroluminescent layer 52 Electroluminescent layer 62 Electroluminescent layer 100 gate electrode 101 First semiconductor layer 102 second semiconductor layer 103 Connection electrode 104 Signal Line 105 Gate wiring 106 Power supply line 107 Pixel electrode 108 Connection electrode 300 Capacitor 301 Driving TFT 302 Switching TFT 303 Display element 304 Signal Line 305 scan lines 306 Power supply line 401 Transistor 402 Cell Plate 403 bit lines 404 Word Line 411 Transistor 412 elements 413 First Wiring 414 Second Wiring 501 First Wiring 502 First Wiring 503 First Wiring 601 Second Wiring 602 Second Wiring 701 Pixel electrode 702 pixel electrode 703 Pixel electrode 704 pixel electrode 705 pixel electrode 706 pixel electrode 707 Pixel electrode 1200 First board 1201 Signal line driver circuit 1202 Pixel section 1202 Pixel section 1203 Scanning line driver circuit 1204 Second board 1205 First sealing material 1206 Second sealing material 1208 Connection wiring 1209 FPC 1210 Connection wiring 1211 Switching TFT 1212 driving TFT 1213 First pixel electrode 1214 Insulators 1215 Electroluminescent layer 1216 Second pixel electrode 1217 Display element 1218 Protective Lamination 1221 n-channel TFT 1222 p-channel TFT 1226 Anti-reflection coating 1227 Anisotropic conductive resin 1230 Monitor element section 4101 Island-shaped semiconductor layer 4102 Island-shaped semiconductor layer 4103 Gate electrode 4104 Gate electrode 4105 Contact hole 4106 Wiring 4107 Wiring 4108 Wiring 4109 Pixel electrode 4110 Light-emitting area 5001 First wiring area 5002 Second wiring area 6001 Dashed line 6002 Dashed line area 6003 Dashed line section 6011 Dashed line section 6012 Dashed line section 6021 Dashed line section 6022 Dashed line section 6031 Dashed line section 6032 Dashed line section 7001 Arrow 7002 Arrow 7003 Arrow 7004 Arrow 8001 First Arrow 8002 Second Arrow 8003 Third Arrow 8004 Fourth Arrow 9101 Main unit 9102 Display section 9201 Main Unit 9202 Display section 9301 Main Unit 9302 Display section 9401 Main Unit 9402 Display section 9501 main unit 9502 Display section 9701 Display section 9702 Main unit

Claims

[Claim 1] The pixel electrode includes a wiring provided between adjacent pixel electrodes and a thin film transistor, a channel formation region of the thin film transistor is provided below the wiring, the channel formation region is provided at a position overlapping the wiring, A display device, wherein a direction of a channel width of the channel formation region is parallel to a direction in which a current flows in the wiring.

Citation Information

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