Light-emitting device

Abstract

To provide a semiconductor device which enables the achievement of a high-speed operation, or has a large strength against a stress.SOLUTION: A semiconductor device comprises: a first gate electrode; a first insulation film over the first gate electrode; a semiconductor film having a channel formation region and a pair of impurity regions located on both sides of the channel formation region, and arranged so that the channel formation region overlaps with the first gate electrode through the first insulation film; a second insulation film covering side and top portions of the semiconductor film in the channel formation region; a second gate electrode overlying the side and top portions of the semiconductor film in the channel formation region through the second insulation film; and a source electrode and a drain electrode which are put in contact with the side and top portions of the semiconductor film in the pair of impurity regions.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. Alternatively, the present invention relates to a process, a machine, relating to the manufacture or composition of matter, especially One embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a memory device, a driving method thereof, In particular, one aspect of the present invention relates to a semiconductor device utilizing semiconductor properties. It relates to a conductor device. [Background technology]

[0002] In semiconductor display devices used in portable electronic devices, the area other than the pixel area is narrowed (narrow It is required to place part or all of the driver circuitry on the same substrate as the pixel section. The system-on-panel that will be produced is one of the effective means for realizing a narrower frame.

[0003] The following Patent Document 1 describes a system-on-panel display in which a display unit and a peripheral circuit unit are formed on the same substrate. A display device of this type is disclosed. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Publication No. 2009-151293 Summary of the Invention [Problem to be solved by the invention]

[0005] By the way, active matrix semiconductor display devices can display higher definition and higher resolution images. Therefore, the number of pixels tends to increase. Driver circuits for lines and the like are required to drive at high speeds. In particular, signal line driver circuits While the pixel in the line is selected, it is necessary to supply image signals to all pixels in the line. Therefore, the driving frequency is much higher than that of the scanning line driving circuit.

[0006] In addition, flexible materials such as plastics are used as substrates for semiconductor devices. By using such materials, the range of applications of semiconductor devices can be expanded. When a flexible substrate is used, the flexibility is lower than when a substrate with low flexibility such as a glass substrate is used. In all cases, semiconductor elements are required to have high strength against stress.

[0007] In view of the above-mentioned technical background, one aspect of the present invention is to provide a semiconductor device that can achieve high-speed operation. Another object of the present invention is to provide a semiconductor device having a resistance to stress. An object of the present invention is to provide a semiconductor device having high strength. One of the objectives of the present invention is to provide a novel semiconductor device. However, one embodiment of the present invention does not necessarily solve all of these problems. It is not necessary to solve all of these problems. Problems other than these can be solved by the description in the specification, drawings, claims, etc. These and other matters become self-evident from the description, drawings, claims, etc. It is possible to extract external issues. [Means for solving the problem]

[0008] A semiconductor device according to one aspect of the present invention includes a channel formation region and a semiconductor device having a channel formation region and a semiconductor layer. a semiconductor film having a pair of impurity regions sandwiched between the semiconductor film and the channel forming region; an insulating film covering the sides and top of the semiconductor film, and a channel-shaped insulating film sandwiched between the insulating film and the semiconductor film; a gate electrode overlapping the sides and top of the semiconductor film in the impurity region; a source electrode and a drain electrode respectively contacting the sides and top of the semiconductor film in the region; and,

[0009] A semiconductor device according to one aspect of the present invention includes a first gate electrode and a first insulating film on the first gate electrode. An insulating film, a channel forming region, and a pair of impurities positioned with the channel forming region interposed therebetween a first insulating film sandwiched between the channel forming region and the first insulating film; a semiconductor film overlapping the gate electrode, a side portion of the semiconductor film in the channel forming region, and a second insulating film covering the upper portion and a second insulating film in the channel forming region, the second insulating film being sandwiched therebetween; a second gate electrode overlapping the side and top of the semiconductor film; a source electrode and a drain electrode respectively in contact with the side and top of the semiconductor film; do.

[0010] A semiconductor device according to one aspect of the present invention includes a first gate electrode and a first insulating film on the first gate electrode. An insulating film, a channel forming region, and a pair of impurities positioned with the channel forming region interposed therebetween a first insulating film sandwiched between the channel forming region and the first insulating film; a semiconductor film overlapping the gate electrode, a side portion of the semiconductor film in the channel forming region, and a second insulating film covering the upper portion and a second insulating film in the channel forming region, the second insulating film being sandwiched therebetween; The first insulating film and the second insulating film overlap with the side and top of the semiconductor film. a second gate electrode electrically connected to the first gate electrode through an opening formed in the second gate electrode; The pair of impurity regions are in contact with the side and top of the semiconductor film, respectively. a source electrode and a drain electrode. [Effects of the Invention]

[0011] According to one embodiment of the present invention, a semiconductor device that can operate at high speed can be provided. According to one embodiment, a semiconductor device having high strength against stress can be provided. Alternatively, a novel semiconductor device, display device, light-emitting device, or the like can be provided. The description of these effects does not preclude the existence of other effects. The embodiment does not necessarily have to have all of these effects. , the specification, drawings, claims, etc., and It is possible to extract other effects from the claims and other descriptions. [Brief explanation of the drawings]

[0012] [Figure 1] 1A and 1B illustrate a structure of a transistor. [Figure 2] 1A and 1B illustrate a structure of a transistor. [Figure 3] 1A and 1B illustrate a structure of a transistor. [Figure 4] 1A and 1B illustrate a structure of a transistor. [Figure 5] 1A and 1B illustrate a structure of a transistor. [Figure 6] 1A and 1B illustrate a structure of a transistor. [Figure 7] 1A and 1B illustrate a structure of a transistor. [Figure 8] 1A and 1B illustrate a structure of a transistor. [Figure 9] 1A and 1B illustrate a structure of a transistor. [Figure 10] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 11] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 12] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 13] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 14] FIG. 1 is a diagram showing a configuration of a semiconductor display device. [Figure 15] Top view of a pixel. [Figure 16] FIG. [Figure 17] FIG. 1 is a diagram showing the configuration of a sequential circuit. [Figure 18] FIG. 2 is a diagram showing the configuration of a signal line driver circuit. [Figure 19] FIG. 2 is a diagram showing the configuration of a scanning line driver circuit. [Figure 20] FIG. [Figure 21] Electronic equipment illustration. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and the embodiments and aspects thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0014] Note that one embodiment of the present invention is directed to a semiconductor device using a transistor, such as an integrated circuit, an RF tag, or a semiconductor display device. The category includes all semiconductor devices that have been used in the past. , image processing circuit, DSP (Digital Signal Processor), LSI (Large Scale Integrated Circuit) including a microcontroller rcuit), FPGA (Field Programmable Gate Arra programmable logic circuits (PLDs) such as CPLDs (Complex PLDs) Programmable Logic Devices (PLCs) are included in this category. Semiconductor display devices include liquid crystal display devices and light-emitting devices such as organic light-emitting diodes (OLEDs). Light-emitting devices for each pixel, electronic paper, DMD (Digital Micromirror or Device), PDP (Plasma Display Panel), FED (Field Emission Display), etc., transistors are used in the drive circuit. This category includes semiconductor display devices that use the same technology.

[0015] In this specification, the term "semiconductor display device" refers to a device in which display elements such as liquid crystal elements and light emitting elements are used for displaying each pixel. A panel formed as a base and a module in which ICs including a controller are mounted on the panel. Furthermore, a semiconductor display device according to one aspect of the present invention includes the above-mentioned In the process of manufacturing a semiconductor display device, an element corresponding to one form before the display element is completed The device substrate includes a substrate that includes transistors and pixel electrodes used in the display device. Each of the plurality of pixels includes an electrode such as a pole or a common electrode and a capacitance element.

[0016] Furthermore, the semiconductor display device according to one embodiment of the present invention may include a display screen that is pointed at by a finger, a stylus, or the like. A touchscreen is a position input device that can detect a position and generate a signal containing that position information. A chip panel may be included in the components.

[0017] In this specification, connection means electrical connection, and a current, a voltage, or a potential When the circuit is configured to be able to supply or transmit Therefore, a configuration in which one circuit is connected to another is equivalent to a configuration in which they are directly connected. It does not necessarily refer to a structure capable of supplying or transmitting current, voltage, or potential. As shown in the figure, they are indirectly connected through elements such as wiring, resistors, diodes, and transistors. Also, a configuration in which certain elements are connected to other elements does not mean that the elements are directly connected to each other. It does not necessarily refer to a structure in which a current, voltage, or potential can be supplied, Or, it can be transmitted through elements such as wiring, resistors, diodes, and transistors. This also includes configurations that are indirectly connected via other circuits. Even when elements are connected to each other, in reality, for example, part of the wiring functions as an electrode. In some cases, a single conductive film may have the functions of multiple components. In the specification, connection means that one conductive film has the functions of multiple components. If so, include it in that category.

[0018] The source of a transistor is a source region that is a part of the semiconductor film that functions as an active layer. The source electrode of a transistor is a region or a semiconductor film connected to the source electrode. The drain is a drain region that is a part of the semiconductor film, or a region connected to the semiconductor film. The term "gate" refers to a gate electrode.

[0019] The source and drain of a transistor are determined by the channel type of the transistor and the characteristics given to each terminal. The name changes depending on the level of the potential applied. Generally, n-channel transistors are In a transistor, the terminal to which a low potential is applied is called the source, and the terminal to which a high potential is applied is called the drain. Also, in a p-channel transistor, the terminal to which a low potential is applied is called The terminal to which a high potential is applied is called the drain, and the terminal to which a high potential is applied is called the source. Assuming that the source and drain are fixed, explain the connection relationship of the transistor. However, in reality, the names of source and drain are changed according to the above potential relationship. Replace.

[0020] <Transistor configuration example 1> FIG. 1 shows an example of the structure of a transistor 10 included in a semiconductor device according to one embodiment of the present invention. FIG. 1A is a plan view of a transistor 10. In order to clarify the layout of the transistor 10, various insulating films are omitted. FIG. 1B shows a circuit diagram symbol of the transistor 10 shown in FIG. 1A. 1(C) shows a cross-sectional view taken along dashed line A1-A2 of the plan view shown in FIG. 1(C), and a cross-sectional view taken along dashed line B1-B The cross section at 2 is shown in FIG.

[0021] The transistor 10 shown in FIGS. 1A, 1C, and 1D has an insulating surface. A semiconductor film 12 is provided on a substrate 11. The semiconductor film 12 includes a channel forming region 12a and a channel The impurity region 12b and the impurity region 12c are positioned with the channel forming region 12a sandwiched therebetween. The transistor 10 also functions as a gate insulating film. The insulating film 13 covers the sides and top of the semiconductor film 12 in the panel formation region 12a. In addition, the transistor 10 functions as a gate electrode (FG) shown in the circuit diagram symbol of FIG. 1(B). The insulating film 13 is sandwiched between the semiconductor film in the channel forming region 12a. The transistor 10 has a conductive film 17 overlapping the side and top of the transistor 12. ) circuit diagram symbol, and functions as a source electrode (S) or drain electrode (D), Furthermore, the side and upper portions of the semiconductor film 12 in the impurity regions 12b and 12c The conductive film 14 and the conductive film 15 are connected to the respective electrodes.

[0022] At least a part (or the whole) of the conductive film 14 (and / or the conductive film 15) is a semiconductor. The membrane 12 is provided on at least a part (or all) of the surface, side, upper surface, and / or lower surface. It is being done.

[0023] Alternatively, at least a part (or the whole) of the conductive film 14 (and / or the conductive film 15) is semi-transparent. At least a part (or all) of the surface, side, upper surface, and / or lower surface of the conductive film 12; Or, at least a part (or a part) of the conductive film 14 (and / or the conductive film 15) is in contact with the conductive film 14. The first and second electrodes (or all of them) are in contact with at least a part (or all of) the semiconductor film 12.

[0024] Alternatively, at least a part (or the whole) of the conductive film 14 (and / or the conductive film 15) is semi-transparent. At least a part (or all) of the surface, side, upper surface, and / or lower surface of the conductive film 12; Or, at least the conductive film 14 (and / or the conductive film 15) is electrically connected. A part (or all) of the insulating film 12 is electrically connected to a part (or all) of the semiconductor film 12.

[0025] Alternatively, at least a part (or the whole) of the conductive film 14 (and / or the conductive film 15) is semi-transparent. At least a part (or all) of the surface, side, upper surface, and / or lower surface of the conductive film 12 is Alternatively, at least one of the conductive film 14 (and / or the conductive film 15) is disposed adjacent to the conductive film 14. A part (or all) of the semiconductor film 12 is disposed adjacent to a part (or all) of the semiconductor film 12 .

[0026] Alternatively, at least a part (or the whole) of the conductive film 14 (and / or the conductive film 15) is semi-transparent. The lateral surface of at least a part (or the whole) of the surface, side surface, upper surface, and / or lower surface of the conductive film 12 Alternatively, at least one of the conductive films 14 (and / or 15) is disposed on the side of the conductive film 14. A portion (or all) of the semiconductor film 12 is disposed on the side of a portion (or all) of the semiconductor film 12.

[0027] Alternatively, at least a part (or the whole) of the conductive film 14 (and / or the conductive film 15) is semi-transparent. The conductor film 12 has a surface, a side surface, an upper surface, and / or a lower surface, and at least a part (or all) of the surface, a side surface, an upper surface, and / or a lower surface is obliquely Alternatively, at least the conductive film 14 (and / or the conductive film 15) is disposed on the upper side. A part (or all) of the insulating film 14 is disposed obliquely above a part (or all) of the semiconductor film 12.

[0028] Alternatively, at least a part (or the whole) of the conductive film 14 (and / or the conductive film 15) is semi-transparent. On at least a part (or all) of the surface, side, upper surface, and / or lower surface of the conductive film 12 Alternatively, at least one of the conductive films 14 (and / or 15) is disposed on the side of the conductive film 14. A portion (or the whole) of the semiconductor film 12 is disposed above a portion (or the whole) of the semiconductor film 12.

[0029] 1A, 1C, and 1D, the semiconductor film 12, the insulating film 13, the conductive film 14, and the insulating film 15 are shown. An insulating film 16 is provided on the film 17, and a conductive film 14 and a conductive film 15 are provided on the insulating film 16. In addition, in Figures 1(A), 1(C), and 1(D), In the openings 18 and 19 formed in the insulating film 16, the conductive film 14 and the conductive film 15 is connected to the impurity region 12b and the impurity region 12c.

[0030] As shown in FIG. 1, in a transistor 10 according to one embodiment of the present invention, a channel formation region 1 The side and top portions of the semiconductor film 12 in 2a overlap with the conductive film 17, forming a channel-shaped Carriers flow over a wide range including the sides and top of the semiconductor region 12a. The area occupied by the channel forming region 12a of the substrate is kept small, while The amount of carrier movement in the transistor 10 increases, resulting in an increase in the on-current of the transistor 10. In particular, the field effect mobility in the channel formation region 12a is increased. The length of the semiconductor film 12 in the channel width direction (channel width) is W, and the length of the semiconductor film 12 in the channel forming region 12a is When the thickness of the semiconductor film 12 in the channel width W is T, the a When the aspect ratio is high, the area over which carriers can flow is wider, so the The on-current can be increased and the field effect mobility can be increased. In this document, the aspect ratio is the ratio of the length of the short side of the bottom surface of the semiconductor film (channel width W) to It represents the ratio (T / W) of the thickness (T) of the semiconductor film.

[0031] Unlike the case of a transistor using a bulk semiconductor substrate, the thin semiconductor film 12 In the case of the transistor 10 using the above, the aspect ratio is determined by the degree of crystallinity in the semiconductor film 12. It is desirable that the height is such that the semiconductor film 12 contains silicon. When the semiconductor film 12 contains silicon and germanium, In order to ensure high crystallinity, the thickness T is set to 5 nm or more and 150 nm or less. It is desirable that the thickness is less than 20 nm, and more desirable that the thickness is between 20 nm and 100 nm. Assuming that the film thickness T is within the above range, the resolution of the exposure device when using a glass substrate is Considering that the degree of the crystal grain is about several μm, the specific aspect ratio is between 0.05 and 10. It is desirable that the ratio be 0.1 or more and 5 or less, and more desirable that the ratio be 0.1 or more and 5 or less. It is more desirable that the ratio be 1 or more and 5 or less.

[0032] The channel length direction is the direction in which the carrier flows between the impurity region 12b and the impurity region 12c. The channel width direction is perpendicular to the channel length direction. means the direction of.

[0033] As shown in FIG. 1, in a transistor 10 according to an embodiment of the present invention, an impurity region 1 The conductive film 14 and the conductive film 15 are formed on the sides and the top of the semiconductor film 12 in the impurity regions 12b and 12c. Therefore, the conductive film 14 and the conductive film 15 are connected to the semiconductor film 12. The conductive film 14 and the conductive film 15 are connected to the impurity region 12 in comparison with the case where the conductive film 14 and the conductive film 15 are connected to the impurity region 12 only. This allows the area where the impurity region 12b and the impurity region 12c are in contact with each other to be increased. Therefore, the contact between the conductive film 14 and the conductive film 15 and the impurity region 12b and the impurity region 12c is The resistance can be kept small, and as a result, the on-current of the transistor 10 can be increased.

[0034] <Transistor configuration example 2> Next, FIG. 2 shows a transistor 10 included in a semiconductor device according to one embodiment of the present invention, which is shown in FIG. FIG. 2A shows a plan view of a transistor 10. In FIG. 2A, various insulating films are omitted to clarify the layout of the transistor 10. 2(B) shows the circuit diagram symbol of the transistor 10 shown in FIG. Also, a cross-sectional view taken along the dashed line A1-A2 in the plan view shown in FIG. 2(A) is shown in FIG. 2(C). A cross-sectional view taken along the dashed line B1-B2 is shown in FIG. 2(D).

[0035] The transistor 10 shown in FIGS. 2A, 2C, and 2D has an insulating surface. On the substrate 11, there is provided a gate electrode (BG) shown in the circuit diagram symbol of FIG. The transistor 10 has a conductive film 20. The transistor 10 also has a function as a gate insulating film. The transistor 10 also has an insulating film 21 that covers the conductive film 20. The semiconductor film 12 overlaps the conductive film 20 with the channel formed therebetween. The region 12a, the impurity region 12b and the impurity region 12b are positioned on either side of the channel forming region 12a. The transistor 10 also has a function as a gate insulating film. , and an insulating film covering the sides and top of the semiconductor film 12 in the channel forming region 12a. 13. The transistor 10 also has a gate electrode ( FG), and has a channel forming region 12a with an insulating film 13 sandwiched therebetween. The conductive film 17 overlaps the side and top of the semiconductor film 12. The film 13 and the insulating film 21 have openings 22 and 23, respectively, through which the conductive film 20 is connected. The transistor 10 has a source electrode (S) shown in the circuit diagram symbol of FIG. or has a function as a drain electrode (D), and the impurity region 12b and the impurity The conductive film 14 and the conductive film 15 are connected to the side and the top of the semiconductor film 12 in the region 12c, respectively. and a conductive film 15.

[0036] 2(A), 2(C), and 2(D), the semiconductor film 12, the insulating film 13, the conductive film 14, and the insulating film 15 are shown. An insulating film 16 is provided on the film 17, and a conductive film 14 and a conductive film 15 are provided on the insulating film 16. In addition, in Fig. 2(A), Fig. 2(C), and Fig. 2(D), In the openings 18 and 19 formed in the insulating film 16, the conductive film 14 and the conductive film 15 is connected to the impurity region 12b and the impurity region 12c.

[0037] In addition, in FIGS. 2(A), 2(C), and 2(D), the opening 22 and the opening 23 are semi-circular. The example shows a case where the electrodes are provided at positions facing each other with the conductive film 12 sandwiched therebetween.

[0038] As shown in FIG. 2, in a transistor 10 according to one embodiment of the present invention, a channel formation region 1 The side and top portions of the semiconductor film 12 in 2a overlap with the conductive film 17, forming a channel-shaped Carriers flow over a wide range including the sides and top of the semiconductor region 12a. The area occupied by the channel forming region 12a of the substrate is kept small, while The amount of carrier movement in the transistor 10 increases, resulting in an increase in the on-current of the transistor 10. In particular, the field effect mobility in the channel formation region 12a is increased. The length of the semiconductor film 12 in the channel width direction (channel width) is W, and the length of the semiconductor film 12 in the channel forming region 12a is When the thickness of the semiconductor film 12 in the channel width W is T, the a When the aspect ratio is high, the area over which carriers can flow is wider, so the The on-current can be increased and the field effect mobility can be increased.

[0039] As described above, in the case of the transistor 10 using the thin semiconductor film 12, the asperity The axial ratio is set to a level that ensures high crystallinity in the semiconductor film 12. When the semiconductor film 12 contains silicon, or when the semiconductor film 12 is silicon, When germanium is contained, in order to ensure high crystallinity of the semiconductor film 12, Specifically, the thickness T is preferably 5 nm or more and 150 nm or less, and more preferably 20 nm or more and 150 nm or less. It is more desirable that the film thickness T is 00 nm or less. However, considering that the resolution of the exposure device when using a glass substrate is only a few μm, The specific aspect ratio is preferably 0.05 or more and 10 or less, and more preferably 0.1 or more and 5 or less. It is more desirable that the aspect ratio is 1 or more and 5 or less. It's nice.

[0040] As shown in FIG. 2, in the transistor 10 according to one embodiment of the present invention, the impurity region 1 The conductive film 14 and the conductive film 15 are formed on the sides and the top of the semiconductor film 12 in the impurity regions 12b and 12c. Therefore, the conductive film 14 and the conductive film 15 are connected to the semiconductor film 12. The conductive film 14 and the conductive film 15 are connected to the impurity region 12 in comparison with the case where the conductive film 14 and the conductive film 15 are connected to the impurity region 12 only. This allows the area where the impurity region 12b and the impurity region 12c are in contact with each other to be increased. Therefore, the contact between the conductive film 14 and the conductive film 15 and the impurity region 12b and the impurity region 12c is The resistance can be kept small, and as a result, the on-current of the transistor 10 can be increased.

[0041] In the transistor 10 shown in FIG. 2, the conductive film 17 functions as a gate electrode (FG). A gate electrode is disposed on the side of the semiconductor film 12 in the vicinity of the surface (back channel region) of the semiconductor film 12, which is far from the gate electrode. A conductive film 20 that functions as a background layer (BG) is provided. 7. With the above configuration, the transistor 10 shown in FIG. This prevents the generation of fixed charges in the gate region and reduces the off-state current. In the transistor 10 shown in FIG. 1, the conductive film 20 is connected to the conductive film 17. Compared to the transistor 10, the region in which carriers move spans a wider range, so The current can be made larger.

[0042] In the transistor 10 shown in FIG. 2, the insulating layer 12a is formed so as to overlap with at least the channel forming region 12a. As shown, the conductive film 20 is provided under the semiconductor film 12 and overlaps the channel forming region 12a. The conductive film 17 is provided on the semiconductor film 12 so that the semiconductor film 12 The upper and lower sides of the transistor 10 are supported by the conductive films 17 and 20. 1, it can be said that the transistor 10 has a higher strength against stress.

[0043] <Transistor configuration example 3> In the transistor 10 shown in FIGS. 1 and 2, The functional conductive film 14 and the conductive film 15 are provided on the insulating film 16. In the opening, the conductive film 14 and the conductive film 15 are formed in the impurity region 12b and the impurity region 12c. The figure illustrates an example in which the transistor 1 according to one embodiment of the present invention is connected to the In the example shown in FIG. 1, an insulating film 16 may be provided on the conductive film 14 and the conductive film 15.

[0044] The transistor 10 shown in FIG. 3 includes an insulating film 16 provided over the conductive film 14 and the conductive film 15. The transistor 10 shown in FIG. 3A has a different structure from the transistor 10 shown in FIG. 3A shows a plan view of the transistor 10. Note that FIG. 3A does not clearly show the layout of the transistor 10. In order to simplify the drawing, various insulating films are omitted. The circuit diagram symbol of the transistor 10 is shown in FIG. A cross-sectional view at B1-B2 is shown in FIG. 3(C), and a cross-sectional view at B1-B2 is shown in FIG. 3(D). .

[0045] The transistor 10 shown in FIGS. 3A, 3C, and 3D is the same as the circuit of FIG. It functions as a source electrode (S) or drain electrode (D) as shown in the symbol, and , and the impurity regions 12b and 12c are formed on the sides and top of the semiconductor film 12, respectively. 3(A) and 3(C), 3(D), the semiconductor film 12, the insulating film 13, the conductive film 17, the conductive film 14, and the conductive film 1 An insulating film 16 is provided on the substrate 5 .

[0046] The transistor 10 shown in FIG. 4 includes an insulating film 16 provided over the conductive film 14 and the conductive film 15. 4A shows a structure of the transistor 10 shown in FIG. 4A shows a plan view of the transistor 10. Note that FIG. 4A does not clearly show the layout of the transistor 10. In order to simplify the drawing, various insulating films are omitted. The circuit diagram symbol of the transistor 10 is shown. Also, the dashed line A1-A2 in the plan view shown in FIG. A cross-sectional view at B1-B2 is shown in FIG. 4(C), and a cross-sectional view at B1-B2 is shown in FIG. 4(D). .

[0047] The transistor 10 shown in FIGS. 4A, 4C, and 4D is the same as the circuit of FIG. It functions as a source electrode (S) or drain electrode (D) as shown in the symbol, and , and the impurity regions 12b and 12c are formed on the sides and top of the semiconductor film 12, respectively. 4(A) and 4(C), 4(D), the semiconductor film 12, the insulating film 13, the conductive film 17, the conductive film 14, and the conductive film 1 An insulating film 16 is provided on the substrate 5 .

[0048] The transistor 10 shown in FIGS. 3 and 4 is similar to the transistor 10 shown in FIGS. 1 and 2. The side and upper portions of the semiconductor film 12 in the channel forming region 12a overlap with the conductive film 17. This allows carriers to flow over a wide range including the sides and top of the channel formation region 12a. Therefore, the area occupied by the channel forming region 12a of the semiconductor film 12 on the substrate is reduced. The amount of carrier movement in the transistor 10 is increased while the amount of The on-current of the transistor 10 increases and the field effect mobility is enhanced. The length of the semiconductor film 12 in the channel width direction (channel width) in the formation region 12a is W, When the thickness of the semiconductor film 12 in the channel forming region 12a is T, the thickness of the semiconductor film 12 relative to the channel width W is When the aspect ratio, which corresponds to the ratio of thickness T, is high, the range in which carriers can flow becomes wider. Therefore, the on-state current of the transistor 10 can be increased, and the field effect mobility can be increased. can be done.

[0049] As described above, in the case of the transistor 10 using the thin semiconductor film 12, the asperity The axial ratio is set to a level that ensures high crystallinity in the semiconductor film 12. When the semiconductor film 12 contains silicon, or when the semiconductor film 12 is silicon, When germanium is contained, in order to ensure high crystallinity of the semiconductor film 12, Specifically, the thickness T is preferably 5 nm or more and 150 nm or less, and more preferably 20 nm or more and 150 nm or less. It is more desirable that the film thickness T is 00 nm or less. However, considering that the resolution of the exposure device when using a glass substrate is only a few μm, The specific aspect ratio is preferably 0.05 or more and 10 or less, and more preferably 0.1 or more and 5 or less. It is more desirable that the aspect ratio is 1 or more and 5 or less. It's nice.

[0050] 3 and 4 may be the same as the transistor 10 shown in FIGS. 1 and 2. Similarly, the sides and top of the semiconductor film 12 in the impurity regions 12b and 12c are , the conductive film 14 and the conductive film 15 are connected to each other. Compared with the case where the film 15 is connected only to the top of the semiconductor film 12, the conductive film 14 and the conductive film The contact areas of the impurity region 12b and the impurity region 12c are increased. Therefore, the conductive film 14, the conductive film 15, the impurity region 12b, and the impurity The contact resistance between the regions 12c is reduced, thereby increasing the on-current of the transistor 10. It is possible.

[0051] The transistor 10 shown in FIG. 4 also has a gate electrode (BG) and a Furthermore, the conductive film 20 is connected to the conductive film 17. With the above configuration, the transistor 10 shown in FIG. This prevents the generation of a constant charge and reduces the off-state current. In the transistor 10, the conductive film 20 is connected to the conductive film 17, so that the transistor 10 shown in FIG. Compared to ST10, the area in which carriers move spans a wider range, so the on-current is It can be made bigger.

[0052] In the transistor 10 shown in FIG. 4, the insulating layer 12a is formed so as to overlap with at least the channel forming region 12a. As shown, the conductive film 20 is provided under the semiconductor film 12 and overlaps the channel forming region 12a. The conductive film 17 is provided on the semiconductor film 12 so that the semiconductor film 12 The upper and lower sides of the transistor 10 are supported by the conductive films 17 and 20. 1, it can be said that the transistor 10 has a higher strength against stress.

[0053] <Transistor configuration example 4> In the transistor 10 shown in FIGS. 2 and 4, the conductive film 17 is connected to the conductive film 20. The transistor 10 according to one embodiment of the present invention has a conductive film 17 and a conductive The conductive film 20 may be electrically separated.

[0054] The transistor 10 shown in FIG. 5 is characterized in that the conductive film 17 and the conductive film 20 are electrically separated. 5A, the transistor 10 has a different structure from the transistor 10 shown in FIG. 5A is a plan view of the transistor 10 in order to clarify the layout of the transistor 10. In addition, in FIG. 5(B), various insulating films are omitted. 10. Also, in the plan view shown in FIG. 5(A), A cross-sectional view is shown in FIG. 5(C), and a cross-sectional view taken along dashed line B1-B2 is shown in FIG. 5(D).

[0055] The transistor 10 shown in FIGS. 5A, 5C, and 5D is the same as the circuit of FIG. It has a conductive film 20 that functions as a gate electrode (BG) shown in the diagram. The transistor 10 functions as a gate electrode (FG) shown in the circuit diagram symbol of FIG. 5(B). In addition, the insulating film 13 is sandwiched between the semiconductor film 12 in the channel forming region 12a. The conductive film 17 overlaps the side and top portions. As shown in (D), the conductive film 17 and the conductive film 20 are electrically separated.

[0056] The transistor 10 shown in FIG. 5 is similar to the transistors 10 shown in FIGS. 2 and 4. The side and top portions of the semiconductor film 12 in the hole formation region 12a overlap with the conductive film 17. Carriers flow over a wide range including the sides and top of the channel formation region 12a. Therefore, the area occupied by the channel forming region 12a of the semiconductor film 12 on the substrate is kept small. While the transistor 10 is being driven, the amount of carrier movement in the transistor 10 increases. The on-current of 0 increases and the field effect mobility is enhanced. The length (channel width) of the semiconductor film 12 in the channel width direction of 12a is W, and the channel forming If the thickness of the semiconductor film 12 in the region 12a is T, the ratio of the thickness T to the channel width W is When the aspect ratio, which corresponds to the area where the carriers flow, is high, the area where the carriers flow is wider. The on-current of the transistor 10 can be increased, and the field effect mobility can be increased.

[0057] As described above, in the case of the transistor 10 using the thin semiconductor film 12, the asperity The axial ratio is set to a level that ensures high crystallinity in the semiconductor film 12. When the semiconductor film 12 contains silicon, or when the semiconductor film 12 is silicon, When germanium is contained, in order to ensure high crystallinity of the semiconductor film 12, Specifically, the thickness T is preferably 5 nm or more and 150 nm or less, and more preferably 20 nm or more and 150 nm or less. It is more desirable that the film thickness T is 00 nm or less. However, considering that the resolution of the exposure device when using a glass substrate is only a few μm, The specific aspect ratio is preferably 0.05 or more and 10 or less, and more preferably 0.1 or more and 5 or less. It is more desirable that the aspect ratio is 1 or more and 5 or less. It's nice.

[0058] 2 and 4, the transistor 10 shown in FIG. 5 also has the following characteristics: A conductive film is formed on the side and upper portions of the semiconductor film 12 in the impurity regions 12b and 12c. The conductive film 14 and the conductive film 15 are connected to each other. Compared with the case where the semiconductor film 12 is connected only to the upper portion thereof, the conductive film 14 and the conductive film 15 are insufficient. The area where the pure region 12b and the impurity region 12c contact each other is increased. Therefore, the conductive film 14 and the conductive film 15 and the impurity region 12b and the impurity region 12 c, thereby increasing the on-state current of the transistor 10. can.

[0059] The transistor 10 shown in FIG. 5 has a gate electrode (BG) and a Therefore, in the transistor 10 shown in FIG. By applying a predetermined potential to the conductive film 20, fixed charges are prevented from being generated in the back channel region. In addition, in the transistor 10 shown in FIG. The threshold voltage of the transistor 10 is controlled to a desired value by the potential supplied to the conductive film 17. It is possible.

[0060] In the transistor 10 shown in FIG. 5, the As shown, the conductive film 20 is provided under the semiconductor film 12 and overlaps the channel forming region 12a. The conductive film 17 is provided on the semiconductor film 12 so that the semiconductor film 12 The upper and lower sides of the transistor 10 are supported by the conductive films 17 and 20. 1, it can be said that the transistor 10 has a higher strength against stress.

[0061] 5, similarly to the transistor 10 shown in FIG. 2, the source electrode or the drain electrode The conductive film 14 and the conductive film 15 functioning as the insulating film 16 are provided on the insulating film 16. In the openings, the conductive film 14 and the conductive film 15 are formed in the impurity region 12b and the impurity region 12c. 12c are connected to the transistor 10. In one embodiment, the transistor 10 shown in FIG. 5 may be the same as the transistor 10 shown in FIG. Similarly, an insulating film 16 may be provided on the conductive film 14 and the conductive film 15 .

[0062] <Transistor configuration example 5> Next, a conductive film electrically connected to the conductive film 20 was provided in the same layer as the conductive film 17. An example of the structure of the transistor 10 is shown in FIG. 6. 6A is a plan view showing the layout of the transistor 10. In addition, in FIG. 6(B), various insulating films are omitted. 6(A) is a cross-sectional view taken along the dashed line A1-A2. A plan view is shown in FIG. 6(C), and a cross-sectional view taken along dashed line B1-B2 is shown in FIG. 6(D).

[0063] The transistor 10 shown in FIGS. 6A, 6C, and 6D has an insulating surface. On the substrate 11, there is provided a gate electrode (BG) shown in the circuit diagram symbol of FIG. The transistor 10 has a function as a gate insulating film. Furthermore, the transistor 10 has an insulating film 21 that covers the conductive film 20. The semiconductor film 12 overlaps with the conductive film 20 with the semiconductor film 12 sandwiched therebetween. The channel forming region 12a is sandwiched between the impurity region 12b and the impurity region 12b. The transistor 10 has a pure region 12c. In addition, the insulating layer covering the sides and top of the semiconductor film 12 in the channel forming region 12a The transistor 10 has a gate electrode 13 shown in the circuit diagram symbol of FIG. (FG) and has a channel forming region 12 with an insulating film 13 sandwiched therebetween. The conductive film 17 overlaps the side and top of the semiconductor film 12 in a. The capacitor 10 is connected to the source electrode (S) or drain electrode (D) shown in the circuit diagram symbol of FIG. The semiconductor film in the impurity region 12b and the impurity region 12c has a function as a gate electrode. The conductive film 14 and the conductive film 15 are connected to the side and top of the substrate 12, respectively, and the conductive film 17 is connected to the conductive film 17. and a conductive film 24 connected thereto.

[0064] 6(A), 6(C), and 6(D), the semiconductor film 12, the insulating film 13, the conductive film 14, and the insulating film 15 are formed. An insulating film 16 is provided on the film 17, and a conductive film 14, a conductive film 15, and a conductive film 16 are provided on the insulating film 16. The example shows a case where a conductive film 24 is provided. An opening provided in the insulating film 16 In the portion 18 and the opening 19, the conductive film 14 and the conductive film 15 are formed in the impurity region 12b and the impurity region 12c. The conductive film 24 is connected to the material region 12c through an opening 25 formed in the insulating film 16. 1 shows an example in which the electrode is connected to a conductive film 17.

[0065] In addition, in FIGS. 6(A), 6(C), and 6(D), the opening 28 and the opening 29 are semi-circular. The example shows a case where the electrodes are provided at positions facing each other with the conductive film 12 sandwiched therebetween.

[0066] 6(A), 6(C), and 6(D), the conductive film 17 is provided in the same layer as the conductive film 17. The conductive film 26 and the conductive film 27 are provided on the insulating film 13. The conductive film 26 and the conductive film 27 are The insulating film 13 and the insulating film 21 have openings 28 and 29, respectively, which are connected to the conductive film 20. It continues.

[0067] As shown in FIG. 6, in a transistor 10 according to one embodiment of the present invention, a channel formation region 1 The side and top portions of the semiconductor film 12 in 2a overlap with the conductive film 17, forming a channel-shaped Carriers flow over a wide range including the sides and top of the semiconductor region 12a. The area occupied by the channel forming region 12a of the substrate is kept small, while The amount of carrier movement in the transistor 10 increases, resulting in an increase in the on-current of the transistor 10. In particular, the field effect mobility in the channel formation region 12a is increased. The length of the semiconductor film 12 in the channel width direction (channel width) is W, and the length of the semiconductor film 12 in the channel forming region 12a is When the thickness of the semiconductor film 12 in the channel width W is T, the a When the aspect ratio is high, the area over which carriers can flow is wider, so the The on-current can be increased and the field effect mobility can be increased.

[0068] As described above, in the case of the transistor 10 using the thin semiconductor film 12, the asperity The axial ratio is set to a level that ensures high crystallinity in the semiconductor film 12. When the semiconductor film 12 contains silicon, or when the semiconductor film 12 is silicon, When germanium is contained, in order to ensure high crystallinity of the semiconductor film 12, Specifically, the thickness T is preferably 5 nm or more and 150 nm or less, and more preferably 20 nm or more and 150 nm or less. It is more desirable that the film thickness T is 00 nm or less. However, considering that the resolution of the exposure device when using a glass substrate is only a few μm, The specific aspect ratio is preferably 0.05 or more and 10 or less, and more preferably 0.1 or more and 5 or less. It is more desirable that the aspect ratio is 1 or more and 5 or less. It's nice.

[0069] As shown in FIG. 6, in the transistor 10 according to one embodiment of the present invention, the impurity region 1 The conductive film 14 and the conductive film 15 are formed on the sides and the top of the semiconductor film 12 in the impurity regions 12b and 12c. Therefore, the conductive film 14 and the conductive film 15 are connected to the semiconductor film 12. The conductive film 14 and the conductive film 15 are connected to the impurity region 12 in comparison with the case where the conductive film 14 and the conductive film 15 are connected to the impurity region 12 only. This allows the area where the impurity region 12b and the impurity region 12c are in contact with each other to be increased. Therefore, the contact between the conductive film 14 and the conductive film 15 and the impurity region 12b and the impurity region 12c is The resistance can be kept small, and as a result, the on-current of the transistor 10 can be increased.

[0070] In addition, in the transistor 10 shown in FIG. 6, a gate electrode (BG) is provided on the back channel region side. Therefore, in the transistor 10 shown in FIG. A predetermined voltage is applied to the conductive film 20 via the conductive film 26 or the conductive film 27 connected to the conductive film 20. By supplying a potential, fixed charges are prevented from being generated in the back channel region, and the off-current is reduced. In addition, in the transistor 10 shown in FIG. By adjusting the voltage, the threshold voltage of the transistor 10 can be controlled to a desired value.

[0071] In the transistor 10 shown in FIG. 6, the insulating layer 12a is formed so as to overlap with at least the channel forming region 12a. As shown, the conductive film 20 is provided under the semiconductor film 12 and overlaps the channel forming region 12a. The conductive film 17 is provided on the semiconductor film 12 so that the semiconductor film 12 The upper and lower sides of the transistor 10 are supported by the conductive films 17 and 20. 1, it can be said that the transistor 10 has a higher strength against stress.

[0072] <Transistor configuration example 6> In the transistor 10 shown in FIG. 2, the semiconductor film 12 is sandwiched between the electrodes. The conductive film 17 is connected to the conductive film 20 in the openings 22 and 23. The transistor 10 according to one embodiment of the present invention has a semiconductor film 12. The conductive film 17 may be connected to the conductive film 20 in an opening on the side.

[0073] The transistor 10 shown in FIG. 7 has an opening 22 on one side of the semiconductor film 12. The structure is the same as that of the transistor 10 shown in FIG. 2 in that the conductive film 17 is connected to the conductive film 20. FIG. 7A shows a plan view of the transistor 10. In order to clarify the layout of the transistor 10, various insulating films are omitted. FIG. 7B shows a circuit diagram symbol of the transistor 10 shown in FIG. 7A. FIG. 7(C) shows a cross-sectional view taken along dashed line A1-A2 in the plan view shown in FIG. A cross-sectional view of the above is shown in FIG.

[0074] Specifically, in the transistor 10 shown in FIGS. 7(A), 7(C), and 7(D), In the opening 22 formed in the film 13 and the insulating film 21, the gate shown in the circuit diagram symbol of FIG. The conductive film 17 having the function of a gate electrode (FG) is shown in the circuit diagram symbol of FIG. The conductive film 20 functions as a back electrode (BG).

[0075] 7, similarly to the transistor 10 shown in FIG. 2, the source electrode or the drain electrode The conductive film 14 and the conductive film 15 functioning as the insulating film 16 are provided on the insulating film 16. In the openings, the conductive film 14 and the conductive film 15 are formed in the impurity region 12b and the impurity region 12c. 12c are connected to the transistor 10. In one embodiment, the transistor 10 shown in FIG. 7 may be the same as the transistor 10 shown in FIG. Similarly, an insulating film 16 may be provided on the conductive film 14 and the conductive film 15 .

[0076] The transistor 10 shown in FIG. 7 has a channel structure similar to the transistor 10 shown in FIGS. The side and top portions of the semiconductor film 12 in the hole formation region 12a overlap with the conductive film 17. Carriers flow over a wide range including the sides and top of the channel formation region 12a. Therefore, the area occupied by the channel forming region 12a of the semiconductor film 12 on the substrate is kept small. While the transistor 10 is being driven, the amount of carrier movement in the transistor 10 increases. The on-current of 0 increases and the field effect mobility is enhanced. The length (channel width) of the semiconductor film 12 in the channel width direction of 12a is W, and the channel forming If the thickness of the semiconductor film 12 in the region 12a is T, the ratio of the thickness T to the channel width W is When the aspect ratio, which corresponds to the area where the carriers flow, is high, the area where the carriers flow is wider. The on-current of the transistor 10 can be increased, and the field effect mobility can be increased.

[0077] As described above, in the case of the transistor 10 using the thin semiconductor film 12, the asperity The axial ratio is set to a level that ensures high crystallinity in the semiconductor film 12. When the semiconductor film 12 contains silicon, or when the semiconductor film 12 is silicon, When germanium is contained, in order to ensure high crystallinity of the semiconductor film 12, Specifically, the thickness T is preferably 5 nm or more and 150 nm or less, and more preferably 20 nm or more and 150 nm or less. It is more desirable that the film thickness T is 00 nm or less. However, considering that the resolution of the exposure device when using a glass substrate is only a few μm, The specific aspect ratio is preferably 0.05 or more and 10 or less, and more preferably 0.1 or more and 5 or less. It is more desirable that the aspect ratio is 1 or more and 5 or less. It's nice.

[0078] 1 and 2, the transistor 10 shown in FIG. 7 also has the following characteristics: A conductive film is formed on the side and upper portions of the semiconductor film 12 in the impurity regions 12b and 12c. The conductive film 14 and the conductive film 15 are connected to each other. Compared with the case where the semiconductor film 12 is connected only to the upper portion thereof, the conductive film 14 and the conductive film 15 are insufficient. The area where the pure region 12b and the impurity region 12c contact each other is increased. Therefore, the conductive film 14 and the conductive film 15 and the impurity region 12b and the impurity region 12 c, thereby increasing the on-state current of the transistor 10. can.

[0079] 2. The transistor 10 shown in FIG. 7 is also a back-channel transistor, similar to the transistor 10 shown in FIG. A conductive film 20 that functions as a gate electrode (BG) is provided on the channel region side. In addition, the conductive film 20 is connected to the conductive film 17. With the above configuration, the transistor shown in FIG. In the case of the semiconductor device 10, the generation of fixed charges in the back channel region is prevented, and the off-current is reduced. In the transistor 10 shown in FIG. 7, the conductive film 20 is connected to the conductive film 17. 1. This allows the carriers to move more efficiently than in the transistor 10 shown in FIG. Since the ON current is larger than the ON current, the ON current can be increased.

[0080] In the transistor 10 shown in FIG. 7, the insulating layer 12a is formed so as to overlap with at least the channel forming region 12a. As shown, the conductive film 20 is provided under the semiconductor film 12 and overlaps the channel forming region 12a. The conductive film 17 is provided on the semiconductor film 12 so that the semiconductor film 12 The upper and lower sides of the transistor 10 are supported by the conductive films 17 and 20. 1, it can be said that the transistor 10 has a higher strength against stress.

[0081] Note that various semiconductor elements are provided between the transistor 10 and the substrate 11 shown in FIGS. In this case, the transistor 10 is provided on the insulating film that covers the semiconductor element. That's good.

[0082] In the transistor 10 shown in FIGS. 1 to 7, the conductive film 14 and the conductive film 15 are The state in which the pure region 12b and the impurity region 12c are connected to each other is the state in which the conductive film 14 and the conductive film 1 5 and the impurity region 12b and the impurity region 12c are in direct contact with each other. For example, a native oxide film with a thickness small enough to ensure electrical connection is used. The insulating films 14 and 15, the impurity region 12b and the impurity region 12c, and the like are formed on the conductive film 14 and the conductive film 15. The state in which the signal is provided between the signal and the connected signal is also included in the connected state.

[0083] In the transistor 10 shown in FIGS. 1 to 7, the semiconductor film 12 is formed in the channel formation region 1. In addition to the impurity regions 2a, 12b, and 12c, an impurity region that imparts one conductivity type to the semiconductor is The impurity region 12b and the impurity region 12c are formed by a light-emitting diode (LDD) having a lower concentration of impurities than the impurity region 12b and the impurity region 12c. The LDD region may have a channel forming region. Between the region 12a and the impurity region 12b, or between the impurity region 12c and the channel forming region 1 It can be placed between 2a.

[0084] 1 to 7, the transistor 10 is shown in a cross section in the channel length direction, i.e., a broken line. In the cross-sectional view taken along the line A1-A2, the channel forming region 12a, the impurity region 12b, and the impurity region 12b are The example shows a case where the boundary with the pure region 12c overlaps with the end of the conductive film 17. In one embodiment of the present invention, the boundary between the channel formation region 12a and the impurity region 12b or The boundary between the channel forming region 12a and the impurity region 12c is positioned so as to overlap with the conductive film 17. In this case, a part of the impurity region 12b or a part of the impurity region 12c may be an insulating layer. The insulating film 13 is sandwiched between the conductive film 17 and the insulating film 13. Alternatively, in one embodiment of the present invention, the conductive film 17 The end portion may be positioned so as to overlap the channel forming region 12a. A part of the formation region 12a does not overlap with the conductive film 17, with the insulating film 13 sandwiched therebetween. When the D region is provided in the semiconductor film 12, a part of the LDD region is conductive with the insulating film 13 sandwiched therebetween. It may overlap with the conductive film 17.

[0085] <Transistor Configuration Example 7> Next, when a plurality of transistors 10 shown in FIG. 2 are connected in series, An example of a plan view of the transistor 10 is shown in FIG.

[0086] In this specification, the state in which transistors are connected in series means, for example, Only one of the source and drain of the first transistor is connected to the source and drain of the second transistor. This means that the transistors are connected in parallel. The state in which one of the source and drain of the first transistor is connected to the second transistor is called the "connected state." the source and drain of the first transistor; The other is connected to the other of the source and drain of the second transistor. .

[0087] Specifically, in FIG. 8, three transistors indicated as transistors 10a to 10c are 8 shows a state in which the transistors 10 are connected in series. In order to clarify the layout of the sta 10, various insulating films have been omitted.

[0088] The transistors 10a to 10c share the semiconductor film 12. The transistor 10a includes a conductive film 30 that functions as a source electrode or a drain electrode, and a conductive film 31 that functions as a source electrode or a drain electrode. The transistor 10b has a conductive film 31 that functions as a source electrode or a drain electrode. The transistor 10c has a conductive film 31 and a conductive film 32. The conductive film 30 includes a conductive film 32 and a conductive film 33 which function as conductive electrodes. 33 are the conductive films 14 and 15 of the transistor 10 shown in FIG. corresponds to either one.

[0089] The conductive film 17a, which functions as the gate electrode of the transistor 10a, is formed through an opening 18a. and is connected to a conductive film 20 that functions as a gate electrode (BG) through an opening 19a. The conductive film 17b that functions as the gate electrode of the transistor 10b is formed in the opening 1. 8b and the opening 19b, the conductive film 20 that functions as the gate electrode (BG) is connected to the conductive film 20. The conductive film 17c functioning as the gate electrode of the transistor 10c has an opening. The conductive film 20, which functions as a gate electrode (BG), is connected to the conductive film 20 through the opening 18c and the opening 19c. It continues.

[0090] FIG. 9 is a perspective view of the transistors 10a to 10c shown in FIG. However, in FIG. 9, in order to clarify the shapes of the transistors 10a to 10c, Among the insulating films that function as gate insulating films, the conductive films 17a to 17c and the semiconductor film 1 2 are shown as insulating films 13a to 13c. Various insulating films other than the insulating film 13a to the insulating film 13c are omitted. The film 30 to the conductive film 33 are omitted.

[0091] 8 and 9, the transistors 10a to 10c are connected in series. When the conductive films 17a to 17c are all connected to the conductive film 20, However, the conductive films 17a to 17c may be electrically separated from each other. The conductive films 20 may be connected to the respective conductive films 20.

[0092] <Production method> Next, a transistor having the same structure as the transistor 10 shown in FIG. 2 and being an n-channel type was used. The transistor 10N has the same structure as the transistor 10 shown in FIG. 2 and is a p-channel transistor. A specific method for manufacturing the transistor 10 will be described below using the transistor 10P, which is a quartz-type transistor, as an example. This will be explained with reference to Figs. 10 to 13. In Figs. 10 to 13, A cross section of the region where the capacitor 10P is formed in the channel length direction is shown within the range of the dashed line C1-C2. 1, a cross-sectional view in the channel length direction of the region where the transistor 10N is formed is shown by a broken line. The cross-sectional view in the channel width direction is shown within the range of dashed line C5-C6. show.

[0093] First, as shown in FIG. 10(A), an insulating film 301 is formed on a heat-resistant substrate 300. Then, a conductive film 302 and a conductive film 303 which function as a gate electrode (BG) are formed on the insulating film 301. Form on top.

[0094] The substrate 300 is preferably a substrate having heat resistance sufficient to withstand the subsequent manufacturing steps. For example, a glass substrate, a quartz substrate, a ceramic substrate, a sapphire substrate, etc. may be used.

[0095] The insulating film 301 is formed by removing the alkali metals and alkaline earth metals contained in the substrate 300 from the insulating film 301. The diffusion of the semiconductor film 306 and the semiconductor film 307 into the transistor 10P and The insulating film 30 has a function of preventing the insulating film 30 from adversely affecting the electrical characteristics of the transistor 10N. 1 is a silicon oxide, silicon nitride, silicon oxynitride, nitride, etc., which are produced by using a CVD method, a sputtering method, etc. The insulating film is formed using an insulating material such as silicon dioxide.

[0096] The conductive films 302 and 303 may be made of aluminum, titanium, chromium, cobalt, or nickel. Copper, yttrium, zirconium, molybdenum, ruthenium, silver, tantalum and titanium When a film made of a conductive material containing one or more kinds of tungsten is used, one or more layers are laminated. For example, a copper film may be stacked on a tungsten nitride film as the conductive film 302 and the conductive film 303. A conductive film having a layered structure or a single layer of tungsten film can be used. The film 302 and the conductive film 303 are made of tungsten films with a thickness of 200 nm. .

[0097] Next, as shown in FIG. 10(B), an insulating film 304 is formed on the conductive film 302 and the conductive film 303. After the formation, a semiconductor film 305 is formed on the insulating film 304 .

[0098] The insulating film 304 is formed by depositing silicon nitride, oxide, or the like using a plasma CVD method or a sputtering method. A film containing silicon, silicon nitride oxide, or silicon oxynitride is formed in a single layer or a stacked layer. In the case of lamination, for example, a silicon oxide film, a silicon nitride film, A three-layer structure of silicon oxide films is preferable.

[0099] The semiconductor film 305 is preferably formed after the insulating film 304 is formed without being exposed to the air. The thickness of the semiconductor film 305 is preferably 5 nm or more and 150 nm or less, and more preferably 20 nm or more and 100 nm or less. The semiconductor film 305 may be an amorphous semiconductor or a polycrystalline semiconductor. The semiconductor may be silicon germanium or silicon-germanium. When silicon germanium is used, the concentration of germanium is 0.01 at. It is preferable that the content is about 4.5 atomic % or more and 4.5 atomic % or less.

[0100] The semiconductor film 305 may be crystallized by various techniques. There are two types of crystallization methods: laser crystallization using laser light and crystallization using catalytic elements. The crystallization method and the laser crystallization method can also be used in combination. When using a substrate with excellent heat resistance such as quartz, a thermal crystallization method using an electric furnace is used. Lamp annealing crystallization method using infrared light, crystallization method using catalytic elements, around 950℃ A crystallization method in which high-temperature annealing is combined may also be used.

[0101] The semiconductor film 305 is formed by adding an impurity element that imparts p-type conductivity or an impurity element that imparts n-type conductivity. Channel doping may be performed by adding a low concentration of impurity element. For example, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Impurity elements that impart a certain type include phosphorus (P) and arsenic (As). For example, when boron (B) is used as an impurity element, the boron is 1×10 16 atom s / cm 3 That's it, 5 x 10 17 atoms / cm 3 The semiconductor film 305 contains the following concentration: To achieve this, channel doping is performed.

[0102] Next, as shown in FIG. 11(A), the shape of the semiconductor film 305 is processed by etching or the like. Thus, island-shaped semiconductor films 306 and 307 are formed on the insulating film 304. The semiconductor film 306 overlaps with the conductive film 302 with the insulating film 304 sandwiched therebetween, and the semiconductor film 307 The conductive film 303 overlaps with the insulating film 304 sandwiched therebetween.

[0103] Next, as shown in FIG. 11(B), a thin film is formed on the semiconductor film 306 so as to cover the semiconductor film 307. An insulating film 308 is formed. The insulating film 308 is formed by a method such as plasma CVD or sputtering. A film containing silicon nitride, silicon oxide, silicon nitride oxide, or silicon oxynitride is formed in a single layer using a material such as a silicon nitride film. Alternatively, they can be formed by laminating. In the case of laminating, for example, from the substrate 300 side, It is preferable to use a three-layer structure of a silicon oxide film, a silicon nitride film, and a silicon oxide film.

[0104] The insulating film 308 is formed by performing high density plasma treatment on the semiconductor film 306 and the semiconductor film 30 The surface of the substrate 7 may be oxidized or nitrided. Mixtures of rare gases such as e, Ar, Kr, and Xe with oxygen, nitrogen oxide, ammonia, nitrogen, and hydrogen In this case, the plasma is excited by introducing microwaves, It is possible to generate high density plasma with low electron temperature. The generated oxygen radicals (which may include OH radicals) and nitrogen radicals (NH radicals) The surface of the semiconductor film is oxidized or nitrided by a method that may contain silicon dioxide. An insulating film having a thickness of 5 nm or more and 20 nm or less, typically 5 nm or more and 10 nm or less, contacts the semiconductor film. This insulating film having a thickness of 5 nm or more and 10 nm or less is used as the insulating film 308. do.

[0105] The oxidation or nitridation of the semiconductor film by the high-density plasma treatment described above proceeds as a solid-phase reaction. The interface state density between the insulating film and the semiconductor film can be made extremely low. By directly oxidizing or nitriding the semiconductor film using the ZOLL process, the thickness of the insulating film formed can be increased. In addition, when the semiconductor film has crystallinity, high density plasma treatment can be performed. By oxidizing the surface of the semiconductor film through a solid-state reaction using This prevents the rapid progress of the oxidation process and forms a gate insulating film with good uniformity and low interface state density. The insulating film formed by the high density plasma treatment can be used to remove a part of the gate insulating film. The transistors formed by including the above-mentioned elements in all the layers can suppress variations in characteristics.

[0106] Next, as shown in FIG. 12(A), a conductive film is formed on the insulating film 308, and then the conductive film is By processing (patterning) into a predetermined shape, the island-shaped semiconductor film 306 and the semiconductor film 30 Conductive films 309 and 310 are formed above the conductive film 7. Aluminum, titanium, chromium, cobalt, nickel, copper, yttrium, zirconium Conductive materials containing one or more of tungsten, molybdenum, ruthenium, silver, tantalum, and silver It is preferable to use one or more layers of films made of the material. The layer 10 can be formed by CVD, sputtering, or the like.

[0107] Next, as shown in FIG. 12(B), a resist 311 is formed to cover the semiconductor film 306. Then, the resist 311 and the conductive film 310 are used as a mask to give n-type conductivity to the semiconductor film 307. An impurity element (typically P or As) is added. The addition of the impurity element can be performed, for example, by The concentration of impurities contained in the semiconductor film 307 is 1×10 19 atoms / cm 3 That's it, 1×1 0 20 atoms / cm 3 The acceleration voltage is set to 60 keV or more, 100 keV or less. The doping of the impurities can be performed by ion implantation. A pair of impurity regions 312 are formed in the semiconductor layer.

[0108] Next, as shown in FIG. 13(A), a resist 313 is formed to cover the semiconductor film 307. Then, a non-conductive film 309 is formed on the semiconductor film 306 using the resist 313 and the conductive film 309 as a mask. The impurity element is added to the semiconductor film 30. The concentration of impurities in 6 is 1×10 19 atoms / cm 3 That's it, 1 x 10 20 ato ms / cm 3 The acceleration voltage is set to 20 keV or more and 40 keV or less so that the ion By adding the impurities, a pair of impurities is introduced into the semiconductor film 306. Region 314 is formed.

[0109] Next, as shown in FIG. 13(B), an insulating film 320 is formed to cover the substrate 300. Then, an opening is formed in the insulating film 320, and then a layer contacting the impurity region 312 is formed in the opening. A conductive film 321 and a conductive film 322 that is in contact with the impurity region 314 in the opening are formed.

[0110] The insulating film 320 is formed by a method such as plasma CVD or sputtering, and is a silicon film, a silicon oxide film, or Silicon oxynitride film or silicon nitride oxide film, or film containing organic material such as organic resin, may be used as a single layer or a multilayer. In this embodiment, a silicon oxide film having a thickness of 100 nm is formed by plasma CVD. Formed by law.

[0111] The conductive films 321 and 322 may be made of aluminum, titanium, chromium, cobalt, or nickel. Copper, yttrium, zirconium, molybdenum, ruthenium, silver, tantalum and titanium One or more layers of films made of conductive materials containing one or more types of tungsten are used. It is good.

[0112] Next, the impurity region may be activated by heat treatment, for example, at 550° C. for 4 hours. The activation can be carried out by carrying out a heat treatment in a nitrogen atmosphere.

[0113] In addition, a silicon nitride film containing hydrogen was formed to a thickness of 100 nm, and then heated at 410°C for 1 hour. A heat treatment is performed in a nitrogen atmosphere to hydrogenate the semiconductor film 306 and the semiconductor film 307. Alternatively, the process may be carried out in a hydrogen-containing atmosphere at a temperature of 300°C or higher and 450°C or lower. Heat treatment is carried out for 1 hour or more and 12 hours or less to remove the semiconductor film 306 and the semiconductor film 307 from water. The heat treatment may be performed by thermal annealing, laser annealing, or The RTA method can be used. The heat treatment not only hydrogenates the semiconductor film but also adds It is also possible to activate the added impurity elements. Plasma hydrogenation (using hydrogen excited by plasma) may also be performed. This process allows dangling bonds to be terminated by thermally excited hydrogen.

[0114] Through the above-described series of steps, a p-channel transistor 10P and an n-channel transistor 10B are formed. A transistor 10N is formed.

[0115] The transistors 10P and 10N manufactured by the above method were separately The semiconductor element may be transferred onto a flexible substrate such as a prepared plastic. There are various methods for transferring the semiconductor device to the substrate. A metal oxide film is provided between the semiconductor element and the metal oxide film is weakened by crystallization, and the semiconductor element is peeled off and transferred. A method of forming a hydrogen-containing amorphous silicon film between a substrate and a semiconductor element, and irradiating the film with laser light or The amorphous silicon film is removed by etching to separate the substrate from the semiconductor element. In this method, the substrate on which the semiconductor element is formed is mechanically removed or removed by etching with a solution or gas. The semiconductor element is separated from the substrate by removing the adhesive layer and then transferred.

[0116] In this case, the plastic substrate is typically polyethylene terephthalate (PET). Polyester, polyethersulfone (PES), polyethylene naphthalate (PEN ), polycarbonate (PC), nylon, polyether ether ketone (PEEK), Polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), Polybutylene terephthalate (PBT), polyimide, acrylonitrile butadiene styrene Examples include polyethylene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, and acrylic resin. can be done.

[0117] <Configuration Example of Semiconductor Display Device> Next, a structural example of a semiconductor display device, which corresponds to one embodiment of a semiconductor device of the present invention, will be described. do.

[0118] In the semiconductor display device 70 shown in FIG. 14(A), a pixel section 71 includes a plurality of pixels 55 and a pixel 5 5 for each row, are shown by wiring GL1 to wiring GLy (y is a natural number of 2 or more). and wirings SL1 to S for supplying image signals to selected pixels 55. A wiring SL indicated by Lx (x is a natural number of 2 or more) is provided. The supply of the image signal to the wiring SL is controlled by the scanning line driving circuit 72. The pixels 55 are controlled by a signal line driving circuit 73. and at least one of the wirings SL.

[0119] The type and number of wirings provided in the pixel section 71 depend on the configuration, number and arrangement of the pixels 55. Specifically, in the case of the pixel section 71 shown in FIG. 14A, the pixel area can be determined by the following formula: The pixels 55 in the row are arranged in a matrix, and the wirings SL1 to SLx and the wiring GL1 10 shows an example in which the wirings GLy are arranged inside the pixel portion 71.

[0120] In FIG. 14A, a scanning line driver circuit 72 and a signal line driver circuit 73 are connected to a pixel portion 71. Although the case where both are formed on one substrate is illustrated, a part of the signal line driving circuit 73 may be formed on the same substrate. Alternatively, all of the pixel section 71 may be formed on a substrate different from that on which the pixel section 71 is formed. The transistor 10 is used in the scanning line driving circuit 72, the signal line driving circuit 73, or the pixel portion 71. You can be there.

[0121] 14B shows an example of the configuration of a pixel 55. Each pixel 55 includes a liquid crystal element 60 a transistor 56 for controlling the supply of an image signal to the liquid crystal element 60; The liquid crystal element 60 has a capacitance element 57 for holding the voltage between the pixel electrode and the common electrode. The liquid crystal display includes a pixel electrode, a common electrode, and a liquid crystal material to which a voltage is applied between the pixel electrode and the common electrode. and a liquid crystal layer.

[0122] The transistor 56 controls whether or not the potential of the wiring SL is applied to the pixel electrode of the liquid crystal element 60. A predetermined potential is applied to the common electrode of the liquid crystal element 60.

[0123] The specific connection configuration between the transistor 56 and the liquid crystal element 60 will be described below. In B), the gate of the transistor 56 is connected to one of the wirings GL1 to GLy. One of the source and drain of the transistor 56 is connected to the line SL1. Lx, and the other of the source and drain of the transistor 56 is connected to the liquid crystal It is connected to the pixel electrode of the element 60 .

[0124] In the liquid crystal element 60, the voltage applied between the pixel electrode and the common electrode changes depending on the voltage contained in the liquid crystal layer. The orientation of the liquid crystal molecules contained in the liquid crystal element 60 changes, and the transmittance changes. The transmittance is controlled by the potential of the image signal applied to the In each of the plurality of pixels 55 included in the pixel section 71, the liquid crystal element The gray scale of the pixel 60 is adjusted in accordance with an image signal having image information, and an image is displayed on the pixel section 71. is displayed.

[0125] In FIG. 14B, a pixel 55 has a switch that controls the supply of an image signal to the pixel 55. However, the case where one transistor 56 is used as a switch is shown. A plurality of transistors may be used in pixel 55, each of which functions in the same way.

[0126] The transistor 10 shown in FIGS. 1 to 7 can have a large on-state current. 1 to 7 is used as the transistor 56, the pixel 5 Since the image signal can be supplied to the pixel 55 at high speed, the image quality of the pixel 55 can be improved. 2 and 4 to 7 can reduce the off-state current. Therefore, the transistor 10 shown in FIGS. 2 and 4 to 7 can be used as the transistor 56. By using the transistor 56 as a gate, it is possible to prevent leakage of electric charge through the transistor 56. The potential of the image signal applied to the crystal element 60 and the capacitance element 57 can be more reliably maintained. As a result, the transmittance of the liquid crystal element 60 changes due to the leakage of electric charges within one frame period. This prevents the image from changing, thereby improving the quality of the displayed image.

[0127] Next, Fig. 14(C) shows another example of the pixel 55. The pixel 55 has an image signal a transistor 95 for controlling the supply of a signal, a light emitting element 98, and a light emitting element 99 in accordance with an image signal; A transistor 96 controls the current value supplied to the image signal 8, and a capacitor 97 holds the potential of the image signal. and a capacitance element 97.

[0128] The light emitting element 98 is an LED (Light Emitting Diode) or an OLED (Electron Electrical Light Emitting Diodes (ELDs) and other devices that are sensitive to current or voltage The category includes devices whose brightness can be controlled by the light emitting diode (EL) layer. For example, an OLED includes an EL layer and The device has at least an anode and a cathode. The EL layer is provided between the anode and the cathode. It is composed of a single layer or multiple layers, each containing a luminescent material. It includes at least a light-emitting layer.

[0129] The EL layer is turned on when the potential difference between the cathode and the anode is equal to or greater than the threshold voltage of the light emitting element 98. When the current is supplied, electroluminescence is obtained. There are two types of emission: fluorescence when returning from the singlet excited state to the ground state and fluorescence when returning from the triplet excited state. This includes light emission (phosphorescence) when the element returns to its ground state.

[0130] Either the anode or the cathode of the light emitting element 98 is connected to the image signal supplied to the pixel 55. Therefore, the potential of the anode and cathode is controlled according to the image signal. The electrode to be controlled is a pixel electrode, and the other electrode is a common electrode. A predetermined potential is applied to the electrode, and the brightness of the light emitting element 98 is determined by the voltage between the pixel electrode and the common electrode. Therefore, the luminance of the light emitting element 98 is determined by the potential difference between the image signals. By controlling the pixel area, it is possible to display gradation. In each of the above-mentioned embodiments, the gradation of the light-emitting element 98 is adjusted in accordance with an image signal having image information. As a result, an image is displayed on the pixel section 71.

[0131] Next, the transistor 95, the transistor 96, the capacitor element 97, the light emitting element 98, and the like included in the pixel 55 are shown. The connection configuration of the element 98 will be described.

[0132] The transistor 95 has one of a source and a drain connected to a wiring SL. The other drain is connected to the gate of transistor 96. The transistor 96 has a source and a drain connected to a wiring GL. The source or the drain is connected to the light emitting element 98 . Specifically, the other of the source and drain of the transistor 96 is connected to the anode of the light emitting element 98. Either the anode or the cathode of the light emitting element 98 is connected. A predetermined potential is applied to one of the electrodes.

[0133] The transistor 10 shown in FIGS. 1 to 7 can have a large on-state current. 1 to 7 is used as the transistor 95, the pixel 5 Since the image signal can be supplied to the pixel 55 at high speed, the image quality of the pixel 55 can be improved. 2 and 4 to 7 can reduce the off-state current. Therefore, the transistor 10 shown in FIGS. 2, 4 to 7 can be replaced with the transistor 95. By using the transistor 95 as a capacitor, it is possible to prevent leakage of charge through the transistor 95. The potential of the image signal applied to the capacitor 97 can be more reliably maintained. Preventing a change in the luminance of the light-emitting element 98 due to leakage of electric charge within one frame period, This allows for improved quality of the displayed image.

[0134] For example, in this specification and the like, the term "display element," "display device having a display element," "light emitting element," "light emitting device," "light emitting element ... A light-emitting device, which is a device having a light-emitting element and a light-emitting element, can be formed in various forms or in various forms. Examples of a display element, a display device, a light-emitting element, or a light-emitting device include , EL (electroluminescence) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc. ), transistors (transistors that emit light according to the current), electron-emitting devices, liquid crystal devices, Dye ink, electrophoretic element, grating light valve (GLV), plasma display PDP, MEMS (Micro-Electro-Mechanical Systems), Digital Micromirror Device (DMD), DMS (Digital Micro Shutter), IMO D (Interference Modulation) element, electrowetting element, Piezoelectric ceramic displays, carbon nanotubes, etc., are made by electromagnetic interactions. Some have display media that change contrast, brightness, reflectance, transmittance, etc. An example of a display device using electron-emitting devices is an EL display. An example of such a display device is a field emission display (FED) or SED. Flat panel display (SED: Surface-conduction Elect One of the display devices using liquid crystal elements is the Examples include LCD displays (transmissive LCDs, semi-transmissive LCDs, reflective LCD displays, direct-view LCD displays, and projection LCD displays. An example of a display device using electronic ink or an electrophoretic element is electronic paper. be.

[0135] <Pixel configuration> Next, taking the light emitting device shown in FIG. 14(A) as an example of the semiconductor display device 70, An example of the configuration of the pixel 55 will be described. FIG. 15 is a top view of the pixel 55 shown in FIG. 15 is shown as an example. In order to clarify the layout of the pixel 55, The insulating film and the light emitting element 98 are omitted.

[0136] The pixel 55 shown in FIG. 15 includes a transistor 95, a transistor 96, and a capacitor 97. 15 shows a transistor having the same structure as the transistor 10 shown in FIG. The present invention is not limited to the above embodiment, but may be modified in various ways. In one embodiment, any of the transistors 10 shown in FIGS. 1-7 can be used to emit light. It can be used in the device.

[0137] The transistor 95 includes a conductive film 501 that functions as a gate electrode and a semiconductor film 502. and a conductive film 502 connected to the semiconductor film 502 and functioning as a source electrode or a drain electrode. The conductive film 501 has a function as the wiring GL shown in FIG. The conductive film 503 also functions as a wiring SL shown in FIG.

[0138] The capacitor 97 is formed by a semiconductor film 502, a conductive film 504, and a semiconductor film 502 and a conductive film 504. The conductive film 504 is formed in the same layer as the conductive film 503. The conductive film 505 is connected to the conductive film 505 .

[0139] The transistor 96 includes a conductive film 506 that functions as a gate electrode and a semiconductor film 507. and a conductive film 506 connected to the semiconductor film 507 and functioning as a source electrode or a drain electrode. The conductive film 509 includes a conductive film 508 and a conductive film 509. The conductive film 509 is a conductive film having a thickness of 100 μm and a thickness of 100 μm. The conductive film 506 is connected to the pixel electrode of the optical element 98. The conductive film 506 is connected to the semiconductor film 5 through the conductive film 510. 02. The conductive film 508 is connected to the conductive film 511. has a function as the wiring VL shown in FIG.

[0140] The anode or cathode electrode may be made of a metal, an alloy, an electrically conductive compound, or A mixture of these can be used. Specifically, indium oxide-tin oxide (I TO: Indium Tin Oxide, an oxide indium containing silicon or silicon oxide Indium-Tin Oxide, Indium Zinc Oxide , indium oxide containing tungsten oxide and zinc oxide, gold (Au), platinum (Pt) , Nickel (Ni), Tungsten (W), Chromium (Cr), Molybdenum (Mo), Iron ( Fe), cobalt (Co), copper (Cu), palladium (Pd), titanium (Ti), and other elements Elements belonging to Group 1 or 2 of the periodic table, such as lithium (Li) and cesium (C Alkali metals such as calcium (Ca) and strontium (Sr) Alkali-earth metals, magnesium (Mg) and alloys containing these (MgAg, AlLi), Rare earth metals such as uropium (Eu) and ytterbium (Yb) and alloys containing these metals; Other materials that can be used include graphene. The above materials are appropriately selected, and the thickness of the material is By setting the value to the optimum value, it is possible to select a top emission structure, a bottom emission structure, or This makes it possible to create dual emission structures.

[0141] In one embodiment of the present invention, a light-emitting device includes a light-emitting element that emits light of a single color such as white light and a light-emitting element that emits light of a color - By combining filters, a color filter method is adopted to display full color images. Alternatively, a plurality of light emitting elements that emit light of different hues may be used. In this method, the light emitting element has The EL layer between the pair of electrodes is painted to correspond to each color, so it is called a color-coded method. Called.

[0142] In the case of the separate coating method, the EL layer is usually coated using a mask such as a metal mask. This is done by vapor deposition. Therefore, the size of the pixel depends on the accuracy of the EL layer coating by vapor deposition. On the other hand, in the case of the color filter method, unlike the separate coloring method, the EL layer is separated into separate colors. Therefore, it is easier to reduce the pixel size than in the case of the color-by-color method. This makes it possible to realize a high-definition pixel portion.

[0143] In the case of a top emission structure, the light emitted from the light emitting element is transmitted through wiring, transistors, and Bottom emission structure, which is not blocked by various elements such as capacitors and capacitive elements. Compared to the top-emitting type, the light extraction efficiency from the pixel can be improved. The PVD structure can obtain high brightness even when the current value supplied to the light-emitting element is kept low. This is advantageous for extending the life of the light emitting element.

[0144] In one embodiment of the present invention, a light-emitting device includes a light-emitting element that resonates light emitted from an EL layer. The light source may have a microcavity (micro optical resonator) structure. This structure can increase the extraction efficiency of light of a specific wavelength from the light-emitting element. Therefore, the brightness and color purity of the pixel portion can be improved.

[0145] <Cross-sectional structure of light-emitting device> FIG. 16 shows an example of a cross-sectional structure of a pixel portion of a light-emitting device, which corresponds to one mode of a semiconductor device of the present invention. Shown as:

[0146] Specifically, the light-emitting device shown in FIG. 16 has a transistor 42 over a substrate 400. In FIG. 16, a transistor 42 having the same structure as the transistor 10 shown in FIG. 1 to 7 show an example in which the present invention is used in a light-emitting device. Any of the transistors 10 shown can be used in a light emitting device.

[0147] An insulating film 420 is provided over the transistor 42, and a conductive film 42 is provided over the insulating film 420. The conductive film 424 is formed in the opening of the insulating film 420. The conductive film 404 functions as a source electrode or a drain electrode of the transistor 42. There are.

[0148] An insulating film 425 is provided over the insulating film 420 and the conductive film 424. The insulating film 425 The insulating film 425 has an opening at a position overlapping with the conductive film 424. An insulating film 426 is provided at a position different from the opening of the insulating film 425. An EL layer 427 and a conductive film 428 are stacked in this order on the insulating film 426. The conductive film 424 and the conductive film 428 overlap with each other with the EL layer 427 sandwiched therebetween. The conductive film 424 and the conductive film 428 function as the light-emitting element 43. the other acts as a cathode.

[0149] The light emitting device also includes a substrate 430 facing the substrate 400 with the light emitting element 43 sandwiched therebetween. On the substrate 430, that is, on the surface of the substrate 430 close to the light emitting element 43, a light-shielding layer is formed. The shielding film 431 has a function of blocking the light emitting element 4. The opening overlaps the light emitting element 43. On the glass substrate 400, a colored layer 432 that transmits visible light in a specific wavelength range is provided.

[0150] <Example of sequential circuit configuration> Next, a configuration example of a sequential circuit using the transistor 10 shown in FIGS. 1 to 7 will be described. do.

[0151] FIG. 17A shows the positions of various wirings connected to the sequential circuit 80. 17(B) shows an example of the circuit configuration of the sequential circuit 80. The sequential circuit shown in FIG. 80 is a transistor 81 to a transistor 85 of p-channel type and a transistor 86 of n-channel type. Transistors 81 to 90. The structure of the transistor 10 shown in FIGS. 1 to 7 can be applied to the above.

[0152] In the sequential circuit 80, a transistor 81, a transistor 82, a transistor 86, and The transistor 87 determines whether or not a signal is output in accordance with the signals supplied to the wiring c1 and the wiring c2. The clocked inverter is controlled by the

[0153] Specifically, the transistor 81 has a gate connected to the wiring c2 and a source and a drain connected to the wiring c3. One of the source and drain is connected to the wiring 74, and the other of the source and drain is connected to the source and drain of the transistor 82. The gate of the transistor 82 is connected to the wiring in, and the The other of the source and drain is connected to the gates of transistors 85 and 90. The transistor 87 has a gate connected to the wiring c1 and a source and a drain The other of the source and drain is connected to the wiring 75 and the other of the source and drain is connected to the source and drain of the transistor 86. The transistor 86 has a gate connected to the wiring in and a source The other drain is connected to the gates of transistors 85 and 90. .

[0154] In the sequential circuit 80, the transistors 83, 84, and 88 , and the transistor 89 outputs a signal in accordance with the signals supplied to the wiring c1 and the wiring c2. The presence or absence of the clocked inverter is controlled.

[0155] Specifically, the transistor 83 has a gate connected to the wiring c1 and a source and a drain connected to the wiring c2. One of the source and drain terminals is connected to the wiring 76, and the other of the source and drain terminals is connected to the source and drain terminal of the transistor 84. The gate of the transistor 84 is connected to the wiring out. The other of the source and drain is connected to the gates of transistors 85 and 90. The transistor 89 has a gate connected to the wiring c2 and a source and a drain connected to the wiring c3. is connected to the wiring 77, and the other of the source and drain is connected to the source and drain of the transistor 88. The transistor 88 has its gate connected to the wiring out and its solenoid connected to the The other of the source and drain is connected to the gates of transistors 85 and 90. There are.

[0156] In the sequential circuit 80, the transistor 85 and the transistor 90 constitute an inverter. It is completed.

[0157] Specifically, one of the source and drain of the transistor 85 is connected to the wiring 78. The other of the source and drain of the transistor 90 is connected to the wiring out. One of the drains is connected to a wiring 79, and the other of the source and drain is connected to a wiring out. It is being done.

[0158] A low-level potential VSS is applied to the wiring 75, the wiring 77, and the wiring 79. A high-level potential VDD is applied to the line 74, the wiring 76, and the wiring 78.

[0159] The transistor 10 shown in FIGS. 1 to 7 can have a large on-state current. The transistor 10 shown in FIGS. 1 to 7 is a transistor 81 to a transistor 82 of a sequential circuit 80. By using either of the first and second inputs in the first and second inputs, the sequential circuit 80 can be operated at high speed. In addition, the off-state current of the transistor 10 shown in FIGS. 2 and 4 to 7 can be reduced. Therefore, the transistor 10 shown in FIGS. 2, 4 to 7 can be used as the transistor of the sequential circuit 80. By using the transistors 81 to 90, the wirings 75, 77, and 7 9 and the wiring 74, wiring 76, and wiring 78 can be suppressed to a small value. This allows the power consumption of the sequential circuit 80 to be reduced.

[0160] <Driver circuit configuration example> Next, an example of the configuration of a signal line driver circuit using the sequential circuit 80 shown in FIG. 17 is shown in FIG. In the block diagram, the components are classified by function and are shown independently. Although it is shown as a separate block, the actual components are completely separated by function. It is difficult to do this, and one component may be involved in multiple functions.

[0161] In the signal line driver circuit shown in FIG. 18, a shift register is configured using a plurality of sequential circuits 80. In the plurality of sequential circuits 80, a start pulse signal SSP or a A signal from the wiring out connected to the sequential circuit 80 is input to the wiring in. A clock signal SCK is input to one end of the line c2, and the other ends of the lines c1 and c2 are A clock signal SCKb, which is the inverted logical value of the clock signal SCK, is input.

[0162] The signals input to the wirings in and out of the plurality of sequential circuits 80 are input in a plurality of ways. The NAND gates 40 are connected to a pair of input terminals. The signal output from the output terminal of the NOR 41 is input to one of a pair of input terminals of the NOR 41. The other of the pair of input terminals of the plurality of NORs 41 is The signals output from the output terminals of the plurality of NANDs 40 are input via a buffer 44. The signals output from the output terminals of the plurality of NORs 41 are input via a buffer 45. The signals are then input to first terminals of the plurality of transmission gates 47. The signal output from the output terminal of the NOR 41 is input to a plurality of inverters 46. The signal is input to a second terminal of the transmission gate 47 .

[0163] The transmission gate 47 receives signals from the first and second terminals. The image signal VIDEO input to the input terminal is supplied to the line SL.

[0164] Next, an example of the configuration of a scanning line driving circuit using the sequential circuit 80 shown in FIG. 17 is shown in FIG. and shown in the block diagram.

[0165] In the scanning line driving circuit shown in FIG. 19, a shift register is configured using a plurality of sequential circuits 80. In the plurality of sequential circuits 80, a start pulse signal GSP or a A signal from the wiring out connected to the sequential circuit 80 is input to the wiring in. A clock signal GCK is input to one end of the line c2, and the other ends of the lines c1 and c2 are A clock signal GCKb, which is the inverted logical value of the clock signal GCK, is input.

[0166] The signals input to the wirings in and out of the plurality of sequential circuits 80 are input in a plurality of ways. The NAND gates 48 are connected to a pair of input terminals. The signal output from the output terminal of the NOR49 is input to one of the pair of input terminals of the NOR49. The other of the pair of input terminals of the multiple NORs 49 is , and a signal PWC are input. Specifically, in FIG. 19, The signal output from the output terminal is input to one of the pair of input terminals of six NOR49s. The example shows the case where each of the six NOR49s has a pair of inputs. In this example, signals PWC1 to PWC6 are input to the other input terminals. The signals output from the output terminals of the plurality of NORs 49 are fed via a buffer 50 to , are input to multiple wirings GL, respectively.

[0167] 1 to 7 can be used not only in the sequential circuit 80 but also in the transistor 10 shown in FIG. Various circuits constituting the signal line driver circuit or the scanning line driver circuit shown in FIG. The transistor 10 shown in FIGS. Therefore, the transistor 10 shown in FIGS. 1 to 7 can be used as a signal line driver. By using the same in various circuits that constitute a signal line driver circuit or a scanning line driver circuit, The scanning line driving circuit can be operated at high speed. The transistor 10 can reduce the off-state current. The transistor 10 is used in various circuits that constitute a signal line driver circuit or a scanning line driver circuit. This makes it possible to reduce the power consumption of the signal line driver circuit or the scanning line driver circuit.

[0168] <Appearance of the light-emitting device> FIG. 20 is a perspective view showing an example of the appearance of a light-emitting device, which corresponds to one embodiment of a semiconductor device of the present invention. The light emitting device shown in FIG. 20 includes a panel 1601, a controller, a power supply circuit, an image A circuit board 1602 on which a processing circuit, an image memory, a CPU, etc. are provided, a connection part 1603, and The panel 1601 has a pixel portion 1604 in which a plurality of pixels are provided, and a a driver circuit 1605 for selecting pixels in each row, and a driver circuit 1606 for supplying an image signal Sig to the pixels in the selected row. and a drive circuit 1606 for controlling the supply of the light.

[0169] Various signals and power supply potentials are transmitted from the circuit board 1602 to the panel via the connection part 1603. The connection part 1603 is connected to an FPC (Flexible Printed Circuit) d Circuit) can be used. Also, COF tape can be used for the connection part 1603. When using a part of the circuit in the circuit board 1602 or the driving circuit of the panel 1601, The circuit 1605 and part of the drive circuit 1606 are formed on a separately prepared chip, and the COF Even if the chip is connected to the COF tape using the Chip On Film (Chip On Film) method, good.

[0170] <Example of electronic device configuration> The semiconductor device according to one embodiment of the present invention can be used in a display device, a notebook personal computer, a recording medium, Image playback device equipped with a medium (typically DVD: Digital Versatile (Devices with a display that can play back recording media such as discs and display the images) In addition, a semiconductor device according to one embodiment of the present invention can be used in an electric device. Sub-devices include mobile phones, portable game consoles, personal digital assistants, e-books, video cameras, Cameras such as digital still cameras, goggle-type displays (head-mounted displays) navigation systems, audio playback devices (car audio, digital audio players) Layers, etc.), copiers, facsimiles, printers, multi-function printers, automated teller machines Examples of such electronic devices include ATMs and vending machines. show.

[0171] FIG. 21A shows a display device, which includes a housing 5001, a display portion 5002, a support base 5003, and the like. The semiconductor device according to one embodiment of the present invention can be used in the display portion 5002 or various other circuits. The display device can be used for personal computers, TV broadcast reception, This includes all display devices for displaying information, such as advertisements.

[0172] FIG. 21B shows a portable information terminal, which includes a housing 5101, a display unit 5102, and operation keys 5103. The semiconductor device according to one embodiment of the present invention includes the display portion 5102 and various other circuits. It can be used on roads.

[0173] FIG. 21C shows a display device having a curved housing 5701, a display portion 5702, and the like. The semiconductor device according to one embodiment of the present invention can be used in the display portion 5702 or various other circuits. By using a flexible substrate for a semiconductor device according to one embodiment of the present invention, The semiconductor device is used in a display portion 5702 supported by a curved housing 5701. This makes it possible to provide a display device that is flexible, lightweight, and easy to use.

[0174] FIG. 21D shows a portable game machine, which includes a housing 5301, a housing 5302, a display portion 5303, Display unit 5304, microphone 5305, speaker 5306, operation keys 5307, The semiconductor device according to one embodiment of the present invention includes a display portion 5303, a display 21(D) can be used in the circuit 5304 or various other circuits. The portable game machine has two display portions 5303 and 5304. The number of display units that the gaming machine has is not limited to this.

[0175] FIG. 21E shows an electronic book having a housing 5601, a display portion 5602, and the like. The semiconductor device according to the embodiment can be used in the display portion 5602 or various other circuits. Furthermore, by using a flexible substrate, the display portion can be made flexible. This allows us to provide e-books that are flexible, lightweight, and easy to use.

[0176] FIG. 21F shows a mobile phone, which includes a housing 5901, a display portion 5902, a microphone 5907, a speaker 5908, and a microphone 5909. Speaker 5904, camera 5903, external connection part 5906, and operation button 5905 are installed. The semiconductor device according to one embodiment of the present invention includes the display portion 5902 and each of the other portions. Furthermore, the semiconductor device according to one embodiment of the present invention can be used for a flexible semiconductor device. When the semiconductor device is formed on a substrate, the semiconductor device is formed on a display portion 5902 having a curved surface as shown in FIG. It is possible to apply a body device. [Explanation of symbols]

[0177] 1. Configuration example 2. Configuration example 3. Configuration example 4. Configuration example 5. Configuration example 6. Configuration example 7 Configuration example 10 transistors 10a transistor 10b transistor 10c transistor 10N transistor 10P transistor 11 Circuit Board 12 Semiconductor film 12a Channel formation region 12b Impurity region 12c impurity region 13 Insulating film 13a Insulating film 13c Insulating film 14 Conductive film 15 Conductive film 16. Insulating film 17 Conductive film 17a Conductive film 17b Conductive film 17c Conductive film 18 Opening 18a opening 18b opening 18c opening 19 Opening 19a opening 19b opening 19c opening 20 Conductive film 21 insulating film 22 Opening 23 Opening 24 Conductive film 25 Opening 26 Conductive film 27 Conductive film 28 Opening 29 Opening 30 Conductive film 31 Conductive film 32 Conductive film 33 Conductive film 40 NAND 42 transistors 43 Light-emitting element 44 buffers 45 buffers 46 inverter 47 Transmission Gate 48 NAND 50 buffers 55 pixels 56 transistors 57 Capacitor element 60 Liquid crystal element 70 Semiconductor display device 71 Pixel section 72 Scanning line driving circuit 73 Signal line driver circuit 74 Wiring 75 Wiring 76 Wiring 77 Wiring 78 Wiring 79 Wiring 80 sequential circuits 81 Transistor 82 transistors 83 Transistor 84 transistors 85 transistors 86 transistors 87 Transistors 88 transistors 89 Transistors 90 transistors 95 transistors 96 transistors 97 Capacitor 98 Light-emitting element 300 boards 301 Insulating film 302 Conductive film 303 Conductive Film 304 Insulating film 305 Semiconductor Film 306 Semiconductor Film 307 Semiconductor Film 308 Insulating film 309 Conductive Film 310 Conductive film 311 Resist 312 Impurity region 313 Resist 314 Impurity region 320 insulating film 321 Conductive Film 322 Conductive Film 400 boards 404 Conductive film 420 insulating film 424 Conductive Film 425 insulating film 426 Insulating Film 427 EL layer 428 Conductive Film 430 board 431 Shielding membrane 432 Colored layer 501 Conductive film 502 Semiconductor film 503 Conductive film 504 Conductive film 505 Conductive film 506 Conductive film 507 Semiconductor Film 508 Conductive film 509 Conductive film 510 Conductive film 511 Conductive film 1601 Panel 1602 Circuit Board 1603 Connection 1604 pixel section 1605 drive circuit 1606 drive circuit 5001 Case 5002 Display section 5003 Support stand 5101 Housing 5102 Display section 5103 Operation key 5301 Housing 5302 Housing 5303 Display section 5304 Display section 5305 Microphone 5306 Speaker 5307 Operation key 5308 Stylus 5601 Housing 5602 Display section 5701 Housing 5702 Display section 5901 Housing 5902 Display section 5903 Camera 5904 Speaker 5905 Button 5906 External connection part 5907 Mike

Claims

1. a pixel portion including a first transistor, a second transistor, a light-emitting element, a capacitor, a wiring to which an image signal is input, a scanning line, and a power supply line; one of the source and the drain of the first transistor is always electrically connected to the wiring; the other of the source and the drain of the first transistor is always electrically connected to the gate of the second transistor; the gate of the first transistor is always electrically connected to the scanning line; one of the source and the drain of the second transistor is always electrically connected to the power supply line; the other of the source and the drain of the second transistor is always electrically connected to a pixel electrode of the light-emitting element; the capacitance element has a function of holding a voltage between a gate of the second transistor and a pixel electrode of the light-emitting element, a first semiconductor film having a channel formation region of the first transistor and functioning as a first electrode of the capacitor; a second semiconductor film having a channel formation region of the second transistor; a first conductive film having a function as a gate of the first transistor and a function as the scan line, and having a region disposed above the first semiconductor film; a second conductive film having a function as the wiring; a third conductive film that functions as a second electrode of the capacitor; a fourth conductive film and a fifth conductive film which function as the power supply line and are always electrically connected to each other; the second conductive film has a region intersecting with the first conductive film and a region intersecting with the fourth conductive film, the fifth conductive film has a region intersecting with the first conductive film and a region intersecting with the fourth conductive film, the third conductive film does not overlap with the first conductive film and the fourth conductive film, the third conductive film is disposed in a region surrounded by the first conductive film, the second conductive film, the fourth conductive film, and the fifth conductive film in a plan view; Light-emitting device.

2. a pixel portion including a first transistor, a second transistor, a light-emitting element, a capacitor, a wiring to which an image signal is input, a scanning line, and a power supply line; one of the source and the drain of the first transistor is always electrically connected to the wiring; the other of the source and the drain of the first transistor is always electrically connected to the gate of the second transistor; the gate of the first transistor is always electrically connected to the scanning line; one of the source and the drain of the second transistor is always electrically connected to the power supply line; the other of the source and the drain of the second transistor is always electrically connected to a pixel electrode of the light-emitting element; the capacitance element has a function of holding a voltage between a gate of the second transistor and a pixel electrode of the light-emitting element, a first semiconductor film having a channel formation region of the first transistor and functioning as a first electrode of the capacitor; a second semiconductor film having a channel formation region of the second transistor; a first conductive film having a function as a gate of the first transistor and a function as the scan line, and having a region disposed above the first semiconductor film; a second conductive film having a function as the wiring; a third conductive film that functions as a second electrode of the capacitor; a fourth conductive film and a fifth conductive film which function as the power supply line and are always electrically connected to each other; the second conductive film has a region intersecting with the first conductive film and a region intersecting with the fourth conductive film, the fifth conductive film has a region intersecting with the first conductive film and a region intersecting with the fourth conductive film, the third conductive film does not overlap with the first conductive film, the second conductive film, or the fourth conductive film; the third conductive film is disposed in a region surrounded by the first conductive film, the second conductive film, the fourth conductive film, and the fifth conductive film in a plan view; Light-emitting device.

3. a pixel portion including a first transistor, a second transistor, a light-emitting element, a capacitor, a wiring to which an image signal is input, a scanning line, and a power supply line; one of the source and the drain of the first transistor is always electrically connected to the wiring; the other of the source and the drain of the first transistor is always electrically connected to the gate of the second transistor; the gate of the first transistor is always electrically connected to the scanning line; one of the source and the drain of the second transistor is always electrically connected to the power supply line; the other of the source and the drain of the second transistor is always electrically connected to a pixel electrode of the light-emitting element; the capacitance element has a function of holding a voltage between a gate of the second transistor and a pixel electrode of the light-emitting element, a first semiconductor film having a channel formation region of the first transistor and functioning as a first electrode of the capacitor; a second semiconductor film having a channel formation region of the second transistor; a first conductive film having a function as a gate of the first transistor and a function as the scan line, and having a region disposed above the first semiconductor film; a second conductive film having a function as the wiring; a third conductive film that functions as a second electrode of the capacitor; a fourth conductive film and a fifth conductive film which function as the power supply line and are always electrically connected to each other; the second conductive film has a region intersecting with the first conductive film and a region intersecting with the fourth conductive film, the fifth conductive film has a region intersecting with the first conductive film and a region intersecting with the fourth conductive film, the third conductive film does not overlap with the first conductive film, the second conductive film, the fourth conductive film, or the fifth conductive film; the third conductive film is disposed in a region surrounded by the first conductive film, the second conductive film, the fourth conductive film, and the fifth conductive film in a plan view; Light-emitting device.

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