Laminated ceramic electronic component

Abstract

To provide a laminated ceramic electronic component capable of reducing a thickness of an external electrode while securing bondability between an internal conductor layer and the external electrode.SOLUTION: With a multilayer ceramic electronic component 1, an end surface side base electrode layer 501 includes an interrupted region 54 in which the end surface-side base electrode layer 501 exists intermittently with gaps in the vicinity of a first main surface side outer layer portion 12A and in the vicinity of a second main surface side outer layer portion 12B of at least an inner layer portion 11. In a disrupted region 55 in which the end surface side base electrode layer 501 is interrupted, an end surface side conductive resin layer 601 is in contact with a ceramic layer 20 and an end portion of an inner conductive layer 30.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic electronic component. [Background technology]

[0002] In recent years, multilayer ceramic capacitors as multilayer ceramic electronic components have been required to be durable in harsh environments, such as those exposed to bending stress due to thermal expansion. To address this demand, a technique using a thermosetting conductive resin paste for the external electrodes of a multilayer ceramic capacitor has been known. Patent Document 1 illustrates this type of technique. Patent Document 1 describes a multilayer ceramic capacitor having external electrodes with a layered configuration in which an electrode layer formed by applying a conductive paste by dipping and baking it, a conductive epoxy-based thermosetting resin layer, a nickel-plated layer, and a tin-based layer are sequentially laminated. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-162771 Summary of the Invention [Problem to be solved by the invention]

[0004] The multilayer ceramic capacitor of Patent Document 1 can prevent cracks from occurring in the laminate due to stress relaxation caused by sacrificial fracture and deformation of the resin layer. However, a challenge for multilayer ceramic capacitors having such resin layers is to reduce the thickness of the external electrodes while ensuring the bonding between the internal electrode layers and the external electrodes. For example, it is undesirable for the lengthwise dimension of the multilayer ceramic capacitor to increase due to thicker external electrodes.

[0005] An object of the present invention is to provide a multilayer ceramic electronic component that can ensure the bonding between the internal conductor layers and the external electrodes while reducing the thickness of the external electrodes. [Means for solving the problem]

[0006] The multilayer ceramic electronic component according to the present invention comprises a laminate including a plurality of laminated ceramic layers and a plurality of internal conductor layers, the laminate having a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction, a first external electrode disposed on the first end surface, and a second external electrode disposed on the second end surface, wherein the laminate comprises an internal layer portion having the ceramic layers and the internal conductor layers, and two external electrodes disposed on the second end surface so as to sandwich the internal layer portion in the height direction. the first external electrode and the second external electrode comprise an end surface side base electrode layer, an end surface side conductive resin layer arranged on the end surface side base electrode layer, and an end surface side plating layer arranged on the end surface side conductive resin layer, and the end surface side base electrode layer has an interrupted region where the end surface side base electrode layer is present intermittently, at least in the region near the first outer layer portion and the region near the second outer layer portion of the inner layer portion, and in the region where the end surface side base electrode layer is interrupted, the end surface side conductive resin layer is in contact with the ceramic layer and the end of the internal conductor layer. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a multilayer ceramic electronic component that can ensure the bonding between the internal conductor layers and the external electrodes while reducing the thickness of the external electrodes. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is an external perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention; [Figure 2] 2 is a cross-sectional view taken along line II-II of the multilayer ceramic capacitor shown in FIG. [Figure 3] 3 is a cross-sectional view taken along line III-III of the multilayer ceramic capacitor shown in FIG. 2. [Figure 4]4 is a cross-sectional view taken along line IV-IV of the multilayer ceramic capacitor shown in FIG. 2. [Figure 5] 3 is an enlarged view of a V portion of the multilayer ceramic capacitor shown in FIG. 2, and is a schematic view for explaining the bonding portion between the end face side base electrode layer and the end face side conductive resin layer of the multilayer ceramic capacitor. [Figure 6] FIG. 1 is a schematic diagram showing an example of the configuration of a double-structure multilayer ceramic capacitor. [Figure 7] FIG. 1 is a schematic diagram showing an example of the configuration of a triple-structure multilayer ceramic capacitor. [Figure 8] FIG. 1 is a schematic diagram showing an example of the configuration of a four-layer structure multilayer ceramic capacitor. DETAILED DESCRIPTION OF THE INVENTION

[0009] <Embodiment> A multilayer ceramic capacitor 1 as a multilayer ceramic electronic component according to a first embodiment of the present disclosure will now be described with reference to FIGS. 1 to 4. FIG. 1 is an external perspective view of the multilayer ceramic capacitor 1 of this embodiment. FIG. 2 is a cross-sectional view taken along line II-II of the multilayer ceramic capacitor 1 of FIG. 1. FIG. 3 is a cross-sectional view taken along line III-III of the multilayer ceramic capacitor 1 of FIG. 2. FIG. 4 is a cross-sectional view taken along line IV-IV of the multilayer ceramic capacitor 1 of FIG. 2.

[0010] The drawings may be simplified and schematic for the purpose of explaining the invention, and the dimensional ratios of the depicted components or between the components may not match those described in the specification. Furthermore, components described in the specification may be omitted from the drawings, or the number of components may be omitted. For example, the number of internal electrode layers shown in Figures 2 and 3 is 10 for the sake of convenience, but this does not represent the actual number of internal electrode layers 30. Terms used in the present invention that specify shapes and geometric conditions, as well as their degrees of similarity, such as "parallel," "orthogonal," and "identical," as well as values ​​of length and angle, are not limited to their strict meanings but are interpreted to encompass a range within which similar functionality can be expected.

[0011] The multilayer ceramic capacitor 1 includes a laminate 10 and external electrodes 40.

[0012] 1 to 4 show an XYZ Cartesian coordinate system. The length direction L of the multilayer ceramic capacitor 1 and the laminate 10 corresponds to the X direction. The width direction W of the multilayer ceramic capacitor 1 and the laminate 10 corresponds to the Y direction. The stacking direction T as the height direction of the multilayer ceramic capacitor 1 and the laminate 10 corresponds to the Z direction. Here, the cross section shown in FIG. 2 is also referred to as the LT cross section. The cross section shown in FIG. 3 is also referred to as the WT cross section. The cross section shown in FIG. 4 is also referred to as the LW cross section.

[0013] As shown in Figures 1 to 4, the laminate 10 includes a first main surface TS1 and a second main surface TS2 facing in a stacking direction T, a first side surface WS1 and a second side surface WS2 facing in a width direction W perpendicular to the stacking direction T, and a first end surface LS1 and a second end surface LS2 facing in a length direction L perpendicular to the stacking direction T and the width direction W.

[0014] As shown in FIG. 1, the laminate 10 has a substantially rectangular parallelepiped shape. The dimension of the laminate 10 in the length direction L is not necessarily longer than the dimension in the width direction W. The corners and ridges of the laminate 10 are preferably rounded. A corner is a portion where three faces of the laminate 10 intersect, and a ridge is a portion where two faces of the laminate 10 intersect. Incidentally, unevenness may be formed on part or all of the surfaces constituting the laminate 10.

[0015] The dimensions of the laminate 10 are not particularly limited, but if the dimension of the laminate 10 in the length direction L is defined as the L dimension, then the L dimension is preferably 0.2 mm or more and 10 mm or less. If the dimension of the laminate 10 in the stacking direction T is defined as the T dimension, then the T dimension is preferably 0.1 mm or more and 10 mm or less. If the dimension of the laminate 10 in the width direction W is defined as the W dimension, then the W dimension is preferably 0.1 mm or more and 10 mm or less.

[0016] As shown in Figures 2 and 3, the laminate 10 has an inner layer portion 11, and a first outer layer portion (first main surface side outer layer portion 12A) and a second outer layer portion (second main surface side outer layer portion 12B) arranged to sandwich the inner layer portion 11 in the stacking direction T.

[0017] The internal layer portion 11 includes a plurality of dielectric layers 20 as a plurality of ceramic layers and a plurality of internal electrode layers 30 as a plurality of internal conductor layers. The internal layer portion 11 includes the internal electrode layer 30 located closest to the first principal surface TS1 in the stacking direction T to the internal electrode layer 30 located closest to the second principal surface TS2. In the internal layer portion 11, the multiple internal electrode layers 30 are arranged opposite each other with the dielectric layer 20 interposed therebetween. The internal layer portion 11 is a portion that generates electrostatic capacitance and essentially functions as a capacitor.

[0018] The plurality of dielectric layers 20 are made of a dielectric material. The dielectric material may be, for example, a dielectric ceramic containing components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3. The dielectric material may also be one in which a secondary component such as a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound is added to the above main components.

[0019] The thickness of the dielectric layer 20 is preferably 0.5 μm or more and 15 μm or less. The number of laminated dielectric layers 20 is preferably 10 or more and 700 or less. Note that this number of dielectric layers 20 is the total number of the dielectric layers in the inner layer portion 11 and the dielectric layers in the first main surface side outer layer portion 12A and the second main surface side outer layer portion 12B.

[0020] The multiple internal electrode layers 30 include first internal electrode layers 31 as multiple first internal conductor layers and second internal electrode layers 32 as multiple second internal conductor layers. The multiple first internal electrode layers 31 are arranged on the multiple dielectric layers 20. The multiple second internal electrode layers 32 are arranged on the multiple dielectric layers 20. The multiple first internal electrode layers 31 and the multiple second internal electrode layers 32 are arranged alternately in the stacking direction T of the laminate 10, with the dielectric layers 20 interposed between them. The first internal electrode layers 31 and the second internal electrode layers 32 are arranged so as to sandwich the dielectric layers 20 therebetween.

[0021] The first internal electrode layer 31 has a first opposing portion 31A opposing the second internal electrode layer 32, and a first lead portion 31B led from the first opposing portion 31A to the first end face LS1. The first lead portion 31B is exposed at the first end face LS1.

[0022] The second internal electrode layer 32 has a second opposing portion 32A opposing the first internal electrode layer 31, and a second lead portion 32B led from the second opposing portion 32A to the second end face LS2. The second lead portion 32B is exposed at the second end face LS2.

[0023] In this embodiment, the first opposing portion 31A and the second opposing portion 32A face each other via the dielectric layer 20, thereby forming capacitance and exhibiting the characteristics of a capacitor.

[0024] The shapes of the first opposing portion 31A and the second opposing portion 32A are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded or the corners of the rectangular shape may be formed at an angle. The shapes of the first lead portion 31B and the second lead portion 32B are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded or the corners of the rectangular shape may be formed at an angle.

[0025] The width direction W dimension of the first facing portion 31A and the width direction W dimension of the first lead portion 31B may be the same dimension, or one of the dimensions may be smaller. The width direction W dimension of the second facing portion 32A and the width direction W dimension of the second lead portion 32B may be the same dimension, or one of the dimensions may be smaller.

[0026] The first internal electrode layer 31 and the second internal electrode layer 32 are made of an appropriate conductive material, such as a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy containing at least one of these metals. When an alloy is used, the first internal electrode layer 31 and the second internal electrode layer 32 may be made of, for example, an Ag-Pd alloy.

[0027] The thickness of each of the first internal electrode layers 31 and the second internal electrode layers 32 is preferably, for example, about 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layers 31 and the second internal electrode layers 32 is preferably 10 or more and 700 or less.

[0028] The first main surface side outer layer portion 12A is located on the first main surface TS1 side of the laminate 10. The first main surface side outer layer portion 12A is an assembly of multiple dielectric layers 20 located between the first main surface TS1 and the internal electrode layer 30 closest to the first main surface TS1. The dielectric layers 20 used in the first main surface side outer layer portion 12A may be the same as the dielectric layers 20 used in the internal layer portion 11, or may be dielectric layers made of a different material.

[0029] The second main surface side outer layer portion 12B is located on the second main surface TS2 side of the laminate 10. The second main surface side outer layer portion 12B is an assembly of multiple dielectric layers 20 located between the second main surface TS2 and the internal electrode layer 30 closest to the second main surface TS2. The dielectric layers 20 used in the second main surface side outer layer portion 12B may be the same as the dielectric layers 20 used in the internal layer portion 11, or may be dielectric layers made of a different material.

[0030] The laminate 10 has a counter electrode portion 11E. The counter electrode portion 11E is a portion where the first counter portion 31A of the first internal electrode layer 31 and the second counter portion 32A of the second internal electrode layer 32 face each other. The counter electrode portion 11E is configured as a part of the inner layer portion 11. FIG. 4 shows the range of the counter electrode portion 11E in the width direction W and the length direction L. The counter electrode portion 11E is also called the effective portion of the capacitor.

[0031] The laminate 10 has side surface outer layer portions. The side surface outer layer portions include a first side surface outer layer portion WG1 and a second side surface outer layer portion WG2. The first side surface outer layer portion WG1 is a portion including the dielectric layer 20 located between the counter electrode portion 11E and the first side surface WS1. The second side surface outer layer portion WG2 is a portion including the dielectric layer 20 located between the counter electrode portion 11E and the second side surface WS2. Figures 3 and 4 show the ranges in the width direction W of the first side surface outer layer portion WG1 and the second side surface outer layer portion WG2. The side surface outer layer portions are also referred to as W gaps or side gaps.

[0032] The laminate 10 has end surface side outer layer portions. The end surface side outer layer portions include a first end surface side outer layer portion LG1 and a second end surface side outer layer portion LG2. The first end surface side outer layer portion LG1 is a portion including the dielectric layer 20 located between the counter electrode portion 11E and the first end surface LS1. The second end surface side outer layer portion LG2 is a portion including the dielectric layer 20 located between the counter electrode portion 11E and the second end surface LS2. Figures 2 and 4 show the ranges in the length direction L of the first end surface side outer layer portion LG1 and the second end surface side outer layer portion LG2. The end surface side outer layer portions are also referred to as L gaps or end gaps.

[0033] The external electrode 40 has a first external electrode 40A arranged on the first end face LS1 side and a second external electrode 40B arranged on the second end face LS2 side.

[0034] The first external electrode 40A is disposed on the first end face LS1. The first external electrode 40A is connected to the first internal electrode layer 31. The first external electrode 40A may also be disposed on a portion of the first main surface TS1 and a portion of the second main surface TS2, as well as a portion of the first side surface WS1 and a portion of the second side surface WS2. In this embodiment, the first external electrode 40A includes a first end face side external electrode 40A1, a first main surface side external electrode 40A2, and a first side surface side external electrode 40A3. The first end face side external electrode 40A1 is disposed on the first end face LS1. The first main surface side external electrode 40A2 is connected to the first end face side external electrode 40A1 and is disposed on a portion of the first main surface TS1 and the second main surface TS2 on the side of the first end face LS1. The first side surface side external electrode 40A3 is connected to the first end surface side external electrode 40A1 and is disposed on the first side surface WS1 and a portion of the second side surface WS2 on the first end surface LS1 side. In this manner, the first external electrode 40A is formed to extend from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, as well as a portion of the first side surface WS1 and a portion of the second side surface WS2.

[0035] The second external electrode 40B is disposed on the second end face LS2. The second external electrode 40B is connected to the second internal electrode layer 32. The second external electrode 40B may also be disposed on a portion of the first main face TS1 and a portion of the second main face TS2, as well as a portion of the first side face WS1 and a portion of the second side face WS2. In this embodiment, the second external electrode 40B includes a second end face side external electrode 40B1, a second main face side external electrode 40B2, and a second side face side external electrode 40B3. The second end face side external electrode 40B1 is disposed on the second end face LS2. The second main face side external electrode 40B2 is connected to the second end face side external electrode 40B1 and is disposed on a portion of the first main face TS1 and the second main face TS2 on the side of the second end face LS2. The second side surface side external electrode 40B3 is connected to the second end surface side external electrode 40B1 and is disposed on the first side surface WS1 and a portion of the second side surface WS2 on the second end surface LS2 side. In this manner, the second external electrode 40B is formed to extend from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2, as well as a portion of the first side surface WS1 and a portion of the second side surface WS2.

[0036] As described above, in the laminate 10, the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 face each other via the dielectric layer 20, thereby forming a capacitance. Therefore, the characteristics of a capacitor are exhibited between the first external electrode 40A connected to the first internal electrode layer 31 and the second external electrode 40B connected to the second internal electrode layer 32.

[0037] The first external electrode 40A has a first base electrode layer 50A containing a metal component, a first conductive resin layer 60A disposed on the first base electrode layer 50A, and a first plating layer 70A disposed on the first conductive resin layer 60A.

[0038] The first base electrode layer 50A has a first end face side base electrode layer 50A1, a first main surface side base electrode layer 50A2, and a first side face side base electrode layer 50A3.

[0039] The first conductive resin layer 60A has a first end face side conductive resin layer 60A1, a first main surface side conductive resin layer 60A2, and a first side face side conductive resin layer 60A3.

[0040] The first plating layer 70A includes a first end face-side plating layer 70A1, a first main surface-side plating layer 70A2, and a first side face-side plating layer 70A3. The first plating layer 70A may also have a two-layer structure including a first Ni plating layer 71A as a lower plating layer and a first Sn plating layer 72A as an upper plating layer. The first Ni plating layer 71A includes a first end face-side Ni plating layer 71A1, a first main surface-side Ni plating layer 71A2, and a first side face-side Ni plating layer 71A3. The first Sn plating layer 72A includes a first end face-side Sn plating layer 72A1, a first main surface-side Sn plating layer 72A2, and a first side face-side Sn plating layer 72A3.

[0041] The second external electrode 40B has a second base electrode layer 50B containing a metal component, a second conductive resin layer 60B disposed on the second base electrode layer 50B, and a second plating layer 70B disposed on the second conductive resin layer 60B.

[0042] The second base electrode layer 50B has a second end face side base electrode layer 50B1, a second main surface side base electrode layer 50B2, and a second side face side base electrode layer 50B3.

[0043] The second conductive resin layer 60B has a second end face side conductive resin layer 60B1, a second main surface side conductive resin layer 60B2, and a second side face side conductive resin layer 60B3.

[0044] The second plating layer 70B includes a second end face side plating layer 70B1, a second main surface side plating layer 70B2, and a second side face side plating layer 70B3. The second plating layer 70B may also have a two-layer structure including a second Ni plating layer 71B as a lower plating layer and a second Sn plating layer 72B as an upper plating layer. The second Ni plating layer 71B includes a second end face side Ni plating layer 71B1, a second main surface side Ni plating layer 71B2, and a second side face side Ni plating layer 71B3. The second Sn plating layer 72B includes a second end face side Sn plating layer 72B1, a second main surface side Sn plating layer 72B2, and a second side face side Sn plating layer 72B3.

[0045] Here, the layers constituting the first external electrode 40A and the second external electrode 40B have the same basic configuration. The first external electrode 40A and the second external electrode 40B are generally symmetrical with respect to the LW cross section at the center of the longitudinal direction L of the multilayer ceramic capacitor 1. Therefore, when there is no need to particularly distinguish between the first external electrode 40A and the second external electrode 40B, the first external electrode 40A and the second external electrode 40B may be collectively referred to as the external electrodes 40. When there is no need to particularly distinguish between the first base electrode layer 50A and the second base electrode layer 50B, the first external electrode 40A and the second external electrode 40B may be collectively referred to as the base electrode layer 50. Furthermore, when there is no need to particularly distinguish between the first end surface side base electrode layer 50A1 and the second end surface side base electrode layer 50B1, the first end surface side base electrode layer 50A1 and the second end surface side base electrode layer 50B1 may be collectively referred to as the end surface side base electrode layer 501.

[0046] Furthermore, when it is not necessary to particularly distinguish between the first conductive resin layer 60A and the second conductive resin layer 60B, the first conductive resin layer 60A and the second conductive resin layer 60B may be collectively referred to as the conductive resin layer 60. Furthermore, when it is not necessary to particularly distinguish between the first end face side conductive resin layer 60A1 and the second end face side conductive resin layer 60B1, the first end face side conductive resin layer 60A1 and the second end face side conductive resin layer 60B1 may be collectively referred to as the end face side conductive resin layer 601.

[0047] Furthermore, when it is not necessary to particularly distinguish between the first plating layer 70A and the second plating layer 70B, the first plating layer 70A and the second plating layer 70B may be collectively referred to as plating layer 70. Furthermore, when it is not necessary to particularly distinguish between the first end surface side plating layer 70A1 and the second end surface side plating layer 70B1, the first end surface side plating layer 70A1 and the second end surface side plating layer 70B1 may be collectively referred to as end surface side plating layer 701. Furthermore, when it is not necessary to particularly distinguish between the first Ni plating layer 71A and the second Ni plating layer 71B, the first Ni plating layer 71A and the second Ni plating layer 71B may be collectively referred to as Ni plating layer 71. Furthermore, when it is not necessary to particularly distinguish between the first Sn plating layer 72A and the second Sn plating layer 72B, the first Sn plating layer 72A and the second Sn plating layer 72B may be collectively referred to as the Sn plating layer 72. When it is not necessary to particularly distinguish between the first end face side Ni plating layer 71A1 and the second end face side Ni plating layer 71B1, the first end face side Ni plating layer 71A1 and the second end face side Ni plating layer 71B1 may be collectively referred to as the end face side Ni plating layer 711. When it is not necessary to particularly distinguish between the first end face side Sn plating layer 72A1 and the second end face side Sn plating layer 72B1, the first end face side Sn plating layer 72A1 and the second end face side Sn plating layer 72B1 may be collectively referred to as the end face side Sn plating layer 721.

[0048] Furthermore, when there is no need to particularly distinguish between the first end face LS1 and the second end face LS2, the first end face LS1 and the second end face LS2 may be collectively referred to as end face LS.

[0049] Furthermore, when there is no need to particularly distinguish between the first main surface side outer layer portion 12A and the second main surface side outer layer portion 12B, the first main surface side outer layer portion 12A and the second main surface side outer layer portion 12B may be collectively referred to as the outer layer portion 12.

[0050] Next, a description will be given of the base electrode layer 50. The base electrode layer 50 has a first base electrode layer 50A and a second base electrode layer 50B.

[0051] The first base electrode layer 50A is disposed on the first end face LS1. The first base electrode layer 50A is connected to the first internal electrode layer 31. The first base electrode layer 50A may also be disposed on a portion of the first main surface TS1 and a portion of the second main surface TS2, and a portion of the first side surface WS1 and a portion of the second side surface WS2. In this embodiment, the first base electrode layer 50A is formed to extend from the first end face LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and a portion of the first side surface WS1 and a portion of the second side surface WS2. More specifically, the first base electrode layer 50A is arranged such that the above-mentioned first end face side base electrode layer 50A1 is arranged on the first end face LS1, the above-mentioned first main face side base electrode layer 50A2 is arranged so as to extend from the first end face LS1 to a portion of the first main face TS1 and a portion of the second main face TS2, and the above-mentioned first side face side base electrode layer 50A3 is arranged so as to extend from the first end face LS1 to a portion of the first side face WS1 and a portion of the second side face WS2.

[0052] The second base electrode layer 50B is disposed on the second end face LS2. The second base electrode layer 50B is connected to the second internal electrode layer 32. The second base electrode layer 50B may also be disposed on part of the first main surface TS1 and part of the second main surface TS2, and part of the first side surface WS1 and part of the second side surface WS2. In this embodiment, the second base electrode layer 50B is formed to extend from the second end face LS2 to part of the first main surface TS1 and part of the second main surface TS2, and part of the first side surface WS1 and part of the second side surface WS2. More specifically, the second base electrode layer 50B is arranged such that the above-mentioned second end face side base electrode layer 50B1 is arranged on the second end face LS2, the above-mentioned second main face side base electrode layer 50B2 is arranged so as to extend from the second end face LS2 to a portion of the first main face TS1 and a portion of the second main face TS2, and the above-mentioned second side face side base electrode layer 50B3 is arranged so as to extend from the second end face LS2 to a portion of the first side face WS1 and a portion of the second side face WS2.

[0053] The first base electrode layer 50A and the second base electrode layer 50B of this embodiment are firing layers. The firing layer preferably contains a metal component and either a glass component or a ceramic component, or both. This improves adhesion between the laminate 10 and the base electrode layer 50. The metal component includes at least one selected from, for example, Cu, Ni, Ag, Pd, an Ag-Pd alloy, and Au. The glass component includes at least one selected from, for example, B, Si, Ba, Mg, Al, and Li. The presence of a glass component can help sinter the metal component in the base electrode layer and promote sintering. The ceramic component may be the same ceramic material as that of the dielectric layer 20, or a different ceramic material. The ceramic component may include at least one selected from, for example, BaTiO3, CaTiO3, (Ba,Ca)TiO3, SrTiO3, CaZrO3, and the like.

[0054] The baked layer is formed by, for example, applying a conductive paste containing glass and metal to the laminate and baking it. The baked layer may be formed by simultaneously firing a laminated chip having internal electrode layers and a dielectric layer with a conductive paste applied to the laminated chip, or by simultaneously firing a laminated chip having internal electrode layers and a dielectric layer to obtain a laminate and then applying a conductive paste to the laminate and baking it. When simultaneously firing a laminated chip having internal electrode layers and a dielectric layer with a conductive paste applied to the laminated chip, it is preferable to form the baked layer by adding a ceramic material instead of a glass component and baking it. In this case, it is particularly preferable to use the same type of ceramic material as the dielectric layer 20 as the added ceramic material. The baked layer may be formed in multiple layers.

[0055] The thickness in the length direction of the first end face side base electrode layer 50A1 located on the first end face LS1 is preferably, for example, approximately 2 μm or more and 220 μm or less at the center of the first end face side base electrode layer 50A1 in the stacking direction T and width direction W. A more preferable range of the thickness in the length direction of the first end face side base electrode layer 50A1 is approximately 10 μm or more and 45 μm or less.

[0056] The thickness in the length direction of the second end face side base electrode layer 50B1 located on the second end face LS2 is preferably, for example, about 2 μm or more and 220 μm or less at the center of the second end face side base electrode layer 50B1 in the stacking direction T and width direction W. A more preferable range of the thickness in the length direction of the second end face side base electrode layer 50B1 is about 10 μm or more and 45 μm or less.

[0057] When the first base electrode layer 50A is provided on a portion of at least one of the first principal surface TS1 or the second principal surface TS2, the thickness in the stacking direction of the first principal surface-side base electrode layer 50A2 provided on this portion is preferably, for example, about 4 μm or more and 40 μm or less at the center of the first principal surface-side base electrode layer 50A2 provided on this portion in the length direction L and width direction W. A more preferable range of the thickness in the stacking direction of the first principal surface-side base electrode layer 50A2 is about 2 μm or more and 15 μm or less.

[0058] When the first base electrode layer 50A is provided on a portion of at least one of the first side surface WS1 or the second side surface WS2, the widthwise thickness of the first side surface side base electrode layer 50A3 provided on this portion is preferably, for example, about 4 μm or more and 40 μm or less at the center of the first side surface side base electrode layer 50A3 provided on this portion in the length direction L and the stacking direction T. A more preferable range of the widthwise thickness of the first side surface side base electrode layer 50A3 is about 2 μm or more and 15 μm or less.

[0059] When the second base electrode layer 50B is provided on a portion of at least one of the first principal surface TS1 or the second principal surface TS2, the thickness in the stacking direction of the second principal surface-side base electrode layer 50B2 provided on this portion is preferably, for example, about 4 μm or more and 40 μm or less at the center of the second principal surface-side base electrode layer 50B2 provided on this portion in the length direction L and width direction W. A more preferable range of the thickness in the stacking direction of the second principal surface-side base electrode layer 50B2 is about 2 μm or more and 15 μm or less.

[0060] When the second base electrode layer 50B is provided on a portion of at least one of the first side surface WS1 or the second side surface WS2, the widthwise thickness of the second side surface side base electrode layer 50B3 provided on this portion is preferably, for example, about 4 μm or more and 40 μm or less at the center of the second side surface side base electrode layer 50B3 provided on this portion in the length direction L and the stacking direction T. A more preferable range of the widthwise thickness of the second side surface side base electrode layer 50B3 is about 2 μm or more and 15 μm or less.

[0061] The external electrode 40 has a conductive resin layer 60 containing a resin component and a metal component disposed on the base electrode layer 50. The conductive resin layer 60 has a first conductive resin layer 60A and a second conductive resin layer 60B.

[0062] The first conductive resin layer 60A is disposed so as to cover the first base electrode layer 50A. Preferably, an end of the first conductive resin layer 60A is in contact with the laminate 10. The end of the first conductive resin layer 60A refers to a portion of the first conductive resin layer 60A that is closer to the second end face LS2 than the first base electrode layer 50A in the longitudinal direction L. In this embodiment, the first conductive resin layer 60A has the above-described first end face-side conductive resin layer 60A1 disposed on the first end face LS1, the above-described first main face-side conductive resin layer 60A2 disposed so as to extend from the first end face LS1 to a portion of the first main face TS1 and a portion of the second main face TS2, and the above-described first side face-side conductive resin layer 60A3 disposed so as to extend from the first end face LS1 to a portion of the first side face WS1 and a portion of the second side face WS2.

[0063] The second conductive resin layer 60B is disposed so as to cover the second base electrode layer 50B. Preferably, an end of the second conductive resin layer 60B is in contact with the laminate 10. The end of the second conductive resin layer 60B refers to a portion of the second conductive resin layer 60B that is closer to the first end face LS1 than the second base electrode layer 50B in the longitudinal direction L. In this embodiment, the second conductive resin layer 60B has the above-described second end face-side conductive resin layer 60B1 disposed on the second end face LS2, the above-described second main face-side conductive resin layer 60B2 disposed so as to extend from the second end face LS2 to a portion of the first main face TS1 and a portion of the second main face TS2, and the above-described second side face-side conductive resin layer 60B3 disposed so as to extend from the second end face LS2 to a portion of the first side face WS1 and a portion of the second side face WS2.

[0064] The longitudinal thickness of the first end face side conductive resin layer 60A1 located on the first end face LS1 side is preferably, for example, approximately 10 μm or more and 200 μm or less at the center of the first end face side conductive resin layer 60A1 in the stacking direction T and width direction W.

[0065] The longitudinal thickness of the second end face side conductive resin layer 60B1 located on the second end face LS2 side is preferably, for example, approximately 10 μm or more and 200 μm or less at the center of the second end face side conductive resin layer 60B1 in the stacking direction T and width direction W.

[0066] When the first conductive resin layer 60A is provided on a portion of the first main surface TS1 side and a portion of the second main surface TS2 side, the thickness in the stacking direction T of the first main surface side conductive resin layer 60A2 provided on this portion is preferably, for example, approximately 10 μm or more and 200 μm or less at the center in the length direction L and width direction W of the first main surface side conductive resin layer 60A2 provided on this portion.

[0067] When the first conductive resin layer 60A is provided on a portion of the first side surface WS1 side and a portion of the second side surface WS2 side, the thickness in the width direction W of the first side surface side conductive resin layer 60A3 provided on this portion is preferably, for example, approximately 10 μm or more and 200 μm or less at the center in the length direction L and stacking direction T of the first side surface side conductive resin layer 60A3 provided on this portion.

[0068] When the second conductive resin layer 60B is provided on a portion of the first main surface TS1 side and a portion of the second main surface TS2 side, the thickness in the stacking direction T of the second main surface side conductive resin layer 60B2 provided on this portion is preferably, for example, approximately 10 μm or more and 200 μm or less at the center in the length direction L and width direction W of the second main surface side conductive resin layer 60B2 provided on this portion.

[0069] When the second conductive resin layer 60B is provided on a portion of the first side surface WS1 side and a portion of the second side surface WS2 side, the thickness in the width direction W of the second side surface side conductive resin layer 60B3 provided on this portion is preferably, for example, approximately 10 μm or more and 200 μm or less at the center in the length direction L and stacking direction T of the second side surface side conductive resin layer 60B3 provided on this portion.

[0070] The conductive resin layer 60 is disposed on the base electrode layer 50. The internal structure of the conductive resin layer 60 will be described later in the description of the end face-side conductive resin layer 601. A plating layer 70 is disposed so as to cover the conductive resin layer 60. The plating layer 70 has a Ni plating layer 71 and a Sn plating layer 72.

[0071] The plating layer 70 includes a first plating layer 70A and a second plating layer 70B.

[0072] The first plating layer 70A is disposed so as to cover the first conductive resin layer 60A. In this embodiment, the first plating layer 70A is disposed so as to extend from the first end face LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and a portion of the first side surface WS1 and a portion of the second side surface WS2. More specifically, the first plating layer 70A is disposed such that the first end face-side plating layer 70A1 described above is disposed on the first end face LS1, the first main face-side plating layer 70A2 described above is disposed so as to extend from the first end face LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and the first side face-side plating layer 70A3 described above is disposed so as to extend from the first end face LS1 to a portion of the first side surface WS1 and a portion of the second side surface WS2.

[0073] The second plating layer 70B is disposed so as to cover the second conductive resin layer 60B. In this embodiment, the second plating layer 70B is disposed so as to extend from the first end face LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and a portion of the first side surface WS1 and a portion of the second side surface WS2. More specifically, the second plating layer 70B is disposed such that the second end face-side plating layer 70B1 described above is disposed on the second end face LS2, the second main face-side plating layer 70B2 described above is disposed so as to extend from the second end face LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and the second side face-side plating layer 70B3 described above is disposed so as to extend from the second end face LS2 to a portion of the first side surface WS1 and a portion of the second side surface WS2.

[0074] The plating layer 70 preferably has a two-layer structure of a Ni plating layer 71 and a Sn plating layer 72. A first Sn plating layer 72A is preferably disposed on the first Ni plating layer 71A, and a second Sn plating layer 72B is preferably disposed on the second Ni plating layer 71B. In this embodiment, the first end face-side Ni plating layer 71A1 and the first end face-side Sn plating layer 72A1 are disposed on the first end face LS1, the first main face-side Ni plating layer 71A2 and the first main face-side Sn plating layer 72A2 are disposed so as to extend from the first end face LS1 to a portion of the first main face TS1 and a portion of the second main face TS2, and the first side face-side Ni plating layer 71A3 and the first side face-side Sn plating layer 72A3 are disposed so as to extend from the first end face LS1 to a portion of the first side face WS1 and a portion of the second side face WS2. Similarly, the second end face side Ni plating layer 71B1 and the second end face side Sn plating layer 72B1 are arranged on the second end face LS2, the above-mentioned second main face side Ni plating layer 71B2 and the second main face side Sn plating layer 72B2 are arranged so as to extend from the second end face LS2 to a portion of the first main face TS1 and a portion of the second main face TS2, and the above-mentioned second side face side Ni plating layer 71B3 and the second side face side Sn plating layer 72B3 are arranged so as to extend from the second end face LS2 to a portion of the first side face WS1 and a portion of the second side face WS2.

[0075] The Ni plating layer 71 prevents the base electrode layer 50 and the conductive resin layer 60 from being eroded by solder when mounting the multilayer ceramic capacitor 1. The Sn plating layer 72 improves the wettability of the solder when mounting the multilayer ceramic capacitor 1, thereby facilitating the mounting of the multilayer ceramic capacitor 1.

[0076] The thickness of each of the first Ni plated layer 71A and the first Sn plated layer 72A is preferably 1 μm or more and 15 μm or less.

[0077] The thickness of each of the second Ni plated layer 71B and the second Sn plated layer 72B is preferably 1 μm or more and 15 μm or less.

[0078] 5 is an enlarged view of portion V of the multilayer ceramic capacitor 1 shown in FIG. 2, and is a schematic diagram illustrating the joint portion between the end face side base electrode layer 501 and the end face side conductive resin layer 601 of the multilayer ceramic capacitor 1. As described above, the first external electrode 40A and the second external electrode 40B have the same basic configuration, and therefore will be collectively described as the external electrode 40 using FIG. 5. The same applies to the other layers constituting the first external electrode 40A and the second external electrode 40B.

[0079] As described above, the external electrode 40 comprises an end face-side base electrode layer 501 arranged on the end face LS of the laminate 10, an end face-side conductive resin layer 601 arranged on the end face-side base electrode layer 501, and an end face-side plating layer 701 arranged on the end face-side conductive resin layer 601.

[0080] 5, the end face-side base electrode layer 501 is not formed continuously over the entire surface of the end face LS, but has discontinuous regions 54. The discontinuous regions 54 include one or more discontinuous regions 55 where the end face LS is exposed to the end face-side conductive resin layer 601.

[0081] The range in which the discontinuous regions 54 are formed in the end face-side base electrode layer 501 is not particularly limited, but they are formed in the region near the outer layer portion 12 of the inner layer portion 11 as shown in Fig. 5. In the example of Fig. 5, multiple discontinuous regions 55 are formed, and the proportion of the discontinuous regions 55 tends to increase as the distance gets closer to the outer layer portion 12.

[0082] The discontinuous region 54 may be formed in a region other than the vicinity of the outer layer portion 12 of the end face-side base electrode layer 501. For example, the discontinuous region 54 may be formed from the inner layer portion 11 to the outer layer portion 12, with the end face-side conductive resin layer 601 contacting the outer layer portion 12 in the discontinuous region 55. The discontinuous region 54 may be formed in the region of the inner layer portion 11 near the outer layer portion 12 and in the outer layer portion 12 on the end face LS of the laminate 10, but may not be formed in the central region of the inner layer portion 11 in the height direction. The region of the inner layer portion 11 near the outer layer portion 12 may extend in the height direction from the boundary between the inner layer portion 11 and the outer layer portion 12 toward the center of the inner layer portion 11 to a position that is 5% of the dimension of the inner layer portion 11 in the stacking direction T.

[0083] Moreover, in this embodiment, the end face-side base electrode layer 501 has an anchor portion 56 formed in a part of the portion adjacent to the interrupted region 55. The anchor portion 56 is configured to extend in the longitudinal direction of the laminate 10 from the portion that contacts the end face LS of the laminate 10, and then bend in a direction intersecting the longitudinal direction L. From the viewpoint of the anchor effect, the bending direction of the anchor portion 56 is preferably a direction approaching the end face LS.

[0084] The anchor portion 56 is a portion similar to an undercut in a resin molding technique that forms a space between the end face LS when viewed from the outside. In the length direction L, the end face-side conductive resin layer 601 fills the space formed between the anchor portion 56 of the end face-side base electrode layer 501 and the end face LS. While FIG. 5 illustrates the anchor portion 56 bending in the stacking direction T, which is the height direction, the bending direction of the anchor portion 56 is not limited to the stacking direction T. The bending direction of the anchor portion 56 may be any direction intersecting the length direction L, as long as it can form a space between the anchor portion 56 and the end face LS and the end face-side conductive resin layer 601 can fit in. For example, the anchor portion 56 may be formed to bend in the width direction W.

[0085] The end surface side conductive resin layer 601 disposed on the end surface side base electrode layer 501 contacts the end surface LS of the laminate 10 in the interrupted regions 54 of the end surface side base electrode layer 501. Depending on the position of the interrupted regions 54, the end surface side base electrode layer 501 may contact only the dielectric layer 20, or may contact both the dielectric layer 20 and the first lead portion 31B of the internal electrode layer 30. Depending on the shape of the interrupted regions 54, the end surface side base electrode layer 501 may contact only the first lead portion 31B of the internal electrode layer 30.

[0086] The following describes the internal structure of the end surface-side conductive resin layer 601. The main surface-side conductive resin layer 602 and the side surface-side conductive resin layer 603 also have the same internal structure as the end surface-side conductive resin layer 601. In other words, the internal structure of the end surface-side conductive resin layer 601 can also be said to be the internal structure of the conductive resin layer 60.

[0087] The end face side conductive resin layer 601 has a resin portion 61 and conductive fillers 62 dispersed in the resin portion 61 .

[0088] The resin portion 61 may contain at least one selected from various known thermosetting resins, such as epoxy resin, phenoxy resin, phenolic resin, urethane resin, silicone resin, and polyimide resin. Among these, epoxy resin is one of the most suitable resins, due to its excellent heat resistance, moisture resistance, and adhesion. Furthermore, the resin portion of the conductive resin layer 60 preferably contains a curing agent in addition to the thermosetting resin. When an epoxy resin is used as the base resin, the curing agent for the epoxy resin may be any of various known compounds, such as phenolic, amine, acid anhydride, imidazole, active ester, and amide-imide compounds.

[0089] The resin portion 61 may contain at least one selected from various known thermosetting resins, such as epoxy resin, phenoxy resin, phenolic resin, urethane resin, silicone resin, and polyimide resin. Among these, epoxy resin is one of the most suitable resins, due to its excellent heat resistance, moisture resistance, and adhesion. Furthermore, the resin portion of the conductive resin layer 60 preferably contains a curing agent in addition to the thermosetting resin. When an epoxy resin is used as the base resin, the curing agent for the epoxy resin may be any of various known compounds, such as phenolic, amine, acid anhydride, imidazole, active ester, and amide-imide compounds.

[0090] Because the end face-side conductive resin layer 601 includes such resin portion 61, it is more flexible than, for example, the base electrode layer 50 made of a plating film or a fired product of a metal component and a glass component. Therefore, even when the multilayer ceramic capacitor 1 is subjected to a physical impact or an impact due to a thermal cycle, the end face-side conductive resin layer 601 functions as a buffer layer. Therefore, the conductive resin layer 60 suppresses the occurrence of cracks in the multilayer ceramic capacitor 1.

[0091] The conductive fillers 62 are dispersed in a substantially uniform distribution within the resin portion. The conductive fillers are mainly responsible for the electrical conductivity of the conductive resin layer 60. Specifically, when multiple conductive fillers 62 come into contact with each other, an electrical path is formed within the end-face-side conductive resin layer 601, providing electrical continuity between the base electrode layer 50 and the plating layer 70.

[0092] The metal constituting the conductive filler 62 may be Ag alone, an alloy containing Ag, or a metal powder with an Ag coating on its surface. Ag has the lowest resistivity of all metals, making it suitable as an electrode material. Furthermore, Ag is a precious metal, so it is resistant to oxidation and highly weather-resistant. Therefore, Ag metal powder is suitable for the conductive filler 62. Furthermore, when using metal powder with an Ag coating on its surface, it is preferable to use Cu, Ni, Sn, Bi, or an alloy powder containing any of these metals as the metal powder.

[0093] Furthermore, the conductive filler 62 may be Cu or Ni that has been subjected to an anti-oxidation treatment. Alternatively, the conductive filler may be a metal powder whose surface is coated with Sn, Ni, or Cu. When using metal powder whose surface is coated with Sn, Ni, or Cu, the metal powder is preferably Ag, Cu, Ni, Sn, Bi, or an alloy powder thereof.

[0094] The shape of the conductive filler 62 is not particularly limited. The conductive filler 62 may be spherical, flat, or the like, but it is preferable to use a mixture of spherical metal powder and flat metal powder. Here, the spherical particles of the conductive filler 62 may include shapes that are not perfectly spherical, and may include, for example, shapes in which the ratio of the major axis to the minor axis (major axis / minor axis) is 1.45 or less. The flat particles of the conductive filler 62 refer to particles having a flat and elongated shape, and are not particularly limited, but may, for example, have a ratio of the major axis to the minor axis (major axis / minor axis) of 1.95 or more.

[0095] The average particle size of the conductive filler 62 may be, for example, 0.3 μm to 10 μm, and more preferably 1 μm to 8 μm. When the conductive filler 62 is flat, the average major axis diameter of the planar portion of the conductive filler 62 may be, for example, 2 μm to 10 μm, and more preferably 5 μm to 8 μm. When the conductive filler 62 is flat, the average minor axis diameter of the planar portion of the conductive filler 62 may be, for example, 0.3 μm to 3 μm, and more preferably 0.5 μm to 1 μm.

[0096] In this embodiment, a portion of the conductive filler 62 contained in the end face side conductive resin layer 601 contacts the end face LS in the discontinuous region 55. In this embodiment, a portion of the conductive filler 62 contacting the end face LS contacts the first lead portion 31B or the second lead portion 32B as the end of the internal electrode layer 30, and the end face side conductive resin layer 601 and the internal electrode layer 30 are directly connected. In addition, a portion of the conductive filler 62 also contacts the inner layer portion 11 exposed at the end face LS. In the discontinuous region 55, there is also a portion where the end face side conductive resin layer 601 contacts the end face LS of the laminate 10 but does not contact the end of the internal electrode layer 30.

[0097] The average particle diameter of the conductive filler 62 is preferably smaller than the thickness of the dielectric layer 20. This makes it easier for the conductive filler 62 to fill the discontinuous region 55 of the discontinuous region 54, increasing the probability of contact between the conductive filler 62 and the internal electrode layer 30. The average particle diameter of the conductive filler 62 may be larger than the thickness of the internal electrode layer 30 but smaller than the thickness of the dielectric layer 20. The conductive filler 62 preferably includes flat conductive fillers. When the conductive filler 62 includes flat conductive fillers, the average minor axis diameter of the planar portion of the conductive filler 62 is preferably smaller than the thickness of the dielectric layer 20. This makes it easier for the flat conductive fillers 62 to fill the discontinuous region 55 of the discontinuous region 54, increasing the probability of contact between the conductive filler 62 and the internal electrode layer 30. When the conductive filler 62 includes a flat conductive filler, the average minor axis diameter of the planar portion of the conductive filler 62 may be larger than the thickness dimension of the internal electrode layer 30 and smaller than the thickness dimension of the dielectric layer 20.

[0098] The average particle size of the conductive filler 62 is preferably smaller than the height dimension of the interrupted regions 55 of the interrupted regions 54. Furthermore, when the conductive filler 62 includes flat conductive fillers, the average minor axis diameter of the planar portions of the conductive filler 62 is preferably smaller than the height dimension of the interrupted regions 55 of the interrupted regions 54. This makes it easier for the conductive filler 62 to enter the interrupted regions 55 of the interrupted regions 54, increasing the probability of contact between the conductive filler 62 and the internal electrode layer 30.

[0099] Note that a portion of the conductive filler 62 contained in the end surface side conductive resin layer 601 may be in contact with the end of the anchor portion 56. This can improve electrical connectivity in a configuration in which the end surface side base electrode layer 501 has the discontinuous region 54.

[0100] If the lengthwise dimension of the multilayer ceramic capacitor 1 including the laminate 10 and the external electrodes 40 is defined as L, then the L dimension is preferably 0.2 mm or more and 10 mm or less. If the lengthwise dimension of the multilayer ceramic capacitor 1 in the stacking direction is defined as T, then the T dimension is preferably 0.1 mm or more and 10 mm or less. The widthwise dimension of the multilayer ceramic capacitor 1 is defined as W. The W dimension is preferably 0.1 mm or more and 10 mm or less.

[0101] Next, a method for measuring the average particle diameter of the conductive filler 62 in the end face side base electrode layer 501 and the end face side conductive resin layer 601 and a method for checking the contact state between the conductive filler 62 and the internal electrode layer 30 in this embodiment will be described.

[0102] First, the multilayer ceramic capacitor 1 is polished from the first side surface WS1 or the second side surface WS2 to a position halfway along the width direction W. This exposes the LT cross section at the center of the multilayer ceramic capacitor 1 in the width direction W. Next, the LT cross section exposed by polishing is observed using an SEM. Specifically, a portion of the LT cross section including the base electrode layer 50 is captured as a backscattered electron image. In the backscattered electron image, differences in the constituent elements are reflected as contrast. The magnification is set to 2000x, and the portion of the base electrode layer 50 in the backscattered electron image is the analysis range. The backscattered electron image acquisition position is set to include, for example, the end-side base electrode layer 501, the end-side conductive resin layer 601, the inner layer portion 11, and the outer layer portion 12, as shown in FIG. 5 .

[0103] The image analysis software "WinROOF (manufactured by Mitani Shoji Co., Ltd.)" binarizes the acquired backscattered electron image and identifies the conductive filler 62. The average particle diameter of the identified conductive filler 62 is measured, and the contact state between the conductive filler 62 and the internal electrode layer 30 in the discontinuous region 55 is confirmed.

[0104] Next, a method for manufacturing the multilayer ceramic capacitor 1 of this embodiment will be described. The method for manufacturing the multilayer ceramic capacitor 1 of this embodiment is not limited as long as it satisfies the above-mentioned requirements. However, a suitable manufacturing method includes the following steps. Each step will be described in detail below.

[0105] A dielectric sheet for the dielectric layer 20 and a conductive paste for the internal electrode layer 30 are prepared. The dielectric sheet and the conductive paste for the internal electrode contain a binder and a solvent. The binder and the solvent may be known.

[0106] On the dielectric sheets, a conductive paste for the internal electrode layers 30 is printed in a predetermined pattern by, for example, screen printing, gravure printing, etc. In this way, a dielectric sheet on which the pattern of the first internal electrode layer 31 is formed and a dielectric sheet on which the pattern of the second internal electrode layer 32 is formed are prepared.

[0107] A predetermined number of dielectric sheets without a printed internal electrode layer pattern are stacked to form a portion that will become the first main surface-side outer layer portion 12A on the first main surface TS1 side. A dielectric sheet with a printed first internal electrode layer pattern and a dielectric sheet with a printed second internal electrode layer pattern are stacked in this order on top of that to form a portion that will become the internal layer portion 11. A predetermined number of dielectric sheets without a printed internal electrode layer pattern are stacked on top of this portion that will become the internal layer portion 11 to form a portion that will become the second main surface-side outer layer portion 12B on the second main surface TS2 side. In this way, a laminated sheet is produced.

[0108] The laminated sheets are pressed in the lamination direction by means of a hydrostatic press or the like to produce a laminated block.

[0109] The laminated block is cut to a predetermined size to cut out laminated chips, and at this time, corners and ridges of the laminated chips may be rounded by barrel polishing or the like.

[0110] The laminated chip is fired to produce the laminate 10. The firing temperature depends on the materials of the dielectric layers 20 and the internal electrode layers 30, but is preferably 900°C or higher and 1400°C or lower.

[0111] A conductive paste that will become the base electrode layer 50 is applied to both end surfaces of the laminate 10. In this embodiment, the base electrode layer 50 is a baked layer. A conductive paste containing a glass component and a metal is applied to the laminate 10 by a method such as dipping. A baking process is then performed to form the base electrode layer 50. The temperature of the baking process at this time is preferably 700°C or higher and 950°C or lower.

[0112] In this embodiment, dipping is performed so that the first base electrode layer 50A extends from the first end face LS1 to parts of the first main surface TS1 and the second main surface TS2. Also, dipping is performed so that the second base electrode layer 50B extends from the second end face LS2 to parts of the first main surface TS1 and the second main surface TS2. At the same time, dipping is preferably performed so that the first base electrode layer 50A extends to parts of the first side surface WS1 and the second side surface WS2. Also, dipping is preferably performed so that the second base electrode layer 50B extends to parts of the first side surface WS1 and the second side surface WS2.

[0113] Here, by adjusting the amounts of binder and solvent contained in the conductive paste that will become the base electrode layer 50 and reducing the viscosity of the conductive paste, the thickness of the conductive paste applied to the laminate 10 can be reduced. Furthermore, by adjusting the amounts of binder and solvent contained in the conductive paste, the density of the metal components in the base electrode layer 50 after baking can be adjusted. This allows the base electrode layer 50 of this embodiment to be formed. After the conductive paste is applied to the laminate 10, the applied conductive paste can be brought into contact with a surface plate to remove excess conductive paste, thereby further reducing the thickness of the conductive paste applied to the end surface LS of the laminate 10.

[0114] The laminated chip before firing and the conductive paste applied to the laminated chip may be fired simultaneously. In this case, the fired layer is preferably formed by firing a material containing a ceramic material instead of a glass component. In this case, it is particularly preferable to use the same type of ceramic material as the dielectric layer 20 as the added ceramic material. In this case, the conductive paste is applied to the laminated chip before firing, and the laminated chip and the conductive paste applied to the laminated chip are fired simultaneously to form the laminate 10 with the fired layer.

[0115] Next, the conductive resin layer 60 is formed. The conductive resin layer 60 may be formed on the surface of the base electrode layer 50, or may be formed directly on the laminate 10. In this embodiment, the conductive resin layer 60 is formed on the surface of the base electrode layer 50.

[0116] First, a conductive resin paste is prepared by dispersing conductive fillers in a thermosetting resin as a base resin for the resin portion. This conductive resin paste is produced by stirring and mixing the thermosetting resin and conductive fillers. Therefore, the conductive fillers are uniformly dispersed within the conductive resin paste. Here, the thermosetting resin is, for example, an epoxy resin. The conductive filler is, for example, Ag metal powder.

[0117] In this embodiment, dipping is performed so that the first conductive resin layer 60A extends from the first end face LS1 to parts of the first main surface TS1 and the second main surface TS2. Furthermore, dipping is performed so that the second conductive resin layer 60B extends from the second end face LS2 to parts of the first main surface TS1 and the second main surface TS2. At the same time, dipping is preferably performed so that the first conductive resin layer 60A extends to parts of the first side face WS1 and the second side face WS2. Furthermore, dipping is preferably performed so that the second conductive resin layer 60B extends to parts of the first side face WS1 and the second side face WS2.

[0118] Thereafter, a plating layer 70 is formed on the surface of the conductive resin layer 60. In this embodiment, a Ni plating layer 71 and a Sn plating layer 72 are formed on the conductive resin layer 60. The Ni plating layer 71 and the Sn plating layer 72 are formed in this order using an electrolytic plating method. As the plating method, for example, barrel plating is preferably used.

[0119] Through the above manufacturing steps, the multilayer ceramic capacitor 1 is manufactured.

[0120] The multilayer ceramic capacitor 1 of this embodiment provides the following advantages.

[0121] In recent years, ceramic electronic components, such as multilayer ceramic capacitors, have come to be used in harsher environments than before. For example, electronic components used in mobile devices such as mobile phones and portable music players are required to be able to withstand shocks when dropped. Specifically, it is necessary to ensure that the electronic components do not fall off the mounting board or crack even when subjected to a drop shock.

[0122] Furthermore, electronic components used in automotive devices such as ECUs (Electronic Control Units) are required to withstand the impact of thermal cycles. Specifically, they must be able to withstand the bending stress generated by the thermal expansion and contraction of the mounting substrate during thermal cycles without peeling off the resin layer and the underlying electrode layer.

[0123] On the other hand, further thinning of the external electrodes is also required to miniaturize devices. However, in the case of multilayer ceramic electronic components such as those described in Patent Document 1, no technology is specified for thinning the electrodes while maintaining the bond between the base electrode layer and the conductive resin layer arranged on the end faces of the laminate.

[0124] In the present invention, in the discontinuous region 54 where the end face side base electrode layer 501 is discontinuous, the end face side conductive resin layer 601 contacts the ends of the dielectric layer 20 and the internal electrode layer 30 in the discontinuous region 55 where the end face side base electrode layer 501 is discontinuous. By the end face side conductive resin layer 601 penetrating the discontinuous region 55 of the end face side base electrode layer 501, a thin film is achieved that is necessary to form two layers, the end face side base electrode layer 501 and the end face side conductive resin layer 601, without reducing the bonding strength. In this embodiment, the contact between the conductive filler 62 of the end face side conductive resin layer 601 and the end of the internal electrode layer 30 also improves electrical connectivity.

[0125] (1) The multilayer ceramic capacitor 1 (multilayer ceramic electronic component 1) according to this embodiment includes a laminate 10 including a plurality of laminated dielectric layers 20 (ceramic layers 20), the laminate 10 having a first main surface TS1 and a second main surface TS2 facing in a stacking direction T, a first side surface WS1 and a second side surface WS2 facing in a width direction W perpendicular to the stacking direction T, and a first end surface LS1 and a second end surface LS2 facing in a length direction L perpendicular to the stacking direction T and the width direction W, and a first In a multilayer ceramic capacitor 1 having a first internal electrode layer 31 (first internal conductor layer 31) exposed at an end face LS1, a second internal electrode layer 32 (second internal conductor layer 32) arranged on a plurality of dielectric layers 20 and exposed at a second end face LS2, a first external electrode 40A arranged on the first end face LS1, and a second external electrode 40B arranged on the second end face LS2, a multilayer body 10 includes an inner layer portion 11 having the dielectric layers 20 and the first internal electrode layer 31 and the second internal electrode layer 32, and a second internal electrode portion 11 having a thickness in the height direction. The first external electrode 40A and the second external electrode 40B include an end face-side base electrode layer 501 arranged on the first end face LS1 and the second end face LS2, an end face-side conductive resin layer 601 arranged on the end face-side base electrode layer 501, and an end face-side plating layer 701 arranged on the end face-side conductive resin layer 601, and the end face-side base electrode layer 50 1 has an interrupted region 54 where the end surface side base electrode layer 501 exists intermittently at least in the region near the first main surface side outer layer portion 12A and the region near the second main surface side outer layer portion 12B of the inner layer portion 11, and in the interrupted region 55 (region 55) where the end surface side base electrode layer 501 is interrupted, the end surface side conductive resin layer 601 is in contact with the dielectric layer 20 and the first lead portion 31B (end portion 31B) of the first internal electrode layer 31 or the second lead portion 32B (end portion 32B) of the second internal electrode layer 32.

[0126] This makes it possible to provide a multilayer ceramic electronic component that allows the external electrodes 40 to be made thinner while ensuring the bonding between the internal electrode layers 30 and the external electrodes 40 .

[0127] (2) In the multilayer ceramic capacitor 1 of this embodiment, the conductive filler 62 (filler 62) of the end face side conductive resin layer 601 is in contact with the first lead portion 31B of the first internal electrode layer 31 or the second lead portion 32B of the second internal electrode layer 32.

[0128] This ensures electrical connectivity between the internal electrode layer 35 and the external electrode 40, and prevents the ESR from increasing.

[0129] (3) In the multilayer ceramic capacitor 1 of this embodiment, the end face-side base electrode layer 501 is located in a portion adjacent to the interrupted region 55 where the end face-side base electrode layer 501 is interrupted, and has an anchor portion 56 that extends in the longitudinal direction away from the end face and then bends toward the end face LS, and a portion of the end face-side conductive resin layer 601 is inserted between the anchor portion 56 and the end face LS.

[0130] This allows the anchor effect to further improve the bonding between the end face side base electrode layer 501 and the end face side conductive resin layer 601 .

[0131] (4) In the multilayer ceramic capacitor 1 of this embodiment, the discontinuous region 54 is formed from the inner layer portion 11 to the first main surface side outer layer portion 12A and from the inner layer portion 11 to the second main surface side outer layer portion 12B, and in the discontinuous region 55 where the end surface side base electrode layer 501 is interrupted, the end surface side conductive resin layer 601 is in contact with the first main surface side outer layer portion 12A or the second main surface side outer layer portion 12B.

[0132] This makes it possible to suppress the occurrence of cracks in the laminate 10 even when it is subjected to flexural stress. The flexural stress concentrates on the corners of the laminate 10 in addition to the ends of the external electrodes 40 on the main surfaces TS sides. By directly bonding the areas near the corners of the laminate 10 to the conductive resin layer, it is possible to suppress the occurrence of cracks in the laminate 10 even when it is subjected to flexural stress.

[0133] The configuration of the multilayer ceramic capacitor 1 is not limited to the configurations shown in Figures 1 to 5. For example, the multilayer ceramic capacitor 1 may be a multilayer ceramic capacitor having a double structure, a triple structure, or a quadruple structure as shown in Figures 6, 7, and 8.

[0134] The multilayer ceramic capacitor 1 shown in FIG. 6 is a double-structure multilayer ceramic capacitor 1, and includes, as the internal electrode layers 30, a first internal electrode layer 33, a second internal electrode layer 34, and a floating internal electrode layer 35 that is not extended to either the first end face LS1 or the second end face LS2. The multilayer ceramic capacitor 1 shown in FIG. 7 is a triple-structure multilayer ceramic capacitor 1, which includes a first floating internal electrode layer 35A and a second floating internal electrode layer 35B as the floating internal electrode layers 35. The multilayer ceramic capacitor 1 shown in FIG. 8 is a quadruple-structure multilayer ceramic capacitor 1, which includes a first floating internal electrode layer 35A, a second floating internal electrode layer 35B, and a third floating internal electrode layer 35C as the floating internal electrode layers 35. By providing the floating internal electrode layers 35 as the internal electrode layers 30 in this way, the multilayer ceramic capacitor 1 has a structure in which the opposing electrode portion is divided into multiple parts. As a result, multiple capacitor components are formed between the opposing internal electrode layers 30, and these capacitor components are connected in series. This reduces the voltage applied to each capacitor component, thereby achieving a high withstand voltage for the multilayer ceramic capacitor 1. It goes without saying that the multilayer ceramic capacitor 1 of this embodiment may have a multi-row structure of four or more rows.

[0135] The multilayer ceramic capacitor 1 may be a two-terminal type having two external electrodes, or may be a multi-terminal type having many external electrodes.

[0136] In the above-described embodiment, a multilayer ceramic capacitor in which the dielectric layers 20 made of a dielectric ceramic are used as ceramic layers has been exemplified as the multilayer ceramic electronic component. However, the multilayer ceramic electronic component of the present disclosure is not limited to this. For example, the ceramic electronic component of the present disclosure can also be applied to various multilayer ceramic electronic components, such as piezoelectric components using piezoelectric ceramic as ceramic layers, thermistors using semiconductor ceramic as ceramic layers, and inductors using magnetic ceramic as ceramic layers. Examples of piezoelectric ceramics include PZT (lead zirconate titanate) ceramics, examples of semiconductor ceramics include spinel ceramics, and examples of magnetic ceramics include ceramics such as ferrite.

[0137] The present invention is not limited to the configurations of the above-described embodiments, and can be appropriately modified and applied within the scope of the present invention. Note that the present invention also includes a combination of two or more of the individual desirable configurations described in the above-described embodiments.

[0138] <1> a laminate including a plurality of laminated ceramic layers and a plurality of internal conductor layers, the laminate having a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction; a first external electrode disposed on the first end surface; a second external electrode disposed on the second end surface; A multilayer ceramic electronic component having: The laminate is an inner layer portion having the ceramic layer and the inner conductor layer; a first outer layer portion and a second outer layer portion arranged to sandwich the inner layer portion in the height direction, The first external electrode and the second external electrode are an end face side base electrode layer; an end-face-side conductive resin layer disposed on the end-face-side base electrode layer; an end-side plating layer disposed on the end-side conductive resin layer, the end surface side base electrode layer has a discontinuous region where the end surface side base electrode layer is discontinuously present at least in a first outer layer portion vicinity region and a second outer layer portion vicinity region of the inner layer portion, In the region where the end face side base electrode layer is discontinued, the end face side conductive resin layer is in contact with the end portions of the ceramic layer and the internal conductor layer. <2> the filler of the end surface side conductive resin layer is in contact with the end of the internal conductor layer; <1> The multilayer ceramic electronic component according to claim 1. <3> The end face side base electrode layer is an anchor portion located in a portion adjacent to the region where the end face side base electrode layer is interrupted, extending in the length direction in a direction away from the end face and then bending toward the end face, The part of the end surface side conductive resin layer is The anchor portion is inserted between the end surface and the anchor portion. <1> or <2> The multilayer ceramic electronic component according to claim 1. <4> the discontinuous region is formed from the inner layer portion to the first outer layer portion and from the inner layer portion to the second outer layer portion, In the region where the end surface side base electrode layer is discontinued, the end surface side conductive resin layer is in contact with the first outer layer portion or the second outer layer portion. <1> from <3> 10. The multilayer ceramic electronic component according to claim 9. [Explanation of symbols]

[0139] 1. Multilayer ceramic capacitors (multilayer ceramic electronic components) 10 Laminate 20 Dielectric layer (ceramic layer) 30 Internal electrode layer (internal conductor layer) 31 First internal electrode layer (first internal conductor layer) 32 Second internal electrode layer (second internal conductor layer) 40A First outer electrode 40B Second external electrode 50A First base electrode layer 50B Second base electrode layer 54 Intermittent Region 55 Disrupted Areas 60A First conductive resin layer 60B Second conductive resin layer 70A First plating layer 70B Second plating layer T Height direction TS1 First principal surface TS2 Second principal surface W width direction WS1 First Aspect WS2 Second Aspect L lengthwise LS1 First end face LS2 Second end face

Claims

1. a laminate including a plurality of laminated ceramic layers and a plurality of internal conductor layers, the laminate having a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction; a first external electrode disposed on the first end surface; a second external electrode disposed on the second end surface; A multilayer ceramic electronic component having: The laminate is an inner layer portion having the ceramic layer and the inner conductor layer; a first outer layer portion and a second outer layer portion arranged to sandwich the inner layer portion in the height direction, The first external electrode and the second external electrode are an end face side base electrode layer; an end-face-side conductive resin layer disposed on the end-face-side base electrode layer; an end-side plating layer disposed on the end-side conductive resin layer, the end surface side base electrode layer has a discontinuous region in which the end surface side base electrode layer is present discontinuously at least in a first outer layer portion vicinity region and a second outer layer portion vicinity region of the inner layer portion, In the region where the end face side base electrode layer is discontinued, the end face side conductive resin layer is in contact with the end portions of the ceramic layer and the internal conductor layer.

2. the filler of the end surface side conductive resin layer is in contact with the end of the internal conductor layer; The multilayer ceramic electronic component according to claim 1 .

3. The end face side base electrode layer is an anchor portion located in a portion adjacent to the region where the end face side base electrode layer is interrupted, extending in the length direction in a direction away from the end face and then bending toward the end face, The part of the end surface side conductive resin layer is The anchor portion is inserted between the end surface and the anchor portion.

3. The multilayer ceramic electronic component according to claim 1 or 2.

4. the discontinuous region is formed from the inner layer portion to the first outer layer portion and from the inner layer portion to the second outer layer portion, the end surface side conductive resin layer is in contact with the first outer layer portion or the second outer layer portion in the region where the end surface side base electrode layer is discontinued; 3. The multilayer ceramic electronic component according to claim 1 or 2.

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