Information processing program, information processing method, and information processing device

Abstract

To enable the implementation of a commutable block circuit.SOLUTION: An information processing device 100 acquires a first set of Pauli operators 120, which is a set of first Pauli operators S_x acting on n qubits related to the target problem. The information processing device 100 generates a symmetric circuit 130 that commutes with all of the first Pauli operators S_x in the first set of Pauli operators 120. For the j-th second rotation gate included in the b-th block, the information processing device 100 determines the second generator G_j^b formed by the product of any first Pauli operator S_x and a first generator L_y selected for each block. The information processing device 100 determines a commutable block circuit 110 composed of B blocks, such that each second rotation gate included in each block possesses the determined second generator G_j^b.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an information processing program, an information processing method, and an information processing device. [Background technology]

[0002] Conventionally, there exist variational quantum algorithms that solve a target problem by optimizing the parameters of a specified quantum circuit that represents a cost function using the calculus of variations. Optimization is achieved, for example, by a gradient method that measures the gradient of the cost function and updates the parameters. A typical variational quantum model is, for example, the hardware-efficient Ansatz algorithm. However, these variational quantum models require a large processing cost for measuring the gradient when updating the parameters.

[0003] Prior art techniques for improving the efficiency of gradient measurement include, for example, commutative block circuits. Commutative block circuits are variational quantum models that can simultaneously measure derivatives with respect to multiple parameters by utilizing the commutativity of some quantum operations. It is desirable to use commutative block circuits to reduce the processing cost of parameter optimization. For example, there is a technique for determining the value of a coefficient used in each update process of a parameter applied to a variational quantum circuit used in VQE calculations to a value that periodically changes between values ​​higher and lower than a predetermined reference value as the number of updates increases. For example, there is a technique for determining whether to implement a circuit corresponding to each of multiple electronic excitations based on whether the initial value of a variable corresponding to the electronic excitation is equal to or higher than a predetermined threshold. For example, there is a technique for changing a first rotation angle applied to a rotation operation in a first quantum circuit for creating a wave function representing the electron orbitals of a molecule in accordance with a second rotation angle applied to a subcircuit representing a rotation operation in a second quantum circuit for converting the basis of the wave function. For example, there is a technique for implementing a quantum circuit configured to simulate a boundary operator that creates a boundary mapping of a predetermined graph having nodes. For example, there are techniques for generating quantum circuits from unitary coupled cluster ansatz, and for implementing unitary quantum gates on one or more qubits. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2023 / 243011 [Patent Document 2] International Publication No. 2023 / 175703 [Patent Document 3] International Publication No. 2023 / 148806 [Patent Document 4] US Patent Application Publication No. 2024 / 0037304 [Patent Document 5] US Patent Application Publication No. 2023 / 0237361 [Patent Document 6] US Patent Application Publication No. 2020 / 0364602 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the prior art, it is difficult to implement a commutative block circuit that makes it easy to measure the gradient of the cost function.

[0006] In one aspect, the present invention aims to enable the implementation of commutative block circuits. [Means for solving the problem]

[0007] According to one embodiment, an information processing program, an information processing method, and an information processing device are proposed that acquire a first Pauli operator set, which is a set of first Pauli operators formed by the product of multiple Pauli operators that are mutually commutative and independent and applied to quantum bits related to a target problem, generate a symmetric circuit that includes only first rotate gates having first generators that commute with the first Pauli operators for each first Pauli operator in the first Pauli operator set and that commutes with all first Pauli operators in the first Pauli operator set, and determine a commutative block circuit formed by the multiple blocks so that each second rotate gate of multiple second rotate gates included in each of a specified number of multiple blocks has a second generator formed by the product of any first Pauli operator in the acquired first Pauli operator set and a first generator of any first rotate gate selected for each of the blocks from the generated symmetric circuits. [Effects of the Invention]

[0008] According to one aspect, it is possible to enable commutative block circuits to be implemented. [Brief explanation of the drawings]

[0009] [Figure 1]FIG. 1 is an explanatory diagram illustrating an example of an information processing method according to an embodiment. [Figure 2] FIG. 2 is an explanatory diagram illustrating an example of an information processing system 200. As shown in FIG. [Figure 3] FIG. 3 is a block diagram showing an example of the hardware configuration of the information processing device 100. As shown in FIG. [Figure 4] FIG. 4 is a block diagram showing an example of the hardware configuration of the computing device 201. [Figure 5] FIG. 5 is a block diagram showing an example of the functional configuration of the information processing device 100. As shown in FIG. [Figure 6] FIG. 6 is an explanatory diagram showing the principle of determining a commutative block circuit. [Figure 7] FIG. 7 is an explanatory diagram showing an example of determining a commutative block circuit 710. In FIG. [Figure 8] FIG. 8 is an explanatory diagram (part 1) showing a specific example of determining the commutative block circuit 900. [Figure 9] FIG. 9 is an explanatory diagram (part 2) showing a specific example of determining the commutative block circuit 900. [Figure 10] FIG. 10 is an explanatory diagram (part 1) showing an example of the effect of the information processing device 100. [Figure 11] FIG. 11 is an explanatory diagram (part 2) showing an example of the effect achieved by the information processing device 100. [Figure 12] FIG. 12 is a flowchart illustrating an example of the overall processing procedure. [Figure 13] FIG. 13 is a flowchart illustrating an example of a design processing procedure. DETAILED DESCRIPTION OF THE INVENTION

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an information processing program, an information processing method, and an information processing device according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0011] (An example of an information processing method according to an embodiment) 1 is an explanatory diagram illustrating an example of an information processing method according to an embodiment. The information processing device 100 is a computer for determining specific contents of a commutative block circuit. The information processing device 100 is, for example, a server or a PC (Personal Computer). The commutative block circuit is a quantum circuit.

[0012] Conventionally, quantum computers that execute quantum circuits exist. Quantum computers are computers that utilize the principles of quantum mechanics and are expected to be able to solve specific problems quickly by utilizing quantum superposition states. Specific problems include, for example, prime factorization, search problems, or quantum dynamics calculations. Quantum computers are expected to be applied in fields such as drug discovery, material development, and finance.

[0013] Here, a variational quantum algorithm exists as one type of algorithm for solving specific problems based on quantum circuits. Specifically, a quantum computer and a classical computer work together to use the calculus of variations to optimize parameters of a specified quantum circuit that represents a cost function, thereby solving the target problem. The parameters are, for example, setting values ​​for quantum gates in the quantum circuit. The quantum gate is, for example, a rotation gate. Specifically, the parameters correspond to the rotation angle of the rotation gate.

[0014] Optimization is achieved, for example, by a gradient method that repeats a series of processes: measuring the gradient of a cost function and updating parameters. The gradient measurement is performed, for example, by a quantum computer. The updating is performed, for example, by a classical computer. Variational quantum algorithms are applied, for example, to quantum chemistry calculations, materials calculations, quantum machine learning, quantum combinatorial optimization, and the like.

[0015] Here, since the processing cost for gradient measurement is proportional to the number of parameters, the larger the problem scale and the number of parameters, the more difficult it tends to be to solve the problem using a variational quantum algorithm. Specifically, the larger the problem scale and the number of parameters, the larger the processing load, processing time, memory usage, etc. when optimizing the parameters tend to be, making it impossible to solve the problem within a practical time frame.

[0016] For this reason, it is desirable to employ a quantum circuit called a commutative block circuit as the prescribed quantum circuit representing the cost function, thereby making it easier to measure the gradient of the cost function and reducing the processing cost when optimizing the parameters. The commutative block circuit includes multiple blocks. The blocks include quantum gates. The quantum gates are, for example, rotation gates that represent rotation operations on quantum bits based on the X-axis, Y-axis, or Z-axis. Specifically, the blocks include rotation gates having generators that are Pauli operators. Specifically, the parameters correspond to the rotation angles of the rotation gates.

[0017] A commutative block circuit is a quantum circuit that satisfies certain conditions. Specifically, a commutative block circuit has the first condition that generators of different twiddle gates included in the same block all commute with each other. Specifically, a commutative block circuit has the second condition that, in any pair of different blocks, generators of twiddle gates included in one block all commute or all anticommutate with generators of twiddle gates included in the other block.

[0018] It is believed that a commutative block circuit can make it easier to measure the gradient of the cost function. In a commutative block circuit, when measuring the derivative with respect to the parameter of the rotation gate in order to measure the gradient of the cost function, a basis conversion operation is performed for each quantum bit, and therefore it is desirable to provide a basis conversion circuit.

[0019] For example, with a commutative block circuit, it is thought that in the last block, the derivative of a rotation gate with respect to a parameter can be made measurable by one type of quantum circuit including a basis conversion circuit.For example, with a commutative block circuit, it is thought that in blocks other than the last block, the derivative of a rotation gate with respect to a parameter can be made measurable by two types of quantum circuits, each including a basis conversion circuit.

[0020] Therefore, with the commutative block circuit, by preparing one or two types of quantum circuits including basis conversion circuits for each block, it becomes possible to measure the derivative with respect to the parameters of the rotation gate, and it becomes easier to measure the gradient of the cost function. For more information on commutative block circuits, see Reference 1 below.

[0021] Reference 1: Bowles, Joseph, David Wierichs, and Chae-Yeun Park. “Backpropagation scaling in parameterized quantum circuits.” arXiv preprint arXiv:2306.14962 (2023).

[0022] However, conventionally, it is difficult to implement a commutative block circuit that makes it easy to measure the gradient of the cost function. Specifically, it is not possible to determine what quantum gates each block should include so as to satisfy the first and second conditions, and it is therefore not possible to determine the commutative block circuit.

[0023] Therefore, in this embodiment, an information processing method that can implement a replaceable block circuit will be described.

[0024] In the following explanation, for convenience, a letter a with a subscript b attached may be written as "a_b." A letter a with a superscript c attached may be written as "a^c." A letter a with both a subscript b and a superscript c attached may be written as "a_b^c."

[0025] In FIG. 1, the information processing device 100 determines the specific contents of the commutative block circuit 110, thereby enabling the implementation of the commutative block circuit 110. As shown in FIG. 1, the commutative block circuit 110 includes B blocks. Each block includes d_b quantum gates. Specifically, the quantum gates are rotation gates. Specifically, the j-th quantum gate included in the b-th block has a generator G_j^b (j=1, 2, , d_b) which is a Pauli operator. Specifically, the j-th quantum gate included in the b-th block represents a rotation operation on a quantum bit indicated by e^(iθ_j^bG_j^b).

[0026] Furthermore, the unitary operator U of the entire quantum circuit is defined by the following formula (1). The unitary operator U_b of the b-th block is defined by the following formula (2). The commutative block circuit 110 has a first condition that generators of different quantum gates included in the same block all commute with each other. For this reason, it is desirable that the following formula (3) holds for the commutative block circuit 110. The commutative block circuit 110 has a second condition that, in any pair of different blocks, generators of quantum gates included in one block and generators of quantum gates included in the other block all commute or all anti-commutate. For this reason, it is desirable that the following formula (4) or formula (5) holds for the commutative block circuit 110.

[0027]

number

[0028]

number

[0029]

number

[0030]

number

[0031]

number

[0032] Below, using Figure 1, we will explain in detail how the information processing device 100 determines the generator G_j^b of the quantum gates included in each block and how it determines the specific contents of the commutative block circuit 110.

[0033] 1, information processing device 100 stores information related to a target problem. For example, information processing device 100 stores the total number n of quantum bits related to the target problem. For example, information processing device 100 stores an index that identifies each quantum bit of the n quantum bits related to the target problem. In the example of FIG. 1, the indexes are specifically q_1, q_2, . . . , q_n.

[0034] The information processing device 100 accepts a designation of the number B of blocks that form the replaceable block circuit 110. The information processing device 100 accepts a designation of the number B of blocks that form the replaceable block circuit 110, for example, based on an operational input from a user.

[0035] (1-1) The information processing device 100 acquires a first Pauli operator set 120, which is a set of first Pauli operators S_x applied to n quantum bits related to the target problem. Specifically, the first Pauli operator S_x is formed by the product of multiple Pauli operators that are mutually commutative and independent and applied to quantum bits related to the target problem. The Pauli operator represents, for example, the application of an X operator, a Y operator, a Z operator, or an I operator to one quantum bit. The I operator is the identity operator. x is, for example, 1, 2, , 2^s.

[0036] The information processing device 100 may acquire a first Pauli operator set 120 which is a set of less than 2^s first Pauli operators S_x according to the target problem. For example, when the target problem relates to a substance having Pauli symmetry, the information processing device 100 may acquire first Pauli operators S_j which are symmetry operators. In the example of FIG. 1, specifically, the information processing device 100 acquires the first Pauli operator set 120 which is a set of S_1=IIII, S_2=XXXX, S_3=YYYY, and S_4=ZZZZ, which are symmetry operators, respectively.

[0037] (1-2) The information processing device 100 generates a symmetric circuit 130 that commutes with all first Pauli operators S_x in the first Pauli operator set 120. The symmetric circuit 130 includes, for example, only first rotate gates having first generators L_y that commute with the first Pauli operator S_x, with respect to each first Pauli operator S_x in the first Pauli operator set. For a specific method of generating the symmetric circuit 130, reference can be made to Reference Document 2 below.

[0038] Reference 2: Gard, Bryan T., et al. “Efficient symmetry-preserving state preparation circuits for the variational quantum eigensolver algorithm.” npj Quantum Information 6.1 (2020): 10.

[0039] (1-3) The information processing device 100 determines a second generator G_j^b corresponding to each of the d_b second rotate gates included in each of the B blocks, based on the first Pauli operator set 120 and the symmetric circuit 130. The second generator G_j^b represents the content of an operation on a quantum bit.

[0040] The information processing device 100, for example, selects any one of the first Pauli operators S_x in the first Pauli operator set 120 for the second rotary gate in each block. Specifically, the information processing device 100 selects any one of the first Pauli operators S_x in the first Pauli operator set 120 that differs for each second rotary gate in each block. More specifically, the information processing device 100 selects the j-th first Pauli operator S_j in the first Pauli operator set 120 for the j-th second rotary gate in the first Pauli operator set 120 in each block. Here, the information processing device 100 does not have to select all of the first Pauli operators S_x in the first Pauli operator set 120 in each block, for example.

[0041] For example, the information processing device 100 selects, for each block, a first generator L_y possessed by any one of the first rotary gates in the symmetric circuit 130. Specifically, for each block, the information processing device 100 selects, for example, a first generator L_y possessed by any one of the first rotary gates in the symmetric circuit 130 that differs for each block. More specifically, for the b-th block, the information processing device 100 selects, for example, a first generator L_b possessed by the b-th first rotary gate in the symmetric circuit 130. Here, the information processing device 100 may, for example, select, for different blocks, a first generator L_b possessed by the same first rotary gate.

[0042] The information processing device 100 determines a second generator G_j^b formed by the product of the selected first Pauli operator S_x and the selected first generator L_y for the j-th second rotate gate included in the b-th block. Hereinafter, for simplification, the subscript b attached to the generator may be omitted. In the example of FIG. 1, specifically, for the j-th second rotate gate included in the b-th block, the information processing device 100 determines a generator G_j^b formed by the product of the j-th first Pauli operator S_j and the first generator L_b of the b-th first rotate gate.

[0043] The information processing device 100 determines the commutative block circuit 110 formed by B blocks so that each second rotary gate included in each block has the determined second generator. This allows the information processing device 100 to appropriately determine the second generator of the second rotary gate included in each block so as to satisfy the above-mentioned first and second conditions, and to appropriately determine the specific content of the commutative block circuit 110.

[0044] Therefore, the information processing device 100 can implement the commutative block circuit 110, making it easier to measure the gradient of the cost function. The information processing device 100 can reduce the processing cost when optimizing parameters, making it easier to solve the problem within a practical time frame. The processing cost includes the processing load, processing time, memory usage, etc. The cost function is defined by the following equation (6), for example, where the physical quantity to be measured is the Pauli operator P and the initial quantum state is |φ_0>.

[0045]

number

[0046] Here, by using the ancillary quantum bit, parameters whose generators commute or anti-commute with the physical quantity P in each block other than the last one can be measured simultaneously. Also, in the last block, parameters whose generators commute with the physical quantity P do not need to be measured. Therefore, by executing (2B-1) types of quantum circuits on the commutative block circuit 110, the information processing device 100 can make the gradient of the cost function measurable, and can reduce the processing cost when optimizing parameters.

[0047] Here, the case where the functions of the information processing device 100 are realized by a single computer has been described, but this is not limiting. For example, the functions of the information processing device 100 may be realized by cooperation of multiple computers. For example, the functions of the information processing device 100 may be realized on the cloud.

[0048] (An example of the information processing system 200) Next, an example of an information processing system 200 to which the information processing device 100 shown in FIG. 1 is applied will be described with reference to FIG.

[0049] 2 is an explanatory diagram showing an example of an information processing system 200. In FIG. 2, the information processing system 200 includes an information processing device 100, a computing device 201, and a client device 202.

[0050] In the information processing system 200, the information processing device 100 and the computing device 201 are connected via a wired or wireless network 210. The network 210 is, for example, a local area network (LAN), a wide area network (WAN), the Internet, etc. In the information processing system 200, the information processing device 100 and the client device 202 are connected via the wired or wireless network 210.

[0051] The information processing device 100 is a computer for determining a commutative block circuit. The information processing device 100, for example, acquires a processing request to solve a target problem. The processing request includes, for example, information about the target problem. Specifically, the information processing device 100 acquires the processing request by receiving the processing request from another computer. The other computer is, for example, a client device 202. Specifically, the information processing device 100 may acquire the processing request by accepting input of the processing request based on a user's operation input.

[0052] In response to a processing request, the information processing device 100 determines a commutative block circuit to be used when solving a target problem. Specific examples of the information processing device 100 determining a commutative block circuit will be described later with reference to FIGS. 5 to 11. The information processing device 100 may further determine a basis conversion circuit for blocks that form the determined commutative block circuit. The information processing device 100 transmits the determined commutative block circuit and the determined basis conversion circuit to the computing device 201. The information processing device 100 cooperates with the computing device 201 to solve the target problem according to a variational quantum algorithm, thereby obtaining a result of solving the target problem.

[0053] The information processing device 100 outputs the result of solving the target problem. For example, the information processing device 100 transmits the result of solving the target problem to another computer. The other computer is, for example, the client device 202. For example, the information processing device 100 may output the result of solving the target problem so that it can be referenced by a user. This allows the information processing device 100 to make the result of solving the target problem available externally. The information processing device 100 is, for example, a server or a PC.

[0054] The computing device 201 is a computer for performing quantum computation. The computing device 201 receives a commutative block circuit and a basis conversion circuit from the information processing device 100. The computing device 201 implements the received commutative block circuit and basis conversion circuit. The computing device 201 cooperates with the information processing device 100 and solves a target problem using the implemented commutative block circuit and basis conversion circuit according to a variational quantum algorithm. The computing device 201 may be, for example, a classical computer that runs a quantum simulator. In this case, the computing device 201 may be, for example, a server or a PC. The computing device 201 may also be, for example, an actual quantum computer.

[0055] The client device 202 is a computer used by a user who wishes to solve a target problem. The client device 202 generates a processing request requesting that the target problem be solved based on an operational input from the user, and transmits the processing request to the information processing device 100. The client device 202 receives the result of solving the target problem from the information processing device 100. The client device 202 outputs the result of solving the target problem so that the user can refer to it. The client device 202 is, for example, a PC, a tablet terminal, or a smartphone.

[0056] Here, the case where the information processing device 100 and the computing device 201 are different devices has been described, but this is not limiting. For example, the information processing device 100 may have the functions of the computing device 201 and operate as the computing device 201. Also, the case where the information processing device 100 and the client device 202 are different devices has been described, but this is not limiting. For example, the information processing device 100 may have the functions of the client device 202 and operate as the client device 202.

[0057] (Example of hardware configuration of information processing device 100) Next, an example of the hardware configuration of the information processing device 100 will be described with reference to FIG.

[0058] Fig. 3 is a block diagram showing an example of the hardware configuration of the information processing device 100. In Fig. 3, the information processing device 100 has a CPU (Central Processing Unit) 301, a memory 302, a network I / F (Interface) 303, a recording medium I / F 304, and a recording medium 305. Furthermore, each component is connected to each other by a bus 300.

[0059] Here, CPU 301 is responsible for overall control of information processing device 100. Memory 302 includes, for example, a read-only memory (ROM), a random access memory (RAM), and a flash ROM. Specifically, for example, the flash ROM or ROM stores various programs, and RAM is used as a work area for CPU 301. The programs stored in memory 302 are loaded into CPU 301, causing CPU 301 to execute coded processes.

[0060] The network I / F 303 is connected to the network 210 via a communication line, and is connected to other computers via the network 210. The network I / F 303 manages the internal interface with the network 210 and controls the input and output of data from other computers. The network I / F 303 is, for example, a modem or a LAN adapter.

[0061] The recording medium I / F 304 controls reading and writing of data from and to the recording medium 305 under the control of the CPU 301. The recording medium I / F 304 is, for example, a disk drive, a solid state drive (SSD), or a universal serial bus (USB) port. The recording medium 305 is a non-volatile memory that stores data written under the control of the recording medium I / F 304. The recording medium 305 is, for example, a disk, a semiconductor memory, or a USB memory. The recording medium 305 may be detachable from the information processing device 100.

[0062] In addition to the components described above, the information processing device 100 may also include, for example, a keyboard, a mouse, a display, a printer, a scanner, a microphone, a speaker, etc. The information processing device 100 may also include a plurality of recording medium I / Fs 304 and recording media 305. The information processing device 100 may also not include the recording medium I / Fs 304 and recording media 305.

[0063] (Example of hardware configuration of the computing device 201) When the computing device 201 is a classical computer that runs a quantum simulator, an example of the hardware configuration of the computing device 201 is specifically similar to the example of the hardware configuration of the information processing device 100 shown in Figure 3, so the description will be omitted.

[0064] On the other hand, there may be a case where the computing device 201 is an actual quantum computer. Here, an example of the hardware configuration of the computing device 201 when the computing device 201 is an actual quantum computer will be described with reference to FIG.

[0065] Fig. 4 is a block diagram showing an example of the hardware configuration of a computing device 201. In Fig. 4, the computing device 201 has a CPU 401, a memory 402, a network I / F 403, a recording medium I / F 404, and a recording medium 405. The computing device 201 further has a processing chassis I / F 406 and a processing chassis 407. Furthermore, each component is connected to each other by a bus 400.

[0066] Here, the CPU 401 is responsible for overall control of the computing device 201. The memory 402 includes, for example, a ROM, a RAM, and a flash ROM. Specifically, for example, the flash ROM and the ROM store various programs, and the RAM is used as a work area for the CPU 401. The programs stored in the memory 402 are loaded into the CPU 401, causing the CPU 401 to execute the coded processes.

[0067] The network I / F 403 is connected to the network 210 via a communication line, and is connected to other computers via the network 210. The network I / F 403 manages an internal interface with the network 210 and controls input and output of data from other computers. The network I / F 403 is, for example, a modem or a LAN adapter.

[0068] The recording medium I / F 404 controls reading / writing of data from / to the recording medium 405 under the control of the CPU 401. The recording medium I / F 404 is, for example, a disk drive, an SSD, a USB port, etc. The recording medium 405 is a non-volatile memory that stores data written under the control of the recording medium I / F 404. The recording medium 405 is, for example, a disk, a semiconductor memory, a USB memory, etc. The recording medium 405 may be detachable from the computing device 201.

[0069] The processing chassis I / F 406 controls access to the processing chassis 407 under the control of the CPU 401. The processing chassis I / F 406 converts an output signal from the CPU 401 into an input signal for the processing chassis 407 using a microwave pulse generator, and transmits the input signal to the processing chassis 407. The processing chassis I / F 406 converts an output signal from the processing chassis 407 into an input signal for the CPU 401 using a microwave pulse demodulator, and transmits the input signal to the CPU 401. The processing chassis 407 is a processing device that is cooled to a cryogenic temperature of 10 mK and is equipped with one or more quantum bit chips. The quantum bit chip represents, for example, a logical quantum bit. The processing chassis 407 performs a predetermined operation in response to an input signal using one or more quantum bit chips, and outputs an output signal corresponding to the result of the predetermined operation.

[0070] In addition to the components described above, computing device 201 may also include, for example, a keyboard, a mouse, a display, a printer, a scanner, a microphone, and a speaker. Furthermore, computing device 201 may also include a plurality of recording medium I / Fs 404 and recording media 405. Furthermore, computing device 201 may not include recording medium I / Fs 404 and recording media 405. Furthermore, the quantum bit chip in computing housing 407 may be controlled by a method other than microwaves. The quantum bit chip in computing housing 407 may implement, for example, optical quantum bits.

[0071] (Example of hardware configuration of client device 202) A specific example of the hardware configuration of the client device 202 is similar to the example of the hardware configuration of the information processing device 100 shown in FIG. 3, and therefore a description thereof will be omitted.

[0072] (Example of functional configuration of information processing device 100) Next, an example of the functional configuration of the information processing device 100 will be described with reference to FIG.

[0073] 5 is a block diagram showing an example of the functional configuration of the information processing device 100. The information processing device 100 includes a storage unit 500, an acquisition unit 501, a setting unit 502, a determination unit 503, an execution unit 504, and an output unit 505.

[0074] The storage unit 500 is realized by, for example, a storage area such as the memory 302 or the recording medium 305 shown in Fig. 3. In the following, a case where the storage unit 500 is included in the information processing device 100 will be described, but this is not limiting. For example, the storage unit 500 may be included in a device different from the information processing device 100, and the stored contents of the storage unit 500 may be accessible from the information processing device 100.

[0075] The acquisition unit 501 to the output unit 505 function as an example of a control unit. Specifically, the acquisition unit 501 to the output unit 505 realize their functions by causing the CPU 301 to execute a program stored in a storage area such as the memory 302 or the recording medium 305 shown in FIG. 3, or by the network I / F 303. The processing results of each functional unit are stored in a storage area such as the memory 302 or the recording medium 305 shown in FIG. 3, for example.

[0076] The storage unit 500 stores various information that is referred to or updated in the processing of each functional unit. The storage unit 500 stores, for example, information regarding the target problem. The information regarding the target problem includes, for example, the total number n of qubits regarding the target problem. The information regarding the target problem may include, for example, an index for identifying each of the n qubits regarding the target problem. The information regarding the target problem is acquired by the acquisition unit 501, for example. The information regarding the target problem may be set by the user in advance, for example.

[0077] The storage unit 500 stores, for example, the number s (s < n) of a plurality of specified Pauli operators that are mutually commutable and independent. The number s of the plurality of specified Pauli operators that are mutually commutable and independent is acquired by the acquisition unit 501, for example. The number s of the plurality of specified Pauli operators that are mutually commutable and independent may be set by the user in advance, for example.

[0078] The storage unit 500 stores, for example, the number B of specified blocks that form a target commutable block circuit to be determined by the determination unit 503. A block includes a rotation gate. A block may include, for example, a maximum of 2^s rotation gates. A rotation gate has a generator. The generator represents the content of an operation on a qubit. The number B of the specified blocks is acquired by the acquisition unit 501, for example. The number B of the specified blocks may be set by the user in advance, for example.

[0079] The storage unit 500 may store multiple reference Pauli operators. The multiple reference Pauli operators are mutually commutative and independent. Each reference Pauli operator acts on a quantum bit related to the target problem. Specifically, each reference Pauli operator may be a Pauli operator that applies a Z operator or an I operator to any of the quantum bits. The multiple reference Pauli operators are set by, for example, the setting unit 502.

[0080] The storage unit 500 stores a first Pauli operator set M_S. The first Pauli operator set M_S is a collection of a plurality of first Pauli operators S_j. In the first Pauli operator set M_S, the plurality of first Pauli operators S_j commute with each other. The first Pauli operator S_j is applied to a quantum bit related to the target problem. The first Pauli operator S_j is formed by a product of a plurality of normal Pauli operators. When the target problem relates to a substance having Pauli symmetry, the first Pauli operator S_j may be, for example, a symmetry operator. The first Pauli operator S_j corresponds to a stabilizer operator S_j, which will be described later with reference to FIGS. 5 to 11. The first Pauli operator set M_S is acquired by, for example, the acquiring unit 501. The first Pauli operator set M_S may be set by, for example, the setting unit 502.

[0081] The storage unit 500 stores a symmetric circuit U that commutes with all first Pauli operators S_j in the first Pauli operator set M_S. The symmetric circuit U includes, for example, only a first rotate gate having a first generator L_b that commutes with each first Pauli operator S_j in the first Pauli operator set M_S. The symmetric circuit U is set by, for example, the setting unit 502.

[0082] The acquisition unit 501 acquires various types of information used in processing by each functional unit. The acquisition unit 501 stores the acquired various types of information in the storage unit 500 or outputs it to each functional unit. The acquisition unit 501 may also output the various types of information stored in the storage unit 500 to each functional unit. The acquisition unit 501 acquires various types of information based on, for example, a user's operation input. The acquisition unit 501 may receive various types of information from, for example, a device different from the information processing device 100.

[0083] The acquiring unit 501 acquires, for example, a processing request. The processing request may, for example, request determining a commutative block circuit to be used in solving a target problem. The processing request may, for example, request solving the target problem. The processing request includes, for example, information related to the target problem. Specifically, the acquiring unit 501 acquires the processing request by accepting input of the processing request. Specifically, the acquiring unit 501 may acquire the processing request by receiving the processing request from another computer. The other computer is, for example, the client device 202. The acquiring unit 501 acquires the information related to the target problem by extracting it from the processing request.

[0084] The acquiring unit 501 acquires, for example, a first Pauli operator set M_S. Specifically, the acquiring unit 501 acquires the first Pauli operator set M_S by accepting an input of the first Pauli operator set M_S. Specifically, the acquiring unit 501 may acquire the first Pauli operator set M_S by receiving the first Pauli operator set M_S from another computer. The other computer is, for example, the client device 202. Specifically, the acquiring unit 501 may acquire a first Pauli operator S_j, which is a symmetry operator, when the target problem relates to a substance having Pauli symmetry.

[0085] The acquiring unit 501 may receive a start trigger for starting processing by one of the functional units. The start trigger may be, for example, a predetermined operation input by a user. The start trigger may be, for example, reception of predetermined information from another computer. The start trigger may be, for example, output of predetermined information by one of the functional units. The acquiring unit 501 receives, for example, acquisition of a processing request as a start trigger for starting processing by the setting unit 502 and the determining unit 503.

[0086] The setting unit 502 may acquire the first Pauli operator set M_S by setting the first Pauli operator set M_S based on, for example, the number s of specified mutually commutative and independent Pauli operators. Specifically, the setting unit 502 sets 2^s first Pauli operator sets M_S formed by the product of s mutually commutative and independent reference Pauli operators applied to quantum bits related to the target problem. In this way, the setting unit 502 can prepare the first Pauli operator set M_S as a guideline for determining the second generator of the second rotate gate included in the block forming the commutative block circuit.

[0087] The setting unit 502 acquires the symmetric circuit U by setting the symmetric circuit U based on, for example, the first Pauli operator set M_S. Specifically, the setting unit 502 sets the symmetric circuit U so that, for each first Pauli operator S_j in the first Pauli operator set M_S, the symmetric circuit U includes only a first rotate gate having a first generator L_b that commutes with the first Pauli operator S_j. In this way, the setting unit 502 can prepare the symmetric circuit U that serves as a guideline for determining the second generator of a rotate gate included in a block that forms a commutative block circuit.

[0088] The determination unit 503 determines a commutative block circuit based on the acquired first Pauli operator set M_S and the acquired symmetric circuit U. For example, the determination unit 503 selects, for each second rotate gate included in each block, one of the first Pauli operators S_j in the first Pauli operator set M_S. For example, the determination unit 503 selects, for each block of the B blocks, a first generator L_b included in one of the first rotate gates in the symmetric circuit U. For example, for each second rotate gate included in each block, the determination unit 503 determines a second generator G_j^b formed by the product of the first Pauli operator S_j selected for each second rotate gate and the second Pauli operator L_b selected for each block. For example, the determination unit 503 determines the commutative block circuit so that each second rotate gate included in each block has the determined second generator G_j^b.

[0089] Specifically, the determination unit 503 selects, for each second rotate gate included in each block, one of the first Pauli operators S_j from the first Pauli operator set M_S, which differs for each second rotate gate. Specifically, the determination unit 503 selects, for each of the B blocks, a first generator L_b included in one of the first rotate gates from the symmetric circuit U, which differs for each block. For example, the determination unit 503 determines, for each second rotate gate included in each block, a second generator G_j^b formed by the product of the first Pauli operator S_j selected for each second rotate gate and the second Pauli operator L_b selected for each block. For example, the determination unit 503 determines a commutative block circuit such that each second rotate gate included in each block has the determined second generator G_j^b.

[0090] More specifically, the determination unit 503 selects, for each second rotate gate included in each block, any one of the first Pauli operators S_j in the first Pauli operator set M_S that has the same order as the second rotate gate. Specifically, for each of the B blocks, the determination unit 503 selects a first generator L_b included in any one of the first rotate gates in the symmetric circuit U that has the same order as the block. For example, for each second rotate gate included in each block, the determination unit 503 determines a second generator G_j^b formed by the product of the first Pauli operator S_j selected for each second rotate gate and the second Pauli operator L_b selected for each block. For example, the determination unit 503 determines a commutative block circuit such that each second rotate gate included in each block has the determined second generator G_j^b. As a result, the determination unit 503 can appropriately determine the second generators of the second rotating gates included in each block so as to satisfy the first and second conditions described above, and can appropriately determine the specific contents of the commutative block circuit.

[0091] The execution unit 504 executes the variational calculus based on the commutative block circuit determined by the determination unit 503. For example, the execution unit 504 sets the commutative block circuit determined by the determination unit 503 as a variational quantum circuit. For example, the execution unit 504 sets the parameters of each second rotation gate of each block of the commutative block circuit set in the variational quantum circuit as variational parameters. For example, the execution unit 504 randomly initializes the variational parameters. For example, the execution unit 504 executes the variational quantum circuit, measures the gradient of the cost function, and updates the variational parameters based on the gradient of the cost function, repeatedly performing this series of processes until a termination condition is met. For example, the termination condition is that the value of the cost function converges. For example, the termination condition may be that the number of times the series of processes is repeated is equal to or greater than a certain number. This allows the execution unit 504 to optimize the variational parameters. The execution unit 504 can find a solution to the target problem based on the optimized variational parameters.

[0092] The output unit 505 outputs the processing result of at least one of the functional units. The output format is, for example, display on a display, printout to a printer, transmission to an external device via the network I / F 303, or storage in a storage area such as the memory 302 or the recording medium 305. In this way, the output unit 505 can notify the user of the processing result of at least one of the functional units, thereby improving the convenience of the information processing device 100.

[0093] The output unit 505 outputs, for example, the commutative block circuit determined by the determination unit 503. Specifically, the output unit 505 transmits the commutative block circuit determined by the determination unit 503 to another computer. The other computer is, for example, the computing device 201. Specifically, the output unit 505 may output the commutative block circuit determined by the determination unit 503 so that it can be referenced by a user. In this way, the output unit 505 can make the commutative block circuit externally implementable.

[0094] (Example of operation of information processing device 100) Next, an example of the operation of the information processing device 100 will be described with reference to Fig. 6 to Fig. 11. First, the principle of determining a commutative block circuit that satisfies various conditions will be described with reference to Fig. 6. The various conditions are the first and second conditions described above.

[0095] 6 is an explanatory diagram showing the principle of determining a commutative block circuit. As shown in FIG. 6, it is assumed that a stabilizer operator set M_S and a logical operator set M_L exist as subsets of a Pauli operator set 600.

[0096] The stabilizer operator set M_S includes 2^s stabilizer operators S_j (j=1, 2, . . . , 2^s), each formed by a product of s commutative and independent Pauli operators. j is an index. As shown in the following formula (7), in the stabilizer operator set M_S, the 2^s stabilizer operators S_j commute with each other. Furthermore, there may be cases where the number of stabilizer operators S_j is less than 2^s, for example.

[0097]

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[0098] The logical operator set M_L includes multiple logical operators L_b, where b is an index. As shown in the following formula (8), the logical operator L_b commutes with all stabilizer operators S_j in the stabilizer operator set M_S. In the logical operator set M_L, multiple logical operators L_b commute or anti-commutate with each other.

[0099]

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[0100] If such a stabilizer operator set M_S and a logical operator set M_L exist, it is possible to appropriately determine a commutative block circuit so as to satisfy various conditions. For example, if the information processing device 100 determines the generator of the j-th rotation gate of the b-th block to be G_j^b expressed by the following formula (9), it is possible to appropriately determine a commutative block circuit so as to satisfy various conditions. Specifically, the information processing device 100 may determine the generator of the j-th rotation gate of the b-th block to be the product of the j-th stabilizer operator S_j in the stabilizer operator set M_S and the b-th logical operator L_b in the logical operator set M_L.

[0101]

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[0102] The various conditions are the first condition and the second condition. The first condition is defined by the following formula (10). The first condition indicates that the generators of each of the multiple rotation gates included in each block that forms the commutative block circuit are all commutative.

[0103] The second condition is defined by the following formulas (11) and (12). The second condition indicates that the generators of rotation gates included in different blocks that form the commutative block circuit are commutative or anti-commutative. Specifically, if the logical operator L_b and the logical operator L_c are commutative, the following formula (11) holds. Furthermore, if the logical operator L_b and the logical operator L_c are anti-commutative, the following formula (12) holds.

[0104]

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[0105]

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[0106]

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[0107] As a result, the information processing device 100 can include up to 2^s rotation gates in one block. Therefore, the information processing device 100 can determine each block that forms a commutative block circuit so that derivatives with respect to up to 2^s parameters can be simultaneously measured using two types of quantum circuits, each including a basis transformation circuit. Therefore, the information processing device 100 can appropriately determine the commutative block circuit by appropriately setting the stabilizer operator set M_S and the logical operator set M_L.

[0108] 7 to 9, how the information processing device 100 sets the stabilizer operator set M_S and the logical operator set M_L will be described, and an example of determining the commutative block circuit 710 will be described. In the example of Fig. 7, it is assumed that the total number of quantum bits is n.

[0109] Fig. 7 is an explanatory diagram showing an example of determining a commutative block circuit 710. In Fig. 7, the information processing device 100 sets a stabilizer operator S_j formed by the product of s commutative and independent Pauli operators in accordance with the target problem, and sets a stabilizer operator set M_S which is a set of the stabilizer operators S_j.

[0110] There are, for example, 2^s stabilizer operators S_j. For example, when the target problem is a problem related to a substance having Pauli symmetry, the information processing device 100 may set the symmetry operator to the stabilizer operator S_j. In this case, the number of stabilizer operators S_j may be, for example, less than 2^s.

[0111] The information processing device 100 generates a symmetric circuit 700 that commutes with all stabilizer operators S_j in order to set a logical operator set M_L, which is a set of logical operators L_b. The symmetric circuit 700 includes only rotation gates having generators L_b that commute with the stabilizer operators S_j. The symmetric circuit 700 is defined by the following formulas (13) and (14).

[0112]

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[0113]

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[0114] For example, the information processing device 100 sets a logical operator set M_L, which is a set of logical operators L_b, by setting a generator L_b of any of the rotation gates in the symmetric circuit 700 to the logical operator L_b. This allows the information processing device 100 to set a stabilizer operator set M_S and a logical operator set M_L for determining the commutative block circuit 710, and makes the commutative block circuit 710 determinable.

[0115] For the j-th rotation gate of the b-th block, the information processing device 100 determines a generator G_j^b that is the product of the j-th first Pauli operator S_j in the first Pauli operator set M_S and the generator L_b that the b-th rotation gate has in the symmetric circuit 700. The information processing device 100 determines the commutative block circuit 710 so that the generator that the j-th rotation gate of the b-th block has becomes the determined generator G_j^b.

[0116] 7, the information processing device 100 determines the first block 1 so that the j-th rotation gate of the first block 1 has a generator G_j^1 which is the product of the j-th first Pauli operator S_j and the generator L_1 of the first rotation gate. The information processing device 100 determines the second block 1 so that the j-th rotation gate of the second block 2 has a generator G_j^2 which is the product of the j-th first Pauli operator S_j and the generator L_2 of the second rotation gate.

[0117] The information processing device 100 determines the third block 1 so that the j-th rotation gate of the third block 3 has a generator G_j^3 which is the product of the j-th first Pauli operator S_j and the generator L_3 of the third rotation gate. The information processing device 100 similarly determines the fourth and subsequent blocks b. The information processing device 100 determines the commutative block circuit 710 by concatenating the determined blocks b. This allows the information processing device 100 to appropriately determine the commutative block circuit so as to satisfy the first and second conditions. The commutative block circuit is defined by the following formulas (15) to (18).

[0118]

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[0119]

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[0120]

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[0121]

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[0122] Next, a specific example in which the information processing device 100 determines the commutative block circuit 900 will be described with reference to Fig. 8 and Fig. 9. In the examples of Fig. 8 and Fig. 9, it is assumed that the total number of quantum bits is four. It is also assumed that the target problem is a problem related to a material having Pauli symmetry. It is also assumed that the physical quantity to be measured is P = XXII.

[0123] 8 and 9 are explanatory diagrams showing a specific example of determining a commutative block circuit 900. In Fig. 8, the information processing device 100 sets S_1=IIII, S_2=XXXX, S_3=YYYY, and S_4=ZZZZ, which are symmetry operators, as stabilizer operators S_j, and sets a stabilizer operator set M_S. The information processing device 100 generates a symmetric circuit 800 based on the stabilizer operator set M_S.

[0124] The symmetric circuit 800 includes 12×d1 rotation gates. Here, when the symmetric circuit 800 is used to measure the derivatives with respect to each parameter, the derivatives with respect to the parameter are measured for each parameter. Therefore, when the symmetric circuit 800 is used to measure the derivatives with respect to each parameter, the number of quantum circuits prepared when measuring the gradient of the cost function is 12×d1. Therefore, the gradient measurement efficiency = number of parameters / number of quantum circuits prepared when measuring the gradient of the cost function = 1. Now, we move on to the explanation of FIG. 9.

[0125] In FIG. 9 , the information processing device 100 determines a commutative block circuit 900 by referring to the symmetric circuit 800. The commutative block circuit 900 includes 48×d2 rotation gates. Here, when the commutative block circuit 900 is used to measure the derivatives with respect to each parameter, the derivatives with respect to the parameters are measured for each block. Therefore, when the commutative block circuit 900 is used to measure the derivatives with respect to each parameter, the number of quantum circuits prepared when measuring the gradient of the cost function is 12×d2. Therefore, the gradient measurement efficiency = number of parameters / number of quantum circuits prepared when measuring the gradient of the cost function = 4. In this way, by determining the commutative block circuit 900, the information processing device 100 can quadruple the gradient measurement efficiency.

[0126] (Example of effect of information processing device 100) Next, an example of the effect achieved by the information processing device 100 will be described with reference to FIGS.

[0127] 10 and 11 are explanatory diagrams showing an example of the effect of the information processing device 100. In the example of FIGS. 10 and 11, the variational quantum circuit model U is defined by the following formula (19). The cost function C is defined by the following formula (20). For the cost function C, the following formulas (21) to (25) hold.

[0128]

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[0132]

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[0133]

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[0135] In FIG. 10, assume that the number of parameters is 48. Graph 1000 in FIG. 10 indicates whether Γ_j and Γ_k commute with respect to a symmetric circuit. Specifically, when Γ_j and Γ_k do not commute, this is indicated by dotted hatching. When Γ_j and Γ_k commute, this is indicated by diagonal hatching. On the other hand, graph 1010 in FIG. 10 indicates whether Γ_j and Γ_k commute with respect to a commutative block circuit. Specifically, when Γ_j and Γ_k do not commute, this is indicated by dotted hatching. When Γ_j and Γ_k commute, this is indicated by diagonal hatching. When Γ_j and Γ_k commute, the j-th component and the k-th component of the gradient can be measured simultaneously.

[0136] As shown in Figure 10, for symmetric circuits, Γ_j tends to commute only with itself. On the other hand, for commutative block circuits, Γ_j tends to commute with Γ_k in 4x4 blocks. Thus, commutative block circuits can be shown to quadruple the efficiency of gradient measurement. Next, we move on to the explanation of Figure 11.

[0137] Graph 1100 in Figure 11 illustrates the gradient measurement efficiency for different numbers of parameters. As shown in graph 1100, as the number of parameters increases, the gradient measurement efficiency for the symmetric circuit asymptotically approaches 1. As the number of parameters increases, the gradient measurement efficiency for the commutative block circuit asymptotically approaches 4. Thus, the commutative block circuit demonstrates a four-fold increase in gradient measurement efficiency.

[0138] As described above, the information processing device 100 can determine a commutative block circuit that enables efficient gradient measurement. The information processing device 100 can simultaneously measure derivatives with respect to up to 2^s parameters in the commutative block circuit using two types of quantum circuits including a basis transformation circuit. Therefore, the information processing device 100 can reduce the processing cost when optimizing parameters to solve a target problem, making it easier to solve the target problem within a practical timeframe. The processing cost can be the processing load, processing time, memory usage, or the like.

[0139] (Overall processing procedure) Next, an example of an overall processing procedure executed by the information processing device 100 will be described with reference to Fig. 12. The overall processing is realized by, for example, the CPU 301, storage areas such as the memory 302 and the recording medium 305, and the network I / F 303 shown in Fig. 3.

[0140] Fig. 12 is a flowchart showing an example of an overall processing procedure. In Fig. 12, the information processing device 100 designs a variational quantum circuit by executing a design process described later in Fig. 13 (step S1201). The information processing device 100 randomly initializes variational parameters (step S1202). The information processing device 100 measures the gradient of the cost function (step S1203).

[0141] The information processing apparatus 100 updates variational parameters (step S1204). The information processing apparatus 100 determines whether or not the value of the cost function has converged (step S1205). Here, if the value of the cost function has not converged (step S1205: No), the information processing apparatus 100 returns to the process of step S1203. On the other hand, if the value of the cost function has converged (step S1205: Yes), the information processing apparatus 100 ends the overall process.

[0142] (Design processing procedure) Next, an example of the design processing procedure executed by the information processing apparatus 100 will be described using FIG. 13. The design processing is realized, for example, by the CPU 301 shown in FIG. 3, storage areas such as the memory 302 and the recording medium 305, and the network I / F 303.

[0143] FIG. 13 is a flowchart showing an example of the design processing procedure. In FIG. 13, the information processing apparatus 100 acquires the number of blocks B and the number of stabilizer operators s (s < n) (step S1301). The information processing apparatus 100 selects all combinations of s commuting and independent Pauli operators (step S1302).

[0144] The information processing apparatus 100 sets 2^s stabilizer operators S_j formed by the product of s different selected combinations of Pauli operators, and sets the stabilizer operator set M_S = {S_j}_j = 1, 2, ···, 2^s (step S1303). The information processing apparatus 100 sets a symmetric circuit U that commutes with all the stabilizer operators S_j in M_S (step S1304).

[0145] The information processing apparatus 100 sets 1 to b (step S1305). The information processing apparatus 100 selects the generator L_b of the b-th rotation gate in the symmetric circuit U (step S1306). The information processing apparatus 100 sets 1 to j (step S1307).

[0146] The information processing device 100 selects the j-th stabilizer operator S_j in M_s (step S1308). The information processing device 100 determines the j-th quantum gate of the b-th block to be a rotation gate having a generator formed by the product of the selected S_j and the selected L_b (step S1309).

[0147] The information processing device 100 determines whether j≧2^s (step S1310). If j≧2^s is not true (step S1310: No), the information processing device 100 increments j (step S1311) and returns to the processing of step S1308. On the other hand, if j≧2^s is true (step S1310: Yes), the information processing device 100 proceeds to the processing of step S1312.

[0148] In step S1312, the information processing device 100 determines whether b≧B is true (step S1312). If b≧B is not true (step S1312: No), the information processing device 100 increments b (step S1313) and returns to the processing of step S1306. On the other hand, if b≧B is true (step S1312: Yes), the information processing device 100 ends the design processing. This allows the information processing device 100 to appropriately design a commutative block circuit that will be the variational quantum circuit so as to satisfy the first condition and the second condition described above.

[0149] As described above, the information processing device 100 can acquire a first Pauli operator set, which is a set of first Pauli operators formed by the product of multiple Pauli operators that are mutually commutative and independent. The information processing device 100 can generate a symmetric circuit that includes only first rotate gates having first generators that commute with the first Pauli operators for each first Pauli operator and that commutes with all first Pauli operators in the first Pauli operator set. The information processing device 100 can select a first generator of any first rotate gate in the symmetric circuit for each of a specified number of blocks. The information processing device 100 can select any first Pauli operator in the first Pauli operator set for each second rotate gate included in each of a specified number of blocks. The information processing device 100 can determine a second generator formed by the product of the selected first Pauli operator and the first generator of any of the selected first rotate gates for each second rotate gate included in each block. According to the information processing device 100, it is possible to determine a commutative block circuit formed by a plurality of blocks so that each second rotary gate included in each block has the determined second generator. As a result, the information processing device 100 can appropriately determine the commutative block circuit so as to satisfy the above-described first condition and the above-described second condition. The information processing device 100 can implement the commutative block circuit.

[0150] According to the information processing device 100, a different first Pauli operator can be selected for each second rotary gate in each block. According to the information processing device 100, for each second rotary gate included in each block, a second generator formed by the product of the selected first Pauli operator and the first generator of the selected first rotary gate can be determined. This allows the information processing device 100 to appropriately determine the second generator of the second rotary gate.

[0151] According to the information processing device 100, for each second rotate gate included in each block, it is possible to select any first Pauli operator in the first Pauli operator set that has the same order as the second rotate gate. According to the information processing device 100, for each block, it is possible to select a first generator that is included in any first rotate gate in the symmetric circuit that has the same order as the block. This allows the information processing device 100 to appropriately determine the second generator of the second rotate gate.

[0152] According to the information processing device 100, when a target problem relates to a substance having Pauli symmetry, a symmetry operator can be set as the first Pauli operator, thereby enabling the information processing device 100 to use an appropriate first Pauli operator in accordance with the target problem.

[0153] The information processing method described in this embodiment can be realized by executing a prepared program on a computer such as a PC or a workstation. The information processing program described in this embodiment is recorded on a computer-readable recording medium and executed by being read from the recording medium by the computer. The recording medium may be a hard disk, a flexible disk, a CD (Compact Disc)-ROM, an MO (Magneto Optical disc), a DVD (Digital Versatile Disc), or the like. The information processing program described in this embodiment may also be distributed via a network such as the Internet.

[0154] The following additional notes are provided regarding the above-described embodiment.

[0155] (Supplementary Note 1) Obtain a first Pauli operator set, which is a set of first Pauli operators formed by a product of a plurality of mutually commutative and independent Pauli operators applied to a quantum bit related to the target problem; generating a symmetric circuit that includes only first rotation gates having first generators that commute with each first Pauli operator in the first Pauli operator set, and that commutes with all first Pauli operators in the first Pauli operator set; determining a commutative block circuit formed by the plurality of blocks so that each second rotary gate of a plurality of second rotary gates included in each block of the plurality of blocks equal to the specified number has a second generator formed by a product of any one of the first Pauli operators in the acquired first Pauli operator set and a first generator of any one of the first rotary gates selected for each block in the generated symmetric circuit; An information processing program that causes a computer to execute a process.

[0156] (Appendix 2) The process of determining determining the commutative block circuit so that each of the second rotate gates included in each of the blocks has a second generator formed by a product of any one of the first Pauli operators in the first Pauli operator set, which differs for each of the second rotate gates, and a first generator of any one of the first rotate gates selected for each of the blocks in the symmetric circuit.

[0157] (Appendix 3) The process of determining determining the commutative block circuit such that each of the second rotate gates included in each of the blocks has a second generator formed by a product of any first Pauli operator in the first Pauli operator set that has the same order as the second rotate gate and a first generator of any first rotate gate in the symmetric circuit that has the same order as the block.

[0158] (Appendix 4) The information processing program according to appendix 3, wherein when the problem relates to a substance having Pauli symmetry, the first Pauli operator is a symmetry operator.

[0159] (Appendix 5) After initializing the parameters of the second rotary gates of the blocks of the determined commutative block circuit, the commutative block circuit is executed to measure the gradient of the cost function corresponding to the problem, and the parameters are updated based on the measured gradient. This series of processes is repeated until a termination condition is met. 5. The information processing program according to any one of claims 1 to 4, which causes the computer to execute the process.

[0160] (Appendix 6) Obtain a first Pauli operator set, which is a set of first Pauli operators formed by a product of a plurality of mutually commutative and independent Pauli operators applied to a quantum bit related to the problem of interest; generating a symmetric circuit that includes only first rotation gates having first generators that commute with each first Pauli operator in the first Pauli operator set, and that commutes with all first Pauli operators in the first Pauli operator set; determining a commutative block circuit formed by the plurality of blocks so that each second rotary gate of a plurality of second rotary gates included in each block of the plurality of blocks equal to the specified number has a second generator formed by a product of any one of the first Pauli operators in the acquired first Pauli operator set and a first generator of any one of the first rotary gates selected for each block in the generated symmetric circuit; An information processing method characterized in that the processing is executed by a computer.

[0161] (Appendix 7) Obtain a first Pauli operator set, which is a set of first Pauli operators formed by a product of a plurality of mutually commutative and independent Pauli operators applied to a quantum bit related to the problem of interest; generating a symmetric circuit that includes only first rotation gates having first generators that commute with each first Pauli operator in the first Pauli operator set, and that commutes with all first Pauli operators in the first Pauli operator set; determining a commutative block circuit formed by the plurality of blocks so that each second rotary gate of a plurality of second rotary gates included in each block of the plurality of blocks equal to the specified number has a second generator formed by a product of any one of the first Pauli operators in the acquired first Pauli operator set and a first generator of any one of the first rotary gates selected for each block in the generated symmetric circuit; An information processing device comprising a control unit. [Explanation of symbols]

[0162] 100 Information processing device 110,710,900 Commutative Block Circuits 120 1st Pauli operator set 130,700,800 symmetrical circuit 200 Information Processing Systems 201 Computing equipment 202 Client device 210 Network 300,400 buses 301,401 CPU 302,402 memory 303,403 Network I / F 304,404 Recording media I / F 305,405 Recording media 406 Calculation chassis I / F 407 Computing Case 500 storage section 501 Acquisition Department 502 Settings 503 Decision Section 504 Executive Department 505 Output section 600 Pauli operator set 1000,1010,1100 graph

Claims

1. obtaining a first Pauli operator set, which is a set of first Pauli operators formed by a product of a plurality of mutually commuting and independent Pauli operators applied to a qubit related to the problem of interest; generating a symmetric circuit that includes only first rotation gates having first generators that commute with each first Pauli operator in the first Pauli operator set, and that commutes with all first Pauli operators in the first Pauli operator set; determining a commutative block circuit formed by the plurality of blocks so that each second rotate gate of a plurality of second rotate gates included in each of the plurality of blocks equal to the specified number has a second generator formed by a product of any one of the first Pauli operators in the acquired first Pauli operator set and a first generator of any one of the first rotate gates selected for each of the blocks in the generated symmetric circuit; An information processing program that causes a computer to execute a process.

2. The determining process includes: The information processing program according to claim 1, wherein the commutative block circuit is determined so that each of the second rotate gates included in each of the blocks has a second generator formed by a product of any one of the first Pauli operators in the first Pauli operator set that differs for each of the second rotate gates and a first generator included in any one of the first rotate gates selected for each of the blocks in the symmetric circuit.

3. The determining process includes: The information processing program according to claim 2, wherein the commutative block circuit is determined so that each of the second rotate gates included in each of the blocks has a second generator formed by a product of any first Pauli operator in the first Pauli operator set that has the same order as the second rotate gate and a first generator of any first rotate gate in the symmetric circuit that has the same order as the block.

4. a series of processes, in which the parameters of the second rotary gates of the blocks of the determined commutative block circuit are initialized, the gradient of a cost function corresponding to the problem is measured by executing the commutative block circuit, and the parameters are updated based on the measured gradient, are repeatedly performed until a termination condition is satisfied; 4. The information processing program according to claim 1, which causes the computer to execute processing.

5. obtaining a first Pauli operator set, which is a set of first Pauli operators formed by a product of a plurality of mutually commuting and independent Pauli operators applied to a qubit related to the problem of interest; generating a symmetric circuit that includes only first rotation gates having first generators that commute with each first Pauli operator in the first Pauli operator set, and that commutes with all first Pauli operators in the first Pauli operator set; determining a commutative block circuit formed by the plurality of blocks so that each second rotate gate of a plurality of second rotate gates included in each of the plurality of blocks equal to the specified number has a second generator formed by a product of any one of the first Pauli operators in the acquired first Pauli operator set and a first generator of any one of the first rotate gates selected for each of the blocks in the generated symmetric circuit; An information processing method characterized in that the processing is executed by a computer.

6. obtaining a first Pauli operator set, which is a set of first Pauli operators formed by a product of a plurality of mutually commuting and independent Pauli operators applied to a qubit related to the problem of interest; generating a symmetric circuit that includes only first rotation gates having first generators that commute with each first Pauli operator in the first Pauli operator set, and that commutes with all first Pauli operators in the first Pauli operator set; determining a commutative block circuit formed by the plurality of blocks so that each second rotate gate of a plurality of second rotate gates included in each of the plurality of blocks equal to the specified number has a second generator formed by a product of any one of the first Pauli operators in the acquired first Pauli operator set and a first generator of any one of the first rotate gates selected for each of the blocks in the generated symmetric circuit; An information processing device comprising a control unit.

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