Game machine

Abstract

To provide a game machine that enables easy identification of anomaly causes.SOLUTION: A game machine includes a first controller that controls a game, and a second controller that can execute control different from those by the first controller. The second controller includes an information display capable of displaying information on the game machine. When detecting the occurrence of an anomaly, the first controller halts the progress of the game until power to the game machine is restored. The information display unit is capable of displaying anomaly information different from the base value of the game machine.SELECTED DRAWING: Figure 635

Description

[Technical Field]

[0001] The present invention relates to gaming machines such as pachinko gaming machines (generally also referred to as "pachinko machines") and slot machine gaming machines (generally also referred to as "pachislot machines"). [Background technology]

[0002] In recent gaming machines, complex game control has been required to enhance the enjoyment of the game. Accordingly, gaming machines have been proposed in which multiple control units each provide a corresponding function, thereby sharing the role of game control (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-159953 Summary of the Invention [Problem to be solved by the invention]

[0004] In the gaming machine disclosed in Patent Document 1, signals were sent and received between each control unit (control board), and the control unit performed control corresponding to the signals received. However, there was a risk that problems would arise such as it being difficult to identify the cause if an abnormality occurred in any of the control units.

[0005] The present invention has been made in consideration of the above circumstances, and aims to provide a gaming machine in which the cause of an abnormality can be easily identified. [Means for solving the problem]

[0006] A gaming machine having a first control unit that controls a game and a second control unit that can execute a control different from that of the first control unit, the first control unit includes a specific function activation means for activating a specific function that stops the progress of the game including the lottery when a predetermined count value that can be counted based on the establishment of a predetermined counting condition reaches a specific value; the second control unit includes information display means capable of displaying information about the gaming machine, When the specific function is activated, the first control unit stops execution of a process related to the progress of a game until a predetermined operation is performed, The second control unit continues control even when the progress of the game is stopped by the activation of the specific function, The information display means is capable of switching the display mode to display information different from information regarding the performance of the gaming machine when control by the second control unit continues even when the progress of the game has been stopped due to the activation of the specific function.

[0007] [Effects of the Invention]

[0008] According to one aspect of the present invention, the above-mentioned problem can be solved, and it becomes possible to easily identify the cause of an abnormality occurring in a gaming machine. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a front view of a pachinko machine according to an embodiment of the present invention. [Figure 2] FIG. 2 is a right side view of the pachinko machine. [Figure 3] FIG. 1 is a plan view of a pachinko machine. [Figure 4] FIG. 2 is a rear view of the pachinko machine. [Figure 5] This is a perspective view of a pachinko machine as seen from the front. [Figure 6] This is a perspective view of a pachinko machine seen from behind. [Figure 7] This is an oblique view of a pachinko machine seen from the front with the door frame open from the main frame and the main frame open from the outer frame. [Figure 8]This is an exploded oblique view of a pachinko machine disassembled into a door frame, a game board, a main body frame, and an outer frame, as seen from the front. [Figure 9] This is an exploded oblique view of a pachinko machine disassembled into a door frame, a game board, a main body frame, and an outer frame, viewed from the rear. [Figure 10] FIG. 2 is a front view showing an example of a game board. [Figure 11] This is an oblique view of the game board from the front right. [Figure 12] This is an oblique view of the game board from the front left. [Figure 13] This is a perspective view of the game board from behind. [Figure 14] This is an exploded perspective view of the game board, broken down into its main components, viewed from the front. [Figure 15] This is an exploded perspective view of the game board disassembled into its main components and viewed from behind. [Figure 16] This is a front view of the front components and front unit of the game board cut at approximately the center in the front-to-back direction within the game area. [Figure 17] FIG. 1 is a block diagram showing an outline of the control configuration of a pachinko machine. [Figure 18] FIG. 2 is a diagram showing the internal configuration of the main control MPU. [Figure 19] FIG. 2 is a diagram showing the configuration of an arithmetic circuit in the main control MPU. [Figure 20] FIG. 2 is a diagram illustrating a configuration of a serial communication circuit. [Figure 21] 10 is a flowchart illustrating an example of an initialization process. [Figure 22] 22 is a flowchart showing a continuation of the initialization process of FIG. 21. [Figure 23] 10 is a flowchart illustrating an example of a timer interrupt process. [Figure 24] 10 is a flowchart showing an example of a role-playing device ratio calculation and display process. [Figure 25] 25 is a flowchart showing the continuation of the role-playing device ratio calculation and display process of FIG. 24. [Figure 26] FIG. 2 is a diagram showing an example of the arrangement of programs (codes) and data stored in the ROM and RAM built into the main control MPU. [Figure 27] A diagram showing the structure of data stored in the area for calculating the bonus item ratio. [Figure 28] FIG. 10 is a diagram showing the configuration of a reel ratio display. [Figure 29] FIG. 2 is a diagram illustrating a configuration of a driver circuit. [Figure 30] FIG. 4 is a timing diagram of data input to a driver circuit. [Figure 31] FIG. 10 is a diagram illustrating an example of a main control board implementation. [Figure 32] This is a diagram showing the positional relationship between the main control MPU and the reel ratio display. [Figure 33] FIG. 10 is a diagram illustrating a load register selection table. [Figure 34] FIG. 10 is a diagram showing a character generator decode table. [Figure 35] FIG. 4 is a state transition diagram of a driver circuit. [Figure 36] FIG. 10 is a diagram showing an example of display of the role ratio. [Figure 37] FIG. 10 is a diagram showing an example of display of the role ratio. [Figure 38] FIG. 1 is a block diagram showing an outline of the control configuration of a pachinko machine. [Figure 39] 10 is a flowchart illustrating an example of a base calculation area update process. [Figure 40] 10 is a flowchart showing an example of a base calculation and display process. [Figure 41] A figure showing an example of the timing of updating the number of prize balls and the timing of calculating the base value. [Figure 42] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Figure 43] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Figure 44] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Figure 45] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Figure 46] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 47] 10 is a flowchart showing another example of the base calculation and display process. [Figure 48] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 49] 10 is a flowchart showing another example of the base calculation and display process. [Figure 50] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 51] 10 is a flowchart showing another example of the base calculation and display process. [Figure 52] FIG. 10 is a diagram illustrating a structure of data stored in a base calculation area. [Figure 53] FIG. 10 is a front view showing another example of a game board. [Figure 54] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 55] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 56] 10 is a flowchart showing another example of the base calculation and display process. [Figure 57] 10 is a flowchart showing another example of the base calculation and display process. [Figure 58] 10 is a flowchart showing another example of the base calculation and display process. [Figure 59] 10 is a flowchart showing another example of the base calculation and display process. [Figure 60] 10 is a flowchart showing an example of a process performed when a peripheral control unit is powered on; [Figure 61] 10 is a flowchart showing an example of a peripheral control unit V blank interrupt process. [Figure 62] 10 is a flowchart showing an example of a peripheral control unit 1 ms timer interrupt process. [Figure 63] 10 is a flowchart illustrating an example of a display selection process. [Figure 64]FIG. 10 is a diagram illustrating an example of a display selection table. [Figure 65] FIG. 10 is a diagram illustrating an example of a display selection table. [Figure 66] FIG. 10 is a diagram illustrating an example of a display selection table. [Figure 67] FIG. 10 is a diagram illustrating an example of a display selection table. [Figure 68] FIG. 10 is a diagram illustrating an example of a display selection table. [Figure 69] FIG. 10 is a diagram illustrating an example of a display screen. [Figure 70] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 71] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 72] 10 is a flowchart showing another example of the base calculation and display process. [Figure 73] 10 is a flowchart illustrating an example of a base calculation area update process. [Figure 74] 10 is a flowchart illustrating another example of the base calculation area update process. [Figure 75] 10 is a flowchart illustrating an example of a timer interrupt process. [Figure 76] 10 is a flowchart showing an example of a base calculation process 1. [Figure 77] 10 is a flowchart showing an example of a base calculation process 2. [Figure 78] 10 is a flowchart showing another example of the base calculation process 1. [Figure 79] 10 is a flowchart showing another example of the base calculation process 2. [Figure 80] 10 is a flowchart showing another example of the timer interrupt process. [Figure 81] 10 is a flowchart showing an example of a base calculation process 3. [Figure 82] 10 is a flowchart showing an example of a base calculation process 4. [Figure 83] 10 is a flowchart illustrating an example of a base display process. [Figure 84] 10 is a flowchart showing another example of the base calculation process 3. [Figure 85] 10 is a flowchart showing another example of the base calculation process 4. [Figure 86] 10 is a flowchart showing another example of the base display process. [Figure 87] FIG. 1 is a block diagram showing an outline of the control configuration of a pachinko machine. [Figure 88] FIG. 10 is a diagram showing the arrangement of the frame-side ejected ball sensor. [Figure 89] FIG. 10 is a diagram showing the arrangement of the frame-side ejected ball sensor. [Figure 90] A diagram showing an example of connection between the discharged ball sensor and the main control board. [Figure 91] FIG. 2 is a front view showing an example of a game board. [Figure 92] FIG. 2 is a diagram showing the configuration of a main control input circuit. [Figure 93] FIG. 10 is a diagram illustrating an example of a main control board implementation. [Figure 94] FIG. 10 is a diagram illustrating an example of a main control board implementation. [Figure 95] FIG. 10 is a diagram illustrating an example of a main control board implementation. [Figure 96] FIG. 2 is a diagram illustrating an example of the configuration of a main control I / O port. [Figure 97] FIG. 2 is a diagram illustrating an example of the configuration of a main control I / O port. [Figure 98] FIG. 98 is a timing diagram for the example configuration of the main control I / O port shown in FIG. 97. [Figure 99] FIG. 10 is a diagram showing changes in the state (section) for calculating the base value. [Figure 100] 10A and 10B are diagrams illustrating examples of characters displayed on a base display. [Figure 101] 10 is a flowchart illustrating an example of an initialization process. [Figure 102] 102 is a flowchart showing the continuation of the initialization process of FIG. 101. [Figure 103] FIG. 10 is a diagram showing the configuration of a base calculation area. [Figure 104]10 is a flowchart illustrating an example of a timer interrupt process. [Figure 105] 10 is a flowchart illustrating an example of a base calculation process. [Figure 106] 106 is a flowchart showing the continuation of the base calculation process of FIG. 105. [Figure 107] 10 is a flowchart illustrating an example of a base display data generation process. [Figure 108] 10 is a flowchart showing a modified example of the base calculation process. [Figure 109] FIG. 10 is a diagram showing the calculation of the base when the game state is switched. [Figure 110] FIG. 13 is a diagram showing the internal configuration of a main control MPU 1311, including a configuration relating to a storage area. [Figure 111] FIG. 10 is a diagram illustrating an example of a program for timer interrupt processing and base calculation processing. [Figure 112] FIG. 10 is a diagram illustrating an example of a program for timer interrupt processing and base calculation processing. [Figure 113] FIG. 2 is a diagram showing an example of the arrangement of programs (codes) and data stored in the ROM and RAM built into the main control MPU. [Figure 114] FIG. 10 is a diagram showing an example of a gaming history recorded in a gaming machine. [Figure 115] FIG. 10 is a diagram illustrating an example of an error screen. [Figure 116] FIG. 10 is a diagram illustrating an example of an error signal. [Figure 117] FIG. 10 illustrates an example of an error. [Figure 118] FIG. 10 illustrates an example of an error. [Figure 119] FIG. 10 illustrates an example of an error. [Figure 120] 10 is a flowchart showing an example of a peripheral control unit power-on process; [Figure 121] FIG. 10 is a diagram showing an example of a game history recording condition setting table. [Figure 122] FIG. 10 is a diagram showing an example of a gaming history. [Figure 123] FIG. 2 is a block diagram showing the configuration of a peripheral control board and its surroundings. [Figure 124] FIG. 2 is a block diagram showing the peripheral configuration of a peripheral control SRAM. [Figure 125] FIG. 10 is a diagram showing a modified example of the game history recording condition setting table. [Figure 126] FIG. 10 is a diagram showing a modified example of the gaming history. [Figure 127] FIG. 10 is a diagram showing a modified example of the gaming history. [Figure 128] FIG. 10 is a diagram showing a modified example of the gaming history. [Figure 129] 1 is a block diagram showing an outline of the control configuration of a pachinko machine having a setting unit. [Figure 130] This is an oblique view of a pachinko machine having a setting unit when viewed from behind with the door open. [Figure 131] This is an oblique view of the pachinko machine shown in Figure 130 when viewed from behind with the doors closed. [Figure 132] FIG. 131 is a diagram showing the setting section of the pachinko machine shown in FIG. [Figure 133] FIG. 10 is a diagram illustrating a modified example of the setting unit. [Figure 134] 1 is a block diagram showing an outline of the control configuration of a pachinko machine having a setting unit. [Figure 135] This is an oblique view of a game board having a setting section seen from behind. [Figure 136] This is an oblique view from behind of a pachinko machine equipped with the game board shown in Figure 135. [Figure 137] 10 is a flowchart illustrating an example of an initialization process. [Figure 138] 10 is a flowchart illustrating an example of a setting change process and a setting display process. [Figure 139] 10 is a flowchart illustrating an example of a setting change process and a setting display process. [Figure 140] 10 is a flowchart showing an example of a procedure for processing special symbols and special electric devices for controlling the same. [Figure 141] 10 is a flowchart showing an example of a procedure for waiting for a special symbol change. [Figure 142] 10 is a flowchart showing an example of the procedure for setting a special symbol variation pattern. [Figure 143] 10 is a flowchart showing an example of a procedure for a variation pattern selection determination process. [Figure 144] (A) is an example of a variation pattern table that is selected when the game state is normal and the result of the special lottery is a miss. (B) is an example of a variation pattern table that is selected when the game state is normal and the result of the special lottery is a jackpot. [Figure 145] This is a schematic diagram showing an example of the effect executed in miss fluctuation patterns 20 and 24 to 29 in the fluctuation pattern table of Figure 144 (A). [Figure 146] This is an overview diagram showing an example of a presentation executed in miss variation patterns 1, 2, and 30 in the variation pattern table of Figure 144(A). [Figure 147] This is an overview diagram showing an example of the presentation executed in miss fluctuation pattern 31 and hit fluctuation pattern 34 in the fluctuation pattern table of Figure 144 (A). [Figure 148] This is an overview diagram showing an example of the presentation executed in the miss fluctuation pattern 32 and the hit fluctuation pattern 35 in the fluctuation pattern table of Figure 144 (A). [Figure 149] (A) is an example of a variation pattern table that is selected when the game state is in the time-saving state and the result of the special lottery is a miss. (B) is an example of a variation pattern table that is selected when the game state is in the time-saving state and the result of the special lottery is a jackpot. [Figure 150] FIG. 10 is a diagram illustrating an example of a main control board implementation. [Figure 151] FIG. 10 is a diagram showing another implementation example of the main control board. [Figure 152] This is a cross-sectional view taken along line AA' in Figure 151(B). [Figure 153] FIG. 10 is a diagram showing another implementation example of the main control board. [Fig. 154] 10 is a flowchart illustrating an example of an initialization process. [Figure 155] 10 is a flowchart illustrating an example of a timer interrupt process. [Figure 156] 10 is a flowchart illustrating an example of a setting confirmation process. [Figure 157] FIG. 10 is a timing diagram of a security signal. [Figure 158] 10 is a flowchart showing another example 4942 of the initialization process. [Figure 159] 10 is a flowchart showing another example of the setting confirmation process. [Figure 160] 10 is another example of a fluctuation pattern table. [Figure 161] 10 is an example of a final reserved color table. [Figure 162] This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 1 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. [Figure 163] This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 3 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. [Fig. 164] This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 5 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. [Figure 165] 10 is an example of a preview performance table. [Figure 166] 10 is an example of a dialogue production table. [Figure 167] This is another example of a preview performance table. [Figure 168] 10 is an example of a setting suggestion presentation table. [Figure 169] An explanatory diagram showing an example of an overview of the setting suggestion presentation. [Figure 170] An explanatory diagram showing an example of an outline of a setting suggestion effect as a pre-reading effect. [Figure 171](A) is an example of a performance restriction table in the setting confirmation mode, and (B) is an example of a performance restriction table when an error occurs. [Fig. 172] 10 is an example of a new start winning effect restriction table. [Figure 173] 1 is an example of a processing table 1. [Fig. 174] 10 is an example of a processing table 2. [Figure 175] 10 is an example of a processing table 3. [Figure 176] 10 is an example of a processing table 4. [Figure 177] 10 is an example of a processing table 5. [Figure 178] 10 is an example of a processing table 6. [Figure 179] 10 is a flowchart of a power-on process in a first modification. [Figure 180] 10 is a flowchart of a power-on process in a first modification. [Figure 181] 10 is a flowchart of a timer interrupt process according to a first modification; [Figure 182] 10 is a flowchart of a timer interrupt process according to a first modification; [Figure 183] 10 is a flowchart of a performance display process according to a first modified example. [Figure 184] FIG. 10 is a diagram showing a notification mode of a first modified example. [Figure 185] FIG. 10 is a diagram illustrating notification priorities in a first modified example. [Figure 186] 10 is a flowchart of a power-on process in a first modification. [Figure 187] 10 is a flowchart of a power-on process in a first modification. [Figure 188] 10 is a flowchart of a main process on the main control side in the first modification example. [Figure 189] 10 is a flowchart of an initialization process when a RAM abnormality occurs according to a first modification. [Figure 190] 10 is a flowchart of a timer interrupt process according to a first modification; [Figure 191] 10 is a flowchart of a timer interrupt process according to a first modification; [Figure 192]10 is a flowchart of a setting process in a first modified example. [Figure 193] 10 is a flowchart of a setting display process of a first modified example. [Figure 194] 10 is a flowchart of a power-on setting process according to a first modified example. [Figure 195] 10 is a flowchart of a random number update process 2 in the first modification example. [Figure 196] 10 is a flowchart of a timer interrupt process according to a first modification; [Figure 197] 10 is a flowchart of a switch input process 1 according to a first modification. [Figure 198] FIG. 198(A) is a diagram showing an example of the configuration of the switch winning information data table of Alternative Example 1, and FIG. 198(B) is a diagram showing an example of the configuration of the switch input level / edge data area of ​​Alternative Example 1. [Figure 199] Figure 199(A) is a diagram showing another example of the configuration of the switch winning information data table of Alternative Example 1, and Figure 199(B) is a diagram showing another example of the configuration of the switch input level / edge data area of ​​Alternative Example 1. [Figure 200] 10 is a flowchart of a setting change / confirmation process in a first modified example. [Figure 201] 201(A) is a diagram showing an example of the configuration of a switch input port 2 in the first modified example, and FIG. 201(B) is a diagram showing an example of the configuration of a setting status management area in the first modified example. [Figure 202] Figure 202(A) is a diagram showing an example of the configuration of a power-on operation command for alternative example 1, Figure 202(B) is a diagram showing an example of the configuration of a power-on state command for alternative example 1, Figure 202(C) is a diagram showing an example of the configuration of a power-on return destination command for alternative example 1, and Figure 202(D) is a diagram showing an example of the configuration of a setting value command for alternative example 1. [Figure 203] FIG. 10 is a diagram illustrating a command transmission sequence in a first modified example. [Figure 204] FIG. 10 is a diagram showing state transitions of a setting state management area in a first modified example. [Figure 205] 10 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Figure 206]10 is a time chart from the start to the end of a setting confirmation mode in a first modified example. [Figure 207] 10 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Figure 208] 10 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Figure 209] 10 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Figure 210] A figure showing an example of the configuration of a jackpot determination threshold table in Alternative Example 1. [Figure 211] A figure showing an example of the configuration of a jackpot determination threshold table in Alternative Example 1. [Figure 212] A figure showing an example of the configuration of a jackpot determination threshold table in Alternative Example 1. [Figure 213] 10 is a flowchart of a power-on process in a second modification. [Figure 214] 10 is a flowchart of a power-on process in a second modification. [Figure 215] 10 is a flowchart of a setting value confirmation process in a second modification; [Figure 216] 10 is a flowchart of the RAM outside the game area confirmation process when power is turned on in Alternative Example 2. [Figure 217] 10 is a flowchart of processing when an abnormality occurs in RAM outside the game area in Alternative Example 2. [Figure 218] 13 is a flowchart of an out-of-use area RWM initialization process in a second modification; [Figure 219] 10 is a flowchart of a power-on setting process according to a second modification; [Figure 220] Figure 220(A) is a diagram showing an example of the configuration of the setting status management area of ​​Alternative Example 2, Figure 220(B) is a diagram showing an example of the configuration of the power-on operation command of Alternative Example 2, and Figure 220(C) is a diagram showing an example of the configuration of the power-on status command of Alternative Example 2. [Figure 221] 10 is a flowchart of the main process on the main control side in the second modification. [Figure 222] 10 is a flowchart of a process when the power is turned off in a second modification. [Figure 223]10 is a flowchart of a timer interrupt process according to a second modification. [Figure 224] 10 is a flowchart of a setting process in a second modification. [Figure 225] 10 is a flowchart of a setting display process in a second modification. [Figure 226] 11 is a flowchart of a power-on process in a third modification. [Figure 227] 11 is a flowchart of a power-on process in a third modification. [Figure 228] 10 is a flowchart of the main processing on the main control side in Modification Example 3. [Figure 229] 13 is a flowchart of a timer interrupt process for a setting change process in a third modified example. [Figure 230] 13 is a flowchart of a timer interrupt process for normal play in Alternative Example 3. [Figure 231] 10 is a flowchart of the main processing on the main control side in Modification Example 4. [Figure 232] 13 is a flowchart of a timer interrupt process for a setting change process in a fourth modified example. [Figure 233] This is an exploded oblique view of the center role device and front performance unit of the front unit of the game board, viewed from the front. [Figure 234] This is a front view showing the first pattern illuminated on the front performance unit. [Figure 235] A front view showing the second image illuminated on the front performance unit. [Figure 236] 1A and 1B are diagrams illustrating the structure of a light guide plate. [Figure 237] 10A and 10B are diagrams illustrating the structure of a reflecting portion provided on a light guide plate. [Figure 238] 10A and 10B are diagrams illustrating the structure of a reflecting portion provided on a light guide plate. [Figure 239] 1A and 1B are diagrams illustrating the structure of a light guide plate. [Figure 240] 10A and 10B are diagrams illustrating examples of images projected onto a light guide plate. [Figure 241] 10A and 10B are diagrams illustrating examples of images projected onto a light guide plate. [Figure 242]10A and 10B are diagrams illustrating examples of images projected onto a light guide plate. [Figure 243] 1A and 1B are diagrams illustrating the structure of a light guide plate. [Figure 244] 10A and 10B are diagrams illustrating examples of images projected onto a light guide plate. [Figure 245] 10A and 10B are diagrams illustrating how a picture is displayed in a planar view by a light guide plate. [Figure 246] 10A and 10B are diagrams illustrating how a picture is displayed in a planar view by a light guide plate. [Figure 247] 10A and 10B are diagrams illustrating how a picture to be viewed stereoscopically is displayed by a light guide plate. [Figure 248] 10A and 10B are diagrams illustrating how a picture to be viewed stereoscopically is displayed by a light guide plate. [Figure 249] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 250] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 251] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 252] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 253] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 254] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 255] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 256] 10A and 10B are diagrams illustrating examples of effect displays performed using a light guide plate. [Figure 257] FIG. 10 is a circuit diagram of the periphery of the synchronous serial interface of the main control board. [Figure 258] FIG. 1 is a circuit diagram showing the connection between a serial-parallel conversion circuit and an LED. [Figure 259] FIG. 2 is a diagram showing the layout of the main control MPU and peripheral components on the main control board. [Figure 260] FIG. 2 is a diagram showing the arrangement of ports in the main control MPU. [Figure 261]FIG. 10 is a diagram showing the timing of data output and capture by a synchronous serial signal. [Figure 262] A diagram showing another arrangement of the main control board in the main control board box. [Figure 263] A diagram showing another arrangement of the main control board in the main control board box. [Figure 264] FIG. 1 is a perspective view of a slot machine. [Figure 265] FIG. 2 is a perspective view of the slot machine with the front member open. [Figure 266] FIG. 2 is a block diagram showing the configuration of various mechanical elements, electronic devices, operating members, etc. provided in the slot machine. [Figure 267] 2 is a diagram showing details of storage areas provided by ROM, RAM, etc., and a ROM area in this embodiment. FIG. [Figure 268] FIG. 2 is a diagram illustrating details of a RAM area in this embodiment. [Figure 269] A diagram showing the structure of data stored in the area for calculating the bonus item ratio. [Figure 270] FIG. 4 is a diagram showing details of a parameter information setting area according to the present embodiment. [Fig. 271] 10 is a flowchart illustrating a procedure of a system reset start-up process that is executed when the slot machine is reset. [Fig. 272] 10 is a flowchart showing a procedure of periodic processing. [Fig. 273] 10 is a flowchart showing the procedure of an information signal N output process. [Fig. 274] 13 is a flowchart of an initialization process according to a fifth modified example. [Figure 275] 275 is a flowchart showing a continuation of the initialization process of Alternative Example 5 of FIG. 274. [Figure 276] 13 is a flowchart showing a timer interrupt process according to a fifth modification. [Figure 277] A diagram illustrating an example of winning information transmitted from the main control board to the ball information control board. [Fig. 278]A diagram illustrating an example of a table that defines the number of prize balls corresponding to each winning slot. [Figure 279] This figure shows an example of when the number of winning balls is included in the winning information, where (A) is when the number of winning balls is tallied for each general winning slot, and (B) is when the number of winning balls is tallied by aggregating all general winning slots. [Figure 280] FIG. 10 is a diagram showing an example in which winning information is stored in order of winning. [Figure 281] 10A and 10B are diagrams showing examples of game information transmitted from the main control board to the ball information control board, where (A) is an example of winning information, and (B) is an example of main control recognition information. [Figure 282] A figure showing another example of game information transmitted from the main control board to the ball information control board. [Figure 283] A diagram explaining the communication between the main control board and the ball information control board when the gaming machine is started. [Fig. 284] This figure shows a case in which there is no response from the ball information control board to a notification from the main control board in communication between the main control board and the ball information control board. [Figure 285] This figure shows another example of communication between the main control board and the ball information control board, in which there is no response from the ball information control board to a notification from the main control board. [Figure 286] A figure showing an example of a memory area allocated to the main control built-in RAM in game control. [Figure 287] 10A and 10B show an example of a data area included in the input information storage area, where (A) shows the input edge data 1 area (INPUT_EDG1) and (B) shows the prize ball determination area (PAY_JDG_AR). [Figure 288] 10 is a flowchart showing an example of a procedure for a switch input process for acquiring information detected by a sensor or the like provided in the gaming machine. [Figure 289] 10 is a flowchart explaining the steps of the process for opening the large prize opening. [Figure 290] 10 is a timing chart illustrating the processing of each component when a gaming ball enters a large prize slot. [Figure 291]10 is a timing chart illustrating the processing of each component when a game ball enters the second starting hole. [Figure 292] This is a timing chart that explains the processing of each component when a gaming ball enters the variable probability area (V-AT area). [Figure 293] FIG. 10 is a diagram illustrating an outline of a bit transfer procedure. [Fig. 294] FIG. 10 is a diagram illustrating an example of the configuration of an instruction code for executing a bit transfer instruction. [Figure 295] FIG. 10 is a diagram illustrating an example of types of bit transfer instructions. [Figure 296] FIG. 10 is a diagram illustrating an example of a flowchart of a process using a bit transfer instruction “RBT.” [Figure 297] FIG. 296 is a diagram showing an example of a program corresponding to the flowchart of a process using the bit transfer instruction "RBT" (FIG. 296). [Figure 298] 10 is an example of a flowchart in which the index creation process is made into a subroutine, where (A) is the process that calls the index creation process, and (B) is the subroutine index creation process. [Figure 299] FIG. 2 is a diagram illustrating an example of a table structure. [Figure 300] FIG. 10 is a diagram for explaining the detailed procedure of a bit transfer command, and is a diagram for explaining the case where a single piece of data is read from a reference table. [Figure 301] FIG. 10 is a diagram for explaining the detailed procedure of a bit transfer instruction, and is a diagram for explaining a case where data is continuously read from a reference table. [Figure 302] 1A and 1B are diagrams for explaining a bit transfer command for data larger than 1 byte in size, where (A) shows a table to be referenced, and (B) explains the procedure. [Figure 303] This figure explains an example of the application of a bit transfer command, where (A) is a figure explaining the relationship between the fluctuation pattern and the corresponding range, (B) is program code showing a fluctuation pattern table, and (C) is a figure explaining an example of the structure of the table before and after compression for the fluctuation pattern table corresponding to (B). [Figure 304] 10 is a flowchart showing an example of a procedure for selecting a variation pattern. [Figure 305] FIG. 10 is a diagram showing an example of a program for selecting a variation pattern. [Figure 306] A figure showing an example of an address map showing the configuration of the memory area of ​​the main control board of the gaming machine. [Figure 307] FIG. 10 is a diagram showing an example of a program implementation of a processing address table in which addresses of processes (subroutines) are stored. [Figure 308] FIG. 10 is a diagram illustrating an example of program code that defines an index for identifying a process stored at an address stored in a process address table. [Figure 309] FIG. 10 is a diagram illustrating an operation when an INVD command is executed. [Figure 310] FIG. 10 is a diagram illustrating a procedure for specifying a process to be called by an INVD command. [Figure 311] FIG. 10 is a diagram illustrating an example of a program for port read processing (PORT_RD). [Figure 312] FIG. 10 is a diagram illustrating an example of a program for data setting processing (DAT_SET). [Figure 313] FIG. 10 is a diagram illustrating an example of a program for work area setting process 1 (WORK_AD). [Figure 314] FIG. 10 is a diagram illustrating an example program of work area setting process 2 (WORK_AD_INC_HL). [Figure 315] FIG. 10 is a diagram illustrating an example of a program for 2-byte data search processing (LD_HLA_HL). [Figure 316] This is a diagram showing example programs for the jackpot information command setting process (TDINF_CMBF_SET), command buffer setting process 1 (CMBF_SET1), and command storage process (COM_SET). [Figure 317] FIG. 10 is a diagram illustrating an example of a program for output determination common processing 1 (OHAN_SUB1). [Figure 318] FIG. 10 is a diagram illustrating an example of a program for output determination common processing 2 (OHAN_SUB2). [Figure 319] FIG. 10 is a diagram illustrating an example of a program for output port data setting processing (PORT_DAT_SET). [Figure 320] A figure showing an example program for variable information number search processing (TI_SRCH). [Figure 321] FIG. 10 is a diagram illustrating an example of a program for an illegal notification setting process (ILG_OUTSET). [Figure 322] FIG. 10 is a diagram illustrating an example of a program for data search processing (HLA_SRCH). [Figure 323] FIG. 10 is a diagram illustrating an example of a program for multiplication value addition address acquisition processing (MUL_WA_HL). [Figure 324] FIG. 10 is a diagram illustrating an example of a program for SPI 2-byte output processing (SPI_TX_WA). [Figure 325] The diagram shows excerpts from a program that calls processes using the INVS command. (A) shows an excerpt from the program that calls the solenoid drive process and the motor drive process. (B) shows an example program (part) for the solenoid drive process. (C) shows an example program (part) for the motor drive process. [Figure 326] FIG. 10 is a diagram illustrating the procedure of the INVI command. [Figure 327] 1A and 1B are diagrams showing an example of a PSW, in which (A) shows the configuration of the PSW and (B) explains each configuration. [Figure 328] 10A and 10B are diagrams showing examples of programs for explaining the placement of processing called by the INVI command, in which (A) shows an example of a program for an area from which processing is read, and (B) shows an example of a program for the actual processing. [Figure 329] 10 is a flowchart showing an example of a timer interrupt process using various process calling instructions; [Figure 330] 10 is a flowchart showing the procedure for processing when a game is stopped in timer interrupt processing. [Figure 331] 10 is an example of program code for processing when game play stops during timer interrupt processing. [Figure 332]FIG. 10 is a diagram showing an example of a memory map of the program / data area in the ROM area of ​​the main control board of the gaming machine. [Figure 333] A figure showing an example of program code for the fluctuation pattern selection process (Hp_select). [Figure 334] FIG. 2 is a diagram showing an example of a mounting diagram of a main control board of the gaming machine of the present embodiment. [Figure 335] A block diagram of the configuration for performing SPI communication with the main control MPU 1311 of the gaming machine of this embodiment. [Figure 336] 10 is a diagram illustrating the operating mode of SPI communication in the gaming machine of this embodiment. FIG. [Figure 337] This is a diagram explaining the configuration of various registers used to set up SPI communication in the gaming machine of this embodiment, where (A) is control register 1 (SPICNA0), (B) is control register 2 (SPICNA1), and (C) is the prescaler registers (SPICPSA0, SPICPSA1, SPICPSA2, SPICPSA3). [Figure 338] 10 is a time chart showing the state from when the gaming machine of this embodiment is initialized until when SPI communication can be started. [Figure 339] 10 is a diagram illustrating the configuration of an SPI communication B buffer register in this embodiment. FIG. [Figure 340] FIG. 10 is a diagram showing an example of SPI common output setting data (SPI_COMTX_B) of the present embodiment. [Figure 341] FIG. 2 is a circuit diagram focusing on the configuration for receiving signals via SPI communication in the gaming machine of this embodiment. [Figure 342] 10 is a flowchart showing an example of the procedure of a switch input process for acquiring information detected by a sensor or the like provided in the gaming machine of this embodiment. [Figure 343] A figure showing an example of program code for switch input processing in this embodiment, corresponding to the flowchart in Figure 342. [Figure 344]10 is an example of a program code of setting data (SPI input setting data; SPI_SWRX_B) when starting reception of an input signal through SPI communication in this embodiment. [Figure 345] 10 is an example of a program code of setting data (SPI restart setting data; SPI_RESTART_B) when initializing a communication circuit for SPI communication in this embodiment. [Figure 346] FIG. 10 is a diagram illustrating an example of SPI switch input information data according to the present embodiment. [Figure 347] 3 is a diagram showing an example of the configuration of an area for storing level data and edge data according to the present embodiment; FIG. [Figure 348] 10 is a flowchart illustrating an example of a procedure for SPI twice read processing (TWICE_SPI) according to the present embodiment. [Figure 349] A figure showing an example of program code for the SPI twice read processing (TWICE_SPI) of this embodiment, corresponding to the flowchart in Figure 348. [Figure 350] 10 is a flowchart showing the steps of a level / edge data creation process according to the present embodiment. [Figure 351] A figure showing an example of program code for the level / edge data creation process of this embodiment, and corresponds to the flowchart of Figure 350. [Figure 352] 10 is a time chart showing a process from the start of switch input processing to the completion of data transmission by SPI communication in chronological order according to the present embodiment. [Figure 353] 10 is a time chart showing the process in chronological order from the completion of data transmission by SPI communication to the start of switch input processing at the next timer interrupt in the switch input processing of this embodiment. [Figure 354] 10 is a flowchart showing the procedure for game-playable processing executed in the timer interrupt processing of this embodiment. [Figure 355] This figure shows an example of program code for processing when play is possible in this embodiment, and corresponds to the flowchart in Figure 354. [Figure 356]This is a diagram showing an example of a circuit diagram that excerpts the configuration in the gaming machine of this embodiment, from the contact detection sensor (touch sensor) and the firing stop switch (firing stop button) until the signals output are input to the main control MPU. [Figure 357] 10 is a flowchart illustrating a procedure for a switch-related control process according to the present embodiment. [Figure 358] 4 is a diagram illustrating the data structure of history area creation data according to the present embodiment. FIG. [Figure 359] FIG. 10 is a diagram illustrating an example of history area creation data according to the present embodiment. [Figure 360] 10 is a diagram showing the configuration of an area (data area) for storing signals input to a main control MPU 1311 of this embodiment. FIG. [Figure 361] 10 is a flowchart showing the procedure of a history monitoring switch data creation process according to the present embodiment. [Figure 362] 361 is an example of program code for the history monitoring switch data creation process of this embodiment, and corresponds to the flowchart of FIG. [Figure 363] 10A and 10B are diagrams illustrating a flow of creating history monitoring switch data according to the present embodiment. [Figure 364] 10 is a diagram illustrating a data structure of switch history command transmission determination data according to the present embodiment. FIG. [Figure 365] FIG. 10 is a diagram illustrating an example of switch history command transmission determination data according to the present embodiment. [Figure 366] 10A and 10B are diagrams illustrating an example of switch history command transmission determination data corresponding to input edge data according to the present embodiment. [Figure 367] 10 is a flowchart illustrating a procedure for a switch history command transmission determination process according to the present embodiment. [Figure 368] 367 is an example of program code for the switch history command transmission determination process of this embodiment, and corresponds to the flowchart of FIG. [Figure 369] FIG. 2 is a diagram illustrating an example of the configuration of an internal function register of a main control MPU according to the present embodiment. [Figure 370]A figure showing an example of history area creation data for random number clock errors stored in an internal function register of the main control MPU of this embodiment. [Figure 371] FIG. 10 is a diagram illustrating an example in which the switch history command transmission determination data of the present embodiment is applied to an internal function register (random number clock error); [Figure 372] 10A and 10B are diagrams illustrating the data structure of switch passing command data according to the present embodiment. [Figure 373] FIG. 10 is a diagram illustrating an example of switch passing command data according to the present embodiment. [Figure 374] FIG. 4 is a diagram illustrating an example of switch address data according to the present embodiment. [Figure 375] FIG. 10 is a diagram illustrating another example of switch passing command data according to the present embodiment. [Figure 376] 10 is a flowchart illustrating a procedure for a switch passing command transmission process according to the present embodiment. [Figure 377] 376 is an example of program code for the switch passing command transmission process of this embodiment, and corresponds to the flowchart of FIG. [Figure 378] 10 is a flowchart showing the procedure of a safe switch abnormality determination process according to the present embodiment. [Figure 379] This is an example of program code for the safe switch abnormality determination process of this embodiment, and corresponds to the flowchart in Figure 378. [Figure 380] 10 is a block diagram showing an example of a connection configuration of connection lines that supply power to various boards that control the gaming machine of this embodiment. FIG. [Figure 381] 10A to 10C are diagrams showing examples of operations for executing the setting function of the gaming machine of this embodiment. [Figure 382] 10 is a flowchart of the processing performed when the gaming machine of this embodiment is powered on. [Figure 383] 10 is a flowchart illustrating a procedure for a startup confirmation process at power-on according to the present embodiment. [Figure 384] 10 is a flowchart showing the procedure of RAM clear determination processing according to the present embodiment. [Figure 385]This is an example of program code for the RAM clear determination process of this embodiment, and corresponds to the flowchart in Figure 384. [Figure 386] 10 is a flowchart illustrating a procedure for a setting value confirmation process according to the present embodiment. [Figure 387] This is an example of program code for the setting value confirmation process of this embodiment, and corresponds to the flowchart in Figure 386. [Figure 388] 10 is an example of program code corresponding to the definition of a storage area related to a power interruption flag in this embodiment. [Figure 389] 10 is an example of program code corresponding to the definition of setting values ​​related to the settings of the gaming machine of this embodiment. [Figure 390] 10 is a flowchart illustrating a procedure for a setting operation determination process according to the present embodiment. [Figure 391] This is an example of program code for the setting operation determination process of this embodiment, and corresponds to the flowchart in Figure 390. [Figure 392] 4 is a flowchart showing the procedure of a process for determining an open circuit / short circuit abnormality according to the present embodiment. [Figure 393] This is a timing chart that explains the control that occurs when the power supply is cut off by disconnecting the wiring connected to the main control board of this embodiment, and the power supply is resumed after the wiring is reconnected, and an unauthorized act of performing a setting confirmation operation is performed. [Figure 394] This is a timing chart that explains the control that occurs when the power supply is cut off by disconnecting the wiring connected to the main control board of this embodiment, and then the power supply is resumed after the wiring is reconnected, and an unauthorized act of performing a setting change operation is performed. [Figure 395] This is a timing chart that explains the control when the wiring connected to the main control board of this embodiment is disconnected but the power supply is not cut off, the wiring is reconnected, and when the power is turned back on, a setting change operation is performed to resume play. [Figure 396] 10 is a timing chart illustrating the control when wiring connected to the main control board is disconnected and reconnected during the occurrence of a weak error in the gaming machine of this embodiment. [Figure 397] 10 is a timing chart illustrating the control of transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. [Figure 398] 10 is a timing chart illustrating an example of control when the gaming machine of this embodiment is powered on by executing a first operation. [Figure 399] 10 is a timing chart illustrating an example of control when the gaming machine of this embodiment is powered on by executing a second operation. [Figure 400] A figure showing an example of a command transmitted from the main control board to the peripheral control board in the gaming machine of this embodiment. [Figure 401] A figure showing an example of a screen transition when transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. [Figure 402] A figure showing an example of a screen transition when the time-saving state ends in the gaming machine of this embodiment. [Figure 403] FIG. 10 is a diagram showing a modified example of the gaming board of the gaming machine of the present embodiment. [Figure 404] 1 is a diagram showing an example of a ball counting slot arranged on the gaming board 5 of the gaming machine of this embodiment. FIG. [Figure 405] A figure showing a cross-sectional view of an example of a counting ball entrance unit arranged in a modified example of the gaming board of the gaming machine of this embodiment. [Figure 406] 10A and 10B are diagrams showing the path of movement of game balls when the counting ball entrance unit of a modified example of this embodiment is in a ball entrance permission state, where (A) is a cross-sectional perspective view and (B) is a cross-sectional view. [Figure 407] 10A and 10B are diagrams showing the path of movement of game balls when the counting ball entrance unit of a modified example of this embodiment is in a ball entrance disallowing state, where (A) is a cross-sectional oblique view and (B) is a cross-sectional view. [Figure 408] 10 is a timing chart showing changes in the time-saving transition count in a modified example of the gaming machine of the present embodiment. [Figure 409] This is a timing chart when the second starting winning port functions as a counting ball winning port in a modified example of the gaming machine of this embodiment. [Figure 410]10 is a flowchart illustrating the steps of a state transition determination process for determining whether or not to transition to another gaming state in the gaming machine of this embodiment. [Figure 411] 10 is a flowchart illustrating a procedure for a state transition process according to the present embodiment. [Figure 412] FIG. 4 is a diagram illustrating an example of state transition data according to the present embodiment. [Figure 413] FIG. 2 is a diagram illustrating an example of the configuration of a work area for storing state transition data according to the present embodiment. [Figure 414] FIG. 10 is a diagram illustrating a modified example of state transition data according to the present embodiment. [Figure 415] 10 is a timing chart illustrating the control of transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. [Figure 416] A figure showing an example of the arrangement of values ​​stored in a memory area provided by the main control RAM of the gaming machine of this embodiment. [Figure 417] 10A and 10B are diagrams illustrating the operation of the RAM clear switch in the gaming machine of this embodiment and the memory areas that are cleared when a RAM abnormality occurs. [Figure 418] A figure showing an example of setting data for the first interval transition to a jackpot that is set when the game machine of this embodiment transitions to a jackpot game state upon winning a special lottery. [Fig. 419] A figure showing an example of large prize opening closure setting data that is set when closing the large prize opening during a large prize game state of the gaming machine of this embodiment. [Figure 420] This is a sample module that performs initial settings based on the special prize opening closure setting data in the gaming machine of this embodiment. [Figure 421] FIG. 10 is a diagram illustrating an example of a program for data initialization processing (DAT_SET_CLR) according to the present embodiment. [Figure 422] This is a sample module that performs initial settings in the gaming machine of this embodiment using conventional procedures based on the special prize opening closure setting data. [Figure 423]A figure showing an example of a setting state management area and values ​​set in the setting state management area in the gaming machine of this embodiment. [Figure 424] A figure showing an example of a table for selecting initialization setting data when initializing the gaming machine of this embodiment. [Figure 425] 10 is a time chart showing the output timing of an external output signal related to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. [Figure 426] This is a modified example of a time chart showing the output timing of an external output signal related to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. [Figure 427] FIG. 2 is a block diagram showing the control configuration of a peripheral control board. [Figure 428A] 1 is an example of a memory map of storage areas accessed by a VDP. [Figure 428B] FIG. 10 is a diagram illustrating the allocation of storage areas provided by the performance data ROM. [Figure 429] 10 is a flowchart showing a process executed when the peripheral control board is powered on. [Fig. 430] A figure showing an example of the configuration of modules etc. used in performance control by the peripheral control board of the gaming machine of this embodiment. [Figure 431] This is a diagram explaining the outline of the presentation control for the first half of the fluctuation pattern "10H03H" (normal fluctuation 12 seconds). [Figure 432] FIG. 10 is a diagram showing an example of a function in the presentation control of the gaming machine of this embodiment. [Figure 433] This is a diagram explaining the mechanism of lenticular 3D display, where (A) shows the area visible to the left eye (L) and (B) shows the area visible to the right eye (R). [Fig. 434] 10A and 10B are diagrams showing an example of a lenticular image in the gaming machine of the present embodiment. [Figure 435] 1A and 1B are diagrams illustrating the layout of images stored in an image data area, where (A) shows the layout of the entire image data area, and (B) shows the details of the layout of an area for storing 3D images. [Figure 436] A figure explaining the arrangement of layers on which images displayed on the effect display device of the gaming machine of this embodiment are drawn. [Figure 437] A diagram explaining the procedure for writing an image to be displayed on the effect display device of the gaming machine of this embodiment into a frame buffer. [Fig. 438] FIG. 10 is a diagram illustrating a procedure for generating a 3D display image (lenticular image) by combining a side-by-side 2D image (such as a background image) with a 3D image in which an image for the left eye and an image for the right eye are arranged side by side. [Figure 439] 10A to 10C are diagrams illustrating the procedure for creating image data for a 3D display effect in the gaming machine of this embodiment. [Figure 440] FIG. 10 is a diagram illustrating a first method for generating a side-by-side image. [Figure 441] FIG. 10 is a diagram illustrating a second method for generating a side-by-side image. [Figure 442] FIG. 10 is a diagram illustrating a third method for generating a side-by-side image. [Figure 443] FIG. 10 is a diagram illustrating a procedure for synthesizing a full-screen image from a side-by-side image. [Figure 444] FIG. 10 is a diagram illustrating an example of a layer structure in the case where there is a single 3D layer. [Figure 445] 44 is a flowchart for explaining the procedure for drawing on each layer in the layer structure of FIG. [Figure 446] FIG. 10 is a diagram illustrating an example of a layer structure in the case where there are multiple 3D layers. [Figure 447] 447 is a flowchart for explaining the procedure for drawing on each layer in the layer structure of FIG. 446. [Figure 448] FIG. 10 is a diagram showing an example of a screen in the effect selection mode of the gaming machine of this embodiment. [Figure 449] 10A to 10C are diagrams illustrating the procedure for using images for 3D display presentation in the 2D display presentation mode in the gaming machine of this embodiment. [Figure 450]A flowchart showing the procedure for using images for 3D display presentation in the 2D display presentation mode shown in Figure 449. [Figure 451] FIG. 10 is a diagram showing an example of an abnormality notification screen that is displayed when an abnormality occurs during execution of a 3D display effect. [Figure 452] 10 is a timing chart showing the state of each component when the power supply to the main control board is cut off during a 3D display performance. [Figure 453] FIG. 10 is a diagram showing an example of a screen transition when the power supply to the main control board is cut off during a 3D display performance. [Figure 454] This is a timing chart showing the state of each component when the power supply to the peripheral control board is cut off during 3D display performance during a jackpot game state. [Figure 455] This figure shows an example of the screen transition when the power supply to the peripheral control board is cut off during 3D display presentation during a jackpot game state. [Figure 456] FIG. 10 is a diagram illustrating an example of a structure for storing frame data for generating a moving image. [Figure 457] 10 is a graph showing the relationship between the interval at which one reference frame data is arranged and the amount of data. [Figure 458] FIG. 10 is a diagram showing an example of the layout of areas displaying images. [Fig. 459] 10 is a diagram for explaining images corresponding to each region, with the upper row showing images corresponding to each region and the lower row showing a display image generated as a result of drawing images corresponding to all regions. [Fig. 460] 10 is a table showing configuration information of each area. [Figure 461] FIG. 10 is a diagram illustrating the relationship between layers. [Figure 462] FIG. 1 is a diagram illustrating a first procedure for generating a moving image. [Figure 463] FIG. 10 is a diagram illustrating the capacity of a decoding buffer required when a moving image is generated in the first procedure. [Fig. 464] FIG. 10 is a diagram showing an example of the intervals at which reference frame data is arranged when a moving image is generated in the second procedure. [Figure 465]FIG. 10 is a diagram illustrating a second procedure for generating a moving image. [Figure 466] FIG. 10 is a diagram illustrating the capacity of a decoding buffer required when a moving image is generated in the second procedure. [Figure 467] FIG. 10 is a diagram illustrating the capacity of a decoding buffer required when a moving image is generated by combining the first and second procedures. [Fig. 468] FIG. 10 is a diagram illustrating an example of image management information. [Figure 469] FIG. 1 is a block diagram illustrating an extracted configuration for testing an external RAM. [Figure 470] FIG. 10 is a diagram illustrating an example of a command for testing an external RAM. [Figure 471] FIG. 10 is a diagram illustrating registers that are set by the RAM diagnostic circuit to perform a test on an external RAM. [Figure 472] 10 is a flowchart showing the procedure of an external RAM inspection process (glitch margin check) in the boot program. [Fig. 473] 10 is a flowchart showing the procedure of an external RAM inspection process (R / W test) in the peripheral control program. [Fig. 474] 10 is a flowchart showing the procedure of an external RAM inspection process (glitch margin check and R / W test) executed after power-on. [Figure 475] 10 is a diagram illustrating the types of winnings of the gaming machine of this embodiment. FIG. [Figure 476] 10A and 10B are diagrams illustrating the random numbers used to determine whether a game has been won in the gaming machine of this embodiment, where (A) is pattern 1 and (B) is pattern 2. [Figure 477] 10 is a flowchart showing the procedure of a fraud detection process in the gaming machine of this embodiment. [Figure 478] 10 is a flowchart showing the steps of the processing for detecting irregularities at the big prize slot in the gaming machine of this embodiment. [Figure 479] 10 is a flowchart showing the procedure for the fraud notification setting process in the gaming machine of this embodiment. [Figure 480]FIG. 10 is a diagram showing a timing chart when the first jackpot is won in the gaming machine of this embodiment. [Figure 481] FIG. 10 is a timing chart showing a case where a second win is won before the number of consecutive first wins reaches an upper limit in the gaming machine of this embodiment. [Figure 482] FIG. 10 is a diagram showing a timing chart when a second win is won in the gaming machine of this embodiment. [Figure 483] This is a timing chart that explains the operation when a gaming ball passes through a specific area when a small jackpot is won in a gaming machine that is designed to maintain the gaming state when a small jackpot is won. [Figure 484] This is a timing chart that explains the timing for updating the number of consecutive time-saving times in a gaming machine that transitions to a non-time-saving state (normal gaming state) when a small jackpot is won, and shows a case where the gaming ball does not pass through a specific area when a small jackpot is won. [Figure 485] This is a timing chart that explains the timing for updating the number of consecutive time-saving times in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and shows a case where the gaming ball passes through a specific area after a small jackpot is won. [Figure 486] This is a timing chart that improves the timing for updating the number of consecutive time-saving times in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and shows the case where the gaming ball passes through a specific area when a small jackpot is won. [Figure 487] This is a timing chart that explains the operation of a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and starts a special game state due to a big jackpot after the special game state due to the small jackpot ends, when a gaming ball passes through a specific area when a small jackpot is won. [Figure 488] 10 is a diagram illustrating the types of variation pattern tables that are set when the special symbols of the gaming machine of this embodiment are displayed in a variable manner. FIG. [Figure 489] This figure shows an example of a pattern in which a variation pattern table is selected depending on the remaining number of times up to the upper limit at which the time-saving state can occur consecutively. [Figure 490]A figure showing an example of the type of random number and the range of random number values ​​obtained when a gaming ball enters the starting hole. [Figure 491] A figure showing an example of the range in which the result of a special lottery for each setting value of a gaming machine will result in a jackpot. [Figure 492] 10 is a flowchart showing the procedure for the special symbol / special electric device control process in the gaming machine of this embodiment. [Figure 493] 10 is a flowchart showing the procedure for the special symbol change waiting process in the gaming machine of this embodiment. [Figure 494] 10 is a flowchart showing the procedure for special symbol / flag setting processing in the gaming machine of this embodiment. [Figure 495] 10 is a flowchart showing the procedure for the special symbol determination process of the gaming machine of this embodiment. [Figure 496] This is a diagram for explaining the means for determining the lottery results, where (A) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 6 in a high probability state, (B) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 1 in a high probability state, (C) is a table for determining the result of the variable display of special pattern 1 (special lottery) when the gaming machine is set to 6 in a high probability state, (D) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 6 in a low probability state, and (E) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 1 in a low probability state. [Figure 497] This is a diagram that explains the process by which some bits of the random number used to determine a jackpot are changed due to factors such as noise, causing it to change to a value outside the range. [Figure 498] 10A and 10B are diagrams showing examples of data for determining special symbols, where (A) shows the case of special symbol 1 and (B) shows the case of special symbol 2. FIG. [Figure 499] This is a diagram explaining the pattern types corresponding to the special pattern random numbers, where (A) shows the case of special pattern 1 and (B) shows the case of special pattern 2. [Figure 500] 10 is a flowchart showing an example of the procedure for setting a special symbol variation pattern. [Figure 501] 10 is a flowchart showing an example of a procedure for a variation pattern selection determination process. [Figure 502] FIG. 10 is a diagram showing an example of reach fluctuation pattern selection data. [Figure 503] A diagram for explaining the comparison value for activating the excess prize ball suppression means. [Figure 504] FIG. 10 is a diagram illustrating an example of a table showing the relationship between commands and the remaining number. [Figure 505] 10 is a timing chart illustrating the flow of canceling a game stop by a first game stop canceling means. [Figure 506] 10 is a timing chart illustrating the flow of canceling a game stop by a second game stop canceling means. [Figure 507] 10 is a timing chart showing an example of control for canceling a game stop by turning the power back on when the door is opened. [Figure 508] 10 is a timing chart showing an example of control in which the game stop is not canceled by turning the power back on when the door is closed. [Figure 509] 10 is a timing chart showing an example of control for executing a setting change while opening the door after a game has stopped. [Figure 510] 10 is a timing chart showing an example of control in which a setting change is performed while the door is open after a game has stopped, and the door is closed after the gaming machine has started up. [Figure 511] 10 is a timing chart showing an example of control for executing a setting change while closing the door after a game has stopped. [Figure 512] 10 is a timing chart showing an example of control for checking settings while opening the door after a game has stopped. [Figure 513] 10 is a timing chart showing an example of control for checking settings while closing the door after a game has stopped. [Figure 514] 10 is a timing chart showing an example of control in which the opening of the door is the condition for canceling a game stop and the condition for starting a setting change. [Figure 515]FIG. 10 is a diagram showing an example of the configuration for executing the bell ringing effect in the gaming machine of this embodiment. [Figure 516] 1 is a front view (surface view of the door frame) of a pachinko machine according to one embodiment of the present invention. [Figure 517] This is a diagram showing a dish unit including a performance operation unit, where (A) is a front view of the dish unit in its normal state, (B) is a front view of the dish unit when the pressing operation unit is in the raised position, and (C) is a front view of the dish unit when the central pressing operation unit of the pressing operation unit is pressed. [Figure 518] 10A and 10B are diagrams showing the initial position of the performance operation unit, where (A) is a plan view and (B) is a cross-sectional view cut along a plane including the center. [Figure 519] 10A and 10B are diagrams showing the raised position of the performance control unit, where (A) is a plan view and (B) is a cross-sectional view cut along a plane including the center. [Figure 520] This figure explains the operation of the rotation operation unit by lifting the pressing operation unit, where (A) shows the state in which the pressing operation unit is lifted, and (B) shows the state in which the rotation operation unit has rotated by lifting the pressing operation unit. [Figure 521] FIG. 10 is a diagram showing an example of the screen transition when one worshipper rings the bell once and is successful. [Figure 522] FIG. 10 is a diagram showing an example of the screen transition when one worshipper rings the bell once but fails. [Figure 523] This is a diagram explaining the rotation amount of the rotary control part and the movement of the bell corresponding to the strength of striking the bell in the bell-striking performance, where (A) is the strength at "strong," (B) is the strength at "medium," (C) is the strength at "weak," and (D) is when the bell fails to be struck because the strength is below the specified level. [Figure 524] FIG. 10 is a diagram showing an example of a screen transition when the strength of the bell ringing is specified in a bell ringing performance in which each worshipper rings the bell once. [Figure 525] FIG. 10 is a diagram showing an example of a screen transition of a bell-ringing performance in which a plurality of worshippers ring the bell in succession. [Figure 526] FIG. 10 is a diagram showing an example of the configuration for executing the point effect of the bell ringing effect in the gaming machine of this embodiment. [Figure 527]FIG. 10 is a diagram illustrating the setting of the point effect. [Figure 528] FIG. 10 is a diagram illustrating the progress of points acquired from the start of the point presentation. [Figure 529] FIG. 10 is a diagram showing an example of a screen transition for point effects. [Fig. 530] This figure shows an example of a preview effect that is executed based on the total points earned in the point effect, where (A) is when the total points are 0, (B) is when the total points are 20, and (C) is when the total points are 50. [Figure 531] FIG. 10 is a diagram showing an example of bell ringing strength according to the attributes of worshippers. [Fig. 532] FIG. 10 is a diagram illustrating the progress of points earned from the start of the point presentation when the strength of the bell ringing is specified based on the attributes of the worshipper. [Figure 533] This is a flowchart showing the first half of the procedure for processing when the dispensing control unit is powered on. [Fig. 534] This is a flowchart showing the second half of the procedure for processing when the dispensing control unit is powered on. [Fig. 535] A flowchart showing the steps of the prize ball control process. [Fig. 536] 10 is a flowchart illustrating an example of a procedure for a reference value counter update process. [Figure 537] 10 is a flowchart showing the procedure for RAM clear determination processing corresponding to initialization of a reference value (comparison value) based on a game stop error flag. [Figure 538] A figure showing an example of advance notification of the excessive prize ball suppression means (complete function). [Fig. 539] A figure showing an example of an operation notification of the excess prize ball suppression means. [Fig. 540] This figure shows an example of a screen transition when an excess prize ball suppression means is activated after the end of a jackpot game state. [Figure 541] This figure shows an example of a screen transition when the advance notification conditions and activation conditions are met during a jackpot game state, and the excess prize ball suppression means is activated after the jackpot game state ends. [Fig. 542]This figure shows an example of a screen when an abnormality occurs in the gaming machine while the advance warning of the excessive prize ball suppression means is being executed, where (A) shows the time when the abnormality occurs, and (B) shows the state after recovery by turning the power off and on again. [Figure 543] 10 is a flowchart showing the procedure for processing when the power is turned on in the gaming machine of this embodiment. [Fig. 544] The figure shows an overview of the memory area layout, where (A) is a schematic diagram of the memory area layout, (B) is a dump list when the starting address outside the game area is "5060h", and (C) is a dump list when the starting address outside the game area is "5065h". [Figure 545] 10 is a flowchart showing the procedure for processing at the start of a game. [Figure 546] 10 is a flowchart showing the procedure for processing when setting up the start of a game. [Figure 547] A flowchart showing the steps of the excess prize ball suppression setting process. [Figure 548] 10 is a flowchart showing the steps of a game stop determination process. [Fig. 549] FIG. 10 is a diagram showing an example of program code for a game stop determination process. [Fig. 550] A diagram explaining whether the excess prize ball suppression means is operable according to the progress of the game. [Figure 551] 10 is a flowchart showing a procedure for a timer interrupt process. [Figure 552] 10 is a flowchart showing the procedure for game-playable processing executed in the timer interrupt processing of this embodiment. [Figure 553] 10 is a flowchart showing the procedure of a performance display monitor process executed in the timer interrupt process of the present embodiment. [Figure 554] A flowchart showing the steps for the excessive prize ball suppression process. [Figure 555] FIG. 10 is a diagram illustrating an example of a target switch information data table. [Figure 556] 10 is a flowchart showing the procedure of a reference value addition process. [Figure 557] 10 is a flowchart showing the procedure of a reference value subtraction process. [Figure 558] FIG. 10 is a diagram illustrating an example of skipping a specific effect by operating the operating means when the effect is executed after a reach occurs. [Figure 559] This is a timing chart corresponding to the example of the performance shown in Figure 558. [Fig. 560] FIG. 10 is a diagram illustrating another example in which a specific effect is skipped by operating the operating means when the effect is executed after a reach occurs. [Fig. 561] This is a timing chart corresponding to the example of the performance shown in Figure 560. [Fig. 562] FIG. 10 is a diagram showing an example in which an operation prompt display is displayed after a reach occurs, and the presentation is switched depending on whether or not an operation input is made. [Fig. 563] This is a timing chart corresponding to the example of the performance shown in Figure 562. [Fig. 564] FIG. 10 is a diagram showing an example of a penalty effect that is executed when operation input is not accepted in a configuration that requires operation using a single operating means. [Figure 565] This is a timing chart corresponding to the example of the performance shown in Figure 564. [Fig. 566] FIG. 10 is a diagram showing an example of a penalty effect that is executed when operation input is not accepted in a configuration that requires the operation of multiple types of operating means. [Fig. 567] This is a timing chart corresponding to the example of the performance shown in Figure 566. [Fig. 568] FIG. 10 is a diagram showing an example (first half) of a presentation including a configuration requiring the operation of a single type of operating means and the operation of multiple types of operating means. [Fig. 569] A figure showing an example (second half) of a presentation including a configuration requiring the operation of a single type of operating means and the operation of multiple types of operating means. [Fig. 570] This is a timing chart corresponding to the presentation examples shown in Figures 568 and 569. [Figure 571] FIG. 10 is a diagram showing an example of the relationship between the pattern change pattern and the presentation. [Figure 572]FIG. 10 is a diagram showing an example of a screen configuration for a long jump performance. [Figure 573] 10A to 10C are diagrams illustrating an example of character movement in a long jump performance. [Figure 574] FIG. 10 is a diagram showing an example of a display mode corresponding to the expectation level of a character in a long jump performance. [Figure 575] FIG. 10 is a diagram illustrating an example of a layer configuration for a long jump performance. [Fig. 576] FIG. 10 is a diagram showing an example of information for defining layers when displaying images in a long jump performance. [Figure 577] 1 is a diagram illustrating the arrangement of layers (display hierarchy) in the gaming machine of this embodiment. [Figure 578] FIG. 2 is a diagram showing an example of image data stored in an image ROM. [Figure 579] FIG. 10 is a diagram illustrating a procedure for combining layers and creating a display screen. [Fig. 580] FIG. 10 is a diagram showing an example of a screen transition in which the layer on which an object is displayed is not changed from the time the object is displayed until the object is hidden. [Figure 581] A figure explaining the layer switching timing of the effect shown in Figure 580. [Fig. 582] FIG. 10 is a diagram showing an example of a screen transition in which the layer on which an object is displayed is changed from when the object is displayed until when the object is hidden. [Fig. 583] A figure explaining the layer switching timing of the effect shown in Figure 582. [Fig. 584] FIG. 10 is a diagram illustrating a presentation pattern in which a special presentation is executed after transitioning to a specific state. [Figure 585] A diagram showing the screen transition when an effect is executed across the variable display of multiple patterns. [Fig. 586] 10A and 10B are diagrams illustrating the probability of a character appearing when the Chinese zodiac animal appearance effect is executed. [Figure 587]This figure explains the procedure for displaying the effect change menu screen in the gaming machine of this embodiment, where (A) is the state before the effect change menu screen is displayed, (B) is the state when the effect change menu screen is displayed, (C) is the state when the favorite zodiac animal is set as the effect setting and then the effect change menu screen is closed and the favorite zodiac animal is set, and (D) is the state when a predetermined time has passed since the state of (C) and the effect change menu screen can be displayed. [Figure 588] This is a setting screen for seasonal settings. [Figure 589] This is the setting screen for setting your favorite zodiac sign. [Fig. 590] This is a screen for adjusting the brightness of the liquid crystal display device. [Fig. 591] FIG. 10 is a diagram illustrating a means for changing the settings of the presentation while the pattern is being displayed in a changing manner. [Fig. 592] 10 is a diagram illustrating the procedure for setting a new season during the changing display of the symbols. FIG. [Fig. 593] This is a diagram explaining the procedure for setting a new favorite zodiac sign while the pattern is being displayed in a changing state. [Fig. 594] This figure explains an example of setting a new zodiac sign while the pattern is changing, when the pattern change ends without a reach occurring. [Fig. 595] This is a timing chart corresponding to Figure 594 and explaining the timing at which the favorite zodiac sign is set. [Fig. 596] This figure explains an example of setting a new zodiac sign while the pattern is changing when a normal reach occurs and the pattern change results in a miss. [Figure 597] This is a timing chart corresponding to Figure 596 and explaining the timing at which the favorite zodiac sign is set. [Fig. 598] This figure explains an example of setting a new zodiac sign while the pattern is changing when an SP reach occurs and the pattern change results in a miss. [Figure 599] This is a timing chart corresponding to Figure 598 and explaining the timing at which the favorite zodiac sign is set. [Figure 600]This is a diagram explaining an example (first half) of setting a new favorite zodiac sign during the changing display of the patterns when an SP reach occurs and the result of the changing display of the patterns is a jackpot. [Figure 601] This is a diagram explaining an example (second half) of setting a new favorite zodiac sign during the changing display of the patterns when an SP reach occurs and the result of the changing display of the patterns is a jackpot. [Figure 602] This is a timing chart corresponding to Figures 599 and 600 to explain the timing at which the favorite zodiac sign is set. [Figure 603] The following figures show examples of when the upper tray full error message appears while the effect settings are being made during the display of changing patterns. (A) is when the season setting is being made, and (B) is when the favorite zodiac sign setting is being made. [Figure 604] A diagram showing light-emitting elements arranged around the performance screen. [Figure 605] FIG. 10 is a diagram showing an example (first effect pattern) of the appearance of the Chinese zodiac animal of the Rat (Rat). [Figure 606] This is a diagram explaining another example (second presentation pattern) of the Rat (Rat) zodiac animal appearance presentation, where (A) is a list of cheeses collected by the Rat (Rat) character, (B) and (C) are the execution screens of the mini-game presentation, and (B) shows the case where the Rat (Rat) is not set as the favorite zodiac animal, and (C) shows the case where the Rat (Rat) is set as the favorite zodiac animal. [Figure 607] This is an example of a special effect that is executed when the points earned in the Rat (zodiac sign) appearance effect reach a certain achievement value. (A) shows the state where a jackpot is announced, and (B) shows the state where the middle symbol stops after the announcement. [Figure 608] FIG. 10 is a diagram showing an example of the appearance of the Chinese zodiac animal Sheep. [Figure 609] FIG. 10 is a diagram showing an example of points that can be acquired when the Chinese zodiac animal, Sheep, appears. [Figure 610] A diagram showing the screen transitions when the zodiac animal of the year Goat appears. [Figure 611] This is an example of a special effect that is executed when the points earned in the Sheep zodiac appearance effect reach a predetermined achievement value. [Figure 612] 10A and 10B are diagrams showing an example of a light-emitting mode in a performance in which a light-emitting unit provided on a pressing unit of a pressing operation unit is made to emit light. [Figure 613] FIG. 10 is a diagram showing an example of the appearance of the boar zodiac sign when the boar is not set as the recommended zodiac sign. [Figure 614] This figure shows an example of the result display of the boar zodiac animal appearance effect when the boar is not set as the favorite zodiac animal, (A) shows what happens when the mini-game fails, and (B) shows what happens when the mini-game is successful. [Figure 615] FIG. 10 is a diagram showing an example of the appearance of the boar zodiac sign when the boar is set as the recommended zodiac sign. [Figure 616] This figure shows an example of the result display of the boar zodiac animal appearance effect when the boar is set as the favorite zodiac animal, (A) shows what happens when the mini-game fails, and (B) shows what happens when the mini-game is successful. [Figure 617] FIG. 10 is a diagram showing an example of points acquired in a challenge effect in the tiger zodiac animal appearance effect. [Figure 618] This is a diagram showing the state before the start of the challenge performance of the tiger zodiac appearance performance. [Figure 619] This is a diagram showing what happens when the challenge effect fails in the tiger zodiac appearance effect. [Figure 620] This is a diagram showing the case where the challenge effect is successful in the zodiac sign of the tiger appearance effect. [Figure 621] This figure shows an example of the screen transition for the appearance of the zodiac signs of Snake and Dragon when neither Snake nor Dragon is set as the favorite zodiac sign. [Figure 622] FIG. 10 is a diagram showing an example of the correspondence between the points earned and the light emission modes of the light-emitting elements in the performance in which the zodiac animals Snake and Dragon appear as the favorite zodiac animals. [Figure 623] This is a diagram explaining the evolution effect in the appearance effect of the zodiac signs of Snake and Dragon. [Figure 624]This is a diagram showing points corresponding to egg types when Snake and Dragon are not set as the preferred zodiac signs. [Figure 625] This is a diagram showing an example of the hatching result display for the Snake and Dragon zodiac animal appearance effects when the Snake is set as the favorite zodiac animal. [Figure 626] 10A and 10B are diagrams illustrating an example of changing the season setting while the zodiac animal of the year, Monkey, is being displayed. [Figure 627] FIG. 10 is a diagram showing an example of the configuration of a storage area provided by the ROM 1313 of the gaming machine of this embodiment. [Figure 628] FIG. 2 is a diagram showing an example of the configuration of a memory area provided by the RAM 1312 of the gaming machine of this embodiment. [Figure 629] 8 is a diagram illustrating access to a sending area 8721 and a receiving area 8722. FIG. [Figure 630] FIG. 2 is a diagram showing an example of the configuration of a computing device for configuring a memory area in the gaming machine of the present embodiment. [Figure 631] This figure shows alternative configurations of the arithmetic device for configuring the memory area in the gaming machine of this embodiment, where (A) is alternative configuration 1 equipped with multiple memory means, and (B) is alternative configuration 2 equipped with multiple CPU cores and multiple memory means. [Figure 632] FIG. 10 is a diagram illustrating an example of a module configuration of a complete function execution means. [Figure 633] 10 is a flowchart showing the procedure for processing when the power is turned on in the gaming machine of this embodiment. [Figure 634] 10 is a flowchart showing the procedure of a game start determination process in the gaming machine of this embodiment. [Figure 635] 10 is a flowchart showing the procedure for timer interrupt processing in the gaming machine of this embodiment. [Figure 636] 10 is a flowchart showing the procedure of a setting operation process according to the present embodiment. [Figure 637] 10 is a flowchart showing the procedure for setting confirmation / change processing in the gaming machine of this embodiment. [Figure 638]10 is a flowchart showing an example of a timer interrupt process for a gaming machine that does not have a setting-related function. [Figure 639] 10 is a flowchart showing the procedure for the complete function initialization setting process in the gaming machine of this embodiment. [Figure 640] 10 is a program code for a complete function initialization setting process in the gaming machine of this embodiment. [Figure 641] 10 is a flowchart showing a procedure for a complete function process. [Figure 642] 10 is a program code for a complete function process. [Figure 643] 10 is a flowchart showing the procedure of a complete function control process. [Figure 644] 10 is a program code for a complete function control process. [Figure 645] 10 is a flowchart showing the procedure of a MY value calculation process. [Figure 646] This is the program code for the MY value calculation process. [Figure 647] FIG. 10 is a diagram illustrating an example of an outside-area switch information data table. [Figure 648] FIG. 10 is a diagram illustrating an example of the configuration of input information. [Figure 649] 10 is a flowchart showing the procedure of an actuation determination value calculation process for calculating an actuation determination value. [Figure 650] 10 is a flowchart showing a procedure for a complete function command transmission process. [Figure 651] 10 is a program code for a complete function command transmission process. [Figure 652] FIG. 10 is a diagram showing an example of a screen displaying the number of balls remaining until the complete function is activated. [Figure 653] This figure shows an example of a screen that receives a complete function activation notification command during a jackpot game state and displays a notification that the complete function will be activated. [Figure 654] FIG. 10 is a diagram showing an example of a screen displayed when a complete function is activated. [Figure 655]10 is a flowchart of an MY value subtraction process in which the MY value is not subtracted when the MY value is 0. [Figure 656] 10 is a flowchart of an MY value subtraction process for separately calculating a value to be subtracted from the MY value. DETAILED DESCRIPTION OF THE INVENTION

[0010] A pachinko machine 1 according to one embodiment of the present invention will be described in detail with reference to the drawings. First, the overall configuration of the pachinko machine 1 according to this embodiment will be described with reference to FIGS. 1 to 9. FIG. 1 is a front view of a pachinko machine according to one embodiment of the present invention. FIG. 2 is a right side view of the pachinko machine, FIG. 3 is a plan view of the pachinko machine, and FIG. 4 is a rear view of the pachinko machine. FIG. 5 is a perspective view of the pachinko machine as seen from the front, and FIG. 6 is a perspective view of the pachinko machine as seen from the rear. FIG. 7 is a perspective view of the pachinko machine as seen from the front with the door frame 3 opened from the main frame and the main frame 4 opened from the outer frame 2. FIG. 8 is an exploded perspective view of the pachinko machine as seen from the front, disassembled into the door frame 3, game board 5, main frame 4, and outer frame 2. FIG. 9 is an exploded perspective view of the pachinko machine as seen from the rear, disassembled into the door frame 3, game board 5, main frame 4, and outer frame 2.

[0011] The pachinko machine 1 of this embodiment comprises a frame-shaped outer frame 2 installed in an island facility (not shown) of an amusement hall, a door frame 3 that closes the front of the outer frame 2 in an openable and closable manner, a main frame 4 that supports the door frame 3 in an openable and closable manner and is attached to the outer frame 2 in an openable and closable manner, and a game board 5 that is detachably attached to the main frame 4 from the front and is visible from the player side through the door frame 3 and has a game area 5a into which game balls are shot by the player.

[0012] As shown in Figures 8 and 9, the outer frame 2 of the pachinko machine 1 comprises an upper frame member 10 and a lower frame member 20 that are spaced apart vertically and extend horizontally, and a left frame member 30 and a right frame member 40 that connect both ends of the upper frame member 10 and the lower frame member 20 and extend vertically. The upper frame member 10, the lower frame member 20, the left frame member 30, and the right frame member 40 are formed with the same front-to-back width. Furthermore, the vertical length of the left frame member 30 and the right frame member 40 is longer than the horizontal length of the upper frame member 10 and the lower frame member 20.

[0013] The outer frame 2 also includes a panel member 50 that connects the lower ends of the left and right frame members 30 and 40 and is attached to the front side of the lower frame member 20, an upper outer frame hinge member 60 that is attached to the left end side of the upper frame member 10 when viewed from the front, and a lower outer frame hinge member 70 that is attached to the upper part of the left end side of the panel member 50 when viewed from the front and to the left frame member 30. The upper outer frame hinge member 60 and lower outer frame hinge member 70 of the outer frame 2 attach the main frame 4 and the door frame 3 so that they can be opened and closed.

[0014] The door frame 3 of the pachinko machine 1 comprises a frame-shaped door frame base unit 100 having a rectangular outer shape when viewed from the front and a through-hole 111 penetrating from front to back, a tray unit 200 attached to the lower front of the door frame base unit 100 and having an upper tray 201 and a lower tray 202 capable of storing game balls, a top unit 350 attached to the upper front of the door frame base unit 100, a left side unit 400 attached to the left front of the door frame base unit 100, a right side unit 450 attached to the right front of the door frame base unit 100, and an upper tray 201 attached to the lower right front of the door frame base unit 100 by penetrating the tray unit 200. The door frame base unit 100 is provided with a handle unit 500 that can be operated by a player to shoot the game balls stored in 201 into the game area of ​​the game board 5, a foul cover unit 520 that is attached to the lower rear surface of the door frame base unit 100 and receives game balls that have failed to be shot into the game area and discharges them onto the lower tray 202 of the tray unit 200, a ball feeding unit 540 that is attached to the lower rear surface of the door frame base unit 100 and sends the game balls on the upper tray 201 to the ball launching device 680, a glass unit 560 that is attached to the rear surface of the door frame base unit 100 and closes the through hole 111, and a security cover 580 that covers the lower rear surface of the glass unit 560.

[0015] The main body frame 4 of the pachinko machine 1 comprises a frame-shaped main body frame base 600, a portion of which can be inserted into the outer frame 2 and which can support the outer periphery of the game board 5; a main body frame upper hinge member 620 and a main body frame lower hinge member 640 attached to both the upper and lower ends of the left side as viewed from the front of the main body frame base 600, which are rotatably attached to the outer frame upper hinge member 60 and the outer frame lower hinge member 70 of the outer frame 2, respectively, and to which the door frame upper hinge member 140 and the door frame lower hinge member 150 of the door frame 3 are rotatably attached, respectively; a reinforcing frame 660 attached to the left side as viewed from the front of the main body frame base 600; a ball launching device 680 attached to the right side of the main frame base when viewed from the front, for shooting game balls into the game area 5a of the game board 5; a locking unit 700 attached to the right side of the main frame base when viewed from the front, for locking the spaces between the outer frame 2 and the main frame 4, and between the door frame 3 and the main frame 4; an inverted L-shaped payout unit 800 attached to the rear side along the top and left sides of the main frame base 600 when viewed from the front, for paying out game balls to the player; a base unit 900 attached to the lower rear surface of the main frame base 600; and a back cover 980 attached to the rear side of the main frame base 600 in an openable and closable manner, for covering the rear side of the game board 5 attached to the main frame base 600.

[0016] A main control unit 1300 is provided inside the back cover 980, which controls the progress of games played on the pachinko machine 1. The main control unit 1300 is provided with a bonus feature ratio display. The bonus feature ratio display 1317 is configured, for example, by a four-digit seven-segment LED. The bonus feature ratio display 1317 may also be configured by a liquid crystal display device. The bonus feature ratio display 1317 may also be provided in the payout control board unit 950, rather than in the main control unit 1300.

[0017] Furthermore, instead of providing a separate display device for displaying the role ratio, the role ratio may be displayed on the liquid crystal display device 1600, 3114, or 244. In this case, if the role ratio is constantly displayed on one of the liquid crystal display devices 1600, 3114, or 244, the role ratio can be notified to the player, and the player may be able to check the condition of the pachinko machine.

[0018] As will be described later, the bonus feature ratio can be calculated by dividing the number of bonus feature balls by the total number of bonus feature balls. For example, a pachinko machine with a high bonus feature ratio (e.g., 90%) can be said to be performing well because it has obtained many prize balls from jackpots. On the other hand, a pachinko machine with a low bonus feature ratio (e.g., 10%) can be said to be performing poorly because it has few jackpot games and few prize balls during jackpots. Therefore, players can choose a pachinko machine to play by taking the bonus feature ratio into consideration.

[0019] As a mode for notifying the player of the role ratio, the value of the role ratio may be displayed on the main liquid crystal display device 1600. For example, if the role ratio is 70% or higher, the value is displayed in red and the frame lamp lights up red or flashes, and if it is between 69% and 30%, the value is displayed in green and the frame lamp lights up green or flashes. The role ratio value should be displayed in a manner that does not confuse it with the decorative symbols. For example, it may be displayed in a position that does not overlap with the display position of the decorative symbols when there is no fluctuation, or the size of the number indicating the role ratio may be smaller than the decorative symbols. The display mode may be divided into any number of stages.

[0020] Furthermore, the mode of the decorative symbols displayed on the main liquid crystal display device 1600 may be changed depending on the value of the bonus ratio to notify the player of the bonus ratio. For example, if the bonus ratio is 70% or higher, the decorative symbols are displayed in red and the frame lamp is lit red or flashes, and if the bonus ratio is between 69% and 30%, the decorative symbols are displayed in green and the frame lamp is lit green or flashes. The display mode may be divided into any number of stages.

[0021] It may also be displayed on the liquid crystal display device 244 provided on the door frame 3. In this case, the display mode described above may be changed, and other information may be displayed in addition to the ratio of the winning combinations. The other information may be the number of jackpots, the number of consecutive jackpots (the so-called consecutive wins), the number of balls held, the remaining balance, etc.

[0022] In addition to the role ratio, the role ratio of consecutive roles and the base value, which will be described later, may be displayed in a different manner as described above. The role ratio, the role ratio of consecutive roles, and the base value may each be displayed in a different manner.

[0023] 13, the main control unit 1300 is enclosed in a transparent resin main control board box 1320 that is sealed with a structure that makes it impossible to open without destroying it once closed, and the components arranged on the printed circuit board can be seen from the outside. Furthermore, for example, if the back cover 980 is made of transparent resin, the main control unit 1300 can be seen from the back side of the pachinko machine 1, and the bonus feature ratio indicator 1317 provided on the main control unit 1300 can be seen from the back side of the pachinko machine 1. By enclosing the bonus feature ratio indicator 1317 in the main control board box 1320, it is possible to prevent unauthorized modification of the bonus feature ratio indicator 1317 in order to make the gambling aspect of the pachinko machine 1 appear lower, and it is possible to accurately display the gambling aspect of the pachinko machine 1.

[0024] In addition, if the back cover 980 is formed of an opaque resin, it is possible to make the reel ratio display 1317 visible from the back side of the pachinko machine 1 by drilling a hole in the back cover 980 at the position of the reel ratio display 1317 or by making the position of the reel ratio display 1317 transparent.

[0025] Furthermore, even if the back cover 980 is formed from a transparent resin, the surface of the back cover 980 at the position of the reel ratio display 1317 may be made flat or the back cover 980 may be made thin, so that the reel ratio display 1317 can be easily seen from the back side of the pachinko machine 1.

[0026] A discharge port is provided at the bottom of the rear surface of the pachinko machine 1 to collect game balls that have flowed out of the game area 5a via the outlet 1111 and the winning ports 2001, 2005, 2006, etc., and discharge them to the outside of the pachinko machine 1. The game balls discharged from the discharge port are supplied to the ball tank 802 through the island equipment. The pachinko machine 1 of this embodiment is provided with a discharge ball sensor 3060 that detects game balls discharged from the discharge port.

[0027] As shown in FIG. 13 , the main control unit 1300 is provided with a display switch 1318. The main control board box 1320 is provided with a hole through which the display switch 1318 can be operated. It is preferable to indicate (by printing, engraving, sticker, etc.) on the printed circuit board near the display switch 1318 or on the main control board box 1320 that this is a switch for operating the display of the bonus feature ratio. While the display switch 1318 is preferably provided near the bonus feature ratio display 1317, it may also be provided on another board (e.g., the performance control board 4700 or the power supply unit 4112), the housing 4100, or the front member 4200, as long as it is easily operable, rather than on the main control unit 1300. The display switch 1318 may also be provided on the peripheral control unit 1500, a relay board provided separately from the main control unit 1300, a power supply board in the power supply board box 930 on the frame side, or the payout control board unit 950. As will be described later, the display switch 1318 may also serve as a RAM clear switch. By placing the display switch 1318 in a position where it cannot be operated by the player, it is possible to prevent the player from operating it by mistake.

[0028] The payout unit 800 of the main frame 4 comprises an inverted L-shaped payout unit base 801 attached to the rear side of the main frame base 600, a ball tank 802 attached to the top of the payout unit base 801, which is a box-shaped tank that is open upward and extends to the left and right, and which stores game balls supplied from an island facility (not shown), a tank rail 803 attached to the payout unit base 801 below the ball tank 802 and extends to the left and right to guide the game balls in the ball tank 802 to the left as viewed from the front, a ball guide unit 820 attached to the rear surface of the upper left side as viewed from the front of the payout unit base 801 and guides the game balls from the tank rail 803 downward in a serpentine shape, and a payout control board unit 9 attached to the payout unit base 801 below the ball guide unit 820 so as to be detachable from the payout unit base 801, which guides the game balls guided by the ball guide unit 820. 50 based on instructions from a payout control board 951 (see Figure 17), an upper full ball path unit 850 attached to the rear surface of the payout unit base 801 and guiding the game balls paid out by the payout device 830 downward and releasing the game balls from either a normal release port or a full release port depending on the storage state of the game balls on the upper tray 201 of the tray unit 200, and a lower full ball path unit 860 attached to the lower end of the payout unit base 801 and having a normal guide path that guides the game balls released from the normal release port of the upper full ball path unit 850 forward and from the front end to the through ball passage 526 of the door frame 3, and a full guide path that guides the game balls released from the full release port forward and from the front end to the full ball receiving port 530 of the door frame 3.

[0029] The board unit 900 of the main body frame 4 comprises a board unit base 910 attached to the rear side of the main body frame base 600, a speaker unit 920 attached to the rear side of the main body frame base 600 on the left side of the board unit base 910 when viewed from the front and having a low-frequency speaker 921 inside, a power supply board box 930 attached to the rear side of the board unit base 910 on the right side when viewed from the front and having a power supply board inside, an interface control board box 940 attached to the rear of the speaker unit 920 and having an interface control board inside, and a payout control board unit 950 attached across the power supply board box 930 and the interface control board box 940 and having a payout control board 951 inside that controls the payout of game balls.

[0030] As shown in Figures 8 and 9, the game board 5 of the pachinko machine 1 comprises a front component 1000 having outer rails 1001 and inner rails 1002 that define the outer periphery of a game area 5a into which game balls are shot and guide game balls shot from a ball launcher 680 to the upper part of the game area 5a, a flat game panel 1100 attached to the rear side of the front component 1000 and defining the rear end of the game area 5a, and a box-shaped game panel 1100 attached to the lower rear side of the game panel 1100 and open upward. The pachinko machine 1 comprises a board holder 1200, a main control unit 1300 attached to the rear side of the board holder 1200 and having a main control board 1310 for controlling the play of the pachinko machine 1, a front unit (not shown) attached to the front side of the play area 5a of the play panel 1100 and having a plurality of winning openings capable of receiving game balls shot into the play area 5a, and a back unit 3000 attached to the rear side of the play panel 1100 above the board holder 1200.

[0031] In the pachinko machine 1 of this embodiment, when a player rotates the handle lever 504 while game balls are stored in the upper tray 201, the ball launcher 680 shoots the game balls into the game area 5a of the game board 5 with a strength corresponding to the rotation angle of the handle lever 504. When the game balls shot into the game area 5a are received by a winning hole (not shown), a predetermined number of game balls are paid out to the upper tray 201 by the payout device 830 according to the winning hole into which the game balls were received. This payout of game balls can increase the player's interest, and the game balls in the upper tray 201 can be shot into the game area 5a, allowing the player to enjoy the game.

[0032] [2. Overall structure of the game board] Next, the overall configuration of the game board 5 of the pachinko machine 1 will be described in detail with reference to Figures 10 to 16. Figure 10 is a front view of the game board. Figure 11 is a perspective view of the game board seen from the front right, Figure 12 is a perspective view of the game board seen from the front left, and Figure 13 is a perspective view of the game board seen from the rear. Figure 14 is an exploded perspective view of the game board disassembled into its main components as seen from the front, and Figure 15 is an exploded perspective view of the game board disassembled into its main components as seen from the rear. Furthermore, Figure 16 is a front view of the front components and the front unit of the game board cut approximately at the center in the front-to-rear direction within the playing area.

[0033] The gaming board 5 of this embodiment has a gaming area 5a into which gaming balls are shot by a player operating the handle lever 504 of the handle unit 500. The gaming board 5 also includes a front component 1000 that defines the outer periphery of the gaming area 5a and has a generally rectangular outline when viewed from the front, a plate-shaped gaming panel 1100 attached to the rear side of the front component 1000 and defining the rear end of the gaming area 5a, a board holder 1200 attached to the lower rear side of the gaming panel 1100, and a main control unit 1300 attached to the rear surface of the board holder 1200 and having a main control board 1310 (see FIG. 17) that controls the game content played by shooting gaming balls into the gaming area 5a. A plurality of obstacle nails that come into contact with the gaming balls are planted in a predetermined gauge arrangement (not shown) on the front of the gaming panel 1100 in a portion that will be within the gaming area 5a.

[0034] The gaming board 5 also includes a function display unit 1400 that displays the game status based on a control signal from the main control board 1310 and is attached to the lower left corner of the front component 1000 so as to be visible to the player, a peripheral control unit 1500 that is attached to the rear of the gaming panel 1100, a main liquid crystal display device 1600 that is located in the center of the gaming area 5a when viewed from the front and is capable of displaying predetermined effect images, a front unit 2000 that is attached to the front of the gaming panel 1100, and a rear unit 3000 that is attached to the rear of the gaming panel 1100. The main liquid crystal display device 1600 is attached to the rear of the rear unit 3000, and the peripheral control unit 1500 is attached to the rear of the main liquid crystal display device 1600.

[0035] The game panel 1100 comprises a transparent, flat panel plate 1110 whose outer periphery is formed slightly larger than the inner periphery of the frame-shaped front component 1000, and a frame-shaped panel holder 1120 which holds the outer periphery of the panel plate 1110, is attached to the rear side of the front component 1000, and has a rear unit 3000 attached to its rear surface.

[0036] The front unit 2000 is equipped with a plurality of general winning openings 2001 that are always open so that they can accept game balls that have been shot into the game area 5a, a first starting opening 2002 that is always open so that it can accept game balls at a different position in the game area 5a from the plurality of general winning openings 2001, a gate unit 2003 that is attached to a predetermined position in the game area 5a and detects the passage of game balls, a second starting opening 2004 that can accept game balls depending on the result of a normal lottery that is drawn when a game ball passes through the gate unit 2003, and a first large winning opening 2005 and a second large winning opening 2006 that can either accept game balls depending on the result of a first special lottery or a second special lottery that is drawn when a game ball is accepted into the first starting opening 2002 or the second starting opening 2004. The second large prize opening 2006 is composed of two large prize openings, a second upper large prize opening 2006a and a second lower large prize opening 2006b, which are arranged in one flow path through which game balls circulate (see Figure 16).

[0037] The front unit 2000 also includes a start port unit 2100 which is attached directly above the outlet 1111 in the left-right center of the game area 5a and has a first start port 2002 and a first large prize port 2005, a lower side unit 2200 which is attached along the inner rail 1002 to the left of the start port unit 2100 when viewed from the front and has three general prize ports 2001, an upper side unit 2300 which is attached above the left end of the lower side unit 2200 when viewed from the front, and a frame-shaped center device 2500 which is attached approximately in the center of the game area 5a and has one general prize port 2001, a gate section 2003, a second start port 2004, and a second large prize port 2006.

[0038] The rear unit 3000 is attached to the rear surface of the panel holder 1120 and is box-shaped with an open front and a square opening 3010a in the rear wall. The rear box 3010 is arranged at a predetermined position within the rear box 3010 and has a plurality of general winning opening sensors 3015 for detecting game balls received in the general winning opening 2001 of the front unit 2000. The rear unit 3000 is attached to the rear surface of the rear box 3010 and has a locking mechanism for detachably attaching the main liquid crystal display device 1600. 3020, a right ball passage unit 3030 attached to the right end of the rear box 3010 when viewed from the front, for discharging game balls received in the general winning opening 2001 and the second starting opening 2004 of the center device 2500, and a lower right ball passage unit 3035 attached near the front end of the lower right corner when viewed from the front, for discharging game balls received in the second large winning opening 2006 and the second out opening 2543c of the center device 2500.

[0039] The rear unit 3000 also includes an upper relay board 3040 attached to the rear surface of the rear box 3010, an upper relay board cover 3041 that covers the rear side of the upper relay board 3040, a box-shaped performance drive board box 3042 that is rotatably attached to the rear surface of the rear box 3010, a performance drive board 3043 housed within the performance drive board box 3042, a panel relay board 3044 attached to the rear surface of the rear box 3010, and a panel relay board cover 3045 that covers the rear side of the panel relay board 3044.

[0040] Furthermore, the back unit 3000 is equipped with a back left middle decorative unit 3050 which is attached at the front end of the back box 3010, towards the top from the center in the vertical direction on the left side when viewed from the front, a back bottom rear movable performance unit 3100 which is attached below the opening 3010a inside the back box 3010 and near the rear wall of the back box 3010, a back top left movable performance unit 3200 which is attached above the opening 3010a inside the back box 3010 and on the left side when viewed from the front, a back left movable performance unit 3300 which is attached to the left side of the opening 3010a inside the back box 3010 when viewed from the front, a back top middle movable performance unit 3400 which is attached above the opening 3010a inside the back box 3010 from the center in the horizontal direction to the right edge when viewed from the front, and a back bottom front movable performance unit 3500 which is attached below the opening 3010a inside the back box 3010 in front of the back bottom rear movable performance unit 3100.

[0041] [2-1. Front components] Next, the front component 1000 will be described mainly with reference to Figures 14 and 15. The front component 1000 has an approximately square outer shape in a front view, an approximately circular inner shape that penetrates in the front-rear direction, and the inner periphery of the inner shape defines the outer periphery of the play area 5a. The front component 1000 includes an outer rail 1001 that extends in an arc shape from the lower end toward the left of the center in the front view to the upper right, passing the upper end of the center in the front view to the upper right; an inner rail 1002 that is disposed inside the front component 1000 and extends in an arc shape from the lower center in the front view to the upper left of the front view; and an out guide portion 1003 that is formed at the lowest position of the play area 5a on the right side of the lower end of the inner rail 1002 in a front view and slopes downward toward the rear.

[0042] The front component 1000 also includes a lower right rail 1004 that slopes linearly from the right end of the out guide section 1003 when viewed from the front to near the right edge of the front component 1000, with the right end being slightly higher; a right rail 1005 that extends from the right end of the lower right rail 1004 along the right edge of the front component 1000 to below the upper end of the outer rail 1001, with the upper part curved inward of the front component 1000; and a collision stop section 1006 that connects the upper end of the right rail 1005 to the upper end of the outer rail 1001 and against which a game ball rolling along the outer rail 1001 comes into contact.

[0043] In addition, the component 1000 is rotatably supported on the upper end of the inner rail 1002, and is equipped with a backflow prevention member 1007 which can rotate only between a closed position in which it extends upward from the upper end of the inner rail 1002 to close the space between it and the outer rail 1001, and an open position in which it rotates clockwise when viewed from the front to open the space between it and the outer rail 1001, and which is biased by a spring (not shown) to return to the closed position.

[0044] A fired ball sensor 1020 is provided on the back side of the gaming board 5 near the exit of the rails 1001, 1002 (preferably immediately after passing through the backflow prevention member 1007) to detect gaming balls that have been shot into the gaming area 5a. For example, the fired ball sensor 1020 is configured with a magnetic sensor, which outputs a signal when it detects a gaming ball that has passed through the backflow prevention member 1007 and flowed into the gaming area 5a. The fired ball sensor 1020 may also be provided at a position in the gaming area that the gaming ball will always pass through. Fixing the position of the fired ball sensor 1020 on the gaming board 5 allows specifications to be standardized across multiple models, facilitating inspection at the manufacturing site and post-installation inspection at the hall.

[0045] In addition, the shot ball sensor 1020 installed upstream of the game area 5a, such as near the exit of the rails 1001 and 1002, detects the out ball before the winning hole sensor detects the game ball entering. In other words, since the game balls are detected in the order of out balls and then prize balls, prize balls resulting from game balls not counted as out balls are not detected, and the base value can be calculated accurately.

[0046] [2-2. Game Panel] Next, the gaming panel 1100 will be described mainly with reference to Figures 14 and 15. The gaming panel 1100 includes a flat panel board 1110 made of transparent synthetic resin and having an outer periphery slightly larger than the inner periphery of the frame-shaped front component member 1000, and a frame-shaped panel holder 1120 that holds the outer periphery of the panel board 1110 and is attached to the rear side of the front component member 1000, with the rear surface to which the back unit 3000 is attached. The panel board 1110 of the gaming panel 1100 has an outlet 1111 penetrating from front to rear at the lowest position within the playing area 5a. The panel board 1110 also has a plurality of openings 1112 penetrating from front to rear for attaching the front unit 2000.

[0047] The panel holder 1120 of the game panel 1100 detachably holds the panel board 1110 from the rear side. The panel holder 1120 also has a plurality of mounting holes for mounting the rear unit 3000 and a plurality of positioning holes formed on the rear surface.

[0048] When the gaming panel 1100 is attached to the rear side of the front component 1000, the outlet 1111 of the panel board 1110 opens to the rear side of the out guide portion 1003 of the front component 1000. As a result, gaming balls that have flowed down to the bottom end of the gaming area 5a are guided by the out guide portion 1003 to the rear outlet 1111, and are discharged through the outlet 1111 to the rear side of the gaming panel 1100.

[0049] [2-3. Substrate holder] Next, the board holder 1200 will be described with reference to Figures 11 to 15. The board holder 1200 is formed in the shape of a horizontally long box that is open at the top and front, and the bottom is inclined so that it becomes lower toward the center in the left-right direction. When assembled to the gaming board 5, this board holder 1200 can cover from below the lower part of the back unit 3000 attached to the rear side of the gaming panel 1100. This allows it to receive all gaming balls that are discharged to the rear side of the gaming panel 1100 through the outlet 1111 and gaming balls that are discharged downward from the front unit 2000 and the back unit 3000, and to discharge them downward from a discharge portion 1201 (see Figure 14) formed on the bottom surface.

[0050] [2-4. Main control board unit] Next, the main control unit 1300 will be described with reference to Figures 11 to 15 and 17. The main control unit 1300 is detachably attached to the rear surface of the board holder 1200. This main control unit 1300 includes a main control board 1310 that controls the game content and the payout of game balls, and a main control board box 1320 that houses the main control board 1310 and is attached to the board holder 1200.

[0051] Main control board box 1320 is equipped with multiple sealing mechanisms, and when main control board box 1320 is closed using one sealing mechanism, that sealing mechanism must be destroyed in order to open main control board box 1320, leaving traces of the opening and closing of main control board box 1320. Therefore, by looking at the traces of opening and closing, unauthorized opening and closing of main control board box 1320 can be discovered, providing an increased deterrent against unauthorized acts on main control board 1310.

[0052] [2-5. Function display unit] Next, the function display unit 1400 will be described with reference to Figures 10 to 12. As shown in the figures, the function display unit 1400 is attached to the lower left corner of the front component 1000 outside the game area 5a. When the game board 5 is assembled to the pachinko machine 1, this function display unit 1400 can be seen from the front (player's side) through the through hole 111 of the door frame 3 (see Figure 1). This function display unit 1400 uses multiple LEDs based on control signals from the main control board 1310 to display the game status (game situation), normal lottery results, special lottery results, etc.

[0053] Although not shown in detail, the function display unit 1400 includes a status indicator consisting of one LED that displays the game status, a normal pattern display that displays normal patterns by controlling the blinking of two LEDs based on the result of a normal lottery drawn when a gaming ball passes through the gate unit 2003, and then displays these two LEDs in a lighting mode corresponding to the result of the normal lottery, a normal hold display that includes two LEDs that displays the number of hold indicators, which is the number of variable displays of normal patterns related to the passage of a gaming ball through the gate unit 2003 for which the start condition for the variable display has not yet been met, a first special pattern display that displays first special patterns by controlling the blinking of eight LEDs based on the result of a first special lottery drawn when a gaming ball is received at the first starting port 2002 (occurrence of a start winning), and then displays these eight LEDs in a lighting mode corresponding to the result of the first special lottery. The machine mainly comprises a first special reserve number display consisting of two LEDs for displaying the reserve number, which is the number of variable displays of the first special pattern for which the conditions for starting the variable display have not yet been met, a second special pattern display which controls the blinking of the eight LEDs based on the result of a second special lottery drawn upon the acceptance of a game ball into the second starting port 2004 (the occurrence of a start winning), thereby displaying the variable display of the second special pattern and then displaying these eight LEDs in a lighting mode according to the result of the second special lottery, a second special reserve number display consisting of two LEDs for displaying the reserve number, which is the number of variable displays of the second special pattern for which the conditions for starting the variable display have not yet been met, among the variable displays of the second special pattern related to the acceptance of a game ball into the second starting port 2004, and a round display consisting of two LEDs for displaying the number of times (number of rounds) the opening and closing pattern of the first large winning port 2005 or the second large winning port 2006 is repeated when the result of the first special lottery or the result of the second special lottery is a "jackpot" or the like. Note that some of the displays of the function display unit 1400 (for example, the first special symbol display) may be configured with a 7-segment LED.

[0054] This functional display unit 1400 can display the number of reserved items, designs, etc. by turning on, off, blinking, etc. the LEDs provided as appropriate.

[0055] [2-6. Peripheral Control Unit] Next, the peripheral control unit 1500 will be described with reference to Figures 13 and 15. The peripheral control unit 1500 is attached to the rear surface of the rear box 3010 of the rear unit 3000. The peripheral control unit 1500 comprises a peripheral control board 1510 (see Figure 17) that controls the effects presented to the player based on control signals from the main control board 1310, and a peripheral control board box 1520 that houses the peripheral control board 1510. The peripheral control board 1510 comprises a peripheral control unit 1511 for controlling light emission effects, sound effects, movement effects, etc., and a liquid crystal display control unit 1512 for controlling effect images (see Figure 17).

[0056] [2-7. Main LCD display] Next, the main liquid crystal display device 1600 will be described with reference to Figs. 10 to 16. The main liquid crystal display device 1600 is disposed in the center of the game area 5a when viewed from the front, and is attached to the rear side of the game panel 1100 via the rear box 3010 of the rear unit 3000. More specifically, the main liquid crystal display device 1600 is detachably attached to the rear surface at approximately the center of the rear wall of the rear box 3010. When the game board 5 is assembled, the main liquid crystal display device 1600 can be viewed from the front (player's side) through the frame of the frame-shaped center device 2500. The main liquid crystal display device 1600 is a full-color display device backlit by white LEDs, and is capable of displaying still images and moving images.

[0057] 14 and 15, the main LCD display device 1600 has two left fixing pieces 1601 protruding outward from the left side as viewed from the front, and a right fixing piece 1602 protruding outward from the right side as viewed from the front. With the LCD screen facing forward, the main LCD display device 1600 is attached to the rear box 3010 by inserting the two left fixing pieces 1601 from the diagonal rear of the rear box 3010 into two fixing grooves 3010c that open into the inner peripheral surface, as viewed from the front, of a frame-shaped LCD mounting portion of the rear box 3010 (described later), and then moving the right fixing piece 1602 forward to insert the right fixing piece 1602 into the opening of the locking mechanism 3020 and sliding the locking mechanism 3020 downward.

[0058] [2-8. Overall structure of the table unit] Next, the front unit 2000 will be described mainly with reference to Figures 10 to 12 and 14 to 16. The front unit 2000 of the gaming board 5 is attached to the panel plate 1110 of the gaming panel 1100 from the front, with its front end protruding forward from the front surface of the panel plate 1110 and its rear end penetrating the opening 1112 and protruding rearward from the rear surface of the panel plate 1110. The front unit 2000 of this embodiment is equipped with a plurality of general winning openings 2001 that are always open and can accept game balls that have been shot into the game area 5a, a first starting opening 2002 that is always open and can accept game balls at a different position in the game area 5a from the plurality of general winning openings 2001, a gate unit 2003 that is attached to a predetermined position in the game area 5a and detects the passage of game balls, a second starting opening 2004 that can accept game balls depending on the result of a normal lottery that is drawn when the game ball passes through the gate unit 2003, and a first large winning opening 2005 and a second large winning opening 2006 that can accept game balls depending on either the result of a first special lottery or the result of a second special lottery that is drawn when a game ball is accepted into the first starting opening 2002 or the second starting opening 2004.

[0059] Of the multiple (four in this example) general winning openings 2001, three are located at the bottom of the play area 5a, and the remaining one is located near the top right of the play area 5a when viewed from the front. The first starting opening 2002 is located directly above the outlet 1111 in the center of the play area 5a in the left-right direction. The gate unit 2003 is located at the top right of the play area 5a when viewed from the front, and approximately directly below the impact stopper 1006. The second starting opening 2004 is located directly below the gate unit 2003 and to the right when viewed from the front. Of the multiple general winning openings 2001 described above, the general winning opening 2001 located near the top right of the play area 5a when viewed from the front is located directly above the second starting opening 2004. The first large winning opening 2005 is located between the first starting opening 2002 and the outlet 1111. The second major winning opening 2006 is located to the right of the first starting opening 2002 when viewed from the front, and above the first major winning opening 2005.

[0060] The second large prize opening 2006 in the front unit 2000 is composed of a second upper large prize opening 2006a and a second lower large prize opening 2006b arranged along one flow path through which game balls circulate, as shown in Fig. 16. The second large prize opening 2006 is such that the second upper large prize opening 2006a is arranged near the lower right when viewed from the front within the game area 5a, and the second lower large prize opening 2006b is arranged below and on the left side of the second upper large prize opening 2006a when viewed from the front.

[0061] The front unit 2000 also includes a start port unit 2100 which is attached directly above the outlet 1111 in the left-right center of the game area 5a and has a first start port 2002 and a first large prize port 2005, a lower side unit 2200 which is attached along the inner rail 1002 to the left of the start port unit 2100 when viewed from the front and has three general prize ports 2001, an upper side unit 2300 which is attached above the left end of the lower side unit 2200 when viewed from the front, and a frame-shaped center device 2500 which is attached approximately in the center of the game area 5a and has one general prize port 2001, a gate section 2003, a second start port 2004, and a second large prize port 2006.

[0062] [2-8a. Starting unit] Next, the start opening unit 2100 of the front unit 2000 will be described. The start opening unit 2100 is located in the gaming area 5a, near the bottom end in the center of the left-right direction, directly above the outlet 1111, and is attached to the panel board 1110 from the front. This start opening unit 2100 has a first start opening 2002 and a first large winning opening 2005.

[0063] The starting port unit 2100 comprises a flat unit base 2101 attached to the front of the panel board 1110, having a rectangular first large prize opening 2005 extending left and right and penetrating front and back, a ball receiving section 2102 protruding forward from the upper part of the unit base 2101 above the first large prize opening 2005 and approximately in the center in the left-right direction, forming the first starting port 2002, a ball guiding section 2103 attached to the rear of the unit base 2101 and guiding game balls received in the first starting port 2002 downward, a first starting port sensor 2104 attached to the ball guiding section 2103 and detecting game balls received in the first starting port 2002, and a first attacker unit 2110 attached to the rear of the unit base 2101 to close the first large prize opening 2005.

[0064] The first attacker unit 2110 of the starting opening unit 2100 comprises a box-shaped unit case 2111 attached to the rear surface of the unit base 2101 so as to close the first major winning opening 2005 from the rear, the front end of which is approximately the same size as the first major winning opening 2005 and is open to the front, a horizontally elongated rectangular, flat first major winning opening door member 2112 whose lower side is rotatably supported at the front end of the unit case 2111 so as to be able to open and close the first major winning opening 2005, and a first attacker solenoid attached inside the unit case 2111 which drives the first major winning opening door member 2112 to open and close. The unit case 2111 is provided with a start port unit relay board 2115 which is attached to the top surface of the unit case 2111 and relays the connection between the first start port sensor 2104, the first attacca solenoid, and the first large prize port sensor 2114 and the main control board 1310, and a start port unit decorative board (not shown) which is attached to the bottom of the unit case 2111 and illuminates and decorates the first large prize port 2005.

[0065] The ball receiving portion 2102 forming the first starting opening 2002 is open upward and large enough to receive only one game ball at a time. The first large winning opening 2005 penetrating the unit base 2101 is open forward and large enough to receive multiple game balls (for example, 4 to 6) at a time.

[0066] The start port unit 2100 has a first start port 2002 formed by a ball receiving portion 2102 that opens upward, and a gaming ball received in the first start port 2002 is guided downward at the rear of the unit base 2101 by a ball guide portion 2103, and after being detected by a first start port sensor 2104, the gaming ball can be discharged downward through the first attacker unit 2110. In this embodiment, two first start port sensors 2104 are provided, and the main control board 1310 determines that a gaming ball has been received in the first start port 2002 when the two first start port sensors 2104 detect a gaming ball within a predetermined time range. This makes it possible to detect fraudulent activity such as the insertion of an illegal tool into the first start port 2002.

[0067] In the starting port unit 2100, by attaching the first attacker unit 2110 to the rear surface of the unit base 2101, the first major prize port door member 2112 of the first attacker unit 2110 is inserted from the rear into the first major prize port 2005 that opens in the unit base 2101, thereby closing the first major prize port 2005. In an upright state closing the first major prize port 2005, this first major prize port door member 2112 is rotatably attached to the unit case 2111 at both left and right ends of its lower edge, and by rotating the upper edge so that it moves forward and downward, the first major prize port 2005 can be changed from a closed state to an open state.

[0068] The first major prize opening door element 2112 of the first attacca unit 2110 stands upright in the normal state (when the first attacca solenoid 2113 is not energized), closing the first major prize opening 2005. When the first attacca solenoid 2113 is energized according to the game status, the first major prize opening door element 2112 rotates so that the top edge moves forward and downward, and the top edge is positioned slightly higher than the bottom edge. In other words, the first major prize opening door element 2112 is inclined so that it rises forward from the bottom edge of the first major prize opening 2005.

[0069] In this state, when a gaming ball flows down in front of the first major prize opening 2005 and abuts against the first major prize opening door member 2112, the inclination of the first major prize opening door member 2112 changes the flow direction of the gaming ball from below to behind, and the gaming ball is received by the first major prize opening 2005 and enters the unit case 2111. Then, the gaming ball received by the first major prize opening 2005 is detected by the first major prize opening sensor 2114, and is then discharged downward from the underside of the unit case 2111.

[0070] [3. Control configuration] Next, the control configuration for performing various controls of the pachinko machine 1 will be described with reference to FIG. 17. FIG. 17 is a block diagram showing the control configuration of the pachinko machine. As shown in the figure, the main control configuration of the pachinko machine 1 is composed of a main control board 1310 and a peripheral control board 1510 attached to the game board 5, and a payout control board 951 attached to the main body frame 4, with each board performing its own control. The main control board 1310 controls the game operation (progress of the game). The peripheral control board 1510 is equipped with a peripheral control unit 1511 that controls various effect devices during play based on commands from the main control board 1310, and a liquid crystal display control unit 1512 that controls the display of effect images on the main liquid crystal display device 1600, the upper tray liquid crystal display device 244, etc. based on commands from the peripheral control unit 1511. The payout control board 951 includes a payout control unit 952 that controls the payout of game balls, and a launch control unit 953 that controls the launch of game balls by rotating the handle lever 504.

[0071] [3-1. Main control board] The main control board 1310 that controls the progress of the game is equipped with a main control MPU 1311, which is a microprocessor that incorporates a ROM 1313 that stores various processing programs and commands, a RAM 1312 that temporarily stores data, a main control I / O port 1314 as an input / output device (I / O device), a main control input circuit 1315 that receives detection signals from various detection switches, a main control solenoid drive circuit 1316 that drives various solenoids, and a RAM clear switch that completely erases information stored in the RAM built into the main control MPU 1311. In addition to the built-in ROM and RAM, the main control MPU 1311 also incorporates a watchdog timer that monitors its operation (system), a function to prevent fraud, etc.

[0072] The main control MPU 1311 of the main control board 1310 detects a game ball received in the first start opening 2002, a second start opening sensor 2551 detects a game ball received in the second start opening 2004, a general winning opening sensor 3015 detects a game ball received in the general winning opening 2001, a gate sensor 2547 detects a game ball that has passed through the gate section 2003, a game ball that has passed through the first large winning opening 2005, and a game ball that has passed through the first large winning opening 2006. Detection signals from the first large prize opening sensor 2114 which detects game balls received by the second upper large prize opening 2006a and second lower large prize opening 2006b as the second large prize opening 2006, the second upper large prize opening sensor 2554 and the second lower large prize opening sensor 2557 which detect game balls received by the second upper large prize opening 2006a and second lower large prize opening 2006b as the second large prize opening 2006, the ejected ball sensor 3060, the launched ball sensor 1020, and the magnetic detection sensor which detects illegal magnetism within the game area 5a are each input via the main control I / O port 1314.

[0073] Based on these detection signals, the main control MPU 1311 outputs control signals from the main control I / O port 1314 to the main control solenoid drive circuit, thereby outputting drive signals to the start port solenoid 2550, the first attacca solenoid 2113, the second upper attacca solenoid 2553, and the second lower attacca solenoid 2556, and also outputs drive signals from the main control I / O port 1314 to the first special pattern display, the second special pattern display, the first special pattern memory display, the second special pattern memory display, the normal pattern display, the normal pattern memory display, the game status display, the round display, etc. of the function display unit 1400.

[0074] In this embodiment, the first start opening sensor 2104, the second start opening sensor 2551, the gate sensor 2547, the first large prize opening sensor 2114, the second upper large prize opening sensor 2554, and the second lower large prize opening sensor 2557 use non-contact electromagnetic proximity switches, whereas the general prize opening sensor 3015 uses a contact ON / OFF mechanical switch. This is because game balls frequently enter the first start opening 2002 and the second start opening 2004 and frequently pass through the gate section 2003, so that the first start opening sensor 2104, the second start opening sensor 2551, and the gate sensor 2547 frequently detect game balls. For this reason, the first start opening sensor 2104, the second start opening sensor 2551, and the gate sensor 2547 use proximity switches that are highly durable and have a long lifespan. Furthermore, when a favorable game state (such as a "jackpot" game) occurs that is advantageous to the player, the first large prize opening 2005 and the second large prize opening 2006 open (or enlarge) and game balls frequently enter the opening, so that the first large prize opening sensor 2114, the second upper large prize opening sensor 2554, and the second lower large prize opening sensor 2557 also frequently detect game balls. For this reason, the first large prize opening sensor 2114, the second upper large prize opening sensor 2554, and the second lower large prize opening sensor 2557 also use proximity switches that are highly durable and have a long lifespan. In contrast, the general prize opening 2001, which does not receive game balls frequently, does not frequently receive detection by the general prize opening sensor 3015. For this reason, the general prize opening sensor 3015 uses a mechanical switch that has a shorter lifespan than a proximity switch.

[0075] Furthermore, the main control MPU 1311 transmits various information related to games (game information) and various commands related to payouts to the payout control board 951, and receives various commands related to the state of the pachinko machine 1 from the payout control board 951. Furthermore, the main control MPU 1311 transmits various commands related to the control of game presentations executed on the main liquid crystal display device 1600 and the like, and various commands related to the state of the pachinko machine 1, to the peripheral control unit 1511 of the peripheral control board 1510 via the main control I / O port 1314. When the main control MPU 1311 receives various commands related to the state of the pachinko machine 1 from the payout control board 951, it formats these various commands and transmits them to the peripheral control unit 1511.

[0076] Various voltages are supplied to the main control board 1310 from the power supply board in the power supply board box 930. The power supply board that supplies various voltages to the main control board 1310 is equipped with an electric double layer capacitor (hereinafter simply referred to as "capacitor") as a backup power source to supply power to the main control board 1310 for a predetermined period of time even when the power is cut off. This capacitor allows the main control MPU 1311 to store various information in RAM 1312 during power-off processing even when the power is cut off. This stored information is completely erased (cleared) from RAM 1312 when the RAM clear switch on the main control board 1310 is operated when the power is turned on. An operation signal (detection signal) of this RAM clear switch is also output to the dispensing control board 951.

[0077] The main control board 1310 is also provided with a power outage monitoring circuit. This power outage monitoring circuit monitors drops in various voltages supplied from the power supply board, and when these voltages fall below the power outage warning voltage, it outputs a power outage warning signal as a power outage warning. This power outage warning signal is input to the main control MPU 1311 via the main control I / O port 1314, and is also output to the dispensing control board 951, etc.

[0078] A role ratio display 1317 is attached to the main control board 1310 at a position visible from the rear side of the pachinko machine 1. The role ratio display 1317 displays the role ratio calculated by the main control MPU 1311.

[0079] Furthermore, the main control board 1310 is provided with a display switch 1318. The display switch 1318 is preferably configured as a push button switch with momentary action, but other types of switches may also be used. When the display switch 1318 is operated, the reel ratio is displayed on the reel ratio display 1317. Note that the reel ratio display 1317 may always display the reel ratio, and the display content may be switched by operating the display switch 1318.

[0080] FIG. 18 is a diagram showing the internal configuration of the main control MPU 1311.

[0081] The main control MPU 1311 has a CPU 13111, a RAM 1312, a ROM 1313, a random number generation circuit 13112, a parallel input port 13113, a serial communication circuit 13114, a timer circuit 13115, an interrupt controller 13116, an external bus interface 13117, a clock circuit 13118, a matching block 13119, unique information 13120, an arithmetic circuit 13121 and a reset circuit 13122.

[0082] The CPU 13111 executes a program stored in the ROM 1313. The RAM 1312 stores data required when the program is executed.

[0083] The main control MPU 1311 is provided with one or more random number generating circuits 13112. The random number generating circuit 13112 provides random numbers for determining the lottery results of the variable display game (first special lottery result, second special lottery result) and the presentation content of the variable display game. The random number generating circuit 13112 is a so-called hardware random number generating means that outputs random numbers updated at the timing of a clock cycle (or a signal obtained by dividing the clock cycle) supplied to the main control MPU 1311, for example. The hardware random numbers generated by the random number generating circuit 13112 are used for drawing lots for winning special symbols, drawing lots for winning symbols in the special symbol variable display game, and drawing lots for winning normal symbols.

[0084] The parallel input port 13113 is a port to which detection signals from various detection switches are input via a main control input circuit 1315 .

[0085] The serial communication circuit 13114 transmits and receives various commands related to the control of game presentations and various commands related to the state of the pachinko machine 1 to and from the peripheral control unit 1511 of the peripheral control board 1510 via the main control I / O port 1314. Also, the serial communication circuit 13114 transmits and receives various information related to games (game information) and various commands related to the payout of game balls to the payout control board 951 via the main control I / O port 1314. Furthermore, the serial communication circuit 13114 transmits data for displaying the bonus ratio to the bonus ratio display 1317. The detailed configuration of the serial communication circuit 13114 will be described later with reference to FIG. 20.

[0086] The timer circuit 13115 is a timer for timer interrupts and various time controls. The interrupt controller 13116 controls various interrupts (general interrupts, NMIs that cannot be masked by software) to the CPU 13111. That is, when the interrupt controller 13116 detects an interrupt, it refers to a processing address table defined for each type of interrupt and jumps to an address set in the processing address table.

[0087] The external bus interface 13117 is an interface for connecting the internal bus of the main control MPU 1311 to external devices. The external bus interface 13117 can input and output I / O requests (IORQ), reads (RD), writes (WR), 16-bit addresses (A0 to A15), and 8-bit data (D0 to D7).

[0088] The clock circuit 13118 generates an internal clock for the main control MPU 1311 from an input external clock signal (e.g., 32 MHz). The clock circuit 13118 also divides the input clock signal by a set number and outputs the result to the outside from the CLKO terminal. For example, the clock circuit 13118 may output a clock signal to be supplied to the driver circuit 13171 (see FIG. 28) of the role-playing device ratio display 1317.

[0089] The verification block 13119 is a functional block that verifies whether the ROM 1313 has been illegally modified using a predetermined code. The unique information 13120 is an ID unique to the main control MPU 1311, and is written in a non-rewritable manner when the chip is manufactured.

[0090] The arithmetic circuit 13121 provides an arithmetic function that does not depend on the program recorded in the ROM 1313. This arithmetic function is written in a fixed manner when the chip is manufactured.

[0091] The reset circuit 13122 has an undesignated running prohibition circuit, a watchdog timer, and a user reset function. If the CPU 13111 accesses an address other than a specified address in the ROM 1313, the undesignated running prohibition circuit assumes that the access is being made by an unauthorized program and resets the operation of the main control MPU 1311. The watchdog timer outputs a timeout signal when a specified timer time has elapsed, resetting the operation of the main control MPU 1311. The user reset function resets the operation of the main control MPU 1311 using a reset signal input to the SRST terminal.

[0092] FIG. 19 is a block diagram showing the detailed configuration of the arithmetic circuit 13121.

[0093] The arithmetic circuit 13121 provides a calculation function for calculation results that does not depend on a program, and includes a multiplication circuit 131211 and a division circuit 131215 .

[0094] The multiplication circuit 131211 is an arithmetic circuit that multiplies two values ​​of a predetermined number of bits (for example, 16 bits) and outputs a 32-bit product, and functions as a conversion circuit that converts input values ​​(multiplier, multiplicand) into a product using a multiplication function and outputs it.

[0095] The CPU 13111 of the main control MPU 1311 stores a multiplier and a multiplicand of 16 bits or less in the multiplication input register A 131212 and the multiplication input register B 131213. The multiplication circuit 131211 reads the values ​​stored in the two 16-bit multiplication input registers 131212 and 131213 at a predetermined timing, multiplies the two values, and stores the result in the multiplication result register 131214. The CPU 13111 obtains the multiplication result from the multiplication result register 131214. The process from writing the values ​​to the multiplication input registers 131212 and 131213 to storing the calculation result in the multiplication result register 131214 is configured to be completed in a predetermined time (for example, one clock), and the CPU 13111 can store the values ​​in the multiplication input registers 131212 and 131213 and obtain the multiplication result by referring to the multiplication result register 131214 after a predetermined number of clocks have elapsed.

[0096] The division circuit 131215 is an arithmetic circuit that divides a dividend of a predetermined number of bits (e.g., 32 bits) by a divisor of a predetermined number of bits (e.g., 32 bits) and outputs a 32-bit quotient and a 32-bit remainder, and functions as a conversion circuit that converts input values ​​(divisor, dividend) into a quotient and remainder using a division function and outputs them.

[0097] The CPU 13111 of the main control MPU 1311 stores a dividend of 32 bits or less in the division input register A 131216, and stores a divisor of 32 bits or less in the division input register B 131217. When the division circuit 131215 detects that values ​​are stored in both of the two 32-bit division input registers 131216, 131217, it reads the stored values ​​at a predetermined timing, stores the quotient, which is the result of dividing the dividend by the divisor, in the division result register A 131218, and stores the remainder in the division result register B 131219. Furthermore, when the division circuit 131215 reads the values ​​stored in the division input registers 131216, 131217, it may erase the read values ​​and clear the corresponding registers. Furthermore, the division circuit 131215 may read the values ​​stored in the division input registers 131216 and 131217 at the timing when a start command is input, and store the division results in the division result registers 131218 and 131219. In this case, the values ​​stored in the division input registers 131216 and 131217 do not need to be erased at the timing when they are read. Furthermore, the division input registers 131216 and 131217 may already have values ​​stored therein (without clearing the stored values), and may also be able to overwrite values.

[0098] The CPU 13111 obtains the division results from the division result registers 131218 and 131219. The process from writing values ​​to the division input registers 131216 and 131217 to storing the calculation results in the division result registers 131218 and 131219 is configured to be completed in a predetermined time (e.g., 32 clocks), and the CPU 13111 can store values ​​in the division input registers 131216 and 131217 and, after a predetermined number of clocks have elapsed, obtain the quotient and remainder by referring to the division result registers 131218 and 131219, respectively.

[0099] In the pachinko machine 1 of this embodiment, as described below, division processing is required to calculate the base value. The division program executed by the CPU 13111 involves multiple multiplications and subtractions, which takes a considerable amount of time. Therefore, it is difficult to execute the base calculation processing for each timer interrupt processing, making it difficult to display the base value without delay. In contrast, by performing the division processing using the arithmetic circuit 13121, the time required to calculate the base value can be shortened, and the base value can be calculated multiple times in one timer interrupt processing (see Figures 75 and 80). Furthermore, the CPU 13111 is not occupied by the division processing from the time when values ​​are written to the division input registers 131216 and 131217 of the arithmetic circuit 13121 to the time when the calculation result is read from the division result register A 131218. Therefore, the CPU 13111 can execute other processing, and the base calculation processing during the timer interrupt processing can be executed efficiently.

[0100] FIG. 20 is a diagram showing the configuration of the serial communication circuit 13114.

[0101] The serial communication circuit 13114 has four data transmission / reception circuits, and each data transmission / reception circuit transmits and receives one channel's worth of data to and from a predetermined device. Note that in Fig. 20, only the data transmission circuits are shown, and a description of the data reception circuits (for example, one channel's worth) is omitted.

[0102] In the gaming machine of this embodiment, as mentioned above, the serial communication circuit 13114 uses three channels: channel 0 used for communication with the peripheral control board 1510, channel 1 used for communication with the payout control board 951, and channel 2 used for communication with the driver circuit 13171 of the bonus ratio display 1317, and channel 3 is unused.

[0103] The serial communication circuit 13114 has a data register 3141, a transmission data register 3142, a parity generation circuit 3143, a transmission shift register 3144, a command status register 3145, a communication setting register 3146, a transmission trigger setting level register 3147, a baud rate register 3148, and a baud rate generation circuit 3149.

[0104] Data input from the CPU 13111 is stored in a data register 3141, and then stored in a transmission data register 3142. The transmission data register 3142 is configured as a FIFO with a predetermined capacity (for example, 64 bytes). The transmission data register 3142 adds an error detection code generated by a parity generation circuit 3143 for each transmission unit of data to the data to be transmitted, and stores the data in a transmission shift register 3144.

[0105] The baud rate generation circuit 3149 generates a transmission clock signal from the clock signal supplied from the clock circuit 13118, for transmitting data at the rate set in the baud rate register 3148. Then, the transmission shift register 3144 transmits data in accordance with the transmission clock signal.

[0106] The command status register 3145 is a register that is referenced to check the transmission status.

[0107] The communication setting register 3146 stores commands for controlling data transmission. The transmission trigger setting level register 3147 stores a threshold for controlling the amount of data at which the FIFO of the transmission data register 3142 generates an interrupt. The baud rate register 3148 stores a baud rate setting for defining the data transmission rate. The communication setting register 3146, the transmission trigger setting level register 3147, and the baud rate register 3148 are set for each of the four channels as initial settings in step S28 of FIG. 21.

[0108] These settings are explained in detail below. The communication setting register is set with the communication format for each channel. Specifically, it sets whether FIFO is used (FIFO mode, normal mode), the number of stop bits, and the parity (whether parity is used, even parity, or odd parity). For example, for channel 0 used for communication with the peripheral control board 1510 and channel 1 used for communication with the payout control board 951, 1XXX1010B, which means FIFO mode, stop bit = 1 bit, and even parity, is set, and for channel 2 used for communication with the driver circuit 13171 of the bonus ratio display 1317, 1XXX1000B, which means FIFO mode, stop bit = 1 bit, and no parity, is set.

[0109] In FIFO mode, data is transmitted using the FIFO of the transmission data register 3142. Also, since gaming machines are in a noisy environment, it is desirable to set parity when transmitting data at high speed outside the main control board 1310.

[0110] Because the feature ratio display 1317 is mounted on the main control board 1310, it is less susceptible to noise compared to communication with other boards via communication wires. Also, because the amount of data sent and received is small, the communication speed can be low and there is little need to use parity. Note that by providing a ground pattern along the pattern that transmits signals between the driver circuit 13171 of the feature ratio display 1317 and the main control MPU 1311 (for example, on a layer adjacent to the left and right and / or thickness of a signal line provided on the surface or inner layer of the printed circuit board), the shielding effect of the ground pattern can reduce noise superimposed on the signal transmission pattern.

[0111] The transmission trigger setting level register 3147 determines the amount of data at which the FIFO of the transmission data register 3142 generates an interrupt. Specifically, if the amount of transmission data stored in the FIFO of the transmission data register 3142 is smaller than the set number of bytes, a predetermined bit in the status register corresponding to each channel is set. By checking the corresponding bit in the status register, it is possible to confirm whether the FIFO of the transmission data register 3142 has free space and to determine the transmission timing of the data stored in the FIFO of the transmission data register 3142.

[0112] Note that the relevant bit of the status register can be used to determine whether there is an abnormality in the transmission FIFO. For example, even if no data is written to the FIFO of the transmission data register 3142 for a predetermined period of time, if the relevant bit of the status register is not set, it is possible to determine that no data is being transmitted from the FIFO of the transmission data register 3142 because there is no free space in the FIFO of the transmission data register 3142, and to execute error processing (for example, error notification).

[0113] The baud rate register 3148 determines the data transmission rate. For example, 19200 bps is set for channel 0 used for communication with the peripheral control board 1510, 1200 bps is set for channel 1 used for communication with the payout control board 951, and 1200 bps is set for channel 2 used for communication with the driver circuit 13171 of the bonus ratio display 1317.

[0114] In this way, the transmission rate is changed depending on the data transmitted through each channel. This is because gaming balls roll inside the gaming machine, and the gaming machine's electronic circuits are susceptible to noise. For this reason, data for controlling the ball payout, which directly relates to the profit awarded to the player, is transmitted to the payout control board 951 at a low speed to ensure reliable transmission. On the other hand, the peripheral control board 1510 transmits data at a high rate because the amount of data transmitted is large and is not related to the ball payout. In addition, the peripheral control board 1510 verifies whether the received command is abnormal. If it is determined to be abnormal, it will not operate the peripheral control board 1510 or will execute abnormality processing (e.g., a communication error notification) and request a retransmission of the command. If it is determined that the retransmitted command is normal, the normal command is used to restore the status of the peripheral control board 1510. Therefore, communication with the peripheral control board 1510 can transmit data at a high rate. Furthermore, if the communication rate with the peripheral control board 1510 is reduced, the player may become aware of the delay between the winning of the start slot and the start of the pattern change, which may reduce interest.

[0115] Communication with the driver circuit 13171 of the bonus feature ratio display 1317 may be at a high rate (19200 bps, which is the data transmission rate with the peripheral control board 1510) or at a low rate (1200 bps, which is the data transmission rate with the payout control board 951). Also, communication with the driver circuit 13171 of the bonus feature ratio display 1317 may employ a rate between the high rate (19200 bps, which is the data transmission rate with the peripheral control board 1510) and the low rate (1200 bps, which is the data transmission rate with the payout control board 951). This is because if the data transmission rate is increased, there is a possibility that switching noise of the transistors in the driver circuit 13171 of the bonus feature ratio display 1317 may cause malfunctions in other circuits. On the other hand, even if an abnormality occurs in the transmitted data due to noise, the same data is resent at each timer interrupt unless the transmitted data is updated, and if the resent command is normal, the display content of the reel ratio display 1317 returns to normal, so there is no need to make the transmission rate extremely slow.

[0116] The command status register 3145 is a register that is referenced to check the transmission status, and for example, each bit is defined as follows: Bit 7: SnTC A flag indicating transmission completion, where 0 indicates transmission in progress and 1 indicates transmission completion. Bit 6: SnTDBE In normal mode (communication mode that does not use FIFO), this is a flag indicating transmission data empty, where 0 indicates that data has not yet been transferred to the transmission shift register and 1 indicates that data has been transferred to the transmission shift register. In other words, this is set when data has been transferred from the transmission data register 3142 to the transmission shift register 3144 and no transmission data is stored in the transmission data register 3142.

[0117] In SnTFTL FIFO mode, this is a flag that indicates the transmit FIFO trigger level, with 0 indicating that the amount of transmit data stored in the FIFO of the transmit data register 3142 is equal to or greater than the trigger level, and 1 indicating that the amount of transmit data stored in the FIFO of the transmit data register 3142 is less than the trigger level. In other words, this bit is set when the amount of transmit data stored in the FIFO of the transmit data register 3142 is less than the number of bytes set in the transmit trigger level setting register. Therefore, during communication in FIFO mode, data is written to the FIFO of the transmit data register 3142 after confirming that this bit is 1. Bits 5-2: Unused (fixed to 0) Bit 1: SnTCL This bit is written externally to clear the transmit buffer and break code transmission, empty the transmit data, or set the transmit FIFO trigger level (SnTFL). For example, to forcibly clear the buffer contents, set this bit to 1. More specifically, this is used when a command has been written to the FIFO, but transmission of the written command is stopped due to some circumstances (for example, an abnormality has occurred). Note that even if bit 1 is set, the data in the transmit shift register is not cleared.

[0118] In the configuration described above, the serial communication circuit 13114 is capable of start-stop synchronous communication (asynchronous communication), but outputs a clock signal for synchronous communication (not shown). In this case, the clock signal supplied to the communication partner (driver circuit 13171 of the role ratio display 1317) is output from the serial communication circuit 13114, not from the clock circuit 13118. At least one channel of each transmitting / receiving circuit of the serial communication circuit 13114 may be capable of synchronous communication depending on the setting, or a serial communication circuit for start-stop synchronous communication and a serial communication circuit for synchronous communication may be provided separately.

[0119] Although not shown, the serial communication circuit 13114 outputs a signal (LOAD) indicating the timing of data acquisition used during synchronous communication.

[0120] [3-2. Dispensing control board] Returning to Figure 17, we will continue to explain the control configuration of the pachinko machine. Although not shown in detail, the payout control board 951, which controls the payout of game balls, is equipped with a payout control unit 952 that performs various controls related to payout, a launch control unit 953 that controls launch using the launch solenoid 682 and ball feed using the ball feed solenoid 551, an error LED indicator that displays the status of the pachinko machine 1, an error reset switch for resetting an error displayed on the error LED indicator, and a ball removal switch for discharging game balls in the ball tank 802, tank rail 803, ball guide unit 820, and payout device 830 to the outside of the pachinko machine 1 and starting the ball removal operation.

[0121] [3-2a. Dispense control unit] The dispensing control unit 952, which performs various controls related to dispensing on the dispensing control board 951, is not shown in detail, but is equipped with a dispensing control MPU, which is a microprocessor with built-in ROM for storing various processing programs and commands and RAM for temporarily storing data, a dispensing control I / O port as an I / O device, an external WDT (external watchdog timer) for monitoring whether the dispensing control MPU is operating normally, a dispensing motor drive circuit for outputting a drive signal to the dispensing motor 834 of the dispensing device 830, and a dispensing control input circuit to which detection signals from various detection switches related to dispensing are input. In addition to its built-in ROM and RAM, the dispensing control MPU also has built-in functions to prevent fraud.

[0122] The payout control MPU of the payout control unit 952 receives various information regarding the game (game information) and various commands regarding payouts from the main control board 1310 serially via the payout control I / O port, and inputs the operation signal (detection signal) of the RAM clear switch from the main control board 1310 via the payout control I / O port.In addition, it inputs detection signals from the full tank detection sensor 535, and detection signals from the bulb out detection sensor 827, the payout detection sensor 842, and the blade rotation detection sensor 840.

[0123] Detection signals from the out-of-ball detection sensor 827, dispensing detection sensor 842, and blade rotation detection sensor 840 of the dispensing device 830 are input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I / O port.

[0124] In addition, detection signals from the door frame opening switch, which detects the opening of the door frame 3 relative to the main frame 4, and the main frame opening switch, which detects the opening of the main frame 4 relative to the outer frame 2, are input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I / O port.

[0125] In addition, the detection signal from the full tank detection sensor 535 of the fall cover unit 520 is input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I / O port.

[0126] The payout control MPU outputs a drive signal for driving the payout motor 834 to the payout motor 834 via the payout control I / O, outputs a signal for displaying the status of the pachinko machine 1 on the error LED indicator to the error LED indicator via the payout control I / O port, serially transmits commands indicating the status of the pachinko machine 1 to the main control board 1310 via the payout control I / O port, and outputs the number of game balls actually paid out to the external terminal board 784 via the payout control I / O port. This external terminal board 784 is connected to a hall computer installed in the gaming hall. This hall computer monitors the player's play by keeping track of the number of game balls paid out by the pachinko machine 1 and game information of the pachinko machine 1. Among the signals output from the external terminal board 784, signals generated by the main control board 1310 are output from the external terminal board 784 via the main control board 1310, via the payout control board 951. In addition, the signal generated by the main control board 1310 may be output from the external terminal board 784 without passing through the dispensing control board 951.

[0127] The error LED indicator is a segment indicator that displays alphanumeric characters, figures, etc. to indicate the status of the pachinko machine 1. The error LED indicator displays and notifies the following: For example, when the figure "-" is displayed, it indicates that it is "normal", when the number "0" is displayed, it indicates that it is a "connection abnormality" (specifically, that there is an abnormality in the electrical connection between the main control board 1310 and the payout control board 951), when the number "1" is displayed, it indicates that it is a "ball out" (specifically, that there are no game balls in the payout device 830 based on the detection signal from the ball out detection sensor 827), when the number "2" is displayed, it indicates that it is a "ball stuck" (specifically, that the payout blades and game balls are engaged in the payout passage of the payout device 830 based on the detection signal from the blade rotation detection sensor 840, making it difficult for the payout blades to rotate), and when the number "3" is displayed, it indicates that it is a "counting switch error" (specifically, that there is no game ball in the payout device 830 based on the detection signal from the blade rotation detection sensor 842). When the number "5" is displayed, it indicates a "retry error" (specifically, that the number of retries for the payout operation has reached a preset upper limit), when the number "6" is displayed, it indicates a "full" state (specifically, that the tank is full with game balls stored in the fault cover unit 520 based on the detection signal from the full tank detection sensor 535), when the number "7" is displayed, it indicates a "CR not connected" state (that the electrical connection has been cut somewhere between the payout control board 951 and the CR unit), and when the number "9" is displayed, it indicates a "stocking" state (specifically, that the number of game balls that have not yet been paid out has reached a preset number).

[0128] A ball loan request signal from the ball loan button and a prepaid card return request signal from the return button are input to the CR unit. The CR unit serially transmits a signal specifying the number of balls to be loaned in accordance with the ball loan request signal to the payout control board 951, and this signal is received by the payout control I / O port and input to the payout control MPU. The CR unit also updates the balance of the inserted prepaid card according to the number of balls loaned, and outputs a signal to display that balance on the display unit, and this signal is input to the display unit and displayed.

[0129] [3-2b. Launch control unit] The launch control unit 953, which controls launch by the launch solenoid 682 and ball transport by the ball transport solenoid 551, is not shown in detail, but is equipped with a launch control input circuit that receives detection signals from various launch-related detection switches, an oscillation circuit that outputs a clock signal at regular intervals, a launch timing control circuit that outputs a launch reference pulse for launching game balls toward the game area 5a based on this clock signal, a launch solenoid drive circuit that outputs a drive signal to the launch solenoid 682 based on this launch reference pulse, and a ball transport solenoid drive circuit that outputs a drive signal to the ball transport solenoid 551 based on the launch reference pulse.The launch timing control circuit generates a launch reference pulse based on the clock signal from the oscillation circuit so that 100 game balls are launched toward the game area 5a per minute and outputs it to the launch solenoid drive circuit, and also generates a ball transport reference pulse that is a predetermined number of times the launch reference pulse and outputs it to the ball transport solenoid drive circuit.

[0130] In the handle unit 500, the detection signals from the contact detection sensor 509, which detects whether the palm or fingers are touching the handle lever 504, and the stop button, which detects whether the player wants to forcibly stop the shooting of the game balls, are input to the launch control input circuit and then to the launch timing control circuit. When the CR unit and the CR unit connection terminal board are electrically connected, the signal is input to the launch control input circuit as a CR connection signal and then to the launch timing control circuit. A signal from the handle operation sensor 507, which electrically adjusts the strength with which the game balls are shot toward the play area 5a depending on the rotation position of the handle lever 504, is input to the launch solenoid drive circuit.

[0131] Based on a signal from the handle operation sensor 507, the launch solenoid drive circuit outputs a drive current to the launch solenoid 682 to launch the game ball toward the game area 5a with a launch strength corresponding to the rotational position of the handle lever 504, triggered by the input of a launch reference pulse. Meanwhile, the ball feed solenoid drive circuit outputs a constant current to the ball feed solenoid 551, triggered by the input of the ball feed reference pulse, to receive one game ball stored in the upper tray 201 of the tray unit 200 into the ball feed unit 540, and stops outputting the constant current upon the completion of the input of the ball feed reference pulse, thereby sending the received game ball to the ball launcher 680. In this way, the drive current output from the launch solenoid drive circuit to the launch solenoid 682 is variably controlled, while the drive current output from the ball feed solenoid drive circuit to the ball feed solenoid 551 is controlled to a constant value.

[0132] In addition, the power supply board that supplies various voltages to the dispensing control board 951 is equipped with a capacitor as a backup power supply to supply power to the main control board 1310 for a predetermined period of time even when the power is cut off. This capacitor allows the dispensing control MPU to store various information in the RAM of the dispensing control board 951 during power-off processing even when the power is cut off. This stored information is completely erased (cleared) from the RAM of the dispensing control board 951 when the RAM clear switch on the main control board 1310 is operated when the power is turned on.

[0133] [3-3. Peripheral control board] As shown in Figure 17, the peripheral control board 1510 is equipped with a peripheral control unit 1511 that controls the performance based on commands from the main control board 1310, and an LCD display control unit 1512 that controls the drawing of the main LCD display device 1600, sub LCD display device 3114, and upper tray LCD display device 244 based on control data from this peripheral control unit 1511.

[0134] [3-3a. Peripheral control unit] The peripheral control unit 1511 that controls the performance on the peripheral control board 1510 is not shown in detail, but is equipped with a peripheral control MPU as a microprocessor, a peripheral control ROM that stores various processing programs and various commands, a sound source IC that produces high-quality sound, and a sound ROM that stores sound information such as music and sound effects referenced by this sound source IC.

[0135] The peripheral control MPU has a plurality of built-in parallel I / O ports, serial I / O ports, etc., and when it receives various commands from the main control board 1310, it transmits game board side light emission data for outputting lighting signals, flashing signals, or gradation lighting signals to the color LEDs, etc., provided on each decorative board of the game board 5 from the serial I / O port for the lamp drive board to the performance drive board 3043 based on these various commands, transmits game board side drive data for outputting drive signals to drive motors that operate various performance units provided on the game board 5 from the serial I / O port for the game board decoration drive board to the performance drive board 3043, and ... vibration device 24 provided on the door frame 3. The door side drive light emission data, which is composed of door side drive data for outputting drive signals to electrical drive sources such as the door right bottom drive motor 272 and the door side light emission data for outputting lighting signals, flashing signals or gradation lighting signals to color LEDs etc. provided on each decorative board of the door frame 3, is transmitted from the serial I / O port for the frame decoration drive board to the door frame 3 side, control data (display commands) indicating the screen to be displayed on the main LCD display device 1600 and the upper tray LCD display device 244 is transmitted from the serial I / O port for the LCD control unit to the LCD display control unit 1512, and control signals (sound commands) for extracting sound information from the sound ROM are output to the sound source IC.

[0136] Detection signals from various position detection sensors for detecting the positions of various presentation units provided on the game board 5 are input to the peripheral control MPU via a presentation drive board 3043 attached to the rear surface of the back box. In addition, detection signals from the touch panel 246 and presentation button pressure sensor 258 of the presentation operation unit 220 provided on the door frame 3 are input to the peripheral control MPU.

[0137] In addition, the peripheral control MPU receives a signal (operation signal) from the liquid crystal display control unit 1512 indicating that the liquid crystal display control unit 1512 is operating normally, and monitors the operation of the liquid crystal display control unit 1512 based on this operation signal.

[0138] The sound source IC extracts sound information from the sound ROM based on control data (sound commands) from the peripheral control MPU, and controls the playback of music and sound effects suited to various performances from speakers 921 and the like provided on the door frame 3, main body frame 4, and the like. The volume can be adjusted by rotating a volume control knob protruding rearward from the peripheral control board box 1520 that houses the peripheral control board 1510. In this embodiment, sound signals (e.g., 2-channel stereo signals, 4-channel stereo signals, 2.1-channel surround signals, or 4.1-channel surround signals) serving as sound information are sent to the multiple speakers on the door frame 3 side and the bass speaker 921 on the main body frame 4, thereby presenting sound effects (sound performances) that are more realistic than ever before.

[0139] In addition to the built-in WDT (watchdog timer) built into the peripheral control MPU, the peripheral control unit 1511 also has an external WDT (watchdog timer) not shown, and the peripheral control MPU uses both the built-in WDT and the external WDT to diagnose whether its own system is running out of control.

[0140] The display commands output from this peripheral control MPU to the liquid crystal display control unit 1512 are transmitted via a serial input / output port, and in this embodiment, the bit rate (the amount of data that can be transmitted per unit time) is set to 19.2 kilobits per second (kbps). On the other hand, the initial data, door frame side lighting and flashing commands, game board side lighting and flashing commands, movable body driving commands, and display commands are output from the peripheral control MPU to the performance drive board 3043 attached to the rear of the back box via multiple different serial input / output ports, and in this embodiment, the bit rate is set to 250 kbps.

[0141] This performance drive board 3043 outputs a lighting signal or a flashing signal based on the received door frame side lighting / flashing command to the LEDs of each decorative board provided on the door frame 3, and outputs a lighting signal or a flashing signal based on the received game board side lighting / flashing command to the LEDs of each decorative board provided on the game board 5.

[0142] In addition, the performance drive board 3043 outputs a drive signal based on the received drive command to the vibration device 242 and the lower right door drive motor 272 provided on the door frame 3, and to each drive motor provided on the game board 5, etc.

[0143] [3-3b. Various control processes of peripheral control units] First, the peripheral control unit power-on process will be described with reference to FIG. 60. When power is applied to the pachinko machine 1, the peripheral control MPU (not shown) of the peripheral control unit 1511 shown in FIG. 17 performs the peripheral control unit power-on process as shown in FIG. 60. When this peripheral control unit power-on process begins, the performance control program performs an initialization process under the control of the peripheral control MPU (step S1000). In this initialization process, the performance control program performs processes such as initializing the peripheral control MPU itself, determining whether it is a hot start or a cold start, and setting a wait timer after reset. The peripheral control MPU first performs its own initialization process, which takes only microseconds (μs), making it possible to initialize the peripheral control MPU in an extremely short time. As a result, the peripheral control MPU is enabled for interrupts, and is thus able to receive various commands, such as commands related to game performance control and commands related to the status of the pachinko machine 1, output from the main control board 1310 during the peripheral control unit command reception interrupt process described below.

[0144] Following step S1000, the performance control program performs a current time information acquisition process (step S1002). In this current time information acquisition process, calendar information specifying the year, month, and day and time information specifying the hour, minute, and second are acquired from the RTC control unit, and are set in the calendar information storage unit of the peripheral control RAM as the current calendar information, and also set in the time information storage unit as the current time information.

[0145] Following step S1002, the performance control program sets the V blank signal detection flag VB-FLG to the value 0 (step S1006). This V blank signal detection flag VB-FLG is a flag for determining whether or not to execute the peripheral control unit steady-state processing described later, and is set to the value 1 when the peripheral control unit steady-state processing is executed, and to the value 0 when the peripheral control unit steady-state processing is not executed. The V blank signal detection flag VB-FLG is set to the value 1 in the peripheral control unit V blank signal interrupt processing described later, which is executed in response to the input of a V blank signal indicating that the peripheral control MPU is ready to accept screen data. In this step S1006, the V blank signal detection flag VB-FLG is initialized once by setting the V blank signal detection flag VB-FLG to the value 0.

[0146] Following step S1006, the performance control program determines whether the V blank signal detection flag VB-FLG is equal to 1 (step S1008). If the V blank signal detection flag VB-FLG is not equal to 1 (it is equal to 0), the program returns to step S1008 and repeatedly determines whether the V blank signal detection flag VB-FLG is equal to 1. By repeating this determination, the program enters a standby state until the peripheral control unit executes its normal processing.

[0147] When the V blank signal detection flag VB-FLG is set to 1 in step S1008, that is, when the peripheral control unit steady-state processing is to be executed, the steady-state processing in progress flag SP-FLG is first set to 1 (step S1009). This steady-state processing in progress flag SP-FLG is set to 1 when the peripheral control unit steady-state processing is being executed, and to 0 when the peripheral control unit steady-state processing has been completed.

[0148] Following step S1009, the performance control program performs a 1 ms interrupt timer start process (step S1010). This 1 ms interrupt timer start process starts the 1 ms interrupt timer for executing the peripheral control unit 1 ms timer interrupt process described below, and also initializes the 1 ms timer interrupt execution count STN by setting the value 1 to count the number of times the 1 ms interrupt timer has started and the peripheral control unit 1 ms timer interrupt process has been executed. This 1 ms timer interrupt execution count STN is updated by the peripheral control unit 1 ms timer interrupt process.

[0149] Following step S1010, the performance control program performs lamp data output processing (step S1012). In this lamp data output processing, the performance control program performs DMA serial continuous transmission to the lamp drive board 4170 shown in Fig. 119. Here, continuous transmission is performed via the serial I / O port for the lamp drive board using the peripheral control DMA controller of the peripheral control MPU.

[0150] Following step S1012, the performance control program performs a performance operation unit monitoring process (step S1014). In this performance operation unit monitoring process, in a performance operation unit information acquisition process in a peripheral control unit 1 ms timer interrupt process (described later), the presence or absence of operation of the operation button 220C is monitored based on various information acquired based on detection signals from various detection switches provided in the performance operation unit 220, such as the operation of the operation button 220C, and it is appropriately determined whether or not to reflect the operation state of the operation button 220C in the game performance.

[0151] Following step S1014, the performance control program performs a display data output process (step S1016). In this display data output process, the sound source VDP outputs one screen's worth of drawing data (one frame's worth) generated on the built-in VRAM of the sound source VDP in the display data creation process described below to the game board side decorative board 3053 and the door frame side decorative board 233. As a result, various screens are drawn on the game board side decorative board 3053 and the door frame side decorative board 233.

[0152] Following step S1016, the performance control program performs a sound data output process (step S1018). In this sound data output process, the performance control program outputs sound data such as music and sound effects set in the VDP with built-in sound source in the sound data creation process (described later) to speaker 921, and also outputs sound data of notification sounds and announcement sounds in addition to music and sound effects to speaker 921.

[0153] Following step S1018, the performance control program performs a scheduler update process (step S1020). In this scheduler update process, the performance control program updates the various schedule data set in the peripheral control RAM. For example, in the scheduler update process, a pointer is updated to indicate which screen data, starting from the first screen data, of the screen data arranged in chronological order that constitutes the schedule data for screen generation should be output to the VDP with built-in sound source.

[0154] In addition, in the scheduler update process, a pointer is updated to indicate which light emission data from the first light emission data among the light emission data arranged in chronological order that constitutes the schedule data for generating light emission modes should be used as the light emission mode for each LED.

[0155] In addition, in the scheduler update process, a pointer is updated to indicate which sound command data, starting from the first sound command data, should be output to the VDP with built-in sound source among the sound command data that indicates sound data such as music and sound effects, and sound data for alarms and notices, arranged in chronological order to make up the sound generation schedule data.

[0156] In addition, in the scheduler update process, a pointer is updated to indicate which drive data from the first drive data is to be output among the drive data of electric drive sources such as motors and solenoids arranged in chronological order that make up the electric drive source schedule data.

[0157] Following step S1020, the performance control program performs a received command analysis process (step S1022). In this received command analysis process, the performance control program analyzes (command analysis means) various commands received in the peripheral control unit command reception interrupt process (command reception means) described later, such as information transmitted from the game board side decorative board 3053 and various commands transmitted from the main control board 1310.

[0158] Following step S1022, the performance control program performs a warning process (step S1024). In this warning process, if the commands analyzed in the received command analysis process in step S1022 include various commands classified as predetermined notification displays, the performance control program extracts from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 schedule data for generating screen images, schedule data for generating light emission patterns, schedule data for generating sounds, and schedule data for electrical drive sources, which are set as abnormality display modes for executing various abnormality notifications, and sets these data in the peripheral control RAM. Note that in the warning process, if multiple abnormalities occur simultaneously, the abnormality notifications are first issued in order of highest priority, as registered in advance, and then automatically transition to the remaining abnormality notifications once the abnormality is resolved. This allows multiple abnormalities to be monitored simultaneously without losing information that another abnormality occurred after one abnormality occurred but before the previous abnormality was resolved.

[0159] Furthermore, in this warning process, after a predetermined time has elapsed since the power was turned on, if the command analyzed by the presentation control program in the above-mentioned received command analysis process (step S1022) is a command classified as a status display, such as an error cancellation navigation command (second error cancellation command), the presentation control program controls the presentation to a mode different from the normal presentation mode associated with the presentation operation, for example, by visually warning the outside using the game board side decorative board 3053 (presentation device), the door frame side decorative board 233 (presentation device), or a lamp (presentation device), or audibly warning the outside using a speaker (error notification means). In this way, if a malicious player attempts to input an error cancellation navigation command into the main control board 1310 by operating the operation switch of the payout control board 951 even while the game is in progress, the pachinko machine 1 is configured to issue a warning to the outside, thereby deterring fraudulent acts against the main control board 1310 that could affect the progress of the game.

[0160] Next, following step S1024 described above, the performance control program performs an RTC acquisition information update process (step S1026). In this RTC acquisition information update process, the performance control program updates the calendar information stored in the calendar information storage unit and the time information stored in the time information storage unit that were acquired in the current time information acquisition process in step S1002 and set in the peripheral control RAM. This RCT acquisition information update process updates the hour, minute, and second that make up the time information stored in the time information storage unit, and updates the year, month, and day that make up the calendar information stored in the calendar information storage unit based on this updated time information.

[0161] Following step S1026, the performance control program performs lamp data creation processing (step S1028). In this lamp data creation processing, the performance control program extracts and creates game board side light-emitting data SL-DAT from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, based on the light-emitting data pointed to by the pointer among the light-emitting data arranged in chronological order that constitute the schedule data for generating light-emitting modes, and sets this data in the peripheral control RAM. Also, the performance control program extracts and creates door side light-emitting data STL-DAT from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, based on the light-emitting data pointed to by the pointer among the light-emitting data arranged in chronological order that constitute the schedule data for generating light-emitting modes, and sets this data in the peripheral control RAM.

[0162] Following step S1028, the performance control program performs a display data creation process (step S1030). In this display data creation process, the performance control program updates the pointer in the scheduler update process of step S1020, and extracts the screen data pointed to by the pointer from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, among the screen data arranged in chronological order that constitute the schedule data for screen generation, and outputs it to the sound source built-in VDP. When screen data is input from the peripheral control MPU, the sound source built-in VDP extracts character data from the liquid crystal and sound control ROM 1512b based on this input screen data, creates sprite data, and generates drawing data for one screen (one frame) to be displayed on the game board side decorative board 3053 and the door frame side decorative board 233 in the built-in VRAM.

[0163] Following step S1030, the performance control program performs sound data creation processing (step S1032). In this sound data creation processing, the performance control program updates the pointer in the scheduler update processing of step S1020, and extracts the sound command data pointed to by the pointer from the peripheral control ROM or peripheral control RAM of peripheral control unit 1511, among the sound command data arranged in chronological order that constitutes the sound generation schedule data, and outputs the sound command data to the sound source built-in VDP. When sound command data is input from the peripheral control MPU, the sound source built-in VDP extracts sound data such as music and sound effects stored in the LCD and sound control ROM and controls the built-in sound source, thereby incorporating the sound data such as music and sound effects according to the track number specified in the sound command data, and setting the output channel to be used according to the output channel number.

[0164] Following step S1032, the performance control program performs a backup process (step S1034). In this backup process, the performance control program copies the contents stored in the peripheral control MPU and the external peripheral control RAM to a first backup area and a second backup area, respectively, for backup, and also copies the contents stored in the peripheral control MPU and the external peripheral control SRAM to a first backup area and a second backup area, respectively, for backup.

[0165] Following step S1034, a WDT clear process is performed (step S1036). In this WDT clear process, a clear signal is output to the peripheral control internal WDT 1511af and the peripheral control external WDT 1511e to prevent the peripheral control MPU from being reset.

[0166] Following step S1036, the performance control program sets the steady-state processing in-progress flag SP-FLG to 0 (step S1038), indicating that the peripheral control unit steady-state processing has been completed, and then returns to step S1006, initializes the V blank signal detection flag VB-FLG by setting it to 0, and repeats the determination of step S1008 until the V blank signal detection flag VB-FLG is set to 1 in the peripheral control unit V blank signal interrupt processing described below. That is, step S1008 waits until the V blank signal detection flag VB-FLG is set to 1, and if it is determined in step S1008 that the V blank signal detection flag VB-FLG is 1, it performs the processes of steps S1009 to S1038 and then returns to step S1006. In this way, if it is determined in step S1008 that the V blank signal detection flag VB-FLG is 1, it performs the processes of steps S1009 to S1038. The processing in steps S1009 to S1038 is referred to as "peripheral control unit steady-state processing."

[0167] This peripheral control unit steady-state processing begins with the performance control program setting the steady-state processing in progress flag SP-FLG to a value of 1 in step S1009, indicating that peripheral control unit steady-state processing is currently being executed. Then, in step S1010, the program starts a 1 ms interrupt timer. Then, in step S1012, step S1014, ..., and step S1036, the program finally completes the peripheral control unit steady-state processing by setting the steady-state processing in progress flag SP-FLG to a value of 0 in step S1038, indicating that peripheral control unit steady-state processing has been completed. The peripheral control unit steady-state processing is executed when the V blank signal detection flag VB-FLG is set to a value of 1 in step S1008. As described above, this V blank signal detection flag VB-FLG is set to a value of 1 in the peripheral control unit V blank signal interrupt processing, which is executed when a V blank signal is input from the VDP with built-in sound source, indicating that the peripheral control MPU is ready to accept screen data. In this embodiment, the frame frequency (number of screen updates per second) of the game board side decorative board 3053 and the door frame side decorative board 233 is set to approximately 30 fps per second, as described above, so the interval at which the V blank signal is input is approximately 33.3 ms (= 1000 ms ÷ 30 fps). In other words, the peripheral control unit regular processing is repeatedly executed every approximately 33.3 ms.

[0168] Next, a description will be given of the peripheral control unit V blank signal interrupt process shown in Fig. 61, which is executed when a V blank signal indicating that the liquid crystal display control unit 1512 is ready to accept screen data from the peripheral control MPU of the peripheral control unit 1511 is input from the sound source built-in VDP. When this peripheral control unit V blank signal interrupt process is started, the peripheral control MPU of the peripheral control unit 1511 determines whether the steady processing in progress flag SP-FLG is set to a value of 0 (step S1045), as shown in Fig. 61. As described above, this steady processing in progress flag SP-FLG is set to a value of 1 when the peripheral control unit steady processing of steps S1009 to S1038 in the peripheral control unit power-on processing of Fig. 60 is being executed, and to a value of 0 when the peripheral control unit steady processing has been executed.

[0169] If the steady-state processing in progress flag SP-FLG is not set to 0 (set to 1) in step S1045, i.e., if peripheral control unit steady-state processing is being executed, the routine is terminated. On the other hand, if the steady-state processing in progress flag SP-FLG is set to 0 in step S1045, i.e., if peripheral control unit steady-state processing has been completed, the V blank signal detection flag VB-FLG is set to 1 (step S1050), and the routine is terminated. As described above, this V blank signal detection flag VB-FLG is a flag for determining whether or not peripheral control unit steady-state processing is to be executed, and is set to 1 when peripheral control unit steady-state processing is to be executed, and to 0 when peripheral control unit steady-state processing is not to be executed.

[0170] Next, we will explain the peripheral control unit 1 ms timer interrupt processing that is repeatedly executed each time a 1 ms interrupt timer is generated by starting the 1 ms interrupt timer in step S1010 in the peripheral control unit steady-state processing of the peripheral control unit power-on processing in Fig. 60. When this peripheral control unit 1 ms timer interrupt processing is started, the peripheral control MPU of the peripheral control unit 1511 determines whether the 1 ms timer interrupt execution count STN is less than 33, as shown in Fig. 62 (step S1100). As described above, this 1 ms timer interrupt execution count STN is a counter that counts the number of times the 1 ms interrupt timer is started in the 1 ms interrupt timer start processing in step S1010 in the peripheral control unit steady-state processing of the peripheral control unit power-on processing in Fig. 60 and the peripheral control unit 1 ms timer interrupt processing, which is this routine, is executed. In this embodiment, the frame frequency (number of screen updates per second) of the game board side decorative board 3053 and the door frame side decorative board 233 is set to approximately 30 fps, as described above, so the interval at which the V blank signal is input is approximately 33.3 ms (= 1000 ms ÷ 30 fps). In other words, since the peripheral control unit regular processing is repeatedly executed approximately every 33.3 ms, after the 1 ms interrupt timer is started in step S1010 of the peripheral control unit regular processing, the peripheral control unit 1 ms timer interrupt processing is executed 32 times before the next peripheral control unit regular processing is executed. Specifically, when the 1 ms interrupt timer is started in step S1010 of the peripheral control unit regular processing, the first 1 ms timer interrupt occurs, followed by the second, ..., and 32nd 1 ms timer interrupts.

[0171] If the 1 ms timer interrupt execution count STN is not less than 33 in step S1100, i.e., if the 33rd 1 ms timer interrupt occurs and peripheral control unit 1 ms timer interrupt processing is initiated, the routine is terminated. In this embodiment, if the 33rd 1 ms timer interrupt occurs before the next V blank signal, the peripheral control unit 1 ms timer interrupt processing is forcibly canceled, even though the peripheral control unit 1 ms timer interrupt processing is set to have a higher interrupt processing priority than the peripheral control unit V blank interrupt processing. In other words, in this embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 1510, if the 33rd 1 ms timer interrupt occurs before the next V blank signal, the peripheral control unit 1 ms timer interrupt processing is forcibly canceled in order to execute the peripheral control unit V blank interrupt processing. Then, after the 1 ms interrupt timer is started again in step S1010 in the peripheral control unit regular processing in response to the generation of the V blank signal, the peripheral control unit 1 ms timer interrupt processing is started in response to the generation of a new first 1 ms timer interrupt.

[0172] On the other hand, if the 1 ms timer interrupt execution count STN is smaller than 33 in step S1100, the 1 ms timer interrupt execution count STN is incremented by a value of 1 (step S1102). By adding the value of 1 to the 1 ms timer interrupt execution count STN, the 1 ms interrupt timer is started in the 1 ms interrupt timer start processing in step S1010 of the peripheral control unit steady-state processing of the peripheral control unit power-on processing in Fig. 60, and the number of times that the peripheral control unit 1 ms timer interrupt processing, which is this routine, has been executed, is increased by one.

[0173] Following step S1102, motor and solenoid drive processing is performed (step S1104). In this motor and solenoid drive processing, the various electric drive sources such as motors and solenoids are driven in accordance with the drive data indicated by the pointer among the drive data for the electric drive sources such as motors and solenoids arranged in chronological order that constitutes the electric drive source schedule data set in the peripheral control MPU and peripheral control RAM, and the pointer is updated to the next drive data specified in chronological order. The pointer is updated each time this motor and solenoid drive processing is performed.

[0174] Following step S1104, a movable body information acquisition process is performed (step S1106). In this movable body information acquisition process, whether or not a detection signal is input from the various detection switches provided on the game board 5 is determined, and history information of the detection signals from the various detection switches (for example, original position history information, movable position history information, etc.) is created and set in the peripheral control RAM. From the history information of the detection signals from the various detection switches set in this peripheral control RAM, the original positions, movable positions, etc. of the various movable bodies provided on the game board 5 can be acquired.

[0175] Following step S1106, a production operation unit information acquisition process is performed (step S1108). In this production operation unit information acquisition process, by determining whether or not detection signals are being input from the various detection switches provided in production operation unit 220, history information of the detection signals from the various detection switches (for example, operation history information of operation button 220C) is created and set in the peripheral control RAM. Whether or not operation button 220C has been operated can be obtained from the history information of the detection signals from the various detection switches set in this peripheral control RAM.

[0176] Following step S1108, a drawing status information acquisition process is performed (step S1110). In this drawing status information acquisition process, history information of the LOCKN signal output from the door frame side performance receiver IC of the door frame side decorative board 233 is created and set in the peripheral control RAM. As mentioned above, the LOCKN signal is a signal that the door frame side performance receiver ICSDIC0 of the door frame side decorative board 233 outputs to inform the user that the drawing data received from the door frame side performance transmitter IC1512d provided on the peripheral control board 1510 is abnormal data.

[0177] Following step S1110, backup processing is performed (step S1112), and this routine ends. In this backup processing, the contents stored in the peripheral control RAM are copied and backed up to the first backup area and the second backup area, respectively, and the contents stored in the peripheral control SRAM are copied and backed up to the first backup area and the second backup area, respectively.

[0178] In this way, in the peripheral control unit 1 ms timer interrupt processing, various processes relating to the performance described above in steps S1104 to S1108 are executed within a period of 1 ms as the performance progresses. In contrast, in the peripheral control unit steady-state processing in the peripheral control unit power-on processing in Figure 60, various processes relating to the performance described above in steps S1012 to S1032 are executed within a period of approximately 33.3 ms as the performance progresses. In the peripheral control unit 1 ms timer interrupt processing, if the 1 ms timer interrupt execution count STN is not less than 33 in step S1100, i.e., if the 33rd 1 ms timer interrupt occurs and the peripheral control unit 1 ms timer interrupt processing is initiated, the routine is terminated. Therefore, even if the 33rd 1 ms timer interrupt occurs before the next V blank signal, the start of the peripheral control unit 1 ms timer interrupt processing due to the 33rd 1 ms timer interrupt is forcibly canceled, and the 1 ms interrupt timer is restarted in step S1010 in the peripheral control unit regular processing due to the V blank signal, and then the peripheral control unit 1 ms timer interrupt processing due to the first 1 ms timer interrupt is initiated. In other words, the consistency between the progress of the performance due to the peripheral control unit regular processing and the progress of the performance due to the peripheral control unit 1 ms timer interrupt processing, which is timer interrupt control, is not lost. Therefore, the progress of the performance can be reliably consistent.

[0179] As mentioned above, the interval at which the V blank signal is output varies slightly depending on the LCD size of the game board decorative board 3053 and the door frame decorative board 233, and the interval at which the V blank signal is output may also vary slightly depending on the production lot of the peripheral control board 1510 on which the peripheral control MPU and the sound source VDP are mounted. In this embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 1510, if the occurrence of the 33rd 1 ms timer interrupt happens to precede the occurrence of the next V blank signal, the start of the peripheral control unit 1 ms timer interrupt process due to the 33rd 1 ms timer interrupt is forcibly canceled in order to execute the peripheral control unit V blank interrupt process. In other words, in this embodiment, even if the interval at which the V blank signal is output varies slightly, the time lag caused by the slight change in the interval at which the V blank signal is output can be absorbed by forcibly canceling the start of the peripheral control unit 1 ms timer interrupt process due to the 33rd 1 ms timer interrupt.

[0180] [3-4. LCD display control unit] Next, the LCD display control unit 1512 in the peripheral control board 1510, which controls the drawing of the main LCD display device 1600, sub LCD display device 3114, and upper tray LCD display device 244, is not shown in detail, but is equipped with a display control MPU as a microprocessor, a display control ROM that stores various processing programs, various commands, and various data, a VDP (short for Video Display Processor) that controls the display of the main LCD display device 1600 and upper tray LCD display device 244, an image ROM (performance data ROM) that stores various data for the screens displayed on the main LCD display device 1600, sub LCD display device 3114, and upper tray LCD display device 244, and an image RAM to which the various data stored in this image ROM (performance data ROM) is transferred and copied.

[0181] This display control MPU has built-in parallel I / O ports, serial I / O ports, etc., and controls the VDP based on control data (display commands) from the peripheral control unit 1511 to control the drawing of the main LCD display device 1600, sub LCD display device 3114, and upper tray LCD display device 244. When the display control MPU is operating normally, it outputs an operation signal to inform the peripheral control unit 1511. The display control MPU also receives an execution signal from the VDP, and performs interrupt processing when the output of this execution signal is stopped every 16 ms.

[0182] The display control ROM stores a variety of programs for generating screens to be drawn on the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244, as well as schedule data corresponding to control data (display commands) from the peripheral control unit 1511, and non-resident area transfer schedule data corresponding to that control data (display commands). The schedule data is made up of screen data that specifies the screen configuration, arranged in chronological order, and specifies the order in which screens are drawn on the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244. The non-resident area transfer schedule data is made up of non-resident area transfer data that specifies the order in which various data stored in the image ROM (performance data ROM) is transferred to the non-resident area of ​​the image RAM, arranged in chronological order. This non-resident area transfer data specifies the order in which various types of screen data to be drawn on the main LCD display device 1600, sub LCD display device 3114, and upper tray LCD display device 244 in accordance with the progress of the schedule data are transferred in advance from the image ROM (performance data ROM) to the non-resident area of ​​the image RAM.

[0183] The display control MPU extracts from the display control ROM the first screen data of the schedule data that corresponds to the control data (display command) from the peripheral control unit 1511 and outputs it to the VDP, and then extracts from the display control ROM the screen data that follows the first screen data and outputs it to the VDP. In this way, the display control MPU extracts from the display control ROM the screen data arranged in chronological order in the schedule data one by one, starting from the first screen data, and outputs it to the VDP.

[0184] When the VDP receives screen data output from the display control MPU, it extracts sprite data from the image RAM based on the input screen data, generates drawing data to be displayed on the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244, and outputs this generated drawing data to the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244. When the main LCD display 1600, sub LCD display 3114, or top tray LCD display 244 does not accept screen data from the display control MPU, the VDP outputs an execution signal to the display control MPU to inform the MPU of this. The VDP uses a line buffer system. This "line buffer method" is a method in which one line of drawing data for drawing left and right on the main LCD display device 1600, sub LCD display device 3114, or top tray LCD display device 244 is stored in a line buffer, and the one line of drawing data stored in this line buffer is output to the main LCD display device 1600, sub LCD display device 3114, or top tray LCD display device 244.

[0185] The image ROM (effect data ROM) stores an extremely large amount of sprite data, resulting in a large capacity. When the capacity of the image ROM (effect data ROM) increases—that is, when the number of sprites to be rendered on the main LCD display 1600, sub LCD display 3114, and top-tray LCD display 244 increases—the access speed of the image ROM (effect data ROM) becomes significant, affecting the speed at which images are rendered on the main LCD display 1600, sub LCD display 3114, and top-tray LCD display 244. Therefore, in this embodiment, the sprite data stored in the image ROM (effect data ROM) is transferred and copied to image RAM, which has a fast access speed, and then extracted from this image RAM. Note that sprite data is the original data, i.e., the data before the sprite is expanded into bitmap format, and is stored in a compressed state in the image ROM (effect data ROM).

[0186] To explain the term "sprite," a "sprite" refers to an image displayed as a group on the main LCD display 1600 or the top-tray LCD display 244. For example, when various characters are displayed on the main LCD display 1600, the sub LCD display 3114, or the top-tray LCD display 244, the data for drawing each character is called a "sprite." Thus, when multiple characters are displayed on the main LCD display 1600, the sub LCD display 3114, or the top-tray LCD display 244, multiple sprites are used. In addition to characters, the houses, mountains, roads, and other elements that make up the background are also sprites, and the entire background can be treated as a single sprite. These sprites are drawn on the main LCD display 1600, the sub LCD display 3114, or the top-tray LCD display 244 after their positions on the screen and their hierarchical relationship when sprites overlap (hereinafter referred to as the "sprite overlapping order") are set.

[0187] A sprite is made up of multiple rectangular areas, each 64 pixels wide and 64 pixels tall, glued together. The data used to draw these rectangular areas is called a "sprite character." A small sprite can be represented using a single sprite character, while a relatively large sprite, such as a person, can be represented using a total of six sprite characters, arranged, for example, 2x3. Even larger sprites, such as backgrounds, can be represented using even more sprite characters. In this way, the number and arrangement of sprite characters can be specified freely for each sprite.

[0188] The main LCD display 1600, sub LCD display 3114, and top tray LCD display 244 are driven by main scanning, which sets the display state of each pixel in one direction along the pixels, sequentially from left to right when viewed from the front, and sub scanning, which repeats main scanning in a direction intersecting the one direction. When the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244 receive one line of drawing data output from the LCD display control unit 1512, they output the data to each line of pixels sequentially in the main scanning direction from left to right when viewed from the front of the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244. Once the output of one line is completed, the main LCD display device 1600, sub LCD display device 3114, and top tray LCD display device 244 move on to the line directly below as a sub-scan, and when the drawing data for the next line is input in the same way, they output the drawing data for the next line to the pixels in one line sequentially as a main scan from left to right when viewed from the front of the main LCD display device 1600, sub LCD display device 3114, and top tray LCD display device 244.

[0189] [4. Game Contents] Next, the game content of the pachinko machine 1 of this embodiment will be described mainly with reference to Figures 10, 16, and 17. In the pachinko machine 1 of this embodiment, a player rotates the handle lever 504 of the handle unit 500 located in the lower right corner of the front of the door frame 3, causing game balls stored in the upper tray 201 of the tray unit 200 to pass between the outer rail 1001 and the inner rail 1002 of the game board 5 and be shot into the upper part of the game area 5a, thereby starting a game using the game balls. The game balls shot into the upper part of the game area 5a flow down either the left or right side of the center device 2500 depending on the force of the shot. The force of the shot can be adjusted by the amount of rotation of the handle lever 504. The more clockwise the rotation, the stronger the shot. Up to 100 game balls can be shot continuously per minute, that is, at 0.6-second intervals.

[0190] In addition, within the game area 5a, a plurality of obstacle nails (not shown) are planted in a predetermined gauge arrangement at appropriate positions on the front surface of the game panel 1100 (panel board 1110), and when the game ball hits the obstacle nails, the flow speed of the game ball is suppressed and various movements are imparted to the game ball, allowing players to enjoy its movements. In addition to the obstacle nails, within the game area 5a, there are also provided at appropriate positions windmills (not shown) that rotate when the game ball hits them.

[0191] When a game ball shot into the upper part of the center device 2500 enters the left side of the highest part of the outer circumferential surface of the front peripheral wall portion 2512 of the center device 2500 as viewed from the front, it comes into contact with a plurality of obstacle nails (not shown) and flows down the area to the left of the center device 2500. Then, when the game ball flowing down the area to the left of the center device 2500 enters a warp entrance 2520 opening into the outer circumferential surface of the front peripheral wall portion 2512 of the center device 2500, it passes through a warp passage 2521, passes through a warp exit 2522 opening into the frame of the center device 2500, and is supplied to a stage 2530 through a guide path 2523.

[0192] A gaming ball supplied to the stage 2530 from the warp exit 2522 rolls back and forth on the stage 2530 and is released rearward from either a central guide section 2531 in the center of the left-right direction or one of the side guide sections 2532 on either side of the central guide section 2531. When a gaming ball is released into the gaming area 5a from the central guide section 2531 of the stage 2530, this central guide section 2531 is located directly above the first starting opening 2002, and therefore the gaming ball released from the central guide section 2531 is received by the first starting opening 2002 with a high probability. When a gaming ball is received by this first starting opening 2002, a predetermined number (e.g., three) of gaming balls are paid out from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

[0193] When the game ball rolling on the stage 2530 is released into the game area 5a from the side guide section 2532, it flows down toward the start opening unit 2100. The game ball released into the game area 5a from the stage 2530 of the center role device 2500 may be received by the first start opening 2002 of the start opening unit 2100, the first large winning opening 2005 in an open state, or the like.

[0194] Incidentally, if a gaming ball that has flowed down to the left side of the center device 2500 does not enter the warp entrance 2520, it may be moved toward the center in the left-right direction by the shelf portion 2302 of the upper side unit 2300, and may be received by the general winning opening 2001 or the first starting opening 2002 of the lower side unit 2200. Then, when a gaming ball is received by the general winning opening 2001, a predetermined number (for example, 10 balls) of gaming balls are paid out from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

[0195] On the other hand, when a gaming ball that is shot into the upper part of the center device 2500 in the gaming area 5a enters (is shot into) the right side of the highest part of the outer peripheral surface of the front peripheral wall part 2512 of the center device 2500, it enters the upper right circulation space 2541 of the right-hit gaming area 2540. Although not shown, a plurality of obstacle nails are planted in this upper right circulation space 2541, and the gaming ball circulates while coming into contact with the obstacle nails and changing its flow direction in various ways. This upper right circulation space 2541 is provided with a gate part 2003 at the top, and a general winning opening 2001 and a second starting opening 2004 that is normally closed by a second starting opening door member 2549 at the bottom.

[0196] The gaming balls that have flowed down the upper right circulation space 2541 pass through the downstream right circulation passage 2542 and enter the lower right circulation space 2543. The gaming balls that have entered this lower right circulation space 2543 pass through the second attacca passage 2543a, the bottom of which is formed by the upper surfaces of the second upper large prize opening door element 2552 and the second lower large prize opening door element 2555 that close the second upper large prize opening 2006a and the second lower large prize opening 2006b that are lined up on the left and right as the second large prize opening 2006, and are released into the gaming area 5a from the left end of the lowered release plate portion 2559 on the left side as viewed from the front. The downstream end (release plate portion 2559) of the second attacca passage 2543a is open so that the game ball is directed toward the first large prize opening 2005 of the starting port unit 2100, and when the first large prize opening 2005 is in the open state, if a game ball is released from the second attacca passage 2543a into the game area 5a, there is a high probability that the game ball will be accepted into the first large prize opening 2005.

[0197] The gaming balls flowing through the right circulation passage 2542 and the lower right circulation space 2543 flow downward while the increase in circulation speed is suppressed by a plurality of deceleration ribs 2546. In rare cases, the gaming balls may enter the discharge passage 2543b branching off near the upstream end of the second attacca passage 2543a in the lower right circulation space 2543, and the gaming balls that have entered the discharge passage 2543b are discharged outside the gaming board 5 from the second outlet 2543c without being returned to the gaming area 5a.

[0198] When a gaming ball that has been hit to the right and entered the upper right circulation space 2541 passes through the gate section 2003 and is detected by the gate sensor 2547, one normal random number is obtained from the normal random numbers that are updated within a predetermined numerical range in the main control board 1310, and this obtained normal random number is compared with a predetermined normal win determination table to conduct a normal lottery. When the time-saving control described below is not being executed, if the result of this normal lottery is a "normal win," the second starting port door element 2549 rotates once counterclockwise as viewed from the front, opening the second starting port 2004 and allowing the second starting port 2004 to receive gaming balls for a predetermined time (0.5 seconds in this example). On the other hand, when the time-saving control is being executed, a "normal win" is determined in the normal lottery, and it is determined whether the result is a "first normal win," a "second normal win," or a "third normal win." When the time-saving control is being executed, if the result of the regular lottery is either "first regular win," "second regular win," or "third regular win," the second starting port door element 2549 rotates counterclockwise when viewed from the front to open the second starting port 2004, thereby enabling the reception of game balls into the second starting port 2004 for a predetermined period of time, and then rotates counterclockwise when viewed from the front to close the second starting port 2004, thereby disabling the reception of game balls into the second starting port 2004. This opening and closing control is repeated a predetermined number of times (five times in this example). If the result of the regular lottery is a "first regular win," the five periods during which the second starting port 2004 is in a state where it can receive game balls are "0.3 seconds," "0.28 seconds," "0.3 seconds," "0.28 seconds," and "0.3 seconds," and if the result of the regular lottery is a "second regular win," the five periods during which the second starting port 2004 is in a state where it can receive game balls are "0.3 seconds," "0.28 seconds," and "1.1 seconds." , "0.28 seconds," and "0.3 seconds," and when the result of the regular lottery is the "third regular win," the five periods during which the second starting port 2004 is in a state where it can accept game balls are set to "0.3 seconds," "0.28 seconds," "0.3 seconds," "0.28 seconds," and "1.1 seconds," and the "second regular win" and the "third regular win" are more advantageous to the player than the "first regular win" (it is easier to accept game balls into the second starting port 2004).Furthermore, when game balls are received in the second starting port 2004, a predetermined number (for example, three) of game balls are dispensed from the dispensing device 830 to the upper tray 201 via the main control board 1310 and the dispensing control board 951.

[0199] In this embodiment, when a gaming ball passes through the gate 2003, the normal symbol display of the function display unit 1400 displays a variable normal symbol. A certain time is set (e.g., 0.01 to 60 seconds, also referred to as the normal variable time) from the start of the variable normal symbol display to the static display of the normal symbol (the time indicating the normal lottery result). In the second start gate 2004, the second start gate door element 2549 rotates to an open state after the normal variable time has elapsed. During the execution of the time-saving control described below, control is executed to shorten the normal variable time compared to the normal state (when time-saving control is not being executed). The opening time for rotating the second start gate door element 2549 to open the second start gate 2004 may be varied depending on the game state. For example, when time-saving control is not being executed, the opening time for the second start gate 2004 may be set to a longer time than when time-saving control is being executed.

[0200] Furthermore, if a new gaming ball passes through the gate unit 2003 between the time a gaming ball passes through the gate unit 2003 and the time the variable normal symbols displayed on the normal symbol display are stopped (until the normal lottery result is indicated), the normal symbol display cannot start displaying the variable normal symbols again. Therefore, the start of the variable normal symbol display is suspended until the variable normal symbol display of the previous normal symbol has finished (until the normal lottery result is indicated). Specifically, the normal random number acquired by the main control board 1310 based on the detection of a gaming ball passing through the gate unit 2003 by the gate sensor 2547 is stored, and the start of the variable normal symbol display is suspended until the display of the variable normal symbol can be started. Note that the main control board 1310 can store up to four reserved normal random numbers; any more than that are discarded without being reserved even if a gaming ball passes through the gate unit 2003. This prevents the burden on the gaming hall from increasing due to the accumulation of reserved numbers.

[0201] In the pachinko machine 1 of this embodiment, when a gaming ball received in the first starting port 2002 is detected by the first starting port sensor 2104, one first special random number is acquired from first special random numbers updated within a predetermined numerical range in the main control board 1310, and the acquired first special random number is compared with a predetermined jackpot determination table to perform a lottery for a first special lottery result that will generate an advantageous gaming state (e.g., "jackpot," "small jackpot," etc.) that is advantageous to the player. Then, based on the first special lottery result, the eight LEDs of the first special symbol display are controlled to blink for a predetermined variable time (e.g., 0.1 to 360 seconds), and then displayed in a lighting mode corresponding to the first special lottery result (the first special symbol is variably displayed, and then a stop symbol corresponding to the first special lottery result is displayed), thereby suggesting the first special lottery result to the player. In addition, the first special lottery results, which are drawn when a game ball is accepted into the first starting port 2002, include "miss," "small hit," "2R jackpot," "8R jackpot," and "10R jackpot," and which of these results is determined by comparing the obtained first special random number with a jackpot determination table.Furthermore, it is also determined whether or not to execute probability improvement control (high probability state (also called special jackpot state): in this example, the jackpot has a probability of about 1 in 44) that improves the probability of winning a jackpot (winning probability) compared to normal (low probability state: in this example, the jackpot is won with a probability of about 1 in 395) after a jackpot game (whether or not it is a special jackpot), and whether or not to execute time-saving control (time-saving state) that shortens the fluctuation time more than normal at least when the first special lottery result is a miss (whether or not it is a time-saving jackpot), and the period for which time-saving control is to be executed (number of time-saving times: number of times the special symbols (first special hitting symbol and second special symbol fluctuate)). The probability of winning a "small win" is always constant regardless of the game status (in this example, approximately 1 in 300).

[0202] Furthermore, when a gaming ball received in the second starting port 2004 is detected by the second starting port sensor 2551, one second special random number is acquired from the second special random numbers updated within a predetermined numerical range in the main control board 1310, and the acquired second special random number is compared with a predetermined big win determination table to draw a second special lottery result that will generate an advantageous gaming state (for example, "big win," "small win," etc.) that is advantageous to the player. Then, based on the second special lottery result that has been drawn, the eight LEDs of the second special symbol display are controlled to blink for a predetermined variable time (for example, 0.1 to 360 seconds), and then displayed in a lighting mode corresponding to the second special lottery result (the second special symbol is variably displayed, and then a stop symbol corresponding to the second special lottery result is displayed), thereby suggesting the second special lottery result to the player. The second special lottery results that are drawn when a game ball is received in the second starting port 2004 include "miss," "2R jackpot," "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," and "16R jackpot," and the obtained second special random number is compared with a jackpot determination table to determine which of these results it is, and furthermore, after playing a jackpot, the probability of winning is higher than usual (low probability state: in this example, the probability of winning a jackpot is about 1 in 395). It is also possible to determine whether to execute probability improvement control (high probability state (also called probability change state): in this example, there is a 1 in 44 chance of winning the jackpot) to improve the probability of winning (winning probability) (whether it is a probability change jackpot or not), whether to execute time-saving control (time-saving state) to shorten the fluctuation time more than usual when at least the second special lottery result is a miss (whether it is a time-saving jackpot or not), and the period for which time-saving control is executed (number of time-saving times: number of times the special symbols (number of times the first special hit symbol and the second special symbol fluctuate)).

[0203] If the special lottery result (first special lottery result and second special lottery result) drawn by the acceptance of game balls into the first starting port 2002 and the second starting port 2004 is a special lottery result that generates a favorable game state, after a predetermined fluctuation time has elapsed, the eight LEDs of the special pattern display (first special pattern display, second special pattern display) are displayed in a lighting mode corresponding to the special lottery result, and then either the first large winning port 2005 or the second large winning port 2006 becomes able to accept game balls in a predetermined opening and closing pattern. When the first major winning opening 2005 or the second major winning opening 2006 is in the open state and a gaming ball is received in the first major winning opening 2005 or the second major winning opening 2006, the main control board 1310 and the payout control board 951 cause a predetermined number of gaming balls (for example, 11 when a gaming ball is received in the first major winning opening 2005, or 15 when a gaming ball is received in the second major winning opening 2006) to be paid out from the payout device 830 to the upper tray 201. Therefore, when the first major winning opening 2005 or the second major winning opening 2006 is able to receive gaming balls, by having the first major winning opening 2005 or the second major winning opening 2006 receive gaming balls, a large number of gaming balls can be paid out, providing enjoyment to the player.

[0204] If the result of the special lottery is a "small win" or a "2R big win," the first big prize opening 2005 repeats an opening and closing pattern multiple times (for example, twice) in which it opens to a predetermined short time (for example, between 0.2 and 0.6 seconds) so that it can receive a game ball, and then closes. On the other hand, if the result of the special lottery is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot," then when either of the following conditions is met: a predetermined time (e.g., about 30 seconds) has elapsed after the first major prize opening 2005 or the second major prize opening 2006 has become open and able to accept game balls, or a predetermined number of game balls (e.g., 7 balls) have been accepted into the first major prize opening 2005, or a predetermined number of game balls (e.g., 10 balls) have been accepted into the second major prize opening 2006, the opening and closing pattern (one opening and closing pattern is called one round) that puts the opening and closing opening into a closed state that cannot accept game balls is repeated a predetermined number of times (predetermined number of rounds). For example, a "4R jackpot" is repeated four rounds, a "5R jackpot" is repeated five rounds, and a "16R jackpot" is repeated 16 rounds, thereby generating an advantageous gaming state for the player. Also, in the case where the special lottery result is a "small jackpot" or a "2R jackpot", it is practically difficult to make a gaming ball enter the first major winning port 2005 in the opening / closing pattern (in which the first major winning port 2005 is in an open state capable of receiving a gaming ball for a predetermined short time (for example, between 0.2 and 0.6 seconds) and then closes). In contrast, in the opening / closing pattern executed when the special lottery result is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot" (an opening / closing pattern which switches to a closed state in which game balls cannot be accepted when either a predetermined time (e.g., about 30 seconds) has passed since the first major prize opening 2005 or the second major prize opening 2006 switched to an open state in which game balls can be accepted, or when a predetermined number (e.g., 7 balls) of game balls have been accepted into the first major prize opening 2005 or a predetermined number (e.g., 10 balls) of game balls have been accepted into the second major prize opening 2006), it is easy to get game balls to enter the first major prize opening 2005 or the second major prize opening 2006.In addition, if the result of the special lottery is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot," when either of the following conditions is met: a predetermined time (e.g., about 30 seconds) has elapsed after the first major winning opening 2005 or the second major winning opening 2006 has become an open state capable of receiving game balls, or a predetermined number of game balls (e.g., 7 balls) have been received into the first major winning opening 2005, or a predetermined number of game balls (e.g., 10 balls) have been received into the second major winning opening 2006, the number of rounds for which an opening / closing pattern is executed to make the opening / closing opening a closed state incapable of receiving game balls is substantially It may also be a special lottery result, and when either of the conditions is met, that is, that a predetermined number (e.g., 7) of game balls are received into the first large winning opening 2005 or that a predetermined number (e.g., 10) of game balls are received into the second large winning opening 2006 as a special lottery result, multiple rounds may be executed, including an opening / closing pattern that closes the opening so that game balls cannot be received, and an opening / closing pattern that is executed when the special lottery result is a "small win" or a "2R big win" (an opening / closing pattern in which the first large winning opening 2005 is in an open state so that game balls can be received for a predetermined short time (e.g., 0.2 to 0.6 seconds) and then closes). For example, a special lottery result may be set as "an 8R jackpot which is effectively 4R", and when either of the conditions is met, that is, when a predetermined number of game balls (e.g., 7) are received into the first major winning opening 2005 or when a predetermined number of game balls (e.g., 10) are received into the second major winning opening 2006, an opening / closing pattern which puts the opening into a closed state in which game balls cannot be received may be repeated four times, and then an opening / closing pattern which is executed when the special lottery result is a "small win" or a "2R jackpot" (an opening / closing pattern in which the first major winning opening 2005 is in an open state in which it can receive game balls for a predetermined short period of time (e.g., 0.2 to 0.6 seconds) and then closes) may be repeated four times.

[0205] In this embodiment, the second large prize opening 2006 is composed of a second upper large prize opening 2006a and a second lower large prize opening 2006b arranged side by side. In the case of a "jackpot" using the second large prize opening 2006, for example, in the first round (1R), the second upper large prize opening 2006a opens and can receive game balls, and then closes when the conditions for making it unacceptable are met. During the interval until it becomes unacceptable again, the second lower large prize opening 2006b opens and can receive game balls, starting the next round (2R). When the second lower large prize opening 2006b becomes unacceptable, the interval has elapsed, so the second upper large prize opening 2006a reopens and can receive game balls. The second upper large prize opening 2006a and the second lower large prize opening 2006b are alternately opened and closed until a predetermined number of rounds have been played. As a result, within the second attacca passage 2543a, during a "jackpot", either the second upper large prize opening 2006a or the second lower large prize opening 2006b is in a state where it can accept a game ball, so if you hit to the right in this state to circulate a game ball within the second attacca passage 2543a, that game ball will always be accepted by the second large prize opening 2006, eliminating the risk of missing a game ball and allowing the player to enjoy themselves.

[0206] In addition, in this embodiment, for some of the multiple types of jackpots described above, whether or not the time-saving control is executed after the end of the jackpot game varies depending on the game state at the time of winning the jackpot. For example, if the first special lottery result is an 8R normal jackpot in which probability improvement control is not executed after the jackpot game in a non-time-saving state (a state in which time-saving control is not being executed), time-saving control is not executed after the jackpot game. On the other hand, if the first special lottery result is an 8R normal jackpot in a time-saving state (a state in which time-saving control is being executed), time-saving control is executed after the jackpot game. Also, if the second special lottery result is a 2R normal jackpot in which probability improvement control is not executed after the jackpot game in a non-time-saving state (a state in which time-saving control is being executed), time-saving control is not executed after the jackpot game. On the other hand, if the second special lottery result is a 2R normal jackpot in which probability improvement control is not executed after the jackpot game in a time-saving state (a state in which time-saving control is being executed), time-saving control is executed after the jackpot game. Furthermore, in a low-probability non-time-shortening state (a state in which neither probability improvement control nor time-shortening control is being executed: also called the normal state), if the first special lottery result and the second special lottery result are a 2R probability variable jackpot in which probability improvement control is executed after the jackpot game, time-shortening control is not executed after the jackpot game. On the other hand, in a state in which probability improvement control or time-shortening control is being executed, i.e., a state other than the normal state, if the first special lottery result and the second special lottery result are a 2R probability variable jackpot in which probability improvement control is executed after the jackpot game, time-shortening control is executed after the jackpot game.

[0207] In this embodiment, the display of the first special pattern change, which is executed by the first special pattern display device when a gaming ball is received at the first starting port 2002, and the display of the second special pattern change, which is executed by the second special pattern display device when a gaming ball is received at the second starting port 2004, are not executed simultaneously, but only one of them is executed. Therefore, if a new game ball is received into the first starting port 2002 or the second starting port 2004 during the period from when a game ball is received into the first starting port 2002 until the first special pattern displayed in a variable manner on the first special pattern display device is displayed in a static manner (until the result of the first special lottery is suggested) to when a game ball is received into the second starting port 2004 until the second special pattern displayed in a variable manner on the second special pattern display device is displayed in a static manner (until the result of the second special lottery is suggested), it is not possible to start a new display of the variable first or second special pattern on the first special pattern display device or the second special pattern display device, so the start of the display of the variable special patterns (first special pattern, second special pattern) is postponed until the display of the variable special patterns (first special pattern, second special pattern) that have been previously displayed has finished (until the suggestion of the result of the first special lottery or the result of the second special lottery is completed). Specifically, the main control board 1310 stores a first special random number obtained by the first start gate sensor 2104 based on the detection of a gaming ball received in the first start gate 2002, and a second special random number obtained by the main control board 1310 based on the detection of a gaming ball received in the second start gate 2004 by the second start gate sensor 2551, and suspends the start of the variable display of the special symbols (first special symbol, second special symbol) until a state is reached in which the variable display of the special symbols (first special symbol, second special symbol) can be started. Note that the number of reserved first special random numbers and second special random numbers that can be stored in the main control board 1310 is limited to four each, and any numbers greater than this are discarded rather than suspended even if a gaming ball is received in the first start gate 2002 or the second start gate 2004. This prevents the burden on the gaming hall from increasing due to the accumulation of reserved numbers. In addition, of the first special random numbers and second special random numbers stored in the main control board 1310, the second special random numbers are consumed with priority.In other words, regardless of the timing of receiving the game ball into the first starting port 2002 and the second starting port 2004, if the second special random number is stored and the start of the variable display of the second special pattern is put on hold, the variable display of the second special pattern is executed with priority over the first special pattern.

[0208] The special lottery result is suggested by the function display unit 1400 (first special symbol display device, second special symbol display device) and the main LCD display device 1600 (the sub LCD display device 3114 may also be used). The function display unit 1400 suggests the special lottery result by directly controlling it by the main control board 1310. The function display unit 1400 suggests the special lottery result by repeatedly turning on and off the above-mentioned eight LEDs that make up the special symbol display devices (first special symbol display device, second special symbol display device) for a predetermined period of time, and then stopping them in a predetermined lighting pattern, and the special lottery result is suggested by the combination of LEDs that are lit at this time.

[0209] On the other hand, the main liquid crystal display device 1600 is indirectly controlled by the peripheral control board 1510 based on control signals (variable pattern commands, judgment result notification commands, etc.) from the main control board 1310, and the special lottery result is suggested by an effect image. Specifically, in the main liquid crystal display device 1600, a series of decorative pattern rows consisting of a plurality of different patterns are displayed in multiple rows (for example, three rows of left decorative pattern, center decorative pattern, and right decorative pattern), and then the variable display of each decorative pattern row is started, and then they are stopped and displayed sequentially (in this example, the left decorative pattern → right decorative pattern → center decorative pattern are stopped and displayed in this order), and when all the decorative pattern rows are finally stopped and displayed, the lottery result of the special random numbers (first special random number, second special random number) extracted from the combination of the stopped and displayed patterns is suggested to the player. That is, according to the special lottery result (first special lottery result, second special lottery result) based on the special random numbers (first special random number, second special random number) obtained when the start winning occurs, a series of decorative symbols are variably displayed, and then an effect image is displayed that is stopped to suggest the special lottery result (first special lottery result, second special lottery result). Note that, since the decorative symbols displayed on the main liquid crystal display device 1600 are larger and easier to see than the first special symbol variably displayed on the first special symbol display device and the second special symbol variably displayed on the second special symbol display device, players will generally focus their attention on the decorative symbols displayed on the main liquid crystal display device 1600.

[0210] The time indicating the result of the special lottery on the function display unit 1400 (LED flashing time (variation time)) is different from the time indicating the result of the special lottery on the main LCD display device 1600 (the time from when the pattern row changes until the final image is displayed), and the time on the function display unit 1400 is set to a shorter time.

[0211] In addition, in the peripheral control board 1510, in addition to displaying performance images to indicate the results of the special lottery using the main LCD display device 1600, it is possible to perform light-emitting performances, movable performances, display performances, etc. by appropriately using the decorative body of the center role device 2500, the back left center decorative unit 3050, the back bottom rear movable performance unit 3100, the back top left movable performance unit 3200, the back left movable performance unit 3300, the back top middle movable performance unit 3400, and the back bottom front movable performance unit 3500, etc., depending on the results of the special lottery.This allows players to be entertained by various performances, and prevents a decline in the players' interest in the game.

[0212] [5. Various control processes on the main control board] Next, we will explain the processing executed by the main control board 1310 in accordance with the progress of the game on the pachinko machine 1. Specifically, we will explain the system / user reset processing executed when the power of the gaming machine is turned on, and the timer interrupt processing executed at a predetermined cycle (4 ms in this embodiment) by a timer started by the system / user reset processing.

[0213] [5-1. Initialization process] 21 and 22 are flowcharts showing the procedure of the initialization process of the main control board in the embodiment of the present invention.

[0214] When the power is turned on to the pachinko machine 1, the main control MPU 1311 of the main control board 1310 executes the main control program to perform initialization processing. When the initialization processing starts, the main control MPU 1311 first sets the protection of the RAM 1312 built into the main control MPU 1311 to write permission, making it possible to write to the RAM 1312 (step S10). Specifically, it outputs "00H" to the RAM protect register, indicating write permission.

[0215] Next, the main control MPU 1311 starts the built-in watchdog timer (step S12). Specifically, first, "03H" indicating a mode setting is written to the watchdog timer control register, and then "03H" indicating the start of the watchdog timer is written. Furthermore, the watchdog timer is cleared and reset (step S14).

[0216] Next, it is determined whether a predetermined wait time has elapsed (step S16). Since the voltage does not rise immediately after the power supply to the pachinko machine 1 is turned on until it reaches the predetermined voltage, if the voltage falls below the power outage warning voltage during the time from when the power supply is turned on until it reaches the predetermined voltage, a power outage warning signal is input from the power outage monitoring circuit. In the wait process, a predetermined monitoring wait value is set, and the process is put on hold for a predetermined time (for example, 200 milliseconds) while the watchdog timer is activated.

[0217] If the predetermined wait time has elapsed, the time required for starting up the sub-board (such as the peripheral control board 1510) has elapsed, so it is determined whether the RAM clear switch has been operated (step S18). If the RAM clear switch has been operated, data in areas other than the work area for calculating the ratio of winning devices (area for calculating the ratio of winning devices 13128) among the data backed up in the work area of ​​the internal RAM 1312 is erased (step S30), and the process proceeds to step S24. On the other hand, if the RAM clear switch has not been operated, the data backed up in the internal RAM 1312 is not erased, and it is determined whether a power outage flag has been set (step S20). The power outage flag is a flag that is set when the power supply to the pachinko machine 1 is cut off after normal processing, such as when a power outage occurs (see step S56 in FIG. 22).

[0218] As a result, if the power outage flag is not set, the data in the work area of ​​the internal RAM 1312 may be incorrect, so the data backed up in the work area (other than the area 13128 for calculating the ratio of game devices) is erased (step S30), and the process proceeds to step S24. On the other hand, if the power outage flag is set, the power outage flag is cleared, and the checksum calculated from the data backed up in the work area of ​​the internal RAM 1312 using the checksum calculated at the time of the previous power outage is compared (verified) with the checksum stored in step S48 (step S22).

[0219] As a result, if the checksum calculated from the backup data does not match the checksum stored in step S48, the data in the work area of ​​the internal RAM 1312 may not be correct, so the data backed up in the work area (other than the reel ratio calculation area 13128) is erased (step S30), and the process proceeds to step S24. On the other hand, if the checksum calculated from the backup data matches the checksum stored in step S48, the data in the work area of ​​the internal RAM 1312 is correct, so the data backed up in the work area is not erased, and the process proceeds to step S24.

[0220] Next, the check code is used to determine whether the work area for calculating the ratio of reels (area for calculating the ratio of reels 13128) is normal (step S24). If it is determined to be abnormal, the data in the work area for calculating the ratio of reels may be incorrect, so the data stored in the work area for calculating the ratio of reels is erased (step S26).

[0221] When one or more backup areas are provided in the bonus feature ratio calculation area 13128, the main area is first determined using a check code, and if the main area is determined to be abnormal, backup areas 1, 2, and N are determined in that order, and the data of the backup area that is first determined to be normal is copied to the main area. After that, the data in the backup area may be erased or left as is. If the main area is determined to be normal, the data in the backup area may be erased or left as is.

[0222] The data in the feature ratio calculation area 13128 may be erased at predetermined time intervals, separately from the result of the check code determination when the power is turned on. Also, the data in the feature ratio calculation area 13128 may be erased at predetermined operation intervals (for example, at predetermined number of shot balls, at predetermined number of winning balls, at predetermined number of games with special symbol variation display, at predetermined number of jackpots in the special symbol variation display game, etc.).

[0223] As described above, in the pachinko machine of this embodiment, data backed up in the work area of ​​the internal RAM 1312 is erased under different conditions for each type of data (game control data 13132 and bonus feature ratio calculation / display data 13136). That is, by operating the RAM clear switch, the backed up game control data 13132 is erased, but the backed up bonus feature ratio calculation / display data 13136 is not erased. If the bonus feature ratio calculation / display data 13136 can be erased by operating the RAM clear switch, the bonus feature ratio calculated by the pachinko machine 1 can be erased at any time. Therefore, by operating the RAM clear switch, the backed up bonus feature ratio calculation / display data 13136 is not erased, preventing the deletion of the bonus feature ratio calculation / display data 13136 by an amusement parlor attendant and preventing the concealment of an abnormal bonus feature ratio. This makes it easy to detect gaming machines that have been modified to have a high or low bonus feature ratio.

[0224] When the power recovery setting of the RAM work area or the RAM initialization process is executed, the main control MPU 1311 executes initial settings to set various setting registers of the main control MPU 1311 (CPU 13111) (step S28). In the initial settings of the main control MPU 1311, first, the CTC (Counter / Timer Circuit) is initialized and interrupts are permitted. Furthermore, the serial communication port and test signal output port are initialized. A hardware random number generation circuit is started. Then, the serial communication circuit 13114 used for communication with the peripheral control board 1510, the payout control board 951, and the bonus ratio display 1317 is configured. Furthermore, after the serial communication circuit 13114 starts operating, the driver circuit 13171 of the bonus ratio display 1317 is initialized.

[0225] Next, the main control MPU 1311 executes a process to set a power-on command to be sent to the peripheral control board 1510 (step S32). In the power-on command creation process, game information is read from the game backup information, and various commands corresponding to the game information are stored in a predetermined storage area of ​​the main control internal RAM 1312. To generate the power-on command, a power-on state reference command is set as reference command data, and command addition data corresponding to the command to be generated is added.

[0226] The power-on commands include the power-on status buffer command and the special symbol / electric device operation number command. The power-on status buffer command is a command that notifies the game status when the power is restored after a power outage, and notifies the probability of winning the special lottery and the operation mode of the regular electric device. On the other hand, the special symbol / electric device operation number command notifies the execution status of the special symbol variable display.

[0227] Thereafter, the main control MPU 1311 permits execution of interrupt processes, including timer interrupt processes (step S34). The initial setting of the pachinko machine 1 is completed by the processes from powering on the pachinko machine 1 to step S34 (initial setting means).

[0228] Next, the main control MPU 1311 acquires the power outage warning signal (step S36) and determines whether the power outage warning signal is ON (step S38). If the power outage warning signal is not ON (the result of step S38 is "No"), that is, a random number update process is executed (step S40). The random number update process of step S46 mainly updates random numbers other than the random numbers used to determine whether a special lottery or a regular lottery has been won. Note that the update process of the random numbers used to determine whether a special lottery or a regular lottery has been won is executed by a timer interrupt process, which will be described later. The processes from step S36 to step S40 are executed until the power outage warning signal is detected, and these processes are treated as the main process on the main control side (normal means after initial setting).

[0229] On the other hand, if a power outage warning signal is detected (the result of step S38 is "Yes"), the main control MPU 1311 executes power-off processing (power-off setting means). In the power-off processing, data is backed up to restore the state before the power outage. Specifically, interrupt processing is first prohibited (step S42). This prevents the timer interrupt processing described below from being executed, preventing writing to the main control internal RAM 1312 and protecting game information from being overwritten. Furthermore, the main control MPU 1311 clears the output ports to stop the operation of devices controlled by the output from each port (step S44). Specifically, power-off clear signal OFF bit data is set in the solenoid, power-off clear, and ACK output ports. It is not necessary to clear all output ports; for example, it is sufficient to clear output ports for controlling solenoids and motors that consume a large amount of power. Clearing these output ports reduces power consumption during the time until the main board power-off processing is completed, ensuring that the main board power-off processing is completed reliably.

[0230] Next, the main control MPU 1311 calculates a checksum to determine whether the data stored in the work area to be backed up has been properly stored (step S46). Furthermore, the checksum calculation result is stored in the checksum area of ​​the RAM 1312 (step S48). This checksum is used to determine whether the data backed up in the work area is correct.

[0231] Next, a check code (e.g., a checksum) is calculated from the data in the work area for calculating the ratio of features (area 13128 for calculating the ratio of features) (step S50). If the check code is a fixed value, there is no need to calculate the check code in step S50. Note that the check code may be calculated and stored each time data is updated in the feature ratio calculation and display process, rather than in the process when the main board is powered off.

[0232] Next, the calculated check code (or a predetermined value used as the check code) is stored in a predetermined area of ​​the role ratio calculation area 13128 (step S52).

[0233] Next, the data in the main area of ​​the work for calculating the ratio of features (area 13128 for calculating the ratio of features) is copied to each backup area (step S54). At this time, the calculated check code is also copied. Backup may be performed as appropriate (for example, whenever data is updated) in the calculation and display process of the ratio of features, rather than as a process when the power is turned off on the main board.

[0234] In this way, by storing the data used to calculate the reel ratio in a backup area together with the calculated (or predetermined value) check code, the data for calculating the reel ratio can be retained even when the power is cut off, and the reel ratio can be calculated over a long period of operation.

[0235] Furthermore, a value indicating that the backup has been successfully completed is stored in the backup flag area as a power outage flag (step S56). This completes the storage of the game backup information. Finally, writing to RAM 1312 is prohibited by outputting "01H" indicating write prohibition to the RAM protect register (step S58), and the system waits until the power outage is restored (infinite loop).

[0236] [5-2. Timer interrupt processing] Next, the timer interrupt process will be described. The timer interrupt process is repeatedly performed at intervals of the interrupt period (4 ms in this embodiment) set in the initialization process shown in Figures 21 and 22. Figure 23 is a flowchart showing an example of the timer interrupt process.

[0237] When timer interrupt processing starts, the main control MPU 1311 executes the main control program, first setting 1 to the RBS (register bank selection flag) in the program status word and switching the register (step S70). In this embodiment, the main control board 1310 has bank 0 and bank 1, which are switched between each time timer interrupt processing is executed.

[0238] Next, the main control MPU 1311 executes switch input processing (step S74). In the switch input processing, various signals input to the input terminals of the various input ports of the main control MPU 1311 are read and stored as input information in the input information storage area of ​​the main control internal RAM 1312. Specifically, the MPU 1311 reads detection signals from various sensors that detect game balls entering prize winning holes such as the general prize winning hole, detection signals from the magnetic detection switch 3024 that detects fraudulent activity using magnets, and a payer ACK signal from the payout control board 951 that notifies the payout control board 951 that the prize ball command sent in the prize ball control processing has been successfully received, and stores these as input information in the input information storage area. In addition, in the switch input processing, the MPU 1311 reads detection signals from the discharged ball sensor 3060 and the fired ball sensor 1020 to count the number of out balls.

[0239] Next, the main control MPU 1311 performs a timer update process (step S76). In the timer update process, for example, the time for which the special symbol display 1185 is illuminated according to the variable display pattern determined by the special symbol and special electric device control process described below, the time for which the normal symbol display 1189 is illuminated according to the normal symbol variable display pattern determined by the normal symbol and normal electric device control process, and other time management are performed, such as the ACK signal input determination time set as a determination condition when determining whether a payer ACK signal indicating that the payout control board 951 has successfully received various commands transmitted by the main control board 1310 (main control MPU 1311) has been input. Specifically, when the variable display pattern or normal symbol variable display pattern has a variable time of 5 seconds, the timer interrupt period is set to 4 ms, and therefore, the variable time is subtracted by 4 ms each time this timer subtraction process is performed, and the subtraction result becomes 0, thereby accurately measuring the variable time of the variable display pattern or normal symbol variable display pattern.

[0240] Next, the main control MPU 1311 executes random number update process 1 (step S78). In random number update process 1, the random number for determining a jackpot, the random number for a jackpot symbol, and the random number for a small jackpot symbol are updated. In addition to these random numbers, the random number for determining the initial value for a jackpot symbol and the random number for determining the initial value for a small jackpot symbol, which are updated in the non-win / lose random number update process of step S40 in the system / user reset process (main process on the main control side) shown in the figure, are also updated.

[0241] Next, the main control MPU 1311 executes a prize ball control process (step S80). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be paid out is calculated based on the read input information, and the result is written to the main control built-in RAM 1312. In addition, based on the calculation result of the number of prize balls, a prize ball command for paying out game balls is created, and a self-check command for checking the connection status between the main control board 1310 and the payout control board 951 is created. The main control MPU 1311 transmits the created prize ball command and self-check command to the payout control board 951 as main payout serial data.

[0242] Next, the main control MPU 1311 determines the current game state, adds the number of prize balls to be paid out as the game value to an area corresponding to the current game state, and updates the area 13128 for calculating the ratio of prize balls in the main control built-in RAM 1312 (see FIG. 26) (step S81). The processing of step S81 can be skipped if there are no prize balls to be paid out in step S80, thereby reducing the load on the pachinko machine 1.

[0243] Next, the main control MPU 1311 executes the slot command reception process (step S82). The dispensing control board 951 transmits various 1-byte (8-bit) commands (e.g., slot status 1 command, error release navigation command, and slot status 2 command) classified as status indications according to the dispensing control program. Meanwhile, as described below, the dispensing control program outputs an error occurrence command if an error occurs in the dispensing operation, and outputs an error release notification command based on the detection signal of the operation switch. In the slot command reception process, when various commands are successfully received as payer serial data, information informing the payer control board 951 of this fact is stored as output information in the output information storage area of ​​the main control internal RAM 1312. In addition, the main control MPU 1311 converts the command successfully received as payer serial data into a 2-byte (16-bit) command (e.g., slot status display command, error release notification command, etc.) and stores it as transmission information in the transmission information storage area described above. In addition, in the prize ball discharge process, the number of prize balls discharged is recorded in a memory area (see Figure 27) determined by the game status of the device ratio calculation area 13128.

[0244] The reel ratio calculation area update process (step S81) may be executed in any order as long as it is executed after the prize ball control process (step S80) and before the reel ratio calculation and display process (step S89).

[0245] Next, the main control MPU 1311 executes a fraud detection process (step S84). In the fraud detection process, an abnormal state related to the prize balls is confirmed. For example, when the input information is read from the input information storage area and the count switch detects that a game ball has entered the large prize slots 2005 and 2006 when the game is not in a jackpot game state, the main control program creates a prize abnormality display command classified as a notification display as an abnormal state, and stores the command as transmission information in the transmission information storage area.

[0246] Next, the main control MPU 1311 executes the special symbol and special electric accessory control process (step S86). In the special symbol and special electric accessory control process, it is determined whether the random number value for the jackpot matches a win determination value pre-stored in the main control built-in ROM. Furthermore, it is determined whether to transition to a probability variable state based on the random number value of the jackpot symbol. If the probability variable transition condition is met, the game is subsequently transitioned to the probability variable state, while if the probability variable transition condition is not met, the game is transitioned to a game state other than the probability variable state. Here, the "probability variable state" refers to a state (high probability state) in which the probability of winning the special lottery described above is set relatively high compared to the normal game state (low probability state).

[0247] Next, the main control MPU 1311 executes the normal symbol and normal electric device control process (step S88). In the normal symbol and normal electric device control process, input information is read from the input information storage area described above, and it is determined whether or not a detection signal from the gate switch 2352 has been input to the input terminal. If a detection signal has been input to the input terminal, a random number for determining whether or not a normal symbol has been hit is extracted, and it is determined whether or not it matches a normal symbol hit determination value pre-stored in the main control built-in ROM (referred to as the "normal lottery"). Then, depending on the result of the normal lottery, it is determined whether or not to open or close the second starting opening door element 2549. If the opening or closing operation is to be performed based on this determination, the second starting opening door element 2549 is opened (or expanded), thereby entering a gaming state in which the starting opening 2004 can receive gaming balls, and transitioning to a gaming state that is advantageous to the player.

[0248] Next, the main control MPU 1311 determines whether the display switch 1318 has been operated, and if the display switch 1318 has been operated, calls the role ratio calculation and display process (FIGS. 24 and 25) and calculates the role ratio by referring to the number of prize balls stored in the role ratio calculation area 13128. Then, the calculated role ratio is displayed on the role ratio display 1317 (step S89). In this way, by calling the role ratio calculation and display process in the timer interrupt process and calculating the role ratio, the role ratio (the gambling nature of the pachinko machine 1) based on the most recent data can be confirmed.

[0249] Note that regardless of whether the display switch 1318 is operated, if the main frame release switch (not shown) detects that the main frame 4 has been released from the outer frame 2, the bonus feature ratio may be displayed. Also, if the display switch 1318 is operated while the main frame release switch (not shown) is detecting that the main frame 4 has been released from the outer frame 2, the bonus feature ratio may be displayed on the bonus feature ratio indicator 1317. Since the display switch 1318 is provided on the back side of the game board, when the display switch 1318 is displayed, the main frame 4 is usually released and the progress of the game has stopped. In this way, if the bonus feature ratio is calculated when the progress of the game has stopped, CPU resources are not consumed by divisions and subtractions to calculate the bonus feature ratio during play, and the load on the CPU can be reduced.

[0250] Details of the reel ratio calculation and display process will be described later with reference to Figs. 24 and 25. Specific examples of the method of displaying the reel ratio will be described later. When the display switch 1318 is operated, all types of values ​​(reel ratio, consecutive reel ratio, cumulative total, total cumulative total) may be calculated, but only the value to be displayed may be calculated each time the display switch 1318 is operated. Furthermore, the reel ratio may be calculated regardless of whether the display switch 1318 is operated, and if the display switch 1318 is operated, the calculated reel ratio may be displayed on the reel ratio display 1317.

[0251] Even if the pachinko machine 1 detects fraud and stops the game, it executes the reel ratio calculation area update process (step S81) and the reel ratio calculation and display process (step S89). By executing these processes, regardless of whether fraud is detected or not, the reel ratio can be confirmed even while fraud is being reported.

[0252] Next, the main control MPU 1311 executes an output data setting process (step S90). In the output data setting process, various signals are output from the output terminals of the various output ports of the main control MPU 1311. For example, when various commands from the payout control board 951 are normally received from the output terminal of a predetermined output port of the main control MPU 1311 based on the output information, a main payout ACK signal is output to the payout control board 951, and when the game is in a jackpot game state, a drive signal is output to the attacca solenoids (first attacca solenoid 2113, second upper attacca solenoid 2553, second lower attacca solenoid 2556) which perform the opening and closing operation of the opening and closing member 2107 of the large prize openings 2005 and 2006, and a drive signal is output to the start port solenoid 2550 which performs the opening and closing operation of the start port (second start port door member 2549).In addition, various information (game information) signals and security signals related to the game, such as probability fluctuation information output signal, special pattern display information output signal, normal pattern display information output signal, time-reduction information output information output information, and start port winning information output signal, are output to the payout control board 951.

[0253] In addition, in the output data setting process, a signal corresponding to the number of balls out counted in the switch input process (step S74) is output from the external terminal board 784. For example, a pulse signal of a predetermined length may be output from the external terminal board 784 for every predetermined number of balls out (e.g., 10).

[0254] Furthermore, the output data setting process sets test signals to be output to an inspection device connected to the pachinko machine 1. The test signals include, for example, signals indicating the game status and signals indicating the stopped symbols of normal symbols and special symbols (information signal output means).

[0255] Next, the main control MPU 1311 executes peripheral control board command transmission processing (step S92). In the peripheral control board command transmission processing, transmission information such as commands and data is read from the transmission information storage area described above, and the transmission information is transmitted to the peripheral control board 1510 as main serial data. The transmission information stores various commands created in this routine, the timer interrupt processing. One packet of main serial data is composed of 3 bytes. Specifically, the main serial data is composed of a status indicating the type of command, which has a storage capacity of 1 byte (8 bits), a mode indicating the variation of the effect, which has a storage capacity of 1 byte (8 bits), and a sum value calculated by treating the status and mode as numerical values, and this sum value is generated at the time of transmission.

[0256] Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). By setting the predetermined value in the watchdog timer clear register WCL, the watchdog timer clear register WCL is cleared. Finally, the main control MPU 1311 switches (restores) the register bank. When the above processing is completed, the timer interrupt processing is terminated and the processing before the interrupt is restored.

[0257] In the pachinko machine 1 of this embodiment, the main control MPU 1311 executes the calculation process of the role ratio and the consecutive role ratio in the timer interrupt process, but the payout control MPU of the payout control unit 952 may execute the calculation process of the role ratio and the consecutive role ratio. In this case, the main control board 1310 may send a command to the peripheral control unit 1511 of the peripheral control board 1510 to display the role ratio and the consecutive role ratio, or the payout control unit 952 may send a command to the peripheral control unit 1511 to display the role ratio and the consecutive role ratio.

[0258] [5-3. Calculation and display processing of the ratio of special features] 24 and 25 are flowcharts showing an example of the role ratio calculation and display process. The role ratio calculation and display process is executed by the main control MPU 1311. The peripheral control unit 1511 of the peripheral control board 1510 may also execute the role ratio calculation and display process. When the peripheral control unit 1511 calculates the role ratio, the calculated role ratio may be displayed on the main liquid crystal display device 1600. For example, if the calculated role ratio is within a predetermined range (or outside the range), the presentation in the game may be changed. Specifically, if the role ratio exceeds a predetermined threshold (a threshold smaller than the reference value), the preview presentation may be changed to provide a preview presentation that is more interesting than a normal preview presentation.

[0259] First, a check code is calculated from the main area of ​​the reel ratio calculation area 13128 in the RAM 1312 of the main control MPU 1311 (step S140), and it is determined whether the calculated check code matches the check code stored in the reel ratio calculation area 13128 (step S142). If the calculated check code matches the check code stored in the reel ratio calculation area 13128, the data in the main area is normal, so a reel ratio calculation process is executed, and the reel ratio and consecutive reel ratio are calculated from the data in the main area and ...

Claims

[Claim 1] A gaming machine that can generate a special gaming state based on the result of a lottery, a prize medium awarding means for awarding a prize medium based on the winning of a prize; a game stopping means for calculating a difference based on the number of game media consumed in a game and the number of prize media to be awarded, and for executing a setting for stopping the progress of a game based on the calculated difference; a game stop canceling means for canceling the stop of a game when the game is stopped by the game stop means; An operation means that is operated to execute the game stop release means; Equipped with The game stop release means allows the game to be returned to a state in which the game is possible by operating the operation means after the game has been stopped by the game stop means, and initializes the difference; The gaming machine is provided with a movable accessory having a light emitting body and a specific detection means capable of detecting an error state, A specific detection notification can be executed based on the detection by the specific detection means, the gaming machine includes a specific state control process capable of controlling specific information whose output state is switched based on the difference; the specific state control process is a process of controlling a state in which output of the specific information is stopped in a normal state, and switching the state in which output of the specific information is stopped to a specific output state when the difference becomes a specific threshold that is smaller than a predetermined threshold, a symbol display means for displaying a variable symbol based on the result of the lottery; A storage means capable of storing information relating to the variable display of unexecuted symbols as reserved information up to a predetermined number; a hold display means for displaying a hold corresponding to the hold information; a performance execution means for executing a predetermined performance; a special operation means operable by a player; The hold display means can display a hold effect display including a hold pattern display corresponding to the hold information stored in the storage means and a current hold pattern display corresponding to the executed pattern change display, and a hold number display indicating a number corresponding to the number of memories in the storage means, the symbol display means is capable of displaying a first symbol and a second symbol smaller than the first symbol; the effect execution means is capable of controlling the display to a plurality of display states, The plurality of display states include: A first display state in which the hold effect display and the hold number display are displayed, and the first pattern and the second pattern are displayed; a second display state in which the hold effect display is not displayed and the hold number display is displayed, or the hold effect display and the hold number display are not displayed, and the first symbol is not displayed and the second symbol is displayed, or the first symbol and the second symbol are not displayed, the effect execution means, when detecting a special detection means provided in the special operation means within a predetermined time after the second display state is entered, is capable of canceling the second display state without displaying the special display that is to be displayed after the predetermined time has elapsed; In the second display state, no display indicating the passage of the predetermined time is performed, Furthermore, in the second display state, an image display imitating the special operation means is not displayed, and the second display state can be canceled based on detection by the special detection means provided in the special operation means while the image display imitating the special operation means is not displayed, When the second display state is cancelled by detection by the special detection means provided in the special operation means, an imitation image display simulating a specific operation means different from the special operation means is displayed, and operation of the specific operation means can be accepted while the imitation image display of the specific operation means is being displayed, and a special display different from the special display can be displayed based on the operation acceptance of the specific operation means, the effect execution means is capable of canceling the second display state as time passes, even if the special detection means does not detect the second display state, after the predetermined time has elapsed since the second display state was established and the display of the special display has begun; The special operation means is provided as a pressing operation means or a rotating operation means, and the special detection means is provided as a means for detecting a pressing operation or a rotating operation on the pressing operation means or the rotating operation means, or as a means for detecting a player's contact with the pressing operation means or the rotating operation means. A gaming machine characterized by:

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