Display panel, manufacturing method, and display device

Abstract

The display panel includes a base substrate, a driving circuit layer, a connection layer, and an anode layer. The driving circuit layer is provided on one side of the base substrate and includes a plurality of first-type pixel driving circuits located in a first display region. The connection layer is provided on a side of the driving circuit layer away from the base substrate and includes at least one conductive layer and at least one insulating layer, and each conductive layer has an insulating layer on its side away from the base substrate, the conductive layer includes a plurality of connection wirings, and the plurality of connection wirings include a plurality of first wirings. The anode layer is provided on a side of the connection layer away from the base substrate and includes a plurality of first-type anodes located in a second display region. The plurality of first-type anodes includes a plurality of first anodes, and each of two adjacent first anodes is electrically connected to one first-type pixel driving circuit via one first wiring.

Description

[Technical field]

[0001] The present disclosure relates to the field of display technology, and more particularly to a display panel, a manufacturing method thereof, and a display device. [Background technology]

[0002] Full Display Cell (FDC) uses under-screen camera technology to hide the camera and other sensors directly under the screen, achieving a full-screen display.

[0003] When the full-screen display is normally displayed, the light-emitting elements in the light-emitting element layer emit light to form a display screen. When the camera and other sensors of the full-screen display are operated, some of the light-emitting elements facing the sensor do not emit light, and the camera or other sensor receives external light through the light-transmitting light-emitting element layer to operate. Summary of the Invention [Means for solving the problem]

[0004] In one aspect, some embodiments of the present disclosure provide a display panel including a display area, the display area including a first display area and a second display area.

[0005] The display panel includes a display area, which includes a first display area and a second display area.

[0006] The display panel includes a base substrate, a drive circuit layer provided on one side of the base substrate, a connection layer, and an anode layer. The drive circuit layer includes a plurality of first-type pixel drive circuits located in a first display region. The connection layer includes a plurality of connection wires. The plurality of connection wires include a plurality of first wires. The anode layer includes a plurality of first-type anodes located in a second display region. The plurality of first-type anodes include a plurality of first anodes. At least two first anodes are electrically connected to one first-type pixel drive circuit via the first wires.

[0007] In some embodiments, the plurality of connection wirings further comprises a plurality of third wirings, the third wirings connecting at least two of the first anodes, and the first wirings connecting one of the third wirings to one of the first type pixel driving circuits to electrically connect the at least two of the first anodes to the first type pixel driving circuit.

[0008] In some embodiments, the plurality of first-type anodes further comprises a plurality of second anodes and a plurality of third anodes. The plurality of connection wirings further comprises a plurality of second wirings. The second anodes are electrically connected to one of the first-type pixel driving circuits via the second wirings. The third anodes are electrically connected to one of the first-type pixel driving circuits via the second wirings.

[0009] In some embodiments, the at least two first anodes are one first anode group, and among the one adjacent first anode group, one second anode, and one third anode, the length of the first wiring electrically connected to the first anode group is smaller than the length of the second wiring electrically connected to the second anode, and is smaller than the length of the second wiring electrically connected to the third anode.

[0010] In some embodiments, the connection layer is disposed on a side of the drive circuit layer remote from the base substrate, and the anode layer is disposed on a side of the connection layer remote from the base substrate.

[0011] In some embodiments, the connection layer comprises at least one conductive layer and at least one insulating layer, and each conductive layer has one insulating layer on a side away from the base substrate. In some embodiments, the connection layer comprises a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer. The first conductive layer is provided on a side of the drive circuit layer away from the base substrate. The first insulating layer is provided on a side of the first conductive layer away from the base substrate. The second conductive layer is provided on a side of the first insulating layer away from the base substrate. The second insulating layer is provided on a side of the second conductive layer away from the base substrate. The first conductive layer comprises a plurality of first wirings and / or a plurality of second wirings, and the second conductive layer comprises a plurality of first wirings and / or a plurality of second wirings. The plurality of connection wirings further comprises a plurality of third wirings, and the connected third wiring and the first wiring are located in the same conductive layer. The first insulating layer has a first via hole, the second insulating layer has a second via hole, the first conductive layer is electrically connected to the second conductive layer through the first via hole, and the second conductive layer is electrically connected to the anode layer through the second via hole.

[0012] In some embodiments, the plurality of first-type anodes are arranged into a plurality of first-type anode rows. At least one first-type anode row comprises at least two first anodes, at least one second anode, and at least one third anode arranged in a row. At least two of the first anodes in the first-type anode row are electrically connected to a first wire.

[0013] In some other embodiments, the plurality of first-type anodes are arranged into a plurality of first-type anode rows. At least one first-type anode row comprises at least two first anodes, at least one second anode, and at least one third anode arranged in a row. At least two first anodes in the first-type anode row are electrically connected to a first wire.

[0014] In some embodiments, at least one The firstThe first type anode rows are periodically arranged in the order of the second anode, the first anode, the third anode, and the first anode. The multiple connection wirings are arranged in multiple wiring groups. The wiring group includes at least one first wiring and at least two second wirings. The multiple connection wirings extend along a first direction. The first direction is a direction in which the multiple Type 1 The wiring group includes a first wiring connected to at least two first anodes in the first-type anode row, and a second wiring connected to one second anode or one third anode in the first-type anode row.

[0015] In some other embodiments, in the wiring group, the first wiring corresponds to and is connected to at least two first anodes in the first-type anode row. The at least two second wirings in the wiring group include at least one first sub-wiring and at least one second sub-wiring. The first sub-wiring corresponds to and is connected to one second anode or one third anode in the first-type anode row. The second sub-wiring is electrically connected to one second anode or one third anode in another first-type anode row adjacent to the first-type anode row.

[0016] In some embodiments, the at least one first-type anode row is periodically arranged in the order of the second anode, the first anode, the third anode, and the first anode. The multiple connection wires are arranged in multiple wire groups. The wire group includes at least one first wire and at least two second wires. The multiple connection wires extend along a second direction, and the second direction is a multiple Type 1 The wiring group includes a first wiring connected to at least two first anodes in the first-type anode row, and a second wiring connected to one second anode or one third anode in the first-type anode row.

[0017] In some other embodiments, in the wiring group, the first wiring corresponds to and is connected to at least two first anodes in the first-type anode array. The at least two second wirings in the wiring group include at least one first sub-wire and at least one second sub-wire. The first sub-wire corresponds to and is connected to one second anode or one third anode in the first-type anode array. The second sub-wire is electrically connected to one second anode or one third anode in another first-type anode array.

[0018] In some embodiments, the orthogonal projections of the plurality of first-type pixel driving circuits on the base substrate are located on one side or both sides of the orthogonal projections of the plurality of first-type anodes on the base substrate along the extension direction of the plurality of connecting wires.

[0019] In some embodiments, the second conductive layer further comprises a plurality of second connections. The second connections are electrically connected to the first type anode. The connection wiring located on the second conductive layer is electrically connected to the first type anode via the second connections. The first conductive layer further comprises a plurality of first connections. The first connections are electrically connected to the second connections. The connection wiring located on the first conductive layer is electrically connected to the first type anode via the connected first and second connections.

[0020] In some embodiments, the plurality of first wirings and the plurality of third wirings are located on the second conductive layer. Of the connected first wirings and third wirings, the third wiring is connected to two adjacent second connection parts, and thereby connected to two adjacent first anodes. The first wiring is connected to one of two adjacent second connection parts. Of the two adjacent second connection parts, one connected to the first wiring has a closer distance between the orthogonal projection on the base substrate and the orthogonal projection on the base substrate of the first-type pixel driving circuit electrically connected to the two adjacent first anodes than the other.

[0021] In some other embodiments, the plurality of first wirings and the plurality of third wirings are located on the first conductive layer. Of the connected first wirings and third wirings, the third wiring is connected to two adjacent first connection parts, and thereby connected to two adjacent first anodes. The first wiring is connected to one of the two adjacent first connection parts. Of the two adjacent first connection parts, one connected to the first wiring has a closer distance between the orthogonal projection on the base substrate and the orthogonal projection on the base substrate of the first-type pixel driving circuit electrically connected to the two adjacent first anodes than the other.

[0022] In some embodiments, the driving circuit layer further comprises a plurality of second-type pixel driving circuits arranged in an array in the first display area. The plurality of first-type pixel driving circuits are disposed in array gaps of the plurality of second-type pixel driving circuits. The anode layer further comprises a plurality of second-type anodes located in the first display area. The second-type anodes are electrically connected to the second-type pixel driving circuits.

[0023] In another aspect, some embodiments of the present disclosure further provide a display device, the display device comprising a display panel according to any of the above embodiments and at least one sensor, the sensor being provided on a non-display side of the display panel, and an orthogonal projection of the sensor on the display panel being located in the second display area.

[0024] In another aspect, some embodiments of the present disclosure further provide a method for manufacturing a display panel. The display panel includes a display region, and the display region includes a first display region and a second display region. The method for manufacturing the display panel includes: providing a base substrate; forming a driving circuit layer on the base substrate, the driving circuit layer including a plurality of first-type pixel driving circuits, the plurality of first-type pixel driving circuits being disposed in the first display region; forming a connection layer, the connection layer including a plurality of connection wirings, the plurality of connection wirings including a first wiring; and forming an anode layer, the anode layer including a plurality of first-type anodes located in the second display region, the plurality of first-type anodes including a plurality of first anodes, a plurality of second anodes, and a plurality of third anodes, at least two of the first anodes being electrically connected to one first-type pixel driving circuit via the first wiring, the second anode being electrically connected to one first-type pixel driving circuit via one second wiring, and the third anode being electrically connected to one first-type pixel driving circuit via the second wiring.

[0025] In some embodiments, the connection layer comprises a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer, disposed in sequence on a side of the drive circuit layer away from the base substrate. Forming the connection layer on the side of the drive circuit layer away from the base substrate includes forming a first conductive material layer on the side of the drive circuit layer away from the base substrate and patterning the first conductive material layer with a first mask to form the first conductive layer having a pattern, forming a first insulating material layer on the side of the first conductive layer away from the base substrate and patterning the first insulating material layer with a second mask to form the first insulating layer having a pattern, forming a second conductive material layer on the side of the first insulating layer away from the base substrate and patterning the second conductive material layer with a third mask to form the second conductive layer having a pattern, and forming a second insulating material layer on the side of the second conductive layer away from the base substrate and patterning the second insulating material layer with a fourth mask to form the second insulating layer having the pattern. The pattern of the first conductive layer includes a plurality of first wirings and / or a plurality of second wirings, the pattern of the second conductive layer includes a plurality of first wirings and / or a plurality of second wirings, the pattern of the first insulating layer includes a first via hole, and the pattern of the second insulating layer includes a second via hole. [Brief description of the drawings]

[0026] In order to more clearly describe the technical solutions of the present disclosure, the drawings used in some embodiments of the present disclosure will be briefly described below. It is clear that the drawings in the following description are only a part of some embodiments of the present disclosure. Those skilled in the art can also obtain other drawings based on these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams, and do not limit the actual dimensions of the products, the actual flow of the methods, the actual timing of the signals, etc., of the embodiments of the present disclosure.

[0027] [Figure 1] 1 is a structural diagram of a display device provided according to some embodiments.

[0028] [Diagram 2] 1 is a structural diagram of a display panel provided by some embodiments.

[0029] [Diagram 3] 1 is a cross-sectional view of a display panel provided by a related art;

[0030] [Figure 4] FIG. 2 is a diagram showing a connection scheme between a pixel driving circuit and a light-emitting element provided by the related art;

[0031] [Diagram 5] 1 is a cross-sectional view of a display panel provided by some embodiments.

[0032] [Figure 6] FIG. 2 is another diagram illustrating a connection scheme between a pixel driving circuit and a light-emitting element provided by some embodiments.

[0033] [Figure 7A] 1 is a cross-sectional view of a connecting layer provided in accordance with some embodiments.

[0034] [Figure 7B] 4 is a cross-sectional view of another connecting layer provided in accordance with some embodiments.

[0035] [Figure 8A] FIG. 2 illustrates a connection scheme between the connecting wiring and the anode layer provided by some embodiments. [Figure 8B] FIG. 2 illustrates a connection scheme between the connecting wiring and the anode layer provided by some embodiments. [Figure 8C] FIG. 2 illustrates a connection scheme between the connecting wiring and the anode layer provided by some embodiments.

[0036] [Figure 9A] FIG. 2 is another diagram illustrating a connection scheme between the connecting wiring and the anode layer provided by some embodiments. [Figure 9B] FIG. 2 is another diagram illustrating a connection scheme between the connecting wiring and the anode layer provided by some embodiments. [Figure 9C] FIG. 2 is another diagram illustrating a connection scheme between the connecting wiring and the anode layer provided by some embodiments.

[0037] [Figure 10A] FIG. 2 is another diagram illustrating a connection scheme between the connecting wiring and the anode layer provided by some embodiments. [Figure 10B] FIG. 2 is another diagram illustrating a connection scheme between the connecting wiring and the anode layer provided by some embodiments. [Figure 10C] FIG. 2 is another diagram illustrating a connection scheme between the connecting wiring and the anode layer provided by some embodiments.

[0038] [Figure 11] FIG. 2 illustrates a connection scheme between an anode layer and a wiring group provided by some embodiments.

[0039] [Figure 12] FIG. 2 is another diagram illustrating a connection scheme between a pixel driving circuit and a light emitting element provided by some embodiments.

[0040] [Figure 13] FIG. 2 is another diagram illustrating a connection scheme between an anode layer and a group of wiring provided by some embodiments.

[0041] [Figure 14] FIG. 2 is another diagram illustrating a connection scheme between a pixel driving circuit and a light-emitting element provided by some embodiments.

[0042] [Figure 15] FIG. 2 is another diagram illustrating a connection scheme between a pixel driving circuit and a light-emitting element provided by some embodiments.

[0043] [Figure 16] 1 is a cross-sectional view of a display device provided in accordance with some embodiments.

[0044] [Figure 17] 4 is a flowchart of a method for manufacturing a display panel provided by some embodiments.

[0045] [Figure 18A] 1A-1D are diagrams illustrating manufacturing steps of a display panel provided by some embodiments. [Figure 18B] 1A-1D are diagrams illustrating manufacturing steps of a display panel provided by some embodiments. [Figure 18C] 1A-1D are diagrams illustrating manufacturing steps of a display panel provided by some embodiments. [Figure 18D] 1A-1D are diagrams illustrating manufacturing steps of a display panel provided by some embodiments. [Figure 18E] 1A-1D are diagrams illustrating manufacturing steps of a display panel provided by some embodiments. [Figure 18F] 1A-1D are diagrams illustrating manufacturing steps of a display panel provided by some embodiments.

[0046] [Figure 19] 1 is a flow chart of a method for manufacturing a connecting layer provided by some embodiments.

[0047] [Figure 20A] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20B] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20C] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20D] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20E] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20F] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20G] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20H] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20I] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20J] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20K] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20L] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20M] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20N] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20O] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. [Figure 20P] 1A-1D are diagrams illustrating manufacturing steps of a connection layer provided according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0048] The following clearly and completely describes the technical solutions of some embodiments of the present disclosure with reference to the drawings, but it is clear that the described embodiments are only some of the embodiments of the present disclosure, and are not all of the embodiments. Based on some embodiments of the present disclosure, all other embodiments obtained by those skilled in the art are within the scope of protection of the present disclosure.

[0049] Unless the context requires otherwise, throughout this specification and claims, the term "comprise" and other forms, such as the third person singular "comprises" and the present participle form "comprising" should be interpreted in an open, inclusive sense, i.e., "including but not limited to." In the description of the specification, the terms "one embodiment," "some embodiments," "exemplary embodiments," "examples," "specific examples," "some examples," and the like, are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. General expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, a particular feature, structure, material, or characteristic described may be included in any one or more embodiments or examples in any suitable manner.

[0050] In the following, the terms "first" and "second" are for descriptive purposes only and should not be understood as indicating or implying the relative importance or quantity of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the feature. In the description of the embodiments of the present disclosure, "plurality" means two or more, unless otherwise specified.

[0051] In describing some embodiments, the terms "coupled" and "connected" and expressions derived therefrom may be used. For example, in describing some embodiments, the term "connected" may be used to indicate that two or more components have direct physical or electrical contact with each other. Or, in describing some embodiments, the term "coupled" may be used to indicate that two or more components have direct physical or electrical contact with each other. However, the terms "coupled" or "communicatively coupled" may also mean that two or more components do not have direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the present specification.

[0052] Also, the use of "based on" is meant to be open-ended and inclusive, as a process, step, calculation, or other action that is based on one or more recited conditions or values ​​may, in fact, be based on additional conditions or beyond the recited values.

[0053] As used herein, "parallel", "perpendicular" and "equal" include the described situation and the situation that is approximate to the described situation, and the range of the approximate situation is within the acceptable deviation range, and the acceptable deviation range is determined by taking into consideration the measurement considered by a person skilled in the art and the error associated with the measurement of a particular amount (i.e., the limit of the measurement system). For example, "parallel" includes true parallel and approximately parallel, and the acceptable deviation range of approximately parallel may be, for example, within 5°, and "perpendicular" includes true perpendicular and approximately perpendicular, and the acceptable deviation range of approximately perpendicular may be, for example, within 5°. "Equal" includes true equal and approximately equal, and within the acceptable deviation range of approximately equal, for example, the difference between the two equal may be less than 5% of either.

[0054] When a layer or component is referred to as being on another layer or substrate, it should be understood that the layer or component is directly on the other layer or substrate, or there can be intermediate layers between the layer or component and the other layer or substrate.

[0055] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, thicknesses of layers and regions are exaggerated for clarity. Exemplary embodiments of the present disclosure are not limited to the shapes of regions illustrated herein and should be construed to include deviations in shapes due to manufacturing or otherwise. For example, an etching region shown as a rectangle will typically have curved features. Thus, the regions shown in the drawings are exemplary in nature and their shapes are not intended to represent the actual shape of the regions of the facility and are not intended to limit the scope of the exemplary embodiments.

[0056] As shown in FIG. 1, in addition to the display panel 100, the display device 1000 may further include electrical components such as a sensor 200, for example an optical sensor. Taking the display device 1000 as a mobile phone as an example, the display device 1000 includes optical sensors such as a front camera, a proximity light sensor, and a 3D sensing module. These optical components need to receive light from the display surface side of the display device 1000 to realize the corresponding functions. In the display device 1000, the optical sensor is usually attached to the non-display surface side of the display panel 100, and the photosensitive surface side of the optical sensor faces the display panel 100.

[0057] In some embodiments of the present disclosure, a display panel 100 is provided, which may be, for example, an OLED (Organic Light-Emitting Diode) display panel, a Micro Organic Light-Emitting Diode (Micro OLED) display panel, a Quantum Dot Light Emitting Diode (QLED) display panel, a Mini Light-Emitting Diode (Mini LED) display panel, or a Micro Light-Emitting Diode (Micro LED) display panel. In the following, an example will be described in which the display panel is an OLED display panel. As shown in FIG. 2, the display panel 100 includes a display area 10a and a peripheral area 10b. The peripheral area 10b is located on one side of the display area 10a or surrounds the display area 10a. The display area 10a includes a plurality of pixels P, each of which includes a red sub-pixel R, a blue sub-pixel B, and a green sub-pixel G. Each sub-pixel has a light-emitting element and a pixel driving circuit that controls the light emission of the light-emitting element. The pixel driving circuit adjusts the brightness (grayscale) of sub-pixels of different colors, and multiple colors can be displayed by combining or superimposing colors, thereby achieving full-color display on the display panel 100.

[0058] 3, the display panel 100 includes a base substrate 10, a driving circuit layer 20, a connection layer 30, a light emitting element layer 40, and a packaging layer 50. The driving circuit layer 20 is disposed on the base substrate 10, and includes a plurality of pixel driving circuits 21. The light emitting element layer 40 includes a plurality of light emitting elements 41, such as OLEDs. Each light emitting element 41 has an anode 43a Emitting layer 45a and cathode 46a Each pixel driving circuit 21 is electrically connected to a light emitting element 41. Specifically, the pixel driving circuit 21 is 43aand controls the light emission of the light emitting element 41. The packaging layer 50 covers the side of the light emitting element layer 40 away from the base substrate 10, and realizes packaging for the display panel 100.

[0059] In some embodiments, As shown in Figure 3, The driving circuit layer 20 is provided on one side of the base substrate 10. The driving circuit layer 20 includes a semiconductor layer 22, a gate insulating layer 23, a gate layer 24, an interlayer insulating layer 25, a source-drain metal layer 26, and a planarization layer 27, which are stacked in this order on the base substrate 10. The pixel driving circuits 21 in the driving circuit layer 20 are arranged in an array, and each pixel driving circuit 21 includes a plurality of thin film transistors TFT. The connection layer 30 is provided on the side of the driving circuit layer 20 away from the base substrate 10. The connection layer 30 includes at least one conductive layer and at least one insulating layer, and each conductive layer includes one insulating layer on the side away from the base substrate 10. The connection layer 30 includes a plurality of connection wirings 31, and the driving circuit layer 20 realizes electrical connection with the light-emitting element layer 40 via the connection layer 30.

[0060] The light emitting element layer 40 is provided on the side of the connection layer 30 away from the base substrate 10. The light emitting element layer 40 includes a pixel definition layer 44, an anode layer 43, a light emitting film layer 45, and a cathode layer 46. The anode layer 43 includes a plurality of anodes 43a, the light emitting film layer 45 includes a plurality of light emitting layers 45a, and the pixel definition layer 44 includes a plurality of openings, each of which exposes one anode 43a, each light emitting layer 45a being located in one opening and in contact with the anode 43a, and the portion of the cathode layer 46 located in the opening being a cathode 46a, whereby the anode 43a, the light emitting layer 45a, and the cathode 46a, which are stacked in order, constitute a light emitting element 41. The plurality of light emitting elements 41 in the light emitting element layer 40 are arranged in an array, i.e., the plurality of anodes 43a are arranged in an array.

[0061] As shown in FIG. 2 and FIG. 3, in the full-screen display panel 100, the display area 10a is divided into a first display area 11b and a second display area 11a. The second display area 11a may be located inside the first display area 11b, that is, the first display area 11b surrounds the second display area 11a, for example, the second display area 11a is a circular area or a square area. In some embodiments, the base substrate 10 and the driving circuit layer 20 have high light transmittance in the portion located in the second display area 11a, and exemplarily, the base substrate 10 uses a transparent glass substrate to provide high transparency. The driving circuit layer 20 does not provide a circuit structure in the second display area 11a to maintain sufficient transparency of the driving circuit layer. The sensor 200 is provided on the side of the base substrate 10 away from the driving circuit layer. (Shown in Figure 1) is provided, for example, an optical sensor such as a camera, a proximity sensor, or a 3D sensing module, and the projection of the sensor 200 on the base substrate 10 is located in the second display area 11a. The photosensitive surface of the optical sensor faces the display surface side of the display panel 100 and is used to receive ambient light from the display surface side of the display panel 100. Exemplarily, the light emitting element layer 40 and the packaging layer 50 have a transparent structure at least in the second display area 11a. For example, the anode layer of the light emitting element layer 40 43 Since the display panel 100 uses a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), the second display area 11a has a high light transmittance and is suitable for arranging devices that require a high transmittance, such as a camera. As a result, the display panel 100 can realize a full-screen display in the display area 10a, and an optical sensor is provided in the second display area 11a, which receives external light through the light-emitting element layer 40 and the packaging layer 50 to realize a corresponding function.

[0062] 3, among the multiple anodes 43a provided in the anode layer 43, the anode 43a located in the second display region 11a is referred to as a first-type anode 43a1, and the anode 43a located in the first display region 11b is referred to as a second-type anode 43a2. 43comprises a plurality of first-type anodes 43a1 and a plurality of second-type anodes 43a2. Similarly, among the plurality of pixel driving circuits 21 provided in the driving circuit layer 20, the pixel driving circuit 21 electrically connected to the first-type anode 43a1 is referred to as a first-type pixel driving circuit 211, and the pixel driving circuit 21 electrically connected to the second-type anode 43a2 is referred to as a second-type pixel driving circuit 212. Both the first-type pixel driving circuit 211 and the second-type pixel driving circuit 212 are provided in the first display region 11b. For example, the driving circuit layer 20 further comprises a plurality of second-type pixel driving circuits 212 arranged in an array in the first display region 11b, and the plurality of first-type pixel driving circuits 211 are provided in the array gaps of the plurality of second-type pixel driving circuits 212. For example, the first type pixel driving circuits 211 are provided in a position close to the second display region 11a of the first display region 11b, and the first type pixel driving circuits 211 are located on the periphery of the second display region 11a.

[0063] In some embodiments, one first-type pixel driving circuit 211 is electrically connected to one first-type anode 43a1, and one second-type pixel driving circuit 212 is electrically connected to one second-type anode 43a2. In some embodiments, as shown in FIG. 3, the electrically connected second-type pixel driving circuit 212 and the second-type anode 43a2 have an overlap in orthogonal projection on the base substrate 10, and the second-type pixel driving circuit 212 and the second-type anode 43a2 are connected by a via hole penetrating the insulating layer in the planarization layer 27 and the connection layer 30. In some other examples, the first-type pixel driving circuit 211 is located in the first display region 11b, the first-type anode 43a1 is located in the second display region 11a, and the electrically connected first-type pixel driving circuit 211 and the first-type anode 43a1 do not overlap each other when projected orthogonally on the base substrate 10, and there is a certain distance between them, so that the first-type pixel driving circuit 211 and the first-type anode 43a1 realize an electrical connection via the connection wiring 31 in the connection layer 30. Each connection wiring 31 communicates the first display region 11b and the second display region 11a, thereby transmitting a current signal of the first-type pixel driving circuit 211 located in the first display region 11b to the first-type anode 43a1 located in the second display region 11a, thereby realizing the control of the light emission of the light-emitting element 41 where the first-type anode 43a1 is located. This satisfies the requirements for normal display of the screen of the full screen display panel 100 and the requirement for high transmittance of an optical sensor such as a camera located on the non-display side of the display panel 100.

[0064] As shown in FIG. 3 and FIG. 4, the display device 1000 is a mobile phone, and in the display panel 100, the second display area 11a is a circular area, and the diameter of the second display area 11a is generally about 2.5 mm, and an under-screen camera is provided in the area. In the display panel 100 of the mobile phone, the light-emitting elements in the second display area 11a are arranged in 40 rows and 80 columns. In the related art, each first-type anode 43a1 is electrically connected to one first-type pixel driving circuit 211 through one connection wiring 31, and the connection wiring 31 transmits the driving current signal output by the first-type pixel driving circuit 211, that is, the number of the connection wirings 31 is the same as the number of the first-type anodes 43a1. As a result, when the number of the connection wirings 31 is large, the connection wirings 31 need to be insulated from each other, and therefore, the connection wirings 31 need to be distributed in multiple conductive layers.

[0065] For example, in the connection method shown in FIG. 4, when the first-type pixel driving circuit 211 is provided in the first display region 11b and is located on both sides of the second display region 11a along the first direction (the row direction in which a plurality of first-type anodes are arranged in an array), taking as an example one row (passing the diameter of the circular region) in which the number of light-emitting elements 41 is the largest in the second display region 11a, the row has 80 light-emitting elements 41, and 80 connection wires 31 need to be arranged in the horizontal direction to satisfy the control requirements. In consideration of the width and insulation requirements of the connection wires 31 and the large number of connection wires 31, as shown in FIG. 3, the 80 connection wires 31 need to be evenly distributed in the three conductive layers. The number of the 80 connection wires 31 distributed in each conductive layer is such that each conductive layer has 26 to 30 parallel connection wires 31, and insulating layers need to be provided between each conductive layer and between the conductive layer and the anode layer, resulting in a total of three insulating layers. That is, the full screen display panel needs to add three conductive layers and three insulating layers, and the many conductive layers and insulating layers may reduce the light transmittance of the second display area 11a. In addition, the manufacturing of the three conductive layers and the three insulating layers requires six masks to be added to the manufacturing process, which complicates the process, reduces production efficiency, increases costs, and fails to meet the needs of production capacity.

[0066] Based on this, as shown in FIG. 5 and FIG. 6, FIG. 5 shows a cross-sectional view of the display panel 100, and FIG. 2 Display area 11 a A plurality of anodes 43a in the 1 Display area 11 b 1 shows a plurality of first-type pixel driving circuits 211 and a second-type pixel driving circuit 212 in the second display region 11a. In some embodiments of the present disclosure, a display panel 100 is provided, which includes a base substrate 10, a driving circuit layer 20, a connection layer 30, a light-emitting element layer 40, and a packaging layer 50. The structure and position of each film layer are described above and will not be described again. In the light-emitting element layer 40, the anode layer 43 includes a plurality of anodes 43a, which include a plurality of first anodes 431, a plurality of second anodes 432, and a plurality of third anodes 433. The first anodes 431, the second anodes 432, and the third anodes 433 correspond to sub-pixels of different colors. Among the plurality of first anodes 431, the plurality of second anodes 432, and the plurality of third anodes 433, the anodes 43a located in the second display region 11a belong to the first-type anodes 43a1. A second type anode located in the first display area 11b 43a2 and the structure of the second-type pixel driving circuit 212 is the same as that of a normal installation. The structure of the first-type anode 43a1 in the second display area 11a and the electrical connection between the first-type anode 43a1 and the first-type pixel driving circuit 211 will be described below.

[0067] As shown in FIG. 5 and FIG. 6, the multiple connection wirings 31 in the connection layer 30 include multiple first wirings 311. The multiple first-type anodes 43a1 include multiple first anodes 431, and at least two first anodes 431 are electrically connected to one first-type pixel driving circuit 211 via one first wiring 311. For example, two adjacent first anodes 431 are electrically connected to one first-type pixel driving circuit 211 via one first wiring 311. As shown in FIG. 5, among the first-type anodes 43a1 located in the second display region 11a, if the first and second first-type anodes 43a1 from the left are taken as the first anodes 431, it can be seen that the two first anodes 431 are electrically connected to one first-type pixel driving circuit 211 via one first wiring 311.

[0068] 6, the plurality of first-type anodes 43a1 further includes a plurality of second anodes 432 and a plurality of third anodes 433. The connection wiring 31 further includes a plurality of second wirings 312. The second anodes 432 are electrically connected to one first-type pixel driving circuit 211 via the second wirings 312. The third anodes 433 are electrically connected to one first-type pixel driving circuit 211 via the second wirings 312. A second-type pixel driving circuit 212 is also provided between the two first-type pixel driving circuits 211.

[0069] In the above display panel 100, by providing a plurality of first wirings 311, two first anodes 431 are electrically connected to one first-type pixel driving circuit 211 through the first wirings 311, and one first-type pixel driving circuit 211 controls two first anodes 431. That is, one first-type pixel driving circuit 211 drives two light-emitting elements 41 to emit light, and the second anode 432 and the third anode 433 are electrically connected to one first-type pixel driving circuit 211 through the second wirings 312, respectively, thereby ensuring the display effect and reducing the number of connecting wirings 31, and correspondingly reducing the number of conductive layers and insulating layers in the connecting layer 30. For example, when the area of ​​the second display region 11a is constant, that is, the number of anodes 43a in the second display region 11a is constant, and the number of the first wirings 311 is reduced, the number of conductive layers and insulating layers in the connection layer 30 can be reduced from three conductive layers and three insulating layers in the related art to two conductive layers and two insulating layers. This allows the number of masks required to manufacture the conductive layers and insulating layers in the process of manufacturing the display panel 100 to be reduced, for example, from six masks in the related art to four masks, thereby reducing costs and reducing process complexity, and also reducing the number of conductive layers and insulating layers, thereby improving the light transmittance of the second display region 11a, which is beneficial for the normal operation of the optical sensor in this region.

[0070] In some embodiments, as shown in FIG. 5, the display panel 100 includes a base substrate 10, a driving circuit layer 20, a connection layer 30, a light-emitting element layer 40, and a packaging layer 50. The connection layer 30 is located on a side of the driving circuit layer 20 away from the base substrate 10. The connection layer 30 includes at least one conductive layer and at least one insulating layer. For example, as shown in FIG. 7A, the connection layer 30 includes a first conductive layer 32 and a first insulating layer 33, or as shown in FIG. 7B, the connection layer 30 includes a first conductive layer 32, a first insulating layer 33, a second conductive layer 34, and a second insulating layer 35. The first conductive layer 32 includes a plurality of connection wirings 31, or the first conductive layer 32 and the second conductive layer 34 include a plurality of connection wirings 31, and the connection wirings 31 include a first wiring 311 and a second wiring 312.

[0071] It should be noted that the above example only shows one possible positional relationship of the connection layer 30, and is not particularly limited to the positional relationship between the connection layer 30 and the upper and lower layers of the driving circuit layer 20. In some embodiments, the connection layer 30 can also be located in the driving circuit layer, that is, a layer in the driving circuit layer can be multiplexed as a connection layer to realize electrical connection between the anode and the corresponding pixel driving circuit.

[0072] The light emitting element layer 40 is located on the side of the connection layer 30 away from the base substrate 10. The light emitting element layer 40 includes a light emitting element 41 for a green subpixel, a light emitting element 41 for a red subpixel, and a light emitting element 41 for a blue subpixel. The anodes 43a of the light emitting elements 41 for the green subpixel, the red subpixel, and the blue subpixel are provided on an anode layer 43. The anodes 43a located in the first display region 11b are second-type anodes 43a2, and the anodes 43a located in the second display region 11a are first-type anodes 43a1. Each second-type anode 43a2 is connected to one second-type pixel drive circuit 212In the first-type anode 43a1, for example, the anode 43a of the light-emitting element 41 in the green subpixel is the first anode 431, the anode 43a of the light-emitting element 41 in the red subpixel is the second anode 432, and the anode 43a of the light-emitting element 41 in the blue subpixel is the third anode 433. Alternatively, the anode 43a of the light-emitting element 41 in the green subpixel is the first anode 431, the anode 43a of the light-emitting element 41 in the blue subpixel is the second anode 432, and the anode 43a of the light-emitting element 41 in the red subpixel is the third anode 433. The two first anodes 431 are electrically connected to one first-type pixel driving circuit 211 via the first wiring 311, the second anode 432 is electrically connected to one first-type pixel driving circuit 211 via one second wiring 312, and the third anode 433 is electrically connected to one first-type pixel driving circuit 211 via one second wiring 312. That is, one first-type pixel driving circuit 211 drives the light-emitting elements of two green sub-pixels to emit light, and one first-type pixel driving circuit 211 drives the light-emitting element of one red sub-pixel or blue sub-pixel to emit light.

[0073] 7B , the connection layer 30 includes a first conductive layer 32, a first insulating layer 33, a second conductive layer 34, and a second insulating layer 35. The first conductive layer 32 is provided on a side of the drive circuit layer 20 away from the base substrate 10, the first insulating layer 33 is provided on a side of the first conductive layer 32 away from the base substrate 10, the second conductive layer 34 is provided on a side of the first insulating layer 33 away from the base substrate 10, and the second insulating layer 35 is provided on a side of the second conductive layer 34 away from the base substrate 10. The first conductive layer 32 has a plurality of first wirings 311 and / or a plurality of second wirings 312, the second conductive layer 34 has a plurality of first wirings 311 and / or a plurality of second wirings 312, the first insulating layer 33 has a first via hole 331, and the second insulating layer 35 has a second via hole 351, the first conductive layer 32 is electrically connected to the second conductive layer 34 via the first via hole 331, and the second conductive layer 34 is electrically connected to the anode layer 43 via the second via hole 351.

[0074] For example, the display area 10a is provided with a first conductive layer 32, a first insulating layer 33, a second conductive layer 34, and a second insulating layer 35, and a plurality of connection wirings 31 are provided on the first conductive layer 32 and the second conductive layer, and each conductive layer is isolated from the other layers by an insulating layer. In the second display area 11a, the optical sensor is provided on the side of the connection layer 30 away from the light emitting element layer 40, and the first conductive layer 32, the first insulating layer 33, the second conductive layer 34, and the second insulating layer 35 are all transparent structures, which can meet the light transmittance requirements of the optical sensor.

[0075] 7A, the connection layer 30 includes a first conductive layer 32 and a first insulating layer 33. The first conductive layer 32 is provided on a side of the drive circuit layer 20 away from the base substrate 10. The first insulating layer 33 is provided on a side of the first conductive layer 32 away from the base substrate 10. The first conductive layer 32 has a plurality of connection wirings 31, and the first insulating layer 33 has a first via hole 331, and the first conductive layer 32 is electrically connected to the anode layer 43 through the first via hole 331.

[0076] Exemplarily, a first conductive layer 32 is provided in the display area 10a, a plurality of connection wirings 31 are provided in the first conductive layer 32, and a first insulating layer 33 is provided on the side of the first conductive layer 32 away from the base substrate 10, and the first insulating layer 33 isolates the first conductive layer 32 from the anode layer. In the second display area 11a, an optical sensor is provided on the side of the connection layer 30 away from the light emitting element layer 40, and the first conductive layer 32 and the first insulating layer 33 have a transparent structure, which can meet the light transmittance requirements of the optical sensor.

[0077] In some embodiments, a plurality of first type anodes, as shown in FIG. 43a1 The arrangement method is a multiple first type anode 43a1 are arranged in a plurality of rows, and a plurality of first-type anodes arranged in a row 43a1is referred to as a first-type anode row 42, and at least one first-type anode row 42 includes at least two first anodes 431, at least one second anode 432, and at least one third anode 433 arranged in a row. The at least two first anodes 431 in the at least one first-type anode row 42 are electrically connected to one first wiring 311.

[0078] In some examples, as shown in Figures 8A, 9A, 10A and 11, the first type anode rows 42 are periodically arranged according to the order of the second anode 432, the first anode 431, the third anode 433 and the first anode 431.

[0079] Exemplarily, the plurality of first-type anodes are arranged in a plurality of rows, and each of the first-type anode rows 42 arranged in the row includes a first sub-row 421 and a second sub-row 422 arranged in parallel. The first sub-row 421 is arranged such that the second anodes 432 and the third anodes 433 are alternately arranged, and the second sub-row 422 is arranged sequentially by the plurality of first anodes 431. The number of the first anodes 431 in the second sub-row 422 is 1 / 100, and ... 1 Subrows 421 the number of the second anodes 432 and the third anodes 433 in the green subpixel 311 corresponds to the total number of the second anodes 432 and the third anodes 433 in the blue subpixel 311, and the first anode 431 is provided on the central axis between the adjacent second anodes 432 and the third anodes 433. The first anode 431 belongs to the anode of the light-emitting element of the green subpixel, the second anode 432 belongs to the anode of the light-emitting element of the blue subpixel, and the third anode 433 belongs to the anode of the light-emitting element of the red subpixel, or the first anode 431 belongs to the anode of the light-emitting element of the green subpixel, the second anode 432 belongs to the anode of the light-emitting element of the red subpixel, and the third anode 433 belongs to the anode of the light-emitting element of the blue subpixel, that is, one first wiring 311 transmits signals to the light-emitting elements of two green subpixels.

[0080] 11, the first-type anodes are arranged in rows, and the connection wirings 31 are arranged in wiring groups Ls, each of which includes at least one first wiring 311 and at least two second wirings 312. The connection wirings 31 extend along a first direction, which is the row direction in which the anodes are arranged. The connection relationship between the wiring groups Ls and the first-type anode rows 42 will be described below.

[0081] 8A , in the wiring group Ls, one first wiring 311 is connected to correspond to two first anodes 431 in one first-type anode row 42. At least two second wirings 312 in the wiring group Ls include at least one first sub-wiring 3121 and at least one second sub-wiring 3122. One first sub-wiring 3121 is connected to correspond to one second anode 432 or one third anode 423 in the first-type anode row 42. One second sub-wiring 3122 is electrically connected to one second anode 432 or one third anode 433 in another first-type anode row 42 adjacent to the first-type anode row 42.

[0082] 9A , in the wiring group Ls, one first wiring 311 is connected to correspond to two first anodes 431 in one first-type anode row 42, and one second wiring 312 is connected to correspond to one second anode 432 or one third anode 423 in the first-type anode row 42. At least one first-type anode row 42 is electrically connected to a plurality of first-type pixel driving circuits via one wiring group Ls, and one wiring group Ls includes a plurality of first wirings 311 and a plurality of second wirings 312.

[0083] In some examples, as shown in FIG. 10A, in the wiring group Ls, one first wiring 311 is connected to two first anodes 431 in one first-type anode row 42, and one second wiring 312 is connected to one second anode 432 or one third anode 423 in another first-type anode row 42. For example, another first-type anode row 42 may be adjacent to the one first-type anode row 42. That is, one wiring group Ls connects two first-type anode rows 42. For one first-type anode row 42, the first anode 431 in the first-type anode row 42 is connected to the first wiring 311 in one wiring group Ls, and the second anode 432 or the third anode 433 is connected to the second wiring in another wiring group Ls. 312 At least one first-type anode row 42 is electrically connected to a plurality of first-type pixel driving circuits via two wiring groups Ls. Exemplarily, one wiring group Ls is located between two adjacent first-type anode rows.

[0084] The above merely describes some examples of the connection relationship between the wiring group Ls and the first-type anode row 42, and there are other examples, as long as one first wiring 311 is connected to two first anodes 431, and one second wiring 312 is connected to one second anode 432 or one third anode 433. That is, one first wiring 311 transmits a signal to the light-emitting element of two green subpixels, and one second wiring 312 transmits a signal to the light-emitting element of one blue subpixel or one red subpixel. The above examples do not limit the present disclosure to the connection method between the connection wirings and the anodes.

[0085] In some other embodiments, as shown in FIGS. 12 and 13, a plurality of first type anodes 43a1 Another arrangement method is to use multiple first-type anodes. 43a1 are arranged in a plurality of rows, and a plurality of first-type anodes arranged in a row are 43a1are referred to as a first-type anode row 42′, and at least one first-type anode row 42′ includes at least two first anodes 431, at least one second anode 432, and at least one third anode 433 arranged in a row. The at least two first anodes 431 in the first-type anode row 42′ are electrically connected to one first wiring 311.

[0086] In some examples, the first type anode row 42 ′ is periodically arranged in the order of the second anode 432 , the first anode 431 , the third anode 433 , and the first anode 431 .

[0087] Exemplarily, the plurality of first-type anodes are arranged in a plurality of columns, and each first-type anode column 42' includes a first sub-column 421' and a second sub-column 422' arranged in parallel. The first sub-column 421' is arranged such that the second anodes 432 and the third anodes 433 alternate with each other, and the second sub-column 422' is sequentially arranged by a plurality of first anodes 431. The number of the first anodes 431 in the second sub-column 422' is equal to the total number of the second anodes 432 and the third anodes 433 in the first sub-column 421', and each first anode 431 is arranged on the central axis between the second anode and the third anode 433 adjacent thereto. The first anode 431 belongs to the anode of the light-emitting element of the green subpixel, the second anode 432 belongs to the anode of the light-emitting element of the blue subpixel, and the third anode 433 belongs to the anode of the light-emitting element of the red subpixel; or the first anode 431 belongs to the anode of the light-emitting element of the green subpixel, the second anode 432 belongs to the anode of the light-emitting element of the red subpixel, and the third anode 433 belongs to the anode of the light-emitting element of the blue subpixel, that is, one first wiring 311 transmits signals to the light-emitting elements of two green subpixels.

[0088] As shown in FIG. 13, a plurality of first type anodes 43a1 are arranged in a plurality of rows, and the plurality of connection wirings 31 are arranged in a plurality of wiring groups Ls', and each wiring group Ls' includes at least one first wiring 311 and at least two second wirings 312. The plurality of connection wirings 31 extend along the second direction, and the second direction is a direction in which the plurality of anode 43a1The connection relationship between the wiring group Ls′ and the first-type anode columns will be described below, but the description of the connection relationship between the wiring group Ls and the first-type anode rows and related drawings can be referenced.

[0089] In some examples, in the wiring group Ls', one first wiring 311 is connected to two first anodes 431 in one first-type anode column 42', and one second wiring 312 is connected to one second anode 432 or one third anode 433 in the first-type anode column 42'. At least one first-type anode column 42' is connected to the first-type pixel driving circuit 21 via one wiring group Ls'. 1 , and the first wiring 311 and the second wiring 312. In other words, one first wiring 311 transmits a signal to the light emitting element of two green subpixels, and one second wiring 312 transmits a signal to the light emitting element of one blue subpixel or the light emitting element of one red subpixel.

[0090] In some other examples, in the wiring group Ls', one first wiring 311 is connected to correspond to two first anodes 431 in one first-type anode column 42'. At least two second wirings 312 in the wiring group Ls' include at least one first sub-wire and at least one second sub-wire. The at least one first sub-wire is connected to correspond to one second anode 432 or one third anode 433 in the first-type anode column 42'. Each second sub-wire is electrically connected to one second anode 432 or one third anode 433 in another first-type anode column 42' adjacent to the first-type anode column 42'.

[0091] In some examples, in the wiring group Ls', one first wiring 311 is connected to two first anodes 431 in one first-type anode column 42', and one second wiring 312 is connected to one second anode 432 or one third anode 433 in another first-type anode column 42'. For example, another first-type anode column 42' may be adjacent to the one first-type anode column 42'. That is, one wiring group Ls' connects two first-type anode columns 42'. For one first-type anode column 42', the first anode 431 in the first-type anode column 42' is connected to the first wiring 311 in one wiring group Ls', and the second anode 432 or the third anode 433 is connected to the second wiring 312 in the other wiring group Ls'. At least one first-type anode column 42' is electrically connected to a plurality of first-type pixel driving circuits via two wiring groups Ls'. Exemplarily, one wiring group Ls' is located between two adjacent first-type anode columns 42'.

[0092] The above is merely a partial example of the connection relationship between the wiring group Ls′ and the first-type anode array 42′. There are other examples, and one first wiring 311 may be 2 It is sufficient that one second wiring 312 is connected to one first anode 431 and one second wiring 312 is connected to one second anode 432 or one third anode 433. The above example does not limit the present disclosure to the connection method between the connection wiring and the anode.

[0093] In some embodiments, as shown in FIGS. 6, 12, 14, and 15, the positions of the first-type pixel driving circuits 21 in the first display region 11b are determined such that the orthogonal projection of the first-type pixel driving circuits 21 on the base substrate 10 is aligned with the first-type anodes 11b. 43a1 The connecting wires 31 are provided so as to be positioned on one or both sides in the extending direction of the connecting wires 31 when orthogonally projected on the base substrate 10 .

[0094] In some examples, the multiple connection wirings 31 extend along the first direction, and the multiple first-type pixel driving circuits 211 are located on both sides, for example, the left or right side, of the second display area 11a, as shown in Fig. 6. In some other examples, the multiple connection wirings 31 extend along the first direction, and the multiple first-type pixel driving circuits 211 are located on one side, for example, the left side, of the second display area 11a, as shown in Fig. 14.

[0095] In some examples, the multiple connection wirings 31 extend along the second direction, and the multiple first-type pixel driving circuits 211 are located on both sides, for example, the upper and lower sides, of the second display area 11a, as shown in Fig. 12. In some other examples, the multiple connection wirings 31 extend along the second direction, and the multiple first-type pixel driving circuits 211 are located on one side, for example, the upper side, of the second display area 11a, as shown in Fig. 15.

[0096] In some embodiments, the first conductive layer 32 includes a plurality of first wirings 311 and / or a plurality of second wirings 312, and the second conductive layer 34 includes a plurality of first wirings 311 and / or a plurality of second wirings 312. Hereinafter, with reference to FIGS. 8A to 10C , the distribution of the first wirings 311 and the second wirings 312 in the first conductive layer and the second conductive layer 34 will be described using some connection relationships between the wiring group Ls and the first-type anode rows 42 as examples.

[0097] In some examples, the first wirings 311 included in one wiring group Ls may be located in one conductive layer. A part of the second wirings 312 included in the wiring group Ls may be located in the conductive layer, and another part may be located in another conductive layer. As shown in FIG. 6, FIG. 8A, FIG. 8B, and FIG. 8C, for ease of explanation, the connection wirings 31 located in different conductive layers in FIG. 8A are drawn in two figures, respectively, and FIG. 8B is a connection diagram between a part of the connection wirings 31 located in the second conductive layer among the multiple connection wirings 31 in FIG. 8A and the first type anode, and FIG. 8C is a connection diagram between a part of the connection wirings 31 located in the first conductive layer among the multiple connection wirings 31 in FIG. 8A and the first type anode. In one wiring group Ls, as shown in Fig. 8B, all the first wirings 311 are provided on the second conductive layer 34, and a portion of the second wirings 312 is provided on the second conductive layer 34, and as shown in Fig. 8C, another portion of the second wirings 312 is provided on the first conductive layer. The multiple connection wirings 31 provided in the wiring group Ls are evenly distributed on the two conductive layers, and the connection wirings 31 are rationally positioned to avoid problems such as short circuits and crosstalk caused by the spacing between adjacent connection wirings 31 being too small.

[0098] For example, the light-emitting elements in the second display region 11a are arranged in 40 rows and 80 columns, that is, the first-type anodes 43a1 located in the second display region 11a are arranged in 40 rows and 80 columns. As shown in Fig. 6, when the second display region 11a is a circular region, the first-type anode row 42 having the largest number of anodes 43a is one row passing through the diameter of the circular region, and the number of the first-type anode rows 42 is 80, and the first-type pixel driving circuits 211 located on both sides of the second display region 11a are electrically connected to the first-type anodes 43a1 of the row via the connection wiring 31. The 80 first-type anodes 43a1 in the first-type anode row 42 are divided into two equal parts, and the first type pixel driving circuit 211 located on one side of the second display area 11a is electrically connected to the 40 first-type anodes 43a1 in the row, and the first type pixel driving circuit 211 located on the other side of the second display area 11a is electrically connected to the other 40 first-type anodes 43a1 in the row. In the following, the first-type anode row 42 having the largest number of anodes 43a will be taken as an example to describe the first-type anodes 43a1 and the first type pixel driving circuit 211 located on the other side of the second display area 11a. wiring The specific connection method with 31 will be explained.

[0099] The 40 first-type anodes 43a1 include 10 second anodes 432, 10 third anodes 433, and 20 first anodes 431, and are periodically arranged in the order of the first anode 431, the second anode 432, the first anode 431, and the third anode 433. The connection wiring electrically connected to the 40 first-type anodes 43a1 includes 10 first wirings 311 and 20 second wirings 312.

[0100] The ten first wirings 311 and the five second wirings 312 are located on the second conductive layer, and each first wiring 311 is connected to two corresponding first anodes 431. All the twenty first anodes 431 and the first TypeThe five second wires 312 are located on the second conductive layer and are electrically connected to two second anodes 432 and three third anodes 433, or two third anodes 433 and three second anodes 432, respectively, and each second wire 312 is electrically connected to one second anode or one third anode. The remaining fifteen second wires 312 are located on the first conductive layer and each second wire is electrically connected to one of the remaining fifteen second anodes 432 and third anodes 433, respectively, and the purpose of uniformly distributing the connecting wires on the first conductive layer and the second conductive layer is realized.

[0101] The five second wirings 312 located on the second conductive layer are electrically connected from one side of the single first-type anode row 42 having the largest number of anodes 43a, and the ten first wirings 311 located on the second conductive layer are electrically connected from the other side of the single first-type anode row 42 having the largest number of anodes 43a. This prevents the first wirings 311 and the second wirings 312 from crossing and shorting on the same conductive layer.

[0102] In some other examples, all the first wirings 311 in one wiring group Ls are located in the same conductive layer, which may be, for example, the first conductive layer or the second conductive layer. All the second wirings 312 in one wiring group Ls are located in another conductive layer, which may be, for example, the second conductive layer or the first conductive layer. As shown in FIG. 9A, FIG. 9B, and FIG. 9C, for ease of explanation, the connection wirings located in different conductive layers in FIG. 9A are drawn in two figures, respectively, and FIG. 9B is a connection diagram between a part of the connection wirings 31 located in the second conductive layer among the multiple connection wirings 31 in FIG. 9A and the first type anode, and FIG. 9C is a connection diagram between a part of the connection wirings 31 located in the first conductive layer among the multiple connection wirings 31 in FIG. 9A and the first type anode. As shown in FIG. 9B, all the first wirings 311 in one wiring group Ls are located in the second conductive layer 34, and as shown in FIG. 9C, all the second wirings 312 in the wiring group Ls are located in the first conductive layer 32.

[0103] In some examples, a portion of the first wiring 311 and a portion of the second wiring 312 in one wiring group Ls are both located in the same conductive layer, and are not connected to another portion of the first wiring 311. 2nd wiring Another part of 312 is located in another conductive layer. As shown in Figures 10A, 10B, and 10C, for ease of explanation, the connection wirings located in different conductive layers in Figure 10A are drawn in two drawings, respectively, and Figure 10B is a connection diagram between a part of the connection wiring 31 located in the second conductive layer among the multiple connection wirings 31 in Figure 10A and the first type anode, and Figure 10C is a connection diagram between a part of the connection wiring 31 located in the first conductive layer among the multiple connection wirings 31 in Figure 10A and the first type anode. In one wiring group Ls, as shown in Figure 10B, a part of the first wiring 311 and a part of the second wiring 312 are provided in the second conductive layer 34, and as shown in Figure 10C, another part of the first wiring 311 and another part of the second wiring 312 are provided in the first conductive layer 32.

[0104] In the above connection method, 30 connection wires 31 are distributed in two conductive layers, and a sufficient number of conductive layers can support these connection wires 31. Since the number of connection wires in each conductive layer is small, the spacing between adjacent connection wires 31 can be sufficiently large, which is advantageous for processing, makes it difficult for problems such as short circuits of the connection wires to occur, and ensures high product yield.

[0105] In addition, as shown in Figures 8A and 10A, when the first wiring 311 and the second wiring 312 of the same wiring group Ls are located in the same conductive layer, the first wiring 311 and the second wiring 312 of the same wiring group Ls are each connected to first-type anodes in different rows, and the first wiring 311 and the second wiring 312 intersect in the same layer to prevent them from interfering with each other.

[0106] In some embodiments, the at least two first anodes 431 are one first anode group, and among one adjacent first anode group, one second anode 432, and one third anode 433, the length of the first wiring 311 electrically connected to the first anode group is shorter than the length of the second wiring 312 electrically connected to the second anode 432, and is also shorter than the length of the second wiring 312 electrically connected to the third anode 433.

[0107] In some examples, one end of the first wiring 311 is electrically connected to the first anode 431 in one first-type anode row 42, and the other end of the first wiring 311 is preferentially electrically connected to the first-type pixel driving circuit 211 closer to the second display region 11a. One end of a portion of the second wiring 312 is electrically connected to the second anode 432 or the third anode 433 in the first-type anode row 42, and the other end of the second wiring 312 is connected to the first-type pixel driving circuit 211, and the first-type pixel driving circuit 211 connected to the other ends of all the second wirings 312 is farther from the second display region 11a than the first-type pixel driving circuit 211 connected to the first wiring 311. In this way, among one adjacent first anode group, one second anode 432, and one third anode 433, the length of the first wiring 311 electrically connected to the first anode group is shorter than the length of the second wiring 312 electrically connected to the second anode 432, and is also shorter than the length of the second wiring 312 electrically connected to the third anode 433.

[0108] One first-type pixel driving circuit 211 provides a voltage signal to two first anodes 431, and if the distance of the first wiring 311 between them is too long, it is easily subject to resistor-capacitor interference, which causes the light-emitting element of the connected green sub-pixel to not emit light at low gray scale. Therefore, in the above embodiment, the other end of the first wiring 311 is preferentially electrically connected to the first-type pixel driving circuit 211 closer to the second display area 11a, thereby shortening the length of each first wiring 311 and weakening the interference strength of the first wiring caused by the resistor-capacitor, thereby ensuring that the light-emitting element of the green sub-pixel of each second display area 11a operates normally at low gray scale.

[0109] 8A, 9A, and 10A, the plurality of connection wires 31 further include a plurality of third wires 313. The third wires 313 connect at least two first anodes 431, and the first wires 311 are connected to the third wires 313 and the first-type pixel driving circuit, so that the two first anodes 431 are electrically connected to one first-type pixel driving circuit, and the connected third wires 313 and first wires 311 are located in the same conductive layer.

[0110] Exemplarily, the method in which two first anodes 431 are electrically connected to one first-type pixel driving circuit through one third wiring 313 is such that the two first anodes 431 are electrically connected to each other through the third wiring 313, one end of the first wiring 311 is electrically connected to the third wiring 313, and the other end of the first wiring 311 is electrically connected to the first-type pixel driving circuit. The first wiring 311 may be provided in the first conductive layer 32 or the second conductive layer 34, and the third wiring 313 and the first wiring 311 may be provided in the same conductive layer.

[0111] In some embodiments, as shown in Figures 8A, 9A, 10A, 7A and 7B, the conductive layer is also provided with a connection portion 36. The connection portion 36 is used to electrically connect the connection wiring 31 to the anode or to connect the connection wiring 31 to another connection wiring 31. As shown in Figure 7B, the second conductive layer 34 further includes a plurality of second connection portions 362, and the first conductive layer 32 further includes a plurality of first connection portions 361.

[0112] Each second connection portion 362 is electrically connected to one first type anode, and the connection wiring 31 located on the second conductive layer 34 is electrically connected to the first type anode via the second connection portion 362. The first conductive layer 32 further includes a plurality of first connection portions 361, and each first connection portion 361 is electrically connected to one second connection portion 362. The connection wiring 31 located on the first conductive layer 32 is electrically connected to the first type anode via the connected first connection portion 361 and second connection portion 362.

[0113] In some examples, as shown in FIG. 8A, FIG. 9A, and FIG. 10A, the first-type anode row 42 includes a first sub-row 421 and a second sub-row 422 arranged in parallel. The second sub-row 422 includes a plurality of first anodes 431 arranged in sequence, and the centers of the first anodes 431 are located on the same straight line. The first sub-row 421 includes a plurality of second anodes and third anodes arranged alternately, and the centers of the second anodes and the third anodes are located on another straight line. The second connectors 362 are arranged in a plurality of rows, and the orthogonal projections of the second connectors 362 of each row on the base substrate are located between the orthogonal projections of two straight lines corresponding to one first-type anode row 42 on the base substrate. That is, the second connectors 362 of each row are located between the first sub-row 421 and the second sub-row 422 of one first-type anode row 42.

[0114] 7B, the connection wirings 31 are connected to one connection portion 36 at their ends located in the second display region 11a. The connection portion 36 includes a second connection portion 362 located on the second conductive layer 34 and a first connection portion 361 located on the first conductive layer 32. The orthogonal projection of the second connection portion 362 on the base substrate corresponds to the first type anode connected thereto. 43a1 Since the first type anode has an overlap with the orthogonal projection on the base substrate, 43a1 through a second via hole 351 penetrating the second insulating layer 35. Second connection portion 362 The connected first connection portion 361 and second connection portion 362 are located at corresponding positions in the vertical direction of the display panel 100, that is, their orthogonal projections on the base substrate 10 overlap, so that the second connection portion 362 is connected to the first connection portion 361 through the first via hole 331 penetrating the first insulating layer 33. Thus, by providing the connection portion 36, the connection between the connection wiring 31 and the anode becomes more stable.

[0115] In some embodiments, FIG. 7B As shown in FIG. 1, the first wirings 311 and the third wirings 313 are formed on the second conductive layer 311. 34Of the connected first wiring 311 and third wiring 313, the first wiring 311 is connected to two second connection parts 362 and connects two first anodes 431, and the first wiring 311 is connected to one of the two connected second connection parts 362. Of the two connected second connection parts 362, one connected to the first wiring 311 has a larger orthogonal projection on the base substrate and a larger distance between the two first anodes 431 and the second connection parts 362 than the other. 431 The distance between the orthogonal projection on the base substrate of the first type pixel driving circuit electrically connected to the first type pixel driving circuit is close.

[0116] Exemplarily, the first wiring 311 is located on the second conductive layer 34, and the third wiring 313 and the first wiring 311 are located on the same conductive layer. The third wiring 313 electrically connects two first anodes 431. For example, the two first anodes 431 may be two adjacent anodes. Each of the two connected first anodes 431 has a corresponding second connection portion 362. That is, the orthogonal projection of the second conductive layer 34 of each first anode 431 overlaps with one second connection portion 362, and the third wiring 313 is provided between the two second connection portions 362, and the third wiring 313 connects the two second connection portions 362. The first wiring 311 is electrically connected to one of the two second connection portions 362, thereby realizing the electrical connection between the first type pixel driving circuit and the second connection portion 362. Of the two connected second connection parts 362, the orthogonal projection on one base substrate electrically connected to one end of the first wiring 311 is the first projection, the orthogonal projection on the other base substrate 10 is the second projection, and the orthogonal projection on the base substrate of the first-type pixel driving circuit electrically connected to the other end of the first wiring 311 is the third projection. Since the straight-line distance between the first projection and the third projection is smaller than the straight-line distance between the second projection and the third projection, the length of the first wiring can be shortened.

[0117] In some other embodiments, FIG. 7AAs shown in FIG. 1, the plurality of first wirings 311 and the plurality of third wirings 313 are located in the first conductive layer 32, and among the first wirings 311 and the third wirings 313 that are connected, the third wiring 313 is connected to two first connection parts 361 to connect two first anodes 431. For example, the two first anodes 431 may be two adjacent first anodes. The first wiring 311 is connected to one of the two first connection parts 361. Among the two connected first connection parts 361, the one connected to the first wiring 311 has a closer distance between the orthogonal projection on the base substrate and the orthogonal projection on the base substrate of the first-type pixel driving circuit electrically connected to the two first anodes than the other.

[0118] Exemplarily, the first wiring 311 is located in the first conductive layer 32, and the third wiring 313 and the first wiring 311 are located in the same conductive layer. The third wiring 313 electrically connects two first anodes 431. Each of the two first anodes 431 has a corresponding first connection portion 361 and a second connection portion 362. That is, the orthogonal projection of the second conductive layer 34 of the first anode 431 overlaps with the second connection portion 362, and the orthogonal projection of the first conductive layer 32 of the first anode 431 overlaps with the first connection portion 361, and the first connection portion 361 and the second connection portion 362 are electrically connected by a via hole. The two first connection portions 361 are connected via the third wiring 313, and the third wiring 313 connects the two second connection portions 362. The first wiring 311 is electrically connected to one of the two first connection parts 361, and realizes an electrical connection between the first-type pixel driving circuit and the first connection part 361. Of the two connected first connection parts 361, the orthogonal projection on one base substrate electrically connected to one end of the first wiring 311 is the first projection', the orthogonal projection on the other base substrate 10 is the second projection', and the orthogonal projection on the base substrate of the first-type pixel driving circuit electrically connected to the other end of the first wiring 311 is the third projection'. Since the linear distance between the first projection' and the third projection' is smaller than the linear distance between the second projection' and the third projection', the length of the first wiring 311 can be shortened.

[0119] The above-mentioned arrangement shortens the length of each first wiring 311, improves the stability of the current signal transmitted by the first wiring 311, and ensures normal operation of the light-emitting element of the green sub-pixel in the second display area 11a.

[0120] In some embodiments, the first wiring 311, the second wiring 312, and the third wiring 313 all comprise a transparent conductive material. For example, the first wiring 311, the second wiring 312, and the third wiring 313 can be made of indium tin oxide or indium zinc oxide.

[0121] In some embodiments, the insulating layer includes a transparent insulating material, for example, the first insulating layer 33 or the second insulating layer 35 may be made of polyimide (PI).

[0122] In addition, when the area of ​​the second display region 11a is small, or when the process precision of manufacturing the connection wiring 31 is high and the width of the connection wiring 31 can be further reduced, all of the connection wirings 31 can be arranged in a single conductive layer; that is, the connection layer shown in FIG. 7A has only one conductive layer and one insulating layer, thereby further reducing the number of masks used in the manufacturing process and simplifying the process, while at the same time improving the light transmittance of the second display region 11a, reducing the overall thickness of the display panel 100, and realizing a lighter and thinner display panel 100.

[0123] The present disclosure further provides a display device 1000, which includes the display panel 100 provided in any of the above embodiments and at least one sensor 200, as shown in Fig. 16. The sensor 200 is provided on the non-display surface side of the display panel 100, and the orthogonal projection of the sensor 200 on the display panel 100 is located in the second display area 11a. The sensor 200 uses an optical sensor 200.

[0124] In some embodiments, the at least one sensor 200 is an optical sensor 200, such as a front camera, a proximity optical sensor 200, or a 3D sensing module. Exemplarily, the display device 1000 includes a display panel 100 and a front camera provided on the non-display surface side of the display panel 100. The base substrate 10 and the driving circuit layer 20 of the display panel 100 have a light-transmitting structure in the second display region 11a. For example, the second display region 11a is a circular region, the display panel 100 is entirely transparent in the second display region 11a, the orthogonal projection of the front camera on the display panel 100 is located in the second display region 11a, and the light-sensitive portion of the front camera is transparent to the non-display surface side of the display panel 100. Face side The front camera faces the display surface side of the display device 1000. The front camera performs image collection work through the transparent second display area 11a.

[0125] In some examples, the display device 1000 further includes a frame, a circuit board, a display driving IC (Integrated Circuit), and other electronic components, and the display panel 100 is provided within the frame.

[0126] The display device 1000 provided by the embodiments of the present disclosure can be any device that displays text or images, whether moving (e.g., video) or stationary (e.g., still images). The display device 1000 can be a mobile phone, a computer, a camera, a video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat panel display, etc.

[0127] The display panel 100 provided by the present disclosure uses the display panel 100 provided by the above embodiment, and has the same beneficial effects as the above display panel 100, which will not be described repeatedly here.

[0128] The present disclosure further provides a method for manufacturing the display panel 100, which includes steps S1 to S5, as shown in FIG.

[0129] S1, providing a base substrate 10;

[0130] 18A, the base substrate 10 may be a silicon substrate or a glass substrate. The base substrate 10 is divided into a peripheral region 10b and a display region 10a, and the display region 10a is divided into a first display region 11b and a second display region 11a.

[0131] S2, forming a driving circuit layer 20 on the base substrate 10. The driving circuit layer 20 includes a plurality of first-type pixel driving circuits, and the plurality of first-type pixel driving circuits are arranged in a first display area. 11b will be placed in.

[0132] 18B, a semiconductor layer 22, a gate insulating layer 23, a gate layer 24, an interlayer insulating layer 25, a source drain metal layer 26 and a planarization layer 27 are sequentially formed on a base substrate 10. A corresponding film layer is formed using a normal deposition process and a patterning process. For example, a semiconductor material layer is deposited on the base substrate 10, and an etching process is used to pattern the semiconductor material layer to form a semiconductor layer 22. The manufacturing process of the gate insulating layer 23, the gate layer 24, the interlayer insulating layer 25, the source drain metal layer 26 and the planarization layer 27 can be referred to the manufacturing process of the semiconductor layer 22. The semiconductor layer 22, the gate insulating layer 23, the gate layer 24, the interlayer insulating layer 25, the source drain metal layer 26 and the planarization layer 27 constitute a driving circuit layer 20. The driving circuit layer 20 includes a first type pixel driving circuit 211 and a second type pixel driving circuit 212. The first-type pixel driving circuit 211 and the second-type pixel driving circuit 212 are both located in the first display area 11b. The first-type pixel driving circuit 211 can be fabricated in the array gap of the second-type pixel driving circuit 212 by using a pixel compression process.

[0133] S3 forms the connection layer 30. The connection layer 30 includes a plurality of connection wirings 31, and the plurality of connection wirings 31 include a first wiring 311 and a plurality of second wirings 312.

[0134] 18C, in some embodiments, the connection layer 30 is located on the side of the driving circuit layer 20 away from the base substrate 10. In S3, a conductive layer and an insulating layer are sequentially formed on the side of the driving circuit layer 20 away from the base substrate 10, and corresponding patterns are formed on the conductive layer and the insulating layer, for example, a plurality of connections are formed on the conductive layer. wiring For example, on the side of the drive circuit layer 20 away from the base substrate 10, a first conductive layer 32, a first insulating layer 33, a second conductive layer 34, and a second insulating layer 35 are formed in this order.

[0135] S4, a light emitting element layer 40 is formed. The light emitting element layer 40 includes a pixel definition layer 44, an anode layer 43, a light emitting film layer 45, and a cathode layer 46. The anode layer 43 includes a plurality of anodes 43a. The plurality of light emitting elements 41 in the light emitting element layer 40 are arranged in an array, i.e., the plurality of anodes 43a are arranged in an array.

[0136] As shown in FIG. 18D, S4 includes S41. S41 forms an anode layer 43 on the side of the connection layer 30 away from the base substrate 10. The anode layer 43 includes a plurality of first-type anodes 43a1 located in the second display region 11a. The plurality of first-type anodes 43a1 includes a plurality of first anodes 431, a plurality of second anodes 432, and a plurality of third anodes 433. Two adjacent first anodes 431 are electrically connected to one first-type pixel driving circuit 211 via one first wiring 311. Each second anode 432 is electrically connected to one first-type pixel driving circuit 211 via one second wiring 312. Each third anode 433 is electrically connected to one first-type pixel driving circuit 211 via one second wiring 312. Similarly, the anode layer 43 further includes a plurality of second-type anodes 43a2 located in the first display region 11b. The plurality of second-type anodes 43a2 includes a plurality of first anodes, a plurality of second anodes, and a plurality of third anodes. The arrangement manner of the plurality of first-type anodes 43a1 and the plurality of second-type anodes 43a2 is consistent with each other.

[0137] S4 further includes S42. S42 sequentially forms a pixel definition layer 44, a light-emitting film layer 45, and a cathode layer 46 on the side of the anode layer 43 away from the base substrate 10. The pixel definition layer 44 has a plurality of openings, each opening exposing one anode 43a. The light-emitting film layer 45 has a plurality of light-emitting layers 45a, each light-emitting layer 45a being located in one opening and in contact with the anode 43a, and forms a cathode layer 46 on the side of the light-emitting film layer 45 and the pixel definition layer 44 away from the base substrate 10. Each anode 43a, one light-emitting layer 45a, and the portion of the cathode layer 46 located in the opening form one light-emitting element 41.

[0138] 18E, a packaging layer 50 is formed on the side of the light emitting element layer 40 away from the base substrate 10. The packaging layer 50 covers the light emitting element layer 40. The packaging layer 50 is used to protect the light emitting element layer 40, and can prevent the light emitting element layer 40 from being damaged by the outside world, and can also prevent corrosion due to water or oxygen.

[0139] 5 and 18C, the connection layer 30 includes a first conductive layer 32, a first insulating layer 33, a second conductive layer 34, and a second insulating layer 35, which are provided in that order on the side of the drive circuit layer 20 away from the base substrate 10. As shown in Fig. 19, S3 forms the connection layer 30 on the side of the drive circuit layer 20 away from the base substrate 10, and includes S31 to S34.

[0140] S31, forming a first conductive material layer 32a on a side of the driving circuit layer 20 away from the base substrate 10, and patterning the first conductive material layer 32a with a first mask 32'' to form a first conductive layer 32 having a pattern.

[0141] Exemplarily, as shown in FIGS. 20A to 20D, S31 includes S311 to S315.

[0142] 20A, a first conductive material layer 32a is formed on the side of the drive circuit layer 20 away from the base substrate 10. The first conductive material layer 32a is a film layer that covers the entire display region 10a.

[0143] S312, a first photoresist layer 32' is formed on the side of the first conductive material layer 32a away from the base substrate 10, as shown in FIG. 20A.

[0144] S313, as shown in FIG. 20B, expose the first photoresist layer 32′ through a first mask 32″, and then develop the exposed first photoresist layer 32′ to form a pattern corresponding to the first photoresist layer 32′.

[0145] S314, as shown in FIG. 20C, the first conductive material layer 32a and the first photoresist layer 32' are etched using dry etching.

[0146] S315, as shown in FIG. 20D, the first conductive material layer 32 a The portions of the first conductive material layer 32a exposed by the first photoresist layer 32' are removed, and the retained portions of the first conductive material layer 32a become the first conductive layer 32, and the first conductive layer 32 has a pattern, for example the pattern of the first conductive layer 32 comprises a plurality of connecting wires 31, and the plurality of connecting wires 31 are, for example, a first wire 311 and / or a plurality of second wires 312.

[0147] S32, a first insulating material layer is formed on the side of the first conductive layer 32 away from the base substrate 10, and the first insulating material layer is patterned with a second mask to form a first insulating layer 33 having a pattern.

[0148] As shown in FIGS. 20E to 20H, exemplarily, forming the first insulating layer 33 having a pattern on the first conductive layer 32 includes S321 to S325.

[0149] 20E, a first insulating material layer 33a is formed on the side of the first conductive layer 32 away from the base substrate 10. The first insulating material layer 33a is a film layer that covers the entire display region 10a, and may be polyimide (PI).

[0150] S322, a second photoresist layer 33' is formed on the side of the first insulating material layer 33a away from the base substrate 10, as shown in FIG. 20E.

[0151] S323, as shown in FIG. 20F, expose the second photoresist layer 33′ through a second mask 33″, and then develop the exposed second photoresist layer 33′ to form a pattern corresponding to the second photoresist layer 33′.

[0152] S324, as shown in FIG. 20G, the first insulating material layer 33a and the second photoresist layer 33' are etched using dry etching.

[0153] S325, as shown in Figure 20H, the first insulation material layer 33 a The portions of the first insulating material layer 33a exposed by the second photoresist layer are removed, and the retained portions of the first insulating material layer 33a become the first insulating layer 33, which has a pattern, for example, the pattern of the first insulating layer 33 comprising a plurality of first via holes 331.

[0154] S33, forming a second conductive material layer on a side of the first insulating layer away from the base substrate, and patterning the second conductive material layer with a third mask to form a patterned second conductive layer.

[0155] As shown in FIGS. 20I to 20L, for example, forming a second conductive layer 34 having a pattern on the side of the first insulating layer 33 away from the base substrate 10 is performed in steps S331 to S333. 5 Includes.

[0156] S331, as shown in Figure 20I, First insulating layer 33 A second conductive material layer 34a is formed on the side away from the base substrate 10. The second conductive material layer 34a is a film layer that covers the entire display region 10a.

[0157] S332, a third photoresist layer 34' is formed on the side of the second conductive material layer 34a away from the base substrate 10, as shown in FIG. 20I.

[0158] S333, as shown in FIG. 20J, expose the third photoresist layer 34′ through a third mask 34″, and then develop the exposed third photoresist layer 34′ to form a pattern corresponding to the third photoresist layer 34′.

[0159] S334, as shown in FIG. 20K, a dry etch is used to etch the second conductive material layer and the third photoresist layer 34'.

[0160] S335, as shown in FIG. 20L, the second conductive material layer 34 a The portions of the second conductive material layer exposed by the third photoresist layer are removed, and the retained portions of the second conductive material layer become second conductive layer 34, the second conductive layer 34 having a pattern, e.g., the pattern of second conductive layer 34 comprises a plurality of first wirings and / or a plurality of second wirings.

[0161] S34, forming a second insulating material layer on a side of the second conductive layer away from the base substrate, and patterning the second insulating material layer with a fourth mask to form a patterned second insulating layer.

[0162] As shown in FIGS. 20M to 20P, for example, forming a second insulating layer 35 having a pattern on the side of the second conductive layer 34 away from the base substrate 10 is performed in steps S341 to S344. 5 Includes.

[0163] As shown in S341 and FIG. 20M, a second insulating material layer 35a is formed on the side of the second conductive layer 34 away from the base substrate 10. The second insulating material layer 35a is a film layer that covers the entire display region 10a, and the second insulating material layer 35a may be polyimide (PI).

[0164] S342, a fourth photoresist layer 35' is formed on the side of the second insulating material layer 35a away from the base substrate 10, as shown in FIG. 20M.

[0165] S343, as shown in FIG. 20N, expose the fourth photoresist layer 35′ through a fourth mask 35″, and then develop the exposed fourth photoresist layer 35′ to form a pattern corresponding to the fourth photoresist layer 35′.

[0166] S344, as shown in FIG. 20O, the second insulating material layer 35a and the fourth photoresist layer 35' are etched using dry etching.

[0167] S345, as shown in FIG. 20P, remove the portions of the second insulating layer 35 exposed by the fourth photoresist layer, and the retained portions of the second insulating material layer become the second insulating layer 35, where the second insulating layer 35 has a pattern, for example, the pattern of the second insulating layer 35 comprises a plurality of second via holes 351.

[0168] The manufacturing method of the display panel 100 provided by the present disclosure is used to manufacture a display panel as shown in FIG. 5. Since the connection layer only includes two conductive layers and two insulating layers, in the process of manufacturing the connection layer, four masks are used to perform four patterning operations, which can reduce the number of masks used, simplify the manufacturing process, improve efficiency, and increase production capacity. In addition, the light transmission thickness of the optical sensor in the second display area can be reduced, the efficiency of light transmission can be improved, the operating performance of the optical sensor can be improved, and the display quality of the display panel can be ensured.

[0169] The above are merely specific embodiments of the present disclosure, and the scope of protection of the present disclosure is not limited thereto, and all modifications or replacements that can be easily conceived by a person skilled in the art within the technical scope of the present disclosure are included within the technical scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be governed by the scope described in the claims.

Claims

1. a display panel including a display area, the display area including a first display area and a second display area; The display area is A base substrate; a driving circuit layer provided on one side of the base substrate, the driving circuit layer including a plurality of first-type pixel driving circuits located in the first display area; a connection layer including a plurality of connection wirings, the plurality of connection wirings including a plurality of first wirings; an anode layer including a plurality of first-type anodes located in the second display region, the plurality of first-type anodes including a plurality of first anodes, at least two of the first anodes being electrically connected to one of the first-type pixel driving circuits via the first wiring; Equipped with Display panel.

2. the plurality of connection wirings further include a plurality of third wirings, the third wirings connecting at least two of the first anodes, and the first wirings connecting one of the third wirings to one of the first type pixel driving circuits in order to electrically connect the at least two first anodes to the first type pixel driving circuit; The display panel according to claim 1 .

3. the plurality of first-type anodes further comprises a plurality of second anodes and a plurality of third anodes, and the plurality of connection wirings further comprises a plurality of second wirings; the second anode is electrically connected to one of the first type pixel driving circuits via a second wiring, and the third anode is electrically connected to one of the first type pixel driving circuits via the second wiring; 3. The display panel according to claim 1 or 2.

4. the at least two first anodes are one first anode group, and among one adjacent first anode group, one second anode, and one third anode, a length of a first wiring electrically connected to the first anode group is shorter than a length of a second wiring electrically connected to the second anode, and is also shorter than a length of a second wiring electrically connected to the third anode; The display panel according to claim 3 .

5. the connection layer is provided on a side of the drive circuit layer away from the base substrate, The anode layer is provided on a side of the connection layer away from the base substrate. The display panel according to claim 2 .

6. The connection layer includes at least one conductive layer and at least one insulating layer, and each conductive layer is provided with the insulating layer on a side away from the base substrate. The display panel according to claim 5 .

7. The connection layer is a first conductive layer provided on a side of the drive circuit layer away from the base substrate; a first insulating layer provided on a side of the first conductive layer away from the base substrate; a second conductive layer provided on a side of the first insulating layer away from the base substrate; a second insulating layer provided on a side of the second conductive layer away from the base substrate; Equipped with the first conductive layer includes a plurality of first wirings and / or a plurality of second wirings, the second conductive layer includes a plurality of first wirings and / or a plurality of second wirings, the plurality of connection wirings further include a plurality of third wirings, the third wirings and the first wirings being connected to each other and located in the same conductive layer; the first insulating layer has a first via hole, the second insulating layer has a second via hole, the first conductive layer is electrically connected to the second conductive layer through the first via hole, and the second conductive layer is electrically connected to the anode layer through the second via hole; The display panel according to claim 6.

8. the plurality of first-type anodes are arranged into a plurality of first-type anode rows, at least one of the first-type anode rows comprising at least two first anodes, at least one second anode, and at least one third anode arranged in a row; At least two of the first anodes in the first-type anode row are electrically connected to the first wiring; or the plurality of first-type anodes are arranged into a plurality of first-type anode rows, at least one of the first-type anode rows comprising at least two first anodes, at least one second anode, and at least one third anode arranged in a row; At least two of the first anodes in the first type anode array are electrically connected to the first wiring. The display panel according to any one of claims 1 to 7.

9. each of the at least one first-type anode rows is periodically arranged according to the order of the second anode, the first anode, the third anode, and the first anode; the plurality of connection wirings are arranged in a plurality of wiring groups, the wiring group including at least one first wiring and at least two second wirings, the plurality of connection wirings extend along a first direction, the first direction being a row direction in which the plurality of anodes are arranged, In the wiring group, the first wiring is connected to correspond to at least two of the first anodes in the first-type anode row, and the second wiring is connected to correspond to one of the second anodes or one of the third anodes in the first-type anode row, or In the wiring group, the first wiring is connected to correspond to at least two of the first anodes in the first-type anode row, and the at least two second wirings in the wiring group include at least one first sub-wiring and at least one second sub-wiring, the first sub-wiring is connected to correspond to one second anode or one third anode in the first-type anode row, and the second sub-wiring is electrically connected to one second anode or one third anode in another first-type anode row adjacent to the first-type anode row. The display panel according to claim 8.

10. the at least one first type anode row is periodically provided in the order of the second anode, the first anode, the third anode, and the first anode; the plurality of connection wirings are arranged in a plurality of wiring groups, the wiring group including at least one first wiring and at least two second wirings, the plurality of connection wirings extend along a second direction, the second direction being a column direction in which the plurality of anodes are arranged, in the wiring group, the first wiring is connected to correspond to at least two of the first anodes in the first-type anode row, and the second wiring is connected to correspond to one of the second anodes or one of the third anodes in the first-type anode row, or In the wiring group, the first wiring is connected to correspond to at least two of the first anodes in the first-type anode row, and the at least two second wirings in the wiring group include at least one first sub-wiring and at least one second sub-wiring, the first sub-wiring is connected to correspond to one of the second anodes or one of the third anodes in the first-type anode row, and the second sub-wiring is electrically connected to one of the second anodes or one of the third anodes in another of the first-type anode rows. The display panel according to claim 8.

11. orthogonal projections of the first-type pixel driving circuits on the base substrate are located on one side or both sides of orthogonal projections of the first-type anodes on the base substrate along an extension direction of the connection wirings; The display panel according to claim 9 or 10.

12. the second conductive layer further comprises a plurality of second connection parts, the second connection parts being electrically connected to the first type anode, and the connection wiring located in the second conductive layer is electrically connected to the first type anode via the second connection parts; the first conductive layer further comprises a plurality of first connection parts, the first connection parts being electrically connected to the second connection parts, and the connection wiring located in the first conductive layer is electrically connected to the first type anode via the first connection parts and the second connection parts which are connected to each other; The display panel according to claim 11.

13. the plurality of first wirings and the plurality of third wirings are located on the second conductive layer, the third wiring of the connected first wirings and third wirings is connected to two adjacent first anodes by being connected to two adjacent second connection parts, the first wiring is connected to one of two adjacent second connection parts, one of the two adjacent second connection parts connected to the first wiring has a closer distance between an orthogonal projection on a base substrate and an orthogonal projection on a base substrate of a first-type pixel driving circuit electrically connected to the two adjacent first anodes than the other of the two adjacent second connection parts, or the plurality of first wirings and the plurality of third wirings are located on a first conductive layer, the third wiring of the connected first wirings and third wirings is connected to two adjacent first connection parts, and thereby connected to two adjacent first anodes, the first wiring is connected to one of the two adjacent first connection parts, and one of the two adjacent first connection parts connected to the first wiring has a closer distance between an orthogonal projection on a base substrate and an orthogonal projection on a base substrate of a first-type pixel driving circuit electrically connected to the two adjacent first anodes than the other of the two adjacent first connection parts; The display panel according to claim 12.

14. the driving circuit layer further includes a plurality of second-type pixel driving circuits arranged in an array in the first display area, the plurality of first-type pixel driving circuits being provided in array gaps of the plurality of second-type pixel driving circuits; the anode layer further comprises a plurality of second-type anodes located in the first display area, the second-type anodes being electrically connected to the second-type pixel driving circuit; The display panel according to claim 13.

15. A display panel according to any one of claims 1 to 14, At least one sensor is provided on a non-display surface side of the display panel and is orthogonally projected onto a second display area of ​​the display panel; Equipped with Display device.

16. A method for manufacturing a display panel, the display panel including a display area, the display area including a first display area and a second display area, The method for manufacturing the display panel includes the steps of: Providing a base substrate; forming a driving circuit layer on the base substrate, the driving circuit layer including a plurality of first-type pixel driving circuits, the plurality of first-type pixel driving circuits being disposed in the first display area; forming a connection layer, the connection layer comprising a plurality of connection wires, the plurality of connection wires comprising a first wire; forming an anode layer, the anode layer comprising a plurality of first-type anodes located in the second display region, the plurality of first-type anodes comprising a plurality of first anodes, a plurality of second anodes, and a plurality of third anodes, at least two of the first anodes being electrically connected to one of the first-type pixel driving circuits via the first wiring, the second anodes being electrically connected to one of the first-type pixel driving circuits via one second wiring, and the third anodes being electrically connected to one of the first-type pixel driving circuits via the second wiring; Including, A method for manufacturing a display panel.

17. the connection layer includes a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer, which are provided in this order on a side of the drive circuit layer away from the base substrate; forming the connection layer on a side of the drive circuit layer away from the base substrate, forming a first conductive material layer on a side of the drive circuit layer away from the base substrate and patterning the first conductive material layer with a first mask to form a first conductive layer having a pattern; forming a first insulating material layer on a side of the first conductive layer away from the base substrate and patterning the first insulating material layer with a second mask to form a first insulating layer having a pattern; forming a second conductive material layer on a side of the first insulating layer away from the base substrate and patterning the second conductive material layer with a third mask to form a patterned second conductive layer; forming a second insulating material layer on a side of the second conductive layer away from the base substrate and patterning the second insulating material layer with a fourth mask to form a patterned second insulating layer; Including, the pattern of the first conductive layer includes a plurality of first wirings and / or a plurality of second wirings, the pattern of the second conductive layer includes a plurality of first wirings and / or a plurality of second wirings, the pattern of the first insulating layer includes a first via hole, and the pattern of the second insulating layer includes a second via hole; The method for manufacturing the display panel according to claim 16 .

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