RFID Transponder, Pod, and Method for Manufacturing Pod

Abstract

An RFID transponder (1) comprising a radiating antenna (2) and a pod (3), a pod (3), and a method of manufacturing a panel (29) including the pod (3) are disclosed.

Description

Technical Field

[0001] The present invention relates to an RFID transponder (radio frequency identification transponder), a pod for the RFID transponder, and a method for manufacturing the pod.

Background Art

[0002] RFID transponders are known. One of the drawbacks associated with known transponders is that their complex structure makes it difficult to adapt to mass production.

[0003] U.S. Publication No. 2019 / 341673 discloses a radio frequency communication module for a tire. The radio frequency communication module includes a radio frequency transponder having an electronic portion. The electronic portion includes an electronic chip and a primary antenna electrically connected to the electronic chip via a printed circuit board. The primary antenna is composed of a surface mount device (SMD) microcoil. There is a copper track on the printed circuit board that terminates at a copper pad. The primary antenna is connected to the copper pad at one end of the copper track, and the electronic chip is connected to the copper pad via a gold wire at the other end of the copper track. The electronic chip is disposed on the printed circuit board.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Means for Solving the Problems

[0005] An object of the present invention is to provide an RFID transponder, a pod, and a manufacturing method that solve the above problems. The object of the present invention is achieved by an RFID transponder, a pod, and a manufacturing method characterized by those described in the independent claims. Preferred embodiments of the present invention are disclosed in the dependent claims.

[0006] The advantages of this RFID transponder are that mass production is possible, and furthermore, it is of high quality and very reliable.

[0007] Another advantage is that the RFID transponder can have a small size suitable for, for example, small tires or other very thin products.

[0008] Another advantage is that the performance of the reading range is more stable.

[0009] The RFID transponder can be used in tires, but other applications are also conceivable, such as products including molded parts. The RFID transponder can be embedded inside molded parts such as plastic containers, information technology devices, automotive parts, toys, or medical devices. In other words, the RFID transponder described in this specification can be applied to all uses where it is desired to hold the transponder inside the product rather than adding the transponder to the surface of the product after manufacture. However, this transponder is particularly suitable for tires.

[0010] In a tire, the RFID transponder is embedded in the elastomer material of the tire to store readable information inside the tire. The RFID transponder can be applied to all types of tires, including passenger car tires, which are in greatest demand due to the substantially thin elastomer layer in the tire. The total thickness of the RFID transponder in a passenger car tire should not exceed approximately 1.5 mm. The RFID transponder needs to withstand the harsh manufacturing conditions of the tire. The manufacturing process includes a vulcanization step carried out at high temperature and high pressure. The RFID transponder also needs to withstand the use of the tire throughout its product life. The RFID transponder must not affect the durability of the tire.

[0011] The RFID transponder includes a radiating antenna and a pod, which can be a dipole antenna. The radiating antenna is a three-dimensional helical antenna or a folded planar antenna. The folded planar antenna has the advantage that it can be deformed within the structure of the tire without affecting the performance of the antenna. Also, the radiating antenna can be a monopole antenna or a patch antenna.

[0012] The radiating antenna has a coupling region with the pod. The pod is located in the coupling region and is usually inside the coupling region. There may be retaining means on the pod and / or the radiating antenna to hold the pod in place. The coupling region is helical in both of the above antenna types. The coupling region can be anywhere on the radiating antenna. For example, the coupling region can be located at the central part of the antenna or at one end of the antenna. The coupling region has an adjustable pitch size to adjust the impedance matching between the pod and the radiating antenna. The radiating antenna outside the coupling region has another adjustable pitch size to operate in a desired frequency range to adjust the resonance frequency of the antenna. The frequency range can be within the UHF (ultra high frequency) range, i.e., between 860 MHz and 960 MHz. Also, the frequency range can be the HF (high frequency) range such as 13.56 MHz.

[0013] The pod includes a first end, a second end, and a casing between the first end and the second end. The casing has a longitudinal central axis. The casing is a layered structure. The cross-section of the casing can be, for example, rectangular. At least part of the casing is a dielectric material, and the conductive parts are electrically insulated from each other as required. The material of the casing can be a dielectric material throughout.

[0014] The planar helix antenna forming the helical primary antenna is present within the casing. The planar helix antenna has a first antenna end and a second antenna end. The first antenna end is connected to the second conductive connection portion. The second antenna end is connected to the third conductive connection portion. The third conductive connection portion is connected to the first conductive connection portion.

[0015] The integrated circuit on the chip is coupled to the first conductive connection portion and the second conductive connection portion. The techniques used to attach the chip are direct soldering, wire bonding or flip chip soldering.

[0016] According to the first option, the second antenna end and / or the third conductive connection portion are connected to the first conductive connection portion via a via, or the first antenna end is connected to the second conductive connection portion via a via. The via can be a conductive bridge. This can be formed by printing or etching.

[0017] The first and second conductive connection portions, and the via are on one of the dielectric layers. This means that they are inside a sandwich structure formed by the dielectric layer and need to be exposed before attaching the chip. The first, second, and third conductive connection portions can be an integral part of the antenna.

[0018] According to the second option, there are two vias. The first via extends from the second antenna end and / or the third conductive connection portion to the first conductive connection portion, thus electrically connecting the first conductive connection portion and the second antenna end. The second via extends from the first antenna end to the second conductive connection portion, thus electrically connecting the second conductive connection portion and the first antenna end. The integrated circuit on the chip is coupled to the first conductive connection portion and the second conductive connection portion.

[0019] Both through leads and the first and second conductive connections are on one of the dielectric layers. This means that they are inside the sandwich structure formed by the dielectric layers and need to be exposed before the chip is attached. The first, second, and third conductive connections can be integral parts of the antenna. Except for the presence of two through leads, the second option can be the same as the first option.

[0020] The pods according to the first and second options include integrated circuits inside the pods. To expose the conductive connections, cavities are formed in the layers above the first and second conductive connections. The cavities can be formed, for example, by cutting out or drilling holes in the individual layers of the pod before attaching other layers. The cavities can be, for example, cylindrical, cubic, or other shapes useful for exposing the conductive connections. The integrated circuit is connected to the conductive connection. Thereafter, the cavities can be filled with a dielectric material such as epoxy resin. The cavities can also be left unfilled. By placing the integrated circuit inside the cavity, the height of the pod is reduced and the integrated circuit is protected from external shocks.

[0021] According to the third option, the first end of the casing includes the first and second conductive connections. The second end of the casing can include the third conductive connection. The third conductive connection can be provided on the second end of the casing or near the second end inside the casing. The first, second, and third conductive connections can be integral parts of the antenna. Except for the first and second conductive connections being at the first end, the third option can be the same as the first option.

[0022] The casings according to the first, second, and third options include a layer of a dielectric material such as a ceramic material that can withstand high temperatures well. Further, the ceramic material enables reducing the size of the pod and has better performance. Preferred ceramic materials have a dielectric constant from 7.0 to 8.0 and a dielectric loss tangent from 0.004 to 0.006, although other ceramic materials can also be used. In addition to the above materials, typical printed circuit board materials such as FR4 or plastic films can also be used to form the laminated structure. Each layer can be attached by adhesion.

[0023] The casing includes at least two layers. The casing can include three layers, namely, a first layer, a third layer, and a second layer between the first layer and the third layer. Each layer can be a planar layer having a substantially constant thickness. The thickness may vary from layer to layer. In addition to the layers described above, there may be additional layers. The additional layer may be necessary, for example, for electrical insulation or shielding of the first layer and / or the third layer.

[0024] The casing comprises a first row of a series of first via holes that can extend from the first layer to the third layer. The first via holes have a first end and a second end. Also, the casing comprises a second row of a series of second via holes that can extend from the first layer to the third layer. The second via holes have a first end and a second end. The second row of via holes is at a different position in the longitudinal direction of the casing compared to the first row of via holes.

[0025] A series of upper arms connect the first ends of the first via holes and the first ends of the second via holes, and a series of lower arms connect the second ends of the first via holes and the second ends of the second via holes. The arms and the via holes are conductive.

[0026] In connection with the first and second options above, the conductive component of the pod preferably exists entirely within a dielectric material such as a ceramic material, so there is no need to use an additional non-conductive coating. This is important for cost-effective manufacturing. In the case of a dielectric material being a normal printed circuit board, a non-conductive coating may be required.

[0027] The radiation antenna and the primary antenna are configured to couple without physical contact. This means that the radiation antenna and the primary antenna are configured to couple inductively or capacitively. Inductive coupling is preferred.

[0028] Since the radiation antenna and the primary antenna should not be in galvanic contact with each other, a dielectric layer can be provided between them. The outer surfaces of the pod and the primary antenna can be covered with a dielectric layer, or the inner surface of the radiation antenna can be electrically insulated.

[0029] The pod can also be manufactured in two layers. If the through leads are on a third layer, the second layer can be omitted. The through leads can be formed on the third layer between the via holes. The through leads need to be electrically insulated from the via holes. The above options can also include additional layers such as a layer on top of the first layer or a layer below the third layer.

[0030] The RFID transponder can be embedded in a product such as a tire or other product. The RFID transponder can be added to rubber or plastic, etc. The integrated circuit on the chip can store information such as information related to the manufacturer of the product or the product, that is, identification information. The RFID reader can excite the RFID transponder to read the information.

[0031] One possibility for manufacturing the pod according to the first and second options is as follows. The primary antenna can be manufactured using low temperature co-fired ceramic (LTCC) technology. A blank of a layer containing ceramic particles mixed with a polymer binder is formed. The blank is punched to form via holes. The via holes are made conductive, for example by electroplating with a conductive material. The arms and through leads can also be formed by printing. Cavities are formed in the layer over the first and second conductive connections to expose the conductive connections. The cavities can be formed, for example, by cutting out or drilling holes in the individual layers of the pod before attaching the other layers. The cavities can be, for example, cylindrical, cubic, or other shapes useful for exposing the conductive connections. The layers are then laminated together and fired at a temperature below 1000 °C so that the polymer binder burns off and the ceramic particles sinter. The integrated circuit is connected to the conductive connections. The cavities are then filled with a dielectric material such as epoxy resin. The cavities can also be left unfilled. Placing the integrated circuit within the cavity reduces the height of the pod.

[0032] When the first and second conductive connections are in one of the dielectric layers, parallel and / or series of pods, such as 500 pods at a time, can be manufactured. First, a plurality of pods are manufactured as a panel, and then the pods are separated from the panel to form individual pods. The above manufacturing method improves manufacturing accuracy, yield, and production capacity.

[0033] Another possibility for manufacturing the pod according to the first and second options is to use a printed circuit (PCB) core and prepregs as the first and second dielectric layers. The PCB core has a top surface and a bottom surface. The prepregs have a top surface and a bottom surface.

[0034] The dielectric PCB core has conductive layers on both sides. The conductive layers can be made of copper. A photoresist dry film containing a circuit pattern is laminated on both conductive layers by heat. Then, the film is removed, but the circuit pattern remains on the conductive layer. That is, the circuit pattern on the upper surface of the first layer constitutes the pattern of the upper arm, and the circuit pattern on the lower surface of the first layer constitutes the pattern of the through lead. The conductive layer is etched so that only the circuit pattern remains on the upper and lower surfaces. A cavity is formed by making holes in the PCB core. The cavity exposes the first conductive connection part and the second conductive connection part so that a chip can be attached.

[0035] The prepreg is laminated on the PCB core so that the lower surface of the first layer contacts the upper surface of the second layer. A foil of a conductive material such as copper is laminated on the lower surface of the prepreg.

[0036] Then, via holes are formed. The via holes are plated to make them conductive.

[0037] A photoresist dry film containing a circuit pattern is laminated on the lower surface of the prepreg by heat. Then, the film is removed, but the circuit pattern remains on the conductive foil. That is, the circuit pattern on the lower surface of the second layer constitutes the pattern of the lower arm. The conductive foil is etched so that only the circuit pattern remains on the lower surface. A solder mask layer is applied on the upper surface of the first layer and the lower surface of the second layer to protect the upper and lower surfaces of the pad.

[0038] The integrated circuit on the chip is fixed in the cavity. The first conductive connection part and the second conductive connection part are connected to the respective pads of the chip. Then, the cavity can be filled with a resin such as epoxy that protects the chip 15.

[0039] Yet another possibility for manufacturing the pod according to the first and second options is to attach the integrated circuit to one of the layers, connect it to the first and second conductive connections, and then laminate the layer with the other layers so that the integrated circuit is embedded inside the pod. In that case, no cavity is required. In other words, the manufacturing process is the same as in the case with a cavity, except that the cavity is omitted and the integrated circuit is attached before the lamination step. The layer can be made of a printed circuit board material such as FR4.

[0040] One possibility for manufacturing the pod according to the third option is as follows. The primary antenna can be manufactured using low temperature co-fired ceramic (LTCC) technology. A blank of a layer containing ceramic particles mixed with a polymer binder is formed. The blank is punched to form via holes. The via holes are made conductive by filling them with a conductive material. The arms and through leads can be formed by printing. Subsequently, the layers are laminated together and fired at a temperature below 1000°C so that the polymer binder burns and the ceramic particles sinter. The first conductive connection and the second conductive connection are at one end of the pod. The integrated circuit is connected to the first and second conductive connections.

[0041] Hereinafter, the present invention will be described in more detail by way of preferred embodiments with reference to the accompanying drawings.

Brief Description of the Drawings

[0042]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8a

Figure 8b

Figure 8c

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Best Mode for Carrying Out the Invention

[0043] Fig. 1 shows a perspective view of the RFID transponder 1. The RFID transponder 1 includes a radiating antenna 2 and a pod 3. The radiating antenna 2 can be a helical dipole antenna as shown in Fig. 1. The radiating antenna 2 has a coupling region 4 for the pod 3. The coupling region 4 includes a helical body.

[0044] Fig. 2 shows a side view of the RFID transponder 1 which may be similar to the RFID transponder in Fig. 1. The RFID transponder 1 includes a radiating antenna 2 and a pod 3. The coupling region 4 includes a helical body and has a pitch p1. The radiating antenna 2 outside the coupling region 4 includes a helical body and has a pitch p2 or p3. The pitches p1, p2, p3 may be equal to or different from each other. The helical bodies have outer diameters D1, D2, D3, which may be equal to or different from each other. Usually, D1 is slightly larger than D3, and D3 and D2 are equal.

[0045] Figures 3 and 4 show the pod 3. The pod 3 includes a first end 5, a second end 6, and a casing 7 having a layered structure between the first end 5 and the second end 6. At least a part of the casing 7 is a dielectric material.

[0046] The casing 7 includes layers of a dielectric material such as a ceramic material. The casing includes a first layer 19, a third layer 21, and a second layer 20 between the first layer 19 and the third layer 21. Each layer can be a planar layer having a substantially constant thickness. The thickness may vary from layer to layer. There may be additional layers in addition to the layers described above. There may be at least one ceramic layer between the first layer and the second layer and / or between the second layer and the third layer. Also, there may be at least one ceramic layer above the first layer 19 and / or below the third layer 21. Figures 4 and 5 show a ceramic layer 16 on the first layer 19.

[0047] The layered structure includes a through - lead 8 between the first end 5 and the second end 6. The through - lead 8 can be a printed lead or other conductive bridge. The through - lead is formed in one of the layers. The through - lead can be formed in the second layer 20. The first conductive connection 9 and the second conductive connection 10 lie on one of the dielectric layers such as the second layer 20 shown in Figures 4 and 5.

[0048] The planar helix antenna forming the helical primary antenna 12 is present within the casing 7. The helical primary antenna 12 has a first antenna end 13 and a second antenna end 14. The third conductive connection portion 11 is configured to extend from the second antenna end 14. The first antenna end 13 is connected to the second conductive connection portion 10. The second antenna end 14 is connected to the third conductive connection portion 11. The third conductive connection portion 11 is connected to the first conductive connection portion 9 via the through hole 8. The integrated circuit 15 on the chip is coupled to the first conductive connection portion 9 and the second conductive connection portion 10. The techniques used to attach the chip 15 are direct soldering, wire bonding or flip chip soldering.

[0049] The casing includes a first row 22 of a series of first via holes 23 extending from the first layer 19 to the third layer 21. The first via holes 23 have a first end 23a and a second end 23b. Also, the casing 7 includes a second row 24 of a series of second via holes 25 extending from the first layer 19 to the third layer 21. The second via holes 25 have a first end 25a and a second end 25b. The via holes 25 of the second row 24 are at different positions in the longitudinal direction of the casing 7 compared to the via holes 23 of the first row 22.

[0050] A series of upper arms 26 connect the first end 23a of the first via hole 23 and the first end 25a of the second via hole 25, and a series of lower arms 27 connect the second end 23b of the first via hole 23 and the second end 25b of the second via hole 25. The arms 26, 27 and the via holes 23, 25 are conductive. The arms 26, 27 extend obliquely with respect to the longitudinal direction of the pod. The arms 26, 27 intersect perpendicularly to the planes of the layers 19, 20, 21 in the projection view. The arms 26, 27 can be perpendicular to each other in the projection view.

[0051] The last via hole 25L in the longitudinal direction D of the casing 7 may be in either of the columns 22, 24 and extends from the first layer 19 to the second layer 20. The second end 25Lb of the last via hole 25L and the second end 8b of the through lead 8 form the third conductive connection portion 11. The first conductive connection portion 9 extends from the first end 8a of the through lead 8 on the surface of the second layer 20. The second conductive connection portion 10 extends from the first end 23a of the first via hole 23 on the surface of the second layer 20.

[0052] Therefore, in this case, the helical primary antenna, which is a planar helix antenna, is formed as follows. There are conductive via holes 23, 25 and conductive arms 26, 27. The antenna extends by repeating a sequence from the first end 25a of the via hole 25 to the second end 25b of the via hole 25, from the second end 25b of the via hole 25 to the arm 27, from the arm 27 to the second end 23b of the via hole 23, from the second end 23b of the via hole 23 to the first end 23a of the via hole 23, from the first end 23a of the via hole 23 to the arm 26, and from the arm 26 to the first end 25a of the via hole 25. It is also possible for the sequence to start from another column, i.e., for the via hole 23 to be the first in the sequence.

[0053] The arm 26 can be formed on the front side of the first layer 19, and the arm 27 can be formed on the front side of the third layer 21. The via holes 23, 25 that extend through the first layer 19 and the second layer 20 connect the arm 26 on the first layer 21 and the arm 27 on the third layer 21.

[0054] To expose the first conductive connection portion 9 and the second conductive connection portion 10, the layers above the second layer 20, i.e., the layer 19 and the layer 16 in FIG. 4, are removed. As shown in FIGS. 8a to 8c, a cavity 28 can be formed. After the connection portions 9 and 10 are exposed, the integrated circuit (IC) 15 on the chip is coupled to the first conductive connection portion 9 and the second conductive connection portion 10. One material suitable for the antenna and the conductive connection portion is silver. The conductive connection portion can be electroplated with tin or other suitable materials. The cavity 28 can be filled with epoxy, but it is not essential in all cases.

[0055] The structure of the pad 3 can be changed with respect to the order of the layers 19, 20, 21, i.e., the positions of the layers 19, 20, 21 may be interchanged. The second layer 20 may not include the via-through 8. The via-through 8 may be on the first layer 19 or under the third layer 21. Inevitably, in such cases, it is necessary to rearrange the conductive connection portions 9, 10, 11. For example, the last via hole 25L may extend through the third layer 21 to the layer under the third layer 21 where the via-through 8 extends. It is also possible to omit the second layer 20. However, the second layer 20 between the first layer 19 and the third layer 21 is preferred to achieve the best inductance (coupling performance) for the radiating antenna 2.

[0056] The pad 3 can also be manufactured with two layers 19, 21. When the via-through 8 is on the third layer 21, the second layer 20 can be omitted. The via-through 8 can be formed on the third layer between the via holes 23, 25. The via-through 8 needs to be electrically insulated from the via holes 23, 25. Also, the above options can include at least one additional layer, such as a layer above the first layer 19 or a layer under the third layer 21.

[0057] Also, the two-layer structure can be made as follows. The second layer 20 is omitted. The upper arm 26 can be formed on the front side of the first layer 19, and the lower arm 27 can be formed on the back side of the third layer 21. The through lead 8 can be formed on the front side of the third layer 21. The via holes 23, 25 extend through the layers 19, 21 and as a result electrically connect the arms 26, 27.

[0058] The shape of the pod 3 can be a rectangular prism. A rectangular prism may have a square cross-section perpendicular to its longitudinal axis, that is, the lengths of the sides in the height direction and the depth direction may be equal.

[0059] FIG. 5 shows a side view of another pod 3. This pod 3 has the same structure as that in FIG. 4 except for the through lead 8. The pod 3 shown in FIG. 5 includes a first through lead 80a that connects the first conductive connection portion 9 and the third conductive connection portion 11, and a second through lead 80b that starts from the first antenna end 13 and continues to the second conductive connection portion 10. Therefore, there are two through leads 80a, 80b, which enables moving the conductive connection portions 9, 10 to desired locations along the second layer.

[0060] FIG. 6 shows a schematic diagram of a primary antenna 12 having one through lead 8. The structure in FIG. 6 corresponds to the structures shown in FIGS. 3 and 4. The primary antenna has a first antenna end 13 and a second antenna end 14. The second conductive connection portion 10 is in electrical contact with the first antenna end 13. The through lead 8 extends from the second antenna end 14 to the first conductive connection portion 9 and electrically connects the first conductive connection portion 9 and the second antenna end 14. The through lead 8 and the first and second conductive connection portions 9, 10 lie on one of the dielectric layers such as the second layer 20 shown in FIG. 4. The integrated circuit 15 on the chip is to be connected to the first and second conductive connection portions 9, 10.

[0061] FIG. 7 shows a schematic view of the primary antenna 12 having two through leads 80a, 80b. The structure of FIG. 7 corresponds to the structure shown in FIG. 5. The primary antenna has a first antenna end 13 and a second antenna end 14. The first through lead 80a extends from the second antenna end 14 to the first conductive connection portion 9, and electrically connects the first conductive connection portion 9 and the second antenna end 14. The second through lead 80b extends from the first antenna end 13 to the second conductive connection portion 10, and electrically connects the second conductive connection portion 10 and the first antenna end 13. Both the through leads 80a, 80b and the first and second conductive connection portions 9, 10 lie on one of the dielectric layers such as the second layer 20 shown in FIG. 5. The integrated circuit 15 on the chip is to be connected to the first and second conductive connection portions 9, 10.

[0062] FIG. 8 is a perspective schematic view of the pod 3. FIG. 8A shows the pod 3 provided with an integrated circuit near the end of the pod 3. A cylindrical cavity 28 is formed in the pod 3 to expose the first and second electrical connection portions 9, 10 so that the integrated circuit 15 can be attached thereto. The option shown in FIG. 8a can have only one through lead 8 as described in connection with FIGS. 4 and 6.

[0063] FIG. 8b shows the pod 3 provided with the integrated circuit 15 disposed in the center of the pod 3. A cylindrical cavity 28 is formed in the pod 3 to expose the first and second electrical connection portions 9, 10 so that the integrated circuit 15 can be attached thereto. The option shown in FIG. 8b can have two through leads 80a, 80b as described in connection with FIGS. 5 and 7.

[0064] FIG. 8c shows the pod 3 provided with the integrated circuit 15 in the center of the pod 3. A cubic cavity 28 is formed in the pod 3 to expose the first and second electrical connection portions 9, 10 so that the integrated circuit can be attached thereto. The option shown in FIG. 6c can have two through leads 80a, 80b as described in connection with FIG. 5.

[0065] FIG. 9 shows the radiating antenna 2 from above. The radiating antenna 2 is a folded planar antenna that can be used in place of the helical radiating antenna 2 shown in FIGS. 1 and 2. The radiating antenna 2 has a coupling region 4 for the pod 3. The coupling region 4 includes a helical body, but otherwise the antenna is planar, that is, it spreads in a two-dimensional plane. Also, FIG. 9 shows the pitches p1 and p2 associated with the folded planar antenna.

[0066] FIGS. 10 and 11 show the principle outside the coupling region 4 of the folded planar antenna of FIG. 9. The outside of the coupling region 4 of the folded planar antenna of FIG. 9 shows a circular contour. Each circle is arranged in two parallel rows at regular intervals such that every other circle is in the first row and every other circle is in the second row. Each circle has a radius r. The distance a is the distance between the midpoints of the circles in the first and second rows. The distance b is the distance between the midpoints of consecutive circles in the longitudinal direction L of the antenna. By changing at least one of the radius r, the distance a, or the distance b, different antenna shapes can be realized.

[0067] FIGS. 12 and 13 show the pod 3. The pod 3 includes a first end 5, a second end 6, and a casing 7 having a layered structure between the first end 5 and the second end 6. At least a part of the casing 7 is a dielectric material.

[0068] The layered structure includes a through - lead 8 between the first end 5 and the second end 6. The through - lead 8 can be a printed lead or other electrically conductive bridge. The first end 5 of the casing includes a first conductive connection 9 and a second conductive connection 10.

[0069] A helical primary antenna 12, such as a planar helix antenna, is present within the casing 7. The helical primary antenna 12 has a first antenna end 13 and a second antenna end 14. A third conductive connection 11 is configured to extend from the second antenna end 14. The first antenna end 13 is connected to the second conductive connection 10. The second antenna end 14 is connected to the third conductive connection 11. The third conductive connection 11 is connected to the first conductive connection 9 via a through-hole 8. The integrated circuit 15 on the chip is coupled to the first conductive connection 9 and the second conductive connection 10. The technique used for mounting the chip 15 is direct soldering or wire bonding. An example of the first end 5 is shown in FIG. 14.

[0070] The casing 7 includes a layer of a dielectric material such as a ceramic material. The casing includes a first layer 19, a third layer 21, and a second layer 20 between the first layer 19 and the third layer 21. Each layer can be a planar layer having a substantially constant thickness. The thickness may vary from layer to layer. In addition to the layers described above, additional layers may be present. There may be at least one ceramic layer between the first layer and the second layer and / or between the second layer and the third layer. Also, there may be at least one ceramic layer above the first layer 19 and / or below the third layer 21. FIG. 13 shows a ceramic layer 16 on the first layer 19.

[0071] The casing includes a first row 22 of a series of first via holes 23 extending from the first layer 19 to the third layer 21. The first via hole 23 has a first end 23a and a second end 23b. Also, the casing 7 includes a second row 24 of a series of second via holes 25 extending from the first layer 19 to the third layer 21. The second via hole 25 has a first end 25a and a second end 25b. The via holes 25 in the second row 24 are at different positions in the longitudinal direction of the casing 7 compared to the via holes 23 in the first row 22.

[0072] A series of upper arms 26 connect the first end 23a of the first via hole 23 and the first end 25a of the second via hole 25, and a series of lower arms 27 connect the second end 23b of the first via hole 23 and the second end 25b of the second via hole 25. The arms 26, 27 and the via holes 23, 25 are conductive. The arms 26, 27 extend obliquely with respect to the longitudinal direction of the pod. The arms 26, 27 intersect perpendicularly to the planes of the layers 19, 20, 21 in the projection view. The arms 26, 27 can be perpendicular to each other in the projection view.

[0073] The last via hole 25L in the longitudinal direction D of the casing 7 can be in either of the columns 22, 24 and extends from the first layer 19 to the second layer 20. The second end 25Lb of the last via hole 25L and the second end 8b of the through lead 8 form a third conductive connection portion 11. The first conductive connection portion 9 extends from the first end 8a of the through lead 8 towards the first end 5 of the pod 3. The second conductive connection portion 10 extends from the first end 23a of the first via hole 23 towards the first end 5 of the pod 3. An integrated circuit (IC) 15 on a chip disposed at the first end 5 of the pod 3 is coupled to the first conductive connection portion 9 and the second conductive connection portion 10. One of the materials suitable for the antenna and the conductive connection portion is silver. The conductive connection portion can be electroplated with tin or other suitable materials.

[0074] Therefore, in this case, the helical primary antenna, which is a planar helix antenna, is formed as follows according to the second embodiment. There are conductive via holes 23, 25 and conductive arms 26, 27. The antenna extends by repeating the sequence from the first end 25a of the via hole 25 to the second end 25b of the via hole 25, from the second end 25b of the via hole 25 to the arm 27, from the arm 27 to the second end 23b of the via hole 23, from the second end 23b of the via hole 23 to the first end 23a of the via hole 23, from the first end 23a of the via hole 23 to the arm 26, and from the arm 26 to the first end 25a of the via hole 25. It is also possible for the sequence to start from another row, that is, for the via hole 23 to be the first in the sequence.

[0075] The structure of the pod 3 can be changed with respect to the order of the layers 19, 20, 21, that is, the positions of the layers 19, 20, 21 may be interchanged. The second layer 20 may not include the through - lead 8. The through - lead 8 may be on the first layer 19 or under the third layer 21. Inevitably, in such cases, it is necessary to relocate the conductive connections 9, 10, 11. For example, the last via hole 25L may penetrate the third layer 21 and extend to the layer under the third layer 21 where the through - lead 8 extends. Also, the second layer 20 can be omitted. However, the second layer 20 between the first layer 19 and the third layer 21 is preferred to achieve the best inductance (coupling performance) for the radiating antenna 2.

[0076] The pod 3 can also be manufactured with two layers 19, 21. When the through - lead 8 is on the third layer 21, the second layer 20 can be omitted. The through - lead 8 can be formed on the third layer between the via holes 23, 25. The through - lead 8 needs to be electrically insulated from the via holes 23, 25. The above options can also include at least one additional layer, such as a layer above the first layer 19 or a layer under the third layer 21.

[0077] The structure can also be changed with respect to the arrangement of the chip 15. Instead of being arranged at the first end 5 of the pod 3, the chip 15 can be arranged at any location on the outer surface of the pod 3. The conductive connections 9, 10, 11 need to be rearranged as appropriate. However, the first end 5 of the pod 3 is a preferred option.

[0078] The preferred shape of the pod 3 is a rectangular parallelepiped. A rectangular parallelepiped may have a square cross section perpendicular to its longitudinal axis, that is, the side lengths in the height direction and the depth direction may be equal.

[0079] FIG. 15 shows a schematic view of the panel 29. The panel 29 includes a series of and / or parallel pods 3 that are cut after other phases of manufacturing are completed.

[0080] FIG. 16 shows a side view of the pod 3 including a printed circuit board (PCB) core and prepregs as the first and second dielectric layers 19, 20. The technical content disclosed in relation to the pod including the ceramic layer can be directly applied to the pod in FIG. 16 within an appropriate range.

[0081] The PCB core has an upper surface 19a and a lower surface 19b. The prepreg 20 has an upper surface and a lower surface 20a, 20b.

[0082] Via holes 23, 25 are drilled through the layers 19, 20. An upper arm 26 is formed on the upper surface 19a of the PCB core 19. A lower arm 27 is formed on the lower surface 20b of the prepreg 20. A lead-through 8 is formed on the lower surface 19b of the PCB core 19. The integrated circuit 15 on the chip is connected to the first conductive connection 9 and the second conductive connection 10.

[0083] The pod 3 according to FIG. 16 is separated from the panel 29 including a series of and / or parallel pods 3 as shown in FIG. 15. Each pod 3 of the panel 29 is manufactured simultaneously. Each pod 3 can be manufactured as follows.

[0084] The dielectric PCB core 19 has conductive layers on both sides 19a and 19b. The conductive layer can be made of copper. A photoresist dry film containing a circuit pattern is laminated onto both conductive layers 19a, 19b by heat. Subsequently, the film is removed, but the circuit pattern remains on the conductive layer. That is, the circuit pattern on the upper surface 19a of the first layer 19 constitutes the pattern of the upper arm 26, and the circuit pattern on the lower surface 19b of the first layer 19 constitutes the pattern of the via 8. The conductive layer is etched so that only the circuit pattern remains on the upper and lower surfaces 19a, 19b. A cavity 28 is formed by opening a hole in the PCB core 19. The cavity 28 exposes the first conductive connection portion 9 and the second conductive connection portion 10 so that the chip 15 can be attached.

[0085] The prepreg 20 is laminated onto the PCB core 20 so that the lower surface 19b of the first layer 19 contacts the upper surface 20a of the second layer 20. A foil of a conductive material such as copper is laminated on the lower surface 20b of the prepreg 20. The foil can be attached by a vacuum lamination press.

[0086] Thereafter, via holes 23, 25 are formed. The via holes 23, 25 can be formed by a CNC PCB drilling machine. The via holes 23, 25 are electroplated to be conductive.

[0087] A photoresist dry film containing a circuit pattern is laminated onto the lower surface 20b of the prepreg 20 by heat. Subsequently, the film is removed, but the circuit pattern remains on the conductive foil. That is, the circuit pattern on the lower surface 20b of the second layer 20 constitutes the pattern of the lower arm 27. The conductive foil is etched so that only the circuit pattern remains on the lower surface 20b. Solder mask layers 30, 31 are applied onto the upper surface 19a of the first layer 19 and the lower surface 20b of the second layer 20 to protect the upper and lower surfaces of the pad 3.

[0088] The integrated circuit on the chip 15 is fixed in the cavity 28 using a die attach adhesive. The first conductive connection 9 and the second conductive connection 10 are connected to the respective pads of the chip 15 by wire bonding. Thereafter, the cavity 28 can be filled with a resin such as an epoxy that protects the chip 15.

[0089] With the progress of technology, it will be apparent to those skilled in the art that the concept of the present invention can be implemented in various ways. The present invention and its embodiments are not limited to the examples described above and may vary within the scope of the claims.

Explanation of Reference Numerals

[0090] 1 RFID transponder 2 Radiation antenna 3 Pad 4 Coupling region 5 First end 6 Second end 7 Casing 8, 80a, 80b Through-hole 9 First conductive connection 10 Second conductive connection 12 Helical primary antenna 13 First antenna end 14 Second antenna end 15 Integrated circuit

Claims

1. An RFID transponder (1) comprising a radiating antenna (2) and a pod (3), wherein the radiating antenna (2) has a coupling region (4) for the pod (3), the pod (3) is located in the coupling region (4), and the pod (3) comprises a first end (5) and a second end (6), and a casing (7) between the first end (5) and the second end (6), at least a part of the casing (7) comprising a dielectric layer, a planar helix antenna forming a helical primary antenna (12) is configured to extend between the first end (5) and the second end (6), the planar helix antenna has a first antenna end (13) and a second antenna end (14), the first antenna end (13) is connected to a second conductive connection (10), and the second antenna end (14) is connected to a first conductive connection (9), an integrated circuit (15) on a chip is coupled inside the pod (3) to the first conductive connection (9) and the second conductive connection (10), at least one of the first conductive connection (9) or the second conductive connection (10) is electrically connected to the respective antenna end (13, 14) via a lead-through (8, 80a, 80b), the radiating antenna (2) and the primary antenna (12) are configured to be coupled without physical contact. An RFID transponder.

2. The RFID transponder according to claim 1, wherein the radiating antenna (2) and the primary antenna (12) are configured to be coupled by inductive coupling.

3. The RFID transponder according to claim 1 or 2, wherein the radiating antenna (2) is a three-dimensional helical antenna.

4. The RFID transponder according to any one of claims 1 to 3, wherein the radiating antenna (2) is a folded planar antenna.

5. The RFID transponder according to any one of claims 1 to 4, wherein the radiating antenna (2) comprises a helical coupling region (4).

6. The RFID transponder according to any one of claims 1 to 5, wherein the pod (3) is inside the helical coupling region (4).

7. A pod (3) for an RFID transponder (1), A first end portion (5), a second end portion (6), and a casing (7) between the first end portion (5) and the second end portion (6), at least a part of the casing (7) including a dielectric layer. A planar helix antenna forming a helical primary antenna (12) is configured to extend between the first end portion (5) and the second end portion (6). The planar helix antenna has a first antenna end portion (13) and a second antenna end portion (14). The first antenna end portion (13) is connected to a second conductive connection portion (10), and the second antenna end portion (14) is connected to a first conductive connection portion (9). An integrated circuit (15) on a chip is coupled inside the pod (3) to the first conductive connection portion (9) and the second conductive connection portion (10). A pod in which at least one of the first conductive connection portion (9) or the second conductive connection portion (10) is electrically connected to respective antenna end portions (13, 14) via through leads (8, 80a, 80b).

8. The pod according to claim 7, wherein the first conductive connection portion (9) is electrically connected to the first antenna end portion (13) via a through lead (8).

9. The pod according to claim 7, wherein the second conductive connection portion (10) is electrically connected to the second antenna end portion (14) via a through lead (8).

10. The pod according to claim 7, wherein the first conductive connection portion (9) is electrically connected to the first antenna end portion (13) via a through lead (80b), and the second conductive connection portion (10) is electrically connected to the second antenna end portion (14) via a through lead (80a).

11. The pod according to any one of claims 7 to 10, wherein the through leads (8, 80a, 80b) are on one of the dielectric layers.

12. The pod according to any one of claims 7 to 11, wherein the planar helix antenna includes via holes (23, 25) and arms (26, 27).

13. The pod according to any one of claims 7 to 12, wherein the through leads (8, 80a, 80b) are printed leads.

14. The pod (3) according to any one of claims 7 to 13, comprising a cavity (28) for the integrated circuit on the chip (15).

15. A method of manufacturing a panel (29) including a pod (3), comprising the steps of opening via holes (23, 25) in dielectric layers (19, 20, 21), rendering the via holes (23, 25) conductive, forming arms (26, 27), through leads (8, 80a, 80b) and first and second conductive connection parts (9, 10) on the dielectric layers (19, 20, 21), stacking the dielectric layers (19, 20, 21), attaching an integrated circuit on a chip (15) to the first and second conductive connection parts (9, 10) such that the chip (15) remains inside the pod (3), cutting the panel into individual pods (3), and a method including the above steps.

16. The method according to claim 15, including forming a blank of a layer containing ceramic particles mixed with at least one polymer binder.

17. The method according to claim 15 or 16, including firing at a temperature below 1000 °C to burn the polymer binder and sinter the ceramic particles together.

18. The method according to any one of claims 15 to 17, including forming a cavity (28) to expose the first and second conductive connection parts (9, 10).

19. The method according to claim 18, including filling the cavity (28) with a dielectric resin.

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