Digital Signature

Abstract

The logic circuit package includes an interface for communicating with a host and logic circuitry. The logic circuitry includes a memory arrangement for storing digital signature metadata to facilitate verification of associated signed data. The digital signature metadata includes a schema identifier field for storing a schema version number, a key identifier field for storing an identifier of a signing key, a plurality of data block address fields for storing addresses corresponding to each data block of a plurality of data blocks, and a plurality of data block length fields corresponding to the plurality of data blocks, each data block length field storing data indicating a length of the corresponding data block. The logic circuitry is configured to receive a read request from the host and to transmit the digital signature metadata to the host in response to the read request.

Description

[Background technology]

[0001] The subcomponents of the device can communicate with each other in several ways, for example, using the Serial Peripheral Interface (SPI) protocol, Bluetooth Low Energy (BLE), Near Field Communication (NFC), or other types of digital or analog communication.

[0002] Some two-dimensional (2D) and three-dimensional (3D) printing systems include one or more replaceable printing device components, such as print material reservoirs (e.g., inkjet cartridges, toner cartridges, ink supplies, 3D printing agent supplies, build material supplies, etc.), inkjet printhead assemblies, etc. In some examples, logic circuitry associated with the replaceable printing device component(s) communicates with logic circuitry of the printing device in which they are installed, conveying information such as their identity, capabilities, status, etc. Similarly, other communication systems use logic circuitry to connect to host logic circuitry, common examples of which include network communication systems, life science applications, the automotive industry, the Internet of Things, etc.

[0003] Many instances of logic circuits include digital signatures that contain signed data. The data may be generated and signed at the time of manufacture. The signature can be verified by the host or controller, which can then assume that the signed data represents trusted data originating, for example, from the original equipment manufacturer or other trusted / authorized party. [Brief explanation of the drawings]

[0004] [Figure 1] 1 illustrates an example of a printing system. [Figure 2] 1 illustrates an example of a replaceable printing device component. [Figure 3] 1 shows an example of a printing device. [Figure 4]1 shows an example of a replaceable print cartridge. [Figure 5A] 1 illustrates an exemplary memory layout. [Figure 5B] 1 illustrates an exemplary memory layout. [Figure 6A] 1 illustrates exemplary digital signature metadata. [Figure 6B] 1 illustrates exemplary digital signature metadata. [Figure 7A] 1 is a flow diagram illustrating an exemplary method that may be performed by a logic circuit. [Figure 7B] 1 is a flow diagram illustrating an exemplary method that may be performed by a logic circuit. [Figure 7C] 1 is a flow diagram illustrating an exemplary method that may be performed by a logic circuit. [Figure 7D] 1 is a flow diagram illustrating an exemplary method that may be performed by a logic circuit. [Figure 8A] FIG. 1 is a block diagram illustrating an example of a processing system for provisioning logic circuit packages. [Figure 8B] FIG. 1 is a block diagram illustrating an example of a processing system for provisioning logic circuit packages. [Figure 9] FIG. 1 is a block diagram illustrating an example of a signature hierarchy for a logic circuit package. [Figure 10] 1 shows an example of a consumable cartridge. [Figure 11A] 10 illustrates another exemplary memory layout. [Figure 11B] 10 illustrates another exemplary memory layout. [Figure 12A] 10 shows exemplary attribute data for a manufacturing digital signature. [Figure 12B] 10 shows exemplary attribute data for a manufacturing digital signature. [Figure 13] 10 shows an example of instruction data for a manufacturing digital signature. [Figure 14] 10 is a flow diagram illustrating another exemplary method that may be performed by a logic circuit. [Figure 15] 10 is a flow diagram illustrating another exemplary method that may be performed by a logic circuit. [Figure 16] 1 is a flow diagram illustrating an example of a method for provisioning a logic circuit package with a memory location. [Figure 17A] 10 illustrates another exemplary memory layout. [Figure 17B] 10 illustrates another exemplary memory layout. [Figure 18A] 1 illustrates exemplary part number signature metadata. [Figure 18B] 1 illustrates exemplary part number signature metadata. [Figure 19A] 10 is a flow chart illustrating another exemplary method that may be performed by a logic circuit. [Figure 19B] 10 is a flow chart illustrating another exemplary method that may be performed by a logic circuit. [Figure 19C] 10 is a flow chart illustrating another exemplary method that may be performed by a logic circuit. [Figure 20A] FIG. 2 is a block diagram illustrating another example of a processing system for provisioning logic circuit packages. [Figure 20B] FIG. 2 is a block diagram illustrating another example of a processing system for provisioning logic circuit packages. [Figure 21A] 10 illustrates another exemplary memory layout. [Figure 21B] 10 illustrates another exemplary memory layout. [Figure 22] 10 is a flow diagram illustrating another exemplary method that may be performed by a logic circuit. DETAILED DESCRIPTION OF THE INVENTION

[0005] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and which show, by way of illustration, specific examples in which the present disclosure may be practiced. It is to be understood that other examples may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims. It is to be understood that each individual feature or combination of features of the various examples described herein can be combined, in part or in whole, with each other, with each individual feature or combination of features.

[0006] Some example applications described herein relate to printing devices, however, not all examples are limited to such applications and at least some of the principles described herein may be used in other contexts, including but not limited to other communication systems, network communication systems, life science applications, the automotive industry, the Internet of Things, beverages, etc.

[0007] Certain unauthorized third parties attempt to reverse engineer original equipment manufacturer (OEM) or other authorized party parts to connect to the OEM's or other authorized party's devices. Authorized parties, which may also be referred to as trusted parties, include parties in the authorized chain, which may include OEMs, suppliers, developers, etc., authorized by intellectual property rights or otherwise associated with these parts and devices, and unauthorized third parties may be third parties, without a pre-authorized relationship with the authorized parties, who attempt to at least partially copy the original logic of these authorized parties in order to connect to the OEM's or other authorized party's host devices.

[0008] In one practical example, the logic circuitry can include a microcontroller attached to or configured to be attached to the consumable cartridge, and the host printing device logic circuitry can include a printer controller and / or printer microcontroller. In this disclosure, the host logic circuitry may be any host-side microcontroller, controller, application-specific integrated circuit (ASIC), etc. The host logic circuitry may also be referred to simply as a "host," although the "logic circuitry" itself should refer to the component-side logic circuitry, not the host. Furthermore, the principles described in this disclosure may be applied to any two opposing communicating devices, for example, without the need for a host-to-component relationship and without any hierarchical implication. Thus, throughout this disclosure, "host" may be substituted for "controller." A controller may include a system component, host, supply device, computer, printer, etc. A host or controller may include an opposing microcontroller and / or firmware that communicates with the logic circuitry of the present disclosure. In a host printing device, the host-printing device logic circuitry can instruct the logic circuitry of a replaceable print supply component. In other examples, it is not excluded that the logic circuitry of the present disclosure can instruct the opposing controller or host. Thus, the host may include any controller or other logic circuitry.

[0009] A host or controller may be developed to only accept consumables (e.g., cartridges, containers, etc.) that contain keys, attributes, and data from a trusted party (e.g., an OEM). To address this, as disclosed herein, digital signatures are provided for selected attributes and data. The digital signature is generated using a private key and written to the consumable. Firmware in the host can store (or access) the corresponding public key to verify the digital signature. If the digital signature verification is successful, the keys, attributes, and data are authentic, and the consumable may be accepted and used by the host. If the digital signature verification is not successful, the keys, attributes, or data are not authentic, and the consumable may be rejected by the host. As used herein, the term “signature” refers to a “digital signature,” and “signature” and “digital signature” may be used interchangeably. The digital signatures disclosed herein may be directly signed over selected attributes and / or data, indirectly signed over selected attributes and / or data, for example, over a hash of the selected attributes and / or data, or a combination thereof.

[0010] To enable verification of the digital signature by a host, the consumable can indicate which attributes and data were used to generate the digital signature. In one example, a flexible and extensible schema for specifying the data over which a digital signature is calculated is disclosed herein. The data may include a certificate, such as a custom certificate format that does not otherwise include authentication means. The schema disclosed herein allows for verification that selected keys, attributes, and data related to the consumable are authentic, or at least developed by a party with access to a private key associated with the digital signature and / or schema. The private key may contain trade secrets, etc., and the party with access to the private key may be an authorized party. The digital signature can compel unauthorized manufacturers to create copies of complete attribute and data sets from genuine consumables instead of using non-genuine attributes, data, or combinations. For example, the digital signature can make it easier to identify and / or alert customers to the presence of non-genuine consumables, for example, via a host or server or otherwise. A flexible and extensible method for specifying the attributes and data included in a digital signature can conserve memory on the consumable and enable an easier and more efficient process for signature verification. For example, a single digital signature can be used to certify multiple OEM-proprietary certificates. The digital signature schemes and aspects addressed in this disclosure may be applied to different types of digital circuits, including any computing or processing device, for example, at any type of interconnection facility, directly physically and / or over any type of network.

[0011] As noted above, the logic package may be associated with a printing device component, such as a cartridge or container, and the host logic may be associated with the host printing device to which the component is connected. In other examples, the logic need not be associated with the printing component or the host printing device; the host may be replaced by any type of controller that is not necessarily in a host-to-component relationship. The logic package and controller may be used in conjunction with any microelectromechanical system, lab-on-a-chip, mobile computing device, and / or life sciences application. A wide range of applications require a logic package, such as a microcontroller, to securely connect physically and / or communicatively to a host. The logic package may connect to any type of host, for example, any computing system, server, vehicle system, home appliance, access control system, etc. While many examples of this disclosure include logic packages and logic for printing device components for connecting to host printing device logic, the features of the logic package may be applied outside the field of printing, alone or in conjunction with any component, to connect to any type of host logic that is not necessarily associated with a printing device component or printing device, respectively. Thus, when this disclosure refers to a printing device and a printing device component (or cartridge or receptacle), etc., the device can be any device, and the component can be any component. Examples of this disclosure enable host logic to securely identify and authenticate the logic.

[0012] In a particular example, an integrated circuit (IC) is used. 2The I2C (Inter-C or IC) protocol allows at least one "reader" (commonly called a "master") integrated circuit (IC) to communicate with at least one "follower" (commonly called a "slave") IC, e.g., via a bus. I2C and other communication protocols communicate data according to clock periods. For example, a voltage signal can be generated, and the value of the voltage is associated with the data. For example, a voltage value above X volts can indicate a logic "1," and a voltage value below Y volts can indicate a logic "0," where X and Y are predetermined numeric values and Y is less than or equal to X. By generating appropriate voltages in each of a series of clock periods, data can be communicated over a bus or another communication link. Specific examples of the present disclosure relate to follower or slave logic. In other examples, there need not be a master-slave or leader-follower or host-component relationship, whereby logic circuits (e.g., microcontrollers) communicating with each other can both receive and respond to commands.

[0013] In at least some examples, multiple logic circuit packages (each of which may be associated with a different replaceable printing device component or container) can be connected to the I2C bus. A particular exemplary printing material container has follower logic utilizing I2C communication, although other examples may use other forms of digital or analog communication. In examples of I2C communication, a reader IC may generally be provided as part of the printing device (sometimes referred to as the “host”), and the replaceable printing device component comprises the “follower” IC, although this need not be the case in all examples. There may be multiple follower ICs connected to the I2C communication link or bus (e.g., containers of different color printing agents). The addresses of the logic circuit packages may be I2C compatible addresses (hereinafter, I2C addresses), for example, according to the I2C protocol, to facilitate directing communication between the reader and follower according to the I2C protocol. The follower IC(s) may include a processor that performs data operations before responding to requests from the printing system logic. In certain examples, the disclosed follower ICs or logic circuit packages may be connected to or integrated with any printing device component that may be connected to or integrated with a printing device. For example, the disclosed logic circuit packages or follower ICs may be connected to non-interchangeable printing device components. In other examples, other forms of digital and / or analog communication besides I2C may be used.

[0014] Communication between the printing device and replaceable printing device components installed within the device (and / or their respective logic circuits) can facilitate a variety of functions. Logic circuitry within the printing device can receive information from logic circuitry associated with the replaceable printing device components via a communications interface and / or can send commands to the replaceable printing device component logic circuitry, which can include commands to write data to or read data from memory associated therewith.

[0015] In at least some of the examples described below, a logic circuit package is described that may be associated with a replaceable printing device component, e.g., mounted internally or externally, e.g., at least partially mounted within a housing, and that is adapted to communicate data with a printing device controller via a bus provided as part of the printing device.

[0016] As used herein, a "logic circuit package" refers to a single logic circuit or multiple logic circuits that may be interconnected or communicatively linked to each other. When two or more logic circuits are provided, they may be encapsulated as a single unit, encapsulated separately, unencapsulated, or some combination thereof. The package may be disposed or provided on a single substrate or multiple substrates. In some examples, the package may be directly attached to the cartridge wall. In some examples, the package may include an interface, including, for example, pads or pins. The package interface may be intended to connect to a communication interface of a printing device component that connects to the printing device logic, or the package interface may connect directly to the printing device logic. An exemplary package may be configured to communicate via a serial bus interface. When two or more logic circuits are provided, these logic circuits may be connected to each other or to an interface to communicate via the same interface.

[0017] In some examples, each logic circuit package includes at least one processor and memory. In one example, the logic circuit package may be or function as a microcontroller or a secure microcontroller. In use, the logic circuit package may be attached to or integrated with a replaceable printing device component, such as a replaceable printing consumable (e.g., ink, toner) cartridge. Alternatively, the logic circuit package may be referred to as a logic circuit assembly, or simply as a logic circuit or processing circuit.

[0018] In certain examples of the present disclosure, package or packaging refers to the final assembly result of a logic circuit or integrated circuit assembly process, i.e., essentially the final form of the processing circuit hardware itself. A logic circuit package may be a final product for shipment and sale and use with a host logic circuit in the field, or it may be an intermediate product that may require further customization or personalization or writing steps, further assembly, and / or further attachment or connection to another (e.g., printed) component or circuit. In a relatively dressed-down form, the package may be a substrate with a thin film layer without further protection. In other examples, the package may comprise at least one circuit at least partially protected by an encapsulating or molding material and / or supported by a substrate (e.g., PCB) and / or flexible film and / or molded plastic part, such as a print cartridge. In certain cases, the logic circuit is substantially surrounded by protective and / or insulating material, except for electrodes connecting the logic circuit to a host and / or other logic circuits. All of these cases, and more, can refer to a package. While "package" can include logic circuit packaging, it should not be confused with the industry term "packaging."

[0019] In some examples, the logic package can respond to various types of requests (or commands) from the host (e.g., printing device) logic. Requests include, for example, a read request to read data from a general-purpose memory, a query attribute request to read attributes from an attribute storage memory, and / or a start session request to initiate an authenticated communication session using a key stored in a key storage memory. A request is a type of command.

[0020] 1 illustrates an example of a printing system 100. The printing system 100 includes a printing device 102 that communicates with logic circuitry associated with replaceable printing device components 104 via a communication link 106. In some examples, the communication link 106 may include an I2C-compatible bus (hereinafter an I2C bus). For clarity, the replaceable printing device components 104 are shown as external to the printing device 102, although in some examples the replaceable printing device components 104 may be temporarily installed or permanently housed within the printing device.

[0021] The replaceable printing device component 104 can include, for example, a printing material reservoir or cartridge (which can be a build material reservoir for 3D printing, a liquid or dry toner reservoir for 2D printing, or an ink or liquid printing agent reservoir for 2D or 3D printing), and in some examples, can include a print head or other dispensing or transfer component. The printing material can also be a consumable printing material that is consumed by dispensing or transfer. In this disclosure, printing material, printing consumables, or consumable printing materials can be the same thing, examples of which are shown in parentheses above. The replaceable printing device component 104 can contain, for example, a consumable resource of the printing device 102, or a component that is likely to have a lifespan that is shorter (and in some examples, significantly shorter) than the lifespan of the printing device 102. Furthermore, while a single replaceable printing device component 104 is shown in this example, in other examples, there can be multiple replaceable printing device components, including, for example, different color printing agent reservoirs, print heads (which may be integral with the reservoirs), etc. In other examples, printing device components 104 can include service components that are replaced, for example, by service personnel, examples of which can include a printhead, a toner process cartridge, or a logic circuit package alone for attaching to a corresponding printing device component and communicating with a compatible printing device logic circuit. In other examples, the logic circuitry of the present disclosure can be communicatively connected to devices other than printing devices.

[0022] 2 illustrates an example of an interchangeable printing device component 200 that can provide the interchangeable printing device component 104 of FIG. 1. The interchangeable printing device component 200 includes a data interface 202 and a logic circuit package 204. When the interchangeable printing device component 200 is in use, the logic circuit package 204 decodes data received via the data interface 202. The logic circuit may perform other functions described below. The data interface 202 may include an I2C or other interface. In certain examples, the data interface 202 may be part of the same package as the logic circuit package 204.

[0023] In some examples, logic package 204 may be further configured to encode data for transmission over data interface 202. In some examples, more than one data interface 202 may be provided. In some examples, logic package 204 may be configured to function as a "follower" in I2C communications.

[0024] 3 illustrates an example of a printing device 300. The printing device 300 may implement the printing device 102 of FIG. 1. The printing device 300 may also host replaceable components. The printing device 300 includes an interface 302 for communication between replaceable printing device components and printing device logic 304, such as a controller. In some examples, the interface 302 is an I2C interface.

[0025] In some examples, printing device logic 304 may be configured to function as a host or reader in an I2C communication. Printing device logic 304 can generate and send commands to at least one interchangeable printing device component 200, receive responses therefrom, and decode the responses received therefrom. In other examples, printing device logic 304 can communicate with logic package 204 using any form of digital or analog communication.

[0026] The printing device 102, 300 and the replaceable printing device components 104, 200, and / or their logic circuits may be manufactured and / or sold separately. In one example, a user may acquire a printing device 102, 300 and keep it for several years. Even if the same version of the device 102, 300 is no longer commercially available, the same device continues to be used for printing in homes and offices. In contrast, for several years after the device 102, 300 can no longer be purchased, the replaceable printing device components 104, 200 can still be purchased to facilitate printing with the device 102, 300. The printing device component logic circuits may be upgraded over the years, for example, to be compatible with newer versions of the printing device. The same upgraded printing device component logic circuits may be backward compatible with older versions of the printing device, so that they are compatible with a wide variety of printing devices, including both older and newer versions. It may be advantageous for original equipment manufacturers (OEMs) to manufacture printing device component logic that is compatible with a wide variety of printing devices 102, 300, for example, to avoid having to support multiple hardware versions and to avoid a proliferation of stock keeping units (SKUs) for printing device component logic. Thus, there may be at least some degree of forward and / or backward compatibility between printing devices 102, 300 and interchangeable printing device components 104, 200.

[0027] FIG. 4 illustrates an example of a replaceable print cartridge 400, such as a printing consumable cartridge. The print cartridge 400 can provide the replaceable printing device component 104 of FIG. 1 or the replaceable printing device component 200 of FIG. 2. The print cartridge 400 includes a logic circuit package 402 that includes logic circuitry 404 and an interface 408. In some examples, the interface 408 is an I2C interface. The logic circuitry 404 includes a memory arrangement 406. Additionally, the print cartridge 400 includes a reservoir 410 for holding consumable materials and an output 412 for ejecting the consumable materials. The consumable materials can include ink, dry toner, liquid toner, 3D printing agents (e.g., print enhancers, print suppressors, build powders such as plastic or metal powders), or another suitable consumable outside the printing field.

[0028] The logic circuit package 402 may be associated with the replaceable print cartridge 400, or in some examples, attached to and / or at least partially incorporated therein. The logic circuit 404 is communicatively coupled to a memory arrangement 406. The memory arrangement 406 may include a single or multiple memory devices and may include any one or any combination of volatile memory (e.g., dynamic random access memory (DRAM), static random access memory (SRAM), registers, etc.) and non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash, erasable programmable read-only memory (EPROM), memristors, etc.). In some examples, as described in more detail below with reference to FIGS. 5A-6B , the memory arrangement 406 stores digital signatures and digital signature metadata corresponding to the digital signatures. The logic circuit 402 may be configured to verify the authenticity of logic selection data and / or attributes in response to a request from the host printing device logic, as described in more detail below. If the selected data and / or attributes of logic circuit 402 are verified as authentic, replaceable print cartridge 400 may be used by the host printing device.

[0029] The exemplary logic circuit disclosed herein can provide a flexible digital signature scheme, allowing manufacturers or suppliers to associate different amounts and types of data with the schema's digital signatures for the same controller or host that verifies the digital signatures. Thus, a single host controller can verify different digital signatures and different amounts and / or types of data associated with the digital signatures. At the same time, it can be difficult for unauthorized third parties to tamper with the signed data. In other examples, the designated data and digital signature metadata (discussed below) can occupy a relatively small amount of data space. In yet other examples, the designated data, digital signature metadata, and digital signature may be copied by an unauthorized third party, and the copied designated data, metadata, and digital signature may appear to be authorized data. In one practical example, the logic circuit can include a microcontroller attached to or configured to be attached to a consumable cartridge, and the printing device logic circuit can include a printer controller and / or printer microcontroller.

[0030] FIG. 5A illustrates an example of memory arrangement 406a. In some examples, memory arrangement 406a may be an example of memory arrangement 406 of FIG. 4. Memory arrangement 406a stores digital signature metadata 500 (also referred to herein as perso-signature metadata) and a digital signature 502 (also referred to herein as perso-signature) corresponding to digital signature metadata 500. As described in more detail below with reference to FIG. 10, digital signature metadata 500 and digital signature 502 may be stored in a general-purpose memory portion of the memory arrangement accessible for read and write operations, for example, by a controller of a host. Digital signature metadata 500 is used to facilitate verification of digital signature 502 (e.g., associated signed data) by the host. Digital signature metadata 500 may vary and is defined in more detail below with reference to FIGS. 6A and 6B. Digital signature metadata 500 specifies the data used to calculate digital signature 502. Digital signature 502 is calculated using data corresponding to digital signature metadata 500 and a private key corresponding to a public key stored by or stored and accessible by the host. The calculation of digital signature 502 is described in more detail below with reference to Figures 8A and 8B. To verify that the logic circuit is authentic, the host can read digital signature metadata 500 and digital signature 502. The host can then use the data specified by digital signature metadata 500 to verify digital signature 502.

[0031] FIG. 5B illustrates another example of memory arrangement 406b. In some examples, memory arrangement 406b may be another example of memory arrangement 406 of FIG. 4. Memory arrangement 406b stores digital signature metadata 500 and digital signature 502 corresponding to digital signature metadata 500, as previously described and illustrated with reference to FIG. 5A. Additionally, memory arrangement 406b also stores partition map 504, logic circuit identifier 506, designation data 508 (also referred to herein as perso-signature designation data), and other data 510. As described in more detail below with reference to FIG. 10, partition map 504 and logic circuit identifier 506 may be stored in an attribute memory portion of the memory arrangement, which may be configured to be accessed for read operations but not for write operations by the host. Examples of such partition maps 504 are disclosed in U.S. Pat. No. 8,205,976 or International Patent Application No. PCT / US2021 / 020262. Additionally, the designated data 508 and other data 510 may be stored in a general purpose memory portion of the memory arrangement that is accessible for read and write operations by the host.

[0032] The partition map 504 includes metadata defining partitions of the memory arrangement 406b, such as partitions of the general-purpose memory portion of the memory arrangement. Digital signature metadata 500, digital signatures 502, designated data 508, and other data 510 are stored within the partitions of the memory arrangement 406b defined by the partition map 504. The partition map 504 may include multiple partition lengths, read / write configurations, and partition attribute identifiers, each defining a partition of the general-purpose memory portion of the memory arrangement. The read / write configuration may define how the corresponding partition is accessible, for example, for read-only (RO) operations, write-only (WO) operations, both read and write (R / W) operations, or write-once-and-read-only (W2RO) operations. The partition read / write configuration may also define other access modes, such as specifying whether authentication is required for partition access. The partition attribute identifier may define the type of data stored in the partition. For example, one attribute identifier value may indicate the partition where the persona signature is stored, and another attribute identifier value may indicate the partition where the persona signature metadata is stored. The host can query the partition map and, from the length and attribute identifier information, determine where the persona signature and persona signature metadata are stored, and then construct the appropriate read command (specifying a memory address and length). The partition map 504 may have a variable length and may define a single partition or multiple partitions. In some examples, the partition map 504 may have a length of 4 bytes times the number of partitions, with each partition being 2 bytes long, each read / write configuration being 1 byte, and each partition attribute identifier being 1 byte.

[0033] The logic circuit identifier 506 allows the host to distinguish the logic circuit package 402 (FIG. 4) from other logic circuit packages. In some examples, each logic circuit identifier 506 may be unique, i.e., different for different logic circuit packages. In instances where the identifier 506 is duplicated by an unauthorized third party, the logic circuit identifier 506 need not be universally unique, as there may be two or more instances of the same identifier 506. In some examples, the logic circuit identifier 506 has a length of 32 bytes.

[0034] The designated data 508 includes data stored in multiple data blocks of the general-purpose memory portion of the memory arrangement specified by the digital signature metadata 500. The designated data 508 includes the data to be signed. The digital signature 502 is based at least in part on the designated data 508. The digital signature 502 is not based on other data 510. In some examples, the designated data may be static for the life of the logic circuit package and / or the component to which the logic circuit package is attached (e.g., read-only data). The designated data 508 may include any suitable data, such as a certificate and / or data specific to the logic circuit package. The designated data 508 may have a length that can vary between different logic circuit memory arrangements. In some examples, the designated data 508 may include the digital signature metadata 500, i.e., one of the data blocks that is part of the designated data 508 may include the digital signature metadata 500.

[0035] Other data 510 includes data not specified by digital signature metadata 500. Other data 510 can include data that is not signed and is unrelated to digital signature 502, including print cartridge-related characteristics (e.g., color, fill level, etc.) and / or other suitable data. In some examples, other data 510 can include data that is intended to be updated / modified by the host over the life of the logic circuit package (e.g., read / write data or write-once-and-read-only data) or the component to which the logic circuit package is attached, such as dynamic data that is updated over the life of the logic circuit, including data in a usage counter field or print material level data.

[0036] In some examples, digital signature 502 is signed over data including at least one of device type identifier, logic circuit identifier 506, partition map 504, and specification data 508. A device type identifier not stored in memory arrangement 406b may correspond to logic circuit package 402 (FIG. 4) and identify that the logic circuit package is intended to be installed in or has been installed in a replaceable printing device component. In some examples, the value of the device type identifier is the same for all logic circuit packages intended to be installed in or has been installed in a replaceable printing device component. Other values of the device type identifier may indicate that the logic circuit package is not intended to be installed in a replaceable printing device component.

[0037] As described in more detail below, to verify that the logic circuit is authentic, the host can read digital signature metadata 500, digital signature 502, partition map 504, and logic circuit identifier 506. The host can then use digital signature metadata 500 to read designated data 508. The host can then use partition map 504, logic circuit identifier 506, and designated data 508 to verify digital signature 502. In one example, only a portion of the partition map is verified for checking, such as the lengths of the partitions in the partition map and / or other features in the partition map.

[0038] FIG. 6A shows an example of digital signature metadata 600a. In one example, the digital signature metadata 600a provides the digital signature metadata 500 of FIG. 5A or 5B. The digital signature metadata 600a includes a schema identifier field 602, a key identifier field 604, a data block address field(s) 606, and a data block length field(s) 608. The schema identifier field 602 stores a schema version for a host to determine which schema to use. The schema identifier field 602 may have a length of 1 byte. The key identifier field 604 stores an identifier of a signing key for a host to use the correct key for verification. A host may store (or make accessible) multiple public keys used to verify various signatures. The key identifier field 604 may have a length of 2 bytes. The original digital signature 502 (FIGS. 5A and 5B) may be calculated using a key corresponding to the key identifier.

[0039] The data block address field(s) 606 may include a single data block address field or multiple data block address fields. Each data block address field stores an address corresponding to a data block for which a digital signature is initially calculated. The data block address may be the starting address of a data block. Each data block address field may have a length of 2 bytes. The data block length field(s) 608 may include a single data block length field or multiple data block length fields. Each data block length field corresponds to a data block addressed by the corresponding data block address field. Each data block length field stores data indicating the length of the corresponding data block. Each data block length field may have a length of 2 bytes. Each data block address field and corresponding data block length field are stored in the digital signature metadata 600a from the first data block address (addr1) and data block length (len1) to the last data block address (addr N ) and data block length (len N ), addr1||len1||addr2||len2||...||addr N ||len N In one example, one of the designated data blocks may store digital signature metadata.

[0040] FIG. 6B shows another example of digital signature metadata 600b. In one example, digital signature metadata 600b provides digital signature metadata 500 of FIG. 5A or 5B. Digital signature metadata 600b includes a schema identifier field 602, a key identifier field 604, data block address field(s) 606, and data block length field(s) 608, as previously described and illustrated with reference to FIG. 6A. Additionally, digital signature metadata 600b also includes a length field 610 and a data block count field 612. Data block count field 612 stores data indicating the total number of data blocks addressed by data block address field(s) 606. Data block count field 612 may have a length of 1 byte. Length field 610 stores data indicating the total cumulative length of key identifier field 604, data block count field 612, data block address field(s) 606, and data block length field(s) 608. The length field 610 may have a length of 2 bytes. The host may use the data stored in the length field 610 to parse the digital signature metadata 600b. In some examples, the host may use the data stored in the data block count field 612 instead of or in addition to the length field 610 to parse the digital signature metadata 600b.

[0041] The digital signature metadata 600b includes a schema identifier || length || key identifier || data block count || addr1 || len1 || addr2 || len2 || ... || addr N ||len NFor example, 02 000B 8C00 02 0000 00F0 0100 Given digital signature metadata 600b with hexadecimal digits equal to 0001, schema identifier field 602 (i.e., 02) indicates schema version number 2, length field 610 (i.e., 000B) indicates a total cumulative length of 11 bytes, key identifier field 604 (i.e., 8C00) indicates a signature key identifier of 8C00, data block count field 612 (i.e., 02) indicates two data blocks, first data block address field 606 (i.e., 0000) and first data block length field 608 (i.e., 00F0) indicate a first data block of 0x0000-0x00EF having a length of 240 bytes, and second data block address field 606 (i.e., 0100) and second data block length field 608 (i.e., 0001) indicate a second data block of 0x0100-0x0100 having a length of 1 byte.

[0042] 7A-7D are flow diagrams illustrating exemplary methods 700, 710, 720, and 730 that may be performed by logic circuitry, such as logic circuitry 404 of FIG. 4. The logic circuitry may be part of a logic circuitry package (e.g., 402 of FIG. 4) for a replaceable printing device component (e.g., 400 of FIG. 4) that includes an interface (e.g., 408 of FIG. 4) for communicating with the printing device logic circuitry (e.g., 304 of FIG. 3), as previously described. In this example, a memory location stores digital signature metadata (e.g., 600a of FIG. 6A or 600b of FIG. 6B) to facilitate verification of associated signed data. As illustrated by method 700 of FIG. 7A at step 702, the logic circuitry is configured to receive a read request from a host. At step 704, the logic circuitry is configured to transmit the digital signature metadata to the host in response to the read request.

[0043] In one example, the memory arrangement stores a digital signature (e.g., 502 in FIG. 5A or 5B) corresponding to the digital signature metadata, signed with a key corresponding to a key identifier (e.g., 604 in FIG. 6A or 6B). In this example, as shown at step 712 by method 710 in FIG. 7B, the logic is configured to receive a read request (or multiple read requests) from a host. At step 714, the logic is configured to transmit the digital signature and the digital signature metadata (in any order) to the host in response to at least one of the read requests.

[0044] In one example, the memory arrangement stores a digital signature signed for data including a logic circuit identifier (e.g., 506 of FIG. 5B ), a partition map (e.g., 504 of FIG. 5B ), digital signature metadata (e.g., 500 of FIG. 5B ), designation data (e.g., 508 of FIG. 5B ), and a device type identifier corresponding to the logic circuit package (e.g., 502 of FIG. 5B ). In this example, as shown at step 722 by method 720 of FIG. 7C , the logic circuit is configured to receive requests (e.g., generic memory read request(s) and / or attribute memory read request(s)) from a host. At step 724, the logic circuit is configured to transmit the logic circuit identifier, partition map, digital signature, digital signature metadata, and / or other data, as well as the designation data corresponding to the digital signature metadata, to the host in response to at least one request.

[0045] In one example, as described in more detail below with reference to FIG. 10 , the digital signature metadata and the digital signature are stored in a general-purpose memory portion of a memory arrangement configured for general-purpose read / write access. Additionally, the memory arrangement includes at least one different memory portion not intended for general-purpose read / write access that stores at least one cryptographic key and / or multiple attributes. In this case, as illustrated at step 732 by method 730 of FIG. 7D , the logic circuit may be configured to perform a cryptographic operation using the at least one cryptographic key. At step 734, the logic circuit is configured to return an attribute of the multiple attributes in response to an attribute request that includes an associated attribute tag, and the logic circuit is configured to associate the attribute with the attribute tag. The multiple attributes may include, for example, a partition map, a logic circuit identifier, or a device address (e.g., in the case of I2C communication). The logic circuit may be configured to implement one or both of blocks 732 and 734.

[0046] 8A and 8B are block diagrams illustrating an example of a processing system 800 for provisioning logic circuit packages (e.g., 402 in FIG. 4). In one example, processing system 800 may be part of a manufacturing line for logic circuit packages. Processing system 800 includes a processor 802 and a machine-readable storage medium 806. Processor 802 is communicatively coupled to machine-readable storage medium 806 via communication path 804. Although the following description refers to a single processor and a single machine-readable storage medium, the description may also apply to systems having multiple processors and multiple machine-readable storage media. In such an example, instructions may be distributed (e.g., stored) across multiple machine-readable storage media, and instructions may be distributed across (e.g., executed by) multiple processors.

[0047] Processor 802 includes one (i.e., single) central processing unit (CPU) or microprocessor, or two or more (i.e., multiple) CPUs or microprocessors, and / or other suitable hardware devices, for retrieving and executing instructions stored on machine-readable storage medium 806. Processor 802 can fetch, decode, and execute instructions 808-814 to provide a logic circuit package.

[0048] The processor 802 can fetch, decode, and execute instructions 808 to obtain a signature key identifier and signature data. In one example, the signature data includes a device type identifier corresponding to the logic circuit package, a logic circuit identifier for the logic circuit package that allows the host to distinguish the logic circuit package from other logic circuit packages, a partition map (e.g., including a partition length and a partition attribute identifier for each partition) for defining partitions of the general-purpose memory portion of the logic circuit package's memory arrangement, and data stored in multiple data blocks of the general-purpose memory portion of the logic circuit package's memory arrangement specified by the digital signature metadata. The signature key identifier and signature data can be stored in the machine-readable storage medium 806 and / or another machine-readable storage medium accessible by the processing system 800.

[0049] The digital signature metadata facilitates verification of the associated signed data. The digital signature metadata can include a schema identifier field (e.g., 602 in FIG. 6A or 6B) that stores a schema version number for a host to determine which schema to use, a key identifier field (e.g., 604 in FIG. 6A or 6B) that stores an identifier of a signing key for a host to use the correct key for verification, a plurality of data block address fields (e.g., 606 in FIG. 6A or 6B) that each store an address corresponding to each data block of a plurality of data blocks for which a digital signature is initially calculated, and a plurality of data block length fields (e.g., 608 in FIG. 6A or 6B) corresponding to the plurality of data blocks, each data block length field storing data indicating the length of the corresponding data block.

[0050] The processor 802 can fetch, decode, and execute instructions 810 for concatenating signature data. The signature data may be concatenated as follows: device type identifier || logic circuit identifier || partition map || data for data block 1 || data for data block 2 || ... || data for data block N, where "N" is the number of data blocks. The processor 802 can fetch, decode, and execute instructions 812 for calculating a digital signature over the concatenated signature data using a signature private key corresponding to the signature key identifier. The processor 802 can fetch, decode, and execute instructions 814 for writing the digital signature to a general-purpose memory portion of a memory arrangement of the logic circuit package (e.g., 502 in FIG. 5A or 5B ).

[0051] As shown in FIG. 8B , processor 802 can fetch, decode, and execute further instructions 816 to write digital signature metadata (e.g., 500 of FIG. 5A or 5B ) to a general-purpose memory portion of the logic package's memory arrangement. Processor 802 can fetch, decode, and execute further instructions 818 to write a logic identifier (e.g., 506 of FIG. 5B ) and a partition map (e.g., 504 of FIG. 5B ) to an attribute memory portion of the logic package's memory arrangement. Processor 802 can fetch, decode, and execute further instructions 820 to write data stored in multiple data blocks specified by the digital signature metadata (e.g., 508 of FIG. 5B ) to a general-purpose memory portion of the logic package's memory arrangement.

[0052] Instead of, or in addition to, retrieving and executing instructions, processor 802 may include, in machine-readable storage medium 806, one (i.e., single) electronic circuit or two or more (i.e., multiple) electronic circuits with multiple electronic components for performing one of the instructions or the functions of two or more of the instructions. With respect to the executable instruction representations (e.g., boxes) described and illustrated herein, it should be understood that some or all of the executable instructions and / or electronic circuitry included in a box may, in alternative examples, be included in different boxes shown in the figures or not shown.

[0053] The machine-readable storage medium 806 is a non-transitory storage medium and may be any suitable electronic, magnetic, optical, or other physical storage device that stores executable instructions. Thus, the machine-readable storage medium 806 may be, for example, a random access memory (RAM), an electrically erasable programmable read-only memory (EEPROM), a storage drive, an optical disk, or the like. The machine-readable storage medium 806 may be located within the system 800, as shown in FIGS. 8A and 8B. In this case, the executable instructions may be installed in the system 800. Alternatively, the machine-readable storage medium 806 may be a portable, external, or remote storage medium that enables the system 800 to download instructions from the portable / external / remote storage medium. In this case, the executable instructions may be part of an installation package.

[0054] 9 is a block diagram illustrating an example of a signature hierarchy 900 for a logic circuit package, such as logic circuit package 402 of FIG. 4, implemented and / or stored on logic circuit 400. Signature hierarchy 900 includes a (e.g., part-specific, static) digital signature 910, a part number signature 920, and a manufacturing signature 902 calculated over part-specific manufacturing data 930. Part-specific manufacturing data 930 may include the manufacturing date and time of the component to which logic circuit 400 is attached, a line identifier identifying the manufacturing line of the component to which logic circuit 400 is attached, etc.

[0055] As described above, for example, with respect to FIGS. 5A and 5B, a digital signature 910 (e.g., 502 of FIG. 5A or 5B, referred to elsewhere in this disclosure as a perso digital signature) is calculated on signature data 912 to provide signed data. The digital signature 910 may be calculated using a first signing key corresponding to a first key identifier (e.g., 604 of FIG. 6A or 6B). In some examples, the digital signature 910 is unique to each logic circuit package. The original digital signature 910 and signature data 912 may be written to a memory location of a logic circuit package during provisioning of the logic circuit package, as described above with reference to FIGS. 8A and 8B. The signature data 912 includes a device type identifier (which, in some examples, is not stored in the memory location of the logic circuit package), a logic circuit identifier (e.g., 506 of FIG. 5B), a partition map (e.g., 504 of FIG. 5B), and designation data (e.g., 508 of FIG. 5B). The private key for the digital signature 910 can reside in a hardware security module (HSM). The public key for the digital signature 910 can reside in or be accessible by the host. The same private / public key can be used for signature generation and / or verification for multiple logic circuits.

[0056] The part number signature 920 is calculated on common manufacturing data 922. The part number signature may be calculated using a second signature key corresponding to a second key identifier (e.g., 1804 in FIG. 18A or FIG. 18B ) that is different from the first signature key used to calculate the digital signature 910. In some examples, the part number signature 920 may be common to multiple logic circuit packages that share the same part number (e.g., for a logic circuit package combination and / or the same family, such as an interchangeable printing device component family, the same color or color combination, one or more particular fill levels, etc.). The part number signature 920 may be the same for multiple logic circuit packages with different digital signatures and different logic circuit identifiers (in certain cases, if the logic circuit identifiers are different, the digital signatures will consequently be different). The part number signature 920 may be pre-calculated. The part number signature 920 and common manufacturing data 922 may be written to a memory location of the logic circuit package during final assembly of the interchangeable printing device component. The common manufacturing data 922 may include color, fill level, area, etc.

[0057] The manufacturing signature 902 may be calculated by logic circuitry (e.g., 404 in FIG. 4 ) during final assembly of the replaceable printing device component. The manufacturing signature 902 may be calculated using a third signature key (e.g., 1106 in FIG. 11B ) that is different from the first signature key used to calculate the digital signature 910 and that corresponds to a third key identifier (e.g., 1206 in FIG. 12B ) that is different from the second signature key used to calculate the part number signature. The manufacturing signature 902 may include a manufacturing date and / or time, a line ID, and more part-specific manufacturing data written during final assembly. As described in more detail below, the logic circuitry may include dedicated functionality for calculating the manufacturing signature, including an elliptic curve cryptography (ECC) key that can be used to generate the manufacturing signature, dedicated configurable attributes that define which ECC key should be used for the signature and which data block should be signed, and dedicated commands for generating signatures, writing dedicated attributes during personalization, and reading dedicated attributes and signatures. The private key for the production signature 902 may be generated by the personalization system and written to the logic circuit's key storage memory. The public key for the production signature 902 is included in a certificate generated by the personalization system and written to the logic circuit's general purpose memory. A unique private / public key can be used for signature generation and / or verification for each logic circuit.

[0058] A third party and / or unauthorized party may copy the digital signature and metadata, including the signature and data of FIG. 9, effectively mimicking the original and authorized data.

[0059] FIG. 10 illustrates an example of a consumable cartridge 1000. The consumable cartridge 1000 can provide the replaceable printing device component 104 of FIG. 1, the replaceable printing device component 200 of FIG. 2, or the print cartridge 400 of FIG. 4. The consumable cartridge 1000 includes a reservoir 1002 containing a consumable material, a logic circuit interface 1004 for communicating with a host, and a logic circuit 1006. The consumable material can include ink, dry toner, liquid toner, or a 3D printing agent. The reservoir 1002 can be connected to an output (not shown) for ejecting the consumable material from the reservoir 1002. The interface 1004 can be an I2C interface or another suitable interface for communicating with a host.

[0060] Logic circuitry 1006 includes a processor 1008, other authentication logic 1010, and a memory arrangement 1012. Memory arrangement 1012 may include attribute storage memory 1014, key storage memory 1024, general purpose memory 1030, and instructions 1040 and 1042. In one example, memory arrangement 1012 may include a single or multiple memory devices and may include one or any combination of volatile memory (e.g., DRAM, SRAM, registers, etc.) and non-volatile memory (e.g., ROM, EEPROM, flash, EPROM, memristors, etc.).

[0061] The attribute storage memory 1014 can store the logic circuit identifier 506, the partition map 504, and the manufacturing signature attribute data 1200 (described below with reference to FIGS. 12A and 12B). In some examples, the attribute storage memory 1014 is accessible for read and / or write access by the processor 1008 and / or other authentication logic 1010. The attribute storage memory 1014 can be accessible only for read access by the host by sending a request to the processor 1008, which can perform the requested operation and return the requested data to the host. The key storage memory 1024 can store the cryptographic key(s) 1026 (e.g., symmetric base key(s) and / or asymmetric private key(s)). In some examples, the key storage memory 1024 is accessible for read and write access by the processor 1008 and / or other authentication logic 1010 and is not accessible to the host. The cryptographic key(s) 1026 can be used to perform cryptographic operations, such as authentication, signing, and / or other suitable operations. In some examples, the key storage memory 1024 stores multiple key identifiers and associated signature keys. Each signature key can be identified and selected based on its associated key identifier. In one example, the multiple key identifiers and associated signature keys may be stored in a table or table-like format, or any other format that facilitates identification and retrieval of the keys based on the corresponding identifiers. In another example, a single signature key may be stored with or without an associated identifier.

[0062] The general-purpose memory 1030 can store personalization (persona) signature metadata 500 (e.g., digital signature metadata 500 of FIGS. 5A and 5B, or digital signature metadata 600a or 600b of FIGS. 6A and 6B), persona signature designation data 508 (e.g., designation data 508 of FIG. 5B), and other data 510. The general-purpose memory 1030 can also store a certificate 1102 and manufacturing signature designation data 1300 (also referred to herein as instruction data, and described below with reference to FIGS. 11A and 11B). In some examples, the certificate 1102 may be contained within the persona signature designation data 508. The certificate 1102 may be of the type described in International Patent Application No. PCT / US2021 / 054017, which is incorporated herein by reference. The manufacturing signature designation data 1300 may include a persona signature 502 (e.g., digital signature 502 of FIGS. 5A and 5B ), a part number signature 1304, and part-specific manufacturing data 1306 (e.g., corresponding to reference numbers 910, 920, and 930, respectively, of FIG. 9 ). The general-purpose memory 1030 may also store part number signature metadata 1700 and part number signature designation data 1702 corresponding to the part number signature 1304. In some examples, the general-purpose memory 1030 is accessible for read and / or write access by the processor 1008, other authentication logic 1010, and / or a host via the processor 1008. The host may access the general-purpose memory 1030 by sending general-purpose read and / or write requests to the logic circuit 1006 via the interface 1004. The general-purpose read and / or write requests from the host to access the general-purpose memory 1030 may be different from requests from the host to access the attribute storage memory 1014.

[0063] Instructions 1040 are instructions for a secure communication session between logic 1006 and a host based on cryptographic key(s) 1026. Instructions 1042 are instructions for signature calculation in response to a signature generation request from the host (e.g., manufacturing signature 902 of FIG. 9).

[0064] Processor 1008 executes instructions for controlling the operation of logic circuit 1006, including instructions 1040 and 1042, as well as instructions for accessing memory arrangement 1012 for read and / or write operations. Processor 1008 can return data (e.g., logic circuit identifier 506, partition map 504, perso-signature metadata 500, perso-signature 502, perso-signature designation data 508, and other data 510, etc.), update data, and / or initiate functions (e.g., initiate secure communication sessions, calculate signatures, etc.) in response to external requests or commands from a host (e.g., via interface 1004). Processor 1008 can also generate and / or update data stored in memory arrangement 1012 in response to internal requests or commands within logic circuit 1006. Other authentication logic 1010 can include high-speed computational logic for processing predetermined iterative calculations and / or other logic for processing authentication algorithms. In some examples, other authentication logic 1010 may execute instructions for a secure communication session 1040 and / or instructions for signature calculation 1042, or portions of instructions for a secure communication session 1040 and / or instructions for signature calculation 1042.

[0065] To prevent data stored in compatible logic from differing from the original and / or authorized data, it is desirable to sign sensitive data stored in consumables that is tied to an identity or function. The signed data is static for the remaining life of the consumable device. Therefore, in many instances, signatures are not appropriate for data whose values may change, such as print consumable usage counters.

[0066] It may be difficult to generate a signature on part-specific data in certain environments that are not directly controlled. An example of an environment that is not directly controlled may be the manufacturing location of a component (e.g., an interchangeable printed component such as 1000, 104, 200) to which a logic circuit package (e.g., 1006, 402, 204) is attached. These manufacturing locations may not be owned or directly operated by the party that designed and generated the architecture and content of the original data, such as the OEM.

[0067] Logic circuitry on certain components, such as printing consumables, can perform the signature operation itself by calculating a manufacturing digital signature. For example, manufacturing of a part with printing material or imaging functionality (e.g., a photoreceptor) may occur after personalization of the associated logic circuitry. The personalization of the logic circuitry and the manufacturing of the component may occur at different locations and / or by different parties or suppliers. According to examples of the present disclosure, during component manufacturing and / or after personalization of the logic circuitry, a manufacturing digital signature is calculated by the logic circuitry and stored in a memory location on the logic circuitry for later retrieval by an authorized host device (e.g., a printer) that wishes to read and authenticate the signed data. Facilitating the logic circuitry with the manufacturing signature's signing functionality can facilitate the possibility that a manufacturing line can perform this signature operation without requiring special equipment. Because the logic circuitry is pre-configured to calculate the manufacturing digital signature, the manufacturing digital signature and the data on which it is calculated can be considered authentic, even if it is not necessarily signed in a directly controlled environment. These advantages may be of interest to OEMs.

[0068] It should be noted that third parties who are not the OEM of a compatible host device can still replicate the data and signatures disclosed herein. According to examples of the present disclosure, by storing equivalent or similar data and signatures, these third parties can connect to host devices developed by other parties (e.g., the OEM), thereby allowing the host device to treat the received data as the original data. In this regard, it should be noted that the manufacturing digital signature and other signatures (e.g., persona signature, part number signature) disclosed herein may be independent of steps or parties associated with an authorized manufacturing process or location. Furthermore, an unauthorized third party can replicate the signature and write the signature to the memory location of the consumable in a single step or action. Additionally, or alternatively, the complete signature set (e.g., persona signature, part number signature, manufacturing digital signature) can be outsourced to a single supplier / manufacturer, not necessarily an unauthorized third party, and the consumable can follow the same schema disclosed herein to be compatible with the installed host (e.g., a printer). The components, schema, data, and signatures can be manufactured and / or written at a single location. In other words, the different signature and data features of the present disclosure are not limited by the steps or order of the manufacturing process. In certain instances, the various names used to describe each digital signature disclosed herein (e.g., person, manufacturing, part number, etc.) are merely to distinguish the signatures from one another, and the names do not imply that the signature is written during any particular process step. The principles described in this disclosure can be used to at least one of (i) gain control over data for large amounts of logic that pass through particular steps and / or locations in the manufacturing process, for example, because one or some of the steps and / or locations may be difficult to fully control, and / or (ii) gain compatibility with pre-shipped / installed host controllers.

[0069] It should be noted that while certain examples in this disclosure, such as FIG. 10 , describe instances of logic circuits where the manufacturing digital signature has already been calculated, earlier instantiations of the logic circuit (e.g., prior to component manufacturing) may still require the manufacturing digital signature to be calculated.

[0070] FIG. 11A shows another example of memory arrangement 406c. In some examples, memory arrangement 406c may be an example of memory arrangement 406 of FIG. 4. Memory arrangement 406c stores instruction data 1100, certificate 1102, and manufacturing attribute data 1104. Instruction data 1100 may be data from which a manufacturing digital signature is calculated, as indicated by a corresponding instruction (e.g., 1202) in manufacturing attribute data 1104, such as shown in FIG. 12A. As shown in FIG. 10, instruction data 1100 (e.g., referred to therein as manufacturing signature designation data 1300) may be stored in general-purpose memory portion 1030 of the memory arrangement, accessible for read and write operations, for example, by a controller of a host. Certificate 1102 may also be stored in the general-purpose memory portion of the memory arrangement. Manufacturing attribute data 1104 (e.g., also referred to therein as manufacturing signature attribute data 1200) may be stored in attribute memory portion 1014 of the memory arrangement.

[0071] As described in more detail below, instruction data 1100 is data on which a manufacturing digital signature is or should be calculated. Certificate 1102 is for a controller (e.g., of a host) to verify the manufacturing digital signature. Certificate 1102 includes a public key corresponding to a private key used to calculate the manufacturing digital signature. Certificate 1102 is signed with a certificate authority private key that is verified by the controller (e.g., of a host) with the certificate authority public key. As described in more detail below, manufacturing attribute data 1104 includes at least one instruction that points to (e.g., identifies) instruction data 1100 and the manufacturing digital signature.

[0072] FIG. 11B illustrates another example of memory arrangement 406d. In some examples, memory arrangement 406d may be another example of memory arrangement 406 of FIG. 4. Memory arrangement 406d stores instruction data 1100, certificate 1102, and manufacturing attribute data 1104, as described above and illustrated with reference to FIG. 11A. Additionally, memory arrangement 406d stores a signature key (e.g., a private key) 1106 for calculating a manufacturing digital signature. In this example, instruction data 1100 includes data blocks 11100-11107. In this example, instruction data 1100 includes eight data blocks 11100-11107, although in other examples, instruction data 1100 may include fewer than eight data blocks, and again, in other examples, more than eight data blocks may be used.

[0073] In some cases, the length and / or address of at least one of the instruction data 1100 to be written during a subsequent manufacturing process step may be known in advance. For example, the address and length of each data block 11100-11107 of the instruction data may be predefined. However, all actual instruction data values to be written may not be known in advance. The certificate 1102, manufacturing attribute data 1104 (excluding the manufacturing signature), and signature key 1106 may be written to memory location 406d during provisioning or personalization of the logic circuit package prior to calculating the manufacturing digital signature. The manufacturing attribute data 1104 may be configured as described below with reference to FIGS. 12A and 12B.

[0074] FIG. 12A illustrates an example of attribute data 1200a for a manufacturing digital signature. In one example, attribute data 1200a provides manufacturing attribute data 1104 of FIGS. 11A and 11B. Attribute data 1200a includes an instruction field 1202 that stores at least one instruction for data for which a manufacturing digital signature is to be calculated (e.g., at least one instruction for instruction data 1100 of FIG. 11A or 11B that includes at least one data block 1110), and a manufacturing digital signature field 1204 that stores the manufacturing digital signature. In one example, manufacturing digital signature field 1204 has a length of 64 bytes. Manufacturing digital signature field 1204 may remain empty until a manufacturing digital signature is calculated and stored in field 1204 by logic circuit 1006.

[0075] FIG. 12B illustrates further example attribute data 1200b for a manufacturing digital signature. In one example, the attribute data 1200b provides the manufacturing attribute data 1104 of FIGS. 11A and 11B. The attribute data 1200b includes an instruction field 1202 that stores at least one instruction for data for which the manufacturing digital signature is to be calculated, and a manufacturing digital signature field 1204 that stores the manufacturing digital signature, as described above and illustrated, for example, with reference to FIG. 12A. The attribute data 1200b also includes a signature key identifier field 1206 that stores a signature key identifier. The signature key identifier identifies (e.g., corresponds to) the signature key (e.g., 1106 in FIG. 11B) used to calculate the manufacturing digital signature, which is stored, for example, in the key storage memory 1024. The signature key identifier also corresponds to a certificate (e.g., 1102 in FIG. 11B) for the controller (e.g., the host) to verify the manufacturing digital signature. In particular, the signature key identifier corresponds to the public key in the certificate. The certificate may also include a signature key identifier so that the controller can verify that it is using the correct certificate to verify the manufacturing digital signature. In one example, the signature key identifier field 1206 has a length of 2 bytes.

[0076] The instruction field 1202, which stores at least one instruction for data on which a manufacturing digital signature is to be calculated, includes data block address fields 12120-12127 and corresponding data block length fields 12140-12147. Each data block address field 12120-12127 stores the starting address of a respective data block 11100-11107 (FIG. 11B). Each data block length field 12140-12147 stores the length of a respective data block 11100-11107 (FIG. 11B). Thus, the data block address fields 12120-12127 and the corresponding data block length fields 12140-12147 identify a respective data block 11100-11107. In one example, each data block address field 12120-12127 has a length of 2 bytes, and each data block length field 12140-12147 has a length of 2 bytes.

[0077] In one example, manufacturing attribute data 1200b is constructed by sending a put attribute manufacturing signature command to the logic circuit. The command can specify 1 to 8 data blocks. If fewer than 8 data blocks are specified, address and length values of 0 are stored for the unspecified blocks. The command is: attr_tag||rk_id||dblk0||...||dblk N-1 , where 1≦N≦8. attr_tag is a manufacturing signature attribute tag and may have a length of 1 byte. The manufacturing signature attribute tag indicates that the command constitutes manufacturing signature attribute data 1200b. rk_id is a key identifier that identifies the signing key for calculating the manufacturing signature and may have a length of 2 bytes. The signing key identifier field 1206 stores the key identifier. dblk nidentifies data block n and may have a 4-byte length including a 2-byte address for the data block and a 2-byte length of the data block. The address and length of each data block n are stored in the corresponding data block address fields 12120-12127 and data block length fields 12140-12147, respectively.

[0078] Writing the manufacturing data and generating the manufacturing signature may occur during a post-personalization manufacturing or configuration process, which may occur in an environment where the authority of the original data is not fully controlled, such as at a manufacturing location not operated by the OEM. During the manufacturing process, the manufacturing data may be written to a general-purpose memory portion of the memory location as part of instruction data 1100 (e.g., data written to data blocks 11100-11107 in FIG. 11B). Using the manufacturing data written to the memory location, a manufacturing signature can be calculated and stored in manufacturing digital signature field 1204. In one example, the manufacturing signature may be calculated in response to the logic circuit receiving a manufacturing signature generation command.

[0079] The manufacturing signature generation command may be used to generate (e.g., calculate) a manufacturing signature over one or more data blocks of a memory location. The signing key and the data blocks over which the manufacturing signature is calculated are specified in the manufacturing signature attribute data 1200b. Once generated, the manufacturing signature may be queried via the manufacturing signature attribute. In some examples, generating the manufacturing signature may transition the consumable through an operational lifecycle state (i.e., from a manufacturing state to a state ready for use by a host). In one example, the signing key may be used only once, such that once the manufacturing signature is calculated, the manufacturing signature is not calculated again. In some examples, the signing key may be deleted once the manufacturing signature is calculated.

[0080] The manufacturing signature can be calculated as follows: Signature = ED25519-Sign((signing key), const || SHA-512(mfg_data)), The signing key corresponds to the key identifier specified in the manufacturing signature attribute data, ·mfg_data=dblk0||data0||...||dblk N-1 ||data N-1 , dblk n Note that n is the data block n specified in the manufacturing signature attribute data, and does not include unused data blocks (i.e., those with a length of 0). data n is the general-purpose memory data corresponding to data block n. The manufacturing signature includes at least one instruction in the instruction data (e.g., dblk n ) and instruction data (e.g., data n Note that the .sigma..sub.12 signature can be computed over a hash (e.g., SHA-512) of the instructions in

[0081] 13 shows an example of instruction data 1300 for a manufacturing digital signature. In this example, instruction data 1300 includes a (part-specific) digital signature 502, also referred to as a perso digital signature 502, a part number digital signature 1304, and part-specific manufacturing data 1306. As described above, (part-specific) digital signature 502 is signed for data including at least one of a device type identifier corresponding to the logic circuit package, a logic circuit identifier (e.g., 506 in FIG. 5B ) for a host to distinguish the logic circuit package from other logic circuit packages, a partition map (e.g., 504 in FIG. 5B ) for defining partitions of the general-purpose memory portion of the memory arrangement, and designation data (e.g., 508 in FIG. 5B ) stored in the general-purpose memory portion of the memory arrangement.

[0082] The part number digital signature 1304 is signed over common manufacturing data (e.g., 922 in FIG. 9 ) including at least one of color, fill level, and area. The common manufacturing data may be common to multiple logic circuit packages, i.e., may not be part-specific. The part-specific manufacturing data 1306 includes at least one of a manufacturing date, a manufacturing time, and a manufacturing line identifier (e.g., as shown at 930 in FIG. 9 ). The (part-specific) digital signature 502, the part number digital signature 1304, and the part-specific manufacturing data 1306 may be stored in data blocks 11100-11107 of the instruction data 1100 in FIG. 11B .

[0083] Figure 14 is a flow diagram illustrating another exemplary method 1400 that may be performed by logic circuitry, such as logic circuitry 404 of Figure 4. The logic circuitry may be part of a logic circuitry package (e.g., 402 of Figure 4) for a replaceable printing device component (e.g., 400 of Figure 4) that includes an interface (e.g., 408 of Figure 4) for communicating with a controller (e.g., printing device logic circuitry 304 of Figure 3), as previously described. In this example, memory locations store instruction data (e.g., 1100 of Figure 11A), certificates (e.g., 1102 of Figure 11A), and manufacturing attribute data (e.g., 1104 of Figure 11A).

[0084] At step 1402, the logic circuitry is configured to transmit manufacturing attribute data to the controller in response to at least one first request from the controller. The manufacturing attribute data includes a key identifier (e.g., 1206 in FIG. 12B), at least one instruction for data on which a manufacturing digital signature is calculated (e.g., 1202 in FIG. 12B), and a manufacturing digital signature (e.g., 1204 in FIG. 12B). At step 1404, the logic circuitry is configured to transmit the certificate and instruction data to the controller in response to at least one second request from the controller. In one example, the at least one first request and the at least one second request have differently encoded command type fields and / or include different opcodes indicating different command types. For example, the at least one first request may be configured to query an attribute memory (e.g., 1014 in FIG. 10), and the at least one second request may be configured to read a general-purpose memory (e.g., 1030 in FIG. 10). For example, depending on certain technical limitations or for other reasons, multiple transmissions may be necessary to transmit the requested data to the controller, and correspondingly, multiple requests may also be transmitted from the controller to the logic circuit. The at least one first request may include multiple first requests, and / or the at least one second request may include multiple second requests. Correspondingly, multiple responses of, for example, 32 bytes each may be transmitted to transmit a complete data set of, for example, 64 bytes.

[0085] Figure 15 is a flow diagram illustrating another exemplary method 1500 that may be performed by logic such as logic 404 of Figure 4. The logic may be part of a logic package (e.g., 402 of Figure 4) for a replaceable printing device component (e.g., 400 of Figure 4) that includes an interface (e.g., 408 of Figure 4) for communicating with a host (e.g., printing device logic 304 of Figure 3) as previously described. In this example, a memory location stores a signature key (e.g., 1106 of Figure 11B) and a key identifier (e.g., 1206 of Figure 12B).

[0086] At step 1502, the logic circuitry is configured to calculate a manufacturing digital signature. The manufacturing digital signature is calculated based on attribute data (e.g., 1200b of FIG. 12B). The manufacturing digital signature is calculated over the data stored in data blocks 11100-11107 of FIG. 11B using signature key 1106 of FIG. 11B, which is identified by signature key identifier 1206 of FIG. 12B. At step 1504, the logic circuitry is configured to store the manufacturing digital signature in a memory location. The manufacturing digital signature is stored in manufacturing digital signature field 1204 of attribute data 1200a of FIG. 12A or attribute data 1200b of FIG. 12B, e.g., attribute storage memory 1014 of FIG. 10.

[0087] FIG. 16 is a flow diagram illustrating an example of a method 1600 for provisioning a logic circuit package (e.g., 402 of FIG. 4) including a memory location (e.g., 406 of FIG. 4). At step 1602, method 1600 includes receiving, by a logic circuit (e.g., 404) of the logic circuit package, a command to generate a manufacturing digital signature. At step 1604, method 1600 includes reading, by the logic circuit in response to the command, at least one instruction (e.g., 1202 of FIG. 12B) of a signature key identifier (e.g., 1206 of FIG. 12B) and instruction data (e.g., 1100 of FIG. 11A or FIG. 11B) stored in the memory location of the logic circuit package. At step 1606, method 1600 includes reading, by the logic circuit, a signature key (e.g., 1106 of FIG. 11B) corresponding to the signature key identifier.

[0088] At step 1608, method 1600 includes reading, by the logic circuit, instruction data based on the at least one instruction. In one example, the instruction data is stored in a general-purpose memory portion (e.g., 1030 of FIG. 10 ) of the memory arrangement configured for general-purpose read / write access. The instruction data may include a portion-specific digital signature (e.g., 502 of FIG. 5B ) signed for data including at least one of: a device type identifier corresponding to the logic circuit package; a logic circuit identifier (e.g., 506 of FIG. 5B ) for distinguishing the logic circuit package from other logic circuit packages; a partition map (e.g., 504 of FIG. 5B ) for defining partitions of the general-purpose memory portion of the memory arrangement; and designation data (e.g., 508 of FIG. 5B ) stored in the general-purpose memory portion of the memory arrangement.

[0089] In some examples, the logic circuit package may be attached to a replaceable print cartridge (e.g., 400 in FIG. 4). In this example, the instruction data may include a part number digital signature (e.g., 1304 in FIG. 13) signed over common manufacturing data (e.g., 922 in FIG. 9) including at least one of color, fill level, and area. Also in this example, the instruction data may include part-specific manufacturing data (e.g., 1306 in FIG. 13) including at least one of a manufacturing date of the replaceable print cartridge, a manufacturing time of the replaceable print cartridge, and a line identifier (e.g., as shown in 930 in FIG. 9) that identifies a manufacturing line for the replaceable print cartridge.

[0090] At step 1610, method 1600 includes calculating, by the logic circuitry, a manufacturing digital signature based on the instruction data using the signature key. At step 1612, method 1600 includes writing, by the logic circuitry, the manufacturing digital signature to a memory location (e.g., to field 1204 of FIG. 12A or 12B ). In one example, writing the manufacturing digital signature may include writing the manufacturing digital signature to an attribute memory portion of the memory location (e.g., 1014 of FIG. 10 ). The logic circuitry may be configured to provide the host with read-only access to certain attributes (e.g., manufacturing signature attributes) stored in the attribute memory portion.

[0091] The manufacturing digital signature architecture and manufacturing digital signature architecture generation process described above can enable authentication of common and / or partially unique manufacturing data written to consumables in a partially trusted or at least not fully controlled environment. The process and architecture can support the ability to generate digital signatures without having to build complex infrastructure to create or support on-site or off-site signature services. The process allows for a flexible method for specifying the data to be included in the manufacturing digital signature and allows for combining the manufacturing data with other data previously written to a memory location, such as during provisioning or personalization of a logic circuit package prior to calculating the manufacturing digital signature. Furthermore, the process forces aftermarket consumables to use a copy of the complete data set from a genuine consumable instead of using non-genuine data, making it easier to identify non-genuine consumables and alert customers to their presence.

[0092] FIG. 17A illustrates an example of memory arrangement 406e. In some examples, memory arrangement 406e may be an example of memory arrangement 406 of FIG. 4. Memory arrangement 406e stores part number signature metadata 1700 and part number signature 1304 corresponding to part number signature metadata 1700. As described above with reference to FIG. 10, part number signature metadata 1700 and part number signature 1304 may be stored in general memory portion 1030 of the memory arrangement, accessible for read and write operations by, for example, a controller of a host. Part number signature metadata 1700 is used to facilitate verification of part number signature 1304 (e.g., associated signed data) by the host. Part number signature metadata 1700 may vary and is defined in more detail below with reference to FIGS. 18A and 18B. Part number signature metadata 1700 specifies data used to calculate part number signature 1304. Part number signature 1304 is computed using data corresponding to part number signature metadata 1700 and a private key corresponding to a public key stored by or accessible to the host. The computation of part number signature 1304 is described in more detail below with reference to Figures 20A and 20B. To verify that the logic circuit is authentic, the host can read part number signature metadata 1700 and part number signature 1304. The host can then use the data specified by part number signature metadata 1700 to verify part number signature 1304.

[0093] FIG. 17B illustrates another example of memory arrangement 406f. In some examples, memory arrangement 406f may be another example of memory arrangement 406 of FIG. 4. Memory arrangement 406f stores part number signature metadata 1700 and part number signature 1304 corresponding to part number signature metadata 1700, as previously described and illustrated with reference to FIG. 17A. In addition, memory arrangement 406f also stores part number signature designation data 1702. As described above with reference to FIG. 10, part number signature designation data 1702 may be stored in general memory portion 1030 of the memory arrangement, which is accessible for read and write operations by the host.

[0094] The part number signature designation data 1702 includes data stored in multiple data blocks of the general-purpose memory portion of the memory location specified by the part number signature metadata 1700. The part number signature designation data 1702 includes signed data. The part number signature 1304 is based, at least in part, on the part number signature designation data 1702. In some examples, the part number signature designation data may be static for the life of the logic circuit package and / or the component to which the logic circuit package is attached (e.g., read-only data). The part number signature designation data 1702 may include the aforementioned common manufacturing data (e.g., 922 in FIG. 9 ) that is common to multiple interchangeable print cartridges (e.g., print cartridges having the same SKU). The part number signature designation data 1702 may have a length that is variable between different logic memory locations. In some examples, the part number signature designation data 1702 may include the part number signature metadata 1700, i.e., one of the data blocks that is part of the part number signature designation data 1702 may include the part number signature metadata 1700.

[0095] In some examples, the part number signature 1304 is signed over data including at least one of a device type identifier and part number signature designation data 1702. The device type identifier, not stored in memory location 406f, can correspond to logic package 402 (FIG. 4) and identify that the logic package is intended to be installed in or has been installed in a replaceable printing device component. In some examples, the value of the device type identifier is the same for all logic packages intended to be installed in or has been installed in a replaceable printing device component. The device type identifier signed when calculating the part number signature may be the same or different from the device type identifier signed when calculating the persona signature.

[0096] As described in more detail below, to verify the authenticity of the logic circuit, the host can read part number signature metadata 1700 and part number signature 1304. The host can then use part number signature metadata 1700 to read part number signature designation data 1702. The host can then use part number signature designation data 1702 to verify part number signature 1304. In some examples, part number signature 1304 and part number signature metadata 1700 can be configured according to a schema similar to the schema used for digital signatures (e.g., persona signatures) and digital signature metadata (e.g., persona signature metadata), as described above and illustrated with reference to Figures 5A-5B and 6A-6B.

[0097] FIG. 18A shows an example of part number signature metadata 1800a. In one example, the part number signature metadata 1800a is the part number signature metadata 1700 of FIG. 17A or 17B. The part number signature metadata 1800a includes a schema identifier field 1802, a key identifier field 1804, a data block address field(s) 1806, and a data block length field(s) 1808. The schema identifier field 1802 stores a schema version for a host to determine which schema to use. The schema identifier field 1802 may have a length of 1 byte. The key identifier field 1804 stores an identifier of a signing key for a host to use the correct key for verification. The key identifier field 1804 may have a length of 2 bytes. The original part number signature 1304 (FIGS. 17A and 17B) may be calculated using a key corresponding to the key identifier.

[0098] Data block address field(s) 1806 may include a single data block address field or multiple data block address fields. Each data block address field stores a starting address corresponding to a data block for which the part number signature is initially calculated. Each data block address field may have a length of 2 bytes. Data block length field(s) 1808 may include a single data block length field or multiple data block length fields. Each data block length field corresponds to a data block addressed by the corresponding data block address field 1806. Each data block length field stores data indicating the length of the corresponding data block. Each data block length field may have a length of 2 bytes. Each data block address field and corresponding data block length field are stored within the part number signature metadata 1800a from the first data block address (addr1) and data block length (len1) to the last data block address (addr N ) and data block length (len N), addr1||len1||addr2||len2||...||addr N ||len N In one example, one of the designated data blocks may store part number signature metadata.

[0099] Figure 18B shows another example of part number signature metadata 1800b. In one example, part number signature metadata 1800b is part number signature metadata 1700 of Figure 17A or 17B. Part number signature metadata 1800b includes a schema identifier field 1802, a key identifier field 1804, data block address field(s) 1806, and data block length field(s) 1808, as previously described and illustrated with reference to Figure 18A. Additionally, part number signature metadata 1800b also includes a length field 1810 and a data block count field 1812. Data block count field 1812 stores data indicating the total number of data blocks addressed by data block address field(s) 1806. Data block count field 1812 may have a length of 1 byte. The length field 1810 stores data indicating the total cumulative length of the key identifier field 1804, the data block count field 1812, the data block address field(s) 1806, and the data block length field(s) 1808. The length field 1810 may have a length of 2 bytes. The host can use the data stored in the length field 1810 to parse the part number signature metadata 1800b. In some examples, the host can use the data stored in the data block count field 1812 instead of or in addition to the length field 1810 to parse the part number signature metadata 1800b. The part number signature metadata 1800b can contain the following fields: schema identifier || length || key identifier || data block count || addr1 || len1 || addr2 || len2 || ... || addr N ||len Ncan be concatenated and written to memory location 406 (see FIG. 4) as follows:

[0100] 19A-19C are flow diagrams illustrating exemplary methods 1900, 1910, and 1920 that may be performed by logic such as logic 404 of FIG. 4. The logic may be part of a logic package (e.g., 402 of FIG. 4) for a replaceable printing device component (e.g., 400 of FIG. 4) that includes an interface (e.g., 408 of FIG. 4) for communicating with the printing device logic (e.g., 304 of FIG. 3), as previously described. In this example, a memory location stores part number signature metadata (e.g., 1800a of FIG. 18A or 1800b of FIG. 18B) to facilitate verification of associated signed data. As illustrated at step 1902 by method 1900 of FIG. 19A, the logic is configured to receive a read request from a host. At step 1904, the logic is configured to transmit the part number signature metadata to the host in response to the read request.

[0101] In one example, the memory arrangement stores a part number signature (e.g., 1304 in FIG. 17A or 17B ) corresponding to the part number signature metadata, signed with a key corresponding to a key identifier (e.g., 1804 in FIG. 18A or 18B ). In this example, as shown at step 1912 by method 1910 of FIG. 19B , the logic is configured to receive a read request (or multiple read requests) from a host. At step 1914, the logic is configured to transmit the part number signature and the part number signature metadata (in any order) to the host in response to at least one of the read requests.

[0102] In one example, the memory arrangement stores part number signature metadata (e.g., 1700 of FIG. 17B), part number signature designation data (e.g., 1702 of FIG. 17B), and a part number signature (e.g., 1304 of FIG. 17B) signed for data including a device type identifier and part number signature designation data corresponding to the logic circuit package. In this example, as shown at step 1922 by method 1920 of FIG. 19C, the logic circuitry is configured to receive requests (e.g., generic memory read request(s)) from a host. At step 1924, the logic circuitry is configured to transmit the part number signature, the part number signature metadata, and / or other data, as well as the part number signature designation data corresponding to the part number signature metadata, to the host in response to the at least one request.

[0103] 20A and 20B are block diagrams illustrating another example of a processing system 2000 for provisioning logic circuit packages (e.g., 402 in FIG. 4). In some examples, the processing system 2000 may be distributed across at least two locations. For example, a first site processing system 2000 may pre-compute a set of part number signatures corresponding to data for a plurality of predetermined part numbers. These data sets (i.e., part number signature data and part number signatures) may then be transmitted to a second (e.g., manufacturing) location where the manufacturing data is written to logic circuit packages on the manufacturing line. When the manufacturing line is configured to run a particular part number, the appropriate data set may be selected and written to the logic circuit package's memory location by the processing system 2000, as described further below. In one example, the processing system 2000 may differ from the processing system 800 described above and illustrated with reference to FIGS. 8A and 8B. The processing system 2000 includes a processor 2002 and a machine-readable storage medium 2006. Processor 2002 is communicatively coupled to machine-readable storage medium 2006 via communication path 2004. While the following description refers to a single processor and a single machine-readable storage medium, the description may also apply to systems having multiple processors and multiple machine-readable storage media. In such an example, instructions may be distributed (e.g., stored) across multiple machine-readable storage media, and instructions may be distributed across (e.g., executed by) multiple processors.

[0104] Processor 2002 includes one (i.e., single) central processing unit (CPU) or microprocessor, or two or more (i.e., multiple) CPUs or microprocessors, and / or other suitable hardware devices, for retrieving and executing instructions stored in machine-readable storage medium 2006. Processor 2002 can fetch, decode, and execute instructions 2008-2014 to provide a logic circuit package.

[0105] The processor 2002 can fetch, decode, and execute instructions 2008 (e.g., at a first location) to obtain a signature key identifier and signature data. In one example, the signature data includes a device type identifier corresponding to the logic circuit package and data stored in multiple data blocks of a general-purpose memory portion of the memory location of the logic circuit package specified by the part number signature metadata. The signature key identifier and signature data can be stored in the machine-readable storage medium 2006 and / or another machine-readable storage medium accessible by the processing system 2000.

[0106] The part number signature metadata facilitates verification of the associated signed data. The part number signature metadata can include a schema identifier field (e.g., 1802 in FIG. 18A or 18B) that stores a schema version number for the host to use, a key identifier field (e.g., 1804 in FIG. 18A or 18B) that stores an identifier of the signing key for the host to use the correct key for verification, a plurality of data block address fields (e.g., 1806 in FIG. 18A or 18B) that each store an address corresponding to each data block of the plurality of data blocks for which the part number signature was originally calculated, and a plurality of data block length fields (e.g., 1808 in FIG. 18A or 18B) corresponding to the plurality of data blocks, each data block length field storing data indicating the length of the corresponding data block.

[0107] The processor 2002 can fetch, decrypt, and execute instructions 2010 (e.g., at a first location) for concatenating signature data. The signature data may be concatenated as follows: device type identifier || data in data block 1 || data in data block 2 || ... || data in data block N, where “N” is the number of data blocks. The processor 2002 can fetch, decrypt, and execute instructions 2012 (e.g., at a first location) for calculating a part number signature on the concatenated signature data using a signature private key corresponding to the signature key identifier. In one example, calculating the part number signature includes calculating the part number signature over hashes of data stored in multiple data blocks. The processor 2002 can fetch, decrypt, and execute instructions 2014 (e.g., at a second location) for writing the part number signature (e.g., 1304 in FIG. 17A or 17B ) to a general-purpose memory portion of a memory arrangement of the logic circuit package.

[0108] 20B, the processor 2002 can fetch, decode, and execute further instructions 2016 (e.g., at a second location) to write the part number signature metadata (e.g., 1700 of FIG. 17A or 17B) to the general-purpose memory portion of the memory arrangement of the logic circuit package. The processor 2002 can fetch, decode, and execute further instructions 2018 (e.g., at a second location) to write data stored in the plurality of data blocks specified by the part number signature metadata (e.g., 1702 of FIG. 17B) to the general-purpose memory portion of the memory arrangement of the logic circuit package.

[0109] Instead of, or in addition to, retrieving and executing instructions, the processor 2002 may include, in the machine-readable storage medium 2006, one (i.e., single) electronic circuit or two or more (i.e., multiple) electronic circuits with multiple electronic components for performing one of the instructions or the functions of two or more of the instructions. With respect to the executable instruction representations (e.g., boxes) described and illustrated herein, it should be understood that some or all of the executable instructions and / or electronic circuitry included in a box may, in alternative examples, be included in different boxes shown in the figures or not shown.

[0110] Machine-readable storage medium 2006 is a non-transitory storage medium and may be any suitable electronic, magnetic, optical, or other physical storage device that stores executable instructions. Thus, machine-readable storage medium 2006 may be, for example, RAM, EEPROM, a storage drive, an optical disk, etc. Machine-readable storage medium 2006 may be located within system 2000, as shown in FIGS. 20A and 20B. In this case, the executable instructions may be installed on system 2000. Alternatively, machine-readable storage medium 2006 may be a portable, external, or remote storage medium that allows system 2000 to download instructions from a portable / external / remote storage medium. In this case, the executable instructions may be part of an installation package.

[0111] FIG. 21A shows another example of memory arrangement 406g. In some examples, memory arrangement 406g may be an example of memory arrangement 406 of FIG. 4. Memory arrangement 406g includes a first digital signature 2100, a second digital signature 2102, and a third digital signature 2104. In one example, third digital signature 2104 is signed over first digital signature 2100 and second digital signature 2102. In one example, the first digital signature is a person signature (e.g., 502 in FIG. 5A, 5B, or 10), the second digital signature is a part number signature (e.g., 1304 in FIG. 10, 17A, or 17B), and the third digital signature is a manufacturing signature (e.g., 1204 in FIG. 12A or 12B). In one example, the first digital signature 2100 and the second digital signature 2102 are stored in a general-purpose memory portion (e.g., 1030 in FIG. 10) of a memory arrangement configured for general-purpose read / write access, and the third digital signature 2104 is stored in an attribute memory portion (e.g., 1014 in FIG. 10) of a memory arrangement not configured for general-purpose read / write access.

[0112] The example memory arrangement 406g may provide a multiple digital signature architecture that may be suitable for improving data integrity where multiple stages and / or parties are involved in writing data to the memory arrangement. Similar to FIG. 10, the examples of FIGS. 21A and 21B may simultaneously encompass different embodiments of digital signatures disclosed herein, such as persona digital signatures, manufacturing digital signatures, and part number digital signatures, as well as their respective metadata. However, other examples of memory arrangement 406g may provide multiple digital signature architectures that may be used for other technical functions not described, other than specific manufacturing-related stages between different suppliers as described herein. The example memory arrangement 406g may be suitable for connection to a host device that requires a digital signature to be present in order to pass the host device's integrity check.

[0113] In some examples, the first digital signature is signed over data (e.g., 912 in FIG. 9 ) including at least one of a device type identifier corresponding to the logic package, a logic identifier of the controller for distinguishing the logic package from other logic packages, a partition map for defining partitions of the general-purpose memory portion of the memory arrangement, and first digital signature designation data stored in the general-purpose memory portion of the memory arrangement. In some examples, the second digital signature is signed over common manufacturing data (e.g., 922 in FIG. 9 ) including at least one of color, fill level, and area. In some examples, the third digital signature is signed over the first digital signature, the second digital signature, and part-specific manufacturing data (e.g., 930 in FIG. 9 ) including at least one of a manufacturing date, a manufacturing time, and a manufacturing line identifier. At least one of the first, second, and third digital signatures may each be signed over a hash of at least a portion of the identified data.

[0114] 21B illustrates another example of memory arrangement 406h. In some examples, memory arrangement 406h may be another example of memory arrangement 406 of FIG. 4. Memory arrangement 406h stores first digital signature 2100, second digital signature 2102, and third digital signature 2104, as previously described and illustrated with reference to FIG. 21A. Memory arrangement 406h also stores first digital signature metadata 2106 and second digital signature metadata 2108. First digital signature metadata 2106 facilitates verification of first digital signature 2100, and second digital signature metadata 2108 facilitates verification of second digital signature 2102. In some examples, the first digital signature metadata 2106 is the persona signature metadata 600a or 600b described above and illustrated with reference to Figures 6A and 6B, and the second digital signature metadata 2108 is the part number signature metadata 1800a or 1800b described above and illustrated with reference to Figures 18A and 18B. In some examples, the first digital signature metadata 2106 and the second digital signature metadata 2108 are configured based on the same schema.

[0115] FIG. 22 is a flow diagram illustrating another exemplary method 2200 that may be performed by a logic circuit. The logic circuit may be part of a logic circuit package (e.g., 402 in FIG. 4) for a replaceable printing device component (e.g., 400 in FIG. 4) that includes an interface (e.g., 408 in FIG. 4) for communicating with a controller (e.g., 304 in FIG. 3), as previously described. In this example, a memory arrangement stores a first digital signature (e.g., 2100 in FIG. 21A or 21B), a second digital signature (e.g., 2102 in FIG. 21A or 21B), and a third digital signature (e.g., 2104 in FIG. 21A or 21B) signed over the first and second digital signatures. As indicated at step 2202 by the method 2200 of FIG. 22, the logic circuit is configured to receive at least one request from the controller. At step 2204, the logic circuitry is configured to transmit the first digital signature, the second digital signature, and the third digital signature (in any order) to the controller in response to at least one request.

[0116] Examples of the present disclosure may be provided as a method, system, or machine-readable instructions, such as any combination of software, hardware, firmware, etc. Such machine-readable instructions may be included in a machine-readable storage medium (including, but not limited to, EEPROM, PROM, flash memory, disk storage, CD-ROM, optical storage, etc.) having machine-readable program code therein or thereon.

[0117] The present disclosure will be described with reference to flowcharts and block diagrams of methods, devices, and systems according to examples of the present disclosure. Although the above-described flow diagrams show a specific order of execution, the order of execution may differ from that shown. Blocks described with respect to one flowchart may be combined with blocks of another flowchart. It should be understood that at least some of the blocks of the flowcharts and block diagrams, and combinations thereof, may be implemented by machine-readable instructions.

[0118] The machine-readable instructions may be executed by a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device, for example, to implement the functions described and illustrated in the figures. In particular, a processor or processing circuit is capable of executing machine-readable instructions. Thus, functional modules of the apparatus and devices (e.g., logic circuits and / or controllers) may be implemented by a processor that executes machine-readable instructions stored in a memory or operates according to instructions embedded in a logic circuit. The term "processor" should be interpreted broadly to include a CPU, processing unit, ASIC, logic unit, programmable gate array, or the like. The methods and functional modules may all be executed by a single processor or may be divided among several processors.

[0119] Such machine-readable instructions may also be stored on a machine-readable storage device (e.g., a tangible machine-readable medium) that can direct a computer or other programmable data processing device to operate in a particular mode.

[0120] Such machine-readable instructions may also be loaded into a computer or other programmable data processing device such that the computer or other programmable data processing device executes a sequence of operations to generate a computer-implemented process, and thus the instructions executing on the computer or other programmable device implement the function(s) specified by the flowchart and / or block diagram block(s).

[0121] Furthermore, the teachings herein may be implemented in the form of a computer software product, the computer software product being stored on a storage medium and including a plurality of instructions for causing a computing device to implement the methods described in the examples of this disclosure.

[0122] The word "comprising" does not exclude the presence of elements other than those listed in a claim, and the words "a" or "an" do not exclude a plurality.

[0123] While specific examples have been illustrated and described herein, various alternative and / or equivalent embodiments can be substituted for the specific examples illustrated and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the specific examples discussed herein. Accordingly, it is intended that the present disclosure be limited only by the claims and equivalents thereof.

[0124] The present disclosure addresses logic circuits that include an interface for communicating with host logic. The logic circuit may be part of a package. The logic circuit may be a dedicated circuit such as a microcontroller, e.g., a secure microcontroller. The logic circuit may be configured to communicate with a printing device controller. The logic circuit (ry package) may be attached to, embedded in, or attachable to a replaceable print cartridge or component. The host logic circuit may include or be part of printing device logic, such as a printer controller. The logic circuit and features of the logic circuit may be used in other applications, e.g., secure applications.

[0125] The logic circuit comprises a memory arrangement including any feasible selection, any combination, or all combinations of the following features: The memory arrangement can store digital signature metadata to facilitate verification of associated signed data. The digital signature metadata can include a schema identifier field that stores a schema version number to determine which schema a host uses. The digital signature metadata can include a key identifier field that stores an identifier of a signing key to enable the host to use the correct key for verification. The digital signature metadata can include a plurality of data block address fields, each of which stores an address corresponding to a respective data block of a plurality of data blocks for which a digital signature is initially calculated. The digital signature metadata can include a plurality of data block length fields corresponding to the plurality of data blocks, each of which stores data indicating a length of the corresponding data block. The memory arrangement can store a logic circuit identifier that enables a controller to distinguish the logic circuit package from other logic circuit packages. The memory arrangement can store a partition map to define partitions of a general-purpose memory portion of the memory arrangement. The memory arrangement can store the digital signature metadata to facilitate verification of designated data corresponding to the associated signed data and the digital signature metadata. The memory arrangement may store a digital signature signed for data including a device type identifier, a logic circuit identifier, a partition map, and designation data corresponding to the logic circuit package. The memory arrangement may store instruction data from which the manufacturing digital signature is calculated. The memory arrangement may store a certificate for the controller to verify the manufacturing digital signature. The memory arrangement may store manufacturing attribute data. The manufacturing attribute data may include at least one instruction indicating the instruction data. The manufacturing attribute data may include the manufacturing digital signature. The memory arrangement may store a signing key for calculating the manufacturing digital signature.The memory arrangement may store a key identifier that identifies a signing key for computing the manufacturing digital signature and enables the host to use the correct key to verify the associated signed data. The logic circuit may be configured to transmit the key identifier to the host in response to a request from the host. The memory arrangement may store a first digital signature, a second digital signature, and a third digital signature signed over the first digital signature and the second digital signature. The memory arrangement may store part number signature metadata to facilitate verification of the associated signed data. The part number signature metadata may include a schema identifier field that stores a schema version number to determine which schema the host uses. The part number signature metadata may include a key identifier field that stores an identifier of a signing key to enable the host to use the correct key for verification. The part number signature metadata may include a plurality of data block address fields, each storing an address corresponding to a respective data block of a plurality of data blocks from which the part number signature is initially computed. The part number signature metadata may include a plurality of data block length fields corresponding to the plurality of data blocks, each storing data indicating the length of the corresponding data block. The memory arrangement may store a part number signature signed for data including a device type identifier corresponding to the logic circuit package and / or part number signature designation data. A logic circuit having a memory arrangement including any of the above features, any combination of any executable selection, or all of the above features may be configured according to any of the following features, any combination of any executable selection, or all of the following features: The logic circuit may be configured to transmit digital signature metadata to a host in response to a read request. The logic circuit may be configured to transmit the logic circuit identifier, partition map, digital signature, digital signature metadata, and / or other data, and designation data corresponding to the digital signature metadata to a host in response to a request from the at least one controller.The logic circuit may be configured to transmit manufacturing attribute data to the controller in response to at least one first request from the controller. The logic circuit may be configured to transmit certificate and instruction data to the controller in response to at least one second request from the controller. The logic circuit may be configured to transmit the first digital signature, the second digital signature, and the third digital signature to the controller in response to at least one request. The logic circuit may be configured to transmit the part number signature metadata to the host in response to a read request. The memory arrangement may store part number signature designation data corresponding to the part number signature metadata. The logic circuit may be configured to transmit the part number signature, the part number signature metadata, and / or other data, and / or the part number signature designation data corresponding to the part number signature metadata to the controller. Any of the above-described derivable example logic circuits and / or example memory arrangements may be combined with any, any feasible selection, or all of the following example features: The digital signature metadata may include a data block count field storing data indicating the total number of a plurality of data blocks. The digital signature metadata may include a length field storing data indicating a total cumulative length of the key identifier field, the data block count field, the plurality of data block address fields, and the plurality of data block length fields for a host to parse the digital signature metadata. The memory arrangement may store a digital signature corresponding to the digital signature metadata, the digital signature being signed with a key corresponding to the key identifier. The logic circuit may be configured to transmit the digital signature and the digital signature metadata to the host in response to at least one read request. The digital signature metadata and the digital signature may be stored in a general-purpose memory portion of the memory arrangement configured for general-purpose read / write access. The memory arrangement may also include at least one different memory portion not intended for general-purpose read / write access that stores at least one cryptographic key and / or a plurality of attributes.The logic circuit may be configured to perform a cryptographic operation using at least one cryptographic key. The logic circuit may be configured to (i) return one attribute of the plurality of attributes in response to an attribute request including an associated attribute tag, and (ii) associate the attribute with the attribute tag. The memory location may store data within a partition defined by a partition map, a digital signature, digital signature metadata, designation data, and other data. The memory location may store other data unrelated to the digital signature, including print cartridge-related characteristics. The manufacturing attribute data may include a key identifier corresponding to a certificate for the controller to verify the manufacturing digital signature. The at least one instruction may include multiple data block addresses of the instruction data stored in the memory location and / or multiple data block length fields indicating the length of each corresponding data block. The at least one first request and the at least one second request may have differently encoded command type fields and / or include different opcodes indicating different command types. The at least one first request may be configured to query the attribute memory. The at least one second request may be configured to read the general-purpose memory. The instruction data from which the manufacturing digital signature is calculated includes at least one other digital signature. The instruction data may include portion-specific manufacturing data. The manufacturing attribute data may include a key identifier. The key identifier may identify a private key used to calculate the manufacturing digital signature. The certificate may include a public key corresponding to the private key. The certificate may be signed with a certificate authority public key and verified by the controller with the certificate authority public key. The memory arrangement may store multiple key identifiers and associated signing keys. The memory arrangement may store a private key used to calculate the manufacturing digital signature. The memory arrangement may store the private key, the key identifier may correspond to the public key in the certificate, and the certificate may further include a key identifier for the controller to verify the correct certificate used to verify the manufacturing digital signature using the public key. The logic circuit may be configured to calculate the manufacturing digital signature.The logic circuit may be configured to calculate a manufacturing digital signature and store the manufacturing digital signature in the memory arrangement upon or after completion. The memory arrangement may calculate the manufacturing digital signature and store attribute data to facilitate verification of the associated signed data. The attribute data may include a key identifier. The attribute data may include at least one instruction. The logic circuit may be configured to send the at least one instruction to the host in response to a request from the host. The logic circuit may be configured to calculate a manufacturing digital signature based on the attribute data and store the manufacturing digital signature in the attribute data. The instruction data from which the manufacturing digital signature is calculated may include a device type identifier corresponding to the logic circuit package, a logic circuit identifier for the host to distinguish the logic circuit package from other logic circuit packages, a partition map for defining partitions in the general memory portion of the memory arrangement, and / or a part-specific digital signature signed over data including at least one of the following: a device type identifier corresponding to the logic circuit package; a logic circuit identifier for the host to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions in the general memory portion of the memory arrangement; and / or a part-specific digital signature signed over data including at least one of the following: a color, a fill level, and / or an area. The instruction data from which the manufacturing digital signature is calculated may include part-specific manufacturing data, including at least one of a manufacturing date, a manufacturing time, and / or a manufacturing line identifier. The first digital signature may be a part number signature. The second digital signature may be a part number signature. The third digital signature may be a manufacturing signature. The first digital signature may be signed over data including at least one of a device type identifier corresponding to the logic circuit package, a logic circuit identifier for a controller to distinguish the logic circuit package from other logic circuit packages, a partition map for defining partitions in the general-purpose memory portion of the memory arrangement, and / or first digital signature designation data stored in the general-purpose memory portion of the memory arrangement. The second digital signature may be signed over common manufacturing data, including at least one of a color, a fill level, and / or an area.The third digital signature may be signed over the portion-specific manufacturing data, including at least one of a manufacturing date, a manufacturing time, and / or a manufacturing line identifier. The memory arrangement may store first digital signature metadata to facilitate verification of the first digital signature and / or second digital signature metadata to facilitate verification of the second digital signature. The first digital signature metadata and the second digital signature metadata are the same. The digital signature may be configured based on a schema and / or a schema version. The first and second digital signatures may be stored in a general-purpose memory portion of the memory arrangement configured for general-purpose read / write access. The third digital signature may be stored in an attribute memory portion of the memory arrangement. The attribute memory portion may not be configured for general-purpose read / write access. The part number signature metadata may include a data block count field storing data indicating a total number of the plurality of data blocks. The part number signature metadata may include a length field storing data indicating a total cumulative length of the key identifier field, the data block count field, the plurality of data block address fields, and the plurality of data block length fields for a host to parse the part number signature metadata. The memory arrangement may store a part number signature corresponding to the part number signature metadata, signed with a key corresponding to the key identifier. The logic circuit may be configured to transmit the part number signature and the part number signature metadata to the host in response to at least one read request. The part number signature metadata and the part number signature may be stored in a general-purpose memory portion of the memory arrangement configured for general-purpose read / write access. The memory locations may store other data unrelated to the part number signature, including print cartridge related data that is updatable over the life of the logic circuit.

Claims

1. A logic circuit package comprising an interface for communicating with a host and a logic circuit, the logic circuit comprising: a memory arrangement for storing digital signature metadata for facilitating verification of associated signed data; The digital signature metadata: a schema identifier field that stores a schema version number to determine which schema the host uses; a key identifier field that stores a signing key identifier so that the host uses the correct key for the verification; a plurality of data block address fields, each of the plurality of data block address fields storing an address corresponding to a respective data block of a plurality of data blocks for which a digital signature is initially calculated; a plurality of data block length fields corresponding to the plurality of data blocks, each of the plurality of data block length fields storing data indicating a length of the corresponding data block; The logic circuit is receiving a read request from the host; a logic circuit package configured to transmit the digital signature metadata to the host in response to the read request;

2. 2. The logic circuit package of claim 1, wherein the digital signature metadata further includes a data block count field that stores data indicating a total number of the plurality of data blocks.

3. 3. The logic circuit package of claim 2, wherein the digital signature metadata further includes a length field storing data indicating a total cumulative length of the key identifier field, the data block count field, the plurality of data block address fields, and the plurality of data block length fields for the host to parse the digital signature metadata.

4. the memory location stores the digital signature corresponding to the digital signature metadata, signed with the key corresponding to the key identifier; 4. The logic circuit package of claim 1, wherein the logic circuit is configured to transmit the digital signature and the digital signature metadata to the host in response to at least one read request.

5. the digital signature metadata and the digital signature are stored in a general purpose memory portion of the memory arrangement configured for general purpose read / write access; the memory arrangement comprises at least one distinct memory portion not intended for general read / write access, for storing at least one cryptographic key and / or a plurality of attributes, and the logic circuitry 5. The logic circuit package of claim 4, configured to perform cryptographic operations using the at least one cryptographic key and / or return attributes of the plurality of attributes in response to an attribute request including an associated attribute tag, the logic circuit configured to associate the attributes with the attribute tags.

6. 6. The logic circuit package of claim 4, wherein the memory location stores a partition map that defines partitions of the memory location, and stores the digital signature, the digital signature metadata, designated data, and other data within the partitions.

7. 7. The logic circuit package according to claim 4, wherein the digital signature is signed for data including at least one of a device type identifier, a logic circuit identifier, a partition map, and specification data.

8. 8. A logic circuit package for a print cartridge according to claim 1, wherein the memory location stores other data unrelated to the digital signature, including print cartridge related characteristics.

9. A replaceable print cartridge comprising the logic circuit package of any one of claims 1 to 8.

10. 1. A method for provisioning a logic circuit package with a memory location, comprising: The processing system a signing key identifier; and and obtaining signature data, The signature data is a device type identifier corresponding to the logic circuit package; a logic circuit identifier for the logic circuit package that allows a host to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions of a general-purpose memory portion of the memory layout of the logic circuit package; data stored in a plurality of data blocks in the general-purpose memory portion of the memory arrangement of the logic circuit package specified by digital signature metadata; concatenating, by the processing system, the signature data; calculating, by the processing system, a digital signature over the concatenated signature data using a signature private key corresponding to the signature key identifier; and writing, by the processing system, the digital signature to the general-purpose memory portion of the memory location of the logic circuit package.

11. The digital signature metadata facilitates verification of associated signed data, the digital signature metadata comprising: a schema identifier field that stores a schema version number for determining which schema the host uses; a key identifier field that stores a signing key identifier so that the host uses the correct key for the verification; a plurality of data block address fields, each of the plurality of data block address fields storing an address corresponding to a respective data block of a plurality of data blocks for which the digital signature is initially calculated; and a plurality of data block length fields corresponding to the plurality of data blocks, each of the plurality of data block length fields storing data indicating a length of the corresponding data block.

12. 12. The method of claim 10 or 11, wherein the partition map includes a partition length and a partition attribute identifier defining each partition of the general purpose memory portion of the memory arrangement.

13. The method of any one of claims 10 to 12, further comprising writing, by the processing system, the digital signature metadata to the general purpose memory portion of the memory arrangement of the logic circuit package.

14. The method of any one of claims 10 to 13, further comprising the step of writing, by the processing system, the logic circuit identifier and the partition map to an attribute memory portion of the memory arrangement of the logic circuit package.

15. 15. The method of claim 10, further comprising the step of writing, by the processing system, the data stored in the plurality of data blocks specified by the digital signature metadata to the general-purpose memory portion of the memory arrangement of the logic circuit package.

16. a logic circuit package comprising an interface for communicating with a controller and logic circuitry, the logic circuitry comprising a memory arrangement; The memory layout is a logic circuit identifier for the controller to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions of a general purpose memory portion of the memory layout; digital signature metadata to facilitate verification of associated signed data; designation data corresponding to the digital signature metadata; a digital signature signed on data including the logic circuit package, the logic circuit identifier, the partition map, and a device type identifier corresponding to the specified data; the logic circuit responding to at least one request from the controller: a logic circuit package configured to transmit the logic circuit identifier, the partition map, the digital signature, the digital signature metadata, and / or other data, and the designation data corresponding to the digital signature metadata to the controller;

17. The digital signature metadata: a key identifier field that stores a signing key identifier so that the controller uses the correct key for the verification; a plurality of data block address fields, each of the plurality of data block address fields storing an address corresponding to a respective data block of a plurality of data blocks for which the digital signature is initially calculated; and a plurality of data block length fields corresponding to the plurality of data blocks, each of the plurality of data block length fields storing data indicating a length of the corresponding data block.

18. The digital signature metadata: a data block count field for storing data indicating the total number of the plurality of data blocks; 20. The logic circuit package of claim 17, further comprising: a length field storing data indicating a total cumulative length of the key identifier field, the data block count field, the plurality of data block address fields, and the plurality of data block length fields for the controller to parse the digital signature metadata.

19. The digital signature metadata:

19. The logic circuit package of claim 17 or 18, further comprising a schema identifier field that stores a schema version number for determining which schema the controller uses.

20. A replaceable print cartridge comprising the logic circuit package of any one of claims 16 to 19.

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