Automated Waveform Verification

Abstract

A system, computer-implemented method, and computer program product for facilitating automated waveform verification are provided. According to one embodiment, the system may include a processor executing computer-executable components stored in a memory, the computer-executable components including a waveform comparison component that compares a digital conversion of an analog signal to a reference signal. (Figure 1)

Description

[Background technology]

[0001] FIELD OF THE DISCLOSURE The present disclosure relates to automated waveform verification, and more particularly to automated waveform verification based on cross-correlation. Summary of the Invention

[0002] The following presents a summary to provide a basic understanding of one or more embodiments of the invention. This summary is not intended to identify key or critical elements or to delineate the scope of any particular embodiments or the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that is presented later. In one or more embodiments described herein, a system, computer-implemented method, and / or computer program product that facilitates automated waveform verification is provided.

[0003] According to one embodiment, a system may include a digital-to-analog converter configured to convert digital data to an analog signal, an analog-to-digital converter configured to convert the analog signal to a digital signal, a memory configured to store computer-executable components, and a processor configured to execute the computer-executable components stored in the memory. The computer-executable components may include a waveform comparison component configured to verify the accuracy of the analog signal based on a comparison of the digital conversion and a reference signal. An advantage of such a system is that the comparison of the digital conversion to the reference signal may be performed automatically, thereby reducing the entity time for comparing waveforms.

[0004] In some embodiments, the waveform verification component may be further configured to determine the validity of the analog signal based on a comparison of the digital conversion to a reference signal. An advantage of such a system is that it can automatically verify that the digital-to-analog converter is operating with acceptable measurement accuracy.

[0005] According to another embodiment, a computer-implemented method may include creating an analog signal with a system operably coupled to a processor, converting the analog signal to a digital conversion with the system, and verifying accuracy of the analog signal based on a comparison of the digital conversion and a reference signal with the system. An advantage of such a computer-implemented method is that the comparison of the digital conversion to the reference signal may be performed automatically, thereby reducing the entity time for comparing waveforms.

[0006] In some embodiments, the computer-implemented method may further comprise determining, by the system, the validity of the analog signal based on a comparison of the digital conversion to the reference signal. An advantage of such a computer-implemented method is that it may automatically verify that a digital-to-analog converter is operating with acceptable measurement accuracy.

[0007] According to another embodiment, a computer program product comprises a computer-readable storage medium having program instructions embodied thereon, the program instructions being executable by a processor to cause the processor to perform steps of: creating an analog signal; converting the analog signal to a digital conversion; and verifying accuracy of the analog signal based on a comparison of the digital conversion and a reference signal. An advantage of such a computer program product is that the comparison of the digital conversion to a reference signal may be performed automatically, thereby reducing the entity time for comparing waveforms.

[0008] In some embodiments, the program instructions are further executable by the processor to cause the processor to determine the validity of the analog signal based on a result of a comparison of the digital conversion to the reference signal. An advantage of such a computer program product is that it can automatically verify that a digital-to-analog converter is operating with acceptable measurement accuracy.

[0009] Various other details of the various embodiments described herein are provided in the following sections.

[0010] Item 1: A system comprising: a digital-to-analog converter configured to convert digital data into an analog signal; an analog-to-digital converter configured to convert the analog signal into a digital signal; a memory configured to store computer-executable components; and a processor configured to execute the computer-executable components stored in the memory, wherein the computer-executable components include: a waveform comparison component configured to verify accuracy of the analog signal based on a comparison of the digital conversion and a reference signal. An advantage of such a system is that the comparison of the digital conversion to a reference signal may be performed automatically, thereby reducing the entity time for comparing waveforms.

[0011] Item 2: The system of any preceding item specified in the Summary of the Invention, wherein the waveform comparison component is further configured to determine that the analog signal is valid based on the result of the comparison of the digital conversion to the reference signal.

[0012] Item 3: The system of any preceding item specified in the Summary of the Invention, wherein the waveform comparison component is further configured to assign a score to the digital conversion and the reference signal, and determine that the analog signal is valid based on the score being less than or equal to a defined threshold.

[0013] Item 4: The system of any preceding item specified in the Summary of the Invention, wherein the waveform comparison component is further configured to generate a lag score based on a cross-correlation of the digital conversion and the reference signal.

[0014] Item 5: The system of any preceding item specified in the Summary of the Invention, wherein the reference signal comprises a set of manually verified data points.

[0015] Item 6: The system of any preceding item specified in the Summary of the Invention, wherein the waveform comparison component is further configured to compare one or more specified data points of the digital conversion to the reference signal.

[0016] Item 7: The system of any preceding item specified in the Summary of the Invention, wherein the computer-executable component further comprises a reference component configured to receive the reference signal and the one or more specified data points as input.

[0017] Item 8: A computer-implemented method comprising: creating an analog signal by a system operably coupled to a processor; converting the analog signal to a digital conversion by the system; and verifying accuracy of the analog signal based on a comparison of the digital conversion and a reference signal by the system. An advantage of such a computer-implemented method is that the comparison of the digital conversion to the reference signal may be performed automatically, thereby reducing the entity time for comparing waveforms.

[0018] Item 9: The computer-implemented method of any preceding item specified in the Summary of the Invention, further comprising a step of determining, by the system, the validity of the analog signal based on the result of the comparison of the digital conversion to the reference signal.

[0019] Item 10: The computer-implemented method of any preceding item specified in the Summary of the Invention, further comprising a step of assigning a score to the digital conversion and the reference signal by the system, wherein the determination of the validity of the analog signal is based on the score being less than or equal to a defined threshold.

[0020] Item 11: The computer-implemented method of any preceding item specified in the Summary of the Invention, further comprising a step of generating a lag score by the system based on a cross-correlation of the digital transform and the reference signal.

[0021] Item 12: The computer-implemented method of any preceding item specified in the Summary of the Invention, wherein the reference signal comprises a set of manually verified data points.

[0022] Item 13: The computer-implemented method of any preceding item specified in the Summary of the Invention, wherein the comparison of the digital transformation to the reference signal comprises comparing one or more specified data points of the digital transformation to the reference signal.

[0023] Item 14: The computer-implemented method of any preceding item specified in the Summary of the Invention, further comprising receiving, by the system, the reference signal and the one or more specified data points of the digital conversion.

[0024] Item 15: A computer program product comprising a computer-readable storage medium having program instructions embodied therein, the program instructions being executable by a processor to cause the processor to perform: generating an analog signal, converting the analog signal to a digital conversion, and verifying accuracy of the analog signal based on a comparison of the digital conversion and a reference signal. An advantage of such a computer program product is that the comparison of the digital conversion to the reference signal may be performed automatically, thereby reducing the entity time for comparing waveforms.

[0025] Item 16: The computer program product of any preceding item specified in the Summary of the Invention, wherein the program instructions are further executable by the processor to cause the processor to perform a procedure for determining, by the processor, the validity of the analog signal based on a result of the comparison of the digital conversion to the reference signal.

[0026] Item 17: The computer program product of any preceding item specified in the Summary of the Invention, wherein the program instructions are further executable by the processor to cause the processor to perform: assigning, by the processor, a score to the digital conversion and the reference signal, wherein determining the validity of the analog signal is based on the score being less than or equal to a defined threshold.

[0027] Item 18: The computer program product of any preceding item specified in the Summary of the Invention, wherein the program instructions are further executable by the processor to cause the processor to perform a procedure of: generating a lag score based on a cross-correlation of the digital transformation and the reference signal.

[0028] Item 19: The computer program product of any preceding item specified in the Summary of the Invention, wherein the reference signal comprises a set of manually verified data points.

[0029] Item 20: The computer program product of any preceding item specified in the Summary of the Invention, wherein the program instructions are further executable by the processor to cause the processor to perform the procedure of receiving the reference signal by the processor. [Brief explanation of the drawings]

[0030] [Figure 1] 1 shows a block diagram of an example non-limiting system that can facilitate automated verification of waveforms in accordance with one or more embodiments described herein.

[0031] [Figure 2] 1 shows a block diagram of an example non-limiting system that can facilitate automated verification of waveforms in accordance with one or more embodiments described herein.

[0032] [Figure 3] 1 shows a block diagram of an example non-limiting system that can facilitate automated verification of waveforms in accordance with one or more embodiments described herein.

[0033] [Figure 4] 1 shows a block diagram of an example non-limiting system that can facilitate automated verification of waveforms in accordance with one or more embodiments described herein.

[0034] [Figure 5] 1 shows a block diagram of an example, non-limiting system that may perform automated waveform verification in accordance with one or more embodiments described herein.

[0035] [Figure 6]1 shows a block diagram of an exemplary method for automated waveform verification in accordance with one or more embodiments as described herein.

[0036] [Figure 7] 10 shows a graph illustrating the results of an example of automated waveform verification in accordance with one or more embodiments described herein.

[0037] [Figure 8] 10 shows a graph illustrating the results of an example of automated waveform verification in accordance with one or more embodiments described herein.

[0038] [Figure 9] 10 shows a graph illustrating the results of an example of automated waveform verification in accordance with one or more embodiments described herein.

[0039] [Figure 10] 1 illustrates a flow diagram of an exemplary, non-limiting computer-implemented method that may facilitate automated waveform verification in accordance with one or more embodiments described herein.

[0040] [Figure 11] 1 illustrates a block diagram of an exemplary non-limiting operating environment in which one or more embodiments described herein may be facilitated. DETAILED DESCRIPTION OF THE INVENTION

[0041] The following detailed description is merely exemplary and is not intended to limit the embodiments and / or the application or uses of the embodiments, nor is it intended to be bound by any express or implied information presented in the preceding Background or Summary sections or in the Detailed Description section.

[0042] Verifying the time-domain characteristics of analog signals is often a manual process. For example, verification often involves capturing images using an oscilloscope and then an entity performing analysis based on metrics. The verification process often uses a significant amount of time and human resources to execute. However, an automated waveform verification process allows for automated hardware verification to ensure that basic hardware functionality is maintained across logic changes. Automated verification can also allow for flexibility with small amplitude and phase differences, which can be useful for experiments requiring lower precision standards.

[0043] One or more embodiments will now be described with reference to the drawings. Like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. It will be apparent, however, that in various instances, one or more embodiments may be practiced without these specific details.

[0044] Considering the above-mentioned problems with existing waveform verification techniques, the present disclosure may be implemented to create solutions to these problems in the form of a system, computer-implemented method, and / or computer program product that may facilitate automatic waveform verification by comparing a digital conversion of an analog signal to a reference signal. An advantage of such a system, computer-implemented method, and / or computer program product is that the comparison of the digital conversion to the reference signal may be performed automatically, thereby reducing the entity time used to compare waveforms.

[0045] In some embodiments, the present disclosure may be implemented to create a solution to the above problem in the form of a system, computer-implemented method, and / or computer program product that may further facilitate automatic waveform verification by determining the validity of an analog signal based on the results of a comparison of the digital conversion to a reference signal. An advantage of such a system, computer-implemented method, and / or computer program product is that they may be implemented to automatically verify that a digital-to-analog converter is operating with acceptable measurement accuracy.

[0046] As referred to herein, an "entity" may include a human, a client, a user, a computing device, a software application, an agent, a machine learning (ML) model, an artificial intelligence (AI) model, and / or another entity.

[0047] 1, 2, 3, and 4 show block diagrams of an exemplary, non-limiting waveform verification system 101 that can facilitate automated verification of waveforms in accordance with one or more embodiments described herein. Waveform verification system 101 can include memory 102, processor 103, bus 118, and waveform comparison component 104. In some embodiments, waveform verification system 101 can further include digital-to-analog converter 201, analog-to-digital converter 202, reference component 301, and / or waveform generator 401.

[0048] It should be understood that the embodiments of the present disclosure illustrated in the various figures disclosed herein are for illustrative purposes only, and thus the architecture of such embodiments is not limited to the systems, devices, and / or components illustrated therein. For example, in some embodiments, waveform verification system 101 may further include various computers and / or computing-based elements described herein with reference to operating environment 1100 and FIG. 11. In some embodiments, such computers and / or computing-based elements may be used in connection with implementing one or more of the systems, devices, components, and / or computer-implemented operations shown and described in connection with FIG. 1 and / or other figures disclosed herein.

[0049] Memory 102 may store one or more computer- and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processor 103 (e.g., a classical processor, a quantum processor, and / or another type of processor), may facilitate performance of operations defined by the executable components and / or instructions. For example, memory 102 may store computer- and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processor 103, may facilitate performance of various functions described herein with respect to waveform comparison component 104, digital-to-analog converter 201, analog-to-digital converter 202, reference component 301, waveform generator 401, and / or any other components associated with waveform verification system 101.

[0050] The memory 102 may include volatile memory (e.g., random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), and / or another type of volatile memory) and / or non-volatile memory (e.g., read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), and / or another type of non-volatile memory), which may utilize one or more memory architectures. Further examples of memory 102 are described below with reference to system memory 1116 and FIG. 11 . Such examples of memory 102 may be utilized to implement any embodiment of the present disclosure.

[0051] Processor 103 may include one or more types of processors and / or electronic circuits (e.g., classical processors, quantum processors, and / or other types of processors and / or electronic circuits) that may implement one or more computer- and / or machine-readable, writable, and / or executable components and / or instructions that may be stored in memory 102. For example, processor 103 may perform various operations that may be specified by such computer- and / or machine-readable, writable, and / or executable components and / or instructions, including, but not limited to, logic, control, input / output (I / O), arithmetic, and / or the like. In some embodiments, processor 103 may include one or more central processing units, multi-core processors, microprocessors, dual microprocessors, microcontrollers, systems-on-chips (SOCs), array processors, vector processors, quantum processors, and / or other types of processors. Further examples of processor 103 are described below with reference to processing unit 1114 and FIG. 11 . Such examples of processor 103 may be utilized to implement any embodiment of the present disclosure.

[0052] The waveform verification system 101, memory 102, processor 103, waveform comparison component 104, reference component 301, waveform generator 401, digital-to-analog converter 201, analog-to-digital converter, and / or other components of the waveform verification system 101 as described herein may be communicatively, electrically, operatively, and / or optically coupled to each other via bus 118 to perform the functions of the waveform verification system 101 and / or any components coupled thereto. The bus 118 may include one or more memory buses, memory controllers, peripheral buses, external buses, local buses, quantum buses, and / or other types of buses that may utilize various bus architectures. Further examples of the bus 118 are described below with reference to the system bus 1118 and FIG. 11 . Such examples of the bus 118 may be utilized to implement any embodiment of the present disclosure.

[0053] The waveform verification system 101 may include any type of component, machine, device, equipment, apparatus, and / or instrument, including a processor, and / or may be capable of effective and / or operative communication with a wired and / or wireless network. All such embodiments are contemplated. For example, the waveform verification system 101 may include a server device, a computing device, a general-purpose computer, a special-purpose computer, a quantum computing device (e.g., a quantum computer), a tablet computing device, a handheld device, a server-class computing machine and / or database, a laptop computer, a notebook computer, a desktop computer, a mobile phone, a smartphone, a consumer electronics and / or instrumentation, an industrial and / or commercial device, a digital assistant, a multimedia Internet-enabled phone, a multimedia player, and / or another type of device.

[0054] The waveform validation system 101 can be coupled (e.g., communicatively, electrically, operatively, optically, and / or via another type of coupling) to one or more external systems, sources, and / or devices (e.g., classical and / or quantum computing devices, communication devices, and / or another type of external system, source, and / or device) using wires and / or cables. For example, the waveform validation system 101 can be coupled (e.g., communicatively, electrically, operatively, optically, and / or via another type of coupling) to one or more external systems, sources, and / or devices (e.g., classical and / or quantum computing devices, communication devices, and / or another type of external system, source, and / or device) using data cables, including, but not limited to, High-Definition Multimedia Interface (HDMI) cables, Recommended Standard (RS) 232 cables, Ethernet cables, and / or other data cables.

[0055] In some embodiments, the waveform verification system 101 may be coupled (e.g., communicatively, electrically, operatively, optically, and / or via another type of coupling) to one or more external systems, sources, and / or devices (e.g., classical and / or quantum computing devices, communication devices, and / or another type of external system, source, and / or device) via a network. For example, such networks may include wired and / or wireless networks, including, but not limited to, a cellular network, a wide area network (WAN) (e.g., the Internet), or a local area network (LAN). The waveform verification system 101 may be used to verify the validity of a wide variety of wireless technologies, including, but not limited to, Wireless Fidelity (Wi-Fi), Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX), Enhanced General Packet Radio Service (Enhanced GPRS), Third Generation Partnership Project (3GPP) Long Term Evolution (LTE), Third Generation Partnership Project 2 (3GPP2) Ultra Mobile Broadband (UMB), High Speed ​​Packet Access (HSPA), Zigbee, and other 802.XX wireless standards. The device may communicate with one or more external systems, sources, and / or devices, such as computing devices, using virtually any desired wired and / or wireless technology, including wired and / or legacy telecommunications technologies, BLUETOOTH®, Session Initiation Protocol (SIP), ZIGBEE®, RF4CE protocol, WirelessHART protocol, 6LoWPAN (IPv6 over Low Power Wireless Area Network), Z-Wave, ANT, Ultra-Wideband (UWB) standard protocols, and / or other proprietary and non-proprietary communication protocols.Thus, in some embodiments, the waveform verification system 101 may include hardware (e.g., a central processing unit (CPU), a transceiver, a decoder, quantum hardware, a quantum processor, and / or other hardware), software (e.g., a set of threads, a set of processes, running software, a quantum pulse schedule, a quantum circuit, a quantum gate, and / or other software), or a combination of hardware and software that may facilitate communicating information between the waveform verification system 101 and external systems, sources, and / or devices (e.g., a computing device, a communication device, and / or another type of external system, source, and / or device).

[0056] Waveform verification system 101 may include one or more computer- and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processor 103 (e.g., a classical processor, a quantum processor, and / or another type of processor), may facilitate performance of operations defined by such components and / or instructions. Furthermore, in many embodiments, any component associated with waveform verification system 101 described herein with or without reference to various figures of this disclosure may include one or more computer- and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processor 103, may facilitate performance of operations defined by such components and / or instructions. For example, waveform comparison component 104, reference component 301, waveform generator 401, digital-to-analog converter 201, analog-to-digital converter 202, and / or any other component associated with (e.g., communicatively, electronically, operatively, and / or optically coupled to and / or utilized by) waveform verification system 101 as disclosed herein may include such computer- and / or machine-readable, writable, and / or executable components and / or instructions. As a result, according to many embodiments, waveform verification system 101 as disclosed herein and / or any components associated therewith may utilize processor 103 to execute such computer- and / or machine-readable, writable, and / or executable components and / or instructions to facilitate performance of one or more operations described herein with reference to waveform verification system 101 and / or any such components associated therewith.

[0057] Waveform verification system 101 may facilitate (e.g., via processor 103) the performance of operations performed by and / or associated with waveform comparison component 104, reference component 301, waveform generator 401, digital-to-analog converter 201, analog-to-digital converter 202, and / or another component associated with waveform verification system 101 as disclosed herein. For example, as described in detail below, waveform verification system 101 may facilitate (e.g., via processor 103): comparing a digital conversion of an analog signal to a reference signal. In another example, as described in detail below, waveform verification system 101 may further (e.g., via processor 103): determine the validity of the analog signal based on the results of comparing the digital conversion of the analog signal to the reference signal.

[0058] The waveform comparison component 104 may be configured to verify the accuracy of the analog signal based on a comparison of the digital conversion and the reference signal. For example, the waveform comparison component 104 may receive a digital conversion of the analog signal and a reference signal. In one embodiment, the reference signal may include a digital conversion of a previously verified analog signal. For example, the analog signal may be manually verified by an entity, and the digital conversion of the manually verified signal may then be stored by the waveform comparison component 104 for future use. The digital conversion of the analog signal may include a series of data points representing the amplitude of the waveform at various times. For example, the digital conversion may include a series of points, where the X coordinate of the point represents the time and the Y coordinate represents the amplitude of the analog signal. Accordingly, the waveform comparison component 104 may compare a set of data points of the digital conversion of the analog signal to a set of data points of the reference signal to determine the similarity between the two waveforms.

[0059] In one embodiment, the waveform comparison component 104 may be configured to determine the validity of the analog signal based on a comparison of a digital conversion of the analog signal to a reference signal. For example, an entity may provide an accuracy threshold to the waveform comparison component 104. If the similarity between the digital conversion and the reference signal is within the threshold, then the analog signal may be determined to be valid. If the similarity between the digital conversion and the reference signal is not within the threshold, then the analog signal may be determined to be invalid.

[0060] In one embodiment, the waveform comparison component 104 may be configured to generate a lag score based on the cross-correlation of the digital transform and the reference signal. For example, the cross-correlation (e.g., a measure of similarity between two data sets as a measure of displacement relative to one another) may produce a normalized lag score between 0 and 1 for each lag of the convolution (e.g., a function created by the cross-correlation of the digital transform and the reference signal), where the higher the normalized lag score (e.g., scaled to fall between 0 and 1), the greater the similarity (e.g., similarity in amplitude between points) between the points of the digital transform and the reference signal at that lag value. Accordingly, a lag score of 1 may correspond to an exact match between the digital transform and the reference signal at that lag value. In one embodiment, the lag score may be utilized as a measure of similarity. For example, the waveform comparison component 104 may determine the average of all lag scores of the comparison, where the average represents the overall similarity between the digital transform and the reference signal. For example, an average lag score of 0.9 may represent an overall similarity of 90%. In another embodiment, the lag score may be compared against a threshold value to determine the validity of the analog signal. For example, if the threshold value specifies a lag score of 0.9 or greater, a lag score of 0.95 is valid, while a lag score of 0.85 is invalid.

[0061] In a further embodiment, the waveform comparison component 104 may be configured to compare one or more specific points of interest between the digital translation and the reference signal. For example, the waveform comparison component 104 may determine the point with the highest lag score and compare the lag score of the point to a threshold value. For example, if the highest lag score of the comparison point is 0.99, then the waveform comparison component 104 may compare the lag score of 0.99 to a threshold value. In this embodiment, by analyzing the point where the comparison between the digital translation and the reference signal produces the highest lag score (e.g., the most similar point), the waveform comparison component 104 may detect amplitude variations between the digital translation and the reference signal. In another embodiment, the waveform comparison component 104 may be configured to compare the lag scores of one or more specific points of the digital translation and the reference signal. For example, the waveform comparison component 104 may compare points of the digital translation and the reference signal that have the same time coordinate. In this embodiment, the lag score then measures the time delay between the digital translation and the reference signal, which may represent phase variations between the two waveforms.

[0062] The digital-to-analog converter (DAC) 201 may be configured to convert a series of digital data points into an analog signal. For example, the DAC 201 may receive a series of digital data points representing a waveform, such as that created by the waveform generator 401, and output an analog signal based on the data points. However, DACs may be susceptible to hardware failures, in which a DAC, such as the DAC 201, may not create a proper analog signal from the digital data points. The analog-to-digital converter (ADC) 202 may be configured to capture the analog signal and create a digital conversion of the analog signal. The digital conversion may then be passed to the waveform comparison component 104, which may perform the comparison and analysis as described above. For example, when the waveform comparison component 104 determines that the analog signal created by the DAC 201 is invalid, the waveform comparison component 104 may then output a notification to the entity that the DAC 201 is not operating properly. Similarly, when the waveform comparison component 104 determines that the analog signal produced by the DAC 201 is valid, then the waveform comparison component 104 may output a notification to the entity that the DAC 201 is operating properly.

[0063] The reference component 301 may be configured to receive as inputs a reference signal and comparison criteria, such as those described above. For example, the reference component 301 may receive digital data representing a manually verified reference signal, a threshold for validity comparison, and a type of analysis, such as an average lag score analysis, an analysis of specific points of interest, or a maximum lag score comparison, as described above. The reference component 301 may then pass these inputs to the waveform comparison component 104 for utilization.

[0064] The waveform generator 401 may be configured to generate a set of data points representing a waveform function and pass the data points to the DAC 201. For example, the waveform generator 401 may receive as input a waveform function for an intended waveform. The waveform generator 401 may then generate a series of data points representing the waveform, which may be passed to the DAC 201 for conversion to an analog signal.

[0065] 5 shows a block diagram of a system 500 that can perform automated waveform verification in accordance with one or more embodiments described herein. Repetitive descriptions of similar elements and / or processes utilized in each embodiment are omitted for the sake of brevity.

[0066] In one embodiment, system 500 may include a waveform generator 401, a waveform comparison component 104, a digital-to-analog converter (DAC) 201, and an analog-to-digital converter (ADC) 202. For example, waveform generator 401 may create digital data representing a waveform. The digital data may then be passed to DAC 201, which converts the digital data to an analog signal 502. ADC 202 may then convert analog signal 502 to a digital representation, which may be passed to waveform comparison component 104. Waveform comparison component 104 may then store the incoming data and perform analysis on it.

[0067] For example, the waveform comparison component 104 may compare the digital representation to a manually verified set of previously captured data. The comparison may be performed using a cross-correlation algorithm that creates a normalized lag score between 0 and 1 for each lag of the convolution. A normalized lag score of 1 corresponds to an exact match at that lag value. This score vector may then be compared against a specified threshold to determine whether the test is successful or not. In one embodiment, the maximum score may be compared against the threshold. In this embodiment, the points that most closely match the manually verified data are analyzed, which may be used to detect amplitude variations. In another embodiment, a specific point or points from the lag score vector may be used. This allows for the comparison of points that may be time-delayed and used to detect phase variations. In one embodiment, the manually verified set of previously captured data may be limited to points of interest in the waveform. For example, rather than including data points representing the complete waveform, in one embodiment, the manually verified set of previously captured data may include only data points that represent a region of interest in the waveform.

[0068] 6 shows a block diagram of an exemplary method 600 of automated waveform verification in accordance with one or more embodiments as described herein. Repetitive descriptions of similar elements and / or processes utilized in each embodiment are omitted for the sake of brevity.

[0069] For example, the waveform comparison component 104 may receive a reference signal 602 and a captured signal 603. In one embodiment, the reference signal may include a set of data points representing a manually verified analog signal. The captured signal 603 may include a digital conversion of the analog signal, such as that produced by the ADC 202. The waveform comparison component 104 may then determine a correlation coefficient 604 between the reference signal 602 and the captured signal 603, as described above in connection with FIGS. 1-4.

[0070] 7 shows graphs 701, 702, and 703 illustrating examples of automated waveform verification in accordance with one or more embodiments described herein. Repetitive descriptions of similar elements and / or processes utilized in each embodiment are omitted for the sake of brevity.

[0071] Graph 701 shows an example of a manually verified waveform 710. In one embodiment, waveform 710 may be stored as digital data that has previously been manually verified to ensure accuracy. Graph 702 shows an exemplary test waveform 720. For example, as described in detail above, waveform generator 401 may generate data points representing a waveform that may be passed to DAC 201. DAC 201 may then convert the digital data points to an analog signal. The analog signal may then be converted by ADC 202 into a digital representation of test waveform 720. Graph 703 shows the results of an analysis of waveforms 710 and 720. For example, waveform comparison component 104 may perform a comparison of waveforms 710 and 720 using a cross-correlation algorithm. As shown, the Y value of point 730 indicates that the normalized lag score of the comparison between waveforms 710 and 720 is 0.9988, or 99.88% accuracy. Waveform comparison component 104 may then compare the normalized lag score to an accuracy threshold. For example, if the accuracy threshold is 99% accuracy, then waveform 720 is acceptable because the normalized lag score is within the accuracy threshold.

[0072] 8 shows graphs 801, 802, and 803 illustrating examples of automated waveform verification in accordance with one or more embodiments described herein. Repetitive descriptions of similar elements and / or processes utilized in each embodiment are omitted for the sake of brevity.

[0073] Graph 801 shows an example of a manually verified waveform 810. In one embodiment, waveform 810 may be stored as digital data that has previously been manually verified to ensure accuracy. Graph 802 shows an exemplary test waveform 820. For example, as described in detail above, waveform generator 401 may generate data points representing a waveform that may be passed to DAC 201. DAC 201 may then convert the digital data points to an analog signal. The analog signal may then be converted by ADC 202 into a digital representation of waveform 820. As shown, waveform 820 has a small error 825 due to calibration of DAC 201. Graph 803 shows the results of an analysis of waveforms 810 and 820. For example, waveform comparison component 104 may perform a comparison of waveforms 810 and 820 utilizing a cross-correlation algorithm. As shown, the Y value of point 830 results in a normalized lag score of the comparison between waveforms 810 and 820 of 0.9799, or 97.99% accuracy. Waveform comparison component 104 may then compare the normalized lag score to an accuracy threshold. For example, if the accuracy threshold is 99% accuracy, then waveform 820 is unacceptable because the normalized lag score is outside the accuracy threshold. However, it should be understood that the accuracy threshold may be set to account for small errors that would not affect the usability of the waveform. For example, if the accuracy threshold is 90%, waveform 820 is acceptable.

[0074] 9 shows graphs 901, 902, and 903 illustrating examples of automated waveform verification in accordance with one or more embodiments described herein. Repetitive descriptions of similar elements and / or processes utilized in each embodiment are omitted for the sake of brevity.

[0075] Graph 901 shows an example of a manually verified waveform 910. In one embodiment, waveform 910 may be stored as digital data that has previously been manually verified to ensure accuracy. Graph 902 shows an exemplary test waveform 920. For example, as described in detail above, waveform generator 401 may generate data points representing a waveform that may be passed to DAC 201. DAC 201 may then convert the digital data points to an analog signal. As shown in graph 902, waveform 920 is highly different from manually verified waveform 910. The analog signal may then be converted by ADC 202 into a digital representation of waveform 920. Graph 903 shows the results of an analysis of waveforms 910 and 920. For example, waveform comparison component 104 may perform a comparison of waveforms 910 and 920 utilizing a cross-correlation algorithm. As shown, the Y value of point 930 indicates that the normalized lag score for the comparison between waveforms 910 and 920 is 0.1878, or 18.78% accuracy. The waveform comparison component 104 may then compare the normalized lag score to an accuracy threshold. For example, if the accuracy threshold is 99% accuracy, then waveform 920 is acceptable because the normalized lag score is not within the accuracy threshold. Accordingly, waveform 920 is not acceptable.

[0076] 10 illustrates a flow diagram of an exemplary, non-limiting, computer-implemented method 1000 that may facilitate automated verification of waveforms in accordance with one or more embodiments described herein. Repetitive descriptions of similar elements and / or processes utilized in each embodiment are omitted for the sake of brevity.

[0077] At 1010, the computer-implemented method 1000 may include creating an analog signal of the waveform by a system (e.g., waveform verification system 101, waveform generator 401, and / or DAC 201) operably coupled to a processor (e.g., processor 103).

[0078] At 1020, the computer-implemented method 1000 may include converting the analog signal to digital by a system (eg, the waveform verification system 101 and / or the ADC 202).

[0079] At 1030, the computer-implemented method 1000 may include verifying the accuracy of the analog signal based on the comparison of the digital conversion and the reference signal by a system (e.g., waveform verification system 101 and / or waveform comparison component 104). For example, as described above with reference to Figures 1-4, the waveform comparison component 104 may utilize a cross-correlation algorithm to create a normalized lag score between 0 and 1 for each lag of the convolution of the digital conversion and the reference signal.

[0080] At 1040, the computer-implemented method 1000 may include determining, by the system, the validity of the analog signal based on the results of the comparison of the digital conversion to a reference signal. For example, as described in detail above with reference to Figures 1 through 4, the maximum lag score may be compared against a threshold, where if the maximum lag score is within the threshold, then the analog signal is determined to be valid. In another example, one or more consistent points of lag score may be compared against a threshold, where if the lag score of one or more consistent points is within the threshold, then the analog signal is determined to be valid.

[0081] The waveform verification system 101 may provide technical improvements to processing units associated with the waveform verification system 101. For example, by determining waveform validity based on points of maximum similarity or based on one or more specified points, the waveform verification system 101 may reduce the number of data point comparisons utilized to determine waveform validity, thereby reducing the workload of processing units (e.g., processor 103) utilized to execute routines (e.g., instructions and / or processing threads) involved in waveform verification. In this example, by reducing the workload of such processing units (e.g., processor 103), the waveform verification system 101 may thereby facilitate improved performance, improved efficiency, and / or reduced computational costs associated with such processing units.

[0082] A practical application of the waveform verification system 101 is that it allows for automated verification of waveforms and therefore verifies that hardware such as digital-to-analog converters are operating properly without requiring human time and resources.

[0083] The waveform validation system 101 may utilize hardware and / or software to solve problems that are highly technical in nature, not abstract, and cannot be performed as a set of mental activities by a human. For example, the human mind cannot create an analog waveform signal from digital data or convert an analog signal to digital. In some embodiments, one or more of the processes described herein may be performed by one or more specialized computers (e.g., specialized processing units, specialized classical computers, specialized quantum computers, and / or another type of specialized computer) to perform defined tasks related to the various technologies identified above. The waveform validation system 101 and / or its components may be utilized to solve new problems that arise through the use of advances in the above-referenced technologies, quantum computing systems, cloud computing systems, computer architectures, and / or other technologies.

[0084] It should be understood that waveform verification system 101 may utilize various combinations of electrical components, mechanical components, and circuitry that cannot be replicated in human thought or performed by a human being, as the various operations that may be performed by waveform verification system 101 and / or its components as described herein are operations that are greater than the capabilities of the human mind. For example, the amount of data processed, the speed at which such data is processed, or the types of data processed by waveform verification system 101 over a particular period of time may be greater than, faster than, or different from the amount, speed, or types of data that can be processed by the human mind over the same period of time.

[0085] According to some embodiments, the waveform verification system 101 may also be fully operable toward performing one or more other functions (e.g., fully powered, fully running, and / or separate functions) while also performing the various operations described herein. It should be understood that such simultaneous multi-operation performance exceeds the capabilities of the human mind. It should also be understood that the waveform verification system 101 may contain information that is impossible to manually obtain by an entity such as a human user. For example, the type, amount, and / or variety of information contained in the waveform verification system 101, waveform comparison component 104, reference component 301, waveform generator 401, DAC 201, and / or ADC 202 may be more complex than information manually obtained by an entity such as a human user.

[0086] For simplicity of explanation, computer-implemented methods are illustrated and described as a series of actions. It is understood and appreciated that the subject innovation is not limited by the actions shown and / or by the order of the actions; for example, actions may occur in various orders and / or simultaneously, with other actions not presented and described herein. Moreover, not all illustrated actions may be required to implement a computer-implemented method in accordance with the disclosed subject matter. In addition, those skilled in the art will understand and appreciate that a computer-implemented method may alternatively be represented as a series of interrelated states via a state diagram or events. Additionally, it is further appreciated that the computer-implemented methods disclosed below and throughout this specification can be stored on an article of manufacture to facilitate transporting and transferring such computer-implemented methods to a computer. The term article of manufacture, as used herein, is intended to encompass a computer program accessible from any computer-readable device or storage medium.

[0087] 11 , a suitable operating environment 1100 for implementing various aspects of the disclosure may include a computer 1112. The computer 1112 may also include a processing unit 1114, a system memory 1116, and a system bus 1118. The system bus 1118 couples system components including, but not limited to, the system memory 1116 to the processing unit 1114. The processing unit 1114 may be any of a variety of available processors. Dual microprocessors and other multi-processor architectures may also be utilized as the processing unit 1114. The system bus 1118 may be any of several types of bus structures, including a memory bus or memory controller, a peripheral bus or external bus, and / or a local bus using any of a variety of available bus architectures, including, but not limited to, Industry Standard Architecture (ISA), Micro Channel Architecture (MSA), Enhanced ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), CardBus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), Firewire (IEEE 13114), and Small Computer System Interface (SCSI).

[0088] The system memory 1116 may also include volatile memory 1120 and nonvolatile memory 1122. A basic input / output system (BIOS), containing the basic routines for transferring information between elements within the computer 1112, such as during start-up, is stored in the nonvolatile memory 1122. The computer 1112 may also include removable / non-removable, volatile / non-volatile computer storage media. FIG. 11 illustrates, for example, disk storage 1124. The disk storage 1124 may also include devices such as, but not limited to, a magnetic disk drive, a floppy disk drive, a tape drive, a Jaz drive, a Zip drive, an LS-100 drive, a flash memory card, or a memory stick. The disk storage 1124 may also include storage media separately from or in combination with other storage media. A removable or non-removable interface, such as interface 1126, is typically used to facilitate connection of the disk storage 1124 to the system bus 1118. FIG. 11 also illustrates software that acts as an intermediary between users and the basic computer resources described in suitable operating environment 1100. Such software may also include, for example, operating system 1128. Operating system 1128, which may be stored on disk storage 1124, acts to control and allocate resources of the computer 1112.

[0089] System applications 1130 take advantage of the management of resources by operating system 1128 through program modules 1132 and program data 1134, stored, for example, either in system memory 1116 or on disk storage 1124. It should be appreciated that the present disclosure may be implemented with various operating systems or combinations of operating systems. Users enter commands or information into computer 1112 through input devices 1136. Input devices 1136 include, but are not limited to, pointing devices such as a mouse, trackball, stylus, touchpad, keyboard, microphone, joystick, gamepad, satellite dish, scanner, TV tuner card, digital camera, digital video camera, webcam, and the like. These and other input devices connect to processing unit 1114 through system bus 1118 via interface ports 1138. Interface ports 1138 include, for example, serial ports, parallel ports, game ports, and universal serial bus (USB). Output devices 1140 use several of the same types of ports as input devices 1136. Thus, for example, a USB port may be used to provide input to computer 1112 and to output information from computer 1112 to output device 1140. Output adapter 1142 is provided to illustrate that there are some output devices 1140, such as monitors, speakers, and printers, among other output devices 1140, that require special adapters. Output adapters 1142 include, by way of example and not limitation, video and sound cards that provide a means of connection between output device 1140 and system bus 1118. It should be noted that other devices and / or systems of devices provide both input and output capabilities, such as remote computer 1144.

[0090] The computer 1112 may operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 1144. The remote computer 1144 may be a computer, a server, a router, a network PC, a workstation, a microprocessor-based device, a peer device or other common network node, etc., and may typically include many or all of the elements described relative to the computer 1112. For purposes of simplicity, only a memory storage device 1146 is shown with the remote computer 1144. The remote computer 1144 is logically connected to the computer 1112 through a network interface 1148 and, in turn, physically connected via communication connection 1150. The network interface 1148 encompasses wired and / or wireless communication networks such as a local area network (LAN), a wide area network (WAN), a cellular network, and / or another wired and / or wireless communication network. LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), Ethernet, Token Ring, etc. WAN technologies include, but are not limited to, point-to-point links, circuit-switched networks such as Integrated Services Digital Networks (ISDN) and its variations, packet-switched networks, and Digital Subscriber Lines (DSL). Communications connection(s) 1150 refer to the hardware / software utilized to connect network interface 1148 to system bus 1118. For clarity of illustration, communications connection(s) 1150 are shown within computer 1112, but can also be external to computer 1112. The hardware / software for connecting to network interface 1148 can also include, by way of example only, internal and external technologies such as ordinary telephone-grade modems, cable modems, modems including DSL modems, ISDN adapters, Ethernet cards, etc.

[0091] The present invention may be a system, method, apparatus, and / or computer program product at any possible level of technical detail of integration. A computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions for causing a processor to perform aspects of the present invention. A computer-readable storage medium may be a tangible device capable of holding and storing instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media may include portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disks (DVD), memory sticks, floppy disks, mechanically encoded devices such as punch cards or ridge structures in grooves with instructions recorded thereon, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium should not be construed as being a transitory signal per se, such as an electric wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse passing through a fiber optic cable), or an electrical signal transmitted through a wire.

[0092] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device. The computer-readable program instructions for carrying out operations of the present invention may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, or the like, conventional procedural programming languages ​​such as the C programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (e.g., through the Internet using an Internet Service Provider).In some embodiments, to carry out aspects of the present invention, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may execute computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuitry.

[0093] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to create a machine. As a result, the instructions, executed by the processor of the computer or other programmable data processing apparatus, form means for implementing the function / acts specified in a block or blocks of the flowchart illustrations and / or block diagrams. These computer-readable program instructions may also be stored on a computer-readable storage medium capable of instructing a computer, programmable data processing apparatus, and / or other device to function in a particular manner, such that the computer-readable storage medium having the instructions stored thereon comprises an article of manufacture having instructions for implementing aspects of the function / acts specified in one or more blocks of the flowchart illustrations and / or block diagrams. The computer-readable program instructions may also be loaded into a computer, other programmable data processing apparatus, or other device and cause the computer, other programmable apparatus, or other device to perform a series of operational actions to create a computer-implemented process, such that the instructions executing on the computer, other programmable apparatus, or other device implement the functions / actions specified in one or more blocks of the flowcharts and / or block diagrams.

[0094] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions, including one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions described in the blocks may occur out of the order described in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may possibly be executed in the reverse order, depending on the functionality involved. It should also be noted that each block of the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or executes a combination of dedicated hardware and computer instructions.

[0095] While the present subject matter has been described above in the general context of computer-executable instructions for a computer program product executed on one computer and / or multiple computers, those skilled in the art will recognize that the present disclosure can also be implemented in combination with other program modules. Generally, program modules include routines, programs, components, data structures, and / or other program modules that perform particular tasks and / or implement particular abstract data types. Those skilled in the art will also appreciate that the computer-implemented methods of the present invention can be practiced with other computer system configurations, including single-processor or multiprocessor computer systems, minicomputing devices, mainframe computers, computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer or industrial electronics, etc. The illustrated aspects can also be practiced in distributed computing environments where tasks are performed by remote processing devices linked through a communications network. However, some, if not all, aspects of the present disclosure can be practiced on stand-alone computers. In a distributed computing environment, program modules can be located in both local and remote memory storage devices. For example, in one or more embodiments, the computer-executable components may execute from a memory that may include or consist of one or more distributed memory units. As used herein, the terms "memory" and "memory unit" are interchangeable. Furthermore, one or more embodiments described herein may execute code of the computer-executable components in a distributed manner (e.g., multiple processors combining or acting cooperatively to execute code from one or more distributed memory units). As used herein, the term "memory" may encompass a single memory or memory unit in one location, or multiple memories or memory units in one or more locations.

[0096] As used herein, terms such as “component,” “system,” “platform,” and “interface” may refer to and / or include computer-related entities or entities associated with an operating machine having one or more specific functions. The entities disclosed herein may be hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. By way of example, both an application running on a server and the server may be a component. One or more components may reside in a process and / or thread of execution, and components may be localized on one computer and / or distributed among two or more computers. In another example, each component may execute from various computer-readable media having various data structures stored thereon. Components may communicate via local and / or remote processes, such as signals, comprising one or more data packets (e.g., data from one component interacting with another component in a local system, a distributed system, and / or a network such as the Internet with other systems via signals). As another example, a component may be a device having inherent functionality provided by mechanical parts operated by electrical or electronic circuitry operated by a software or firmware application executed by a processor. In such cases, the processor may be internal or external to the device and may execute at least a portion of the software or firmware application. As yet another example, a component may be a device that provides inherent functionality without mechanical parts through electronic components that may include a processor or other means for executing software or firmware that provides at least a portion of the functionality of the electronic component.In some aspects, the component may emulate an electronic component via a virtual machine, for example, in a cloud computing system.

[0097] Additionally, the term "or" is intended to mean an inclusive "or," rather than an exclusive "or." That is, unless otherwise specified or clear from context, "X utilizes A or B" is intended to mean any of the natural inclusive permutations. That is, in any of the foregoing examples, "X utilizes A or B" is satisfied if X utilizes A, if X utilizes B, or if X utilizes both A and B. Also, as used in this specification and the accompanying drawings, the articles "a" and "an" should generally be construed to mean "one or more" unless otherwise specified or clear from context to refer to the singular form. As used herein, the terms "example" and / or "exemplary" are used to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. Additionally, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs, and is not meant to exclude equivalent exemplary structures and techniques known to those skilled in the art.

[0098] The term "processor" as used herein may refer to virtually any computing processing unit or device, including, but not limited to, a single-core processor; a single processor with software multithreading execution capabilities; a multi-core processor; a multi-core processor with software multithreading execution capabilities; a multi-core processor with hardware multithreading technology; a parallel platform; and a parallel platform with distributed shared memory. Additionally, a processor may refer to an integrated circuit, an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Furthermore, a processor may utilize nanoscale architectures, such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates, to optimize space usage or enhance the performance of user equipment. A processor may also be implemented as a combination of computing processing units. In this disclosure, terms such as “store,” “storage,” “data store,” “data storage,” “database,” and substantially any other information storage component associated with the operation and functionality of a component are utilized to refer to a “memory” or “memory component” entity embodied in a component that includes memory. It should be understood that the memory and / or memory components described herein may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. By way of example and not limitation, nonvolatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or nonvolatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)).Volatile memory may include, for example, RAM, which may act as external cache memory. By way of example, and not limitation, RAM is available in many forms, including synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), SyncLink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM). Additionally, the memory components disclosed of systems or computer-implemented methods herein are intended to comprise, but not be limited to, these and any other suitable types of memory.

[0099] The foregoing includes merely exemplary systems and computer-implemented methods. Of course, for purposes of describing this disclosure, it is not possible to describe every conceivable combination of components or computer-implemented methods, but one of ordinary skill in the art will recognize that many further combinations and permutations of the present disclosure are possible. Furthermore, to the extent that terms such as "includes," "has," and "possesse" are used in the detailed description, claims, appendices, and drawings, such terms are intended to be inclusive in the same manner as the term "comprising," as "comprising" is interpreted when used as a transitional term in a claim.

[0100] The descriptions of various embodiments are presented for illustrative purposes and are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used herein have been selected to best explain the principles, practical applications, or technical improvements of the embodiments over techniques found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. a digital-to-analog converter configured to convert the digital data into an analog signal; an analog-to-digital converter configured to convert the analog signal to a digital signal; a memory configured to store computer-executable components; and a processor configured to execute the computer-executable components stored in the memory; 1. A system comprising: The computer-executable components: a waveform comparison component configured to verify the accuracy of the analog signal based on the digital conversion and comparison to a reference signal; A system having:

2. 10. The system of claim 9, wherein the waveform comparison component is further configured to determine that the analog signal is valid based on a result of the comparison of the digital conversion to the reference signal.

3. 10. The system of claim 9, wherein the waveform comparison component is further configured to assign a score to the digital conversion and the reference signal, and determine that the analog signal is valid based on the score being less than or equal to a defined threshold.

4. 10. The system of any preceding claim, wherein the waveform comparison component is further configured to generate a lag score based on a cross-correlation of the digital transform and the reference signal.

5. 10. The system of any preceding claim, wherein the reference signal comprises a set of manually verified data points.

6. 10. The system of any preceding claim, wherein the waveform comparison component is further configured to compare one or more designated data points of the digital transformation with the reference signal.

7. The computer-executable components further include: a reference component configured to receive as input the reference signal and the one or more specified data points; 10. The system of the preceding claim, comprising:

8. producing an analog signal by a system operably coupled to a processor; converting, by said system, said analog signal to a digital signal; and verifying, by the system, the accuracy of the analog signal based on the digital conversion and comparison to a reference signal. A computer-implemented method comprising:

9. determining, by the system, the validity of the analog signal based on the result of the comparison of the digital conversion to the reference signal; 10. The computer-implemented method of the preceding claim, further comprising:

10. further comprising assigning a score by the system to the digital conversion and the reference signal, wherein the determination of the validity of the analog signal is based on the score being less than or equal to a defined threshold.

10. A computer-implemented method according to the preceding claims.

11. generating, by the system, a lag score based on a cross-correlation of the digital transformation and the reference signal; 10. The computer-implemented method of any of the preceding three claims, further comprising:

12. 10. A computer-implemented method according to any of the preceding four claims, wherein the reference signal comprises a set of manually verified data points.

13. 6. A computer-implemented method according to any of the preceding five claims, wherein the comparing of the digital transform to the reference signal comprises comparing one or more designated data points of the digital transform to the reference signal.

14. receiving, by the system, the reference signal and the one or more designated data points of the digital conversion.

10. The computer-implemented method of the preceding claim, further comprising:

15. 1. A computer program product comprising a computer-readable storage medium having program instructions embodied thereon, the program instructions causing a processor to: generating an analog signal by said processor; converting the analog signal to a digital signal by the processor; and verifying, by the processor, the accuracy of the analog signal based on the digital conversion and comparison to a reference signal. a computer program product executable by the processor to cause the processor to perform the steps of:

16. The program instructions further cause the processor to: determining, by the processor, the validity of the analog signal based on the result of the comparison of the digital conversion to the reference signal; 10. A computer program product according to any preceding claim, executable by the processor to cause the processor to perform

17. The program instructions further cause the processor to:

10. A computer program product as claimed in any preceding claim, executable by the processor to cause the processor to perform the procedure of assigning a score to the digital conversion and the reference signal, wherein the determination of the validity of the analog signal is based on the score being less than or equal to a defined threshold.

18. The program instructions further cause the processor to: generating, by the processor, a lag score based on a cross-correlation of the digital transform and the reference signal; 10. A computer program product according to any of the preceding three claims, executable by the processor to cause the processor to perform:

19. 10. A computer program product according to any of the preceding four claims, wherein the reference signal comprises a set of manually verified data points.

20. The program instructions further include: receiving, by the processor, the reference signal.

10. A computer program product according to any of the preceding five claims, executable by said processor to cause said processor to execute:

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