Quantum job scheduling method and information processing apparatus

Abstract

To improve efficiency of parallel execution of a plurality of quantum jobs.SOLUTION: Obtaining a first quantum job using a first number of qubits, the first quantum job being compiled to be executable in a first pattern corresponding to the first number of qubits among a plurality of patterns corresponding to a plurality of numbers of qubits, each of the plurality of patterns defining a shape of an allocation domain in a qubit domain; A second quantum job using a second number of quantum bits, to which an allocation area corresponding to a second pattern corresponding to the second number of quantum bits is allocated, is moved in a certain direction on the quantum bit area while maintaining the second pattern, and an allocation area corresponding to the first pattern is allocated to the first quantum job from an empty area included in the quantum bit area after the second quantum job is moved.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a quantum job scheduling program, a quantum job scheduling method, and an information processing device. [Background technology]

[0002] A quantum gate-based quantum computer performs quantum computations by applying one or more quantum gates to one or more quantum bits. Typically, a quantum computer performs quantum computations by applying two or more quantum gates to two or more quantum bits. Quantum computations are usually described by quantum circuits. An information processing system including a quantum computer may simultaneously accept multiple quantum jobs that require quantum computations according to different quantum circuits.

[0003] A quantum processor contains multiple quantum bits with a fixed neighbor relationship. Typically, quantum processors contain multiple quantum bits arranged in a lattice. Quantum computers may execute multiple quantum jobs in parallel on the same quantum processor by assigning different quantum bits to different quantum jobs. For example, there is a scheduling technique that uses a bin-packing algorithm to determine the schedule of multiple quantum jobs waiting in a queue based on the number of quantum bits used and the expected execution time of each quantum job.

[0004] There is an optimization technique that compiles a quantum program into logical assembly instructions and aggregates parallelizable logical assembly instructions into the same logical block. There is also quantum control technology that extracts multiple sub-quantum circuits from a quantum circuit and executes these sub-quantum circuits in parallel. There is also mapping technology that maps multiple logical qubits defined in a quantum program to multiple physical qubits possessed by a quantum computer. There is also buffering technology that combines multiple quantum circuits into a single composite quantum circuit and maps the composite quantum circuit to the physical qubit layout possessed by a quantum computer. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] International Publication No. 2020 / 108993 [Patent Document 2] International Publication No. 2020 / 056176 [Patent Document 3] International Publication No. 2022 / 217823 [Patent Document 4] US Patent Application Publication No. 2023 / 0102347 [Patent Document 5] US Patent Application Publication No. 2023 / 0186130 Summary of the Invention [Problem to be solved by the invention]

[0006] However, conventional scheduling techniques determine the schedules of multiple waiting quantum jobs all at once. For this reason, conventional scheduling techniques are not suitable for information processing systems that continuously receive new quantum jobs, and there is room for improvement in the efficiency of parallel execution of multiple quantum jobs. Therefore, in one aspect, the present invention aims to improve the efficiency of parallel execution of multiple quantum jobs. [Means for solving the problem]

[0007] In one aspect, a quantum job scheduling program is provided that causes a computer to execute the following process: acquire a first quantum job using quantum bits with a first number of quantum bits, the first quantum job being compiled to be executable using a first pattern corresponding to the first number of quantum bits from among a plurality of patterns corresponding to the number of quantum bits, each pattern defining the shape of an allocation area in a quantum bit area in which a plurality of quantum bits are arranged; upon completion of a third quantum job in the quantum bit area, move a second quantum job using quantum bits with a second number of quantum bits, which has been assigned an allocation area corresponding to a second pattern from among the plurality of patterns corresponding to a second number of quantum bits, in a fixed direction across the quantum bit area while maintaining the second pattern; and assign to the first quantum job an allocation area corresponding to the first pattern from among the free areas included in the quantum bit area after the second quantum job has been moved. [Effects of the Invention]

[0008] On the one hand, it makes it more efficient to run multiple quantum jobs in parallel. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram illustrating an information processing apparatus according to a first embodiment. [Figure 2] FIG. 10 illustrates an example of an information processing system according to a second embodiment. [Figure 3] FIG. 2 is a block diagram illustrating an example of hardware of a server computer. [Figure 4] FIG. 2 is a block diagram showing an example of the functionality of a user and a server computer. [Figure 5] FIG. 1 is a diagram illustrating an example of a quantum circuit and a change in quantum state. [Figure 6] FIG. 10 is a diagram illustrating an example of conversion to a quantum circuit using native quantum gates. [Figure 7] FIG. 10 is a diagram illustrating an example of allocation of physical quantum bits to logical quantum bits. [Figure 8] FIG. 10 is a diagram illustrating an example of routing using a swap gate. [Figure 9] FIG. 10 is a diagram illustrating an example of optimization of a quantum circuit. [Figure 10] FIG. 1 illustrates an example of parallel execution of multiple quantum jobs on a QPU. [Figure 11] FIG. 10 is a diagram illustrating an example of a pattern according to the number of quantum bits. [Figure 12] FIG. 1 is a diagram illustrating an example of a quantum circuit before compilation. [Figure 13] FIG. 10 is a diagram illustrating an example of a compiled quantum circuit. [Figure 14] 10 is a diagram (continued) showing an example of a compiled quantum circuit. [Figure 15] FIG. 1 illustrates an example of a quantum job queue. [Figure 16] FIG. 10 is a diagram illustrating an example of allocation of QPU regions to quantum jobs. [Figure 17] FIG. 10 is a diagram illustrating an example of recompiling a quantum circuit. [Figure 18] A diagram showing an example of changes in QPU area allocation. [Figure 19] FIG. 10 is a diagram showing another example of a pattern according to the number of quantum bits. [Figure 20] 10 is a flowchart illustrating an example of a procedure for quantum job scheduling. [Figure 21] 10 is a flowchart illustrating an example of a procedure for quantum job control. DETAILED DESCRIPTION OF THE INVENTION

[0010] The present embodiment will be described below with reference to the drawings. (a) First embodiment FIG. 1 is a diagram for explaining an information processing device according to a first embodiment. The information processing device 10 according to the first embodiment performs quantum job scheduling that enables a quantum gate type quantum computer to execute multiple quantum jobs in parallel. The information processing device 10 is a von Neumann type computer, which is sometimes called a classical computer. The information processing device 10 may be a client device or a server device. The information processing device 10 may also be called a quantum job scheduling device or a job scheduler.

[0011] The information processing device 10 includes a storage unit 11 and a processing unit 12. The storage unit 11 may be a volatile semiconductor memory such as a random access memory (RAM), or may be a non-volatile storage such as a hard disk drive (HDD) or a flash memory.

[0012] The processing unit 12 is, for example, a processor such as a central processing unit (CPU), a graphics processing unit (GPU), or a digital signal processor (DSP). However, the processing unit 12 may also include an electronic circuit such as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA). The processor executes a program stored in a memory such as a RAM. A collection of processors may be called a multiprocessor or simply a "processor." Furthermore, multiple processing steps described below may be performed by different processors.

[0013] The storage unit 11 stores quantum job 15a. Quantum job 15a represents a request for quantum computation from a user. Quantum job 15a is a quantum job waiting to be executed. The storage unit 11 may include an execution queue that temporarily stores one or more quantum jobs accepted by the information processing device 10. Quantum job 15a uses quantum bits with a first quantum bit count. In the example of FIG. 1, quantum job 15a uses 13 quantum bits.

[0014] The quantum job 15a defines a quantum computation using a quantum circuit. A quantum circuit is a quantum computation model that defines a procedure for applying one or more quantum gates to one or more quantum bits. The quantum bits included in the quantum circuit are logical quantum bits whose physical locations within the quantum computer have not yet been determined. The number of first quantum bits may be determined from the quantum circuit. The quantum job 15a may also specify the number of iterations of the quantum circuit. Since the measurements of the quantum bits are obtained probabilistically, the same quantum circuit is executed multiple times.

[0015] Here, the quantum job 15a has already been compiled. The quantum job 15a may be compiled by the information processing device 10 or by another information processing device such as a user computer. The compilation result depends on the shape of the allocation area allocated to the quantum job 15a.

[0016] The allocated area is a part or all of the quantum bit area 13 in which multiple quantum bits of a quantum computer are arranged. The quantum bit area 13 may be a two-dimensional plane in which multiple quantum bits included in a quantum processor are arranged. A quantum processor is sometimes called a QPU (Quantum Processing Unit). Multiple quantum bits may be arranged in a lattice pattern. One allocated area is usually a connected area that does not include any disconnected divided areas. Two or more quantum jobs that coexist on the quantum bit area 13 are executed in parallel.

[0017] Quantum computers often have constraints on whether a multi-input quantum gate that uses two or more qubits as inputs can be executed, depending on the physical locations of the two or more qubits included in the qubit region 13. For example, a two-input quantum gate may be infeasible for two qubits that are not adjacent in the qubit region 13. Therefore, the compiler may convert the quantum circuit so that it can be executed based on the shape of the assigned region. For example, the compiler may insert a swap gate into the quantum circuit, which swaps the quantum states between qubits, so that the two qubits that act on the quantum gate are adjacent.

[0018] In the first embodiment, quantum job 15a is compiled so as to be executable by pattern 14a corresponding to the first number of quantum bits among a plurality of patterns corresponding to the number of quantum bits. Storage unit 11 may store pattern data in which the number of quantum bits is associated with a plurality of patterns. When another information processing device compiles quantum job 15a, information processing device 10 may transmit the pattern data to the other information processing device, or may have the other information processing device refer to the pattern data during compilation.

[0019] Each of the multiple patterns defines the shape of an allocated area in the quantum bit area 13. The number of quantum bits corresponds to the number of quantum bits used by the quantum job. A single pattern may be uniquely determined from one quantum bit number. The shapes indicated by these multiple patterns are defined under a common policy.

[0020] For example, multiple patterns are defined so that the length of the assigned region increases preferentially in a first direction as the number of quantum bits increases. As a result, the length of the assigned region in the first direction is equal to or greater than the length in a second direction perpendicular to the first direction. FIG. 1 illustrates pattern 14a when the number of quantum bits is 13, pattern 14b when the number of quantum bits is 11, and pattern 14c when the number of quantum bits is 7. The shapes indicated by patterns 14a, 14b, and 14c are vertically elongated polygons whose vertical length is greater than their horizontal length.

[0021] When quantum job 15a is waiting to be executed, quantum jobs 15b and 15c are being executed in quantum bit region 13. Quantum job 15b uses quantum bits with a second number of quantum bits. Quantum job 15b is assigned an allocation region corresponding to pattern 14b corresponding to the second number of quantum bits. Quantum job 15c uses quantum bits with a third number of quantum bits. Quantum job 15c is assigned an allocation region corresponding to pattern 14c corresponding to the third number of quantum bits.

[0022] When selecting an allocation region from quantum bit region 13, processing unit 12 may invert the shapes indicated by patterns 14b and 14c in a first direction or in a second direction perpendicular to the first direction. For example, processing unit 12 selects the shape that maximizes quantum bit utilization efficiency from among four shapes that take inversion into consideration.

[0023] Processing unit 12 may select an allocation area that minimizes the number of fragmented free quantum bits. Processing unit 12 may also select an allocation area that maximizes the number of unused columns or unused rows. In the example of FIG. 1, in quantum bit area 13, the allocation area for quantum job 15b has a shape that is the top-to-bottom inverted shape of pattern 14b. Furthermore, the allocation area for quantum job 15c has a shape that is the left-to-right inverted shape of pattern 14c.

[0024] The processing unit 12 detects the end of quantum job 15c. Quantum job 15c ends, for example, by repeatedly executing the quantum circuit of quantum job 15c a specified number of times. Then, the processing unit 12 moves quantum job 15b, which is currently being executed, in a certain direction on the quantum bit region 13. The movement of quantum job 15b indicates a change in the allocation region assigned to quantum job 15b. This movement is performed between repeated executions of the quantum circuit. This reduces the fragmentary free quantum bits, and creates a large free region in the quantum bit region 13.

[0025] The movement direction may depend on a policy common to multiple patterns. For example, if the allocation area is preferentially lengthened in a first direction, the processing unit 12 moves the quantum jobs 15b in a second direction. The processing unit 12 may move the vertically long allocation area leftward to increase the number of unused columns on the right side, or may move the vertically long allocation area rightward to increase the number of unused columns on the left side. The processing unit 12 may also move the horizontally long allocation area upward to increase the number of unused rows below, or may move the horizontally long allocation area downward to increase the number of unused rows above.

[0026] At this time, processing unit 12 maintains the shape of the allocation area of ​​quantum job 15b so that it conforms to pattern 14b. Therefore, processing unit 12, in principle, selects the allocation area after the movement by shifting the allocation area before the movement on quantum bit area 13. However, processing unit 12 may invert the shape indicated by pattern 14b in a first direction, or in a second direction orthogonal to the first direction. For example, processing unit 12 selects the shape that maximizes the utilization efficiency of the quantum bits after the movement from among four shapes that take the inversion into consideration.

[0027] By moving quantum job 15b, the free area with the largest number of free quantum bits becomes larger in quantum bit area 13. Then, processing unit 12 allocates an allocation area corresponding to pattern 14a from the free area to quantum job 15a. At this time, processing unit 12 may arrange quantum jobs 15a in a certain direction on quantum bit area 13. Furthermore, processing unit 12 may invert the shape indicated by pattern 14a in a first direction, or in a second direction orthogonal to the first direction. The quantum computer executes quantum job 15a using the quantum bits allocated to quantum job 15a.

[0028] The information processing device 10 may store the schedule of the multiple quantum jobs determined by the above method in non-volatile storage, display it on a display device, or transmit it to another information processing device. The other information processing device may be a classical computer that controls a quantum computer having a quantum bit region 13. The information processing device 10 may also control the quantum computer according to the determined schedule.

[0029] As described above, information processing device 10 of the first embodiment acquires quantum job 15a that uses quantum bits with a first number of quantum bits. Quantum job 15a is compiled so that it can be executed using pattern 14a corresponding to the first number of quantum bits, among multiple patterns corresponding to multiple numbers of quantum bits. Each of the multiple patterns defines the shape of an allocation area in quantum bit area 13 in which multiple quantum bits are arranged.

[0030] In response to the completion of quantum job 15c in quantum bit region 13, information processing device 10 moves quantum job 15b, which uses quantum bits with a second number of quantum bits, in a certain direction on quantum bit region 13. Quantum job 15b is assigned an allocation area corresponding to pattern 14b, which corresponds to the second number of quantum bits, among multiple patterns. Information processing device 10 moves quantum job 15b while maintaining pattern 14b. Information processing device 10 assigns to quantum job 15a an allocation area corresponding to pattern 14a from among the free areas included in quantum bit region 13 after quantum job 15b has been moved.

[0031] This allows two or more quantum jobs to be executed in parallel on the quantum bit region 13. This allows multiple quantum bits to be used effectively, improving the throughput of the quantum computer. In addition, the shape of the allocation region for each quantum job is standardized according to the number of quantum bits used. This allows the information processing device 10 to schedule two or more quantum jobs to be packed into the quantum bit region 13 using a lightweight algorithm, reducing the load.

[0032] Furthermore, the number of free quantum bits in the quantum bit region 13 is reduced, improving the throughput of the quantum computer. Furthermore, since the shape according to the number of used quantum bits is maintained, changes in the adjacency relationship of the used quantum bits are suppressed, and recompilation of quantum jobs is suppressed. This reduces the scheduling load. Furthermore, as a quantum job ends, the allocation areas of other quantum jobs are reorganized, increasing the free area. Therefore, the scheduling method of the first embodiment is also suitable for systems that continuously receive new quantum jobs.

[0033] (b) Second embodiment 2 is a diagram illustrating an example of an information processing system according to the second embodiment. The information processing system according to the second embodiment includes a server computer 100, a quantum computer 210, a control computer 220, and a user computer 230. The server computer 100 corresponds to the information processing device 10 according to the first embodiment.

[0034] The control computer 220 is connected to the quantum computer 210. The server computer 100 and the control computer 220 are connected to a network 31. The network 31 may include a LAN (Local Area Network). The user computer 230 is connected to a network 32. The network 32 may include a wide area network such as the Internet.

[0035] The server computer 100 is a classical computer that provides cloud services for using the quantum computer 210. The server computer 100 may also be called a scheduling device or scheduler. The server computer 100 receives quantum jobs from the user computer 230 and determines an execution schedule for the received quantum jobs. The server computer 100 transmits the quantum jobs and the schedule to the control computer 220. The server computer 100 receives the execution results of the quantum jobs from the control computer 220 and transfers them to the user computer 230.

[0036] The quantum computer 210 is a quantum gate type quantum computer. The quantum computer 210 receives a control signal from the control computer 220 and transmits to the control computer 220 the result of the quantum calculation performed in accordance with the control signal.

[0037] The quantum computer 210 includes a QPU 211. The quantum computer 210 may include multiple QPUs. The QPU 211 is a quantum processor including multiple quantum bits. The multiple quantum bits are arranged, for example, in a lattice pattern to form a square quantum bit region. However, the quantum bits do not have to be arranged in a lattice pattern. The QPU 211 causes a state change in the quantum bit corresponding to a quantum gate by irradiating the quantum bit with a pulse wave corresponding to a control signal. A two-input quantum gate, such as a controlled NOT (CNOT) gate, can be executed on adjacent quantum bits in the QPU 211.

[0038] The control computer 220 is a classical computer that instructs the quantum computer 210 to perform quantum computation. The control computer 220 communicates with the server computer 100 via the network 31. The control computer 220 sends control signals to the quantum computer 210 in accordance with the quantum job and schedule received from the server computer 100. The control computer 220 reads the measurement values ​​of the quantum bits from the quantum computer 210 and transfers the measurement values ​​to the server computer 100.

[0039] The user computer 230 is a classical computer of a user who uses the cloud service. The user computer 230 accesses the server computer 100 via the networks 31 and 32. The user computer 230 accepts a quantum circuit describing quantum computation from the user, compiles the quantum circuit, and transmits a quantum job including the compiled quantum circuit to the server computer 100. The user computer 230 receives the execution result of the quantum job from the server computer 100.

[0040] The quantum computer 210 and the control computer 220 may be formed as an integrated device. The server computer 100 and the control computer 220 may be formed as an integrated device. In the second embodiment, the user computer 230 compiles the quantum circuit, but the user computer 230 may transmit the uncompiled quantum circuit, and the server computer 100 may compile the quantum circuit. In quantum gate-type quantum computing, "compiling a quantum job" includes compiling a quantum circuit and generating a quantum job including the compiled quantum circuit. In the following description, there may be no distinction between compiling a quantum job and compiling a quantum circuit.

[0041] 3 is a block diagram showing an example of hardware of a server computer. The server computer 100 has a CPU 101, a RAM 102, a HDD 103, a GPU 104, an input interface 105, a media reader 106, and a communication interface 107. The control computer 220 and the user computer 230 may have the same hardware as the server computer 100. The CPU 101 corresponds to the processing unit 12 in the first embodiment. The RAM 102 or the HDD 103 corresponds to the storage unit 11 in the first embodiment.

[0042] The CPU 101 is a processor that executes program instructions. The CPU 101 loads programs and data stored in the HDD 103 into the RAM 102 and executes the programs. The server computer 100 may have multiple processors.

[0043] The RAM 102 is a volatile semiconductor memory that temporarily stores programs and data. The programs are executed by the CPU 101, and the data is used for calculations by the CPU 101. The server computer 100 may also have other types of volatile memory.

[0044] The HDD 103 is a non-volatile storage device that stores software programs and data. The software includes an operating system (OS), middleware, and application software. The server computer 100 may also have other types of non-volatile storage, such as a solid-state drive (SSD).

[0045] The GPU 104 performs image processing in cooperation with the CPU 101, and displays the image on a display device 111 connected to the server computer 100. The display device 111 is, for example, a CRT (Cathode Ray Tube) display, a liquid crystal display, an organic EL (Electro Luminescence) display, or a projector.

[0046] The GPU 104 may be used as a general purpose computing on graphics processing unit (GPGPU). The GPU 104 may execute a program in response to an instruction from the CPU 101. The server computer 100 may have a volatile semiconductor memory other than the RAM 102 as a GPU memory.

[0047] The input interface 105 receives an input signal from an input device 112 connected to the server computer 100 and notifies the CPU 101 of the input signal. The input device 112 is, for example, a mouse, a touch panel, or a keyboard. Multiple input devices may be connected to the server computer 100.

[0048] The medium reader 106 is a reading device that reads programs and data from the recording medium 113. The recording medium 113 is, for example, a magnetic disk, an optical disk, or a semiconductor memory. Magnetic disks include flexible disks (FDs) and HDDs. Optical disks include compact discs (CDs) and digital versatile discs (DVDs). The medium reader 106 copies the programs and data read from the recording medium 113 to the RAM 102 or the HDD 103.

[0049] The read program may be executed by the CPU 101. The recording medium 113 may be a portable recording medium. The recording medium 113 may be used to distribute programs and data. The recording medium 113 and the HDD 103 may be referred to as computer-readable recording media.

[0050] The communication interface 107 communicates with the control computer 220 and the user computer 230 via the network 31. The communication interface 107 is, for example, a wired communication interface connected to a router or a switch via a wired cable.

[0051] 4 is a block diagram showing an example of the functions of a user and a server computer. The server computer 100 has a queue 121, a topology storage unit 122, a pattern storage unit 123, a scheduler 124, a communication unit 125, and a pattern generation unit 126. The queue 121, the topology storage unit 122, and the pattern storage unit 123 are implemented using, for example, the RAM 102 or the HDD 103. The scheduler 124, the communication unit 125, and the pattern generation unit 126 are implemented using, for example, the CPU 101 and a program.

[0052] The queue 121 stores quantum jobs that are waiting to be executed among the received quantum jobs. The queue 121 is a FIFO (First In First Out) type storage area, and is sometimes called a waiting queue. A newly arrived quantum job is added to the end of the queue 121. The next quantum job to be executed is extracted from the top of the queue 121.

[0053] The topology storage unit 122 stores topology data that indicates the topology of the QPU 211. The topology data indicates the adjacency relationship between multiple quantum bits. For example, the topology data indicates a topology in which lattice points are arranged at equal intervals in a square two-dimensional area. In this case, each quantum bit has at most four adjacent quantum bits in the up, down, left, and right directions. Typically, a two-input quantum gate is implemented between two adjacent quantum bits. A two-input quantum gate may not be feasible between two non-adjacent quantum bits.

[0054] However, even when two quantum bits are adjacent, the execution accuracy of the quantum gate between the two quantum bits may be low due to implementation defects. In such a case, the topology data may designate the quantum gate as a defective quantum gate and make it unusable. Note that in the second embodiment, it is assumed that the QPU 211 randomly has defective quantum gates, but the proportion of defective quantum gates to all quantum gates is sufficiently small.

[0055] The pattern storage unit 123 stores pattern data that associates the number of used quantum bits with a pattern. One pattern is uniquely selected from one number of used quantum bits. The pattern indicates the shape of the allocation area in which the used quantum bits are arranged. Therefore, each quantum job is assigned an allocation area with a shape corresponding to the number of used quantum bits. Within the QPU 211, the specific allocation area of ​​each quantum job is not determined until just before execution begins, but the shape of the allocation area is determined in advance before the quantum job arrives at the queue 121.

[0056] The scheduler 124 schedules the quantum jobs waiting to be executed stored in the queue 121 to be placed on the QPU 211. The scheduler 124 enables the QPU 211 to execute multiple quantum jobs in parallel. The scheduler 124 extracts a quantum job from the top of the queue 121, references the pattern data, and selects a pattern according to the number of quantum bits used in the quantum job. The scheduler 124 assigns quantum bits included in the QPU 211 that correspond to the selected pattern to the quantum job.

[0057] Furthermore, as will be described later, the scheduler 124 changes the allocation area of ​​a quantum job that is currently being executed. The scheduler 124 detects that execution of a quantum job has ended in the QPU 211. The scheduler 124 then moves the currently executing quantum job so that the fractional free quantum bits contained in the QPU 211 are reduced. At this time, the scheduler 124 maintains the shape of the allocation area. Furthermore, as will be described later, the scheduler 124 may recompile the quantum circuit to avoid faulty quantum gates.

[0058] The communication unit 125 communicates with the control computer 220 and the user computer 230. In response to access from the user computer 230, the communication unit 125 transmits pattern data to the user computer 230. The communication unit 125 also receives quantum jobs from the user computer 230 and stores them in the queue 121. The communication unit 125 also transmits quantum jobs to be executed to the control computer 220, and notifies the control computer 220 of the allocation area determined by the scheduler 124. The communication unit 125 also receives execution results of completed quantum jobs from the control computer 220 and transfers them to the user computer 230.

[0059] The pattern generation unit 126 generates pattern data. The pattern generation unit 126 reads the topology data and determines a pattern corresponding to each of a plurality of numbers of used quantum bits according to a certain rule. At this time, the pattern generation unit 126 first generates a pattern when the number of used quantum bits is 1. The pattern generation unit 126 generates a pattern when the number of used quantum bits is one more by adding one quantum bit to the previous pattern.

[0060] This generates a pattern for each number of used qubits, from 1 to the total number of qubits in QPU 211. Examples of rules for determining the pattern will be described later. Pattern generation unit 126 generates and stores pattern data indicating the determined pattern. However, the pattern data may also be created by an administrator of server computer 100.

[0061] The user computer 230 has a pattern storage unit 231, a compiler 232, and a communication unit 233. The pattern storage unit 231 is implemented, for example, using a RAM or HDD included in the user computer 230. The compiler 232 and the communication unit 233 are implemented, for example, using a CPU and a program included in the user computer 230.

[0062] The pattern storage unit 231 stores the same pattern data as the pattern storage unit 123. The compiler 232 receives a quantum circuit describing quantum computation from a user. The compiler 232 compiles the quantum circuit by referencing the pattern data. Compilation will be described later. The compiler 232 also receives various parameter values ​​from the user for causing the quantum computer 210 to execute this quantum computation. The pattern storage unit 231 generates a quantum job including the compiled quantum circuit and parameter values.

[0063] The communication unit 233 communicates with the server computer 100. The communication unit 233 accesses the server computer 100 and receives pattern data from the server computer 100. The communication unit 233 transmits the quantum job generated by the compiler 232 to the server computer 100. After the quantum job is completed, the communication unit 233 receives the execution result of the quantum job from the server computer 100. Next, the compilation of a quantum circuit will be described.

[0064] Figure 5 is a diagram showing an example of a quantum circuit and changes in quantum states. In quantum computing, the quantum state ψ of one quantum bit is expressed as a superposition of 0 and 1, as shown in formula (1). In formula (1), α and β are complex probability amplitudes. Therefore, the quantum state ψ is expressed as a complex vector formed by two complex numbers.

[0065]

number

[0066] When an information processing system measures one quantum bit, it probabilistically obtains a measurement value of 0 or 1. The probability that the measurement value will be 0 is the square of the absolute value of α. The probability that the measurement value will be 1 is the square of the absolute value of β. α and β cannot be observed directly. Therefore, the information processing system repeatedly performs quantum calculations to measure the quantum bit. The information processing system estimates the probability of 0 and the probability of 1 by statistically processing the measurement values.

[0067] Quantum computation using quantum gates is described by a quantum circuit. Quantum circuit 131 shown in FIG. 5 is an example of a quantum circuit using two quantum bits. Quantum computation proceeds from left to right in quantum circuit 131. The quantum bits q0 and q1 included in quantum circuit 131 are logical quantum bits, and at the time of creating quantum circuit 131, they do not indicate specific physical quantum bits included in QPU 211. In quantum circuit 131, H is a Hadamard gate, X is a controlled X gate, and T is a phase shift gate that rotates by π / 4 around the Z axis.

[0068] Quantum gates change quantum states. Vectors 141-144 are four-dimensional vectors that represent quantum states formed by two quantum bits. The first dimension is the probability amplitude of q0=0, q1=0. The second dimension is the probability amplitude of q0=1, q1=0. The third dimension is the probability amplitude of q0=0, q1=1. The fourth dimension is the probability amplitude of q0=1, q1=1. Vector 141 represents the initial quantum state. Vector 142 represents the quantum state after application of the H gate. Vector 143 represents the quantum state after application of the controlled X gate. Vector 144 represents the final quantum state of quantum circuit 131.

[0069] Quantum circuits use various types of quantum gates. However, the quantum computer 210 does not necessarily implement all types of quantum gates that can be used in quantum circuits. In such cases, a quantum circuit created by a user may not be executable on the quantum computer 210 as is.

[0070] Therefore, the compiler 232 converts quantum gates included in the quantum circuit that are not implemented in the quantum computer 210 into native quantum gates that are implemented in the quantum computer 210. In this case, a quantum computation equivalent to one unimplemented quantum gate may be realized by a combination of two or more native quantum gates, and the number of quantum gates may increase as a result of compilation.

[0071] 6 is a diagram showing an example of conversion to a quantum circuit using native quantum gates. Quantum circuit 132 includes a three-input CNOT gate. In contrast, quantum computer 210 may not support multi-input quantum gates with three or more input qubits. Therefore, compiler 232 converts quantum circuit 132 into quantum circuit 133.

[0072] The quantum circuit 133 includes 15 quantum gates. †is a phase shift gate that rotates by -π / 4 around the Z axis. As shown in FIG. 6, the three-input CNOT gate included in the quantum circuit 132 is replaced by an H gate, a T gate, and a T † It has been expanded to a combination of gates and two-input CNOT gates.

[0073] When such a quantum circuit is actually executed, the physical qubits included in the QPU are used, so at least until the quantum circuit is executed, physical qubits are assigned to the logical qubits included in the quantum circuit.

[0074] 7 is a diagram showing an example of allocation of physical quantum bits to logical quantum bits. o ,q1,q2. qubit q o , q1, and q2 are logical qubits. The quantum circuit 134 also includes two CNOT gates. The first CNOT gate is connected to the qubit q o The second CNOT gate uses qubit q as the control bit and qubit q as the target bit. o as the control bit and qubit q1 as the target bit.

[0075] QPU212 includes qubits Q0, Q1, and Q2. Qubits Q0, Q1, and Q2 are physical qubits. Although QPU212 implements a CNOT gate, there are restrictions on the qubits that can be used for the CNOT gate. QPU212 can execute a CNOT gate with qubit Q1 as the constraint bit and qubit Q0 as the target bit. QPU212 can also execute a CNOT gate with qubit Q1 as the constraint bit and qubit Q2 as the target bit. In contrast, QPU212 does not execute CNOT gates for other combinations of qubits.

[0076] qubit q o, q1, q2 and the quantum bits Q0, Q1, Q2, the quantum circuit 134 may not be executable in the QPU 212 as it is. o If you assign qubit Q0 to , then in the QPU212, qubit q o The above two CNOT gates with the control bits are infeasible.

[0077] Therefore, for example, logical qubits and physical qubits are associated with each other as shown in table 145. Table 145 assigns qubit Q1 to qubit q0, qubit Q0 to qubit q1, and qubit Q2 to qubit q2. This causes QPU 212 to execute the first CNOT gate of quantum circuit 134 as a CNOT gate with qubit Q1 as the constraint bit and qubit Q2 as the target bit. Also, QPU 212 executes the second CNOT gate of quantum circuit 134 as a CNOT gate with qubit Q1 as the constraint bit and qubit Q0 as the target bit.

[0078] However, depending on the quantum circuit, there may not be a correspondence between logical qubits and physical qubits that allows all quantum gates contained in the quantum circuit to be executed as is. In such cases, the correspondence between logical qubits and physical qubits is changed midway through the quantum circuit. The change in correspondence is described as an exchange of quantum states between qubits. For example, a swap gate that exchanges the quantum states of two qubits is inserted midway through the quantum circuit.

[0079] 8 is a diagram illustrating an example of routing using a swap gate. The quantum circuit 135 o , q1, and q2, which contains three CNOT gates. The first CNOT gate is connected to qubit q o The second CNOT gate uses qubit q as the control bit and qubit q as the target bit. oThe third CNOT gate uses qubit q1 as the control bit and qubit q2 as the target bit.

[0080] When quantum circuit 135 is executed on QPU 212, quantum circuit 135 is transformed into quantum circuit 136. Quantum circuit 136 includes three CNOT gates and one swap gate. The swap gate is located between the second CNOT gate and the third CNOT gate. The first CNOT gate and the second CNOT gate are the same as those in quantum circuit 135. The swap gate is used to transfer the quantum bit q o , q1. The third CNOT gate exchanges the quantum states of qubit q o as the control bit and qubit q2 as the target bit.

[0081] Quantum circuit 136 can be implemented by assigning qubit Q1 to qubit q0, qubit Q0 to qubit q1, and qubit Q2 to qubit q2, where for the quantum computation represented by original quantum circuit 135, the final quantum state of qubit q0 is held in qubit Q0, the final quantum state of qubit q1 is held in qubit Q1, and the final quantum state of qubit q2 is held in qubit Q2.

[0082] The allocation of physical qubits and the insertion of swap gates may be performed when compiling a quantum circuit. However, in the second embodiment, the allocation of physical qubits included in the QPU 211 is determined immediately before the execution of a quantum job.

[0083] In this regard, at the time of compilation, although the specific physical quantum bits to be used are unknown, the shape of the allocation area is uniquely identified from the number of quantum bits to be used in the quantum job. The shape of the allocation area identifies the adjacency relationship of the multiple physical quantum bits to be used. Therefore, the compiler 232 inserts swap gates so that the quantum circuit can be executed in the allocation area, assuming the shape of the allocation area corresponding to the number of quantum bits to be used.

[0084] In addition to converting to native quantum gates and inserting swap gates, the compiler 232 may optimize the quantum circuit to reduce its size. Quantum circuit optimization may be aimed at reducing the number of quantum gates or at reducing the depth of the quantum circuit, which is the number of stages of quantum gates arranged in series.

[0085] 9 is a diagram showing an example of quantum circuit optimization. Compiler 232 converts quantum circuit 137 into quantum circuit 138 or quantum circuit 139 by converting non-native quantum gates into native quantum gates. Quantum circuit 138 is a quantum circuit generated without optimization. Quantum circuit 139 is a quantum circuit generated with optimization.

[0086] In quantum circuits 137, 138, 139, R X is a rotating gate that rotates a specified amount around the X axis. R Y is a rotating gate that rotates a specified amount around the Y axis. R Z is a rotation gate that rotates around the Z axis by a specified amount. √X is a square root gate related to the X gate. Performing √X twice in succession has the same effect as the X gate.

[0087] Quantum circuit 137 includes six rotate gates and two CNOT gates. The depth of quantum circuit 137 is 6. Quantum circuit 138 includes 16 rotate gates, 10 square root gates, and two CNOT gates. The depth of quantum circuit 138 is 18. Quantum circuit 139 includes five rotate gates, four square root gates, and two CNOT gates. The depth of quantum circuit 139 is 9. In this way, compiler 232 can reduce the number of quantum gates and the depth of the quantum circuit by optimizing the quantum circuit.

[0088] Next, we will explain quantum multiprogramming, which allows multiple quantum jobs to be executed in parallel on a quantum processor. 10 is a diagram showing an example of parallel execution of multiple quantum jobs on a QPU. The QPU 213 is an example of a quantum processor included in the quantum computer 210. The QPU 213 processes quantum bits Q0 to Q 24 The 25 qubits form a 5x5 grid-like planar area. The leftmost column contains qubits Q0 to Q4, arranged from top to bottom. The second column from the left contains qubits Q5 to Q9, arranged from top to bottom. The third column from the left contains qubits Q 10 ~Q 14 In the fourth column from the left, from top to bottom, there are qubits Q 15 ~Q 19 The rightmost column is, from top to bottom, the qubit Q 20 ~Q 24 are lined up.

[0089] QPU 213 can execute two-input quantum gates between adjacent qubits in four directions: up, down, left, and right. However, the quantum gate between qubit Q0 and qubit Q5 is a faulty quantum gate. Therefore, a two-input quantum gate using qubits Q0 and Q5 cannot be executed. In Figure 10, the edge between qubits Q0 and Q5 is missing.

[0090] Quantum multiprogramming allows multiple quantum jobs to run in parallel on the QPU 213 by assigning non-overlapping allocations to different quantum jobs. As an example, quantum jobs 151, 152, and 153 run in parallel. Quantum job 151 is assigned a 2x2 allocation containing qubits Q3, Q4, Q8, and Q9. Quantum job 152 is assigned a 2x2 allocation containing qubit Q 17 ,Q 18 ,Q 19 ,Q 22 ,Q 23 ,Q 24 The quantum job 153 is assigned a 3×2 allocation area including qubits Q5, Q 10 ,Q 15 ,Q 20 A 1x4 allocation area including the

[0091] This allows the QPU 213 to execute the quantum jobs 151, 152, and 153 in parallel, improving the throughput of the quantum computer 210. However, the scheduling algorithm that determines the allocation areas for multiple quantum jobs is important.

[0092] If the scheduler 124 attempts to pack as many quantum jobs as possible into the QPU 213 so as to minimize the number of free quantum bits, it will end up solving a computationally intensive combinatorial optimization problem. Furthermore, quantum jobs continuously arrive at the queue 121, and multiple quantum jobs running on the QPU 213 will finish at different times. Therefore, the optimal quantum job placement changes over time. Furthermore, if the shape of the allocation area assigned to a quantum job differs from what was expected, it may be necessary to recompile the quantum circuit.

[0093] Therefore, in an information processing system in which quantum jobs with relatively short execution times arrive continuously, a scheduling algorithm that maximizes the density of quantum jobs at a given time is not suitable. Therefore, the server computer 100 makes scheduling more efficient by restricting the allocation area patterns, as described below.

[0094] 11 is a diagram showing examples of patterns according to the number of quantum bits. Pattern generation unit 126 generates patterns 161-1 to 161-25 corresponding to 25 different numbers of quantum bits used, based on the topology of QPU 213. Here, the patterns are generated according to one example rule. Other example rules will be described later.

[0095] Pattern generation unit 126 determines the arrangement of assigned quantum bits so that the number of columns in the assigned region is minimized. Within a range with the same number of columns, pattern generation unit 126 packs assigned quantum bits preferentially from the right column. For the leftmost column, pattern generation unit 126 packs assigned quantum bits preferentially from the top. Following this rule, pattern generation unit 126 generates patterns 161-1 to 161-25.

[0096] Pattern 161-1 is a pattern in which the number of used quantum bits is 1. Pattern 161-2 is a pattern in which the number of used quantum bits is 2. Pattern 161-2 adds a quantum bit below pattern 161-1. Pattern 161-3 is a pattern in which the number of used quantum bits is 3. Pattern 161-3 adds a quantum bit below pattern 161-2.

[0097] Pattern 161-4 is a pattern in which the number of used quantum bits is 4. Pattern 161-4 adds a quantum bit below pattern 161-3. Pattern 161-5 is a pattern in which the number of used quantum bits is 5. Pattern 161-5 adds a quantum bit below pattern 161-4. As a result, when the number of used quantum bits is 1 to 5, the allocated quantum bits are arranged in a single vertical column, and the allocated area fits into one column of QPU 213.

[0098] Pattern 161-6 is a pattern in which the number of used quantum bits is 6. Pattern 161-6 is obtained by adding one quantum bit to pattern 161-5, and this quantum bit is placed to the left of the first quantum bit indicated by pattern 161-1. Pattern 161-7 is a pattern in which the number of used quantum bits is 7. Pattern 161-7 is obtained by adding one quantum bit to pattern 161-6, and this quantum bit is placed to the left of the second quantum bit added in pattern 161-2.

[0099] Pattern 161-10 is a pattern in which the number of used qubits is 10. By adding qubits in the same way as pattern 161-7, pattern 161-10 includes two vertical columns of five allocated qubits each. When the number of used qubits is between 6 and 10, the allocation area fits into two adjacent columns in QPU 213.

[0100] Pattern 161-11 is a pattern in which the number of used quantum bits is 11. Pattern 161-11 adds one quantum bit to pattern 161-10, and this quantum bit is placed to the left of the sixth quantum bit added in pattern 161-6. When the number of used quantum bits is 11 to 15, the allocation area fits into three adjacent columns in QPU 213. Similarly, when the number of used quantum bits is 16 to 20, the allocation area fits into four adjacent columns in QPU 213.

[0101] When the number of used quantum bits is 21 to 25, the allocation area occupies five columns of the QPU 213. Pattern 161-25 is a pattern when the number of used quantum bits is 25. Pattern 161-25 is the topology of the QPU 213 itself. Note that in patterns 161-1 to 161-25, the presence of defective quantum gates does not need to be taken into consideration.

[0102] 12 is a diagram showing an example of a quantum circuit before compilation. Quantum circuit 171 is an example of a quantum circuit before compilation. Quantum circuit 171 includes seven quantum bits, q0 to q6. The quantum bits q0 to q6 are logical quantum bits. Quantum circuit 171 also includes 14 rotation gates and 6 CNOT gates.

[0103] 13 is a diagram showing an example of a quantum circuit after compilation. The compiler 232 selects, from the pattern data, pattern 161-7 when the number of used quantum bits is 7. The compiler 232 converts the quantum circuit 171 into the quantum circuit 172 using pattern 161-7. When the server computer 100 performs the compilation, the server computer 100 selects pattern 161-7 from the pattern data.

[0104] Quantum circuit 172 includes 28 rotation gates and 6 CNOT gates. FIG. 13 illustrates the first half of quantum circuit 172, which includes 19 rotation gates and 3 CNOT gates. Quantum circuit 172 can be executed under the adjacency relationship of the seven quantum bits shown in pattern 161-7. When compiling quantum circuit 171, compiler 232 associates each of quantum bits q0 to q6 included in quantum circuit 171 with the relative position of one of the seven quantum bits included in pattern 161-7.

[0105] The pattern data identifies the relative position of each qubit with a number. For example, the pattern data may represent the first qubit in the upper right corner with 0, and the other qubits with 1, 2, ..., 24, according to the addition order described in Figure 11. Compiler 232 renumbers the logical qubits using the relative position numbers of the qubits included in the pattern.

[0106] For example, in FIG. 13, qubit q5 of quantum circuit 171 is placed in the qubit 0 position of pattern 161-7. qubit q1 of quantum circuit 171 is placed in the qubit 1 position of pattern 161-7. qubit q2 of quantum circuit 171 is placed in the qubit 2 position of pattern 161-7. qubit q3 of quantum circuit 171 is placed in the qubit 3 position of pattern 161-7. qubit q4 of quantum circuit 171 is placed in the qubit 4 position of pattern 161-7. qubit q6 of quantum circuit 171 is placed in the qubit 5 position of pattern 161-7. qubit q0 of quantum circuit 171 is placed in the qubit 6 position of pattern 161-7.

[0107] Figure 14 is a diagram (continuation) showing an example of a compiled quantum circuit. Figure 14 shows the latter nine rotation gates and three CNOT gates of quantum circuit 172. Next, we will explain how to schedule compiled quantum jobs according to patterns.

[0108] 15 is a diagram showing an example of a quantum job queue. As an example, consider a queue 150 in which quantum jobs 154 to 159 waiting to be executed are stored. Quantum job 154 is the first quantum job, and quantum job 159 is the last quantum job.

[0109] The number of used quantum bits for quantum job 154 is 7. The number of used quantum bits for quantum job 155 is 11. The number of used quantum bits for quantum job 156 is 3. The number of used quantum bits for quantum job 157 is 13. The number of used quantum bits for quantum job 158 is 7. The number of used quantum bits for quantum job 159 is 16.

[0110] FIG. 16 is a diagram showing an example of allocation of QPU regions to quantum jobs. The scheduler 124 extracts quantum jobs 154 from the top of the queue 150. The scheduler 124 arranges the extracted quantum jobs 154 in a fixed direction on the QPU 213. In the second embodiment, the fixed direction is the leftward direction. However, the fixed direction may also be the rightward direction. When a pattern is generated so that the number of columns is small, the fixed direction is preferably a left-right direction perpendicular to the columns. When a pattern is generated so that the number of rows is small, the fixed direction is preferably a top-bottom direction perpendicular to the rows.

[0111] The scheduler 124 assigns to the quantum job 154 an allocation area having a shape indicated by pattern 161-7 corresponding to the number of used quantum bits of the quantum job 154. As a result, regardless of which allocation area in the QPU 213 is assigned to the quantum job 154, in principle, there is no need to recompile the quantum circuit of the quantum job 154.

[0112] When selecting the allocation area, the scheduler 124 allows for vertical and horizontal reversal of the specific shape indicated by the pattern 161-7. The scheduler 124 adopts a shape that allows for the most efficient packing to the left. For example, the scheduler 124 identifies four specific shapes from the pattern 161-7, taking into consideration vertical and horizontal reversal. The scheduler 124 adopts a shape that minimizes the gap that appears to the left of the quantum job 154 when the quantum job 154 is packed to the left. The gap is a small area that indicates a fractional amount of free quantum bits, and is preferably small.

[0113] In this way, the scheduler 124 allocates a portion of the quantum bit region of the QPU 213 to the quantum job 154. In the example of Fig. 16, the scheduler 124 left-justifies the specific shape indicated by the pattern 161-7 by flipping it horizontally. In this way, the scheduler 124 allocates the quantum bits Q0 to Q6 to the quantum job 154.

[0114] Next, the scheduler 124 extracts the quantum job 155 from the head of the queue 150. The scheduler 124 identifies a pattern 161-11 that corresponds to the number of quantum bits used by the quantum job 155. The scheduler 124 flips the specific shape indicated by the pattern 161-11 upside down and aligns it to the left so that it does not overlap with the quantum job 154. In this way, the scheduler 124 arranges the quantum bits Q9 to Q 19 is assigned to quantum job 155.

[0115] Next, the scheduler 124 extracts the quantum job 156 from the head of the queue 150. The scheduler 124 identifies a pattern 161-3 that corresponds to the number of quantum bits used by the quantum job 156. The scheduler 124 left-justifies the specific shape indicated by the pattern 161-3 so that it does not overlap with the quantum job 155. In this way, the scheduler 124 determines the number of quantum bits Q 20 ~Q 22 is assigned to quantum job 156. At this point, the QPU 213 does not have any free quantum bits to execute the next quantum job 157. Therefore, quantum jobs 157 to 159 wait in queue 150.

[0116] In the example of Fig. 16, the scheduler 124 allocates multiple quantum jobs to the QPU 213 with as few gaps between them as possible. However, depending on the quantum processor, there may be significant noise between adjacent quantum bits. In such cases, the scheduler 124 may allocate different quantum jobs to the QPU 213 with a certain gap between them by sandwiching at least one free quantum bit between them. The gap is preferably equivalent to one or two free quantum bits.

[0117] Next, we will explain how to avoid bad quantum gates. As mentioned above, the pattern data is generated without considering the existence of bad quantum gates. For this reason, quantum circuits are compiled on the assumption that two-input quantum gates, which are native quantum gates, can be executed between adjacent quantum bits. In contrast, quantum jobs may be assigned allocation areas that include bad quantum gates.

[0118] 16, the allocation region of quantum job 154 includes quantum bits Q0 and Q5, and therefore includes a faulty quantum gate between quantum bits Q0 and Q5. Therefore, the compiled quantum circuit of quantum job 154 may not be executable in this allocation region. Therefore, for quantum jobs with allocation regions that include faulty quantum gates, scheduler 124 recompiles the quantum circuit so that the faulty quantum gate is not used.

[0119] Fig. 17 is a diagram showing an example of recompiling a quantum circuit. The scheduler 124 recompiles the quantum circuit 172 described above to generate a quantum circuit 173. Fig. 17 depicts quantum gates in the quantum circuit 173 that correspond to the portion of Fig. 14.

[0120] Scheduler 124 searches quantum circuit 172 for a two-input quantum gate between qubits Q0 and Q5 that is a faulty quantum gate. Qubits Q0 and Q5 correspond to the positions of qubits 0 and 5 in pattern 161-7. In FIG. 14, the last CNOT gate corresponds to the faulty quantum gate between qubits Q0 and Q5.

[0121] Therefore, scheduler 124 avoids the use of the bad quantum gate by inserting two swap gates before and after this CNOT gate. The first swap gate swaps the quantum states of qubits Q5 and Q6. The second swap gate swaps the quantum states of qubits Q1 and Q6. Then, instead of the CNOT gate between qubits Q0 and Q5, a CNOT gate between qubits Q0 and Q1 is executed.

[0122] The third swap gate exchanges the quantum states of qubits Q1 and Q6. The fourth swap gate exchanges the quantum states of qubits Q5 and Q6. This avoids the CNOT gate between qubits Q0 and Q5, while achieving a computational result equivalent to that of a CNOT gate between qubits Q0 and Q5.

[0123] Next, we will explain scheduling when some quantum jobs on the QPU 213 have finished. The scheduler 124 detects that one of the quantum jobs has finished. Then, the scheduler 124 changes the allocation area of ​​the quantum job currently being executed in order to consolidate the fragmented free quantum bit areas and generate a large free quantum bit area. The scheduler 124 shifts the quantum job currently being executed to the left on the QPU 213.

[0124] At this time, the scheduler 124 maintains the pattern of the quantum job being moved. Therefore, the shape of the allocation area after the move follows the same pattern as the shape of the allocation area before the move. However, as with the start of execution of a new quantum job, the scheduler 124 allows for up-down and left-right reversals of the specific shape indicated by the pattern. The scheduler 124 determines the destination of the move taking into account up-down and left-right reversals so that there are fewer free quantum bits to the left of the quantum job being moved.

[0125] FIG. 18 is a diagram showing an example of a change in the allocation of QPU regions. Here, consider the case where quantum jobs 154 and 156 in FIG. 16 are completed. The scheduler 124 detects the completion of quantum jobs 154 and 156. Then, the scheduler 124 moves quantum job 155 to the left on the QPU 213. At this time, the scheduler 124 flips the specific shape shown by pattern 161-11 left and right. As a result, the quantum bits allocated to quantum job 155 are quantum bits Q9 to Q 19 from qubits Q0 to Q 10 changes to.

[0126] By moving quantum job 155, qubit Q 11 ~Q 24 becomes a free quantum bit. Therefore, the scheduler 124 extracts quantum job 157 from the top of the queue 150. The scheduler 124 identifies a pattern corresponding to the number of quantum bits used by quantum job 157. The scheduler 124 flips the specific shape indicated by this pattern vertically and left-justifies it on the QPU 213 so that it does not overlap with quantum job 155. This allows quantum job 157 to be assigned a quantum bit Q 12 ~Q 24 is assigned.

[0127] If the allocation area before the move does not include a bad quantum gate and the allocation area after the move does include a bad quantum gate, the scheduler 124 recompiles the quantum circuit of the quantum job. If the allocation area before the move includes a bad quantum gate and the allocation area after the move does not include a bad quantum gate, the scheduler 124 restores the quantum circuit of the quantum job to the one before the recompilation. Therefore, when recompiling a quantum circuit, the scheduler 124 saves the quantum circuit before the recompilation.

[0128] Next, we will explain another example of pattern data. Here, we consider the case where pattern data is generated for a QPU with a 6x6 grid-like planar area. 19 is a diagram showing another example of patterns according to the number of quantum bits. Pattern generation unit 126 generates patterns 162-1, 162-2, ... corresponding to the number of used quantum bits of 1 to 36. When the number of used quantum bits is between 1 and 18, pattern generation unit 126 limits the height of the allocation region to 3. During this period, pattern generation unit 126 generates patterns 162-1 to 162-18 so that the number of columns is minimized. When the number of used quantum bits is between 19 and 36, pattern generation unit 126 allows the height of the allocation region to exceed 3. During this period, pattern generation unit 126 determines the arrangement of quantum bits for the part added from pattern 162-18 using the same rules as for patterns 162-1 to 162-18.

[0129] Pattern 162-1 represents one quantum bit. Pattern 162-2 adds one quantum bit below pattern 162-1. Pattern 162-3 adds one quantum bit below pattern 162-2. Pattern 162-3 represents one column of height 3. After pattern 162-3, quantum bits are added one by one from top to bottom to the left of pattern 162-3, up to pattern 162-6. Pattern 162-6 represents two columns of height 3.

[0130] After pattern 162-6, quantum bits are added one by one from top to bottom to the left of pattern 162-6, up to pattern 162-9. Pattern 162-9 shows three columns with a height of 3. Similarly, after pattern 162-9, columns are added to the left while limiting the height to 3, up to pattern 162-18. Pattern 162-18 shows six columns with a height of 3.

[0131] After pattern 162-18, the number of columns does not increase, and qubits are added above pattern 162-18, limiting the height to 6. One qubit is added upward in the leftmost column of pattern 162-18, until pattern 162-21, which shows one column with a height of 6 and five columns with a height of 3. After pattern 162-21, one qubit is added upward in the second-to-left column of pattern 162-21, until pattern 162-24, which shows two columns with a height of 6 and four columns with a height of 3.

[0132] In this way, patterns up to 36 used quantum bits are generated. The pattern with 36 used quantum bits indicates six columns with a height of 6, which is the topology of the QPU itself. Note that the pattern generation unit 126 may change the rules for generating patterns depending on the topology of the QPU. In particular, when the quantum bits included in the QPU do not form a lattice, the pattern generation unit 126 may generate patterns according to appropriate rules depending on the topology. Next, an example of a procedure for quantum job scheduling will be described.

[0133] Fig. 20 is a flowchart showing an example procedure for quantum job scheduling. The flowchart in Fig. 20 is repeatedly executed while there are quantum jobs in queue 121. In step S10, scheduler 124 extracts one quantum job from the top of queue 121. In step S11, scheduler 124 obtains availability information indicating the availability of quantum bits included in QPU 211. In step S12, scheduler 124 determines the number of quantum bits used by the quantum job from the quantum circuit of the quantum job.

[0134] In step S13, the scheduler 124 determines a pattern according to the number of quantum bits to be used from the pattern data generated in advance. In step S14, the scheduler 124 searches the free space information for a free space having the shape indicated by the pattern in step S13. In searching for a free space, up-down and left-right reversal of the shape indicated by the pattern is allowed. The scheduler 124 determines whether there is a corresponding free space. If there is a corresponding free space, the process proceeds to step S15; if there is not, the process proceeds to step S16.

[0135] In step S15, the scheduler 124 launches a quantum job. For each launched quantum job, quantum job control, which will be described later, is executed. Quantum job control for multiple quantum jobs is executed in parallel. Then, quantum job scheduling ends. In step S16, the scheduler 124 returns the quantum job extracted in step S10 to the top of the queue 121. Then, quantum job scheduling ends.

[0136] 21 is a flowchart showing an example of a procedure for controlling a quantum job. In step S20, the scheduler 124 obtains availability information indicating the availability of quantum bits included in the QPU 211. In step S21, the scheduler 124 determines the number of quantum bits used for the quantum job from the quantum circuit of the quantum job.

[0137] In step S22, the scheduler 124 determines a pattern corresponding to the number of used quantum bits from the pattern data generated in advance. In step S23, the scheduler 124 refers to the available space information and selects an allocation area of ​​the shape indicated by the pattern so as to pack quantum jobs in a certain direction on the QPU 211. At this time, the shape indicated by the pattern is allowed to be flipped up and down and left and right.

[0138] In step S24, the scheduler 124 refers to the topology data and determines whether the allocation area selected in step S23 includes a faulty quantum gate. If the allocation area includes a faulty quantum gate, the process proceeds to step S25. If not, the process proceeds to step S27. In step S25, the scheduler 124 saves the original quantum circuit compiled by the user computer 230.

[0139] In step S26, the scheduler 124 recompiles the quantum circuit by inserting swap gates or the like to avoid the bad quantum gates. In step S27, the control computer 220 causes the quantum computer 210 to execute the quantum circuit n times. If the assigned area does not contain any bad quantum gates, the quantum circuit is the original quantum circuit compiled by the user computer 230. If the assigned area contains any bad quantum gates, the quantum circuit is a recompiled quantum circuit.

[0140] In step S28, the scheduler 124 obtains the specified number of times N specified in the quantum job. The specified number of times N is the lower limit of the number of iterations for performing quantum computation and measuring quantum bits, and is specified by the user in consideration of statistical reliability. The scheduler 124 determines whether the cumulative number of executions of the quantum circuit in the quantum job exceeds the specified number of times N. If the cumulative number of executions exceeds the specified number of times N, the process proceeds to step S29; if the cumulative number of executions is equal to or less than the specified number of times N, the process returns to step S20.

[0141] In step S29, the scheduler 124 updates the availability information held by the server computer 100 to reflect the selection of the allocation area for the quantum job. In step S30, the communication unit 125 receives the execution result of the quantum job from the control computer 220. The communication unit 125 transmits the execution result to the user computer 230.

[0142] As described above, the information processing system of the second embodiment executes multiple quantum jobs in parallel on the QPU 211. This effectively utilizes the quantum bits of the QPU 211, improving the throughput of the quantum computer 210. Furthermore, the user computer 230 compiles the quantum circuit. This reduces the load on the server computer 100.

[0143] The information processing system also standardizes the shape of the quantum job allocation area according to the number of quantum bits used. This allows the server computer 100 to schedule the packing of multiple quantum jobs onto the QPU 211 using a lightweight algorithm, reducing the load on the server computer 100. The information processing system also generates patterns that define the shape of the allocation area according to certain rules. This makes it less likely that gaps will occur between quantum jobs when they are packed in a certain direction on the QPU 211.

[0144] Furthermore, because an allocation area with the shape indicated by the pattern is selected for a quantum job, physical quantum bits with the expected adjacent relationship are assigned. Therefore, even if the physical quantum bits to be used are undetermined at the time of compilation, recompilation of the quantum circuit is suppressed. Furthermore, when a quantum job ends, the information processing system moves other quantum jobs currently in execution in a certain direction on the QPU 211. This creates a large free space on the QPU 211, making it easier to schedule quantum jobs waiting to be executed.

[0145] Furthermore, the information processing system recompiles the quantum circuit for a quantum job for which an allocation area including a faulty quantum gate is selected so as to avoid the faulty quantum gate. Thus, the information processing system does not need to consider the presence of a faulty quantum gate when generating patterns or selecting allocation areas, and scheduling becomes more efficient. As a result, quantum job scheduling becomes more efficient for an information processing system in which relatively small quantum jobs continuously arrive. [Explanation of symbols]

[0146] 10. Information processing equipment 11 Storage section 12 Processing section 13 qubit region Patterns 14a, 14b, and 14c 15a, 15b, 15c Quantum Jobs

Claims

1. obtain a first quantum job using quantum bits of a first number of quantum bits, the first quantum job being compiled to be executable using a first pattern corresponding to a first number of quantum bits from among a plurality of patterns corresponding to the number of quantum bits, each pattern defining a shape of an assigned area in a quantum bit area in which the plurality of quantum bits are arranged; In response to the completion of the third quantum job in the quantum bit region, a second quantum job using quantum bits of the second number of quantum bits, to which an allocation region corresponding to a second pattern of the plurality of patterns is assigned, is moved in a fixed direction on the quantum bit region while maintaining the second pattern; allocating an allocation area corresponding to the first pattern to the first quantum job from among free areas included in the quantum bit area after the second quantum job has been moved; A quantum job scheduling program that executes processing on a computer.

2. further causing the computer to execute a process of transmitting pattern data in which the number of the plurality of quantum bits and the plurality of patterns are associated with each other to another computer; the first quantum job is received from the other computer; The quantum job scheduling program according to claim 1 .

3. a shape of each of the plurality of patterns is defined such that a length in a first direction is equal to or greater than a length in a second direction perpendicular to the first direction; the second quantum job is moved in the second direction; The quantum job scheduling program according to claim 1 .

4. The movement of the second quantum job allows the shape of the allocated area before the movement to be reversed in a first direction and in a second direction orthogonal to the first direction. The quantum job scheduling program according to claim 1 .

5. and further causing the computer to perform a process of recompiling the first quantum job so as not to use a bad quantum gate when there is a bad quantum gate between two adjacent quantum bits in an allocation area allocated to the first quantum job. The quantum job scheduling program according to claim 1 .

6. The recompiling includes adding a swap gate to a part of the quantum circuit indicated by the first quantum job that uses the faulty quantum gate. The quantum job scheduling program according to claim 5.

7. obtain a first quantum job using quantum bits of a first number of quantum bits, the first quantum job being compiled to be executable using a first pattern corresponding to a first number of quantum bits from among a plurality of patterns corresponding to the number of quantum bits, each pattern defining a shape of an assigned area in a quantum bit area in which the plurality of quantum bits are arranged; In response to the completion of the third quantum job in the quantum bit region, a second quantum job using quantum bits of the second number of quantum bits, to which an allocation region corresponding to a second pattern of the plurality of patterns is assigned, is moved in a fixed direction on the quantum bit region while maintaining the second pattern; allocating an allocation area corresponding to the first pattern to the first quantum job from among free areas included in the quantum bit area after the second quantum job has been moved; A quantum job scheduling method in which processing is executed by a computer.

8. a storage unit that stores a first quantum job that uses quantum bits of a first number of quantum bits, the first quantum job being compiled so as to be executable by a first pattern corresponding to a first number of quantum bits among a plurality of patterns corresponding to the number of quantum bits, each of which defines a shape of an assigned area in a quantum bit area in which a plurality of quantum bits are arranged; a processing unit that, in response to completion of a third quantum job in the quantum bit region, moves a second quantum job using quantum bits of the second number of quantum bits, to which an allocation area corresponding to a second pattern corresponding to a second number of quantum bits of the plurality of patterns is assigned, in a fixed direction on the quantum bit region while maintaining the second pattern, and assigns to the first quantum job an allocation area corresponding to the first pattern from among free areas included in the quantum bit region after the second quantum job has been moved; An information processing device having the above.

Images